2 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
22 * Purpose: MAC routines
29 * MACvReadAllRegs - Read All MAC Registers to buffer
30 * MACbIsRegBitsOn - Test if All test Bits On
31 * MACbIsRegBitsOff - Test if All test Bits Off
32 * MACbIsIntDisable - Test if MAC interrupt disable
33 * MACbyReadMultiAddr - Read Multicast Address Mask Pattern
34 * MACvWriteMultiAddr - Write Multicast Address Mask Pattern
35 * MACvSetMultiAddrByHash - Set Multicast Address Mask by Hash value
36 * MACvResetMultiAddrByHash - Clear Multicast Address Mask by Hash value
37 * MACvSetRxThreshold - Set Rx Threshold value
38 * MACvGetRxThreshold - Get Rx Threshold value
39 * MACvSetTxThreshold - Set Tx Threshold value
40 * MACvGetTxThreshold - Get Tx Threshold value
41 * MACvSetDmaLength - Set Dma Length value
42 * MACvGetDmaLength - Get Dma Length value
43 * MACvSetShortRetryLimit - Set 802.11 Short Retry limit
44 * MACvGetShortRetryLimit - Get 802.11 Short Retry limit
45 * MACvSetLongRetryLimit - Set 802.11 Long Retry limit
46 * MACvGetLongRetryLimit - Get 802.11 Long Retry limit
47 * MACvSetLoopbackMode - Set MAC Loopback Mode
48 * MACbIsInLoopbackMode - Test if MAC in Loopback mode
49 * MACvSetPacketFilter - Set MAC Address Filter
50 * MACvSaveContext - Save Context of MAC Registers
51 * MACvRestoreContext - Restore Context of MAC Registers
52 * MACbCompareContext - Compare if values of MAC Registers same as Context
53 * MACbSoftwareReset - Software Reset MAC
54 * MACbSafeRxOff - Turn Off MAC Rx
55 * MACbSafeTxOff - Turn Off MAC Tx
56 * MACbSafeStop - Stop MAC function
57 * MACbShutdown - Shut down MAC
58 * MACvInitialize - Initialize MAC
59 * MACvSetCurrRxDescAddr - Set Rx Descriptos Address
60 * MACvSetCurrTx0DescAddr - Set Tx0 Descriptos Address
61 * MACvSetCurrTx1DescAddr - Set Tx1 Descriptos Address
62 * MACvTimer0MicroSDelay - Micro Second Delay Loop by MAC
65 * 08-22-2003 Kyle Hsu : Porting MAC functions from sim53
66 * 09-03-2003 Bryan YC Fan : Add MACvClearBusSusInd()& MACvEnableBusSusEn()
67 * 09-18-2003 Jerry Chen : Add MACvSetKeyEntry & MACvDisableKeyEntry
75 WORD TxRate_iwconfig;//2008-5-8 <add> by chester
76 /*--------------------- Static Definitions -------------------------*/
77 //static int msglevel =MSG_LEVEL_DEBUG;
78 static int msglevel =MSG_LEVEL_INFO;
79 /*--------------------- Static Classes ----------------------------*/
81 /*--------------------- Static Variables --------------------------*/
83 /*--------------------- Static Functions --------------------------*/
85 /*--------------------- Export Variables --------------------------*/
87 /*--------------------- Export Functions --------------------------*/
95 * Read All MAC Registers to buffer
99 * dwIoBase - Base Address for MAC
101 * pbyMacRegs - buffer to read
106 VOID MACvReadAllRegs (DWORD_PTR dwIoBase, PBYTE pbyMacRegs)
110 // read page0 register
111 for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE0; ii++) {
112 VNSvInPortB(dwIoBase + ii, pbyMacRegs);
116 MACvSelectPage1(dwIoBase);
118 // read page1 register
119 for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE1; ii++) {
120 VNSvInPortB(dwIoBase + ii, pbyMacRegs);
124 MACvSelectPage0(dwIoBase);
130 * Test if all test bits on
134 * dwIoBase - Base Address for MAC
135 * byRegOfs - Offset of MAC Register
136 * byTestBits - Test bits
140 * Return Value: TRUE if all test bits On; otherwise FALSE
143 BOOL MACbIsRegBitsOn (DWORD_PTR dwIoBase, BYTE byRegOfs, BYTE byTestBits)
147 VNSvInPortB(dwIoBase + byRegOfs, &byData);
148 return (byData & byTestBits) == byTestBits;
153 * Test if all test bits off
157 * dwIoBase - Base Address for MAC
158 * byRegOfs - Offset of MAC Register
159 * byTestBits - Test bits
163 * Return Value: TRUE if all test bits Off; otherwise FALSE
166 BOOL MACbIsRegBitsOff (DWORD_PTR dwIoBase, BYTE byRegOfs, BYTE byTestBits)
170 VNSvInPortB(dwIoBase + byRegOfs, &byData);
171 return !(byData & byTestBits);
176 * Test if MAC interrupt disable
180 * dwIoBase - Base Address for MAC
184 * Return Value: TRUE if interrupt is disable; otherwise FALSE
187 BOOL MACbIsIntDisable (DWORD_PTR dwIoBase)
191 VNSvInPortD(dwIoBase + MAC_REG_IMR, &dwData);
200 * Read MAC Multicast Address Mask
204 * dwIoBase - Base Address for MAC
205 * uByteidx - Index of Mask
209 * Return Value: Mask Value read
212 BYTE MACbyReadMultiAddr (DWORD_PTR dwIoBase, UINT uByteIdx)
216 MACvSelectPage1(dwIoBase);
217 VNSvInPortB(dwIoBase + MAC_REG_MAR0 + uByteIdx, &byData);
218 MACvSelectPage0(dwIoBase);
224 * Write MAC Multicast Address Mask
228 * dwIoBase - Base Address for MAC
229 * uByteidx - Index of Mask
230 * byData - Mask Value to write
237 VOID MACvWriteMultiAddr (DWORD_PTR dwIoBase, UINT uByteIdx, BYTE byData)
239 MACvSelectPage1(dwIoBase);
240 VNSvOutPortB(dwIoBase + MAC_REG_MAR0 + uByteIdx, byData);
241 MACvSelectPage0(dwIoBase);
246 * Set this hash index into multicast address register bit
250 * dwIoBase - Base Address for MAC
251 * byHashIdx - Hash index to set
258 void MACvSetMultiAddrByHash (DWORD_PTR dwIoBase, BYTE byHashIdx)
264 // calculate byte position
265 uByteIdx = byHashIdx / 8;
266 ASSERT(uByteIdx < 8);
267 // calculate bit position
269 byBitMask <<= (byHashIdx % 8);
271 byOrgValue = MACbyReadMultiAddr(dwIoBase, uByteIdx);
272 MACvWriteMultiAddr(dwIoBase, uByteIdx, (BYTE)(byOrgValue | byBitMask));
277 * Reset this hash index into multicast address register bit
281 * dwIoBase - Base Address for MAC
282 * byHashIdx - Hash index to clear
289 void MACvResetMultiAddrByHash (DWORD_PTR dwIoBase, BYTE byHashIdx)
295 // calculate byte position
296 uByteIdx = byHashIdx / 8;
297 ASSERT(uByteIdx < 8);
298 // calculate bit position
300 byBitMask <<= (byHashIdx % 8);
302 byOrgValue = MACbyReadMultiAddr(dwIoBase, uByteIdx);
303 MACvWriteMultiAddr(dwIoBase, uByteIdx, (BYTE)(byOrgValue & (~byBitMask)));
312 * dwIoBase - Base Address for MAC
313 * byThreshold - Threshold Value
320 void MACvSetRxThreshold (DWORD_PTR dwIoBase, BYTE byThreshold)
324 ASSERT(byThreshold < 4);
327 VNSvInPortB(dwIoBase + MAC_REG_FCR0, &byOrgValue);
328 byOrgValue = (byOrgValue & 0xCF) | (byThreshold << 4);
329 VNSvOutPortB(dwIoBase + MAC_REG_FCR0, byOrgValue);
338 * dwIoBase - Base Address for MAC
340 * pbyThreshold- Threshold Value Get
345 void MACvGetRxThreshold (DWORD_PTR dwIoBase, PBYTE pbyThreshold)
348 VNSvInPortB(dwIoBase + MAC_REG_FCR0, pbyThreshold);
349 *pbyThreshold = (*pbyThreshold >> 4) & 0x03;
358 * dwIoBase - Base Address for MAC
359 * byThreshold - Threshold Value
366 void MACvSetTxThreshold (DWORD_PTR dwIoBase, BYTE byThreshold)
370 ASSERT(byThreshold < 4);
373 VNSvInPortB(dwIoBase + MAC_REG_FCR0, &byOrgValue);
374 byOrgValue = (byOrgValue & 0xF3) | (byThreshold << 2);
375 VNSvOutPortB(dwIoBase + MAC_REG_FCR0, byOrgValue);
384 * dwIoBase - Base Address for MAC
386 * pbyThreshold- Threshold Value Get
391 void MACvGetTxThreshold (DWORD_PTR dwIoBase, PBYTE pbyThreshold)
394 VNSvInPortB(dwIoBase + MAC_REG_FCR0, pbyThreshold);
395 *pbyThreshold = (*pbyThreshold >> 2) & 0x03;
404 * dwIoBase - Base Address for MAC
405 * byDmaLength - Dma Length Value
412 void MACvSetDmaLength (DWORD_PTR dwIoBase, BYTE byDmaLength)
416 ASSERT(byDmaLength < 4);
419 VNSvInPortB(dwIoBase + MAC_REG_FCR0, &byOrgValue);
420 byOrgValue = (byOrgValue & 0xFC) | byDmaLength;
421 VNSvOutPortB(dwIoBase + MAC_REG_FCR0, byOrgValue);
430 * dwIoBase - Base Address for MAC
432 * pbyDmaLength- Dma Length Value Get
437 void MACvGetDmaLength (DWORD_PTR dwIoBase, PBYTE pbyDmaLength)
440 VNSvInPortB(dwIoBase + MAC_REG_FCR0, pbyDmaLength);
441 *pbyDmaLength &= 0x03;
446 * Set 802.11 Short Retry Limit
450 * dwIoBase - Base Address for MAC
451 * byRetryLimit- Retry Limit
458 void MACvSetShortRetryLimit (DWORD_PTR dwIoBase, BYTE byRetryLimit)
461 VNSvOutPortB(dwIoBase + MAC_REG_SRT, byRetryLimit);
466 * Get 802.11 Short Retry Limit
470 * dwIoBase - Base Address for MAC
472 * pbyRetryLimit - Retry Limit Get
477 void MACvGetShortRetryLimit (DWORD_PTR dwIoBase, PBYTE pbyRetryLimit)
480 VNSvInPortB(dwIoBase + MAC_REG_SRT, pbyRetryLimit);
485 * Set 802.11 Long Retry Limit
489 * dwIoBase - Base Address for MAC
490 * byRetryLimit- Retry Limit
497 void MACvSetLongRetryLimit (DWORD_PTR dwIoBase, BYTE byRetryLimit)
500 VNSvOutPortB(dwIoBase + MAC_REG_LRT, byRetryLimit);
505 * Get 802.11 Long Retry Limit
509 * dwIoBase - Base Address for MAC
511 * pbyRetryLimit - Retry Limit Get
516 void MACvGetLongRetryLimit (DWORD_PTR dwIoBase, PBYTE pbyRetryLimit)
519 VNSvInPortB(dwIoBase + MAC_REG_LRT, pbyRetryLimit);
524 * Set MAC Loopback mode
528 * dwIoBase - Base Address for MAC
529 * byLoopbackMode - Loopback Mode
536 void MACvSetLoopbackMode (DWORD_PTR dwIoBase, BYTE byLoopbackMode)
540 ASSERT(byLoopbackMode < 3);
541 byLoopbackMode <<= 6;
543 VNSvInPortB(dwIoBase + MAC_REG_TEST, &byOrgValue);
544 byOrgValue = byOrgValue & 0x3F;
545 byOrgValue = byOrgValue | byLoopbackMode;
546 VNSvOutPortB(dwIoBase + MAC_REG_TEST, byOrgValue);
551 * Test if MAC in Loopback mode
555 * dwIoBase - Base Address for MAC
559 * Return Value: TRUE if in Loopback mode; otherwise FALSE
562 BOOL MACbIsInLoopbackMode (DWORD_PTR dwIoBase)
566 VNSvInPortB(dwIoBase + MAC_REG_TEST, &byOrgValue);
567 if (byOrgValue & (TEST_LBINT | TEST_LBEXT))
574 * Set MAC Address filter
578 * dwIoBase - Base Address for MAC
579 * wFilterType - Filter Type
586 void MACvSetPacketFilter (DWORD_PTR dwIoBase, WORD wFilterType)
591 // if only in DIRECTED mode, multicast-address will set to zero,
592 // but if other mode exist (e.g. PROMISCUOUS), multicast-address
594 if (wFilterType & PKT_TYPE_DIRECTED) {
595 // set multicast address to accept none
596 MACvSelectPage1(dwIoBase);
597 VNSvOutPortD(dwIoBase + MAC_REG_MAR0, 0L);
598 VNSvOutPortD(dwIoBase + MAC_REG_MAR0 + sizeof(DWORD), 0L);
599 MACvSelectPage0(dwIoBase);
602 if (wFilterType & (PKT_TYPE_PROMISCUOUS | PKT_TYPE_ALL_MULTICAST)) {
603 // set multicast address to accept all
604 MACvSelectPage1(dwIoBase);
605 VNSvOutPortD(dwIoBase + MAC_REG_MAR0, 0xFFFFFFFFL);
606 VNSvOutPortD(dwIoBase + MAC_REG_MAR0 + sizeof(DWORD), 0xFFFFFFFFL);
607 MACvSelectPage0(dwIoBase);
610 if (wFilterType & PKT_TYPE_PROMISCUOUS) {
612 byNewRCR |= (RCR_RXALLTYPE | RCR_UNICAST | RCR_MULTICAST | RCR_BROADCAST);
614 byNewRCR &= ~RCR_BSSID;
617 if (wFilterType & (PKT_TYPE_ALL_MULTICAST | PKT_TYPE_MULTICAST))
618 byNewRCR |= RCR_MULTICAST;
620 if (wFilterType & PKT_TYPE_BROADCAST)
621 byNewRCR |= RCR_BROADCAST;
623 if (wFilterType & PKT_TYPE_ERROR_CRC)
624 byNewRCR |= RCR_ERRCRC;
626 VNSvInPortB(dwIoBase + MAC_REG_RCR, &byOldRCR);
627 if (byNewRCR != byOldRCR) {
628 // Modify the Receive Command Register
629 VNSvOutPortB(dwIoBase + MAC_REG_RCR, byNewRCR);
635 * Save MAC registers to context buffer
639 * dwIoBase - Base Address for MAC
641 * pbyCxtBuf - Context buffer
646 void MACvSaveContext (DWORD_PTR dwIoBase, PBYTE pbyCxtBuf)
650 // read page0 register
651 for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE0; ii++) {
652 VNSvInPortB((dwIoBase + ii), (pbyCxtBuf + ii));
655 MACvSelectPage1(dwIoBase);
657 // read page1 register
658 for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE1; ii++) {
659 VNSvInPortB((dwIoBase + ii), (pbyCxtBuf + MAC_MAX_CONTEXT_SIZE_PAGE0 + ii));
662 MACvSelectPage0(dwIoBase);
667 * Restore MAC registers from context buffer
671 * dwIoBase - Base Address for MAC
672 * pbyCxtBuf - Context buffer
679 VOID MACvRestoreContext (DWORD_PTR dwIoBase, PBYTE pbyCxtBuf)
683 MACvSelectPage1(dwIoBase);
685 for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE1; ii++) {
686 VNSvOutPortB((dwIoBase + ii), *(pbyCxtBuf + MAC_MAX_CONTEXT_SIZE_PAGE0 + ii));
688 MACvSelectPage0(dwIoBase);
690 // restore RCR,TCR,IMR...
691 for (ii = MAC_REG_RCR; ii < MAC_REG_ISR; ii++) {
692 VNSvOutPortB(dwIoBase + ii, *(pbyCxtBuf + ii));
694 // restore MAC Config.
695 for (ii = MAC_REG_LRT; ii < MAC_REG_PAGE1SEL; ii++) {
696 VNSvOutPortB(dwIoBase + ii, *(pbyCxtBuf + ii));
698 VNSvOutPortB(dwIoBase + MAC_REG_CFG, *(pbyCxtBuf + MAC_REG_CFG));
700 // restore PS Config.
701 for (ii = MAC_REG_PSCFG; ii < MAC_REG_BBREGCTL; ii++) {
702 VNSvOutPortB(dwIoBase + ii, *(pbyCxtBuf + ii));
705 // restore CURR_RX_DESC_ADDR, CURR_TX_DESC_ADDR
706 VNSvOutPortD(dwIoBase + MAC_REG_TXDMAPTR0, *(PDWORD)(pbyCxtBuf + MAC_REG_TXDMAPTR0));
707 VNSvOutPortD(dwIoBase + MAC_REG_AC0DMAPTR, *(PDWORD)(pbyCxtBuf + MAC_REG_AC0DMAPTR));
708 VNSvOutPortD(dwIoBase + MAC_REG_BCNDMAPTR, *(PDWORD)(pbyCxtBuf + MAC_REG_BCNDMAPTR));
711 VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR0, *(PDWORD)(pbyCxtBuf + MAC_REG_RXDMAPTR0));
713 VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR1, *(PDWORD)(pbyCxtBuf + MAC_REG_RXDMAPTR1));
719 * Compare if MAC registers same as context buffer
723 * dwIoBase - Base Address for MAC
724 * pbyCxtBuf - Context buffer
728 * Return Value: TRUE if all values are the same; otherwise FALSE
731 BOOL MACbCompareContext (DWORD_PTR dwIoBase, PBYTE pbyCxtBuf)
735 // compare MAC context to determine if this is a power lost init,
736 // return TRUE for power remaining init, return FALSE for power lost init
738 // compare CURR_RX_DESC_ADDR, CURR_TX_DESC_ADDR
739 VNSvInPortD(dwIoBase + MAC_REG_TXDMAPTR0, &dwData);
740 if (dwData != *(PDWORD)(pbyCxtBuf + MAC_REG_TXDMAPTR0)) {
744 VNSvInPortD(dwIoBase + MAC_REG_AC0DMAPTR, &dwData);
745 if (dwData != *(PDWORD)(pbyCxtBuf + MAC_REG_AC0DMAPTR)) {
749 VNSvInPortD(dwIoBase + MAC_REG_RXDMAPTR0, &dwData);
750 if (dwData != *(PDWORD)(pbyCxtBuf + MAC_REG_RXDMAPTR0)) {
754 VNSvInPortD(dwIoBase + MAC_REG_RXDMAPTR1, &dwData);
755 if (dwData != *(PDWORD)(pbyCxtBuf + MAC_REG_RXDMAPTR1)) {
769 * dwIoBase - Base Address for MAC
773 * Return Value: TRUE if Reset Success; otherwise FALSE
776 BOOL MACbSoftwareReset (DWORD_PTR dwIoBase)
781 // turn on HOSTCR_SOFTRST, just write 0x01 to reset
782 //MACvRegBitsOn(dwIoBase, MAC_REG_HOSTCR, HOSTCR_SOFTRST);
783 VNSvOutPortB(dwIoBase+ MAC_REG_HOSTCR, 0x01);
785 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
786 VNSvInPortB(dwIoBase + MAC_REG_HOSTCR, &byData);
787 if ( !(byData & HOSTCR_SOFTRST))
790 if (ww == W_MAX_TIMEOUT)
798 * save some important register's value, then do reset, then restore register's value
802 * dwIoBase - Base Address for MAC
806 * Return Value: TRUE if success; otherwise FALSE
809 BOOL MACbSafeSoftwareReset (DWORD_PTR dwIoBase)
811 BYTE abyTmpRegData[MAC_MAX_CONTEXT_SIZE_PAGE0+MAC_MAX_CONTEXT_SIZE_PAGE1];
815 // save some important register's value, then do
816 // reset, then restore register's value
819 MACvSaveContext(dwIoBase, abyTmpRegData);
821 bRetVal = MACbSoftwareReset(dwIoBase);
822 //BBvSoftwareReset(pDevice->PortOffset);
823 // restore MAC context, except CR0
824 MACvRestoreContext(dwIoBase, abyTmpRegData);
835 * dwIoBase - Base Address for MAC
839 * Return Value: TRUE if success; otherwise FALSE
842 BOOL MACbSafeRxOff (DWORD_PTR dwIoBase)
848 // turn off wow temp for turn off Rx safely
851 VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL0, DMACTL_CLRRUN);
852 VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL1, DMACTL_CLRRUN);
853 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
854 VNSvInPortD(dwIoBase + MAC_REG_RXDMACTL0, &dwData);
855 if (!(dwData & DMACTL_RUN))
858 if (ww == W_MAX_TIMEOUT) {
860 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" DBG_PORT80(0x10)\n");
863 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
864 VNSvInPortD(dwIoBase + MAC_REG_RXDMACTL1, &dwData);
865 if ( !(dwData & DMACTL_RUN))
868 if (ww == W_MAX_TIMEOUT) {
870 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" DBG_PORT80(0x11)\n");
874 // try to safe shutdown RX
875 MACvRegBitsOff(dwIoBase, MAC_REG_HOSTCR, HOSTCR_RXON);
876 // W_MAX_TIMEOUT is the timeout period
877 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
878 VNSvInPortB(dwIoBase + MAC_REG_HOSTCR, &byData);
879 if ( !(byData & HOSTCR_RXONST))
882 if (ww == W_MAX_TIMEOUT) {
884 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" DBG_PORT80(0x12)\n");
896 * dwIoBase - Base Address for MAC
900 * Return Value: TRUE if success; otherwise FALSE
903 BOOL MACbSafeTxOff (DWORD_PTR dwIoBase)
911 VNSvOutPortD(dwIoBase + MAC_REG_TXDMACTL0, DMACTL_CLRRUN);
913 VNSvOutPortD(dwIoBase + MAC_REG_AC0DMACTL, DMACTL_CLRRUN);
916 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
917 VNSvInPortD(dwIoBase + MAC_REG_TXDMACTL0, &dwData);
918 if ( !(dwData & DMACTL_RUN))
921 if (ww == W_MAX_TIMEOUT) {
923 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" DBG_PORT80(0x20)\n");
926 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
927 VNSvInPortD(dwIoBase + MAC_REG_AC0DMACTL, &dwData);
928 if ( !(dwData & DMACTL_RUN))
931 if (ww == W_MAX_TIMEOUT) {
933 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" DBG_PORT80(0x21)\n");
937 // try to safe shutdown TX
938 MACvRegBitsOff(dwIoBase, MAC_REG_HOSTCR, HOSTCR_TXON);
940 // W_MAX_TIMEOUT is the timeout period
941 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
942 VNSvInPortB(dwIoBase + MAC_REG_HOSTCR, &byData);
943 if ( !(byData & HOSTCR_TXONST))
946 if (ww == W_MAX_TIMEOUT) {
948 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" DBG_PORT80(0x24)\n");
960 * dwIoBase - Base Address for MAC
964 * Return Value: TRUE if success; otherwise FALSE
967 BOOL MACbSafeStop (DWORD_PTR dwIoBase)
969 MACvRegBitsOff(dwIoBase, MAC_REG_TCR, TCR_AUTOBCNTX);
971 if (MACbSafeRxOff(dwIoBase) == FALSE) {
973 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" MACbSafeRxOff == FALSE)\n");
974 MACbSafeSoftwareReset(dwIoBase);
977 if (MACbSafeTxOff(dwIoBase) == FALSE) {
979 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" MACbSafeTxOff == FALSE)\n");
980 MACbSafeSoftwareReset(dwIoBase);
984 MACvRegBitsOff(dwIoBase, MAC_REG_HOSTCR, HOSTCR_MACEN);
995 * dwIoBase - Base Address for MAC
999 * Return Value: TRUE if success; otherwise FALSE
1002 BOOL MACbShutdown (DWORD_PTR dwIoBase)
1005 MACvIntDisable(dwIoBase);
1006 MACvSetLoopbackMode(dwIoBase, MAC_LB_INTERNAL);
1008 if (!MACbSafeStop(dwIoBase)) {
1009 MACvSetLoopbackMode(dwIoBase, MAC_LB_NONE);
1012 MACvSetLoopbackMode(dwIoBase, MAC_LB_NONE);
1022 * dwIoBase - Base Address for MAC
1026 * Return Value: none
1029 void MACvInitialize (DWORD_PTR dwIoBase)
1031 // clear sticky bits
1032 MACvClearStckDS(dwIoBase);
1033 // disable force PME-enable
1034 VNSvOutPortB(dwIoBase + MAC_REG_PMC1, PME_OVR);
1037 MACvPwrEvntDisable(dwIoBase);
1038 // clear power status
1039 VNSvOutPortW(dwIoBase + MAC_REG_WAKEUPSR0, 0x0F0F);
1043 MACbSoftwareReset(dwIoBase);
1045 // issue AUTOLD in EECSR to reload eeprom
1046 //MACvRegBitsOn(dwIoBase, MAC_REG_I2MCSR, I2MCSR_AUTOLD);
1047 // wait until EEPROM loading complete
1050 // VNSvInPortB(dwIoBase + MAC_REG_I2MCSR, &u8Data);
1051 // if ( !(u8Data & I2MCSR_AUTOLD))
1055 // reset TSF counter
1056 VNSvOutPortB(dwIoBase + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST);
1057 // enable TSF counter
1058 VNSvOutPortB(dwIoBase + MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
1061 // set packet filter
1062 // receive directed and broadcast address
1064 MACvSetPacketFilter(dwIoBase, PKT_TYPE_DIRECTED | PKT_TYPE_BROADCAST);
1070 * Set the chip with current rx descriptor address
1074 * dwIoBase - Base Address for MAC
1075 * dwCurrDescAddr - Descriptor Address
1079 * Return Value: none
1082 void MACvSetCurrRx0DescAddr (DWORD_PTR dwIoBase, DWORD dwCurrDescAddr)
1088 VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL0, &byOrgDMACtl);
1089 if (byOrgDMACtl & DMACTL_RUN) {
1090 VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL0+2, DMACTL_RUN);
1092 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1093 VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL0, &byData);
1094 if ( !(byData & DMACTL_RUN))
1097 if (ww == W_MAX_TIMEOUT) {
1100 VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR0, dwCurrDescAddr);
1101 if (byOrgDMACtl & DMACTL_RUN) {
1102 VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL0, DMACTL_RUN);
1108 * Set the chip with current rx descriptor address
1112 * dwIoBase - Base Address for MAC
1113 * dwCurrDescAddr - Descriptor Address
1117 * Return Value: none
1120 void MACvSetCurrRx1DescAddr (DWORD_PTR dwIoBase, DWORD dwCurrDescAddr)
1126 VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL1, &byOrgDMACtl);
1127 if (byOrgDMACtl & DMACTL_RUN) {
1128 VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL1+2, DMACTL_RUN);
1130 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1131 VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL1, &byData);
1132 if ( !(byData & DMACTL_RUN))
1135 if (ww == W_MAX_TIMEOUT) {
1138 VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR1, dwCurrDescAddr);
1139 if (byOrgDMACtl & DMACTL_RUN) {
1140 VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL1, DMACTL_RUN);
1146 * Set the chip with current tx0 descriptor address
1150 * dwIoBase - Base Address for MAC
1151 * dwCurrDescAddr - Descriptor Address
1155 * Return Value: none
1158 void MACvSetCurrTx0DescAddrEx (DWORD_PTR dwIoBase, DWORD dwCurrDescAddr)
1164 VNSvInPortB(dwIoBase + MAC_REG_TXDMACTL0, &byOrgDMACtl);
1165 if (byOrgDMACtl & DMACTL_RUN) {
1166 VNSvOutPortB(dwIoBase + MAC_REG_TXDMACTL0+2, DMACTL_RUN);
1168 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1169 VNSvInPortB(dwIoBase + MAC_REG_TXDMACTL0, &byData);
1170 if ( !(byData & DMACTL_RUN))
1173 if (ww == W_MAX_TIMEOUT) {
1176 VNSvOutPortD(dwIoBase + MAC_REG_TXDMAPTR0, dwCurrDescAddr);
1177 if (byOrgDMACtl & DMACTL_RUN) {
1178 VNSvOutPortB(dwIoBase + MAC_REG_TXDMACTL0, DMACTL_RUN);
1184 * Set the chip with current AC0 descriptor address
1188 * dwIoBase - Base Address for MAC
1189 * dwCurrDescAddr - Descriptor Address
1193 * Return Value: none
1197 void MACvSetCurrAC0DescAddrEx (DWORD_PTR dwIoBase, DWORD dwCurrDescAddr)
1203 VNSvInPortB(dwIoBase + MAC_REG_AC0DMACTL, &byOrgDMACtl);
1204 if (byOrgDMACtl & DMACTL_RUN) {
1205 VNSvOutPortB(dwIoBase + MAC_REG_AC0DMACTL+2, DMACTL_RUN);
1207 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1208 VNSvInPortB(dwIoBase + MAC_REG_AC0DMACTL, &byData);
1209 if (!(byData & DMACTL_RUN))
1212 if (ww == W_MAX_TIMEOUT) {
1214 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" DBG_PORT80(0x26)\n");
1216 VNSvOutPortD(dwIoBase + MAC_REG_AC0DMAPTR, dwCurrDescAddr);
1217 if (byOrgDMACtl & DMACTL_RUN) {
1218 VNSvOutPortB(dwIoBase + MAC_REG_AC0DMACTL, DMACTL_RUN);
1224 void MACvSetCurrTXDescAddr (int iTxType, DWORD_PTR dwIoBase, DWORD dwCurrDescAddr)
1226 if(iTxType == TYPE_AC0DMA){
1227 MACvSetCurrAC0DescAddrEx(dwIoBase, dwCurrDescAddr);
1228 }else if(iTxType == TYPE_TXDMA0){
1229 MACvSetCurrTx0DescAddrEx(dwIoBase, dwCurrDescAddr);
1235 * Micro Second Delay via MAC
1239 * dwIoBase - Base Address for MAC
1240 * uDelay - Delay time (timer resolution is 4 us)
1244 * Return Value: none
1247 VOID MACvTimer0MicroSDelay (DWORD_PTR dwIoBase, UINT uDelay)
1252 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, 0);
1253 VNSvOutPortD(dwIoBase + MAC_REG_TMDATA0, uDelay);
1254 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, (TMCTL_TMD | TMCTL_TE));
1255 for(ii=0;ii<66;ii++) { // assume max PCI clock is 66Mhz
1256 for (uu = 0; uu < uDelay; uu++) {
1257 VNSvInPortB(dwIoBase + MAC_REG_TMCTL0, &byValue);
1258 if ((byValue == 0) ||
1259 (byValue & TMCTL_TSUSP)) {
1260 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, 0);
1265 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, 0);
1271 * Micro Second One shot timer via MAC
1275 * dwIoBase - Base Address for MAC
1276 * uDelay - Delay time
1280 * Return Value: none
1283 void MACvOneShotTimer0MicroSec (DWORD_PTR dwIoBase, UINT uDelayTime)
1285 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, 0);
1286 VNSvOutPortD(dwIoBase + MAC_REG_TMDATA0, uDelayTime);
1287 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, (TMCTL_TMD | TMCTL_TE));
1292 * Micro Second One shot timer via MAC
1296 * dwIoBase - Base Address for MAC
1297 * uDelay - Delay time
1301 * Return Value: none
1304 void MACvOneShotTimer1MicroSec (DWORD_PTR dwIoBase, UINT uDelayTime)
1306 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL1, 0);
1307 VNSvOutPortD(dwIoBase + MAC_REG_TMDATA1, uDelayTime);
1308 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL1, (TMCTL_TMD | TMCTL_TE));
1312 void MACvSetMISCFifo (DWORD_PTR dwIoBase, WORD wOffset, DWORD dwData)
1316 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
1317 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
1318 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1322 BOOL MACbTxDMAOff (DWORD_PTR dwIoBase, UINT idx)
1327 if (idx == TYPE_TXDMA0) {
1328 VNSvOutPortB(dwIoBase + MAC_REG_TXDMACTL0+2, DMACTL_RUN);
1329 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1330 VNSvInPortB(dwIoBase + MAC_REG_TXDMACTL0, &byData);
1331 if ( !(byData & DMACTL_RUN))
1334 } else if (idx == TYPE_AC0DMA) {
1335 VNSvOutPortB(dwIoBase + MAC_REG_AC0DMACTL+2, DMACTL_RUN);
1336 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1337 VNSvInPortB(dwIoBase + MAC_REG_AC0DMACTL, &byData);
1338 if ( !(byData & DMACTL_RUN))
1342 if (ww == W_MAX_TIMEOUT) {
1344 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" DBG_PORT80(0x29)\n");
1350 void MACvClearBusSusInd (DWORD_PTR dwIoBase)
1354 // check if BcnSusInd enabled
1355 VNSvInPortD(dwIoBase + MAC_REG_ENCFG , &dwOrgValue);
1356 if( !(dwOrgValue & EnCFG_BcnSusInd))
1359 dwOrgValue = dwOrgValue | EnCFG_BcnSusClr;
1360 VNSvOutPortD(dwIoBase + MAC_REG_ENCFG, dwOrgValue);
1361 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1362 VNSvInPortD(dwIoBase + MAC_REG_ENCFG , &dwOrgValue);
1363 if( !(dwOrgValue & EnCFG_BcnSusInd))
1366 if (ww == W_MAX_TIMEOUT) {
1368 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" DBG_PORT80(0x33)\n");
1372 void MACvEnableBusSusEn (DWORD_PTR dwIoBase)
1377 // check if BcnSusInd enabled
1378 VNSvInPortB(dwIoBase + MAC_REG_CFG , &byOrgValue);
1381 byOrgValue = byOrgValue | CFG_BCNSUSEN;
1382 VNSvOutPortB(dwIoBase + MAC_REG_ENCFG, byOrgValue);
1383 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1384 VNSvInPortD(dwIoBase + MAC_REG_ENCFG , &dwOrgValue);
1385 if(dwOrgValue & EnCFG_BcnSusInd)
1388 if (ww == W_MAX_TIMEOUT) {
1390 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" DBG_PORT80(0x34)\n");
1394 BOOL MACbFlushSYNCFifo (DWORD_PTR dwIoBase)
1399 VNSvInPortB(dwIoBase + MAC_REG_MACCR , &byOrgValue);
1402 byOrgValue = byOrgValue | MACCR_SYNCFLUSH;
1403 VNSvOutPortB(dwIoBase + MAC_REG_MACCR, byOrgValue);
1405 // Check if SyncFlushOK
1406 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1407 VNSvInPortB(dwIoBase + MAC_REG_MACCR , &byOrgValue);
1408 if(byOrgValue & MACCR_SYNCFLUSHOK)
1411 if (ww == W_MAX_TIMEOUT) {
1413 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" DBG_PORT80(0x33)\n");
1418 BOOL MACbPSWakeup (DWORD_PTR dwIoBase)
1423 if (MACbIsRegBitsOff(dwIoBase, MAC_REG_PSCTL, PSCTL_PS)) {
1427 MACvRegBitsOff(dwIoBase, MAC_REG_PSCTL, PSCTL_PSEN);
1429 // Check if SyncFlushOK
1430 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1431 VNSvInPortB(dwIoBase + MAC_REG_PSCTL , &byOrgValue);
1432 if(byOrgValue & PSCTL_WAKEDONE)
1435 if (ww == W_MAX_TIMEOUT) {
1437 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" DBG_PORT80(0x33)\n");
1445 * Set the Key by MISCFIFO
1449 * dwIoBase - Base Address for MAC
1454 * Return Value: none
1458 void MACvSetKeyEntry (DWORD_PTR dwIoBase, WORD wKeyCtl, UINT uEntryIdx, UINT uKeyIdx, PBYTE pbyAddr, PDWORD pdwKey, BYTE byLocalID)
1468 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"MACvSetKeyEntry\n");
1469 wOffset = MISCFIFO_KEYETRY0;
1470 wOffset += (uEntryIdx * MISCFIFO_KEYENTRYSIZE);
1475 dwData |= MAKEWORD(*(pbyAddr+4), *(pbyAddr+5));
1476 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"1. wOffset: %d, Data: %lX, KeyCtl:%X\n", wOffset, dwData, wKeyCtl);
1478 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
1479 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
1480 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1484 dwData |= *(pbyAddr+3);
1486 dwData |= *(pbyAddr+2);
1488 dwData |= *(pbyAddr+1);
1490 dwData |= *(pbyAddr+0);
1491 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"2. wOffset: %d, Data: %lX\n", wOffset, dwData);
1493 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
1494 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
1495 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1498 wOffset += (uKeyIdx * 4);
1499 for (ii=0;ii<4;ii++) {
1500 // alway push 128 bits
1501 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"3.(%d) wOffset: %d, Data: %lX\n", ii, wOffset+ii, *pdwKey);
1502 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset+ii);
1503 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, *pdwKey++);
1504 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1512 * Disable the Key Entry by MISCFIFO
1516 * dwIoBase - Base Address for MAC
1521 * Return Value: none
1524 void MACvDisableKeyEntry (DWORD_PTR dwIoBase, UINT uEntryIdx)
1528 wOffset = MISCFIFO_KEYETRY0;
1529 wOffset += (uEntryIdx * MISCFIFO_KEYENTRYSIZE);
1531 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
1532 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, 0);
1533 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1539 * Set the default Key (KeyEntry[10]) by MISCFIFO
1543 * dwIoBase - Base Address for MAC
1548 * Return Value: none
1552 void MACvSetDefaultKeyEntry (DWORD_PTR dwIoBase, UINT uKeyLen, UINT uKeyIdx, PDWORD pdwKey, BYTE byLocalID)
1561 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"MACvSetDefaultKeyEntry\n");
1562 wOffset = MISCFIFO_KEYETRY0;
1563 wOffset += (10 * MISCFIFO_KEYENTRYSIZE);
1567 wOffset += (uKeyIdx * 4);
1568 // alway push 128 bits
1569 for (ii=0; ii<3; ii++) {
1570 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"(%d) wOffset: %d, Data: %lX\n", ii, wOffset+ii, *pdwKey);
1571 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset+ii);
1572 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, *pdwKey++);
1573 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1576 if (uKeyLen == WLAN_WEP104_KEYLEN) {
1577 dwData |= 0x80000000;
1579 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset+3);
1580 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
1581 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1582 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"End. wOffset: %d, Data: %lX\n", wOffset+3, dwData);
1589 * Enable default Key (KeyEntry[10]) by MISCFIFO
1593 * dwIoBase - Base Address for MAC
1598 * Return Value: none
1602 void MACvEnableDefaultKey (DWORD_PTR dwIoBase, BYTE byLocalID)
1611 wOffset = MISCFIFO_KEYETRY0;
1612 wOffset += (10 * MISCFIFO_KEYENTRYSIZE);
1614 dwData = 0xC0440000;
1615 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
1616 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
1617 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1618 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"MACvEnableDefaultKey: wOffset: %d, Data: %lX\n", wOffset, dwData);
1625 * Disable default Key (KeyEntry[10]) by MISCFIFO
1629 * dwIoBase - Base Address for MAC
1634 * Return Value: none
1637 void MACvDisableDefaultKey (DWORD_PTR dwIoBase)
1643 wOffset = MISCFIFO_KEYETRY0;
1644 wOffset += (10 * MISCFIFO_KEYENTRYSIZE);
1647 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
1648 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
1649 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1650 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"MACvDisableDefaultKey: wOffset: %d, Data: %lX\n", wOffset, dwData);
1655 * Set the default TKIP Group Key (KeyEntry[10]) by MISCFIFO
1659 * dwIoBase - Base Address for MAC
1664 * Return Value: none
1667 void MACvSetDefaultTKIPKeyEntry (DWORD_PTR dwIoBase, UINT uKeyLen, UINT uKeyIdx, PDWORD pdwKey, BYTE byLocalID)
1677 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"MACvSetDefaultTKIPKeyEntry\n");
1678 wOffset = MISCFIFO_KEYETRY0;
1679 // Kyle test : change offset from 10 -> 0
1680 wOffset += (10 * MISCFIFO_KEYENTRYSIZE);
1682 dwData = 0xC0660000;
1683 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
1684 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
1685 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1689 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
1690 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
1691 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1694 wOffset += (uKeyIdx * 4);
1695 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"1. wOffset: %d, Data: %lX, idx:%d\n", wOffset, *pdwKey, uKeyIdx);
1696 // alway push 128 bits
1697 for (ii=0; ii<4; ii++) {
1698 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"2.(%d) wOffset: %d, Data: %lX\n", ii, wOffset+ii, *pdwKey);
1699 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset+ii);
1700 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, *pdwKey++);
1701 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1710 * Set the Key Control by MISCFIFO
1714 * dwIoBase - Base Address for MAC
1719 * Return Value: none
1723 void MACvSetDefaultKeyCtl (DWORD_PTR dwIoBase, WORD wKeyCtl, UINT uEntryIdx, BYTE byLocalID)
1732 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"MACvSetKeyEntry\n");
1733 wOffset = MISCFIFO_KEYETRY0;
1734 wOffset += (uEntryIdx * MISCFIFO_KEYENTRYSIZE);
1740 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"1. wOffset: %d, Data: %lX, KeyCtl:%X\n", wOffset, dwData, wKeyCtl);
1742 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
1743 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
1744 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);