2 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
21 * Purpose: MAC routines
28 * MACvReadAllRegs - Read All MAC Registers to buffer
29 * MACbIsRegBitsOn - Test if All test Bits On
30 * MACbIsRegBitsOff - Test if All test Bits Off
31 * MACbIsIntDisable - Test if MAC interrupt disable
32 * MACbyReadMultiAddr - Read Multicast Address Mask Pattern
33 * MACvWriteMultiAddr - Write Multicast Address Mask Pattern
34 * MACvSetMultiAddrByHash - Set Multicast Address Mask by Hash value
35 * MACvResetMultiAddrByHash - Clear Multicast Address Mask by Hash value
36 * MACvSetRxThreshold - Set Rx Threshold value
37 * MACvGetRxThreshold - Get Rx Threshold value
38 * MACvSetTxThreshold - Set Tx Threshold value
39 * MACvGetTxThreshold - Get Tx Threshold value
40 * MACvSetDmaLength - Set Dma Length value
41 * MACvGetDmaLength - Get Dma Length value
42 * MACvSetShortRetryLimit - Set 802.11 Short Retry limit
43 * MACvGetShortRetryLimit - Get 802.11 Short Retry limit
44 * MACvSetLongRetryLimit - Set 802.11 Long Retry limit
45 * MACvGetLongRetryLimit - Get 802.11 Long Retry limit
46 * MACvSetLoopbackMode - Set MAC Loopback Mode
47 * MACbIsInLoopbackMode - Test if MAC in Loopback mode
48 * MACvSetPacketFilter - Set MAC Address Filter
49 * MACvSaveContext - Save Context of MAC Registers
50 * MACvRestoreContext - Restore Context of MAC Registers
51 * MACbCompareContext - Compare if values of MAC Registers same as Context
52 * MACbSoftwareReset - Software Reset MAC
53 * MACbSafeRxOff - Turn Off MAC Rx
54 * MACbSafeTxOff - Turn Off MAC Tx
55 * MACbSafeStop - Stop MAC function
56 * MACbShutdown - Shut down MAC
57 * MACvInitialize - Initialize MAC
58 * MACvSetCurrRxDescAddr - Set Rx Descriptos Address
59 * MACvSetCurrTx0DescAddr - Set Tx0 Descriptos Address
60 * MACvSetCurrTx1DescAddr - Set Tx1 Descriptos Address
61 * MACvTimer0MicroSDelay - Micro Second Delay Loop by MAC
64 * 08-22-2003 Kyle Hsu : Porting MAC functions from sim53
65 * 09-03-2003 Bryan YC Fan : Add MACvClearBusSusInd()& MACvEnableBusSusEn()
66 * 09-18-2003 Jerry Chen : Add MACvSetKeyEntry & MACvDisableKeyEntry
70 #if !defined(__TMACRO_H__)
73 #if !defined(__TBIT_H__)
76 #if !defined(__TETHER_H__)
79 #if !defined(__MAC_H__)
84 WORD TxRate_iwconfig;//2008-5-8 <add> by chester
85 /*--------------------- Static Definitions -------------------------*/
86 //static int msglevel =MSG_LEVEL_DEBUG;
87 static int msglevel =MSG_LEVEL_INFO;
88 /*--------------------- Static Classes ----------------------------*/
90 /*--------------------- Static Variables --------------------------*/
92 /*--------------------- Static Functions --------------------------*/
94 /*--------------------- Export Variables --------------------------*/
96 /*--------------------- Export Functions --------------------------*/
100 * Read All MAC Registers to buffer
104 * dwIoBase - Base Address for MAC
106 * pbyMacRegs - buffer to read
111 VOID MACvReadAllRegs (DWORD_PTR dwIoBase, PBYTE pbyMacRegs)
115 // read page0 register
116 for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE0; ii++) {
117 VNSvInPortB(dwIoBase + ii, pbyMacRegs);
121 MACvSelectPage1(dwIoBase);
123 // read page1 register
124 for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE1; ii++) {
125 VNSvInPortB(dwIoBase + ii, pbyMacRegs);
129 MACvSelectPage0(dwIoBase);
135 * Test if all test bits on
139 * dwIoBase - Base Address for MAC
140 * byRegOfs - Offset of MAC Register
141 * byTestBits - Test bits
145 * Return Value: TRUE if all test bits On; otherwise FALSE
148 BOOL MACbIsRegBitsOn (DWORD_PTR dwIoBase, BYTE byRegOfs, BYTE byTestBits)
152 VNSvInPortB(dwIoBase + byRegOfs, &byData);
153 return BITbIsAllBitsOn(byData, byTestBits);
158 * Test if all test bits off
162 * dwIoBase - Base Address for MAC
163 * byRegOfs - Offset of MAC Register
164 * byTestBits - Test bits
168 * Return Value: TRUE if all test bits Off; otherwise FALSE
171 BOOL MACbIsRegBitsOff (DWORD_PTR dwIoBase, BYTE byRegOfs, BYTE byTestBits)
175 VNSvInPortB(dwIoBase + byRegOfs, &byData);
176 return BITbIsAllBitsOff(byData, byTestBits);
181 * Test if MAC interrupt disable
185 * dwIoBase - Base Address for MAC
189 * Return Value: TRUE if interrupt is disable; otherwise FALSE
192 BOOL MACbIsIntDisable (DWORD_PTR dwIoBase)
196 VNSvInPortD(dwIoBase + MAC_REG_IMR, &dwData);
205 * Read MAC Multicast Address Mask
209 * dwIoBase - Base Address for MAC
210 * uByteidx - Index of Mask
214 * Return Value: Mask Value read
217 BYTE MACbyReadMultiAddr (DWORD_PTR dwIoBase, UINT uByteIdx)
221 MACvSelectPage1(dwIoBase);
222 VNSvInPortB(dwIoBase + MAC_REG_MAR0 + uByteIdx, &byData);
223 MACvSelectPage0(dwIoBase);
229 * Write MAC Multicast Address Mask
233 * dwIoBase - Base Address for MAC
234 * uByteidx - Index of Mask
235 * byData - Mask Value to write
242 VOID MACvWriteMultiAddr (DWORD_PTR dwIoBase, UINT uByteIdx, BYTE byData)
244 MACvSelectPage1(dwIoBase);
245 VNSvOutPortB(dwIoBase + MAC_REG_MAR0 + uByteIdx, byData);
246 MACvSelectPage0(dwIoBase);
251 * Set this hash index into multicast address register bit
255 * dwIoBase - Base Address for MAC
256 * byHashIdx - Hash index to set
263 void MACvSetMultiAddrByHash (DWORD_PTR dwIoBase, BYTE byHashIdx)
269 // calculate byte position
270 uByteIdx = byHashIdx / 8;
271 ASSERT(uByteIdx < 8);
272 // calculate bit position
274 byBitMask <<= (byHashIdx % 8);
276 byOrgValue = MACbyReadMultiAddr(dwIoBase, uByteIdx);
277 MACvWriteMultiAddr(dwIoBase, uByteIdx, (BYTE)(byOrgValue | byBitMask));
282 * Reset this hash index into multicast address register bit
286 * dwIoBase - Base Address for MAC
287 * byHashIdx - Hash index to clear
294 void MACvResetMultiAddrByHash (DWORD_PTR dwIoBase, BYTE byHashIdx)
300 // calculate byte position
301 uByteIdx = byHashIdx / 8;
302 ASSERT(uByteIdx < 8);
303 // calculate bit position
305 byBitMask <<= (byHashIdx % 8);
307 byOrgValue = MACbyReadMultiAddr(dwIoBase, uByteIdx);
308 MACvWriteMultiAddr(dwIoBase, uByteIdx, (BYTE)(byOrgValue & (~byBitMask)));
317 * dwIoBase - Base Address for MAC
318 * byThreshold - Threshold Value
325 void MACvSetRxThreshold (DWORD_PTR dwIoBase, BYTE byThreshold)
329 ASSERT(byThreshold < 4);
332 VNSvInPortB(dwIoBase + MAC_REG_FCR0, &byOrgValue);
333 byOrgValue = (byOrgValue & 0xCF) | (byThreshold << 4);
334 VNSvOutPortB(dwIoBase + MAC_REG_FCR0, byOrgValue);
343 * dwIoBase - Base Address for MAC
345 * pbyThreshold- Threshold Value Get
350 void MACvGetRxThreshold (DWORD_PTR dwIoBase, PBYTE pbyThreshold)
353 VNSvInPortB(dwIoBase + MAC_REG_FCR0, pbyThreshold);
354 *pbyThreshold = (*pbyThreshold >> 4) & 0x03;
363 * dwIoBase - Base Address for MAC
364 * byThreshold - Threshold Value
371 void MACvSetTxThreshold (DWORD_PTR dwIoBase, BYTE byThreshold)
375 ASSERT(byThreshold < 4);
378 VNSvInPortB(dwIoBase + MAC_REG_FCR0, &byOrgValue);
379 byOrgValue = (byOrgValue & 0xF3) | (byThreshold << 2);
380 VNSvOutPortB(dwIoBase + MAC_REG_FCR0, byOrgValue);
389 * dwIoBase - Base Address for MAC
391 * pbyThreshold- Threshold Value Get
396 void MACvGetTxThreshold (DWORD_PTR dwIoBase, PBYTE pbyThreshold)
399 VNSvInPortB(dwIoBase + MAC_REG_FCR0, pbyThreshold);
400 *pbyThreshold = (*pbyThreshold >> 2) & 0x03;
409 * dwIoBase - Base Address for MAC
410 * byDmaLength - Dma Length Value
417 void MACvSetDmaLength (DWORD_PTR dwIoBase, BYTE byDmaLength)
421 ASSERT(byDmaLength < 4);
424 VNSvInPortB(dwIoBase + MAC_REG_FCR0, &byOrgValue);
425 byOrgValue = (byOrgValue & 0xFC) | byDmaLength;
426 VNSvOutPortB(dwIoBase + MAC_REG_FCR0, byOrgValue);
435 * dwIoBase - Base Address for MAC
437 * pbyDmaLength- Dma Length Value Get
442 void MACvGetDmaLength (DWORD_PTR dwIoBase, PBYTE pbyDmaLength)
445 VNSvInPortB(dwIoBase + MAC_REG_FCR0, pbyDmaLength);
446 *pbyDmaLength &= 0x03;
451 * Set 802.11 Short Retry Limit
455 * dwIoBase - Base Address for MAC
456 * byRetryLimit- Retry Limit
463 void MACvSetShortRetryLimit (DWORD_PTR dwIoBase, BYTE byRetryLimit)
466 VNSvOutPortB(dwIoBase + MAC_REG_SRT, byRetryLimit);
471 * Get 802.11 Short Retry Limit
475 * dwIoBase - Base Address for MAC
477 * pbyRetryLimit - Retry Limit Get
482 void MACvGetShortRetryLimit (DWORD_PTR dwIoBase, PBYTE pbyRetryLimit)
485 VNSvInPortB(dwIoBase + MAC_REG_SRT, pbyRetryLimit);
490 * Set 802.11 Long Retry Limit
494 * dwIoBase - Base Address for MAC
495 * byRetryLimit- Retry Limit
502 void MACvSetLongRetryLimit (DWORD_PTR dwIoBase, BYTE byRetryLimit)
505 VNSvOutPortB(dwIoBase + MAC_REG_LRT, byRetryLimit);
510 * Get 802.11 Long Retry Limit
514 * dwIoBase - Base Address for MAC
516 * pbyRetryLimit - Retry Limit Get
521 void MACvGetLongRetryLimit (DWORD_PTR dwIoBase, PBYTE pbyRetryLimit)
524 VNSvInPortB(dwIoBase + MAC_REG_LRT, pbyRetryLimit);
529 * Set MAC Loopback mode
533 * dwIoBase - Base Address for MAC
534 * byLoopbackMode - Loopback Mode
541 void MACvSetLoopbackMode (DWORD_PTR dwIoBase, BYTE byLoopbackMode)
545 ASSERT(byLoopbackMode < 3);
546 byLoopbackMode <<= 6;
548 VNSvInPortB(dwIoBase + MAC_REG_TEST, &byOrgValue);
549 byOrgValue = byOrgValue & 0x3F;
550 byOrgValue = byOrgValue | byLoopbackMode;
551 VNSvOutPortB(dwIoBase + MAC_REG_TEST, byOrgValue);
556 * Test if MAC in Loopback mode
560 * dwIoBase - Base Address for MAC
564 * Return Value: TRUE if in Loopback mode; otherwise FALSE
567 BOOL MACbIsInLoopbackMode (DWORD_PTR dwIoBase)
571 VNSvInPortB(dwIoBase + MAC_REG_TEST, &byOrgValue);
572 if (BITbIsAnyBitsOn(byOrgValue, (TEST_LBINT | TEST_LBEXT)))
579 * Set MAC Address filter
583 * dwIoBase - Base Address for MAC
584 * wFilterType - Filter Type
591 void MACvSetPacketFilter (DWORD_PTR dwIoBase, WORD wFilterType)
596 // if only in DIRECTED mode, multicast-address will set to zero,
597 // but if other mode exist (e.g. PROMISCUOUS), multicast-address
599 if (BITbIsBitOn(wFilterType, PKT_TYPE_DIRECTED)) {
600 // set multicast address to accept none
601 MACvSelectPage1(dwIoBase);
602 VNSvOutPortD(dwIoBase + MAC_REG_MAR0, 0L);
603 VNSvOutPortD(dwIoBase + MAC_REG_MAR0 + sizeof(DWORD), 0L);
604 MACvSelectPage0(dwIoBase);
607 if (BITbIsAnyBitsOn(wFilterType, PKT_TYPE_PROMISCUOUS | PKT_TYPE_ALL_MULTICAST)) {
608 // set multicast address to accept all
609 MACvSelectPage1(dwIoBase);
610 VNSvOutPortD(dwIoBase + MAC_REG_MAR0, 0xFFFFFFFFL);
611 VNSvOutPortD(dwIoBase + MAC_REG_MAR0 + sizeof(DWORD), 0xFFFFFFFFL);
612 MACvSelectPage0(dwIoBase);
615 if (BITbIsBitOn(wFilterType, PKT_TYPE_PROMISCUOUS)) {
617 byNewRCR |= (RCR_RXALLTYPE | RCR_UNICAST | RCR_MULTICAST | RCR_BROADCAST);
619 byNewRCR &= ~RCR_BSSID;
622 if (BITbIsAnyBitsOn(wFilterType, (PKT_TYPE_ALL_MULTICAST | PKT_TYPE_MULTICAST)))
623 byNewRCR |= RCR_MULTICAST;
625 if (BITbIsBitOn(wFilterType, PKT_TYPE_BROADCAST))
626 byNewRCR |= RCR_BROADCAST;
628 if (BITbIsBitOn(wFilterType, PKT_TYPE_ERROR_CRC))
629 byNewRCR |= RCR_ERRCRC;
631 VNSvInPortB(dwIoBase + MAC_REG_RCR, &byOldRCR);
632 if (byNewRCR != byOldRCR) {
633 // Modify the Receive Command Register
634 VNSvOutPortB(dwIoBase + MAC_REG_RCR, byNewRCR);
640 * Save MAC registers to context buffer
644 * dwIoBase - Base Address for MAC
646 * pbyCxtBuf - Context buffer
651 void MACvSaveContext (DWORD_PTR dwIoBase, PBYTE pbyCxtBuf)
655 // read page0 register
656 for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE0; ii++) {
657 VNSvInPortB((dwIoBase + ii), (pbyCxtBuf + ii));
660 MACvSelectPage1(dwIoBase);
662 // read page1 register
663 for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE1; ii++) {
664 VNSvInPortB((dwIoBase + ii), (pbyCxtBuf + MAC_MAX_CONTEXT_SIZE_PAGE0 + ii));
667 MACvSelectPage0(dwIoBase);
672 * Restore MAC registers from context buffer
676 * dwIoBase - Base Address for MAC
677 * pbyCxtBuf - Context buffer
684 VOID MACvRestoreContext (DWORD_PTR dwIoBase, PBYTE pbyCxtBuf)
688 MACvSelectPage1(dwIoBase);
690 for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE1; ii++) {
691 VNSvOutPortB((dwIoBase + ii), *(pbyCxtBuf + MAC_MAX_CONTEXT_SIZE_PAGE0 + ii));
693 MACvSelectPage0(dwIoBase);
695 // restore RCR,TCR,IMR...
696 for (ii = MAC_REG_RCR; ii < MAC_REG_ISR; ii++) {
697 VNSvOutPortB(dwIoBase + ii, *(pbyCxtBuf + ii));
699 // restore MAC Config.
700 for (ii = MAC_REG_LRT; ii < MAC_REG_PAGE1SEL; ii++) {
701 VNSvOutPortB(dwIoBase + ii, *(pbyCxtBuf + ii));
703 VNSvOutPortB(dwIoBase + MAC_REG_CFG, *(pbyCxtBuf + MAC_REG_CFG));
705 // restore PS Config.
706 for (ii = MAC_REG_PSCFG; ii < MAC_REG_BBREGCTL; ii++) {
707 VNSvOutPortB(dwIoBase + ii, *(pbyCxtBuf + ii));
710 // restore CURR_RX_DESC_ADDR, CURR_TX_DESC_ADDR
711 VNSvOutPortD(dwIoBase + MAC_REG_TXDMAPTR0, *(PDWORD)(pbyCxtBuf + MAC_REG_TXDMAPTR0));
712 VNSvOutPortD(dwIoBase + MAC_REG_AC0DMAPTR, *(PDWORD)(pbyCxtBuf + MAC_REG_AC0DMAPTR));
713 VNSvOutPortD(dwIoBase + MAC_REG_BCNDMAPTR, *(PDWORD)(pbyCxtBuf + MAC_REG_BCNDMAPTR));
716 VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR0, *(PDWORD)(pbyCxtBuf + MAC_REG_RXDMAPTR0));
718 VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR1, *(PDWORD)(pbyCxtBuf + MAC_REG_RXDMAPTR1));
724 * Compare if MAC registers same as context buffer
728 * dwIoBase - Base Address for MAC
729 * pbyCxtBuf - Context buffer
733 * Return Value: TRUE if all values are the same; otherwise FALSE
736 BOOL MACbCompareContext (DWORD_PTR dwIoBase, PBYTE pbyCxtBuf)
740 // compare MAC context to determine if this is a power lost init,
741 // return TRUE for power remaining init, return FALSE for power lost init
743 // compare CURR_RX_DESC_ADDR, CURR_TX_DESC_ADDR
744 VNSvInPortD(dwIoBase + MAC_REG_TXDMAPTR0, &dwData);
745 if (dwData != *(PDWORD)(pbyCxtBuf + MAC_REG_TXDMAPTR0)) {
749 VNSvInPortD(dwIoBase + MAC_REG_AC0DMAPTR, &dwData);
750 if (dwData != *(PDWORD)(pbyCxtBuf + MAC_REG_AC0DMAPTR)) {
754 VNSvInPortD(dwIoBase + MAC_REG_RXDMAPTR0, &dwData);
755 if (dwData != *(PDWORD)(pbyCxtBuf + MAC_REG_RXDMAPTR0)) {
759 VNSvInPortD(dwIoBase + MAC_REG_RXDMAPTR1, &dwData);
760 if (dwData != *(PDWORD)(pbyCxtBuf + MAC_REG_RXDMAPTR1)) {
774 * dwIoBase - Base Address for MAC
778 * Return Value: TRUE if Reset Success; otherwise FALSE
781 BOOL MACbSoftwareReset (DWORD_PTR dwIoBase)
786 // turn on HOSTCR_SOFTRST, just write 0x01 to reset
787 //MACvRegBitsOn(dwIoBase, MAC_REG_HOSTCR, HOSTCR_SOFTRST);
788 VNSvOutPortB(dwIoBase+ MAC_REG_HOSTCR, 0x01);
790 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
791 VNSvInPortB(dwIoBase + MAC_REG_HOSTCR, &byData);
792 if (BITbIsBitOff(byData, HOSTCR_SOFTRST))
795 if (ww == W_MAX_TIMEOUT)
803 * save some important register's value, then do reset, then restore register's value
807 * dwIoBase - Base Address for MAC
811 * Return Value: TRUE if success; otherwise FALSE
814 BOOL MACbSafeSoftwareReset (DWORD_PTR dwIoBase)
816 BYTE abyTmpRegData[MAC_MAX_CONTEXT_SIZE_PAGE0+MAC_MAX_CONTEXT_SIZE_PAGE1];
820 // save some important register's value, then do
821 // reset, then restore register's value
824 MACvSaveContext(dwIoBase, abyTmpRegData);
826 bRetVal = MACbSoftwareReset(dwIoBase);
827 //BBvSoftwareReset(pDevice->PortOffset);
828 // restore MAC context, except CR0
829 MACvRestoreContext(dwIoBase, abyTmpRegData);
840 * dwIoBase - Base Address for MAC
844 * Return Value: TRUE if success; otherwise FALSE
847 BOOL MACbSafeRxOff (DWORD_PTR dwIoBase)
853 // turn off wow temp for turn off Rx safely
856 VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL0, DMACTL_CLRRUN);
857 VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL1, DMACTL_CLRRUN);
858 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
859 VNSvInPortD(dwIoBase + MAC_REG_RXDMACTL0, &dwData);
860 if (BITbIsAllBitsOff(dwData, DMACTL_RUN))
863 if (ww == W_MAX_TIMEOUT) {
865 DEVICE_PRT(MSG_LEVEL_DEBUG, KERN_INFO" DBG_PORT80(0x10)\n");
868 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
869 VNSvInPortD(dwIoBase + MAC_REG_RXDMACTL1, &dwData);
870 if (BITbIsAllBitsOff(dwData, DMACTL_RUN))
873 if (ww == W_MAX_TIMEOUT) {
875 DEVICE_PRT(MSG_LEVEL_DEBUG, KERN_INFO" DBG_PORT80(0x11)\n");
879 // try to safe shutdown RX
880 MACvRegBitsOff(dwIoBase, MAC_REG_HOSTCR, HOSTCR_RXON);
881 // W_MAX_TIMEOUT is the timeout period
882 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
883 VNSvInPortB(dwIoBase + MAC_REG_HOSTCR, &byData);
884 if (BITbIsAllBitsOff(byData, HOSTCR_RXONST))
887 if (ww == W_MAX_TIMEOUT) {
889 DEVICE_PRT(MSG_LEVEL_DEBUG, KERN_INFO" DBG_PORT80(0x12)\n");
901 * dwIoBase - Base Address for MAC
905 * Return Value: TRUE if success; otherwise FALSE
908 BOOL MACbSafeTxOff (DWORD_PTR dwIoBase)
916 VNSvOutPortD(dwIoBase + MAC_REG_TXDMACTL0, DMACTL_CLRRUN);
918 VNSvOutPortD(dwIoBase + MAC_REG_AC0DMACTL, DMACTL_CLRRUN);
921 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
922 VNSvInPortD(dwIoBase + MAC_REG_TXDMACTL0, &dwData);
923 if (BITbIsAllBitsOff(dwData, DMACTL_RUN))
926 if (ww == W_MAX_TIMEOUT) {
928 DEVICE_PRT(MSG_LEVEL_DEBUG, KERN_INFO" DBG_PORT80(0x20)\n");
931 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
932 VNSvInPortD(dwIoBase + MAC_REG_AC0DMACTL, &dwData);
933 if (BITbIsAllBitsOff(dwData, DMACTL_RUN))
936 if (ww == W_MAX_TIMEOUT) {
938 DEVICE_PRT(MSG_LEVEL_DEBUG, KERN_INFO" DBG_PORT80(0x21)\n");
942 // try to safe shutdown TX
943 MACvRegBitsOff(dwIoBase, MAC_REG_HOSTCR, HOSTCR_TXON);
945 // W_MAX_TIMEOUT is the timeout period
946 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
947 VNSvInPortB(dwIoBase + MAC_REG_HOSTCR, &byData);
948 if (BITbIsAllBitsOff(byData, HOSTCR_TXONST))
951 if (ww == W_MAX_TIMEOUT) {
953 DEVICE_PRT(MSG_LEVEL_DEBUG, KERN_INFO" DBG_PORT80(0x24)\n");
965 * dwIoBase - Base Address for MAC
969 * Return Value: TRUE if success; otherwise FALSE
972 BOOL MACbSafeStop (DWORD_PTR dwIoBase)
974 MACvRegBitsOff(dwIoBase, MAC_REG_TCR, TCR_AUTOBCNTX);
976 if (MACbSafeRxOff(dwIoBase) == FALSE) {
978 DEVICE_PRT(MSG_LEVEL_DEBUG, KERN_INFO" MACbSafeRxOff == FALSE)\n");
979 MACbSafeSoftwareReset(dwIoBase);
982 if (MACbSafeTxOff(dwIoBase) == FALSE) {
984 DEVICE_PRT(MSG_LEVEL_DEBUG, KERN_INFO" MACbSafeTxOff == FALSE)\n");
985 MACbSafeSoftwareReset(dwIoBase);
989 MACvRegBitsOff(dwIoBase, MAC_REG_HOSTCR, HOSTCR_MACEN);
1000 * dwIoBase - Base Address for MAC
1004 * Return Value: TRUE if success; otherwise FALSE
1007 BOOL MACbShutdown (DWORD_PTR dwIoBase)
1010 MACvIntDisable(dwIoBase);
1011 MACvSetLoopbackMode(dwIoBase, MAC_LB_INTERNAL);
1013 if (!MACbSafeStop(dwIoBase)) {
1014 MACvSetLoopbackMode(dwIoBase, MAC_LB_NONE);
1017 MACvSetLoopbackMode(dwIoBase, MAC_LB_NONE);
1027 * dwIoBase - Base Address for MAC
1031 * Return Value: none
1034 void MACvInitialize (DWORD_PTR dwIoBase)
1036 // clear sticky bits
1037 MACvClearStckDS(dwIoBase);
1038 // disable force PME-enable
1039 VNSvOutPortB(dwIoBase + MAC_REG_PMC1, PME_OVR);
1042 MACvPwrEvntDisable(dwIoBase);
1043 // clear power status
1044 VNSvOutPortW(dwIoBase + MAC_REG_WAKEUPSR0, 0x0F0F);
1048 MACbSoftwareReset(dwIoBase);
1050 // issue AUTOLD in EECSR to reload eeprom
1051 //MACvRegBitsOn(dwIoBase, MAC_REG_I2MCSR, I2MCSR_AUTOLD);
1052 // wait until EEPROM loading complete
1055 // VNSvInPortB(dwIoBase + MAC_REG_I2MCSR, &u8Data);
1056 // if (BITbIsBitOff(u8Data, I2MCSR_AUTOLD))
1060 // reset TSF counter
1061 VNSvOutPortB(dwIoBase + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST);
1062 // enable TSF counter
1063 VNSvOutPortB(dwIoBase + MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
1066 // set packet filter
1067 // receive directed and broadcast address
1069 MACvSetPacketFilter(dwIoBase, PKT_TYPE_DIRECTED | PKT_TYPE_BROADCAST);
1075 * Set the chip with current rx descriptor address
1079 * dwIoBase - Base Address for MAC
1080 * dwCurrDescAddr - Descriptor Address
1084 * Return Value: none
1087 void MACvSetCurrRx0DescAddr (DWORD_PTR dwIoBase, DWORD dwCurrDescAddr)
1093 VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL0, &byOrgDMACtl);
1094 if (BITbIsAllBitsOn(byOrgDMACtl, DMACTL_RUN)) {
1095 VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL0+2, DMACTL_RUN);
1097 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1098 VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL0, &byData);
1099 if (BITbIsAllBitsOff(byData, DMACTL_RUN))
1102 if (ww == W_MAX_TIMEOUT) {
1105 VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR0, dwCurrDescAddr);
1106 if (BITbIsAllBitsOn(byOrgDMACtl, DMACTL_RUN)) {
1107 VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL0, DMACTL_RUN);
1113 * Set the chip with current rx descriptor address
1117 * dwIoBase - Base Address for MAC
1118 * dwCurrDescAddr - Descriptor Address
1122 * Return Value: none
1125 void MACvSetCurrRx1DescAddr (DWORD_PTR dwIoBase, DWORD dwCurrDescAddr)
1131 VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL1, &byOrgDMACtl);
1132 if (BITbIsAllBitsOn(byOrgDMACtl, DMACTL_RUN)) {
1133 VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL1+2, DMACTL_RUN);
1135 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1136 VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL1, &byData);
1137 if (BITbIsAllBitsOff(byData, DMACTL_RUN))
1140 if (ww == W_MAX_TIMEOUT) {
1143 VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR1, dwCurrDescAddr);
1144 if (BITbIsAllBitsOn(byOrgDMACtl, DMACTL_RUN)) {
1145 VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL1, DMACTL_RUN);
1151 * Set the chip with current tx0 descriptor address
1155 * dwIoBase - Base Address for MAC
1156 * dwCurrDescAddr - Descriptor Address
1160 * Return Value: none
1163 void MACvSetCurrTx0DescAddrEx (DWORD_PTR dwIoBase, DWORD dwCurrDescAddr)
1169 VNSvInPortB(dwIoBase + MAC_REG_TXDMACTL0, &byOrgDMACtl);
1170 if (BITbIsAllBitsOn(byOrgDMACtl, DMACTL_RUN)) {
1171 VNSvOutPortB(dwIoBase + MAC_REG_TXDMACTL0+2, DMACTL_RUN);
1173 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1174 VNSvInPortB(dwIoBase + MAC_REG_TXDMACTL0, &byData);
1175 if (BITbIsAllBitsOff(byData, DMACTL_RUN))
1178 if (ww == W_MAX_TIMEOUT) {
1181 VNSvOutPortD(dwIoBase + MAC_REG_TXDMAPTR0, dwCurrDescAddr);
1182 if (BITbIsAllBitsOn(byOrgDMACtl, DMACTL_RUN)) {
1183 VNSvOutPortB(dwIoBase + MAC_REG_TXDMACTL0, DMACTL_RUN);
1189 * Set the chip with current AC0 descriptor address
1193 * dwIoBase - Base Address for MAC
1194 * dwCurrDescAddr - Descriptor Address
1198 * Return Value: none
1202 void MACvSetCurrAC0DescAddrEx (DWORD_PTR dwIoBase, DWORD dwCurrDescAddr)
1208 VNSvInPortB(dwIoBase + MAC_REG_AC0DMACTL, &byOrgDMACtl);
1209 if (BITbIsAllBitsOn(byOrgDMACtl, DMACTL_RUN)) {
1210 VNSvOutPortB(dwIoBase + MAC_REG_AC0DMACTL+2, DMACTL_RUN);
1212 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1213 VNSvInPortB(dwIoBase + MAC_REG_AC0DMACTL, &byData);
1214 if (BITbIsAllBitsOff(byData, DMACTL_RUN))
1217 if (ww == W_MAX_TIMEOUT) {
1219 DEVICE_PRT(MSG_LEVEL_DEBUG, KERN_INFO" DBG_PORT80(0x26)\n");
1221 VNSvOutPortD(dwIoBase + MAC_REG_AC0DMAPTR, dwCurrDescAddr);
1222 if (BITbIsAllBitsOn(byOrgDMACtl, DMACTL_RUN)) {
1223 VNSvOutPortB(dwIoBase + MAC_REG_AC0DMACTL, DMACTL_RUN);
1229 void MACvSetCurrTXDescAddr (int iTxType, DWORD_PTR dwIoBase, DWORD dwCurrDescAddr)
1231 if(iTxType == TYPE_AC0DMA){
1232 MACvSetCurrAC0DescAddrEx(dwIoBase, dwCurrDescAddr);
1233 }else if(iTxType == TYPE_TXDMA0){
1234 MACvSetCurrTx0DescAddrEx(dwIoBase, dwCurrDescAddr);
1240 * Micro Second Delay via MAC
1244 * dwIoBase - Base Address for MAC
1245 * uDelay - Delay time (timer resolution is 4 us)
1249 * Return Value: none
1252 VOID MACvTimer0MicroSDelay (DWORD_PTR dwIoBase, UINT uDelay)
1257 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, 0);
1258 VNSvOutPortD(dwIoBase + MAC_REG_TMDATA0, uDelay);
1259 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, (TMCTL_TMD | TMCTL_TE));
1260 for(ii=0;ii<66;ii++) { // assume max PCI clock is 66Mhz
1261 for (uu = 0; uu < uDelay; uu++) {
1262 VNSvInPortB(dwIoBase + MAC_REG_TMCTL0, &byValue);
1263 if ((byValue == 0) ||
1264 (BITbIsAllBitsOn(byValue, TMCTL_TSUSP))) {
1265 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, 0);
1270 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, 0);
1276 * Micro Second One shot timer via MAC
1280 * dwIoBase - Base Address for MAC
1281 * uDelay - Delay time
1285 * Return Value: none
1288 void MACvOneShotTimer0MicroSec (DWORD_PTR dwIoBase, UINT uDelayTime)
1290 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, 0);
1291 VNSvOutPortD(dwIoBase + MAC_REG_TMDATA0, uDelayTime);
1292 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, (TMCTL_TMD | TMCTL_TE));
1297 * Micro Second One shot timer via MAC
1301 * dwIoBase - Base Address for MAC
1302 * uDelay - Delay time
1306 * Return Value: none
1309 void MACvOneShotTimer1MicroSec (DWORD_PTR dwIoBase, UINT uDelayTime)
1311 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL1, 0);
1312 VNSvOutPortD(dwIoBase + MAC_REG_TMDATA1, uDelayTime);
1313 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL1, (TMCTL_TMD | TMCTL_TE));
1317 void MACvSetMISCFifo (DWORD_PTR dwIoBase, WORD wOffset, DWORD dwData)
1321 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
1322 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
1323 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1327 BOOL MACbTxDMAOff (DWORD_PTR dwIoBase, UINT idx)
1332 if (idx == TYPE_TXDMA0) {
1333 VNSvOutPortB(dwIoBase + MAC_REG_TXDMACTL0+2, DMACTL_RUN);
1334 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1335 VNSvInPortB(dwIoBase + MAC_REG_TXDMACTL0, &byData);
1336 if (BITbIsAllBitsOff(byData, DMACTL_RUN))
1339 } else if (idx == TYPE_AC0DMA) {
1340 VNSvOutPortB(dwIoBase + MAC_REG_AC0DMACTL+2, DMACTL_RUN);
1341 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1342 VNSvInPortB(dwIoBase + MAC_REG_AC0DMACTL, &byData);
1343 if (BITbIsAllBitsOff(byData, DMACTL_RUN))
1347 if (ww == W_MAX_TIMEOUT) {
1349 DEVICE_PRT(MSG_LEVEL_DEBUG, KERN_INFO" DBG_PORT80(0x29)\n");
1355 void MACvClearBusSusInd (DWORD_PTR dwIoBase)
1359 // check if BcnSusInd enabled
1360 VNSvInPortD(dwIoBase + MAC_REG_ENCFG , &dwOrgValue);
1361 if(BITbIsBitOff(dwOrgValue, EnCFG_BcnSusInd))
1364 dwOrgValue = dwOrgValue | EnCFG_BcnSusClr;
1365 VNSvOutPortD(dwIoBase + MAC_REG_ENCFG, dwOrgValue);
1366 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1367 VNSvInPortD(dwIoBase + MAC_REG_ENCFG , &dwOrgValue);
1368 if(BITbIsBitOff(dwOrgValue, EnCFG_BcnSusInd))
1371 if (ww == W_MAX_TIMEOUT) {
1373 DEVICE_PRT(MSG_LEVEL_DEBUG, KERN_INFO" DBG_PORT80(0x33)\n");
1377 void MACvEnableBusSusEn (DWORD_PTR dwIoBase)
1382 // check if BcnSusInd enabled
1383 VNSvInPortB(dwIoBase + MAC_REG_CFG , &byOrgValue);
1386 byOrgValue = byOrgValue | CFG_BCNSUSEN;
1387 VNSvOutPortB(dwIoBase + MAC_REG_ENCFG, byOrgValue);
1388 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1389 VNSvInPortD(dwIoBase + MAC_REG_ENCFG , &dwOrgValue);
1390 if(BITbIsBitOn(dwOrgValue, EnCFG_BcnSusInd))
1393 if (ww == W_MAX_TIMEOUT) {
1395 DEVICE_PRT(MSG_LEVEL_DEBUG, KERN_INFO" DBG_PORT80(0x34)\n");
1399 BOOL MACbFlushSYNCFifo (DWORD_PTR dwIoBase)
1404 VNSvInPortB(dwIoBase + MAC_REG_MACCR , &byOrgValue);
1407 byOrgValue = byOrgValue | MACCR_SYNCFLUSH;
1408 VNSvOutPortB(dwIoBase + MAC_REG_MACCR, byOrgValue);
1410 // Check if SyncFlushOK
1411 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1412 VNSvInPortB(dwIoBase + MAC_REG_MACCR , &byOrgValue);
1413 if(BITbIsBitOn(byOrgValue, MACCR_SYNCFLUSHOK))
1416 if (ww == W_MAX_TIMEOUT) {
1418 DEVICE_PRT(MSG_LEVEL_DEBUG, KERN_INFO" DBG_PORT80(0x33)\n");
1423 BOOL MACbPSWakeup (DWORD_PTR dwIoBase)
1428 if (MACbIsRegBitsOff(dwIoBase, MAC_REG_PSCTL, PSCTL_PS)) {
1432 MACvRegBitsOff(dwIoBase, MAC_REG_PSCTL, PSCTL_PSEN);
1434 // Check if SyncFlushOK
1435 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1436 VNSvInPortB(dwIoBase + MAC_REG_PSCTL , &byOrgValue);
1437 if(BITbIsBitOn(byOrgValue, PSCTL_WAKEDONE))
1440 if (ww == W_MAX_TIMEOUT) {
1442 DEVICE_PRT(MSG_LEVEL_DEBUG, KERN_INFO" DBG_PORT80(0x33)\n");
1450 * Set the Key by MISCFIFO
1454 * dwIoBase - Base Address for MAC
1459 * Return Value: none
1463 void MACvSetKeyEntry (DWORD_PTR dwIoBase, WORD wKeyCtl, UINT uEntryIdx, UINT uKeyIdx, PBYTE pbyAddr, PDWORD pdwKey, BYTE byLocalID)
1473 DEVICE_PRT(MSG_LEVEL_DEBUG, KERN_INFO"MACvSetKeyEntry\n");
1474 wOffset = MISCFIFO_KEYETRY0;
1475 wOffset += (uEntryIdx * MISCFIFO_KEYENTRYSIZE);
1480 dwData |= MAKEWORD(*(pbyAddr+4), *(pbyAddr+5));
1481 DEVICE_PRT(MSG_LEVEL_DEBUG, KERN_INFO"1. wOffset: %d, Data: %lX, KeyCtl:%X\n", wOffset, dwData, wKeyCtl);
1483 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
1484 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
1485 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1489 dwData |= *(pbyAddr+3);
1491 dwData |= *(pbyAddr+2);
1493 dwData |= *(pbyAddr+1);
1495 dwData |= *(pbyAddr+0);
1496 DEVICE_PRT(MSG_LEVEL_DEBUG, KERN_INFO"2. wOffset: %d, Data: %lX\n", wOffset, dwData);
1498 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
1499 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
1500 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1503 wOffset += (uKeyIdx * 4);
1504 for (ii=0;ii<4;ii++) {
1505 // alway push 128 bits
1506 DEVICE_PRT(MSG_LEVEL_DEBUG, KERN_INFO"3.(%d) wOffset: %d, Data: %lX\n", ii, wOffset+ii, *pdwKey);
1507 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset+ii);
1508 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, *pdwKey++);
1509 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1517 * Disable the Key Entry by MISCFIFO
1521 * dwIoBase - Base Address for MAC
1526 * Return Value: none
1529 void MACvDisableKeyEntry (DWORD_PTR dwIoBase, UINT uEntryIdx)
1533 wOffset = MISCFIFO_KEYETRY0;
1534 wOffset += (uEntryIdx * MISCFIFO_KEYENTRYSIZE);
1536 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
1537 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, 0);
1538 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1544 * Set the default Key (KeyEntry[10]) by MISCFIFO
1548 * dwIoBase - Base Address for MAC
1553 * Return Value: none
1557 void MACvSetDefaultKeyEntry (DWORD_PTR dwIoBase, UINT uKeyLen, UINT uKeyIdx, PDWORD pdwKey, BYTE byLocalID)
1566 DEVICE_PRT(MSG_LEVEL_DEBUG, KERN_INFO"MACvSetDefaultKeyEntry\n");
1567 wOffset = MISCFIFO_KEYETRY0;
1568 wOffset += (10 * MISCFIFO_KEYENTRYSIZE);
1572 wOffset += (uKeyIdx * 4);
1573 // alway push 128 bits
1574 for (ii=0; ii<3; ii++) {
1575 DEVICE_PRT(MSG_LEVEL_DEBUG, KERN_INFO"(%d) wOffset: %d, Data: %lX\n", ii, wOffset+ii, *pdwKey);
1576 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset+ii);
1577 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, *pdwKey++);
1578 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1581 if (uKeyLen == WLAN_WEP104_KEYLEN) {
1582 dwData |= 0x80000000;
1584 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset+3);
1585 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
1586 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1587 DEVICE_PRT(MSG_LEVEL_DEBUG, KERN_INFO"End. wOffset: %d, Data: %lX\n", wOffset+3, dwData);
1594 * Enable default Key (KeyEntry[10]) by MISCFIFO
1598 * dwIoBase - Base Address for MAC
1603 * Return Value: none
1607 void MACvEnableDefaultKey (DWORD_PTR dwIoBase, BYTE byLocalID)
1616 wOffset = MISCFIFO_KEYETRY0;
1617 wOffset += (10 * MISCFIFO_KEYENTRYSIZE);
1619 dwData = 0xC0440000;
1620 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
1621 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
1622 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1623 DEVICE_PRT(MSG_LEVEL_DEBUG, KERN_INFO"MACvEnableDefaultKey: wOffset: %d, Data: %lX\n", wOffset, dwData);
1630 * Disable default Key (KeyEntry[10]) by MISCFIFO
1634 * dwIoBase - Base Address for MAC
1639 * Return Value: none
1642 void MACvDisableDefaultKey (DWORD_PTR dwIoBase)
1648 wOffset = MISCFIFO_KEYETRY0;
1649 wOffset += (10 * MISCFIFO_KEYENTRYSIZE);
1652 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
1653 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
1654 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1655 DEVICE_PRT(MSG_LEVEL_DEBUG, KERN_INFO"MACvDisableDefaultKey: wOffset: %d, Data: %lX\n", wOffset, dwData);
1660 * Set the default TKIP Group Key (KeyEntry[10]) by MISCFIFO
1664 * dwIoBase - Base Address for MAC
1669 * Return Value: none
1672 void MACvSetDefaultTKIPKeyEntry (DWORD_PTR dwIoBase, UINT uKeyLen, UINT uKeyIdx, PDWORD pdwKey, BYTE byLocalID)
1682 DEVICE_PRT(MSG_LEVEL_DEBUG, KERN_INFO"MACvSetDefaultTKIPKeyEntry\n");
1683 wOffset = MISCFIFO_KEYETRY0;
1684 // Kyle test : change offset from 10 -> 0
1685 wOffset += (10 * MISCFIFO_KEYENTRYSIZE);
1687 dwData = 0xC0660000;
1688 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
1689 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
1690 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1694 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
1695 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
1696 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1699 wOffset += (uKeyIdx * 4);
1700 DEVICE_PRT(MSG_LEVEL_DEBUG, KERN_INFO"1. wOffset: %d, Data: %lX, idx:%d\n", wOffset, *pdwKey, uKeyIdx);
1701 // alway push 128 bits
1702 for (ii=0; ii<4; ii++) {
1703 DEVICE_PRT(MSG_LEVEL_DEBUG, KERN_INFO"2.(%d) wOffset: %d, Data: %lX\n", ii, wOffset+ii, *pdwKey);
1704 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset+ii);
1705 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, *pdwKey++);
1706 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1715 * Set the Key Control by MISCFIFO
1719 * dwIoBase - Base Address for MAC
1724 * Return Value: none
1728 void MACvSetDefaultKeyCtl (DWORD_PTR dwIoBase, WORD wKeyCtl, UINT uEntryIdx, BYTE byLocalID)
1737 DEVICE_PRT(MSG_LEVEL_DEBUG, KERN_INFO"MACvSetKeyEntry\n");
1738 wOffset = MISCFIFO_KEYETRY0;
1739 wOffset += (uEntryIdx * MISCFIFO_KEYENTRYSIZE);
1745 DEVICE_PRT(MSG_LEVEL_DEBUG, KERN_INFO"1. wOffset: %d, Data: %lX, KeyCtl:%X\n", wOffset, dwData, wKeyCtl);
1747 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
1748 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
1749 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);