drivers/staging/rts5208/rtsx_card.c

   1 /* Driver for Realtek PCI-Express card reader
   2  *
   3  * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License as published by the
   7  * Free Software Foundation; either version 2, or (at your option) any
   8  * later version.
   9  *
  10  * This program is distributed in the hope that it will be useful, but
  11  * WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  13  * General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License along
  16  * with this program; if not, see <http://www.gnu.org/licenses/>.
  17  *
  18  * Author:
  19  *   Wei WANG (wei_wang@realsil.com.cn)
  20  *   Micky Ching (micky_ching@realsil.com.cn)
  21  */
  22
  23 #include <linux/blkdev.h>
  24 #include <linux/kthread.h>
  25 #include <linux/sched.h>
  26 #include <linux/workqueue.h>
  27 #include <linux/kernel.h>
  28
  29 #include "rtsx.h"
  30 #include "rtsx_transport.h"
  31 #include "rtsx_scsi.h"
  32 #include "rtsx_card.h"
  33
  34 #include "rtsx_sys.h"
  35 #include "general.h"
  36
  37 #include "sd.h"
  38 #include "xd.h"
  39 #include "ms.h"
  40
  41 void do_remaining_work(struct rtsx_chip *chip)
  42 {
  43         struct sd_info *sd_card = &(chip->sd_card);
  44 #ifdef XD_DELAY_WRITE
  45         struct xd_info *xd_card = &(chip->xd_card);
  46 #endif
  47         struct ms_info *ms_card = &(chip->ms_card);
  48
  49         if (chip->card_ready & SD_CARD) {
  50                 if (sd_card->seq_mode) {
  51                         rtsx_set_stat(chip, RTSX_STAT_RUN);
  52                         sd_card->cleanup_counter++;
  53                 } else {
  54                         sd_card->cleanup_counter = 0;
  55                 }
  56         }
  57
  58 #ifdef XD_DELAY_WRITE
  59         if (chip->card_ready & XD_CARD) {
  60                 if (xd_card->delay_write.delay_write_flag) {
  61                         rtsx_set_stat(chip, RTSX_STAT_RUN);
  62                         xd_card->cleanup_counter++;
  63                 } else {
  64                         xd_card->cleanup_counter = 0;
  65                 }
  66         }
  67 #endif
  68
  69         if (chip->card_ready & MS_CARD) {
  70                 if (CHK_MSPRO(ms_card)) {
  71                         if (ms_card->seq_mode) {
  72                                 rtsx_set_stat(chip, RTSX_STAT_RUN);
  73                                 ms_card->cleanup_counter++;
  74                         } else {
  75                                 ms_card->cleanup_counter = 0;
  76                         }
  77                 } else {
  78 #ifdef MS_DELAY_WRITE
  79                         if (ms_card->delay_write.delay_write_flag) {
  80                                 rtsx_set_stat(chip, RTSX_STAT_RUN);
  81                                 ms_card->cleanup_counter++;
  82                         } else {
  83                                 ms_card->cleanup_counter = 0;
  84                         }
  85 #endif
  86                 }
  87         }
  88
  89         if (sd_card->cleanup_counter > POLLING_WAIT_CNT)
  90                 sd_cleanup_work(chip);
  91
  92         if (xd_card->cleanup_counter > POLLING_WAIT_CNT)
  93                 xd_cleanup_work(chip);
  94
  95         if (ms_card->cleanup_counter > POLLING_WAIT_CNT)
  96                 ms_cleanup_work(chip);
  97 }
  98
  99 void try_to_switch_sdio_ctrl(struct rtsx_chip *chip)
 100 {
 101         u8 reg1 = 0, reg2 = 0;
 102
 103         rtsx_read_register(chip, 0xFF34, &reg1);
 104         rtsx_read_register(chip, 0xFF38, &reg2);
 105         dev_dbg(rtsx_dev(chip), "reg 0xFF34: 0x%x, reg 0xFF38: 0x%x\n",
 106                 reg1, reg2);
 107         if ((reg1 & 0xC0) && (reg2 & 0xC0)) {
 108                 chip->sd_int = 1;
 109                 rtsx_write_register(chip, SDIO_CTRL, 0xFF,
 110                                 SDIO_BUS_CTRL | SDIO_CD_CTRL);
 111                 rtsx_write_register(chip, PWR_GATE_CTRL,
 112                                 LDO3318_PWR_MASK, LDO_ON);
 113         }
 114 }
 115
 116 #ifdef SUPPORT_SDIO_ASPM
 117 void dynamic_configure_sdio_aspm(struct rtsx_chip *chip)
 118 {
 119         u8 buf[12], reg;
 120         int i;
 121
 122         for (i = 0; i < 12; i++)
 123                 rtsx_read_register(chip, 0xFF08 + i, &buf[i]);
 124         rtsx_read_register(chip, 0xFF25, &reg);
 125         if ((memcmp(buf, chip->sdio_raw_data, 12) != 0) || (reg & 0x03)) {
 126                 chip->sdio_counter = 0;
 127                 chip->sdio_idle = 0;
 128         } else {
 129                 if (!chip->sdio_idle) {
 130                         chip->sdio_counter++;
 131                         if (chip->sdio_counter >= SDIO_IDLE_COUNT) {
 132                                 chip->sdio_counter = 0;
 133                                 chip->sdio_idle = 1;
 134                         }
 135                 }
 136         }
 137         memcpy(chip->sdio_raw_data, buf, 12);
 138
 139         if (chip->sdio_idle) {
 140                 if (!chip->sdio_aspm) {
 141                         dev_dbg(rtsx_dev(chip), "SDIO enter ASPM!\n");
 142                         rtsx_write_register(chip, ASPM_FORCE_CTL, 0xFC,
 143                                         0x30 | (chip->aspm_level[1] << 2));
 144                         chip->sdio_aspm = 1;
 145                 }
 146         } else {
 147                 if (chip->sdio_aspm) {
 148                         dev_dbg(rtsx_dev(chip), "SDIO exit ASPM!\n");
 149                         rtsx_write_register(chip, ASPM_FORCE_CTL, 0xFC, 0x30);
 150                         chip->sdio_aspm = 0;
 151                 }
 152         }
 153 }
 154 #endif
 155
 156 void do_reset_sd_card(struct rtsx_chip *chip)
 157 {
 158         int retval;
 159
 160         dev_dbg(rtsx_dev(chip), "%s: %d, card2lun = 0x%x\n", __func__,
 161                 chip->sd_reset_counter, chip->card2lun[SD_CARD]);
 162
 163         if (chip->card2lun[SD_CARD] >= MAX_ALLOWED_LUN_CNT) {
 164                 clear_bit(SD_NR, &(chip->need_reset));
 165                 chip->sd_reset_counter = 0;
 166                 chip->sd_show_cnt = 0;
 167                 return;
 168         }
 169
 170         chip->rw_fail_cnt[chip->card2lun[SD_CARD]] = 0;
 171
 172         rtsx_set_stat(chip, RTSX_STAT_RUN);
 173         rtsx_write_register(chip, SDIO_CTRL, 0xFF, 0);
 174
 175         retval = reset_sd_card(chip);
 176         if (chip->need_release & SD_CARD)
 177                 return;
 178         if (retval == STATUS_SUCCESS) {
 179                 clear_bit(SD_NR, &(chip->need_reset));
 180                 chip->sd_reset_counter = 0;
 181                 chip->sd_show_cnt = 0;
 182                 chip->card_ready |= SD_CARD;
 183                 chip->card_fail &= ~SD_CARD;
 184                 chip->rw_card[chip->card2lun[SD_CARD]] = sd_rw;
 185         } else {
 186                 if (chip->sd_io || (chip->sd_reset_counter >= MAX_RESET_CNT)) {
 187                         clear_bit(SD_NR, &(chip->need_reset));
 188                         chip->sd_reset_counter = 0;
 189                         chip->sd_show_cnt = 0;
 190                 } else {
 191                         chip->sd_reset_counter++;
 192                 }
 193                 chip->card_ready &= ~SD_CARD;
 194                 chip->card_fail |= SD_CARD;
 195                 chip->capacity[chip->card2lun[SD_CARD]] = 0;
 196                 chip->rw_card[chip->card2lun[SD_CARD]] = NULL;
 197
 198                 rtsx_write_register(chip, CARD_OE, SD_OUTPUT_EN, 0);
 199                 if (!chip->ft2_fast_mode)
 200                         card_power_off(chip, SD_CARD);
 201                 if (chip->sd_io) {
 202                         chip->sd_int = 0;
 203                         try_to_switch_sdio_ctrl(chip);
 204                 } else {
 205                         disable_card_clock(chip, SD_CARD);
 206                 }
 207         }
 208 }
 209
 210 void do_reset_xd_card(struct rtsx_chip *chip)
 211 {
 212         int retval;
 213
 214         dev_dbg(rtsx_dev(chip), "%s: %d, card2lun = 0x%x\n", __func__,
 215                 chip->xd_reset_counter, chip->card2lun[XD_CARD]);
 216
 217         if (chip->card2lun[XD_CARD] >= MAX_ALLOWED_LUN_CNT) {
 218                 clear_bit(XD_NR, &(chip->need_reset));
 219                 chip->xd_reset_counter = 0;
 220                 chip->xd_show_cnt = 0;
 221                 return;
 222         }
 223
 224         chip->rw_fail_cnt[chip->card2lun[XD_CARD]] = 0;
 225
 226         rtsx_set_stat(chip, RTSX_STAT_RUN);
 227         rtsx_write_register(chip, SDIO_CTRL, 0xFF, 0);
 228
 229         retval = reset_xd_card(chip);
 230         if (chip->need_release & XD_CARD)
 231                 return;
 232         if (retval == STATUS_SUCCESS) {
 233                 clear_bit(XD_NR, &(chip->need_reset));
 234                 chip->xd_reset_counter = 0;
 235                 chip->card_ready |= XD_CARD;
 236                 chip->card_fail &= ~XD_CARD;
 237                 chip->rw_card[chip->card2lun[XD_CARD]] = xd_rw;
 238         } else {
 239                 if (chip->xd_reset_counter >= MAX_RESET_CNT) {
 240                         clear_bit(XD_NR, &(chip->need_reset));
 241                         chip->xd_reset_counter = 0;
 242                         chip->xd_show_cnt = 0;
 243                 } else {
 244                         chip->xd_reset_counter++;
 245                 }
 246                 chip->card_ready &= ~XD_CARD;
 247                 chip->card_fail |= XD_CARD;
 248                 chip->capacity[chip->card2lun[XD_CARD]] = 0;
 249                 chip->rw_card[chip->card2lun[XD_CARD]] = NULL;
 250
 251                 rtsx_write_register(chip, CARD_OE, XD_OUTPUT_EN, 0);
 252                 if (!chip->ft2_fast_mode)
 253                         card_power_off(chip, XD_CARD);
 254                 disable_card_clock(chip, XD_CARD);
 255         }
 256 }
 257
 258 void do_reset_ms_card(struct rtsx_chip *chip)
 259 {
 260         int retval;
 261
 262         dev_dbg(rtsx_dev(chip), "%s: %d, card2lun = 0x%x\n", __func__,
 263                 chip->ms_reset_counter, chip->card2lun[MS_CARD]);
 264
 265         if (chip->card2lun[MS_CARD] >= MAX_ALLOWED_LUN_CNT) {
 266                 clear_bit(MS_NR, &(chip->need_reset));
 267                 chip->ms_reset_counter = 0;
 268                 chip->ms_show_cnt = 0;
 269                 return;
 270         }
 271
 272         chip->rw_fail_cnt[chip->card2lun[MS_CARD]] = 0;
 273
 274         rtsx_set_stat(chip, RTSX_STAT_RUN);
 275         rtsx_write_register(chip, SDIO_CTRL, 0xFF, 0);
 276
 277         retval = reset_ms_card(chip);
 278         if (chip->need_release & MS_CARD)
 279                 return;
 280         if (retval == STATUS_SUCCESS) {
 281                 clear_bit(MS_NR, &(chip->need_reset));
 282                 chip->ms_reset_counter = 0;
 283                 chip->card_ready |= MS_CARD;
 284                 chip->card_fail &= ~MS_CARD;
 285                 chip->rw_card[chip->card2lun[MS_CARD]] = ms_rw;
 286         } else {
 287                 if (chip->ms_reset_counter >= MAX_RESET_CNT) {
 288                         clear_bit(MS_NR, &(chip->need_reset));
 289                         chip->ms_reset_counter = 0;
 290                         chip->ms_show_cnt = 0;
 291                 } else {
 292                         chip->ms_reset_counter++;
 293                 }
 294                 chip->card_ready &= ~MS_CARD;
 295                 chip->card_fail |= MS_CARD;
 296                 chip->capacity[chip->card2lun[MS_CARD]] = 0;
 297                 chip->rw_card[chip->card2lun[MS_CARD]] = NULL;
 298
 299                 rtsx_write_register(chip, CARD_OE, MS_OUTPUT_EN, 0);
 300                 if (!chip->ft2_fast_mode)
 301                         card_power_off(chip, MS_CARD);
 302                 disable_card_clock(chip, MS_CARD);
 303         }
 304 }
 305
 306 static void release_sdio(struct rtsx_chip *chip)
 307 {
 308         if (chip->sd_io) {
 309                 rtsx_write_register(chip, CARD_STOP, SD_STOP | SD_CLR_ERR,
 310                                 SD_STOP | SD_CLR_ERR);
 311
 312                 if (chip->chip_insert_with_sdio) {
 313                         chip->chip_insert_with_sdio = 0;
 314
 315                         if (CHECK_PID(chip, 0x5288))
 316                                 rtsx_write_register(chip, 0xFE5A, 0x08, 0x00);
 317                         else
 318                                 rtsx_write_register(chip, 0xFE70, 0x80, 0x00);
 319                 }
 320
 321                 rtsx_write_register(chip, SDIO_CTRL, SDIO_CD_CTRL, 0);
 322                 chip->sd_io = 0;
 323         }
 324 }
 325
 326 void rtsx_power_off_card(struct rtsx_chip *chip)
 327 {
 328         if ((chip->card_ready & SD_CARD) || chip->sd_io) {
 329                 sd_cleanup_work(chip);
 330                 sd_power_off_card3v3(chip);
 331         }
 332
 333         if (chip->card_ready & XD_CARD) {
 334                 xd_cleanup_work(chip);
 335                 xd_power_off_card3v3(chip);
 336         }
 337
 338         if (chip->card_ready & MS_CARD) {
 339                 ms_cleanup_work(chip);
 340                 ms_power_off_card3v3(chip);
 341         }
 342 }
 343
 344 void rtsx_release_cards(struct rtsx_chip *chip)
 345 {
 346         chip->int_reg = rtsx_readl(chip, RTSX_BIPR);
 347
 348         if ((chip->card_ready & SD_CARD) || chip->sd_io) {
 349                 if (chip->int_reg & SD_EXIST)
 350                         sd_cleanup_work(chip);
 351                 release_sd_card(chip);
 352         }
 353
 354         if (chip->card_ready & XD_CARD) {
 355                 if (chip->int_reg & XD_EXIST)
 356                         xd_cleanup_work(chip);
 357                 release_xd_card(chip);
 358         }
 359
 360         if (chip->card_ready & MS_CARD) {
 361                 if (chip->int_reg & MS_EXIST)
 362                         ms_cleanup_work(chip);
 363                 release_ms_card(chip);
 364         }
 365 }
 366
 367 void rtsx_reset_cards(struct rtsx_chip *chip)
 368 {
 369         if (!chip->need_reset)
 370                 return;
 371
 372         rtsx_set_stat(chip, RTSX_STAT_RUN);
 373
 374         rtsx_force_power_on(chip, SSC_PDCTL | OC_PDCTL);
 375
 376         rtsx_disable_aspm(chip);
 377
 378         if ((chip->need_reset & SD_CARD) && chip->chip_insert_with_sdio)
 379                 clear_bit(SD_NR, &(chip->need_reset));
 380
 381         if (chip->need_reset & XD_CARD) {
 382                 chip->card_exist |= XD_CARD;
 383
 384                 if (chip->xd_show_cnt >= MAX_SHOW_CNT)
 385                         do_reset_xd_card(chip);
 386                 else
 387                         chip->xd_show_cnt++;
 388         }
 389         if (CHECK_PID(chip, 0x5288) && CHECK_BARO_PKG(chip, QFN)) {
 390                 if (chip->card_exist & XD_CARD) {
 391                         clear_bit(SD_NR, &(chip->need_reset));
 392                         clear_bit(MS_NR, &(chip->need_reset));
 393                 }
 394         }
 395         if (chip->need_reset & SD_CARD) {
 396                 chip->card_exist |= SD_CARD;
 397
 398                 if (chip->sd_show_cnt >= MAX_SHOW_CNT) {
 399                         rtsx_write_register(chip, RBCTL, RB_FLUSH, RB_FLUSH);
 400                         do_reset_sd_card(chip);
 401                 } else {
 402                         chip->sd_show_cnt++;
 403                 }
 404         }
 405         if (chip->need_reset & MS_CARD) {
 406                 chip->card_exist |= MS_CARD;
 407
 408                 if (chip->ms_show_cnt >= MAX_SHOW_CNT)
 409                         do_reset_ms_card(chip);
 410                 else
 411                         chip->ms_show_cnt++;
 412         }
 413 }
 414
 415 void rtsx_reinit_cards(struct rtsx_chip *chip, int reset_chip)
 416 {
 417         rtsx_set_stat(chip, RTSX_STAT_RUN);
 418
 419         rtsx_force_power_on(chip, SSC_PDCTL | OC_PDCTL);
 420
 421         if (reset_chip)
 422                 rtsx_reset_chip(chip);
 423
 424         chip->int_reg = rtsx_readl(chip, RTSX_BIPR);
 425
 426         if ((chip->int_reg & SD_EXIST) && (chip->need_reinit & SD_CARD)) {
 427                 release_sdio(chip);
 428                 release_sd_card(chip);
 429
 430                 wait_timeout(100);
 431
 432                 chip->card_exist |= SD_CARD;
 433                 do_reset_sd_card(chip);
 434         }
 435
 436         if ((chip->int_reg & XD_EXIST) && (chip->need_reinit & XD_CARD)) {
 437                 release_xd_card(chip);
 438
 439                 wait_timeout(100);
 440
 441                 chip->card_exist |= XD_CARD;
 442                 do_reset_xd_card(chip);
 443         }
 444
 445         if ((chip->int_reg & MS_EXIST) && (chip->need_reinit & MS_CARD)) {
 446                 release_ms_card(chip);
 447
 448                 wait_timeout(100);
 449
 450                 chip->card_exist |= MS_CARD;
 451                 do_reset_ms_card(chip);
 452         }
 453
 454         chip->need_reinit = 0;
 455 }
 456
 457 #ifdef DISABLE_CARD_INT
 458 void card_cd_debounce(struct rtsx_chip *chip, unsigned long *need_reset,
 459                 unsigned long *need_release)
 460 {
 461         u8 release_map = 0, reset_map = 0;
 462
 463         chip->int_reg = rtsx_readl(chip, RTSX_BIPR);
 464
 465         if (chip->card_exist) {
 466                 if (chip->card_exist & XD_CARD) {
 467                         if (!(chip->int_reg & XD_EXIST))
 468                                 release_map |= XD_CARD;
 469                 } else if (chip->card_exist & SD_CARD) {
 470                         if (!(chip->int_reg & SD_EXIST))
 471                                 release_map |= SD_CARD;
 472                 } else if (chip->card_exist & MS_CARD) {
 473                         if (!(chip->int_reg & MS_EXIST))
 474                                 release_map |= MS_CARD;
 475                 }
 476         } else {
 477                 if (chip->int_reg & XD_EXIST)
 478                         reset_map |= XD_CARD;
 479                 else if (chip->int_reg & SD_EXIST)
 480                         reset_map |= SD_CARD;
 481                 else if (chip->int_reg & MS_EXIST)
 482                         reset_map |= MS_CARD;
 483         }
 484
 485         if (reset_map) {
 486                 int xd_cnt = 0, sd_cnt = 0, ms_cnt = 0;
 487                 int i;
 488
 489                 for (i = 0; i < (DEBOUNCE_CNT); i++) {
 490                         chip->int_reg = rtsx_readl(chip, RTSX_BIPR);
 491
 492                         if (chip->int_reg & XD_EXIST)
 493                                 xd_cnt++;
 494                         else
 495                                 xd_cnt = 0;
 496
 497                         if (chip->int_reg & SD_EXIST)
 498                                 sd_cnt++;
 499                         else
 500                                 sd_cnt = 0;
 501
 502                         if (chip->int_reg & MS_EXIST)
 503                                 ms_cnt++;
 504                         else
 505                                 ms_cnt = 0;
 506
 507                         wait_timeout(30);
 508                 }
 509
 510                 reset_map = 0;
 511                 if (!(chip->card_exist & XD_CARD) &&
 512                                 (xd_cnt > (DEBOUNCE_CNT-1)))
 513                         reset_map |= XD_CARD;
 514                 if (!(chip->card_exist & SD_CARD) &&
 515                                 (sd_cnt > (DEBOUNCE_CNT-1)))
 516                         reset_map |= SD_CARD;
 517                 if (!(chip->card_exist & MS_CARD) &&
 518                                 (ms_cnt > (DEBOUNCE_CNT-1)))
 519                         reset_map |= MS_CARD;
 520         }
 521
 522         if (CHECK_PID(chip, 0x5288) && CHECK_BARO_PKG(chip, QFN))
 523                 rtsx_write_register(chip, HOST_SLEEP_STATE, 0xC0, 0x00);
 524
 525         if (need_reset)
 526                 *need_reset = reset_map;
 527         if (need_release)
 528                 *need_release = release_map;
 529 }
 530 #endif
 531
 532 void rtsx_init_cards(struct rtsx_chip *chip)
 533 {
 534         if (RTSX_TST_DELINK(chip) && (rtsx_get_stat(chip) != RTSX_STAT_SS)) {
 535                 dev_dbg(rtsx_dev(chip), "Reset chip in polling thread!\n");
 536                 rtsx_reset_chip(chip);
 537                 RTSX_CLR_DELINK(chip);
 538         }
 539
 540 #ifdef DISABLE_CARD_INT
 541         card_cd_debounce(chip, &(chip->need_reset), &(chip->need_release));
 542 #endif
 543
 544         if (chip->need_release) {
 545                 if (CHECK_PID(chip, 0x5288) && CHECK_BARO_PKG(chip, QFN)) {
 546                         if (chip->int_reg & XD_EXIST) {
 547                                 clear_bit(SD_NR, &(chip->need_release));
 548                                 clear_bit(MS_NR, &(chip->need_release));
 549                         }
 550                 }
 551
 552                 if (!(chip->card_exist & SD_CARD) && !chip->sd_io)
 553                         clear_bit(SD_NR, &(chip->need_release));
 554                 if (!(chip->card_exist & XD_CARD))
 555                         clear_bit(XD_NR, &(chip->need_release));
 556                 if (!(chip->card_exist & MS_CARD))
 557                         clear_bit(MS_NR, &(chip->need_release));
 558
 559                 dev_dbg(rtsx_dev(chip), "chip->need_release = 0x%x\n",
 560                         (unsigned int)(chip->need_release));
 561
 562 #ifdef SUPPORT_OCP
 563                 if (chip->need_release) {
 564                         if (chip->ocp_stat & (CARD_OC_NOW | CARD_OC_EVER))
 565                                 rtsx_write_register(chip, OCPCLR,
 566                                                 CARD_OC_INT_CLR | CARD_OC_CLR,
 567                                                 CARD_OC_INT_CLR | CARD_OC_CLR);
 568                         chip->ocp_stat = 0;
 569                 }
 570 #endif
 571                 if (chip->need_release) {
 572                         rtsx_set_stat(chip, RTSX_STAT_RUN);
 573                         rtsx_force_power_on(chip, SSC_PDCTL | OC_PDCTL);
 574                 }
 575
 576                 if (chip->need_release & SD_CARD) {
 577                         clear_bit(SD_NR, &(chip->need_release));
 578                         chip->card_exist &= ~SD_CARD;
 579                         chip->card_ejected &= ~SD_CARD;
 580                         chip->card_fail &= ~SD_CARD;
 581                         CLR_BIT(chip->lun_mc, chip->card2lun[SD_CARD]);
 582                         chip->rw_fail_cnt[chip->card2lun[SD_CARD]] = 0;
 583                         rtsx_write_register(chip, RBCTL, RB_FLUSH, RB_FLUSH);
 584
 585                         release_sdio(chip);
 586                         release_sd_card(chip);
 587                 }
 588
 589                 if (chip->need_release & XD_CARD) {
 590                         clear_bit(XD_NR, &(chip->need_release));
 591                         chip->card_exist &= ~XD_CARD;
 592                         chip->card_ejected &= ~XD_CARD;
 593                         chip->card_fail &= ~XD_CARD;
 594                         CLR_BIT(chip->lun_mc, chip->card2lun[XD_CARD]);
 595                         chip->rw_fail_cnt[chip->card2lun[XD_CARD]] = 0;
 596
 597                         release_xd_card(chip);
 598
 599                         if (CHECK_PID(chip, 0x5288) &&
 600                                         CHECK_BARO_PKG(chip, QFN))
 601                                 rtsx_write_register(chip, HOST_SLEEP_STATE,
 602                                                 0xC0, 0xC0);
 603                 }
 604
 605                 if (chip->need_release & MS_CARD) {
 606                         clear_bit(MS_NR, &(chip->need_release));
 607                         chip->card_exist &= ~MS_CARD;
 608                         chip->card_ejected &= ~MS_CARD;
 609                         chip->card_fail &= ~MS_CARD;
 610                         CLR_BIT(chip->lun_mc, chip->card2lun[MS_CARD]);
 611                         chip->rw_fail_cnt[chip->card2lun[MS_CARD]] = 0;
 612
 613                         release_ms_card(chip);
 614                 }
 615
 616                 dev_dbg(rtsx_dev(chip), "chip->card_exist = 0x%x\n",
 617                         chip->card_exist);
 618
 619                 if (!chip->card_exist)
 620                         turn_off_led(chip, LED_GPIO);
 621         }
 622
 623         if (chip->need_reset) {
 624                 dev_dbg(rtsx_dev(chip), "chip->need_reset = 0x%x\n",
 625                         (unsigned int)(chip->need_reset));
 626
 627                 rtsx_reset_cards(chip);
 628         }
 629
 630         if (chip->need_reinit) {
 631                 dev_dbg(rtsx_dev(chip), "chip->need_reinit = 0x%x\n",
 632                         (unsigned int)(chip->need_reinit));
 633
 634                 rtsx_reinit_cards(chip, 0);
 635         }
 636 }
 637
 638 static inline u8 double_depth(u8 depth)
 639 {
 640         return (depth > 1) ? (depth - 1) : depth;
 641 }
 642
 643 int switch_ssc_clock(struct rtsx_chip *chip, int clk)
 644 {
 645         int retval;
 646         u8 N = (u8)(clk - 2), min_N, max_N;
 647         u8 mcu_cnt, div, max_div, ssc_depth, ssc_depth_mask;
 648         int sd_vpclk_phase_reset = 0;
 649
 650         if (chip->cur_clk == clk)
 651                 return STATUS_SUCCESS;
 652
 653         min_N = 60;
 654         max_N = 120;
 655         max_div = CLK_DIV_4;
 656
 657         dev_dbg(rtsx_dev(chip), "Switch SSC clock to %dMHz (cur_clk = %d)\n",
 658                 clk, chip->cur_clk);
 659
 660         if ((clk <= 2) || (N > max_N))
 661                 TRACE_RET(chip, STATUS_FAIL);
 662
 663         mcu_cnt = (u8)(125/clk + 3);
 664         if (mcu_cnt > 7)
 665                 mcu_cnt = 7;
 666
 667         div = CLK_DIV_1;
 668         while ((N < min_N) && (div < max_div)) {
 669                 N = (N + 2) * 2 - 2;
 670                 div++;
 671         }
 672         dev_dbg(rtsx_dev(chip), "N = %d, div = %d\n", N, div);
 673
 674         if (chip->ssc_en) {
 675                 ssc_depth = 0x01;
 676                 N -= 2;
 677         } else {
 678                 ssc_depth = 0;
 679         }
 680
 681         ssc_depth_mask = 0x03;
 682
 683         dev_dbg(rtsx_dev(chip), "ssc_depth = %d\n", ssc_depth);
 684
 685         rtsx_init_cmd(chip);
 686         rtsx_add_cmd(chip, WRITE_REG_CMD, CLK_CTL, CLK_LOW_FREQ, CLK_LOW_FREQ);
 687         rtsx_add_cmd(chip, WRITE_REG_CMD, CLK_DIV, 0xFF, (div << 4) | mcu_cnt);
 688         rtsx_add_cmd(chip, WRITE_REG_CMD, SSC_CTL1, SSC_RSTB, 0);
 689         rtsx_add_cmd(chip, WRITE_REG_CMD, SSC_CTL2, ssc_depth_mask, ssc_depth);
 690         rtsx_add_cmd(chip, WRITE_REG_CMD, SSC_DIV_N_0, 0xFF, N);
 691         rtsx_add_cmd(chip, WRITE_REG_CMD, SSC_CTL1, SSC_RSTB, SSC_RSTB);
 692         if (sd_vpclk_phase_reset) {
 693                 rtsx_add_cmd(chip, WRITE_REG_CMD, SD_VPCLK0_CTL,
 694                         PHASE_NOT_RESET, 0);
 695                 rtsx_add_cmd(chip, WRITE_REG_CMD, SD_VPCLK0_CTL,
 696                         PHASE_NOT_RESET, PHASE_NOT_RESET);
 697         }
 698
 699         retval = rtsx_send_cmd(chip, 0, WAIT_TIME);
 700         if (retval < 0)
 701                 TRACE_RET(chip, STATUS_ERROR);
 702
 703         udelay(10);
 704         RTSX_WRITE_REG(chip, CLK_CTL, CLK_LOW_FREQ, 0);
 705
 706         chip->cur_clk = clk;
 707
 708         return STATUS_SUCCESS;
 709 }
 710
 711 int switch_normal_clock(struct rtsx_chip *chip, int clk)
 712 {
 713         u8 sel, div, mcu_cnt;
 714         int sd_vpclk_phase_reset = 0;
 715
 716         if (chip->cur_clk == clk)
 717                 return STATUS_SUCCESS;
 718
 719         switch (clk) {
 720         case CLK_20:
 721                 dev_dbg(rtsx_dev(chip), "Switch clock to 20MHz\n");
 722                 sel = SSC_80;
 723                 div = CLK_DIV_4;
 724                 mcu_cnt = 7;
 725                 break;
 726
 727         case CLK_30:
 728                 dev_dbg(rtsx_dev(chip), "Switch clock to 30MHz\n");
 729                 sel = SSC_120;
 730                 div = CLK_DIV_4;
 731                 mcu_cnt = 7;
 732                 break;
 733
 734         case CLK_40:
 735                 dev_dbg(rtsx_dev(chip), "Switch clock to 40MHz\n");
 736                 sel = SSC_80;
 737                 div = CLK_DIV_2;
 738                 mcu_cnt = 7;
 739                 break;
 740
 741         case CLK_50:
 742                 dev_dbg(rtsx_dev(chip), "Switch clock to 50MHz\n");
 743                 sel = SSC_100;
 744                 div = CLK_DIV_2;
 745                 mcu_cnt = 6;
 746                 break;
 747
 748         case CLK_60:
 749                 dev_dbg(rtsx_dev(chip), "Switch clock to 60MHz\n");
 750                 sel = SSC_120;
 751                 div = CLK_DIV_2;
 752                 mcu_cnt = 6;
 753                 break;
 754
 755         case CLK_80:
 756                 dev_dbg(rtsx_dev(chip), "Switch clock to 80MHz\n");
 757                 sel = SSC_80;
 758                 div = CLK_DIV_1;
 759                 mcu_cnt = 5;
 760                 break;
 761
 762         case CLK_100:
 763                 dev_dbg(rtsx_dev(chip), "Switch clock to 100MHz\n");
 764                 sel = SSC_100;
 765                 div = CLK_DIV_1;
 766                 mcu_cnt = 5;
 767                 break;
 768
 769         case CLK_120:
 770                 dev_dbg(rtsx_dev(chip), "Switch clock to 120MHz\n");
 771                 sel = SSC_120;
 772                 div = CLK_DIV_1;
 773                 mcu_cnt = 5;
 774                 break;
 775
 776         case CLK_150:
 777                 dev_dbg(rtsx_dev(chip), "Switch clock to 150MHz\n");
 778                 sel = SSC_150;
 779                 div = CLK_DIV_1;
 780                 mcu_cnt = 4;
 781                 break;
 782
 783         case CLK_200:
 784                 dev_dbg(rtsx_dev(chip), "Switch clock to 200MHz\n");
 785                 sel = SSC_200;
 786                 div = CLK_DIV_1;
 787                 mcu_cnt = 4;
 788                 break;
 789
 790         default:
 791                 dev_dbg(rtsx_dev(chip), "Try to switch to an illegal clock (%d)\n",
 792                         clk);
 793                 TRACE_RET(chip, STATUS_FAIL);
 794         }
 795
 796         RTSX_WRITE_REG(chip, CLK_CTL, 0xFF, CLK_LOW_FREQ);
 797         if (sd_vpclk_phase_reset) {
 798                 RTSX_WRITE_REG(chip, SD_VPCLK0_CTL, PHASE_NOT_RESET, 0);
 799                 RTSX_WRITE_REG(chip, SD_VPCLK1_CTL, PHASE_NOT_RESET, 0);
 800         }
 801         RTSX_WRITE_REG(chip, CLK_DIV, 0xFF, (div << 4) | mcu_cnt);
 802         RTSX_WRITE_REG(chip, CLK_SEL, 0xFF, sel);
 803
 804         if (sd_vpclk_phase_reset) {
 805                 udelay(200);
 806                 RTSX_WRITE_REG(chip, SD_VPCLK0_CTL, PHASE_NOT_RESET,
 807                                 PHASE_NOT_RESET);
 808                 RTSX_WRITE_REG(chip, SD_VPCLK1_CTL, PHASE_NOT_RESET,
 809                                 PHASE_NOT_RESET);
 810                 udelay(200);
 811         }
 812         RTSX_WRITE_REG(chip, CLK_CTL, 0xFF, 0);
 813
 814         chip->cur_clk = clk;
 815
 816         return STATUS_SUCCESS;
 817 }
 818
 819 void trans_dma_enable(enum dma_data_direction dir, struct rtsx_chip *chip,
 820                 u32 byte_cnt, u8 pack_size)
 821 {
 822         if (pack_size > DMA_1024)
 823                 pack_size = DMA_512;
 824
 825         rtsx_add_cmd(chip, WRITE_REG_CMD, IRQSTAT0, DMA_DONE_INT, DMA_DONE_INT);
 826
 827         rtsx_add_cmd(chip, WRITE_REG_CMD, DMATC3, 0xFF, (u8)(byte_cnt >> 24));
 828         rtsx_add_cmd(chip, WRITE_REG_CMD, DMATC2, 0xFF, (u8)(byte_cnt >> 16));
 829         rtsx_add_cmd(chip, WRITE_REG_CMD, DMATC1, 0xFF, (u8)(byte_cnt >> 8));
 830         rtsx_add_cmd(chip, WRITE_REG_CMD, DMATC0, 0xFF, (u8)byte_cnt);
 831
 832         if (dir == DMA_FROM_DEVICE) {
 833                 rtsx_add_cmd(chip, WRITE_REG_CMD, DMACTL,
 834                         0x03 | DMA_PACK_SIZE_MASK,
 835                              DMA_DIR_FROM_CARD | DMA_EN | pack_size);
 836         } else {
 837                 rtsx_add_cmd(chip, WRITE_REG_CMD, DMACTL,
 838                         0x03 | DMA_PACK_SIZE_MASK,
 839                              DMA_DIR_TO_CARD | DMA_EN | pack_size);
 840         }
 841
 842         rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, RING_BUFFER);
 843 }
 844
 845 int enable_card_clock(struct rtsx_chip *chip, u8 card)
 846 {
 847         u8 clk_en = 0;
 848
 849         if (card & XD_CARD)
 850                 clk_en |= XD_CLK_EN;
 851         if (card & SD_CARD)
 852                 clk_en |= SD_CLK_EN;
 853         if (card & MS_CARD)
 854                 clk_en |= MS_CLK_EN;
 855
 856         RTSX_WRITE_REG(chip, CARD_CLK_EN, clk_en, clk_en);
 857
 858         return STATUS_SUCCESS;
 859 }
 860
 861 int disable_card_clock(struct rtsx_chip *chip, u8 card)
 862 {
 863         u8 clk_en = 0;
 864
 865         if (card & XD_CARD)
 866                 clk_en |= XD_CLK_EN;
 867         if (card & SD_CARD)
 868                 clk_en |= SD_CLK_EN;
 869         if (card & MS_CARD)
 870                 clk_en |= MS_CLK_EN;
 871
 872         RTSX_WRITE_REG(chip, CARD_CLK_EN, clk_en, 0);
 873
 874         return STATUS_SUCCESS;
 875 }
 876
 877 int card_power_on(struct rtsx_chip *chip, u8 card)
 878 {
 879         int retval;
 880         u8 mask, val1, val2;
 881
 882         if (CHECK_LUN_MODE(chip, SD_MS_2LUN) && (card == MS_CARD)) {
 883                 mask = MS_POWER_MASK;
 884                 val1 = MS_PARTIAL_POWER_ON;
 885                 val2 = MS_POWER_ON;
 886         } else {
 887                 mask = SD_POWER_MASK;
 888                 val1 = SD_PARTIAL_POWER_ON;
 889                 val2 = SD_POWER_ON;
 890         }
 891
 892         rtsx_init_cmd(chip);
 893         rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PWR_CTL, mask, val1);
 894
 895         retval = rtsx_send_cmd(chip, 0, 100);
 896         if (retval != STATUS_SUCCESS)
 897                 TRACE_RET(chip, STATUS_FAIL);
 898
 899         udelay(chip->pmos_pwr_on_interval);
 900
 901         rtsx_init_cmd(chip);
 902         rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PWR_CTL, mask, val2);
 903
 904         retval = rtsx_send_cmd(chip, 0, 100);
 905         if (retval != STATUS_SUCCESS)
 906                 TRACE_RET(chip, STATUS_FAIL);
 907
 908         return STATUS_SUCCESS;
 909 }
 910
 911 int card_power_off(struct rtsx_chip *chip, u8 card)
 912 {
 913         u8 mask, val;
 914
 915         if (CHECK_LUN_MODE(chip, SD_MS_2LUN) && (card == MS_CARD)) {
 916                 mask = MS_POWER_MASK;
 917                 val = MS_POWER_OFF;
 918         } else {
 919                 mask = SD_POWER_MASK;
 920                 val = SD_POWER_OFF;
 921         }
 922
 923         RTSX_WRITE_REG(chip, CARD_PWR_CTL, mask, val);
 924
 925         return STATUS_SUCCESS;
 926 }
 927
 928 int card_rw(struct scsi_cmnd *srb, struct rtsx_chip *chip,
 929         u32 sec_addr, u16 sec_cnt)
 930 {
 931         int retval;
 932         unsigned int lun = SCSI_LUN(srb);
 933         int i;
 934
 935         if (chip->rw_card[lun] == NULL)
 936                 TRACE_RET(chip, STATUS_FAIL);
 937
 938         for (i = 0; i < 3; i++) {
 939                 chip->rw_need_retry = 0;
 940
 941                 retval = chip->rw_card[lun](srb, chip, sec_addr, sec_cnt);
 942                 if (retval != STATUS_SUCCESS) {
 943                         if (rtsx_check_chip_exist(chip) != STATUS_SUCCESS) {
 944                                 rtsx_release_chip(chip);
 945                                 TRACE_RET(chip, STATUS_FAIL);
 946                         }
 947                         if (detect_card_cd(chip, chip->cur_card) !=
 948                                                         STATUS_SUCCESS)
 949                                 TRACE_RET(chip, STATUS_FAIL);
 950
 951                         if (!chip->rw_need_retry) {
 952                                 dev_dbg(rtsx_dev(chip), "RW fail, but no need to retry\n");
 953                                 break;
 954                         }
 955                 } else {
 956                         chip->rw_need_retry = 0;
 957                         break;
 958                 }
 959
 960                 dev_dbg(rtsx_dev(chip), "Retry RW, (i = %d)\n", i);
 961         }
 962
 963         return retval;
 964 }
 965
 966 int card_share_mode(struct rtsx_chip *chip, int card)
 967 {
 968         u8 mask, value;
 969
 970         if (CHECK_PID(chip, 0x5208)) {
 971                 mask = CARD_SHARE_MASK;
 972                 if (card == SD_CARD)
 973                         value = CARD_SHARE_48_SD;
 974                 else if (card == MS_CARD)
 975                         value = CARD_SHARE_48_MS;
 976                 else if (card == XD_CARD)
 977                         value = CARD_SHARE_48_XD;
 978                 else
 979                         TRACE_RET(chip, STATUS_FAIL);
 980
 981         } else if (CHECK_PID(chip, 0x5288)) {
 982                 mask = 0x03;
 983                 if (card == SD_CARD)
 984                         value = CARD_SHARE_BAROSSA_SD;
 985                 else if (card == MS_CARD)
 986                         value = CARD_SHARE_BAROSSA_MS;
 987                 else if (card == XD_CARD)
 988                         value = CARD_SHARE_BAROSSA_XD;
 989                 else
 990                         TRACE_RET(chip, STATUS_FAIL);
 991
 992         } else {
 993                 TRACE_RET(chip, STATUS_FAIL);
 994         }
 995
 996         RTSX_WRITE_REG(chip, CARD_SHARE_MODE, mask, value);
 997
 998         return STATUS_SUCCESS;
 999 }
1000
1001
1002 int select_card(struct rtsx_chip *chip, int card)
1003 {
1004         int retval;
1005
1006         if (chip->cur_card != card) {
1007                 u8 mod;
1008
1009                 if (card == SD_CARD)
1010                         mod = SD_MOD_SEL;
1011                 else if (card == MS_CARD)
1012                         mod = MS_MOD_SEL;
1013                 else if (card == XD_CARD)
1014                         mod = XD_MOD_SEL;
1015                 else if (card == SPI_CARD)
1016                         mod = SPI_MOD_SEL;
1017                 else
1018                         TRACE_RET(chip, STATUS_FAIL);
1019
1020                 RTSX_WRITE_REG(chip, CARD_SELECT, 0x07, mod);
1021                 chip->cur_card = card;
1022
1023                 retval =  card_share_mode(chip, card);
1024                 if (retval != STATUS_SUCCESS)
1025                         TRACE_RET(chip, STATUS_FAIL);
1026         }
1027
1028         return STATUS_SUCCESS;
1029 }
1030
1031 void toggle_gpio(struct rtsx_chip *chip, u8 gpio)
1032 {
1033         u8 temp_reg;
1034
1035         rtsx_read_register(chip, CARD_GPIO, &temp_reg);
1036         temp_reg ^= (0x01 << gpio);
1037         rtsx_write_register(chip, CARD_GPIO, 0xFF, temp_reg);
1038 }
1039
1040 void turn_on_led(struct rtsx_chip *chip, u8 gpio)
1041 {
1042         if (CHECK_PID(chip, 0x5288))
1043                 rtsx_write_register(chip, CARD_GPIO, (u8)(1 << gpio),
1044                                 (u8)(1 << gpio));
1045         else
1046                 rtsx_write_register(chip, CARD_GPIO, (u8)(1 << gpio), 0);
1047 }
1048
1049 void turn_off_led(struct rtsx_chip *chip, u8 gpio)
1050 {
1051         if (CHECK_PID(chip, 0x5288))
1052                 rtsx_write_register(chip, CARD_GPIO, (u8)(1 << gpio), 0);
1053         else
1054                 rtsx_write_register(chip, CARD_GPIO, (u8)(1 << gpio),
1055                                 (u8)(1 << gpio));
1056 }
1057
1058 int detect_card_cd(struct rtsx_chip *chip, int card)
1059 {
1060         u32 card_cd, status;
1061
1062         if (card == SD_CARD) {
1063                 card_cd = SD_EXIST;
1064         } else if (card == MS_CARD) {
1065                 card_cd = MS_EXIST;
1066         } else if (card == XD_CARD) {
1067                 card_cd = XD_EXIST;
1068         } else {
1069                 dev_dbg(rtsx_dev(chip), "Wrong card type: 0x%x\n", card);
1070                 TRACE_RET(chip, STATUS_FAIL);
1071         }
1072
1073         status = rtsx_readl(chip, RTSX_BIPR);
1074         if (!(status & card_cd))
1075                 TRACE_RET(chip, STATUS_FAIL);
1076
1077         return STATUS_SUCCESS;
1078 }
1079
1080 int check_card_exist(struct rtsx_chip *chip, unsigned int lun)
1081 {
1082         if (chip->card_exist & chip->lun2card[lun])
1083                 return 1;
1084
1085         return 0;
1086 }
1087
1088 int check_card_ready(struct rtsx_chip *chip, unsigned int lun)
1089 {
1090         if (chip->card_ready & chip->lun2card[lun])
1091                 return 1;
1092
1093         return 0;
1094 }
1095
1096 int check_card_wp(struct rtsx_chip *chip, unsigned int lun)
1097 {
1098         if (chip->card_wp & chip->lun2card[lun])
1099                 return 1;
1100
1101         return 0;
1102 }
1103
1104 int check_card_fail(struct rtsx_chip *chip, unsigned int lun)
1105 {
1106         if (chip->card_fail & chip->lun2card[lun])
1107                 return 1;
1108
1109         return 0;
1110 }
1111
1112 int check_card_ejected(struct rtsx_chip *chip, unsigned int lun)
1113 {
1114         if (chip->card_ejected & chip->lun2card[lun])
1115                 return 1;
1116
1117         return 0;
1118 }
1119
1120 u8 get_lun_card(struct rtsx_chip *chip, unsigned int lun)
1121 {
1122         if ((chip->card_ready & chip->lun2card[lun]) == XD_CARD)
1123                 return (u8)XD_CARD;
1124         else if ((chip->card_ready & chip->lun2card[lun]) == SD_CARD)
1125                 return (u8)SD_CARD;
1126         else if ((chip->card_ready & chip->lun2card[lun]) == MS_CARD)
1127                 return (u8)MS_CARD;
1128
1129         return 0;
1130 }
1131
1132 void eject_card(struct rtsx_chip *chip, unsigned int lun)
1133 {
1134         do_remaining_work(chip);
1135
1136         if ((chip->card_ready & chip->lun2card[lun]) == SD_CARD) {
1137                 release_sd_card(chip);
1138                 chip->card_ejected |= SD_CARD;
1139                 chip->card_ready &= ~SD_CARD;
1140                 chip->capacity[lun] = 0;
1141         } else if ((chip->card_ready & chip->lun2card[lun]) == XD_CARD) {
1142                 release_xd_card(chip);
1143                 chip->card_ejected |= XD_CARD;
1144                 chip->card_ready &= ~XD_CARD;
1145                 chip->capacity[lun] = 0;
1146         } else if ((chip->card_ready & chip->lun2card[lun]) == MS_CARD) {
1147                 release_ms_card(chip);
1148                 chip->card_ejected |= MS_CARD;
1149                 chip->card_ready &= ~MS_CARD;
1150                 chip->capacity[lun] = 0;
1151         }
1152 }