Merge branch 'trivial' of git://git.kernel.org/pub/scm/linux/kernel/git/mmarek/kbuild-2.6
[pandora-kernel.git] / drivers / staging / rtl8712 / rtl8712_fifoctrl_regdef.h
1 #ifndef __RTL8712_FIFOCTRL_REGDEF_H__
2 #define __RTL8712_FIFOCTRL_REGDEF_H__
3
4 #define RQPN                    (RTL8712_FIFOCTRL_ + 0x00)
5 #define RXFF_BNDY               (RTL8712_FIFOCTRL_ + 0x0C)
6 #define RXRPT_BNDY              (RTL8712_FIFOCTRL_ + 0x10)
7 #define TXPKTBUF_PGBNDY         (RTL8712_FIFOCTRL_ + 0x14)
8 #define PBP                     (RTL8712_FIFOCTRL_ + 0x15)
9 #define RX_DRVINFO_SZ           (RTL8712_FIFOCTRL_ + 0x16)
10 #define TXFF_STATUS             (RTL8712_FIFOCTRL_ + 0x17)
11 #define RXFF_STATUS             (RTL8712_FIFOCTRL_ + 0x18)
12 #define TXFF_EMPTY_TH           (RTL8712_FIFOCTRL_ + 0x19)
13 #define SDIO_RX_BLKSZ           (RTL8712_FIFOCTRL_ + 0x1C)
14 #define RXDMA_RXCTRL            (RTL8712_FIFOCTRL_ + 0x1D)
15 #define RXPKT_NUM               (RTL8712_FIFOCTRL_ + 0x1E)
16 #define RXPKT_NUM_C2H           (RTL8712_FIFOCTRL_ + 0x1F)
17 #define C2HCMD_UDT_SIZE         (RTL8712_FIFOCTRL_ + 0x20)
18 #define C2HCMD_UDT_ADDR         (RTL8712_FIFOCTRL_ + 0x22)
19 #define FIFOPAGE2               (RTL8712_FIFOCTRL_ + 0x24)
20 #define FIFOPAGE1               (RTL8712_FIFOCTRL_ + 0x28)
21 #define FW_RSVD_PG_CTRL         (RTL8712_FIFOCTRL_ + 0x30)
22 #define TXRPTFF_RDPTR           (RTL8712_FIFOCTRL_ + 0x40)
23 #define TXRPTFF_WTPTR           (RTL8712_FIFOCTRL_ + 0x44)
24 #define C2HFF_RDPTR             (RTL8712_FIFOCTRL_ + 0x48)
25 #define C2HFF_WTPTR             (RTL8712_FIFOCTRL_ + 0x4C)
26 #define RXFF0_RDPTR             (RTL8712_FIFOCTRL_ + 0x50)
27 #define RXFF0_WTPTR             (RTL8712_FIFOCTRL_ + 0x54)
28 #define RXFF1_RDPTR             (RTL8712_FIFOCTRL_ + 0x58)
29 #define RXFF1_WTPTR             (RTL8712_FIFOCTRL_ + 0x5C)
30 #define RXRPT0FF_RDPTR          (RTL8712_FIFOCTRL_ + 0x60)
31 #define RXRPT0FF_WTPTR          (RTL8712_FIFOCTRL_ + 0x64)
32 #define RXRPT1FF_RDPTR          (RTL8712_FIFOCTRL_ + 0x68)
33 #define RXRPT1FF_WTPTR          (RTL8712_FIFOCTRL_ + 0x6C)
34 #define RX0PKTNUM               (RTL8712_FIFOCTRL_ + 0x72)
35 #define RX1PKTNUM               (RTL8712_FIFOCTRL_ + 0x74)
36 #define RXFLTMAP0               (RTL8712_FIFOCTRL_ + 0x76)
37 #define RXFLTMAP1               (RTL8712_FIFOCTRL_ + 0x78)
38 #define RXFLTMAP2               (RTL8712_FIFOCTRL_ + 0x7A)
39 #define RXFLTMAP3               (RTL8712_FIFOCTRL_ + 0x7c)
40 #define TBDA                    (RTL8712_FIFOCTRL_ + 0x84)
41 #define THPDA                   (RTL8712_FIFOCTRL_ + 0x88)
42 #define TCDA                    (RTL8712_FIFOCTRL_ + 0x8C)
43 #define TMDA                    (RTL8712_FIFOCTRL_ + 0x90)
44 #define HDA                     (RTL8712_FIFOCTRL_ + 0x94)
45 #define TVODA                   (RTL8712_FIFOCTRL_ + 0x98)
46 #define TVIDA                   (RTL8712_FIFOCTRL_ + 0x9C)
47 #define TBEDA                   (RTL8712_FIFOCTRL_ + 0xA0)
48 #define TBKDA                   (RTL8712_FIFOCTRL_ + 0xA4)
49 #define RCDA                    (RTL8712_FIFOCTRL_ + 0xA8)
50 #define RDSA                    (RTL8712_FIFOCTRL_ + 0xAC)
51 #define TXPKT_NUM_CTRL          (RTL8712_FIFOCTRL_ + 0xB0)
52 #define TXQ_PGADD               (RTL8712_FIFOCTRL_ + 0xB3)
53 #define TXFF_PG_NUM             (RTL8712_FIFOCTRL_ + 0xB4)
54
55
56
57 #endif  /* __RTL8712_FIFOCTRL_REGDEF_H__ */