1 /******************************************************************************
3 * (c) Copyright 2008, RealTEK Technologies Inc. All Rights Reserved.
5 * Module: HalRf6052.c ( Source C File)
7 * Note: Provide RF 6052 series relative API.
18 * 09/25/2008 MHC Create initial version.
19 * 11/05/2008 MHC Add API for tw power setting.
22 ******************************************************************************/
24 #include "r8192S_rtl6052.h"
26 #include "r8192S_hw.h"
27 #include "r8192S_phyreg.h"
28 #include "r8192S_phy.h"
31 /*---------------------------Define Local Constant---------------------------*/
32 // Define local structure for debug!!!!!
33 typedef struct RF_Shadow_Compare_Map {
34 // Shadow register value
36 // Compare or not flag
38 // Record If it had ever modified unpredicted
45 /*---------------------------Define Local Constant---------------------------*/
48 /*------------------------Define global variable-----------------------------*/
49 /*------------------------Define global variable-----------------------------*/
54 /*---------------------Define local function prototype-----------------------*/
55 void phy_RF6052_Config_HardCode(struct net_device* dev);
57 RT_STATUS phy_RF6052_Config_ParaFile(struct net_device* dev);
58 /*---------------------Define local function prototype-----------------------*/
60 /*------------------------Define function prototype--------------------------*/
61 extern void RF_ChangeTxPath(struct net_device* dev, u16 DataRate);
63 /*------------------------Define function prototype--------------------------*/
65 /*------------------------Define local variable------------------------------*/
66 // 2008/11/20 MH For Debug only, RF
67 static RF_SHADOW_T RF_Shadow[RF6052_MAX_PATH][RF6052_MAX_REG];// = {{0}};//FIXLZM
68 /*------------------------Define local variable------------------------------*/
70 /*------------------------Define function prototype--------------------------*/
71 /*-----------------------------------------------------------------------------
72 * Function: RF_ChangeTxPath
74 * Overview: For RL6052, we must change some RF settign for 1T or 2T.
76 * Input: u16 DataRate // 0x80-8f, 0x90-9f
84 * 09/25/2008 MHC Create Version 0.
85 * Firmwaer support the utility later.
87 *---------------------------------------------------------------------------*/
88 extern void RF_ChangeTxPath(struct net_device* dev, u16 DataRate)
90 } /* RF_ChangeTxPath */
93 /*-----------------------------------------------------------------------------
94 * Function: PHY_RF6052SetBandwidth()
96 * Overview: This function is called by SetBWModeCallback8190Pci() only
98 * Input: PADAPTER Adapter
99 * WIRELESS_BANDWIDTH_E Bandwidth //20M or 40M
105 * Note: For RF type 0222D
106 *---------------------------------------------------------------------------*/
107 void PHY_RF6052SetBandwidth(struct net_device* dev, HT_CHANNEL_WIDTH Bandwidth) //20M or 40M
110 //struct r8192_priv *priv = ieee80211_priv(dev);
113 //if (priv->card_8192 == NIC_8192SE)
117 case HT_CHANNEL_WIDTH_20:
118 //if (priv->card_8192_version >= VERSION_8192S_BCUT)
119 // rtl8192_setBBreg(dev, rFPGA0_AnalogParameter2, 0xff, 0x58);
121 rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)RF90_PATH_A, RF_CHNLBW, BIT10|BIT11, 0x01);
123 case HT_CHANNEL_WIDTH_20_40:
124 //if (priv->card_8192_version >= VERSION_8192S_BCUT)
125 // rtl8192_setBBreg(dev, rFPGA0_AnalogParameter2, 0xff, 0x18);
127 rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)RF90_PATH_A, RF_CHNLBW, BIT10|BIT11, 0x00);
130 RT_TRACE(COMP_DBG, "PHY_SetRF6052Bandwidth(): unknown Bandwidth: %#X\n",Bandwidth);
138 /*-----------------------------------------------------------------------------
139 * Function: PHY_RF6052SetCckTxPower
151 * 11/05/2008 MHC Simulate 8192series..
153 *---------------------------------------------------------------------------*/
154 extern void PHY_RF6052SetCckTxPower(struct net_device* dev, u8 powerlevel)
156 struct r8192_priv *priv = ieee80211_priv(dev);
159 if(priv->ieee80211->scanning == 1)
161 else if(priv->bDynamicTxLowPower == true)//cosa 04282008 for cck long range
166 //cosa add for lenovo, to pass the safety spec, don't increase power index for different rates.
167 if(priv->bIgnoreDiffRateTxPowerOffset)
170 if(TxAGC > RF6052_MAX_TX_PWR)
171 TxAGC = RF6052_MAX_TX_PWR;
173 //printk("CCK PWR= %x\n", TxAGC);
174 rtl8192_setBBreg(dev, rTxAGC_CCK_Mcs32, bTxAGCRateCCK, TxAGC);
176 } /* PHY_RF6052SetCckTxPower */
180 /*-----------------------------------------------------------------------------
181 * Function: PHY_RF6052SetOFDMTxPower
183 * Overview: For legacy and HY OFDM, we must read EEPROM TX power index for
184 * different channel and read original value in TX power register area from
185 * 0xe00. We increase offset and original value to be correct tx pwr.
195 * 11/05/2008 MHC Simulate 8192 series method.
196 * 01/06/2009 MHC 1. Prevent Path B tx power overflow or underflow dure to
197 * A/B pwr difference or legacy/HT pwr diff.
198 * 2. We concern with path B legacy/HT OFDM difference.
199 * 01/22/2009 MHC Support new EPRO format from SD3.
200 *---------------------------------------------------------------------------*/
202 extern void PHY_RF6052SetOFDMTxPower(struct net_device* dev, u8 powerlevel)
204 struct r8192_priv *priv = ieee80211_priv(dev);
205 u32 writeVal, powerBase0, powerBase1;
207 u16 RegOffset[6] = {0xe00, 0xe04, 0xe10, 0xe14, 0xe18, 0xe1c};
208 //u8 byte0, byte1, byte2, byte3;
209 u8 Channel = priv->ieee80211->current_network.channel;
211 u8 rfa_lower_bound = 0, rfa_upper_bound = 0 /*, rfa_htpwr, rfa_legacypwr*/;
214 u8 Legacy_pwrdiff=0, HT20_pwrdiff=0, BandEdge_Pwrdiff=0;
215 u8 ofdm_bandedge_chnl_low=0, ofdm_bandedge_chnl_high=0;
218 // We only care about the path A for legacy.
219 if (priv->EEPROMVersion != 2)
220 powerBase0 = powerlevel + (priv->LegacyHTTxPowerDiff & 0xf);
221 else if (priv->EEPROMVersion == 2) // Defined by SD1 Jong
224 // 2009/01/21 MH Support new EEPROM format from SD3 requirement
226 Legacy_pwrdiff = priv->TxPwrLegacyHtDiff[RF90_PATH_A][Channel-1];
227 // For legacy OFDM, tx pwr always > HT OFDM pwr. We do not care Path B
228 // legacy OFDM pwr diff. NO BB register to notify HW.
229 powerBase0 = powerlevel + Legacy_pwrdiff;
230 //RTPRINT(FPHY, PHY_TXPWR, (" [LagacyToHT40 pwr diff = %d]\n", Legacy_pwrdiff));
232 // Band Edge scheme is enabled for FCC mode
233 if (priv->TxPwrbandEdgeFlag == 1/* && pHalData->ChannelPlan == 0*/)
235 ofdm_bandedge_chnl_low = 1;
236 ofdm_bandedge_chnl_high = 11;
237 BandEdge_Pwrdiff = 0;
238 if (Channel <= ofdm_bandedge_chnl_low)
239 BandEdge_Pwrdiff = priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_A][0];
240 else if (Channel >= ofdm_bandedge_chnl_high)
242 BandEdge_Pwrdiff = priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_A][1];
244 powerBase0 -= BandEdge_Pwrdiff;
245 if (Channel <= ofdm_bandedge_chnl_low || Channel >= ofdm_bandedge_chnl_high)
247 //RTPRINT(FPHY, PHY_TXPWR, (" [OFDM band-edge channel = %d, pwr diff = %d]\n",
248 //Channel, BandEdge_Pwrdiff));
251 //RTPRINT(FPHY, PHY_TXPWR, (" [OFDM power base index = 0x%x]\n", powerBase0));
253 powerBase0 = (powerBase0<<24) | (powerBase0<<16) |(powerBase0<<8) |powerBase0;
256 if(priv->EEPROMVersion == 2)
258 //Cosa add for new EEPROM content. 02102009
260 //Check HT20 to HT40 diff
261 if (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
263 // HT 20<->40 pwr diff
264 HT20_pwrdiff = priv->TxPwrHt20Diff[RF90_PATH_A][Channel-1];
266 // Calculate Antenna pwr diff
267 if (HT20_pwrdiff < 8) // 0~+7
268 powerlevel += HT20_pwrdiff;
269 else // index8-15=-8~-1
270 powerlevel -= (16-HT20_pwrdiff);
272 //RTPRINT(FPHY, PHY_TXPWR, (" [HT20 to HT40 pwrdiff = %d]\n", HT20_pwrdiff));
273 //RTPRINT(FPHY, PHY_TXPWR, (" [MCS power base index = 0x%x]\n", powerlevel));
276 // Band Edge scheme is enabled for FCC mode
277 if (priv->TxPwrbandEdgeFlag == 1/* && pHalData->ChannelPlan == 0*/)
279 BandEdge_Pwrdiff = 0;
280 if (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20_40)
283 BandEdge_Pwrdiff = priv->TxPwrbandEdgeHt40[RF90_PATH_A][0];
284 else if (Channel >= 9)
285 BandEdge_Pwrdiff = priv->TxPwrbandEdgeHt40[RF90_PATH_A][1];
286 if (Channel <= 3 || Channel >= 9)
288 //RTPRINT(FPHY, PHY_TXPWR, (" [HT40 band-edge channel = %d, pwr diff = %d]\n",
289 //Channel, BandEdge_Pwrdiff));
292 else if (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
295 BandEdge_Pwrdiff = priv->TxPwrbandEdgeHt20[RF90_PATH_A][0];
296 else if (Channel >= 11)
297 BandEdge_Pwrdiff = priv->TxPwrbandEdgeHt20[RF90_PATH_A][1];
298 if (Channel <= 1 || Channel >= 11)
300 //RTPRINT(FPHY, PHY_TXPWR, (" [HT20 band-edge channel = %d, pwr diff = %d]\n",
301 //Channel, BandEdge_Pwrdiff));
304 powerlevel -= BandEdge_Pwrdiff;
305 //RTPRINT(FPHY, PHY_TXPWR, (" [MCS power base index = 0x%x]\n", powerlevel));
308 powerBase1 = powerlevel;
309 powerBase1 = (powerBase1<<24) | (powerBase1<<16) |(powerBase1<<8) |powerBase1;
311 //RTPRINT(FPHY, PHY_TXPWR, (" [Legacy/HT power index= %x/%x]\n", powerBase0, powerBase1));
313 for(index=0; index<6; index++)
316 // Index 0 & 1= legacy OFDM, 2-5=HT_MCS rate
318 //cosa add for lenovo, to pass the safety spec, don't increase power index for different rates.
319 if(priv->bIgnoreDiffRateTxPowerOffset)
320 writeVal = ((index<2)?powerBase0:powerBase1);
322 writeVal = priv->MCSTxPowerLevelOriginalOffset[index] + ((index<2)?powerBase0:powerBase1);
324 //RTPRINT(FPHY, PHY_TXPWR, ("Reg 0x%x, Original=%x writeVal=%x\n",
325 //RegOffset[index], priv->MCSTxPowerLevelOriginalOffset[index], writeVal));
328 // If path A and Path B coexist, we must limit Path A tx power.
329 // Protect Path B pwr over or underflow. We need to calculate upper and
330 // lower bound of path A tx power.
332 if (priv->rf_type == RF_2T2R)
334 rf_pwr_diff = priv->AntennaTxPwDiff[0];
335 //RTPRINT(FPHY, PHY_TXPWR, ("2T2R RF-B to RF-A PWR DIFF=%d\n", rf_pwr_diff));
337 if (rf_pwr_diff >= 8) // Diff=-8~-1
338 { // Prevent underflow!!
339 rfa_lower_bound = 0x10-rf_pwr_diff;
340 //RTPRINT(FPHY, PHY_TXPWR, ("rfa_lower_bound= %d\n", rfa_lower_bound));
342 else if (rf_pwr_diff >= 0) // Diff = 0-7
344 rfa_upper_bound = RF6052_MAX_TX_PWR-rf_pwr_diff;
345 //RTPRINT(FPHY, PHY_TXPWR, ("rfa_upper_bound= %d\n", rfa_upper_bound));
349 for (i= 0; i <4; i++)
351 rfa_pwr[i] = (u8)((writeVal & (0x7f<<(i*8)))>>(i*8));
352 if (rfa_pwr[i] > RF6052_MAX_TX_PWR)
353 rfa_pwr[i] = RF6052_MAX_TX_PWR;
356 // If path A and Path B coexist, we must limit Path A tx power.
357 // Protect Path B pwr under/over flow. We need to calculate upper and
358 // lower bound of path A tx power.
360 if (priv->rf_type == RF_2T2R)
362 if (rf_pwr_diff >= 8) // Diff=-8~-1
363 { // Prevent underflow!!
364 if (rfa_pwr[i] <rfa_lower_bound)
366 //RTPRINT(FPHY, PHY_TXPWR, ("Underflow"));
367 rfa_pwr[i] = rfa_lower_bound;
370 else if (rf_pwr_diff >= 1) // Diff = 0-7
371 { // Prevent overflow
372 if (rfa_pwr[i] > rfa_upper_bound)
374 //RTPRINT(FPHY, PHY_TXPWR, ("Overflow"));
375 rfa_pwr[i] = rfa_upper_bound;
378 //RTPRINT(FPHY, PHY_TXPWR, ("rfa_pwr[%d]=%x\n", i, rfa_pwr[i]));
384 // Add description: PWDB > threshold!!!High power issue!!
385 // We must decrease tx power !! Why is the value ???
387 if(priv->bDynamicTxHighPower == TRUE)
392 writeVal = 0x03030303;
397 writeVal = (rfa_pwr[3]<<24) | (rfa_pwr[2]<<16) |(rfa_pwr[1]<<8) |rfa_pwr[0];
399 //RTPRINT(FPHY, PHY_TXPWR, ("HighPower=%08x\n", writeVal));
403 writeVal = (rfa_pwr[3]<<24) | (rfa_pwr[2]<<16) |(rfa_pwr[1]<<8) |rfa_pwr[0];
404 //RTPRINT(FPHY, PHY_TXPWR, ("NormalPower=%08x\n", writeVal));
408 // Write different rate set tx power index.
410 //if (DCMD_Test_Flag == 0)
411 rtl8192_setBBreg(dev, RegOffset[index], 0x7f7f7f7f, writeVal);
414 } /* PHY_RF6052SetOFDMTxPower */
416 extern void PHY_RF6052SetOFDMTxPower(struct net_device* dev, u8 powerlevel)
418 struct r8192_priv *priv = ieee80211_priv(dev);
419 u32 writeVal, powerBase0, powerBase1;
421 u16 RegOffset[6] = {0xe00, 0xe04, 0xe10, 0xe14, 0xe18, 0xe1c};
422 u8 byte0, byte1, byte2, byte3;
423 u8 channel = priv->ieee80211->current_network.channel;
426 powerBase0 = powerlevel + (priv->LegacyHTTxPowerDiff & 0xf);
427 powerBase0 = (powerBase0<<24) | (powerBase0<<16) |(powerBase0<<8) |powerBase0;
430 powerBase1 = powerlevel;
431 powerBase1 = (powerBase1<<24) | (powerBase1<<16) |(powerBase1<<8) |powerBase1;
433 //printk("Legacy/HT PWR= %x/%x\n", powerBase0, powerBase1);
435 for(index=0; index<6; index++)
438 // Index 0 & 1= legacy OFDM, 2-5=HT_MCS rate
440 writeVal = priv->MCSTxPowerLevelOriginalOffset[index] + ((index<2)?powerBase0:powerBase1);
442 //printk("Index = %d Original=%x writeVal=%x\n", index, priv->MCSTxPowerLevelOriginalOffset[index], writeVal);
444 byte0 = (u8)(writeVal & 0x7f);
445 byte1 = (u8)((writeVal & 0x7f00)>>8);
446 byte2 = (u8)((writeVal & 0x7f0000)>>16);
447 byte3 = (u8)((writeVal & 0x7f000000)>>24);
449 // Max power index = 0x3F Range = 0-0x3F
450 if(byte0 > RF6052_MAX_TX_PWR)
451 byte0 = RF6052_MAX_TX_PWR;
452 if(byte1 > RF6052_MAX_TX_PWR)
453 byte1 = RF6052_MAX_TX_PWR;
454 if(byte2 > RF6052_MAX_TX_PWR)
455 byte2 = RF6052_MAX_TX_PWR;
456 if(byte3 > RF6052_MAX_TX_PWR)
457 byte3 = RF6052_MAX_TX_PWR;
460 // Add description: PWDB > threshold!!!High power issue!!
461 // We must decrease tx power !! Why is the value ???
463 if(priv->bDynamicTxHighPower == true)
468 writeVal = 0x03030303;
473 writeVal = (byte3<<24) | (byte2<<16) |(byte1<<8) |byte0;
478 writeVal = (byte3<<24) | (byte2<<16) |(byte1<<8) |byte0;
482 // Write different rate set tx power index.
484 rtl8192_setBBreg(dev, RegOffset[index], 0x7f7f7f7f, writeVal);
487 } /* PHY_RF6052SetOFDMTxPower */
490 RT_STATUS PHY_RF6052_Config(struct net_device* dev)
492 struct r8192_priv *priv = ieee80211_priv(dev);
493 RT_STATUS rtStatus = RT_STATUS_SUCCESS;
494 //RF90_RADIO_PATH_E eRFPath;
495 //BB_REGISTER_DEFINITION_T *pPhyReg;
496 //u32 OrgStoreRFIntSW[RF90_PATH_D+1];
499 // Initialize general global value
501 // TODO: Extend RF_PATH_C and RF_PATH_D in the future
502 if(priv->rf_type == RF_1T1R)
503 priv->NumTotalRFPath = 1;
505 priv->NumTotalRFPath = 2;
510 // switch( priv->bRegHwParaFile )
513 // phy_RF6052_Config_HardCode(dev);
517 rtStatus = phy_RF6052_Config_ParaFile(dev);
522 // phy_RF6052_Config_HardCode(dev);
523 // phy_RF6052_Config_ParaFile(dev);
527 // phy_RF6052_Config_HardCode(dev);
534 void phy_RF6052_Config_HardCode(struct net_device* dev)
537 // Set Default Bandwidth to 20M
538 //Adapter->HalFunc .SetBWModeHandler(Adapter, HT_CHANNEL_WIDTH_20);
540 // TODO: Set Default Channel to channel one for RTL8225
544 RT_STATUS phy_RF6052_Config_ParaFile(struct net_device* dev)
547 //static s1Byte szRadioAFile[] = RTL819X_PHY_RADIO_A;
548 //static s1Byte szRadioBFile[] = RTL819X_PHY_RADIO_B;
549 //static s1Byte szRadioBGMFile[] = RTL819X_PHY_RADIO_B_GM;
551 RT_STATUS rtStatus = RT_STATUS_SUCCESS;
552 struct r8192_priv *priv = ieee80211_priv(dev);
553 BB_REGISTER_DEFINITION_T *pPhyReg;
557 //3//-----------------------------------------------------------------
558 //3// <2> Initialize RF
559 //3//-----------------------------------------------------------------
560 //for(eRFPath = RF90_PATH_A; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
561 for(eRFPath = 0; eRFPath <priv->NumTotalRFPath; eRFPath++)
564 pPhyReg = &priv->PHYRegDef[eRFPath];
566 /*----Store original RFENV control type----*/
571 u4RegValue = rtl8192_QueryBBReg(dev, pPhyReg->rfintfs, bRFSI_RFENV);
575 u4RegValue = rtl8192_QueryBBReg(dev, pPhyReg->rfintfs, bRFSI_RFENV<<16);
579 /*----Set RF_ENV enable----*/
580 rtl8192_setBBreg(dev, pPhyReg->rfintfe, bRFSI_RFENV<<16, 0x1);
582 /*----Set RF_ENV output high----*/
583 rtl8192_setBBreg(dev, pPhyReg->rfintfo, bRFSI_RFENV, 0x1);
585 /* Set bit number of Address and Data for RF register */
586 rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0); // Set 1 to 4 bits for 8255
587 rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0); // Set 0 to 12 bits for 8255
590 /*----Initialize RF fom connfiguration file----*/
594 rtStatus= rtl8192_phy_ConfigRFWithHeaderFile(dev,(RF90_RADIO_PATH_E)eRFPath);
597 rtStatus= rtl8192_phy_ConfigRFWithHeaderFile(dev,(RF90_RADIO_PATH_E)eRFPath);
605 /*----Restore RFENV control type----*/;
610 rtl8192_setBBreg(dev, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue);
614 rtl8192_setBBreg(dev, pPhyReg->rfintfs, bRFSI_RFENV<<16, u4RegValue);
618 if(rtStatus != RT_STATUS_SUCCESS){
619 printk("phy_RF6052_Config_ParaFile():Radio[%d] Fail!!", eRFPath);
620 goto phy_RF6052_Config_ParaFile_Fail;
625 RT_TRACE(COMP_INIT, "<---phy_RF6052_Config_ParaFile()\n");
628 phy_RF6052_Config_ParaFile_Fail:
634 // ==> RF shadow Operation API Code Section!!!
636 /*-----------------------------------------------------------------------------
637 * Function: PHY_RFShadowRead
639 * PHY_RFShadowCompare
640 * PHY_RFShadowRecorver
641 * PHY_RFShadowCompareAll
642 * PHY_RFShadowRecorverAll
643 * PHY_RFShadowCompareFlagSet
644 * PHY_RFShadowRecorverFlagSet
646 * Overview: When we set RF register, we must write shadow at first.
647 * When we are running, we must compare shadow abd locate error addr.
648 * Decide to recorver or not.
658 * 11/20/2008 MHC Create Version 0.
660 *---------------------------------------------------------------------------*/
661 extern u32 PHY_RFShadowRead(
662 struct net_device * dev,
663 RF90_RADIO_PATH_E eRFPath,
666 return RF_Shadow[eRFPath][Offset].Value;
668 } /* PHY_RFShadowRead */
671 extern void PHY_RFShadowWrite(
672 struct net_device * dev,
677 //RF_Shadow[eRFPath][Offset].Value = (Data & bMask20Bits);
678 RF_Shadow[eRFPath][Offset].Value = (Data & bRFRegOffsetMask);
679 RF_Shadow[eRFPath][Offset].Driver_Write = true;
681 } /* PHY_RFShadowWrite */
684 extern void PHY_RFShadowCompare(
685 struct net_device * dev,
686 RF90_RADIO_PATH_E eRFPath,
691 // Check if we need to check the register
692 if (RF_Shadow[eRFPath][Offset].Compare == true)
694 reg = rtl8192_phy_QueryRFReg(dev, eRFPath, Offset, bRFRegOffsetMask);
695 // Compare shadow and real rf register for 20bits!!
696 if (RF_Shadow[eRFPath][Offset].Value != reg)
698 // Locate error position.
699 RF_Shadow[eRFPath][Offset].ErrorOrNot = true;
700 RT_TRACE(COMP_INIT, "PHY_RFShadowCompare RF-%d Addr%02xErr = %05x", eRFPath, Offset, reg);
704 } /* PHY_RFShadowCompare */
706 extern void PHY_RFShadowRecorver(
707 struct net_device * dev,
708 RF90_RADIO_PATH_E eRFPath,
711 // Check if the address is error
712 if (RF_Shadow[eRFPath][Offset].ErrorOrNot == true)
714 // Check if we need to recorver the register.
715 if (RF_Shadow[eRFPath][Offset].Recorver == true)
717 rtl8192_phy_SetRFReg(dev, eRFPath, Offset, bRFRegOffsetMask, RF_Shadow[eRFPath][Offset].Value);
718 RT_TRACE(COMP_INIT, "PHY_RFShadowRecorver RF-%d Addr%02x=%05x",
719 eRFPath, Offset, RF_Shadow[eRFPath][Offset].Value);
723 } /* PHY_RFShadowRecorver */
726 extern void PHY_RFShadowCompareAll(struct net_device * dev)
731 for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++)
733 for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++)
735 PHY_RFShadowCompare(dev, (RF90_RADIO_PATH_E)eRFPath, Offset);
739 } /* PHY_RFShadowCompareAll */
742 extern void PHY_RFShadowRecorverAll(struct net_device * dev)
747 for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++)
749 for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++)
751 PHY_RFShadowRecorver(dev, (RF90_RADIO_PATH_E)eRFPath, Offset);
755 } /* PHY_RFShadowRecorverAll */
758 extern void PHY_RFShadowCompareFlagSet(
759 struct net_device * dev,
760 RF90_RADIO_PATH_E eRFPath,
764 // Set True or False!!!
765 RF_Shadow[eRFPath][Offset].Compare = Type;
767 } /* PHY_RFShadowCompareFlagSet */
770 extern void PHY_RFShadowRecorverFlagSet(
771 struct net_device * dev,
772 RF90_RADIO_PATH_E eRFPath,
776 // Set True or False!!!
777 RF_Shadow[eRFPath][Offset].Recorver= Type;
779 } /* PHY_RFShadowRecorverFlagSet */
782 extern void PHY_RFShadowCompareFlagSetAll(struct net_device * dev)
787 for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++)
789 for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++)
791 // 2008/11/20 MH For S3S4 test, we only check reg 26/27 now!!!!
792 if (Offset != 0x26 && Offset != 0x27)
793 PHY_RFShadowCompareFlagSet(dev, (RF90_RADIO_PATH_E)eRFPath, Offset, FALSE);
795 PHY_RFShadowCompareFlagSet(dev, (RF90_RADIO_PATH_E)eRFPath, Offset, TRUE);
799 } /* PHY_RFShadowCompareFlagSetAll */
802 extern void PHY_RFShadowRecorverFlagSetAll(struct net_device * dev)
807 for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++)
809 for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++)
811 // 2008/11/20 MH For S3S4 test, we only check reg 26/27 now!!!!
812 if (Offset != 0x26 && Offset != 0x27)
813 PHY_RFShadowRecorverFlagSet(dev, (RF90_RADIO_PATH_E)eRFPath, Offset, FALSE);
815 PHY_RFShadowRecorverFlagSet(dev, (RF90_RADIO_PATH_E)eRFPath, Offset, TRUE);
819 } /* PHY_RFShadowCompareFlagSetAll */
823 extern void PHY_RFShadowRefresh(struct net_device * dev)
828 for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++)
830 for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++)
832 RF_Shadow[eRFPath][Offset].Value = 0;
833 RF_Shadow[eRFPath][Offset].Compare = false;
834 RF_Shadow[eRFPath][Offset].Recorver = false;
835 RF_Shadow[eRFPath][Offset].ErrorOrNot = false;
836 RF_Shadow[eRFPath][Offset].Driver_Write = false;
840 } /* PHY_RFShadowRead */
842 /* End of HalRf6052.c */