drivers/staging/rtl8192su/r8192S_Efuse.c

   1 /******************************************************************************
   2  *
   3  *     (c) Copyright  2008, RealTEK Technologies Inc. All Rights Reserved.
   4  *
   5  * Module:      Efuse.c ( Source C File)
   6  *
   7  * Note:                Copy from WMAC for the first version!!!!
   8  *
   9  *
  10  * Function:
  11  *
  12  * Export:
  13  *
  14  * Abbrev:
  15  *
  16  * History:
  17  * Data                 Who             Remark
  18  *
  19  * 09/23/2008   MHC             Porting Efuse R/W API from WMAC.
  20  * 11/10/2008   MHC             1. Porting from 8712 EFUSE.
  21  *                                              2. Add description and reorganize code arch.
  22  * 11/16/2008   MHC             1. Reorganize code architecture.
  23  *                                              2. Rename for some API and change extern or static type.
  24  *
  25 ******************************************************************************/
  26 #include "r8192U.h"
  27 #include "r8192S_hw.h"
  28 #include "r8192S_phy.h"
  29 #include "r8192S_phyreg.h"
  30 #include "r8192S_Efuse.h"
  31
  32 #include <linux/types.h>
  33
  34 //typedef  int  INT32;
  35 //
  36 // In the future, we will always support EFUSE!!
  37 //
  38 #ifdef RTL8192SU
  39 /*---------------------------Define Local Constant---------------------------*/
  40 #define         _POWERON_DELAY_
  41 #define         _PRE_EXECUTE_READ_CMD_
  42
  43 #define         EFUSE_REPEAT_THRESHOLD_         3
  44 #define         EFUSE_ERROE_HANDLE              1
  45
  46
  47 // From 8712!!!!!
  48 typedef struct _EFUSE_MAP_A{
  49         u8 offset;              //0~15
  50         u8 word_start;  //0~3
  51         u8 byte_start;  //0 or 1
  52         u8 byte_cnts;
  53
  54 }EFUSE_MAP, *PEFUSE_MAP;
  55
  56 typedef struct PG_PKT_STRUCT_A{
  57         u8 offset;
  58         u8 word_en;
  59         u8 data[8];
  60 }PGPKT_STRUCT,*PPGPKT_STRUCT;
  61
  62 typedef enum _EFUSE_DATA_ITEM{
  63         EFUSE_CHIP_ID=0,
  64         EFUSE_LDO_SETTING,
  65         EFUSE_CLK_SETTING,
  66         EFUSE_SDIO_SETTING,
  67         EFUSE_CCCR,
  68         EFUSE_SDIO_MODE,
  69         EFUSE_OCR,
  70         EFUSE_F0CIS,
  71         EFUSE_F1CIS,
  72         EFUSE_MAC_ADDR,
  73         EFUSE_EEPROM_VER,
  74         EFUSE_CHAN_PLAN,
  75         EFUSE_TXPW_TAB
  76 } EFUSE_DATA_ITEM;
  77
  78 struct efuse_priv
  79 {
  80         u8              id[2];
  81         u8              ldo_setting[2];
  82         u8              clk_setting[2];
  83         u8              cccr;
  84         u8              sdio_mode;
  85         u8              ocr[3];
  86         u8              cis0[17];
  87         u8              cis1[48];
  88         u8              mac_addr[6];
  89         u8              eeprom_verno;
  90         u8              channel_plan;
  91         u8              tx_power_b[14];
  92         u8              tx_power_g[14];
  93 };
  94
  95 /*---------------------------Define Local Constant---------------------------*/
  96
  97
  98 /*------------------------Define global variable-----------------------------*/
  99 const u8 MAX_PGPKT_SIZE = 9; //header+ 2* 4 words (BYTES)
 100 const u8 PGPKT_DATA_SIZE = 8; //BYTES sizeof(u8)*8
 101 const u32 EFUSE_MAX_SIZE = 512;
 102
 103
 104 const EFUSE_MAP RTL8712_SDIO_EFUSE_TABLE[]={
 105                                 //offset        word_s  byte_start      byte_cnts
 106 /*ID*/                  {0              ,0              ,0                      ,2      }, // 00~01h
 107 /*LDO Setting*/ {0              ,1              ,0                      ,2      }, // 02~03h
 108 /*CLK Setting*/ {0              ,2              ,0                      ,2      }, // 04~05h
 109 /*SDIO Setting*/        {1              ,0              ,0                      ,1      }, // 08h
 110 /*CCCR*/                {1              ,0              ,1                      ,1      }, // 09h
 111 /*SDIO MODE*/   {1              ,1              ,0                      ,1      }, // 0Ah
 112 /*OCR*/                 {1              ,1              ,1                      ,3      }, // 0B~0Dh
 113 /*CCIS*/                        {1              ,3              ,0                      ,17     }, // 0E~1Eh  2...1
 114 /*F1CIS*/               {3              ,3              ,1                      ,48     }, // 1F~4Eh  6...0
 115 /*MAC Addr*/            {10             ,0              ,0                      ,6      }, // 50~55h
 116 /*EEPROM ver*/  {10             ,3              ,0                      ,1      }, // 56h
 117 /*Channel plan*/        {10             ,3              ,1                      ,1      }, // 57h
 118 /*TxPwIndex */  {11             ,0              ,0                      ,28     }  // 58~73h  3...4
 119 };
 120
 121 /*------------------------Define global variable-----------------------------*/
 122
 123
 124 /*------------------------Define local variable------------------------------*/
 125
 126 /*------------------------Define local variable------------------------------*/
 127
 128
 129 /*--------------------Define function prototype-----------------------*/
 130 //
 131 // From WMAC Efuse one byte R/W
 132 //
 133 extern  void
 134 EFUSE_Initialize(struct net_device* dev);
 135 extern  u8
 136 EFUSE_Read1Byte(struct net_device* dev, u16 Address);
 137 extern  void
 138 EFUSE_Write1Byte(struct net_device* dev, u16 Address,u8 Value);
 139
 140 //
 141 // Efuse Shadow Area operation
 142 //
 143 static  void
 144 efuse_ShadowRead1Byte(struct net_device* dev,u16 Offset,u8 *Value);
 145 static  void
 146 efuse_ShadowRead2Byte(struct net_device* dev,   u16 Offset,u16 *Value   );
 147 static  void
 148 efuse_ShadowRead4Byte(struct net_device* dev,   u16 Offset,u32 *Value   );
 149 static  void
 150 efuse_ShadowWrite1Byte(struct net_device* dev,  u16 Offset, u8 Value);
 151 static  void
 152 efuse_ShadowWrite2Byte(struct net_device* dev,  u16 Offset,u16 Value);
 153 static  void
 154 efuse_ShadowWrite4Byte(struct net_device* dev,  u16 Offset,u32 Value);
 155
 156 //
 157 // Real Efuse operation
 158 //
 159 static  u8
 160 efuse_OneByteRead(struct net_device* dev,u16 addr,u8 *data);
 161 static  u8
 162 efuse_OneByteWrite(struct net_device* dev,u16 addr, u8 data);
 163
 164 //
 165 // HW setting map file operation
 166 //
 167 static  void
 168 efuse_ReadAllMap(struct net_device* dev,u8 *Efuse);
 169 #ifdef TO_DO_LIST
 170 static  void
 171 efuse_WriteAllMap(struct net_device* dev,u8 *eeprom,u32 eeprom_size);
 172 static  bool
 173 efuse_ParsingMap(char* szStr,u32* pu4bVal,u32* pu4bMove);
 174 #endif
 175 //
 176 // Reald Efuse R/W or other operation API.
 177 //
 178 static  u8
 179 efuse_PgPacketRead(     struct net_device* dev,u8       offset,u8 *data);
 180 static  u8
 181 efuse_PgPacketWrite(struct net_device* dev,u8 offset,u8 word_en,u8      *data);
 182 static  void
 183 efuse_WordEnableDataRead(       u8 word_en,u8 *sourdata,u8 *targetdata);
 184 static  u8
 185 efuse_WordEnableDataWrite(      struct net_device* dev, u16 efuse_addr, u8 word_en, u8 *data);
 186 static  void
 187 efuse_PowerSwitch(struct net_device* dev,u8 PwrState);
 188 static  u16
 189 efuse_GetCurrentSize(struct net_device* dev);
 190 static u8
 191 efuse_CalculateWordCnts(u8 word_en);
 192 #if 0
 193 static  void
 194 efuse_ResetLoader(struct net_device* dev);
 195 #endif
 196 //
 197 // API for power on power off!!!
 198 //
 199 #ifdef TO_DO_LIST
 200 static void efuse_reg_ctrl(struct net_device* dev, u8 bPowerOn);
 201 #endif
 202 /*--------------------Define function prototype-----------------------*/
 203
 204
 205
 206 /*-----------------------------------------------------------------------------
 207  * Function:    EFUSE_Initialize
 208  *
 209  * Overview:    Copy from WMAC fot EFUSE testing setting init.
 210  *
 211  * Input:       NONE
 212  *
 213  * Output:      NONE
 214  *
 215  * Return:      NONE
 216  *
 217  * Revised History:
 218  * When                 Who             Remark
 219  * 09/23/2008   MHC             Copy from WMAC.
 220  *
 221  *---------------------------------------------------------------------------*/
 222 extern  void
 223 EFUSE_Initialize(struct net_device* dev)
 224 {
 225         u8      Bytetemp = {0x00};
 226         u8      temp = {0x00};
 227
 228         //Enable Digital Core Vdd : 0x2[13]=1
 229         Bytetemp = read_nic_byte(dev, SYS_FUNC_EN+1);
 230         temp = Bytetemp | 0x20;
 231         write_nic_byte(dev, SYS_FUNC_EN+1, temp);
 232
 233         //EE loader to retention path1: attach 0x0[8]=0
 234         Bytetemp = read_nic_byte(dev, SYS_ISO_CTRL+1);
 235         temp = Bytetemp & 0xFE;
 236         write_nic_byte(dev, SYS_ISO_CTRL+1, temp);
 237
 238
 239         //Enable E-fuse use 2.5V LDO : 0x37[7]=1
 240         Bytetemp = read_nic_byte(dev, EFUSE_TEST+3);
 241         temp = Bytetemp | 0x80;
 242         write_nic_byte(dev, EFUSE_TEST+3, temp);
 243
 244         //E-fuse clk switch from 500k to 40M : 0x2F8[1:0]=11b
 245         write_nic_byte(dev, 0x2F8, 0x3);
 246
 247         //Set E-fuse program time & read time : 0x30[30:24]=1110010b
 248         write_nic_byte(dev, EFUSE_CTRL+3, 0x72);
 249
 250 }       /* EFUSE_Initialize */
 251
 252
 253 /*-----------------------------------------------------------------------------
 254  * Function:    EFUSE_Read1Byte
 255  *
 256  * Overview:    Copy from WMAC fot EFUSE read 1 byte.
 257  *
 258  * Input:       NONE
 259  *
 260  * Output:      NONE
 261  *
 262  * Return:      NONE
 263  *
 264  * Revised History:
 265  * When                 Who             Remark
 266  * 09/23/2008   MHC             Copy from WMAC.
 267  *
 268  *---------------------------------------------------------------------------*/
 269 extern  u8
 270 EFUSE_Read1Byte(struct net_device* dev, u16     Address)
 271 {
 272         u8      data;
 273         u8      Bytetemp = {0x00};
 274         u8      temp = {0x00};
 275         u32     k=0;
 276
 277         if (Address < EFUSE_MAC_LEN)    //E-fuse 512Byte
 278         {
 279                 //Write E-fuse Register address bit0~7
 280                 temp = Address & 0xFF;
 281                 write_nic_byte(dev, EFUSE_CTRL+1, temp);
 282                 Bytetemp = read_nic_byte(dev, EFUSE_CTRL+2);
 283                 //Write E-fuse Register address bit8~9
 284                 temp = ((Address >> 8) & 0x03) | (Bytetemp & 0xFC);
 285                 write_nic_byte(dev, EFUSE_CTRL+2, temp);
 286
 287                 //Write 0x30[31]=0
 288                 Bytetemp = read_nic_byte(dev, EFUSE_CTRL+3);
 289                 temp = Bytetemp & 0x7F;
 290                 write_nic_byte(dev, EFUSE_CTRL+3, temp);
 291
 292                 //Wait Write-ready (0x30[31]=1)
 293                 Bytetemp = read_nic_byte(dev, EFUSE_CTRL+3);
 294                 while(!(Bytetemp & 0x80))
 295                 {
 296                         Bytetemp = read_nic_byte(dev, EFUSE_CTRL+3);
 297                         k++;
 298                         if(k==1000)
 299                         {
 300                                 k=0;
 301                                 break;
 302                         }
 303                 }
 304                 data=read_nic_byte(dev, EFUSE_CTRL);
 305                 return data;
 306         }
 307         else
 308                 return 0xFF;
 309
 310 }       /* EFUSE_Read1Byte */
 311
 312
 313 /*-----------------------------------------------------------------------------
 314  * Function:    EFUSE_Write1Byte
 315  *
 316  * Overview:    Copy from WMAC fot EFUSE write 1 byte.
 317  *
 318  * Input:       NONE
 319  *
 320  * Output:      NONE
 321  *
 322  * Return:      NONE
 323  *
 324  * Revised History:
 325  * When                 Who             Remark
 326  * 09/23/2008   MHC             Copy from WMAC.
 327  *
 328  *---------------------------------------------------------------------------*/
 329 extern  void
 330 EFUSE_Write1Byte(struct net_device* dev, u16 Address,u8 Value)
 331 {
 332         //u8    data;
 333         u8      Bytetemp = {0x00};
 334         u8      temp = {0x00};
 335         u32     k=0;
 336
 337         //RT_TRACE(COMP_EFUSE, "Addr=%x Data =%x\n", Address, Value);
 338
 339         if( Address < EFUSE_MAC_LEN)    //E-fuse 512Byte
 340         {
 341                 write_nic_byte(dev, EFUSE_CTRL, Value);
 342
 343                 //Write E-fuse Register address bit0~7
 344                 temp = Address & 0xFF;
 345                 write_nic_byte(dev, EFUSE_CTRL+1, temp);
 346                 Bytetemp = read_nic_byte(dev, EFUSE_CTRL+2);
 347
 348                 //Write E-fuse Register address bit8~9
 349                 temp = ((Address >> 8) & 0x03) | (Bytetemp & 0xFC);
 350                 write_nic_byte(dev, EFUSE_CTRL+2, temp);
 351
 352                 //Write 0x30[31]=1
 353                 Bytetemp = read_nic_byte(dev, EFUSE_CTRL+3);
 354                 temp = Bytetemp | 0x80;
 355                 write_nic_byte(dev, EFUSE_CTRL+3, temp);
 356
 357                 //Wait Write-ready (0x30[31]=0)
 358                 Bytetemp = read_nic_byte(dev, EFUSE_CTRL+3);
 359                 while(Bytetemp & 0x80)
 360                 {
 361                         Bytetemp = read_nic_byte(dev, EFUSE_CTRL+3);
 362                         k++;
 363                         if(k==100)
 364                         {
 365                                 k=0;
 366                                 break;
 367                         }
 368                 }
 369         }
 370
 371 }       /* EFUSE_Write1Byte */
 372
 373
 374 #ifdef EFUSE_FOR_92SU
 375 //
 376 //      Description:
 377 //              1. Process CR93C46 Data polling cycle.
 378 //              2. Refered from SD1 Richard.
 379 //
 380 //      Assumption:
 381 //              1. Boot from E-Fuse and successfully auto-load.
 382 //              2. PASSIVE_LEVEL (USB interface)
 383 //
 384 //      Created by Roger, 2008.10.21.
 385 //
 386 void do_93c46(struct net_device* dev,  u8 addorvalue)
 387 {
 388         //u8  clear[1] = {0x0};      // cs=0 , sk=0 , di=0 , do=0
 389         u8  cs[1] = {0x88};        // cs=1 , sk=0 , di=0 , do=0
 390         u8  cssk[1] = {0x8c};      // cs=1 , sk=1 , di=0 , do=0
 391         u8  csdi[1] = {0x8a};      // cs=1 , sk=0 , di=1 , do=0
 392         u8  csskdi[1] = {0x8e};    // cs=1 , sk=1 , di=1 , do=0
 393         //u8  di[1] = {0x82};        // cs=0 , sk=0 , di=1 , do=0
 394         u8  count;
 395
 396         for(count=0 ; count<8 ; count++)
 397         {
 398                 if((addorvalue&0x80)!=0)
 399                 {
 400                         write_nic_byte(dev, EPROM_CMD, csdi[0]);
 401                         write_nic_byte(dev, EPROM_CMD, csskdi[0]);
 402                 }
 403                 else
 404                 {
 405                         write_nic_byte(dev, EPROM_CMD, cs[0]);
 406                         write_nic_byte(dev, EPROM_CMD, cssk[0]);
 407                 }
 408                 addorvalue = addorvalue << 1;
 409         }
 410 }
 411
 412
 413 //
 414 //      Description:
 415 //              Process CR93C46 Data read polling cycle.
 416 //              Refered from SD1 Richard.
 417 //
 418 //      Assumption:
 419 //              1. Boot from E-Fuse and successfully auto-load.
 420 //              2. PASSIVE_LEVEL (USB interface)
 421 //
 422 //      Created by Roger, 2008.10.21.
 423 //
 424 u16 Read93C46(struct net_device*        dev,    u16     Reg     )
 425 {
 426
 427         u8      clear[1] = {0x0};      // cs=0 , sk=0 , di=0 , do=0
 428         u8      cs[1] = {0x88};        // cs=1 , sk=0 , di=0 , do=0
 429         u8      cssk[1] = {0x8c};      // cs=1 , sk=1 , di=0 , do=0
 430         u8      csdi[1] = {0x8a};      // cs=1 , sk=0 , di=1 , do=0
 431         u8      csskdi[1] = {0x8e};    // cs=1 , sk=1 , di=1 , do=0
 432         //u8    di[1] = {0x82};        // cs=0 , sk=0 , di=1 , do=0
 433         u8      EepromSEL[1]={0x00};
 434         u8      address;
 435
 436         u16     storedataF[1] = {0x0};   //93c46 data packet for 16bits
 437         u8      t,data[1],storedata[1];
 438
 439
 440         address = (u8)Reg;
 441
 442         // Suggested by SD1 Alex, 2008.10.20. Revised by Roger.
 443         *EepromSEL= read_nic_byte(dev, EPROM_CMD);
 444
 445         if((*EepromSEL & 0x10) == 0x10) // select 93c46
 446         {
 447                 address = address | 0x80;
 448
 449                 write_nic_byte(dev, EPROM_CMD, csdi[0]);
 450                 write_nic_byte(dev, EPROM_CMD, csskdi[0]);
 451                 do_93c46(dev, address);
 452         }
 453
 454
 455         for(t=0 ; t<16 ; t++)      //if read 93c46 , t=16
 456         {
 457                 write_nic_byte(dev, EPROM_CMD, cs[0]);
 458                 write_nic_byte(dev, EPROM_CMD, cssk[0]);
 459                 *data= read_nic_byte(dev, EPROM_CMD);
 460
 461                 if(*data & 0x8d) //original code
 462                 {
 463                         *data = *data & 0x01;
 464                         *storedata = *data;
 465                 }
 466                 else
 467                 {
 468                         *data = *data & 0x01 ;
 469                         *storedata = *data;
 470                 }
 471                 *storedataF = (*storedataF << 1 ) + *storedata;
 472         }
 473         write_nic_byte(dev, EPROM_CMD, cs[0]);
 474         write_nic_byte(dev, EPROM_CMD, clear[0]);
 475
 476         return *storedataF;
 477 }
 478
 479
 480 //
 481 //      Description:
 482 //              Execute E-Fuse read byte operation.
 483 //              Refered from SD1 Richard.
 484 //
 485 //      Assumption:
 486 //              1. Boot from E-Fuse and successfully auto-load.
 487 //              2. PASSIVE_LEVEL (USB interface)
 488 //
 489 //      Created by Roger, 2008.10.21.
 490 //
 491 void
 492 ReadEFuseByte(struct net_device* dev,u16 _offset, u8 *pbuf)
 493 {
 494
 495         //u16   indexk=0;
 496         u32  value32;
 497         u8      readbyte;
 498         u16     retry;
 499
 500
 501         //Write Address
 502         write_nic_byte(dev, EFUSE_CTRL+1, (_offset & 0xff));
 503         readbyte = read_nic_byte(dev, EFUSE_CTRL+2);
 504         write_nic_byte(dev, EFUSE_CTRL+2, ((_offset >> 8) & 0x03) | (readbyte & 0xfc));
 505
 506         //Write bit 32 0
 507         readbyte = read_nic_byte(dev, EFUSE_CTRL+3);
 508         write_nic_byte(dev, EFUSE_CTRL+3, (readbyte & 0x7f));
 509
 510         //Check bit 32 read-ready
 511         retry = 0;
 512         value32 = read_nic_dword(dev, EFUSE_CTRL);
 513         //while(!(((value32 >> 24) & 0xff) & 0x80)  && (retry<10))
 514         while(!(((value32 >> 24) & 0xff) & 0x80)  && (retry<10000))
 515         {
 516                 value32 = read_nic_dword(dev, EFUSE_CTRL);
 517                 retry++;
 518         }
 519         *pbuf = (u8)(value32 & 0xff);
 520 }
 521
 522
 523 #define         EFUSE_READ_SWITCH               1
 524 //
 525 //      Description:
 526 //              1. Execute E-Fuse read byte operation according as map offset and
 527 //                  save to E-Fuse table.
 528 //              2. Refered from SD1 Richard.
 529 //
 530 //      Assumption:
 531 //              1. Boot from E-Fuse and successfully auto-load.
 532 //              2. PASSIVE_LEVEL (USB interface)
 533 //
 534 //      Created by Roger, 2008.10.21.
 535 //
 536 void
 537 ReadEFuse(struct net_device* dev, u16    _offset, u16 _size_byte, u8 *pbuf)
 538 {
 539
 540         u8      efuseTbl[128];
 541         u8      rtemp8[1];
 542         u16     eFuse_Addr = 0;
 543         u8      offset, wren;
 544         u16     i, j;
 545         u16     eFuseWord[16][4];// = {0xFF};//FIXLZM
 546
 547         for(i=0; i<16; i++)
 548                 for(j=0; j<4; j++)
 549                         eFuseWord[i][j]=0xFF;
 550
 551         // Do NOT excess total size of EFuse table. Added by Roger, 2008.11.10.
 552         if((_offset + _size_byte)>128)
 553         {// total E-Fuse table is 128bytes
 554                 //RT_TRACE(COMP_EFUSE, "ReadEFuse(): Invalid offset(%#x) with read bytes(%#x)!!\n",_offset, _size_byte);
 555                 printk("ReadEFuse(): Invalid offset with read bytes!!\n");
 556                 return;
 557         }
 558
 559         // Refresh efuse init map as all oxFF.
 560         for (i = 0; i < 128; i++)
 561                 efuseTbl[i] = 0xFF;
 562
 563 #if (EFUSE_READ_SWITCH == 1)
 564         ReadEFuseByte(dev, eFuse_Addr, rtemp8);
 565 #else
 566         rtemp8[0] = EFUSE_Read1Byte(dev, eFuse_Addr);
 567 #endif
 568         if(*rtemp8 != 0xFF)             eFuse_Addr++;
 569         while((*rtemp8 != 0xFF) && (eFuse_Addr < 512)){
 570                 offset = ((*rtemp8 >> 4) & 0x0f);
 571                 if(offset <= 0x0F){
 572                         wren = (*rtemp8 & 0x0f);
 573                         for(i=0; i<4; i++){
 574                                 if(!(wren & 0x01)){
 575 #if (EFUSE_READ_SWITCH == 1)
 576                                         ReadEFuseByte(dev, eFuse_Addr, rtemp8); eFuse_Addr++;
 577 #else
 578                                         rtemp8[0] = EFUSE_Read1Byte(dev, eFuse_Addr);   eFuse_Addr++;
 579 #endif
 580                                         eFuseWord[offset][i] = (*rtemp8 & 0xff);
 581                                         if(eFuse_Addr >= 512) break;
 582 #if (EFUSE_READ_SWITCH == 1)
 583                                         ReadEFuseByte(dev, eFuse_Addr, rtemp8); eFuse_Addr++;
 584 #else
 585                                         rtemp8[0] = EFUSE_Read1Byte(dev, eFuse_Addr);   eFuse_Addr++;
 586 #endif
 587                                         eFuseWord[offset][i] |= (((u16)*rtemp8 << 8) & 0xff00);
 588                                         if(eFuse_Addr >= 512) break;
 589                                 }
 590                                 wren >>= 1;
 591                         }
 592                 }
 593 #if (EFUSE_READ_SWITCH == 1)
 594                 ReadEFuseByte(dev, eFuse_Addr, rtemp8);
 595 #else
 596                 rtemp8[0] = EFUSE_Read1Byte(dev, eFuse_Addr);   eFuse_Addr++;
 597 #endif
 598                 if(*rtemp8 != 0xFF && (eFuse_Addr < 512))       eFuse_Addr++;
 599         }
 600
 601         for(i=0; i<16; i++){
 602                 for(j=0; j<4; j++){
 603                         efuseTbl[(i*8)+(j*2)]=(eFuseWord[i][j] & 0xff);
 604                         efuseTbl[(i*8)+((j*2)+1)]=((eFuseWord[i][j] >> 8) & 0xff);
 605                 }
 606         }
 607         for(i=0; i<_size_byte; i++)
 608                 pbuf[i] = efuseTbl[_offset+i];
 609 }
 610 #endif  // #if (EFUSE_FOR_92SU == 1)
 611
 612
 613 /*-----------------------------------------------------------------------------
 614  * Function:    EFUSE_ShadowRead
 615  *
 616  * Overview:    Read from efuse init map !!!!!
 617  *
 618  * Input:       NONE
 619  *
 620  * Output:      NONE
 621  *
 622  * Return:      NONE
 623  *
 624  * Revised History:
 625  * When                 Who             Remark
 626  * 11/12/2008   MHC             Create Version 0.
 627  *
 628  *---------------------------------------------------------------------------*/
 629 extern void
 630 EFUSE_ShadowRead(       struct net_device*      dev,    u8 Type, u16 Offset, u32 *Value)
 631 {
 632         //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
 633
 634         if (Type == 1)
 635                 efuse_ShadowRead1Byte(dev, Offset, (u8 *)Value);
 636         else if (Type == 2)
 637                 efuse_ShadowRead2Byte(dev, Offset, (u16 *)Value);
 638         else if (Type == 4)
 639                 efuse_ShadowRead4Byte(dev, Offset, (u32 *)Value);
 640
 641 }       // EFUSE_ShadowRead
 642
 643
 644 /*-----------------------------------------------------------------------------
 645  * Function:    EFUSE_ShadowWrite
 646  *
 647  * Overview:    Write efuse modify map for later update operation to use!!!!!
 648  *
 649  * Input:       NONE
 650  *
 651  * Output:      NONE
 652  *
 653  * Return:      NONE
 654  *
 655  * Revised History:
 656  * When                 Who             Remark
 657  * 11/12/2008   MHC             Create Version 0.
 658  *
 659  *---------------------------------------------------------------------------*/
 660 extern  void
 661 EFUSE_ShadowWrite(      struct net_device*      dev,    u8 Type, u16 Offset,u32 Value)
 662 {
 663         //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
 664
 665         if (Offset >= 0x18 && Offset <= 0x1F)
 666                 return;
 667
 668         if (Type == 1)
 669                 efuse_ShadowWrite1Byte(dev, Offset, (u8)Value);
 670         else if (Type == 2)
 671                 efuse_ShadowWrite2Byte(dev, Offset, (u16)Value);
 672         else if (Type == 4)
 673                 efuse_ShadowWrite4Byte(dev, Offset, (u32)Value);
 674
 675 }       // EFUSE_ShadowWrite
 676
 677
 678 /*-----------------------------------------------------------------------------
 679  * Function:    EFUSE_ShadowUpdate
 680  *
 681  * Overview:    Compare init and modify map to update Efuse!!!!!
 682  *
 683  * Input:       NONE
 684  *
 685  * Output:      NONE
 686  *
 687  * Return:      NONE
 688  *
 689  * Revised History:
 690  * When                 Who             Remark
 691  * 11/12/2008   MHC             Create Version 0.
 692  *
 693  *---------------------------------------------------------------------------*/
 694 extern  void
 695 EFUSE_ShadowUpdate(struct net_device* dev)
 696 {
 697         //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
 698         struct r8192_priv *priv = ieee80211_priv(dev);
 699         u16                     i, offset, base = 0;
 700         u8                      word_en = 0x0F;
 701         bool first_pg = false;
 702         // For Efuse write action, we must enable LDO2.5V and 40MHZ clk.
 703         efuse_PowerSwitch(dev, TRUE);
 704
 705         //
 706         // Efuse support 16 write are with PG header packet!!!!
 707         //
 708         for (offset = 0; offset < 16; offset++)
 709         {
 710                 // Offset 0x18-1F are reserved now!!!
 711 #ifdef RTL8192SE
 712                 if(priv->card_8192 == NIC_8192SE){
 713                         if (offset == 3)
 714                                 continue;
 715                 }
 716 #endif
 717                 word_en = 0x0F;
 718                 base = offset * 8;
 719
 720                 //
 721                 // Decide Word Enable Bit for the Efuse section
 722                 // One section contain 4 words = 8 bytes!!!!!
 723                 //
 724                 for (i = 0; i < 8; i++)
 725                 {
 726                         if (offset == 0 && priv->EfuseMap[EFUSE_INIT_MAP][base+i] == 0xFF)
 727                         {
 728                                 first_pg = TRUE;
 729                         }
 730
 731                         // 2008/12/11 MH HW autoload fail workaround for A/BCUT.
 732 #ifdef RTL8192SE
 733                         if (first_pg == TRUE && offset == 1 && (priv->card_8192 == NIC_8192SE))
 734                         {
 735                                 continue;
 736                         }
 737 #endif
 738
 739                         if (first_pg == TRUE)
 740                         {
 741                                 word_en &= ~(1<<(i/2));
 742                                 priv->EfuseMap[EFUSE_INIT_MAP][base+i] =
 743                                 priv->EfuseMap[EFUSE_MODIFY_MAP][base+i];
 744                         }else
 745                         {
 746                         if (    priv->EfuseMap[EFUSE_INIT_MAP][base+i] !=
 747                                 priv->EfuseMap[EFUSE_MODIFY_MAP][base+i])
 748                         {
 749                                 word_en &= ~(EFUSE_BIT(i/2));
 750                                 //RT_TRACE(COMP_EFUSE,  "Offset=%d Addr%x %x ==> %x Word_En=%02x\n",
 751                                 //offset, base+i, priv->EfuseMap[0][base+i], priv->EfuseMap[1][base+i],word_en);
 752
 753                                 // Update init table!!!
 754                                 priv->EfuseMap[EFUSE_INIT_MAP][base+i] =
 755                                 priv->EfuseMap[EFUSE_MODIFY_MAP][base+i];
 756                                 }
 757                         }
 758                 }
 759
 760                 //
 761                 // Call Efuse real write section !!!!
 762                 //
 763                 if (word_en != 0x0F)
 764                 {
 765                         u8      tmpdata[8];
 766
 767                         //FIXLZM
 768                         memcpy(tmpdata, &(priv->EfuseMap[EFUSE_MODIFY_MAP][base]), 8);
 769                         //RT_PRINT_DATA(COMP_INIT, DBG_LOUD, ("U-EFUSE\n"), tmpdata, 8);
 770                         efuse_PgPacketWrite(dev,(u8)offset,word_en,tmpdata);
 771                 }
 772
 773         }
 774         // 2008/12/01 MH For Efuse HW load bug workarounf method!!!!
 775         // We will force write 0x10EC into address 10&11 after all Efuse content.
 776         //
 777 #ifdef RTL8192SE
 778         if (first_pg == TRUE && (priv->card_8192 == NIC_8192SE))
 779         {
 780                 // 2008/12/11 MH Use new method to prevent HW autoload fail.
 781                 u8      tmpdata[8];
 782
 783                 memcpy(tmpdata, (&priv->EfuseMap[EFUSE_MODIFY_MAP][8]), 8);
 784                 efuse_PgPacketWrite(dev, 1, 0x0, tmpdata);
 785 #if 0
 786                 u1Byte  tmpdata[8] = {0xFF, 0xFF, 0xEC, 0x10, 0xFF, 0xFF, 0xFF, 0xFF};
 787
 788                 efuse_PgPacketWrite(pAdapter, 1, 0xD, tmpdata);
 789 #endif
 790         }
 791 #endif
 792
 793
 794         // For warm reboot, we must resume Efuse clock to 500K.
 795         efuse_PowerSwitch(dev, FALSE);
 796         // 2008/12/01 MH We update shadow content again!!!!
 797         EFUSE_ShadowMapUpdate(dev);
 798
 799 }       // EFUSE_ShadowUpdate
 800
 801
 802 /*-----------------------------------------------------------------------------
 803  * Function:    EFUSE_ShadowMapUpdate
 804  *
 805  * Overview:    Transfer current EFUSE content to shadow init and modify map.
 806  *
 807  * Input:       NONE
 808  *
 809  * Output:      NONE
 810  *
 811  * Return:      NONE
 812  *
 813  * Revised History:
 814  * When                 Who             Remark
 815  * 11/13/2008   MHC             Create Version 0.
 816  *
 817  *---------------------------------------------------------------------------*/
 818 extern void EFUSE_ShadowMapUpdate(struct net_device* dev)
 819 {
 820         struct r8192_priv *priv = ieee80211_priv(dev);
 821
 822         if (priv->AutoloadFailFlag == true){
 823                 memset(&(priv->EfuseMap[EFUSE_INIT_MAP][0]), 0xff, 128);
 824         }else{
 825                 efuse_ReadAllMap(dev, &priv->EfuseMap[EFUSE_INIT_MAP][0]);
 826         }
 827         //PlatformMoveMemory(&priv->EfuseMap[EFUSE_MODIFY_MAP][0],
 828                 //&priv->EfuseMap[EFUSE_INIT_MAP][0], HWSET_MAX_SIZE_92S);//FIXLZM
 829         memcpy(&priv->EfuseMap[EFUSE_MODIFY_MAP][0],
 830                 &priv->EfuseMap[EFUSE_INIT_MAP][0], HWSET_MAX_SIZE_92S);
 831
 832 }       // EFUSE_ShadowMapUpdate
 833
 834 extern  void
 835 EFUSE_ForceWriteVendorId( struct net_device* dev)
 836 {
 837         u8 tmpdata[8] = {0xFF, 0xFF, 0xEC, 0x10, 0xFF, 0xFF, 0xFF, 0xFF};
 838
 839         efuse_PowerSwitch(dev, TRUE);
 840
 841         efuse_PgPacketWrite(dev, 1, 0xD, tmpdata);
 842
 843         efuse_PowerSwitch(dev, FALSE);
 844
 845 }       // EFUSE_ForceWriteVendorId
 846
 847 /*-----------------------------------------------------------------------------
 848  * Function:    efuse_ShadowRead1Byte
 849  *                      efuse_ShadowRead2Byte
 850  *                      efuse_ShadowRead4Byte
 851  *
 852  * Overview:    Read from efuse init map by one/two/four bytes !!!!!
 853  *
 854  * Input:       NONE
 855  *
 856  * Output:      NONE
 857  *
 858  * Return:      NONE
 859  *
 860  * Revised History:
 861  * When                 Who             Remark
 862  * 11/12/2008   MHC             Create Version 0.
 863  *
 864  *---------------------------------------------------------------------------*/
 865 static  void
 866 efuse_ShadowRead1Byte(struct net_device*        dev,    u16 Offset,     u8 *Value)
 867 {
 868         struct r8192_priv *priv = ieee80211_priv(dev);
 869
 870         *Value = priv->EfuseMap[EFUSE_MODIFY_MAP][Offset];
 871
 872 }       // EFUSE_ShadowRead1Byte
 873
 874 //---------------Read Two Bytes
 875 static  void
 876 efuse_ShadowRead2Byte(struct net_device*        dev,    u16 Offset,     u16 *Value)
 877 {
 878         struct r8192_priv *priv = ieee80211_priv(dev);
 879
 880         *Value = priv->EfuseMap[EFUSE_MODIFY_MAP][Offset];
 881         *Value |= priv->EfuseMap[EFUSE_MODIFY_MAP][Offset+1]<<8;
 882
 883 }       // EFUSE_ShadowRead2Byte
 884
 885 //---------------Read Four Bytes
 886 static  void
 887 efuse_ShadowRead4Byte(struct net_device*        dev,    u16 Offset,     u32 *Value)
 888 {
 889         struct r8192_priv *priv = ieee80211_priv(dev);
 890
 891         *Value = priv->EfuseMap[EFUSE_MODIFY_MAP][Offset];
 892         *Value |= priv->EfuseMap[EFUSE_MODIFY_MAP][Offset+1]<<8;
 893         *Value |= priv->EfuseMap[EFUSE_MODIFY_MAP][Offset+2]<<16;
 894         *Value |= priv->EfuseMap[EFUSE_MODIFY_MAP][Offset+3]<<24;
 895
 896 }       // efuse_ShadowRead4Byte
 897
 898
 899
 900 /*-----------------------------------------------------------------------------
 901  * Function:    efuse_ShadowWrite1Byte
 902  *                      efuse_ShadowWrite2Byte
 903  *                      efuse_ShadowWrite4Byte
 904  *
 905  * Overview:    Write efuse modify map by one/two/four byte.
 906  *
 907  * Input:       NONE
 908  *
 909  * Output:      NONE
 910  *
 911  * Return:      NONE
 912  *
 913  * Revised History:
 914  * When                 Who             Remark
 915  * 11/12/2008   MHC             Create Version 0.
 916  *
 917  *---------------------------------------------------------------------------*/
 918 static  void
 919 efuse_ShadowWrite1Byte(struct net_device*       dev,    u16 Offset,     u8 Value)
 920 {
 921         struct r8192_priv *priv = ieee80211_priv(dev);
 922
 923         priv->EfuseMap[EFUSE_MODIFY_MAP][Offset] = Value;
 924
 925 }       // efuse_ShadowWrite1Byte
 926
 927 //---------------Write Two Bytes
 928 static  void
 929 efuse_ShadowWrite2Byte(struct net_device*       dev,    u16 Offset,     u16 Value)
 930 {
 931         struct r8192_priv *priv = ieee80211_priv(dev);
 932
 933         priv->EfuseMap[EFUSE_MODIFY_MAP][Offset] = Value&0x00FF;
 934         priv->EfuseMap[EFUSE_MODIFY_MAP][Offset+1] = Value>>8;
 935
 936 }       // efuse_ShadowWrite1Byte
 937
 938 //---------------Write Four Bytes
 939 static  void
 940 efuse_ShadowWrite4Byte(struct net_device*       dev,    u16 Offset,     u32 Value)
 941 {
 942         struct r8192_priv *priv = ieee80211_priv(dev);
 943
 944         priv->EfuseMap[EFUSE_MODIFY_MAP][Offset] = (u8)(Value&0x000000FF);
 945         priv->EfuseMap[EFUSE_MODIFY_MAP][Offset+1] = (u8)((Value>>8)&0x0000FF);
 946         priv->EfuseMap[EFUSE_MODIFY_MAP][Offset+2] = (u8)((Value>>16)&0x00FF);
 947         priv->EfuseMap[EFUSE_MODIFY_MAP][Offset+3] = (u8)((Value>>24)&0xFF);
 948
 949 }       // efuse_ShadowWrite1Byte
 950
 951
 952 /*  11/16/2008 MH Read one byte from real Efuse. */
 953 static  u8
 954 efuse_OneByteRead(struct net_device* dev, u16 addr,u8 *data)
 955 {
 956         u8 tmpidx = 0;
 957         u8 bResult;
 958
 959         // -----------------e-fuse reg ctrl ---------------------------------
 960         //address
 961         write_nic_byte(dev, EFUSE_CTRL+1, (u8)(addr&0xff));
 962         write_nic_byte(dev, EFUSE_CTRL+2, ((u8)((addr>>8) &0x03) ) |
 963         (read_nic_byte(dev, EFUSE_CTRL+2)&0xFC ));
 964
 965         write_nic_byte(dev, EFUSE_CTRL+3,  0x72);//read cmd
 966
 967         while(!(0x80 &read_nic_byte(dev, EFUSE_CTRL+3))&&(tmpidx<100))
 968         {
 969                 tmpidx++;
 970         }
 971         if(tmpidx<100)
 972         {
 973                 *data=read_nic_byte(dev, EFUSE_CTRL);
 974                 bResult = TRUE;
 975         }
 976         else
 977         {
 978                 *data = 0xff;
 979                 bResult = FALSE;
 980         }
 981         return bResult;
 982 }       // efuse_OneByteRead
 983
 984 /*  11/16/2008 MH Write one byte to reald Efuse. */
 985 static  u8
 986 efuse_OneByteWrite(struct net_device* dev,  u16 addr, u8 data)
 987 {
 988         u8 tmpidx = 0;
 989         u8 bResult;
 990
 991         //RT_TRACE(COMP_EFUSE, "Addr = %x Data=%x\n", addr, data);
 992
 993         //return        0;
 994
 995         // -----------------e-fuse reg ctrl ---------------------------------
 996         //address
 997         write_nic_byte(dev, EFUSE_CTRL+1, (u8)(addr&0xff));
 998         write_nic_byte(dev, EFUSE_CTRL+2,
 999         read_nic_byte(dev, EFUSE_CTRL+2)|(u8)((addr>>8)&0x03) );
1000
1001         write_nic_byte(dev, EFUSE_CTRL, data);//data
1002         write_nic_byte(dev, EFUSE_CTRL+3, 0xF2);//write cmd
1003
1004         while((0x80 &  read_nic_byte(dev, EFUSE_CTRL+3)) && (tmpidx<100) ){
1005                 tmpidx++;
1006         }
1007
1008         if(tmpidx<100)
1009         {
1010                 bResult = TRUE;
1011         }
1012         else
1013         {
1014                 bResult = FALSE;
1015         }
1016
1017         return bResult;
1018 }       // efuse_OneByteWrite
1019
1020
1021 /*-----------------------------------------------------------------------------
1022  * Function:    efuse_ReadAllMap
1023  *
1024  * Overview:    Read All Efuse content
1025  *
1026  * Input:       NONE
1027  *
1028  * Output:      NONE
1029  *
1030  * Return:      NONE
1031  *
1032  * Revised History:
1033  * When                 Who             Remark
1034  * 11/11/2008   MHC             Create Version 0.
1035  *
1036  *---------------------------------------------------------------------------*/
1037 static  void
1038 efuse_ReadAllMap(struct net_device*     dev, u8 *Efuse)
1039 {
1040         //u8    pg_data[8];
1041         //u8    offset = 0;
1042         //u8    tmpidx;
1043         //static        u8      index = 0;
1044
1045         //
1046         // We must enable clock and LDO 2.5V otherwise, read all map will be fail!!!!
1047         //
1048         efuse_PowerSwitch(dev, TRUE);
1049         ReadEFuse(dev, 0, 128, Efuse);
1050         efuse_PowerSwitch(dev, FALSE);
1051 #if 0
1052         // ==> Prevent efuse read error!!!
1053         RT_TRACE(COMP_INIT, "efuse_ResetLoader\n");
1054         efuse_ResetLoader(dev);
1055
1056         // Change Efuse Clock for write action to 40MHZ
1057         write_nic_byte(dev, EFUSE_CLK, 0x03);
1058
1059         ReadEFuse(dev, 0, 128, Efuse);
1060
1061         // Change Efuse Clock for write action to 500K
1062         write_nic_byte(dev, EFUSE_CLK, 0x02);
1063 #if 0   // Error !!!!!!
1064         for(offset = 0;offset<16;offset++)      // For 8192SE
1065         {
1066                 PlatformFillMemory((PVOID)pg_data, 8, 0xff);
1067                 efuse_PgPacketRead(pAdapter,offset,pg_data);
1068
1069                 PlatformMoveMemory((PVOID)&Efuse[offset*8], (PVOID)pg_data, 8);
1070         }
1071 #endif
1072
1073         //
1074         // Error Check and Reset Again!!!!
1075         //
1076         if (Efuse[0] != 0x29 || Efuse[1] != 0x81)
1077         {
1078                 // SW autoload fail, we have to read again!!!
1079                 if (index ++ < 5)
1080                 {
1081                         RT_TRACE(COMP_INIT, "EFUSE R FAIL %d\n", index);
1082                         efuse_ReadAllMap(dev, Efuse);
1083                         // Wait a few time ???? Or need to do some setting ???
1084                         // When we reload driver, efuse will be OK!!
1085                 }
1086         }
1087         else
1088         {
1089                 index = 0;
1090         }
1091
1092         //efuse_PowerSwitch(pAdapter, FALSE);
1093 #endif
1094 }       // efuse_ReadAllMap
1095
1096
1097 /*-----------------------------------------------------------------------------
1098  * Function:    efuse_WriteAllMap
1099  *
1100  * Overview:    Write All Efuse content
1101  *
1102  * Input:       NONE
1103  *
1104  * Output:      NONE
1105  *
1106  * Return:      NONE
1107  *
1108  * Revised History:
1109  * When                 Who             Remark
1110  * 11/11/2008   MHC             Create Version 0.
1111  *
1112  *---------------------------------------------------------------------------*/
1113 #ifdef TO_DO_LIST
1114 static  void
1115 efuse_WriteAllMap(struct net_device* dev,u8 *eeprom, u32 eeprom_size)
1116 {
1117         unsigned char word_en = 0x00;
1118
1119         unsigned char tmpdata[8];
1120         unsigned char offset;
1121
1122         // For Efuse write action, we must enable LDO2.5V and 40MHZ clk.
1123         efuse_PowerSwitch(dev, TRUE);
1124
1125         //sdio contents
1126         for(offset=0 ; offset< eeprom_size/PGPKT_DATA_SIZE ; offset++)
1127         {
1128                 // 92S will only reserv 0x18-1F 8 bytes now. The 3rd efuse write area!
1129                 if (IS_HARDWARE_TYPE_8192SE(dev))
1130                 {
1131                         // Refer to
1132                         // 0x18-1f Reserve >0x50 Reserve for tx power
1133                         if (offset == 3/* || offset > 9*/)
1134                                 continue;//word_en = 0x0F;
1135                         //else if (offset == 9) // 0x4c-4f Reserve
1136                                 //word_en = 0x0C;
1137                         else
1138                                 word_en = 0x00;
1139                 }
1140                 //RT_TRACE(COMP_EFUSE, ("Addr=%d size=%d Word_En=%02x\n", offset, eeprom_size, word_en));
1141
1142                 //memcpy(tmpdata,eeprom+(offset*PGPKT_DATA_SIZE),8);
1143                 memcpy(tmpdata, (eeprom+(offset*PGPKT_DATA_SIZE)), 8);
1144
1145                 //RT_PRINT_DATA(COMP_INIT, DBG_LOUD, ("EFUSE\t"), tmpdata, 8);
1146
1147                 efuse_PgPacketWrite(dev,offset,word_en,tmpdata);
1148
1149
1150         }
1151
1152         // For warm reboot, we must resume Efuse clock to 500K.
1153         efuse_PowerSwitch(dev, FALSE);
1154
1155 }       // efuse_WriteAllMap
1156 #endif
1157
1158 /*-----------------------------------------------------------------------------
1159  * Function:    efuse_PgPacketRead
1160  *
1161  * Overview:    Receive dedicated Efuse are content. For92s, we support 16
1162  *                              area now. It will return 8 bytes content for every area.
1163  *
1164  * Input:       NONE
1165  *
1166  * Output:      NONE
1167  *
1168  * Return:      NONE
1169  *
1170  * Revised History:
1171  * When                 Who             Remark
1172  * 11/16/2008   MHC             Reorganize code Arch and assign as local API.
1173  *
1174  *---------------------------------------------------------------------------*/
1175 static  u8
1176 efuse_PgPacketRead(     struct net_device*      dev,    u8 offset, u8   *data)
1177 {
1178         u8 ReadState = PG_STATE_HEADER;
1179
1180         bool bContinual = TRUE;
1181         bool  bDataEmpty = TRUE ;
1182
1183         u8 efuse_data,word_cnts=0;
1184         u16 efuse_addr = 0;
1185         u8 hoffset=0,hworden=0;
1186         u8 tmpidx=0;
1187         u8 tmpdata[8];
1188
1189         if(data==NULL)  return FALSE;
1190         if(offset>15)           return FALSE;
1191
1192         //FIXLZM
1193         //PlatformFillMemory((PVOID)data, sizeof(u8)*PGPKT_DATA_SIZE, 0xff);
1194         //PlatformFillMemory((PVOID)tmpdata, sizeof(u8)*PGPKT_DATA_SIZE, 0xff);
1195         memset(data, 0xff, sizeof(u8)*PGPKT_DATA_SIZE);
1196         memset(tmpdata, 0xff, sizeof(u8)*PGPKT_DATA_SIZE);
1197
1198         //RT_PRINT_DATA(COMP_EFUSE, DBG_LOUD, ("efuse_PgPacketRead-1\n"), data, 8);
1199
1200         //efuse_reg_ctrl(pAdapter,TRUE);//power on
1201         while(bContinual && (efuse_addr  < EFUSE_MAX_SIZE) )
1202         {
1203                 //-------  Header Read -------------
1204                 if(ReadState & PG_STATE_HEADER)
1205                 {
1206                         if(efuse_OneByteRead(dev, efuse_addr ,&efuse_data)&&(efuse_data!=0xFF)){
1207                                 hoffset = (efuse_data>>4) & 0x0F;
1208                                 hworden =  efuse_data & 0x0F;
1209                                 word_cnts = efuse_CalculateWordCnts(hworden);
1210                                 bDataEmpty = TRUE ;
1211
1212                                 if(hoffset==offset){
1213                                         for(tmpidx = 0;tmpidx< word_cnts*2 ;tmpidx++){
1214                                                 if(efuse_OneByteRead(dev, efuse_addr+1+tmpidx ,&efuse_data) ){
1215                                                         tmpdata[tmpidx] = efuse_data;
1216                                                         if(efuse_data!=0xff){
1217                                                                 bDataEmpty = FALSE;
1218                                                         }
1219                                                 }
1220                                         }
1221                                         if(bDataEmpty==FALSE){
1222                                                 ReadState = PG_STATE_DATA;
1223                                         }else{//read next header
1224                                                 efuse_addr = efuse_addr + (word_cnts*2)+1;
1225                                                 ReadState = PG_STATE_HEADER;
1226                                         }
1227                                 }
1228                                 else{//read next header
1229                                         efuse_addr = efuse_addr + (word_cnts*2)+1;
1230                                         ReadState = PG_STATE_HEADER;
1231                                 }
1232
1233                         }
1234                         else{
1235                                 bContinual = FALSE ;
1236                         }
1237                 }
1238                 //-------  Data section Read -------------
1239                 else if(ReadState & PG_STATE_DATA)
1240                 {
1241                         efuse_WordEnableDataRead(hworden,tmpdata,data);
1242                         efuse_addr = efuse_addr + (word_cnts*2)+1;
1243                         ReadState = PG_STATE_HEADER;
1244                 }
1245
1246         }
1247         //efuse_reg_ctrl(pAdapter,FALSE);//power off
1248
1249         //RT_PRINT_DATA(COMP_EFUSE, DBG_LOUD, ("efuse_PgPacketRead-2\n"), data, 8);
1250
1251         if(     (data[0]==0xff) &&(data[1]==0xff) && (data[2]==0xff)  && (data[3]==0xff) &&
1252                 (data[4]==0xff) &&(data[5]==0xff) && (data[6]==0xff)  && (data[7]==0xff))
1253                 return FALSE;
1254         else
1255                 return TRUE;
1256
1257 }       // efuse_PgPacketRead
1258
1259
1260 /*-----------------------------------------------------------------------------
1261  * Function:    efuse_PgPacketWrite
1262  *
1263  * Overview:    Send A G package for different section in real efuse area.
1264  *                              For 92S, One PG package contain 8 bytes content and 4 word
1265  *                              unit. PG header = 0x[bit7-4=offset][bit3-0word enable]
1266  *
1267  * Input:       NONE
1268  *
1269  * Output:      NONE
1270  *
1271  * Return:      NONE
1272  *
1273  * Revised History:
1274  * When                 Who             Remark
1275  * 11/16/2008   MHC             Reorganize code Arch and assign as local API.
1276  *
1277  *---------------------------------------------------------------------------*/
1278 static u8 efuse_PgPacketWrite(struct net_device* dev, u8 offset, u8 word_en,u8 *data)
1279 {
1280         u8 WriteState = PG_STATE_HEADER;
1281
1282         bool bContinual = TRUE,bDataEmpty=TRUE, bResult = TRUE;
1283         u16 efuse_addr = 0;
1284         u8 efuse_data;
1285
1286         u8 pg_header = 0;
1287
1288         //u16 tmp_addr=0;
1289         u8 tmp_word_cnts=0,target_word_cnts=0;
1290         u8 tmp_header,match_word_en,tmp_word_en;
1291
1292         //u8    efuse_clk_ori,efuse_clk_new;
1293
1294         PGPKT_STRUCT target_pkt;
1295         PGPKT_STRUCT tmp_pkt;
1296
1297         u8 originaldata[sizeof(u8)*8];
1298         u8 tmpindex = 0,badworden = 0x0F;
1299
1300         static u32 repeat_times = 0;
1301
1302         if( efuse_GetCurrentSize(dev) >= EFUSE_MAX_SIZE)
1303         {
1304                 printk("efuse_PgPacketWrite error \n");
1305                 return FALSE;
1306         }
1307
1308         // Init the 8 bytes content as 0xff
1309         target_pkt.offset = offset;
1310         target_pkt.word_en= word_en;
1311
1312         //PlatformFillMemory((PVOID)target_pkt.data, sizeof(u8)*8, 0xFF);
1313         memset(target_pkt.data,0xFF,sizeof(u8)*8);
1314
1315         efuse_WordEnableDataRead(word_en,data,target_pkt.data);
1316         target_word_cnts = efuse_CalculateWordCnts(target_pkt.word_en);
1317
1318         //efuse_reg_ctrl(pAdapter,TRUE);//power on
1319         printk("EFUSE Power ON\n");
1320
1321         while( bContinual && (efuse_addr  < EFUSE_MAX_SIZE) )
1322         {
1323
1324                 if(WriteState==PG_STATE_HEADER)
1325                 {
1326                         bDataEmpty=TRUE;
1327                         badworden = 0x0F;
1328                         //************  so *******************
1329                         printk("EFUSE PG_STATE_HEADER\n");
1330                         if (    efuse_OneByteRead(dev, efuse_addr ,&efuse_data) &&
1331                                 (efuse_data!=0xFF))
1332                         {
1333                                 tmp_header  =  efuse_data;
1334
1335                                 tmp_pkt.offset  = (tmp_header>>4) & 0x0F;
1336                                 tmp_pkt.word_en         = tmp_header & 0x0F;
1337                                 tmp_word_cnts =  efuse_CalculateWordCnts(tmp_pkt.word_en);
1338
1339                                 //************  so-1 *******************
1340                                 if(tmp_pkt.offset  != target_pkt.offset)
1341                                 {
1342                                         efuse_addr = efuse_addr + (tmp_word_cnts*2) +1; //Next pg_packet
1343                                         #if (EFUSE_ERROE_HANDLE == 1)
1344                                         WriteState = PG_STATE_HEADER;
1345                                         #endif
1346                                 }
1347                                 else
1348                                 {
1349                                         //************  so-2 *******************
1350                                         for(tmpindex=0 ; tmpindex<(tmp_word_cnts*2) ; tmpindex++)
1351                                         {
1352                                                 if(efuse_OneByteRead(dev, (efuse_addr+1+tmpindex) ,&efuse_data)&&(efuse_data != 0xFF)){
1353                                                         bDataEmpty = FALSE;
1354                                                 }
1355                                         }
1356                                         //************  so-2-1 *******************
1357                                         if(bDataEmpty == FALSE)
1358                                         {
1359                                                 efuse_addr = efuse_addr + (tmp_word_cnts*2) +1; //Next pg_packet
1360                                                 #if (EFUSE_ERROE_HANDLE == 1)
1361                                                 WriteState=PG_STATE_HEADER;
1362                                                 #endif
1363                                         }
1364                                         else
1365                                         {//************  so-2-2 *******************
1366                                                 match_word_en = 0x0F;
1367                                                 if(   !( (target_pkt.word_en&BIT0)|(tmp_pkt.word_en&BIT0)  ))
1368                                                 {
1369                                                          match_word_en &= (~BIT0);
1370                                                 }
1371                                                 if(   !( (target_pkt.word_en&BIT1)|(tmp_pkt.word_en&BIT1)  ))
1372                                                 {
1373                                                          match_word_en &= (~BIT1);
1374                                                 }
1375                                                 if(   !( (target_pkt.word_en&BIT2)|(tmp_pkt.word_en&BIT2)  ))
1376                                                 {
1377                                                          match_word_en &= (~BIT2);
1378                                                 }
1379                                                 if(   !( (target_pkt.word_en&BIT3)|(tmp_pkt.word_en&BIT3)  ))
1380                                                 {
1381                                                          match_word_en &= (~BIT3);
1382                                                 }
1383
1384                                                 //************  so-2-2-A *******************
1385                                                 if((match_word_en&0x0F)!=0x0F)
1386                                                 {
1387                                                         badworden = efuse_WordEnableDataWrite(dev,efuse_addr+1, tmp_pkt.word_en ,target_pkt.data);
1388
1389                                                         //************  so-2-2-A-1 *******************
1390                                                         //############################
1391                                                         if(0x0F != (badworden&0x0F))
1392                                                         {
1393                                                                 u8 reorg_offset = offset;
1394                                                                 u8 reorg_worden=badworden;
1395                                                                 efuse_PgPacketWrite(dev,reorg_offset,reorg_worden,originaldata);
1396                                                         }
1397                                                         //############################
1398
1399                                                         tmp_word_en = 0x0F;
1400                                                         if(  (target_pkt.word_en&BIT0)^(match_word_en&BIT0)  )
1401                                                         {
1402                                                                 tmp_word_en &= (~BIT0);
1403                                                         }
1404                                                         if(   (target_pkt.word_en&BIT1)^(match_word_en&BIT1) )
1405                                                         {
1406                                                                 tmp_word_en &=  (~BIT1);
1407                                                         }
1408                                                         if(   (target_pkt.word_en&BIT2)^(match_word_en&BIT2) )
1409                                                         {
1410                                                                 tmp_word_en &= (~BIT2);
1411                                                         }
1412                                                         if(   (target_pkt.word_en&BIT3)^(match_word_en&BIT3) )
1413                                                         {
1414                                                                 tmp_word_en &=(~BIT3);
1415                                                         }
1416
1417                                                         //************  so-2-2-A-2 *******************
1418                                                         if((tmp_word_en&0x0F)!=0x0F){
1419                                                                 //reorganize other pg packet
1420                                                                 //efuse_addr = efuse_addr + (2*tmp_word_cnts) +1;//next pg packet addr
1421                                                                 efuse_addr = efuse_GetCurrentSize(dev);
1422                                                                 //===========================
1423                                                                 target_pkt.offset = offset;
1424                                                                 target_pkt.word_en= tmp_word_en;
1425                                                                 //===========================
1426                                                         }else{
1427                                                                 bContinual = FALSE;
1428                                                         }
1429                                                         #if (EFUSE_ERROE_HANDLE == 1)
1430                                                         WriteState=PG_STATE_HEADER;
1431                                                         repeat_times++;
1432                                                         if(repeat_times>EFUSE_REPEAT_THRESHOLD_){
1433                                                                 bContinual = FALSE;
1434                                                                 bResult = FALSE;
1435                                                         }
1436                                                         #endif
1437                                                 }
1438                                                 else{//************  so-2-2-B *******************
1439                                                         //reorganize other pg packet
1440                                                         efuse_addr = efuse_addr + (2*tmp_word_cnts) +1;//next pg packet addr
1441                                                         //===========================
1442                                                         target_pkt.offset = offset;
1443                                                         target_pkt.word_en= target_pkt.word_en;
1444                                                         //===========================
1445                                                         #if (EFUSE_ERROE_HANDLE == 1)
1446                                                         WriteState=PG_STATE_HEADER;
1447                                                         #endif
1448                                                 }
1449                                         }
1450                                 }
1451                                 printk("EFUSE PG_STATE_HEADER-1\n");
1452                         }
1453                         else            //************  s1: header == oxff  *******************
1454                         {
1455                                 pg_header = ((target_pkt.offset << 4)&0xf0) |target_pkt.word_en;
1456
1457                                 efuse_OneByteWrite(dev,efuse_addr, pg_header);
1458                                 efuse_OneByteRead(dev,efuse_addr, &tmp_header);
1459
1460                                 if(tmp_header == pg_header)
1461                                 { //************  s1-1*******************
1462                                         WriteState = PG_STATE_DATA;
1463                                 }
1464                                 #if (EFUSE_ERROE_HANDLE == 1)
1465                                 else if(tmp_header == 0xFF){//************  s1-3: if Write or read func doesn't work *******************
1466                                         //efuse_addr doesn't change
1467                                         WriteState = PG_STATE_HEADER;
1468                                         repeat_times++;
1469                                         if(repeat_times>EFUSE_REPEAT_THRESHOLD_){
1470                                                 bContinual = FALSE;
1471                                                 bResult = FALSE;
1472                                         }
1473                                 }
1474                                 #endif
1475                                 else
1476                                 {//************  s1-2 : fixed the header procedure *******************
1477                                         tmp_pkt.offset = (tmp_header>>4) & 0x0F;
1478                                         tmp_pkt.word_en=  tmp_header & 0x0F;
1479                                         tmp_word_cnts =  efuse_CalculateWordCnts(tmp_pkt.word_en);
1480
1481                                         //************  s1-2-A :cover the exist data *******************
1482                                         memset(originaldata,0xff,sizeof(u8)*8);
1483                                         //PlatformFillMemory((PVOID)originaldata, sizeof(u8)*8, 0xff);
1484
1485                                         if(efuse_PgPacketRead( dev, tmp_pkt.offset,originaldata))
1486                                         {       //check if data exist
1487                                                 //efuse_reg_ctrl(pAdapter,TRUE);//power on
1488                                                 badworden = efuse_WordEnableDataWrite(dev,efuse_addr+1,tmp_pkt.word_en,originaldata);
1489                                                 //############################
1490                                                 if(0x0F != (badworden&0x0F))
1491                                                 {
1492                                                         u8 reorg_offset = tmp_pkt.offset;
1493                                                         u8 reorg_worden=badworden;
1494                                                         efuse_PgPacketWrite(dev,reorg_offset,reorg_worden,originaldata);
1495                                                         efuse_addr = efuse_GetCurrentSize(dev);
1496                                                 }
1497                                                 //############################
1498                                                 else{
1499                                                         efuse_addr = efuse_addr + (tmp_word_cnts*2) +1; //Next pg_packet
1500                                                 }
1501                                         }
1502                                          //************  s1-2-B: wrong address*******************
1503                                         else
1504                                         {
1505                                                 efuse_addr = efuse_addr + (tmp_word_cnts*2) +1; //Next pg_packet
1506                                         }
1507
1508                                         #if (EFUSE_ERROE_HANDLE == 1)
1509                                         WriteState=PG_STATE_HEADER;
1510                                         repeat_times++;
1511                                         if(repeat_times>EFUSE_REPEAT_THRESHOLD_){
1512                                                 bContinual = FALSE;
1513                                                 bResult = FALSE;
1514                                         }
1515                                         #endif
1516
1517                                         printk("EFUSE PG_STATE_HEADER-2\n");
1518                                 }
1519
1520                         }
1521
1522                 }
1523                 //write data state
1524                 else if(WriteState==PG_STATE_DATA)
1525                 {       //************  s1-1  *******************
1526                         printk("EFUSE PG_STATE_DATA\n");
1527                         badworden = 0x0f;
1528                         badworden = efuse_WordEnableDataWrite(dev,efuse_addr+1,target_pkt.word_en,target_pkt.data);
1529                         if((badworden&0x0F)==0x0F)
1530                         { //************  s1-1-A *******************
1531                                 bContinual = FALSE;
1532                         }
1533                         else
1534                         {//reorganize other pg packet //************  s1-1-B *******************
1535                                 efuse_addr = efuse_addr + (2*target_word_cnts) +1;//next pg packet addr
1536
1537                                 //===========================
1538                                 target_pkt.offset = offset;
1539                                 target_pkt.word_en= badworden;
1540                                 target_word_cnts =  efuse_CalculateWordCnts(target_pkt.word_en);
1541                                 //===========================
1542                                 #if (EFUSE_ERROE_HANDLE == 1)
1543                                 WriteState=PG_STATE_HEADER;
1544                                 repeat_times++;
1545                                 if(repeat_times>EFUSE_REPEAT_THRESHOLD_){
1546                                         bContinual = FALSE;
1547                                         bResult = FALSE;
1548                                 }
1549                                 #endif
1550                                 printk("EFUSE PG_STATE_HEADER-3\n");
1551                         }
1552                 }
1553         }
1554
1555         //efuse_reg_ctrl(pAdapter,FALSE);//power off
1556
1557         return TRUE;
1558 }       // efuse_PgPacketWrite
1559
1560
1561 /*-----------------------------------------------------------------------------
1562  * Function:    efuse_WordEnableDataRead
1563  *
1564  * Overview:    Read allowed word in current efuse section data.
1565  *
1566  * Input:       NONE
1567  *
1568  * Output:      NONE
1569  *
1570  * Return:      NONE
1571  *
1572  * Revised History:
1573  * When                 Who             Remark
1574  * 11/16/2008   MHC             Create Version 0.
1575  * 11/21/2008   MHC             Fix Write bug when we only enable late word.
1576  *
1577  *---------------------------------------------------------------------------*/
1578 static  void
1579 efuse_WordEnableDataRead(       u8 word_en,u8 *sourdata,u8 *targetdata)
1580 {
1581         //u8 tmpindex = 0;
1582
1583         //DbgPrint("efuse_WordEnableDataRead word_en = %x\n", word_en);
1584
1585         //RT_PRINT_DATA(COMP_EFUSE, DBG_LOUD, ("sourdata\n"), sourdata, 8);
1586         //RT_PRINT_DATA(COMP_EFUSE, DBG_LOUD, ("targetdata\n"), targetdata, 8);
1587
1588         if (!(word_en&BIT0))
1589         {
1590                 targetdata[0] = sourdata[0];//sourdata[tmpindex++];
1591                 targetdata[1] = sourdata[1];//sourdata[tmpindex++];
1592         }
1593         if (!(word_en&BIT1))
1594         {
1595                 targetdata[2] = sourdata[2];//sourdata[tmpindex++];
1596                 targetdata[3] = sourdata[3];//sourdata[tmpindex++];
1597         }
1598         if (!(word_en&BIT2))
1599         {
1600                 targetdata[4] = sourdata[4];//sourdata[tmpindex++];
1601                 targetdata[5] = sourdata[5];//sourdata[tmpindex++];
1602         }
1603         if (!(word_en&BIT3))
1604         {
1605                 targetdata[6] = sourdata[6];//sourdata[tmpindex++];
1606                 targetdata[7] = sourdata[7];//sourdata[tmpindex++];
1607         }
1608 }       // efuse_WordEnableDataRead
1609
1610
1611 /*-----------------------------------------------------------------------------
1612  * Function:    efuse_WordEnableDataWrite
1613  *
1614  * Overview:    Write necessary word unit into current efuse section!
1615  *
1616  * Input:       NONE
1617  *
1618  * Output:      NONE
1619  *
1620  * Return:      NONE
1621  *
1622  * Revised History:
1623  * When                 Who             Remark
1624  * 11/16/2008   MHC             Reorganize Efuse operate flow!!.
1625  *
1626  *---------------------------------------------------------------------------*/
1627 static  u8
1628 efuse_WordEnableDataWrite(      struct net_device*      dev,    u16 efuse_addr, u8 word_en, u8 *data)
1629 {
1630         u16 tmpaddr = 0;
1631         u16 start_addr = efuse_addr;
1632         u8 badworden = 0x0F;
1633         //u8 NextState;
1634         u8 tmpdata[8];
1635
1636         memset(tmpdata,0xff,PGPKT_DATA_SIZE);
1637         //PlatformFillMemory((PVOID)tmpdata, PGPKT_DATA_SIZE, 0xff);
1638
1639         //RT_TRACE(COMP_EFUSE, "word_en = %x efuse_addr=%x\n", word_en, efuse_addr);
1640
1641         //RT_PRINT_DATA(COMP_EFUSE, DBG_LOUD, ("U-EFUSE\n"), data, 8);
1642
1643         if(!(word_en&BIT0))
1644         {
1645                 tmpaddr = start_addr;
1646                 efuse_OneByteWrite(dev,start_addr++, data[0]);
1647                 efuse_OneByteWrite(dev,start_addr++, data[1]);
1648
1649                 efuse_OneByteRead(dev,tmpaddr, &tmpdata[0]);
1650                 efuse_OneByteRead(dev,tmpaddr+1, &tmpdata[1]);
1651                 if((data[0]!=tmpdata[0])||(data[1]!=tmpdata[1])){
1652                         badworden &= (~BIT0);
1653                 }
1654         }
1655         if(!(word_en&BIT1))
1656         {
1657                 tmpaddr = start_addr;
1658                 efuse_OneByteWrite(dev,start_addr++, data[2]);
1659                 efuse_OneByteWrite(dev,start_addr++, data[3]);
1660
1661                 efuse_OneByteRead(dev,tmpaddr    , &tmpdata[2]);
1662                 efuse_OneByteRead(dev,tmpaddr+1, &tmpdata[3]);
1663                 if((data[2]!=tmpdata[2])||(data[3]!=tmpdata[3])){
1664                         badworden &=( ~BIT1);
1665                 }
1666         }
1667         if(!(word_en&BIT2))
1668         {
1669                 tmpaddr = start_addr;
1670                 efuse_OneByteWrite(dev,start_addr++, data[4]);
1671                 efuse_OneByteWrite(dev,start_addr++, data[5]);
1672
1673                 efuse_OneByteRead(dev,tmpaddr, &tmpdata[4]);
1674                 efuse_OneByteRead(dev,tmpaddr+1, &tmpdata[5]);
1675                 if((data[4]!=tmpdata[4])||(data[5]!=tmpdata[5])){
1676                         badworden &=( ~BIT2);
1677                 }
1678         }
1679         if(!(word_en&BIT3))
1680         {
1681                 tmpaddr = start_addr;
1682                 efuse_OneByteWrite(dev,start_addr++, data[6]);
1683                 efuse_OneByteWrite(dev,start_addr++, data[7]);
1684
1685                 efuse_OneByteRead(dev,tmpaddr, &tmpdata[6]);
1686                 efuse_OneByteRead(dev,tmpaddr+1, &tmpdata[7]);
1687                 if((data[6]!=tmpdata[6])||(data[7]!=tmpdata[7])){
1688                         badworden &=( ~BIT3);
1689                 }
1690         }
1691         return badworden;
1692 }       // efuse_WordEnableDataWrite
1693
1694
1695 /*-----------------------------------------------------------------------------
1696  * Function:    efuse_PowerSwitch
1697  *
1698  * Overview:    When we want to enable write operation, we should change to
1699  *                              pwr on state. When we stop write, we should switch to 500k mode
1700  *                              and disable LDO 2.5V.
1701  *
1702  * Input:       NONE
1703  *
1704  * Output:      NONE
1705  *
1706  * Return:      NONE
1707  *
1708  * Revised History:
1709  * When                 Who             Remark
1710  * 11/17/2008   MHC             Create Version 0.
1711  *
1712  *---------------------------------------------------------------------------*/
1713 static  void
1714 efuse_PowerSwitch(struct net_device* dev, u8 PwrState)
1715 {
1716         u8      tempval;
1717         if (PwrState == TRUE)
1718         {
1719                 // Enable LDO 2.5V for write action
1720                 tempval = read_nic_byte(dev, EFUSE_TEST+3);
1721                 write_nic_byte(dev, EFUSE_TEST+3, (tempval | 0x80));
1722
1723                 // Change Efuse Clock for write action to 40MHZ
1724                 write_nic_byte(dev, EFUSE_CLK, 0x03);
1725         }
1726         else
1727         {
1728                 // Enable LDO 2.5V for write action
1729                 tempval = read_nic_byte(dev, EFUSE_TEST+3);
1730                 write_nic_byte(dev, EFUSE_TEST+3, (tempval & 0x7F));
1731
1732                 // Change Efuse Clock for write action to 500K
1733                 write_nic_byte(dev, EFUSE_CLK, 0x02);
1734         }
1735
1736 }       /* efuse_PowerSwitch */
1737
1738
1739 /*-----------------------------------------------------------------------------
1740  * Function:    efuse_GetCurrentSize
1741  *
1742  * Overview:    Get current efuse size!!!
1743  *
1744  * Input:       NONE
1745  *
1746  * Output:      NONE
1747  *
1748  * Return:      NONE
1749  *
1750  * Revised History:
1751  * When                 Who             Remark
1752  * 11/16/2008   MHC             Create Version 0.
1753  *
1754  *---------------------------------------------------------------------------*/
1755 static  u16
1756 efuse_GetCurrentSize(struct net_device* dev)
1757 {
1758         bool bContinual = TRUE;
1759
1760         u16 efuse_addr = 0;
1761         u8 hoffset=0,hworden=0;
1762         u8 efuse_data,word_cnts=0;
1763
1764         //efuse_reg_ctrl(pAdapter,TRUE);//power on
1765
1766         while ( bContinual &&
1767                         efuse_OneByteRead(dev, efuse_addr ,&efuse_data) &&
1768                         (efuse_addr  < EFUSE_MAX_SIZE) )
1769         {
1770                 if(efuse_data!=0xFF)
1771                 {
1772                         hoffset = (efuse_data>>4) & 0x0F;
1773                         hworden =  efuse_data & 0x0F;
1774                         word_cnts = efuse_CalculateWordCnts(hworden);
1775                         //read next header
1776                         efuse_addr = efuse_addr + (word_cnts*2)+1;
1777                 }
1778                 else
1779                 {
1780                         bContinual = FALSE ;
1781                 }
1782         }
1783
1784         //efuse_reg_ctrl(pAdapter,FALSE);//power off
1785
1786         return efuse_addr;
1787
1788 }       // efuse_GetCurrentSize}
1789
1790
1791 /*  11/16/2008 MH Add description. Get current efuse area enabled word!!. */
1792 static u8
1793 efuse_CalculateWordCnts(u8      word_en)
1794 {
1795         u8 word_cnts = 0;
1796         if(!(word_en & BIT0))   word_cnts++; // 0 : write enable
1797         if(!(word_en & BIT1))   word_cnts++;
1798         if(!(word_en & BIT2))   word_cnts++;
1799         if(!(word_en & BIT3))   word_cnts++;
1800         return word_cnts;
1801 }       // efuse_CalculateWordCnts
1802
1803
1804 /*-----------------------------------------------------------------------------
1805  * Function:    efuse_ResetLoader
1806  *
1807  * Overview:    When read Efuse Fail we must reset loader!!!!
1808  *
1809  * Input:       NONE
1810  *
1811  * Output:      NONE
1812  *
1813  * Return:      NONE
1814  *
1815  * Revised History:
1816  * When                 Who             Remark
1817  * 11/22/2008   MHC             Create Version 0.
1818  *
1819  *---------------------------------------------------------------------------*/
1820 #if 0
1821 static void efuse_ResetLoader(struct net_device* dev)
1822 {
1823         u16     tmpU2b;
1824
1825         //
1826         // 2008/11/22 MH Sometimes, we may read efuse fail, for preventing the condition
1827         // We have to reset loader.
1828         //
1829         tmpU2b = read_nic_word(dev, SYS_FUNC_EN);
1830         write_nic_word(dev, SYS_FUNC_EN, (tmpU2b&~(BIT12)));
1831         //PlatformStallExecution(10000);        // How long should we delay!!!
1832         mdelay(10);
1833         write_nic_word(dev, SYS_FUNC_EN, (tmpU2b|BIT12));
1834         //PlatformStallExecution(10000);        // How long should we delay!!!
1835         mdelay(10);
1836
1837 }       // efuse_ResetLoader
1838 #endif
1839
1840 /*-----------------------------------------------------------------------------
1841  * Function:    EFUSE_ProgramMap
1842  *
1843  * Overview:    Read EFUSE map file and execute PG.
1844  *
1845  * Input:       NONE
1846  *
1847  * Output:      NONE
1848  *
1849  * Return:      NONE
1850  *
1851  * Revised History:
1852  * When                 Who             Remark
1853  * 11/10/2008   MHC             Create Version 0.
1854  *
1855  *---------------------------------------------------------------------------*/
1856  #ifdef TO_DO_LIST
1857 extern  bool    // 0=Shadow 1=Real Efuse
1858 EFUSE_ProgramMap(struct net_device* dev, char* pFileName,u8     TableType)
1859 {
1860         struct r8192_priv       *priv = ieee80211_priv(dev);
1861         s4Byte                  nLinesRead, ithLine;
1862         RT_STATUS               rtStatus = RT_STATUS_SUCCESS;
1863         char*                   szLine;
1864         u32                     u4bRegValue, u4RegMask;
1865         u32                     u4bMove;
1866         u16                     index = 0;
1867         u16                     i;
1868         u8                      eeprom[HWSET_MAX_SIZE_92S];
1869
1870         rtStatus = PlatformReadFile(
1871                                         dev,
1872                                         pFileName,
1873                                         (u8*)(priv->BufOfLines),
1874                                         MAX_LINES_HWCONFIG_TXT,
1875                                         MAX_BYTES_LINE_HWCONFIG_TXT,
1876                                         &nLinesRead
1877                                         );
1878
1879         if(rtStatus == RT_STATUS_SUCCESS)
1880         {
1881                 memcp(pHalData->BufOfLines3, pHalData->BufOfLines,
1882                         nLinesRead*MAX_BYTES_LINE_HWCONFIG_TXT);
1883                 pHalData->nLinesRead3 = nLinesRead;
1884         }
1885
1886         if(rtStatus == RT_STATUS_SUCCESS)
1887         {
1888                 printk("szEepromFile(): read %s ok\n", pFileName);
1889                 for(ithLine = 0; ithLine < nLinesRead; ithLine++)
1890                 {
1891                         szLine = pHalData->BufOfLines[ithLine];
1892                         printk("Line-%d String =%s\n", ithLine, szLine);
1893
1894                         if(!IsCommentString(szLine))
1895                         {
1896                                 // EEPROM map one line has 8 words content.
1897                                 for (i = 0; i < 8; i++)
1898                                 {
1899                                         u32     j;
1900
1901                                         //GetHexValueFromString(szLine, &u4bRegValue, &u4bMove);
1902                                         efuse_ParsingMap(szLine, &u4bRegValue, &u4bMove);
1903
1904                                         // Get next hex value as EEPROM value.
1905                                         szLine += u4bMove;
1906                                         //WriteEEprom(dev, (u16)(ithLine*8+i), (u16)u4bRegValue);
1907                                         eeprom[index++] = (u8)(u4bRegValue&0xff);
1908                                         eeprom[index++] = (u8)((u4bRegValue>>8)&0xff);
1909
1910                                         printk("Addr-%d = %x\n", (ithLine*8+i), u4bRegValue);
1911                                 }
1912                         }
1913
1914                 }
1915
1916         }
1917         else
1918         {
1919                 printk("szEepromFile(): Fail read%s\n", pFileName);
1920                 return  RT_STATUS_FAILURE;
1921         }
1922
1923
1924         //RT_PRINT_DATA(COMP_EFUSE, DBG_LOUD, ("EFUSE "), eeprom, HWSET_MAX_SIZE_92S);
1925
1926         // Use map file to update real Efuse or shadow modify table.
1927         if (TableType == 1)
1928         {
1929                 efuse_WriteAllMap(dev, eeprom, HWSET_MAX_SIZE_92S);
1930         }
1931         else
1932         {
1933                 // Modify shadow table.
1934                 for (i = 0; i < HWSET_MAX_SIZE_92S; i++)
1935                         EFUSE_ShadowWrite(dev, 1, i, (u32)eeprom[i]);
1936         }
1937
1938         return  rtStatus;
1939 }       /* EFUSE_ProgramMap */
1940
1941 #endif
1942
1943 //
1944 //      Description:
1945 //              Return TRUE if chTmp is represent for hex digit and
1946 //              FALSE otherwise.
1947 //
1948 //
1949 bool IsHexDigit(        char chTmp)
1950 {
1951         if( (chTmp >= '0' && chTmp <= '9') ||
1952                 (chTmp >= 'a' && chTmp <= 'f') ||
1953                 (chTmp >= 'A' && chTmp <= 'F') )
1954         {
1955                 return TRUE;
1956         }
1957         else
1958         {
1959                 return FALSE;
1960         }
1961 }
1962
1963 //
1964 //      Description:
1965 //              Translate a character to hex digit.
1966 //
1967 u32 MapCharToHexDigit(char chTmp)
1968 {
1969         if(chTmp >= '0' && chTmp <= '9')
1970                 return (chTmp - '0');
1971         else if(chTmp >= 'a' && chTmp <= 'f')
1972                 return (10 + (chTmp - 'a'));
1973         else if(chTmp >= 'A' && chTmp <= 'F')
1974                 return (10 + (chTmp - 'A'));
1975         else
1976                 return 0;
1977 }
1978
1979 /*-----------------------------------------------------------------------------
1980  * Function:    efuse_ParsingMap
1981  *
1982  * Overview:
1983  *
1984  * Input:       NONE
1985  *
1986  * Output:      NONE
1987  *
1988  * Return:      NONE
1989  *
1990  * Revised History:
1991  * When                 Who             Remark
1992  * 11/08/2008   MHC             Create Version 0.
1993  *
1994  *---------------------------------------------------------------------------*/
1995 #ifdef TO_DO_LIST
1996 static  bool
1997 efuse_ParsingMap(char* szStr,u32* pu4bVal,u32* pu4bMove)
1998 {
1999         char*           szScan = szStr;
2000
2001         // Check input parameter.
2002         if(szStr == NULL || pu4bVal == NULL || pu4bMove == NULL)
2003         {
2004                 //RT_TRACE(COMP_EFUSE,
2005                 //"eeprom_ParsingMap(): Invalid IN args! szStr: %p, pu4bVal: %p, pu4bMove: %p\n",
2006                 //szStr, pu4bVal, pu4bMove);
2007                 return FALSE;
2008         }
2009
2010         // Initialize output.
2011         *pu4bMove = 0;
2012         *pu4bVal = 0;
2013
2014         // Skip leading space.
2015         while(  *szScan != '\0' &&
2016                         (*szScan == ' ' || *szScan == '\t') )
2017         {
2018                 szScan++;
2019                 (*pu4bMove)++;
2020         }
2021
2022         // Check if szScan is now pointer to a character for hex digit,
2023         // if not, it means this is not a valid hex number.
2024         if(!IsHexDigit(*szScan))
2025         {
2026                 return FALSE;
2027         }
2028
2029         // Parse each digit.
2030         do
2031         {
2032                 (*pu4bVal) <<= 4;
2033                 *pu4bVal += MapCharToHexDigit(*szScan);
2034
2035                 szScan++;
2036                 (*pu4bMove)++;
2037         } while(IsHexDigit(*szScan));
2038
2039         return TRUE;
2040
2041 }       /* efuse_ParsingMap */
2042 #endif
2043
2044 //
2045 // Useless Section Code Now!!!!!!
2046 //
2047 // Porting from 8712 SDIO
2048 int efuse_one_byte_rw(struct net_device* dev, u8 bRead, u16 addr, u8 *data)
2049 {
2050         u32 bResult;
2051         //u8 efuse_ctlreg,tmpidx = 0;
2052         u8 tmpidx = 0;
2053         u8 tmpv8=0;
2054
2055         // -----------------e-fuse reg ctrl ---------------------------------
2056
2057         write_nic_byte(dev, EFUSE_CTRL+1, (u8)(addr&0xff));             //address
2058         tmpv8 = ((u8)((addr>>8) &0x03) ) | (read_nic_byte(dev, EFUSE_CTRL+2)&0xFC );
2059         write_nic_byte(dev, EFUSE_CTRL+2, tmpv8);
2060
2061         if(TRUE==bRead){
2062
2063                 write_nic_byte(dev, EFUSE_CTRL+3,  0x72);//read cmd
2064
2065                 while(!(0x80 & read_nic_byte(dev, EFUSE_CTRL+3)) && (tmpidx<100) ){
2066                         tmpidx++;
2067                 }
2068                 if(tmpidx<100){
2069                         *data=read_nic_byte(dev, EFUSE_CTRL);
2070                         bResult = TRUE;
2071                 }
2072                 else
2073                 {
2074                         *data = 0;
2075                         bResult = FALSE;
2076                 }
2077
2078         }
2079         else{
2080                 //return        0;
2081                 write_nic_byte(dev, EFUSE_CTRL, *data);//data
2082
2083                 write_nic_byte(dev, EFUSE_CTRL+3, 0xF2);//write cmd
2084
2085                 while((0x80 & read_nic_byte(dev, EFUSE_CTRL+3)) && (tmpidx<100) ){
2086                         tmpidx++;
2087                 }
2088                 if(tmpidx<100)
2089                 {
2090                         *data=read_nic_byte(dev, EFUSE_CTRL);
2091                         bResult = TRUE;
2092                 }
2093                 else
2094                 {
2095                         *data = 0;
2096                         bResult = FALSE;
2097                 }
2098
2099         }
2100         return bResult;
2101 }
2102 //------------------------------------------------------------------------------
2103 void efuse_access(struct net_device* dev, u8 bRead,u16 start_addr, u8 cnts, u8 *data)
2104 {
2105         u8      efuse_clk_ori,efuse_clk_new;//,tmp8;
2106         u32 i = 0;
2107
2108         if(start_addr>0x200) return;
2109         //RT_TRACE(_module_rtl871x_mp_ioctl_c_,_drv_err_,
2110         //      ("\n ===> efuse_access [start_addr=0x%x cnts:%d dataarray:0x%08x  Query Efuse].\n",start_addr,cnts,data));
2111         // -----------------SYS_FUNC_EN Digital Core Vdd enable ---------------------------------
2112         efuse_clk_ori = read_nic_byte(dev,SYS_FUNC_EN+1);
2113         efuse_clk_new = efuse_clk_ori|0x20;
2114
2115         if(efuse_clk_new!= efuse_clk_ori){
2116                 //RT_TRACE(_module_rtl871x_mp_ioctl_c_,_drv_err_,("====write 0x10250003=====\n"));
2117                 write_nic_byte(dev, SYS_FUNC_EN+1, efuse_clk_new);
2118         }
2119 #ifdef _POWERON_DELAY_
2120         mdelay(10);
2121 #endif
2122         // -----------------e-fuse pwr & clk reg ctrl ---------------------------------
2123         write_nic_byte(dev, EFUSE_TEST+3, (read_nic_byte(dev, EFUSE_TEST+3)|0x80));
2124         write_nic_byte(dev, EFUSE_CLK_CTRL, (read_nic_byte(dev, EFUSE_CLK_CTRL)|0x03));
2125
2126 #ifdef _PRE_EXECUTE_READ_CMD_
2127         {
2128                 unsigned char tmpdata;
2129                 efuse_OneByteRead(dev, 0,&tmpdata);
2130         }
2131 #endif
2132
2133         //-----------------e-fuse one byte read / write ------------------------------
2134         for(i=0;i<cnts;i++){
2135                 efuse_one_byte_rw(dev,bRead, start_addr+i , data+i);
2136                 ////RT_TRACE(_module_rtl871x_mp_ioctl_c_,_drv_err_,("==>efuse_access addr:0x%02x value:0x%02x\n",data+i,*(data+i)));
2137         }
2138         // -----------------e-fuse pwr & clk reg ctrl ---------------------------------
2139         write_nic_byte(dev, EFUSE_TEST+3, read_nic_byte(dev, EFUSE_TEST+3)&0x7f);
2140         write_nic_byte(dev, EFUSE_CLK_CTRL, read_nic_byte(dev, EFUSE_CLK_CTRL)&0xfd);
2141
2142         // -----------------SYS_FUNC_EN Digital Core Vdd disable ---------------------------------
2143         if(efuse_clk_new != efuse_clk_ori)      write_nic_byte(dev, 0x10250003, efuse_clk_ori);
2144
2145 }
2146 //------------------------------------------------------------------------------
2147 //------------------------------------------------------------------------------
2148
2149 #ifdef TO_DO_LIST
2150 static  void efuse_reg_ctrl(struct net_device* dev, u8 bPowerOn)
2151 {
2152         if(TRUE==bPowerOn){
2153                 // -----------------SYS_FUNC_EN Digital Core Vdd enable ---------------------------------
2154                 write_nic_byte(dev, SYS_FUNC_EN+1,  read_nic_byte(dev,SYS_FUNC_EN+1)|0x20);
2155 #ifdef _POWERON_DELAY_
2156                 mdelay(10);
2157 #endif
2158                 // -----------------e-fuse pwr & clk reg ctrl ---------------------------------
2159                 write_nic_byte(dev, EFUSE_TEST+4, (read_nic_byte(dev, EFUSE_TEST+4)|0x80));
2160                 write_nic_byte(dev, EFUSE_CLK_CTRL, (read_nic_byte(dev, EFUSE_CLK_CTRL)|0x03));
2161 #ifdef _PRE_EXECUTE_READ_CMD_
2162                 {
2163                         unsigned char tmpdata;
2164                         efuse_OneByteRead(dev, 0,&tmpdata);
2165                 }
2166
2167 #endif
2168         }
2169         else{
2170                 // -----------------e-fuse pwr & clk reg ctrl ---------------------------------
2171                 write_nic_byte(dev, EFUSE_TEST+4, read_nic_byte(dev, EFUSE_TEST+4)&0x7f);
2172                 write_nic_byte(dev, EFUSE_CLK_CTRL, read_nic_byte(dev, EFUSE_CLK_CTRL)&0xfd);
2173                 // -----------------SYS_FUNC_EN Digital Core Vdd disable ---------------------------------
2174
2175                 //write_nic_byte(pAdapter, SYS_FUNC_EN+1,  read_nic_byte(pAdapter,SYS_FUNC_EN+1)&0xDF);
2176         }
2177
2178
2179 }
2180 #endif
2181 //------------------------------------------------------------------------------
2182
2183 //------------------------------------------------------------------------------
2184 void efuse_read_data(struct net_device* dev,u8 efuse_read_item,u8 *data,u32 data_size)
2185 {
2186         u8 offset, word_start,byte_start,byte_cnts;
2187         u8      efusedata[EFUSE_MAC_LEN];
2188         u8 *tmpdata = NULL;
2189
2190         u8 pg_pkt_cnts ;
2191
2192         u8 tmpidx;
2193         u8 pg_data[8];
2194         //u8    temp_value[8] = {0xff};
2195
2196         if(efuse_read_item>  (sizeof(RTL8712_SDIO_EFUSE_TABLE)/sizeof(EFUSE_MAP))){
2197                 //error msg
2198                 return ;
2199         }
2200
2201         offset          = RTL8712_SDIO_EFUSE_TABLE[efuse_read_item].offset ;
2202         word_start      = RTL8712_SDIO_EFUSE_TABLE[efuse_read_item].word_start;
2203         byte_start      = RTL8712_SDIO_EFUSE_TABLE[efuse_read_item].byte_start;
2204         byte_cnts       = RTL8712_SDIO_EFUSE_TABLE[efuse_read_item].byte_cnts;
2205
2206         if(data_size!=byte_cnts){
2207                 //error msg
2208                 return;
2209         }
2210
2211         pg_pkt_cnts = (byte_cnts /PGPKT_DATA_SIZE) +1;
2212
2213         if(pg_pkt_cnts > 1){
2214                 //tmpdata = _malloc(pg_pkt_cnts*PGPKT_DATA_SIZE);
2215                 tmpdata = efusedata;
2216
2217                 if(tmpdata!=NULL)
2218                 {
2219                         memset(tmpdata,0xff,pg_pkt_cnts*PGPKT_DATA_SIZE);
2220                         //PlatformFillMemory((PVOID)pg_data, pg_pkt_cnts*PGPKT_DATA_SIZE, 0xff);
2221
2222                         for(tmpidx=0;tmpidx<pg_pkt_cnts;tmpidx++)
2223                         {
2224                                 memset(pg_data,0xff,PGPKT_DATA_SIZE);
2225                                 //PlatformFillMemory((PVOID)pg_data, PGPKT_DATA_SIZE, 0xff);
2226                                 if(TRUE== efuse_PgPacketRead(dev,offset+tmpidx,pg_data))
2227                                 {
2228                                         memcpy(tmpdata+(PGPKT_DATA_SIZE*tmpidx),pg_data,PGPKT_DATA_SIZE);
2229                                         //PlatformMoveMemory((PVOID)(tmpdata+(PGPKT_DATA_SIZE*tmpidx)), (PVOID)pg_data, PGPKT_DATA_SIZE);
2230                                 }
2231                         }
2232                         memcpy(data,(tmpdata+ (2*word_start)+byte_start ),data_size);
2233                         //PlatformMoveMemory((PVOID)data, (PVOID)(tmpdata+ (2*word_start)+byte_start ), data_size);
2234                         //_mfree(tmpdata, pg_pkt_cnts*PGPKT_DATA_SIZE);
2235                 }
2236         }
2237         else
2238         {
2239                 memset(pg_data,0xff,PGPKT_DATA_SIZE);
2240                 //PlatformFillMemory((PVOID)pg_data, PGPKT_DATA_SIZE, 0xff);
2241                 if(TRUE==efuse_PgPacketRead(dev,offset,pg_data)){
2242                         memcpy(data,pg_data+ (2*word_start)+byte_start ,data_size);
2243                         //PlatformMoveMemory((PVOID)data, (PVOID)(pg_data+ (2*word_start)+byte_start), data_size);
2244                 }
2245         }
2246
2247 }
2248 //------------------------------------------------------------------------------
2249 //per interface doesn't alike
2250 void efuse_write_data(struct net_device* dev,u8 efuse_write_item,u8 *data,u32 data_size,u32 bWordUnit)
2251 {
2252         u8 offset, word_start,byte_start,byte_cnts;
2253         u8 word_en = 0x0f,word_cnts;
2254         u8 pg_pkt_cnts ;
2255
2256         u8 tmpidx,tmpbitmask;
2257         u8 pg_data[8],tmpbytes=0;
2258
2259         if(efuse_write_item>  (sizeof(RTL8712_SDIO_EFUSE_TABLE)/sizeof(EFUSE_MAP))){
2260                 //error msg
2261                 return ;
2262         }
2263
2264         offset          = RTL8712_SDIO_EFUSE_TABLE[efuse_write_item].offset ;
2265         word_start      = RTL8712_SDIO_EFUSE_TABLE[efuse_write_item].word_start;
2266         byte_start      = RTL8712_SDIO_EFUSE_TABLE[efuse_write_item].byte_start;
2267         byte_cnts       = RTL8712_SDIO_EFUSE_TABLE[efuse_write_item].byte_cnts;
2268
2269         if(data_size >  byte_cnts){
2270                 //error msg
2271                 return;
2272         }
2273         pg_pkt_cnts = (byte_cnts /PGPKT_DATA_SIZE) +1;
2274         word_cnts = byte_cnts /2 ;
2275
2276         if(byte_cnts %2){
2277                 word_cnts+=1;
2278         }
2279         if((byte_start==1)||((byte_cnts%2)==1)){//situation A
2280
2281                 if((efuse_write_item==EFUSE_F0CIS)||(efuse_write_item==EFUSE_F1CIS)){
2282                         memset(pg_data,0xff,PGPKT_DATA_SIZE);
2283                         //PlatformFillMemory((PVOID)pg_data, PGPKT_DATA_SIZE, 0xff);
2284                         efuse_PgPacketRead(dev,offset,pg_data);
2285
2286                         if(efuse_write_item==EFUSE_F0CIS){
2287                                 word_en = 0x07;
2288                                 memcpy(pg_data+word_start*2+byte_start,data,sizeof(u8)*2);
2289                                 //PlatformMoveMemory((PVOID)(pg_data+word_start*2+byte_start), (PVOID)data, sizeof(u8)*2);
2290                                 efuse_PgPacketWrite(dev,offset,word_en,pg_data+(word_start*2));
2291
2292                                 word_en = 0x00;
2293                                 efuse_PgPacketWrite(dev,(offset+1),word_en,data+2);
2294
2295                                 word_en = 0x00;
2296                                 efuse_PgPacketRead(dev,offset+2,pg_data);
2297                                 memcpy(pg_data,data+2+8,sizeof(u8)*7);
2298                                 //PlatformMoveMemory((PVOID)(pg_data), (PVOID)(data+2+8), sizeof(u8)*7);
2299
2300                                 efuse_PgPacketWrite(dev,(offset+2),word_en,pg_data);
2301                         }
2302                         else if(efuse_write_item==EFUSE_F1CIS){
2303                                 word_en = 0x07;
2304                                 efuse_PgPacketRead(dev,offset,pg_data);
2305                                 pg_data[7] = data[0];
2306                                 efuse_PgPacketWrite(dev,offset,word_en,pg_data+(word_start*2));
2307
2308                                 word_en = 0x00;
2309                                 for(tmpidx = 0 ;tmpidx<(word_cnts/4);tmpidx++){
2310                                         efuse_PgPacketWrite(dev,(offset+1+tmpidx),word_en,data+1+(tmpidx*PGPKT_DATA_SIZE));
2311                                 }
2312                         }
2313
2314                 }
2315                 else{
2316                         memset(pg_data,0xff,PGPKT_DATA_SIZE);
2317                         //PlatformFillMemory((PVOID)pg_data, PGPKT_DATA_SIZE, 0xff);
2318                         if((efuse_write_item==EFUSE_SDIO_SETTING)||(efuse_write_item==EFUSE_CCCR)){
2319                                 word_en = 0x0e ;
2320                                 tmpbytes = 2;
2321                         }
2322                         else if(efuse_write_item == EFUSE_SDIO_MODE){
2323                                 word_en = 0x0d ;
2324                                 tmpbytes = 2;
2325                         }
2326                         else if(efuse_write_item == EFUSE_OCR){
2327                                 word_en = 0x09 ;
2328                                 tmpbytes = 4;
2329                         }
2330                         else if((efuse_write_item == EFUSE_EEPROM_VER)||(efuse_write_item==EFUSE_CHAN_PLAN)){
2331                                 word_en = 0x07 ;
2332                                 tmpbytes = 2;
2333                         }
2334                         if(bWordUnit==TRUE){
2335                                 memcpy(pg_data+word_start*2 ,data,sizeof(u8)*tmpbytes);
2336                                 //PlatformMoveMemory((PVOID)(pg_data+word_start*2), (PVOID)(data), sizeof(u8)*tmpbytes);
2337                         }
2338                         else{
2339                                 efuse_PgPacketRead(dev,offset,pg_data);
2340                                 memcpy(pg_data+(2*word_start)+byte_start,data,sizeof(u8)*byte_cnts);
2341                                 //PlatformMoveMemory((PVOID)(pg_data+(2*word_start)+byte_start), (PVOID)(data), sizeof(u8)*byte_cnts);
2342                         }
2343
2344                         efuse_PgPacketWrite(dev,offset,word_en,pg_data+(word_start*2));
2345
2346                 }
2347
2348         }
2349         //========================================================================
2350         else if(pg_pkt_cnts>1){//situation B
2351                 if(word_start==0){
2352                         word_en = 0x00;
2353                         for(tmpidx = 0 ;tmpidx<(word_cnts/4);tmpidx++)
2354                         {
2355                                 efuse_PgPacketWrite(dev,(offset+tmpidx),word_en,data+(tmpidx*PGPKT_DATA_SIZE));
2356                         }
2357                         word_en = 0x0f;
2358                         for(tmpidx= 0; tmpidx<(word_cnts%4) ; tmpidx++)
2359                         {
2360                                 tmpbitmask =tmpidx;
2361                                 word_en &= (~(EFUSE_BIT(tmpbitmask)));
2362                                 //BIT0
2363                         }
2364                         efuse_PgPacketWrite(dev,offset+(word_cnts/4),word_en,data+((word_cnts/4)*PGPKT_DATA_SIZE));
2365                 }else
2366                 {
2367
2368                 }
2369         }
2370         //========================================================================
2371         else{//situation C
2372                 word_en = 0x0f;
2373                 for(tmpidx= 0; tmpidx<word_cnts ; tmpidx++)
2374                 {
2375                         tmpbitmask = word_start + tmpidx ;
2376                         word_en &= (~(EFUSE_BIT(tmpbitmask)));
2377                 }
2378                 efuse_PgPacketWrite(dev,offset,word_en,data);
2379         }
2380
2381 }
2382 //------------------------------------------------------------------------------
2383
2384 void efuset_test_func_read(struct net_device* dev)
2385 {
2386         u8 chipid[2];
2387         u8 ocr[3];
2388         u8 macaddr[6];
2389         u8 txpowertable[28];
2390
2391         memset(chipid,0,sizeof(u8)*2);
2392         efuse_read_data(dev,EFUSE_CHIP_ID,chipid,sizeof(chipid));
2393
2394         memset(ocr,0,sizeof(u8)*3);
2395         efuse_read_data(dev,EFUSE_CCCR,ocr,sizeof(ocr));
2396
2397         memset(macaddr,0,sizeof(u8)*6);
2398         efuse_read_data(dev,EFUSE_MAC_ADDR,macaddr,sizeof(macaddr));
2399
2400         memset(txpowertable,0,sizeof(u8)*28);
2401         efuse_read_data(dev,EFUSE_TXPW_TAB,txpowertable,sizeof(txpowertable));
2402 }
2403 //------------------------------------------------------------------------------
2404
2405 void efuset_test_func_write(struct net_device* dev)
2406 {
2407         u32 bWordUnit = TRUE;
2408         u8 CCCR=0x02,SDIO_SETTING = 0xFF;
2409         u8 tmpdata[2];
2410
2411         u8 macaddr[6] = {0x00,0xe0,0x4c,0x87,0x12,0x66};
2412         efuse_write_data(dev,EFUSE_MAC_ADDR,macaddr,sizeof(macaddr),bWordUnit);
2413
2414         bWordUnit = FALSE;
2415         efuse_write_data(dev,EFUSE_CCCR,&CCCR,sizeof(u8),bWordUnit);
2416
2417         bWordUnit = FALSE;
2418         efuse_write_data(dev,EFUSE_SDIO_SETTING,&SDIO_SETTING,sizeof(u8),bWordUnit);
2419
2420         bWordUnit = TRUE;
2421         tmpdata[0] =SDIO_SETTING ;
2422         tmpdata[1] =CCCR ;
2423         efuse_write_data(dev,EFUSE_SDIO_SETTING,tmpdata,sizeof(tmpdata),bWordUnit);
2424
2425 }
2426 //------------------------------------------------------------------------------
2427
2428
2429
2430
2431 #endif  // #if (HAL_CODE_BASE == RTL8192_S)
2432
2433
2434
2435
2436
2437
2438 /* End of Efuse.c */
2439
2440
2441
2442