ALSA: hda/realtek - Fix resume of multiple input sources
[pandora-kernel.git] / drivers / staging / rtl8192e / rtl_debug.h
1 /******************************************************************************
2  * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3  *
4  * Based on the r8180 driver, which is:
5  * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
6  * This program is free software; you can redistribute it and/or modify it
7  * under the terms of version 2 of the GNU General Public License as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License along with
16  * this program; if not, write to the Free Software Foundation, Inc.,
17  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18  *
19  * The full GNU General Public License is included in this distribution in the
20  * file called LICENSE.
21  *
22  * Contact Information:
23  * wlanfae <wlanfae@realtek.com>
24 ******************************************************************************/
25 #ifndef _RTL_DEBUG_H
26 #define _RTL_DEBUG_H
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/version.h>
30 #include <linux/debugfs.h>
31
32 struct r8192_priv;
33 struct _tx_desc_8192se;
34 struct _TX_DESC_8192CE;
35 struct net_device;
36
37 #define DBG_LOUD        4
38
39 #define RT_ASSERT(_Exp, Fmt)                            \
40                 if (!(_Exp)) {                          \
41                         printk("Rtl819x: ");            \
42                         printk Fmt;                     \
43                 }
44
45 enum dbgp_flag {
46         FQoS                            = 0,
47         FTX                             = 1,
48         FRX                             = 2,
49         FSEC                            = 3,
50         FMGNT                           = 4,
51         FMLME                           = 5,
52         FRESOURCE                       = 6,
53         FBEACON                         = 7,
54         FISR                            = 8,
55         FPHY                            = 9,
56         FMP                             = 10,
57         FEEPROM                         = 11,
58         FPWR                            = 12,
59         FDM                             = 13,
60         FDBGCtrl                        = 14,
61         FC2H                            = 15,
62         FBT                             = 16,
63         FINIT                           = 17,
64         FIOCTL                          = 18,
65         DBGP_TYPE_MAX
66 };
67
68 #define         QoS_INIT                                BIT0
69 #define         QoS_VISTA                               BIT1
70
71 #define         TX_DESC                                 BIT0
72 #define         TX_DESC_TID                             BIT1
73
74 #define         RX_DATA                                 BIT0
75 #define         RX_PHY_STS                              BIT1
76 #define         RX_PHY_SS                               BIT2
77 #define         RX_PHY_SQ                               BIT3
78 #define         RX_PHY_ASTS                             BIT4
79 #define         RX_ERR_LEN                              BIT5
80 #define         RX_DEFRAG                               BIT6
81 #define         RX_ERR_RATE                             BIT7
82
83
84
85 #define         MEDIA_STS                               BIT0
86 #define         LINK_STS                                BIT1
87
88 #define         OS_CHK                                  BIT0
89
90 #define         BCN_SHOW                                BIT0
91 #define         BCN_PEER                                BIT1
92
93 #define         ISR_CHK                                 BIT0
94
95 #define         PHY_BBR                                 BIT0
96 #define         PHY_BBW                                 BIT1
97 #define         PHY_RFR                                 BIT2
98 #define         PHY_RFW                                 BIT3
99 #define         PHY_MACR                                BIT4
100 #define         PHY_MACW                                BIT5
101 #define         PHY_ALLR                                BIT6
102 #define         PHY_ALLW                                BIT7
103 #define         PHY_TXPWR                               BIT8
104 #define         PHY_PWRDIFF                             BIT9
105
106 #define         MP_RX                                   BIT0
107 #define         MP_SWICH_CH                             BIT1
108
109 #define         EEPROM_W                                BIT0
110 #define         EFUSE_PG                                BIT1
111 #define         EFUSE_READ_ALL                          BIT2
112
113 #define         LPS                                     BIT0
114 #define         IPS                                     BIT1
115 #define         PWRSW                                   BIT2
116 #define         PWRHW                                   BIT3
117 #define         PWRHAL                                  BIT4
118
119 #define         WA_IOT                                  BIT0
120 #define         DM_PWDB                                 BIT1
121 #define         DM_Monitor                              BIT2
122 #define         DM_DIG                                  BIT3
123 #define         DM_EDCA_Turbo                           BIT4
124
125 #define         DbgCtrl_Trace                           BIT0
126 #define         DbgCtrl_InbandNoise                     BIT1
127
128 #define         BT_TRACE                                BIT0
129 #define         BT_RFPoll                               BIT1
130
131 #define         C2H_Summary                             BIT0
132 #define         C2H_PacketData                          BIT1
133 #define         C2H_ContentData                         BIT2
134 #define         BT_TRACE                                BIT0
135 #define         BT_RFPoll                               BIT1
136
137 #define         INIT_EEPROM                             BIT0
138 #define         INIT_TxPower                            BIT1
139 #define         INIT_IQK                                BIT2
140 #define         INIT_RF                                 BIT3
141
142 #define         IOCTL_TRACE                             BIT0
143 #define         IOCTL_BT_EVENT                          BIT1
144 #define         IOCTL_BT_EVENT_DETAIL                   BIT2
145 #define         IOCTL_BT_TX_ACLDATA                     BIT3
146 #define         IOCTL_BT_TX_ACLDATA_DETAIL              BIT4
147 #define         IOCTL_BT_RX_ACLDATA                     BIT5
148 #define         IOCTL_BT_RX_ACLDATA_DETAIL              BIT6
149 #define         IOCTL_BT_HCICMD                         BIT7
150 #define         IOCTL_BT_HCICMD_DETAIL                  BIT8
151 #define         IOCTL_IRP                               BIT9
152 #define         IOCTL_IRP_DETAIL                        BIT10
153 #define         IOCTL_CALLBACK_FUN                      BIT11
154 #define         IOCTL_STATE                             BIT12
155 #define         IOCTL_BT_TP                             BIT13
156 #define         IOCTL_BT_LOGO                           BIT14
157
158 /* 2007/07/13 MH  ------For DeBuG Print modeue------*/
159 /*------------------------------Define structure----------------------------*/
160
161
162 /*------------------------Export Marco Definition---------------------------*/
163 #define         DEBUG_PRINT             1
164
165 #if (DEBUG_PRINT == 1)
166 #define RTPRINT(dbgtype, dbgflag, printstr)                     \
167 {                                                               \
168         if (DBGP_Type[dbgtype] & dbgflag) {                     \
169                 printk printstr;                                \
170         }                                                       \
171 }
172
173 #define RTPRINT_ADDR(dbgtype, dbgflag, printstr, _Ptr)          \
174 {                                                               \
175         if (DBGP_Type[dbgtype] & dbgflag) {                     \
176                 int __i;                                        \
177                 u8 *ptr = (u8 *)_Ptr;                           \
178                 printk printstr;                                \
179                 printk(" ");                                    \
180                 for (__i = 0; __i < 6; __i++)                   \
181                         printk("%02X%s", ptr[__i],              \
182                                (__i == 5) ? "" : "-");          \
183                         printk("\n");                           \
184         }                                                       \
185 }
186
187 #define RTPRINT_DATA(dbgtype, dbgflag, _TitleString, _HexData, _HexDataLen)\
188 {                                                               \
189         if (DBGP_Type[dbgtype] & dbgflag) {                     \
190                 int __i;                                        \
191                 u8 *ptr = (u8 *)_HexData;                       \
192                 printk(_TitleString);                           \
193                 for (__i = 0; __i < (int)_HexDataLen; __i++) {  \
194                         printk("%02X%s", ptr[__i], (((__i + 1)  \
195                                % 4) == 0) ? "  " : " ");        \
196                         if (((__i + 1) % 16) == 0)              \
197                                 printk("\n");                   \
198                 }                                               \
199                 printk("\n");                                   \
200         }                                                       \
201 }
202 #else
203 #define RTPRINT(dbgtype, dbgflag, printstr)
204 #define RTPRINT_ADDR(dbgtype, dbgflag, printstr, _Ptr)
205 #define RTPRINT_DATA(dbgtype, dbgflag, _TitleString, _HexData, _HexDataLen)
206 #endif
207
208 extern u32      DBGP_Type[DBGP_TYPE_MAX];
209
210 #define RT_PRINT_DATA(_Comp, _Level, _TitleString, _HexData, _HexDataLen) \
211 do {\
212         if (((_Comp) & rt_global_debug_component) &&                    \
213              (_Level <= rt_global_debug_component)) {                   \
214                 int __i;                                                \
215                 u8*     ptr = (u8 *)_HexData;                           \
216                 printk(KERN_INFO "Rtl819x: ");                          \
217                 printk(_TitleString);                                   \
218                 for (__i = 0; __i < (int)_HexDataLen; __i++) {          \
219                         printk("%02X%s", ptr[__i], (((__i + 1) %        \
220                                4) == 0) ? "  " : " ");                  \
221                         if (((__i + 1) % 16) == 0)                      \
222                                 printk("\n");                           \
223                 }                                                       \
224                 printk("\n");                                           \
225         } \
226 } while (0);
227
228 #define DMESG(x, a...)
229 #define DMESGW(x, a...)
230 #define DMESGE(x, a...)
231 extern u32 rt_global_debug_component;
232 #define RT_TRACE(component, x, args...) \
233 do {                    \
234         if (rt_global_debug_component & component) \
235                 printk(KERN_DEBUG DRV_NAME ":" x "\n" , \
236                        ##args);\
237 } while (0);
238
239 #define assert(expr) \
240         if (!(expr)) {                            \
241                 printk(KERN_INFO "Assertion failed! %s,%s,%s,line=%d\n", \
242                 #expr, __FILE__, __func__, __LINE__);     \
243         }
244 #define RT_DEBUG_DATA(level, data, datalen)      \
245         do {                                                            \
246                 if ((rt_global_debug_component & (level)) == (level)) {\
247                         int _i;                           \
248                         u8 *_pdata = (u8 *)data;                 \
249                         printk(KERN_DEBUG DRV_NAME ": %s()\n", __func__);   \
250                         for (_i = 0; _i < (int)(datalen); _i++) {       \
251                                 printk(KERN_INFO "%2x ", _pdata[_i]);   \
252                                 if ((_i+1) % 16 == 0)                   \
253                                         printk("\n");                   \
254                         }                              \
255                         printk(KERN_INFO "\n");   \
256                 }                                      \
257         } while (0)
258
259 struct rtl_fs_debug {
260         const char *name;
261         struct dentry *dir_drv;
262         struct dentry *debug_register;
263         u32 hw_type;
264         u32 hw_offset;
265         bool hw_holding;
266 };
267
268 void print_buffer(u32 *buffer, int len);
269 void dump_eprom(struct net_device *dev);
270 void rtl8192_dump_reg(struct net_device *dev);
271
272 /* debugfs stuff */
273 static inline int rtl_debug_module_init(struct r8192_priv *priv,
274                                         const char *name)
275 {
276         return 0;
277 }
278
279 static inline void rtl_debug_module_remove(struct r8192_priv *priv)
280 {
281 }
282
283 static inline int rtl_create_debugfs_root(void)
284 {
285         return 0;
286 }
287
288 static inline void rtl_remove_debugfs_root(void)
289 {
290 }
291
292 /* proc stuff */
293 void rtl8192_proc_init_one(struct net_device *dev);
294 void rtl8192_proc_remove_one(struct net_device *dev);
295 void rtl8192_proc_module_init(void);
296 void rtl8192_proc_module_remove(void);
297 void rtl8192_dbgp_flag_init(struct net_device *dev);
298
299 #endif