drivers/staging/rtl8187se/r8180_core.c

   1 /*
   2    This is part of rtl818x pci OpenSource driver - v 0.1
   3    Copyright (C) Andrea Merello 2004-2005  <andreamrl@tiscali.it>
   4    Released under the terms of GPL (General Public License)
   5
   6    Parts of this driver are based on the GPL part of the official
   7    Realtek driver.
   8
   9    Parts of this driver are based on the rtl8180 driver skeleton
  10    from Patric Schenke & Andres Salomon.
  11
  12    Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver.
  13
  14    Parts of BB/RF code are derived from David Young rtl8180 netbsd driver.
  15
  16    RSSI calc function from 'The Deuce'
  17
  18    Some ideas borrowed from the 8139too.c driver included in linux kernel.
  19
  20    We (I?) want to thanks the Authors of those projecs and also the
  21    Ndiswrapper's project Authors.
  22
  23    A big big thanks goes also to Realtek corp. for their help in my attempt to
  24    add RTL8185 and RTL8225 support, and to David Young also.
  25
  26    Power management interface routines.
  27    Written by Mariusz Matuszek.
  28 */
  29
  30 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  31
  32 #undef RX_DONT_PASS_UL
  33 #undef DUMMY_RX
  34
  35 #include <linux/slab.h>
  36 #include <linux/syscalls.h>
  37 #include <linux/eeprom_93cx6.h>
  38 #include <linux/interrupt.h>
  39
  40 #include "r8180_hw.h"
  41 #include "r8180.h"
  42 #include "r8180_rtl8225.h" /* RTL8225 Radio frontend */
  43 #include "r8180_93cx6.h"   /* Card EEPROM */
  44 #include "r8180_wx.h"
  45 #include "r8180_dm.h"
  46
  47 #include "ieee80211/dot11d.h"
  48
  49 static struct pci_device_id rtl8180_pci_id_tbl[] = {
  50         {
  51                 .vendor = PCI_VENDOR_ID_REALTEK,
  52                 .device = 0x8199,
  53                 .subvendor = PCI_ANY_ID,
  54                 .subdevice = PCI_ANY_ID,
  55                 .driver_data = 0,
  56         },
  57         {
  58                 .vendor = 0,
  59                 .device = 0,
  60                 .subvendor = 0,
  61                 .subdevice = 0,
  62                 .driver_data = 0,
  63         }
  64 };
  65
  66 static char ifname[IFNAMSIZ] = "wlan%d";
  67 static int hwwep;
  68
  69 MODULE_LICENSE("GPL");
  70 MODULE_DEVICE_TABLE(pci, rtl8180_pci_id_tbl);
  71 MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
  72 MODULE_DESCRIPTION("Linux driver for Realtek RTL8187SE WiFi cards");
  73
  74 module_param_string(ifname, ifname, sizeof(ifname), S_IRUGO|S_IWUSR);
  75 module_param(hwwep, int, S_IRUGO|S_IWUSR);
  76
  77 MODULE_PARM_DESC(hwwep, " Try to use hardware WEP support. Still broken and not available on all cards");
  78
  79 static int rtl8180_pci_probe(struct pci_dev *pdev,
  80                                        const struct pci_device_id *id);
  81
  82 static void rtl8180_pci_remove(struct pci_dev *pdev);
  83
  84 static void rtl8180_shutdown(struct pci_dev *pdev)
  85 {
  86         struct net_device *dev = pci_get_drvdata(pdev);
  87         if (dev->netdev_ops->ndo_stop)
  88                 dev->netdev_ops->ndo_stop(dev);
  89         pci_disable_device(pdev);
  90 }
  91
  92 static int rtl8180_suspend(struct pci_dev *pdev, pm_message_t state)
  93 {
  94         struct net_device *dev = pci_get_drvdata(pdev);
  95
  96         if (!netif_running(dev))
  97                 goto out_pci_suspend;
  98
  99         if (dev->netdev_ops->ndo_stop)
 100                 dev->netdev_ops->ndo_stop(dev);
 101
 102         netif_device_detach(dev);
 103
 104 out_pci_suspend:
 105         pci_save_state(pdev);
 106         pci_disable_device(pdev);
 107         pci_set_power_state(pdev, pci_choose_state(pdev, state));
 108         return 0;
 109 }
 110
 111 static int rtl8180_resume(struct pci_dev *pdev)
 112 {
 113         struct net_device *dev = pci_get_drvdata(pdev);
 114         int err;
 115         u32 val;
 116
 117         pci_set_power_state(pdev, PCI_D0);
 118
 119         err = pci_enable_device(pdev);
 120         if (err) {
 121                 dev_err(&pdev->dev, "pci_enable_device failed on resume\n");
 122
 123                 return err;
 124         }
 125
 126         pci_restore_state(pdev);
 127
 128         /*
 129          * Suspend/Resume resets the PCI configuration space, so we have to
 130          * re-disable the RETRY_TIMEOUT register (0x41) to keep PCI Tx retries
 131          * from interfering with C3 CPU state. pci_restore_state won't help
 132          * here since it only restores the first 64 bytes pci config header.
 133          */
 134         pci_read_config_dword(pdev, 0x40, &val);
 135         if ((val & 0x0000ff00) != 0)
 136                 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
 137
 138         if (!netif_running(dev))
 139                 goto out;
 140
 141         if (dev->netdev_ops->ndo_open)
 142                 dev->netdev_ops->ndo_open(dev);
 143
 144         netif_device_attach(dev);
 145 out:
 146         return 0;
 147 }
 148
 149 static struct pci_driver rtl8180_pci_driver = {
 150         .name           = RTL8180_MODULE_NAME,
 151         .id_table       = rtl8180_pci_id_tbl,
 152         .probe          = rtl8180_pci_probe,
 153         .remove         = rtl8180_pci_remove,
 154         .suspend        = rtl8180_suspend,
 155         .resume         = rtl8180_resume,
 156         .shutdown       = rtl8180_shutdown,
 157 };
 158
 159 u8 read_nic_byte(struct net_device *dev, int x)
 160 {
 161         return 0xff&readb((u8 *)dev->mem_start + x);
 162 }
 163
 164 u32 read_nic_dword(struct net_device *dev, int x)
 165 {
 166         return readl((u8 *)dev->mem_start + x);
 167 }
 168
 169 u16 read_nic_word(struct net_device *dev, int x)
 170 {
 171         return readw((u8 *)dev->mem_start + x);
 172 }
 173
 174 void write_nic_byte(struct net_device *dev, int x, u8 y)
 175 {
 176         writeb(y, (u8 *)dev->mem_start + x);
 177         udelay(20);
 178 }
 179
 180 void write_nic_dword(struct net_device *dev, int x, u32 y)
 181 {
 182         writel(y, (u8 *)dev->mem_start + x);
 183         udelay(20);
 184 }
 185
 186 void write_nic_word(struct net_device *dev, int x, u16 y)
 187 {
 188         writew(y, (u8 *)dev->mem_start + x);
 189         udelay(20);
 190 }
 191
 192 inline void force_pci_posting(struct net_device *dev)
 193 {
 194         read_nic_byte(dev, EPROM_CMD);
 195         mb();
 196 }
 197
 198 irqreturn_t rtl8180_interrupt(int irq, void *netdev, struct pt_regs *regs);
 199 void set_nic_rxring(struct net_device *dev);
 200 void set_nic_txring(struct net_device *dev);
 201 static struct net_device_stats *rtl8180_stats(struct net_device *dev);
 202 void rtl8180_commit(struct net_device *dev);
 203 void rtl8180_start_tx_beacon(struct net_device *dev);
 204
 205 static struct proc_dir_entry *rtl8180_proc;
 206
 207 static int proc_get_registers(char *page, char **start,
 208                           off_t offset, int count,
 209                           int *eof, void *data)
 210 {
 211         struct net_device *dev = data;
 212         int len = 0;
 213         int i, n;
 214         int max = 0xff;
 215
 216         /* This dump the current register page */
 217         for (n = 0; n <= max;) {
 218                 len += snprintf(page + len, count - len, "\nD:  %2x > ", n);
 219
 220                 for (i = 0; i < 16 && n <= max; i++, n++)
 221                         len += snprintf(page + len, count - len, "%2x ",
 222                                         read_nic_byte(dev, n));
 223         }
 224         len += snprintf(page + len, count - len, "\n");
 225
 226         *eof = 1;
 227         return len;
 228 }
 229
 230 int get_curr_tx_free_desc(struct net_device *dev, int priority);
 231
 232 static int proc_get_stats_hw(char *page, char **start,
 233                           off_t offset, int count,
 234                           int *eof, void *data)
 235 {
 236         int len = 0;
 237
 238         *eof = 1;
 239         return len;
 240 }
 241
 242 static int proc_get_stats_rx(char *page, char **start,
 243                           off_t offset, int count,
 244                           int *eof, void *data)
 245 {
 246         struct net_device *dev = data;
 247         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 248
 249         int len = 0;
 250
 251         len += snprintf(page + len, count - len,
 252                 "RX OK: %lu\n"
 253                 "RX Retry: %lu\n"
 254                 "RX CRC Error(0-500): %lu\n"
 255                 "RX CRC Error(500-1000): %lu\n"
 256                 "RX CRC Error(>1000): %lu\n"
 257                 "RX ICV Error: %lu\n",
 258                 priv->stats.rxint,
 259                 priv->stats.rxerr,
 260                 priv->stats.rxcrcerrmin,
 261                 priv->stats.rxcrcerrmid,
 262                 priv->stats.rxcrcerrmax,
 263                 priv->stats.rxicverr
 264                 );
 265
 266         *eof = 1;
 267         return len;
 268 }
 269
 270 static int proc_get_stats_tx(char *page, char **start,
 271                           off_t offset, int count,
 272                           int *eof, void *data)
 273 {
 274         struct net_device *dev = data;
 275         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 276
 277         int len = 0;
 278         unsigned long totalOK;
 279
 280         totalOK = priv->stats.txnpokint+priv->stats.txhpokint+priv->stats.txlpokint;
 281         len += snprintf(page + len, count - len,
 282                 "TX OK: %lu\n"
 283                 "TX Error: %lu\n"
 284                 "TX Retry: %lu\n"
 285                 "TX beacon OK: %lu\n"
 286                 "TX beacon error: %lu\n",
 287                 totalOK,
 288                 priv->stats.txnperr+priv->stats.txhperr+priv->stats.txlperr,
 289                 priv->stats.txretry,
 290                 priv->stats.txbeacon,
 291                 priv->stats.txbeaconerr
 292         );
 293
 294         *eof = 1;
 295         return len;
 296 }
 297
 298 void rtl8180_proc_module_init(void)
 299 {
 300         DMESG("Initializing proc filesystem");
 301         rtl8180_proc = proc_mkdir(RTL8180_MODULE_NAME, init_net.proc_net);
 302 }
 303
 304 void rtl8180_proc_module_remove(void)
 305 {
 306         remove_proc_entry(RTL8180_MODULE_NAME, init_net.proc_net);
 307 }
 308
 309 void rtl8180_proc_remove_one(struct net_device *dev)
 310 {
 311         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 312         if (priv->dir_dev) {
 313                 remove_proc_entry("stats-hw", priv->dir_dev);
 314                 remove_proc_entry("stats-tx", priv->dir_dev);
 315                 remove_proc_entry("stats-rx", priv->dir_dev);
 316                 remove_proc_entry("registers", priv->dir_dev);
 317                 priv->dir_dev = NULL;
 318         }
 319 }
 320
 321 void rtl8180_proc_init_one(struct net_device *dev)
 322 {
 323         struct proc_dir_entry *e;
 324         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 325
 326         priv->dir_dev = rtl8180_proc;
 327         if (!priv->dir_dev) {
 328                 DMESGE("Unable to initialize /proc/net/r8180/%s\n",
 329                       dev->name);
 330                 return;
 331         }
 332
 333         e = create_proc_read_entry("stats-hw", S_IFREG | S_IRUGO,
 334                                    priv->dir_dev, proc_get_stats_hw, dev);
 335         if (!e) {
 336                 DMESGE("Unable to initialize "
 337                       "/proc/net/r8180/%s/stats-hw\n",
 338                       dev->name);
 339         }
 340
 341         e = create_proc_read_entry("stats-rx", S_IFREG | S_IRUGO,
 342                                    priv->dir_dev, proc_get_stats_rx, dev);
 343         if (!e) {
 344                 DMESGE("Unable to initialize "
 345                       "/proc/net/r8180/%s/stats-rx\n",
 346                       dev->name);
 347         }
 348
 349
 350         e = create_proc_read_entry("stats-tx", S_IFREG | S_IRUGO,
 351                                    priv->dir_dev, proc_get_stats_tx, dev);
 352         if (!e) {
 353                 DMESGE("Unable to initialize "
 354                       "/proc/net/r8180/%s/stats-tx\n",
 355                       dev->name);
 356         }
 357
 358         e = create_proc_read_entry("registers", S_IFREG | S_IRUGO,
 359                                    priv->dir_dev, proc_get_registers, dev);
 360         if (!e) {
 361                 DMESGE("Unable to initialize "
 362                       "/proc/net/r8180/%s/registers\n",
 363                       dev->name);
 364         }
 365 }
 366
 367 /*
 368   FIXME: check if we can use some standard already-existent
 369   data type+functions in kernel
 370 */
 371
 372 short buffer_add(struct buffer **buffer, u32 *buf, dma_addr_t dma,
 373                 struct buffer **bufferhead)
 374 {
 375         struct buffer *tmp;
 376
 377         if (!*buffer) {
 378
 379                 *buffer = kmalloc(sizeof(struct buffer), GFP_KERNEL);
 380
 381                 if (*buffer == NULL) {
 382                         DMESGE("Failed to kmalloc head of TX/RX struct");
 383                         return -1;
 384                 }
 385                 (*buffer)->next = *buffer;
 386                 (*buffer)->buf = buf;
 387                 (*buffer)->dma = dma;
 388                 if (bufferhead != NULL)
 389                         (*bufferhead) = (*buffer);
 390                 return 0;
 391         }
 392         tmp = *buffer;
 393
 394         while (tmp->next != (*buffer))
 395                 tmp = tmp->next;
 396         tmp->next = kmalloc(sizeof(struct buffer), GFP_KERNEL);
 397         if (tmp->next == NULL) {
 398                 DMESGE("Failed to kmalloc TX/RX struct");
 399                 return -1;
 400         }
 401         tmp->next->buf = buf;
 402         tmp->next->dma = dma;
 403         tmp->next->next = *buffer;
 404
 405         return 0;
 406 }
 407
 408 void buffer_free(struct net_device *dev, struct buffer **buffer, int len, short consistent)
 409 {
 410
 411         struct buffer *tmp, *next;
 412         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 413         struct pci_dev *pdev = priv->pdev;
 414
 415         if (!*buffer)
 416                 return;
 417
 418         tmp = *buffer;
 419
 420         do {
 421                 next = tmp->next;
 422                 if (consistent) {
 423                         pci_free_consistent(pdev, len,
 424                                     tmp->buf, tmp->dma);
 425                 } else {
 426                         pci_unmap_single(pdev, tmp->dma,
 427                         len, PCI_DMA_FROMDEVICE);
 428                         kfree(tmp->buf);
 429                 }
 430                 kfree(tmp);
 431                 tmp = next;
 432         } while (next != *buffer);
 433
 434         *buffer = NULL;
 435 }
 436
 437 int get_curr_tx_free_desc(struct net_device *dev, int priority)
 438 {
 439         struct r8180_priv *priv = ieee80211_priv(dev);
 440         u32 *tail;
 441         u32 *head;
 442         int ret;
 443
 444         switch (priority) {
 445         case MANAGE_PRIORITY:
 446                 head = priv->txmapringhead;
 447                 tail = priv->txmapringtail;
 448                 break;
 449         case BK_PRIORITY:
 450                 head = priv->txbkpringhead;
 451                 tail = priv->txbkpringtail;
 452                 break;
 453         case BE_PRIORITY:
 454                 head = priv->txbepringhead;
 455                 tail = priv->txbepringtail;
 456                 break;
 457         case VI_PRIORITY:
 458                 head = priv->txvipringhead;
 459                 tail = priv->txvipringtail;
 460                 break;
 461         case VO_PRIORITY:
 462                 head = priv->txvopringhead;
 463                 tail = priv->txvopringtail;
 464                 break;
 465         case HI_PRIORITY:
 466                 head = priv->txhpringhead;
 467                 tail = priv->txhpringtail;
 468                 break;
 469         default:
 470                 return -1;
 471         }
 472
 473         if (head <= tail)
 474                 ret = priv->txringcount - (tail - head)/8;
 475         else
 476                 ret = (head - tail)/8;
 477
 478         if (ret > priv->txringcount)
 479                 DMESG("BUG");
 480
 481         return ret;
 482 }
 483
 484 short check_nic_enought_desc(struct net_device *dev, int priority)
 485 {
 486         struct r8180_priv *priv = ieee80211_priv(dev);
 487         struct ieee80211_device *ieee = netdev_priv(dev);
 488         int requiredbyte, required;
 489
 490         requiredbyte = priv->ieee80211->fts + sizeof(struct ieee80211_header_data);
 491
 492         if (ieee->current_network.QoS_Enable)
 493                 requiredbyte += 2;
 494
 495         required = requiredbyte / (priv->txbuffsize-4);
 496
 497         if (requiredbyte % priv->txbuffsize)
 498                 required++;
 499
 500         /* for now we keep two free descriptor as a safety boundary
 501          * between the tail and the head
 502          */
 503
 504         return (required+2 < get_curr_tx_free_desc(dev, priority));
 505 }
 506
 507 void fix_tx_fifo(struct net_device *dev)
 508 {
 509         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 510         u32 *tmp;
 511         int i;
 512
 513         for (tmp = priv->txmapring, i = 0;
 514              i < priv->txringcount;
 515              tmp += 8, i++) {
 516                 *tmp = *tmp & ~(1<<31);
 517         }
 518
 519         for (tmp = priv->txbkpring, i = 0;
 520              i < priv->txringcount;
 521              tmp += 8, i++) {
 522                 *tmp = *tmp & ~(1<<31);
 523         }
 524
 525         for (tmp = priv->txbepring, i = 0;
 526              i < priv->txringcount;
 527              tmp += 8, i++) {
 528                 *tmp = *tmp & ~(1<<31);
 529         }
 530         for (tmp = priv->txvipring, i = 0;
 531              i < priv->txringcount;
 532              tmp += 8, i++) {
 533                 *tmp = *tmp & ~(1<<31);
 534         }
 535
 536         for (tmp = priv->txvopring, i = 0;
 537              i < priv->txringcount;
 538              tmp += 8, i++) {
 539                 *tmp = *tmp & ~(1<<31);
 540         }
 541
 542         for (tmp = priv->txhpring, i = 0;
 543              i < priv->txringcount;
 544              tmp += 8, i++) {
 545                 *tmp = *tmp & ~(1<<31);
 546         }
 547
 548         for (tmp = priv->txbeaconring, i = 0;
 549              i < priv->txbeaconcount;
 550              tmp += 8, i++) {
 551                 *tmp = *tmp & ~(1<<31);
 552         }
 553
 554         priv->txmapringtail = priv->txmapring;
 555         priv->txmapringhead = priv->txmapring;
 556         priv->txmapbufstail = priv->txmapbufs;
 557
 558         priv->txbkpringtail = priv->txbkpring;
 559         priv->txbkpringhead = priv->txbkpring;
 560         priv->txbkpbufstail = priv->txbkpbufs;
 561
 562         priv->txbepringtail = priv->txbepring;
 563         priv->txbepringhead = priv->txbepring;
 564         priv->txbepbufstail = priv->txbepbufs;
 565
 566         priv->txvipringtail = priv->txvipring;
 567         priv->txvipringhead = priv->txvipring;
 568         priv->txvipbufstail = priv->txvipbufs;
 569
 570         priv->txvopringtail = priv->txvopring;
 571         priv->txvopringhead = priv->txvopring;
 572         priv->txvopbufstail = priv->txvopbufs;
 573
 574         priv->txhpringtail = priv->txhpring;
 575         priv->txhpringhead = priv->txhpring;
 576         priv->txhpbufstail = priv->txhpbufs;
 577
 578         priv->txbeaconringtail = priv->txbeaconring;
 579         priv->txbeaconbufstail = priv->txbeaconbufs;
 580         set_nic_txring(dev);
 581
 582         ieee80211_reset_queue(priv->ieee80211);
 583         priv->ack_tx_to_ieee = 0;
 584 }
 585
 586 void fix_rx_fifo(struct net_device *dev)
 587 {
 588         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 589         u32 *tmp;
 590         struct buffer *rxbuf;
 591         u8 rx_desc_size;
 592
 593         rx_desc_size = 8; /* 4*8 = 32 bytes */
 594
 595         for (tmp = priv->rxring, rxbuf = priv->rxbufferhead;
 596              (tmp < (priv->rxring)+(priv->rxringcount)*rx_desc_size);
 597              tmp += rx_desc_size, rxbuf = rxbuf->next) {
 598                 *(tmp+2) = rxbuf->dma;
 599                 *tmp = *tmp & ~0xfff;
 600                 *tmp = *tmp | priv->rxbuffersize;
 601                 *tmp |= (1<<31);
 602         }
 603
 604         priv->rxringtail = priv->rxring;
 605         priv->rxbuffer = priv->rxbufferhead;
 606         priv->rx_skb_complete = 1;
 607         set_nic_rxring(dev);
 608 }
 609
 610 void rtl8180_irq_disable(struct net_device *dev)
 611 {
 612         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 613
 614         write_nic_dword(dev, IMR, 0);
 615         force_pci_posting(dev);
 616         priv->irq_enabled = 0;
 617 }
 618
 619 void rtl8180_set_mode(struct net_device *dev, int mode)
 620 {
 621         u8 ecmd;
 622
 623         ecmd = read_nic_byte(dev, EPROM_CMD);
 624         ecmd = ecmd & ~EPROM_CMD_OPERATING_MODE_MASK;
 625         ecmd = ecmd | (mode<<EPROM_CMD_OPERATING_MODE_SHIFT);
 626         ecmd = ecmd & ~(1<<EPROM_CS_SHIFT);
 627         ecmd = ecmd & ~(1<<EPROM_CK_SHIFT);
 628         write_nic_byte(dev, EPROM_CMD, ecmd);
 629 }
 630
 631 void rtl8180_beacon_tx_enable(struct net_device *dev);
 632
 633 void rtl8180_update_msr(struct net_device *dev)
 634 {
 635         struct r8180_priv *priv = ieee80211_priv(dev);
 636         u8 msr;
 637         u32 rxconf;
 638
 639         msr  = read_nic_byte(dev, MSR);
 640         msr &= ~MSR_LINK_MASK;
 641
 642         rxconf = read_nic_dword(dev, RX_CONF);
 643
 644         if (priv->ieee80211->state == IEEE80211_LINKED) {
 645                 if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
 646                         msr |= (MSR_LINK_ADHOC<<MSR_LINK_SHIFT);
 647                 else if (priv->ieee80211->iw_mode == IW_MODE_MASTER)
 648                         msr |= (MSR_LINK_MASTER<<MSR_LINK_SHIFT);
 649                 else if (priv->ieee80211->iw_mode == IW_MODE_INFRA)
 650                         msr |= (MSR_LINK_MANAGED<<MSR_LINK_SHIFT);
 651                 else
 652                         msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
 653                 rxconf |= (1<<RX_CHECK_BSSID_SHIFT);
 654
 655         } else {
 656                 msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
 657                 rxconf &= ~(1<<RX_CHECK_BSSID_SHIFT);
 658         }
 659
 660         write_nic_byte(dev, MSR, msr);
 661         write_nic_dword(dev, RX_CONF, rxconf);
 662 }
 663
 664 void rtl8180_set_chan(struct net_device *dev, short ch)
 665 {
 666         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 667
 668         if ((ch > 14) || (ch < 1)) {
 669                 printk("In %s: Invalid chnanel %d\n", __func__, ch);
 670                 return;
 671         }
 672
 673         priv->chan = ch;
 674         priv->rf_set_chan(dev, priv->chan);
 675 }
 676
 677 void set_nic_txring(struct net_device *dev)
 678 {
 679         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 680
 681         write_nic_dword(dev, TX_MANAGEPRIORITY_RING_ADDR, priv->txmapringdma);
 682         write_nic_dword(dev, TX_BKPRIORITY_RING_ADDR, priv->txbkpringdma);
 683         write_nic_dword(dev, TX_BEPRIORITY_RING_ADDR, priv->txbepringdma);
 684         write_nic_dword(dev, TX_VIPRIORITY_RING_ADDR, priv->txvipringdma);
 685         write_nic_dword(dev, TX_VOPRIORITY_RING_ADDR, priv->txvopringdma);
 686         write_nic_dword(dev, TX_HIGHPRIORITY_RING_ADDR, priv->txhpringdma);
 687         write_nic_dword(dev, TX_BEACON_RING_ADDR, priv->txbeaconringdma);
 688 }
 689
 690 void rtl8180_beacon_tx_enable(struct net_device *dev)
 691 {
 692         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 693
 694         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
 695         priv->dma_poll_stop_mask &= ~(TPPOLLSTOP_BQ);
 696         write_nic_byte(dev, TPPollStop, priv->dma_poll_mask);
 697         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
 698 }
 699
 700 void rtl8180_beacon_tx_disable(struct net_device *dev)
 701 {
 702         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 703
 704         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
 705         priv->dma_poll_stop_mask |= TPPOLLSTOP_BQ;
 706         write_nic_byte(dev, TPPollStop, priv->dma_poll_stop_mask);
 707         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
 708
 709 }
 710
 711 void rtl8180_rtx_disable(struct net_device *dev)
 712 {
 713         u8 cmd;
 714         struct r8180_priv *priv = ieee80211_priv(dev);
 715
 716         cmd = read_nic_byte(dev, CMD);
 717         write_nic_byte(dev, CMD, cmd &
 718                        ~((1<<CMD_RX_ENABLE_SHIFT)|(1<<CMD_TX_ENABLE_SHIFT)));
 719         force_pci_posting(dev);
 720         mdelay(10);
 721
 722         if (!priv->rx_skb_complete)
 723                 dev_kfree_skb_any(priv->rx_skb);
 724 }
 725
 726 short alloc_tx_desc_ring(struct net_device *dev, int bufsize, int count,
 727                          int addr)
 728 {
 729         int i;
 730         u32 *desc;
 731         u32 *tmp;
 732         dma_addr_t dma_desc, dma_tmp;
 733         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 734         struct pci_dev *pdev = priv->pdev;
 735         void *buf;
 736
 737         if ((bufsize & 0xfff) != bufsize) {
 738                 DMESGE("TX buffer allocation too large");
 739                 return 0;
 740         }
 741         desc = (u32 *)pci_alloc_consistent(pdev,
 742                                           sizeof(u32)*8*count+256, &dma_desc);
 743         if (desc == NULL)
 744                 return -1;
 745
 746         if (dma_desc & 0xff)
 747                 /*
 748                  * descriptor's buffer must be 256 byte aligned
 749                  * we shouldn't be here, since we set DMA mask !
 750                  */
 751                 WARN(1, "DMA buffer is not aligned\n");
 752
 753         tmp = desc;
 754
 755         for (i = 0; i < count; i++) {
 756                 buf = (void *)pci_alloc_consistent(pdev, bufsize, &dma_tmp);
 757                 if (buf == NULL)
 758                         return -ENOMEM;
 759
 760                 switch (addr) {
 761                 case TX_MANAGEPRIORITY_RING_ADDR:
 762                         if (-1 == buffer_add(&(priv->txmapbufs), buf, dma_tmp, NULL)) {
 763                                 DMESGE("Unable to allocate mem for buffer NP");
 764                                 return -ENOMEM;
 765                         }
 766                         break;
 767                 case TX_BKPRIORITY_RING_ADDR:
 768                         if (-1 == buffer_add(&(priv->txbkpbufs), buf, dma_tmp, NULL)) {
 769                                 DMESGE("Unable to allocate mem for buffer LP");
 770                                 return -ENOMEM;
 771                         }
 772                         break;
 773                 case TX_BEPRIORITY_RING_ADDR:
 774                         if (-1 == buffer_add(&(priv->txbepbufs), buf, dma_tmp, NULL)) {
 775                                 DMESGE("Unable to allocate mem for buffer NP");
 776                                 return -ENOMEM;
 777                         }
 778                         break;
 779                 case TX_VIPRIORITY_RING_ADDR:
 780                         if (-1 == buffer_add(&(priv->txvipbufs), buf, dma_tmp, NULL)) {
 781                                 DMESGE("Unable to allocate mem for buffer LP");
 782                                 return -ENOMEM;
 783                         }
 784                         break;
 785                 case TX_VOPRIORITY_RING_ADDR:
 786                         if (-1 == buffer_add(&(priv->txvopbufs), buf, dma_tmp, NULL)) {
 787                                 DMESGE("Unable to allocate mem for buffer NP");
 788                                 return -ENOMEM;
 789                         }
 790                         break;
 791                 case TX_HIGHPRIORITY_RING_ADDR:
 792                         if (-1 == buffer_add(&(priv->txhpbufs), buf, dma_tmp, NULL)) {
 793                                 DMESGE("Unable to allocate mem for buffer HP");
 794                                 return -ENOMEM;
 795                         }
 796                         break;
 797                 case TX_BEACON_RING_ADDR:
 798                         if (-1 == buffer_add(&(priv->txbeaconbufs), buf, dma_tmp, NULL)) {
 799                                 DMESGE("Unable to allocate mem for buffer BP");
 800                                 return -ENOMEM;
 801                         }
 802                         break;
 803                 }
 804                 *tmp = *tmp & ~(1<<31); /* descriptor empty, owned by the drv */
 805                 *(tmp+2) = (u32)dma_tmp;
 806                 *(tmp+3) = bufsize;
 807
 808                 if (i+1 < count)
 809                         *(tmp+4) = (u32)dma_desc+((i+1)*8*4);
 810                 else
 811                         *(tmp+4) = (u32)dma_desc;
 812
 813                 tmp = tmp+8;
 814         }
 815
 816         switch (addr) {
 817         case TX_MANAGEPRIORITY_RING_ADDR:
 818                 priv->txmapringdma = dma_desc;
 819                 priv->txmapring = desc;
 820                 break;
 821         case TX_BKPRIORITY_RING_ADDR:
 822                 priv->txbkpringdma = dma_desc;
 823                 priv->txbkpring = desc;
 824                 break;
 825         case TX_BEPRIORITY_RING_ADDR:
 826                 priv->txbepringdma = dma_desc;
 827                 priv->txbepring = desc;
 828                 break;
 829         case TX_VIPRIORITY_RING_ADDR:
 830                 priv->txvipringdma = dma_desc;
 831                 priv->txvipring = desc;
 832                 break;
 833         case TX_VOPRIORITY_RING_ADDR:
 834                 priv->txvopringdma = dma_desc;
 835                 priv->txvopring = desc;
 836                 break;
 837         case TX_HIGHPRIORITY_RING_ADDR:
 838                 priv->txhpringdma = dma_desc;
 839                 priv->txhpring = desc;
 840                 break;
 841         case TX_BEACON_RING_ADDR:
 842                 priv->txbeaconringdma = dma_desc;
 843                 priv->txbeaconring = desc;
 844                 break;
 845
 846         }
 847
 848         return 0;
 849 }
 850
 851 void free_tx_desc_rings(struct net_device *dev)
 852 {
 853         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 854         struct pci_dev *pdev = priv->pdev;
 855         int count = priv->txringcount;
 856
 857         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
 858                             priv->txmapring, priv->txmapringdma);
 859         buffer_free(dev, &(priv->txmapbufs), priv->txbuffsize, 1);
 860
 861         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
 862                             priv->txbkpring, priv->txbkpringdma);
 863         buffer_free(dev, &(priv->txbkpbufs), priv->txbuffsize, 1);
 864
 865         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
 866                             priv->txbepring, priv->txbepringdma);
 867         buffer_free(dev, &(priv->txbepbufs), priv->txbuffsize, 1);
 868
 869         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
 870                             priv->txvipring, priv->txvipringdma);
 871         buffer_free(dev, &(priv->txvipbufs), priv->txbuffsize, 1);
 872
 873         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
 874                             priv->txvopring, priv->txvopringdma);
 875         buffer_free(dev, &(priv->txvopbufs), priv->txbuffsize, 1);
 876
 877         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
 878                             priv->txhpring, priv->txhpringdma);
 879         buffer_free(dev, &(priv->txhpbufs), priv->txbuffsize, 1);
 880
 881         count = priv->txbeaconcount;
 882         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
 883                             priv->txbeaconring, priv->txbeaconringdma);
 884         buffer_free(dev, &(priv->txbeaconbufs), priv->txbuffsize, 1);
 885 }
 886
 887 void free_rx_desc_ring(struct net_device *dev)
 888 {
 889         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 890         struct pci_dev *pdev = priv->pdev;
 891         int count = priv->rxringcount;
 892
 893         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
 894                             priv->rxring, priv->rxringdma);
 895
 896         buffer_free(dev, &(priv->rxbuffer), priv->rxbuffersize, 0);
 897 }
 898
 899 short alloc_rx_desc_ring(struct net_device *dev, u16 bufsize, int count)
 900 {
 901         int i;
 902         u32 *desc;
 903         u32 *tmp;
 904         dma_addr_t dma_desc, dma_tmp;
 905         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 906         struct pci_dev *pdev = priv->pdev;
 907         void *buf;
 908         u8 rx_desc_size;
 909
 910         rx_desc_size = 8; /* 4*8 = 32 bytes */
 911
 912         if ((bufsize & 0xfff) != bufsize) {
 913                 DMESGE("RX buffer allocation too large");
 914                 return -1;
 915         }
 916
 917         desc = (u32 *)pci_alloc_consistent(pdev, sizeof(u32)*rx_desc_size*count+256,
 918                                           &dma_desc);
 919
 920         if (dma_desc & 0xff)
 921                 /*
 922                  * descriptor's buffer must be 256 byte aligned
 923                  * should never happen since we specify the DMA mask
 924                  */
 925                 WARN(1, "DMA buffer is not aligned\n");
 926
 927         priv->rxring = desc;
 928         priv->rxringdma = dma_desc;
 929         tmp = desc;
 930
 931         for (i = 0; i < count; i++) {
 932                 buf = kmalloc(bufsize * sizeof(u8), GFP_ATOMIC);
 933                 if (buf == NULL) {
 934                         DMESGE("Failed to kmalloc RX buffer");
 935                         return -1;
 936                 }
 937
 938                 dma_tmp = pci_map_single(pdev, buf, bufsize * sizeof(u8),
 939                                          PCI_DMA_FROMDEVICE);
 940
 941                 if (-1 == buffer_add(&(priv->rxbuffer), buf, dma_tmp,
 942                            &(priv->rxbufferhead))) {
 943                         DMESGE("Unable to allocate mem RX buf");
 944                         return -1;
 945                 }
 946                 *tmp = 0; /* zero pads the header of the descriptor */
 947                 *tmp = *tmp | (bufsize&0xfff);
 948                 *(tmp+2) = (u32)dma_tmp;
 949                 *tmp = *tmp | (1<<31); /* descriptor void, owned by the NIC */
 950
 951                 tmp = tmp+rx_desc_size;
 952         }
 953
 954         *(tmp-rx_desc_size) = *(tmp-rx_desc_size) | (1<<30); /* this is the last descriptor */
 955
 956         return 0;
 957 }
 958
 959
 960 void set_nic_rxring(struct net_device *dev)
 961 {
 962         u8 pgreg;
 963         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 964
 965         pgreg = read_nic_byte(dev, PGSELECT);
 966         write_nic_byte(dev, PGSELECT, pgreg & ~(1<<PGSELECT_PG_SHIFT));
 967
 968         write_nic_dword(dev, RXRING_ADDR, priv->rxringdma);
 969 }
 970
 971 void rtl8180_reset(struct net_device *dev)
 972 {
 973         u8 cr;
 974
 975         rtl8180_irq_disable(dev);
 976
 977         cr = read_nic_byte(dev, CMD);
 978         cr = cr & 2;
 979         cr = cr | (1<<CMD_RST_SHIFT);
 980         write_nic_byte(dev, CMD, cr);
 981
 982         force_pci_posting(dev);
 983
 984         mdelay(200);
 985
 986         if (read_nic_byte(dev, CMD) & (1<<CMD_RST_SHIFT))
 987                 DMESGW("Card reset timeout!");
 988         else
 989                 DMESG("Card successfully reset");
 990
 991         rtl8180_set_mode(dev, EPROM_CMD_LOAD);
 992         force_pci_posting(dev);
 993         mdelay(200);
 994 }
 995
 996 inline u16 ieeerate2rtlrate(int rate)
 997 {
 998         switch (rate) {
 999         case 10:
1000                 return 0;
1001         case 20:
1002                 return 1;
1003         case 55:
1004                 return 2;
1005         case 110:
1006                 return 3;
1007         case 60:
1008                 return 4;
1009         case 90:
1010                 return 5;
1011         case 120:
1012                 return 6;
1013         case 180:
1014                 return 7;
1015         case 240:
1016                 return 8;
1017         case 360:
1018                 return 9;
1019         case 480:
1020                 return 10;
1021         case 540:
1022                 return 11;
1023         default:
1024                 return 3;
1025         }
1026 }
1027
1028 static u16 rtl_rate[] = {10, 20, 55, 110, 60, 90, 120, 180, 240, 360, 480, 540, 720};
1029
1030 inline u16 rtl8180_rate2rate(short rate)
1031 {
1032         if (rate > 12)
1033                 return 10;
1034         return rtl_rate[rate];
1035 }
1036
1037 inline u8 rtl8180_IsWirelessBMode(u16 rate)
1038 {
1039         if (((rate <= 110) && (rate != 60) && (rate != 90)) || (rate == 220))
1040                 return 1;
1041         else
1042                 return 0;
1043 }
1044
1045 u16 N_DBPSOfRate(u16 DataRate);
1046
1047 u16 ComputeTxTime(u16 FrameLength, u16 DataRate, u8 bManagementFrame,
1048                   u8 bShortPreamble)
1049 {
1050         u16     FrameTime;
1051         u16     N_DBPS;
1052         u16     Ceiling;
1053
1054         if (rtl8180_IsWirelessBMode(DataRate)) {
1055                 if (bManagementFrame || !bShortPreamble || DataRate == 10)
1056                         /* long preamble */
1057                         FrameTime = (u16)(144+48+(FrameLength*8/(DataRate/10)));
1058                 else
1059                         /* short preamble */
1060                         FrameTime = (u16)(72+24+(FrameLength*8/(DataRate/10)));
1061
1062                 if ((FrameLength*8 % (DataRate/10)) != 0) /* get the ceilling */
1063                         FrameTime++;
1064         } else {        /* 802.11g DSSS-OFDM PLCP length field calculation. */
1065                 N_DBPS = N_DBPSOfRate(DataRate);
1066                 Ceiling = (16 + 8*FrameLength + 6) / N_DBPS
1067                                 + (((16 + 8*FrameLength + 6) % N_DBPS) ? 1 : 0);
1068                 FrameTime = (u16)(16 + 4 + 4*Ceiling + 6);
1069         }
1070         return FrameTime;
1071 }
1072
1073 u16 N_DBPSOfRate(u16 DataRate)
1074 {
1075          u16 N_DBPS = 24;
1076
1077         switch (DataRate) {
1078         case 60:
1079                 N_DBPS = 24;
1080                 break;
1081         case 90:
1082                 N_DBPS = 36;
1083                 break;
1084         case 120:
1085                 N_DBPS = 48;
1086                 break;
1087         case 180:
1088                 N_DBPS = 72;
1089                 break;
1090         case 240:
1091                 N_DBPS = 96;
1092                 break;
1093         case 360:
1094                 N_DBPS = 144;
1095                 break;
1096         case 480:
1097                 N_DBPS = 192;
1098                 break;
1099         case 540:
1100                 N_DBPS = 216;
1101                 break;
1102         default:
1103                 break;
1104         }
1105
1106         return N_DBPS;
1107 }
1108
1109 /*
1110  * For Netgear case, they want good-looking signal strength.
1111  */
1112 long NetgearSignalStrengthTranslate(long LastSS, long CurrSS)
1113 {
1114         long RetSS;
1115
1116         /* Step 1. Scale mapping. */
1117         if (CurrSS >= 71 && CurrSS <= 100)
1118                 RetSS = 90 + ((CurrSS - 70) / 3);
1119         else if (CurrSS >= 41 && CurrSS <= 70)
1120                 RetSS = 78 + ((CurrSS - 40) / 3);
1121         else if (CurrSS >= 31 && CurrSS <= 40)
1122                 RetSS = 66 + (CurrSS - 30);
1123         else if (CurrSS >= 21 && CurrSS <= 30)
1124                 RetSS = 54 + (CurrSS - 20);
1125         else if (CurrSS >= 5 && CurrSS <= 20)
1126                 RetSS = 42 + (((CurrSS - 5) * 2) / 3);
1127         else if (CurrSS == 4)
1128                 RetSS = 36;
1129         else if (CurrSS == 3)
1130                 RetSS = 27;
1131         else if (CurrSS == 2)
1132                 RetSS = 18;
1133         else if (CurrSS == 1)
1134                 RetSS = 9;
1135         else
1136                 RetSS = CurrSS;
1137
1138         /* Step 2. Smoothing. */
1139         if (LastSS > 0)
1140                 RetSS = ((LastSS * 5) + (RetSS) + 5) / 6;
1141
1142         return RetSS;
1143 }
1144
1145 /*
1146  * Translate 0-100 signal strength index into dBm.
1147  */
1148 long TranslateToDbm8185(u8 SignalStrengthIndex)
1149 {
1150         long SignalPower;
1151
1152         /* Translate to dBm (x=0.5y-95). */
1153         SignalPower = (long)((SignalStrengthIndex + 1) >> 1);
1154         SignalPower -= 95;
1155
1156         return SignalPower;
1157 }
1158
1159 /*
1160  * Perform signal smoothing for dynamic mechanism.
1161  * This is different with PerformSignalSmoothing8185 in smoothing formula.
1162  * No dramatic adjustion is apply because dynamic mechanism need some degree
1163  * of correctness. Ported from 8187B.
1164  */
1165 void PerformUndecoratedSignalSmoothing8185(struct r8180_priv *priv,
1166                                            bool bCckRate)
1167 {
1168         /* Determin the current packet is CCK rate. */
1169         priv->bCurCCKPkt = bCckRate;
1170
1171         if (priv->UndecoratedSmoothedSS >= 0)
1172                 priv->UndecoratedSmoothedSS = ((priv->UndecoratedSmoothedSS * 5) +
1173                                                (priv->SignalStrength * 10)) / 6;
1174         else
1175                 priv->UndecoratedSmoothedSS = priv->SignalStrength * 10;
1176
1177         priv->UndercorateSmoothedRxPower = ((priv->UndercorateSmoothedRxPower * 50) +
1178                                             (priv->RxPower * 11)) / 60;
1179
1180         if (bCckRate)
1181                 priv->CurCCKRSSI = priv->RSSI;
1182         else
1183                 priv->CurCCKRSSI = 0;
1184 }
1185
1186
1187 /*
1188  * This is rough RX isr handling routine
1189  */
1190 void rtl8180_rx(struct net_device *dev)
1191 {
1192         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1193         struct sk_buff *tmp_skb;
1194         short first, last;
1195         u32 len;
1196         int lastlen;
1197         unsigned char quality, signal;
1198         u8 rate;
1199         u32 *tmp, *tmp2;
1200         u8 rx_desc_size;
1201         u8 padding;
1202         char rxpower = 0;
1203         u32 RXAGC = 0;
1204         long RxAGC_dBm = 0;
1205         u8      LNA = 0, BB = 0;
1206         u8      LNA_gain[4] = {02, 17, 29, 39};
1207         u8  Antenna = 0;
1208         struct ieee80211_hdr_4addr *hdr;
1209         u16 fc, type;
1210         u8 bHwError = 0, bCRC = 0, bICV = 0;
1211         bool    bCckRate = false;
1212         u8     RSSI = 0;
1213         long    SignalStrengthIndex = 0;
1214         struct ieee80211_rx_stats stats = {
1215                 .signal = 0,
1216                 .noise = -98,
1217                 .rate = 0,
1218                 .freq = IEEE80211_24GHZ_BAND,
1219         };
1220
1221         stats.nic_type = NIC_8185B;
1222         rx_desc_size = 8;
1223
1224         if ((*(priv->rxringtail)) & (1<<31)) {
1225                 /* we have got an RX int, but the descriptor
1226                  * we are pointing is empty */
1227
1228                 priv->stats.rxnodata++;
1229                 priv->ieee80211->stats.rx_errors++;
1230
1231                 tmp2 = NULL;
1232                 tmp = priv->rxringtail;
1233                 do {
1234                         if (tmp == priv->rxring)
1235                                 tmp  = priv->rxring + (priv->rxringcount - 1)*rx_desc_size;
1236                         else
1237                                 tmp -= rx_desc_size;
1238
1239                         if (!(*tmp & (1<<31)))
1240                                 tmp2 = tmp;
1241                 } while (tmp != priv->rxring);
1242
1243                 if (tmp2)
1244                         priv->rxringtail = tmp2;
1245         }
1246
1247         /* while there are filled descriptors */
1248         while (!(*(priv->rxringtail) & (1<<31))) {
1249                 if (*(priv->rxringtail) & (1<<26))
1250                         DMESGW("RX buffer overflow");
1251                 if (*(priv->rxringtail) & (1<<12))
1252                         priv->stats.rxicverr++;
1253
1254                 if (*(priv->rxringtail) & (1<<27)) {
1255                         priv->stats.rxdmafail++;
1256                         /* DMESG("EE: RX DMA FAILED at buffer pointed by descriptor %x",(u32)priv->rxringtail); */
1257                         goto drop;
1258                 }
1259
1260                 pci_dma_sync_single_for_cpu(priv->pdev,
1261                                     priv->rxbuffer->dma,
1262                                     priv->rxbuffersize * sizeof(u8),
1263                                     PCI_DMA_FROMDEVICE);
1264
1265                 first = *(priv->rxringtail) & (1<<29) ? 1 : 0;
1266                 if (first)
1267                         priv->rx_prevlen = 0;
1268
1269                 last = *(priv->rxringtail) & (1<<28) ? 1 : 0;
1270                 if (last) {
1271                         lastlen = ((*priv->rxringtail) & 0xfff);
1272
1273                         /* if the last descriptor (that should
1274                          * tell us the total packet len) tell
1275                          * us something less than the descriptors
1276                          * len we had until now, then there is some
1277                          * problem..
1278                          * workaround to prevent kernel panic
1279                          */
1280                         if (lastlen < priv->rx_prevlen)
1281                                 len = 0;
1282                         else
1283                                 len = lastlen-priv->rx_prevlen;
1284
1285                         if (*(priv->rxringtail) & (1<<13)) {
1286                                 if ((*(priv->rxringtail) & 0xfff) < 500)
1287                                         priv->stats.rxcrcerrmin++;
1288                                 else if ((*(priv->rxringtail) & 0x0fff) > 1000)
1289                                         priv->stats.rxcrcerrmax++;
1290                                 else
1291                                         priv->stats.rxcrcerrmid++;
1292
1293                         }
1294
1295                 } else {
1296                         len = priv->rxbuffersize;
1297                 }
1298
1299                 if (first && last) {
1300                         padding = ((*(priv->rxringtail+3))&(0x04000000))>>26;
1301                 } else if (first) {
1302                         padding = ((*(priv->rxringtail+3))&(0x04000000))>>26;
1303                         if (padding)
1304                                 len -= 2;
1305                 } else {
1306                         padding = 0;
1307                 }
1308                 padding = 0;
1309                 priv->rx_prevlen += len;
1310
1311                 if (priv->rx_prevlen > MAX_FRAG_THRESHOLD + 100) {
1312                         /* HW is probably passing several buggy frames
1313                         * without FD or LD flag set.
1314                         * Throw this garbage away to prevent skb
1315                         * memory exhausting
1316                         */
1317                         if (!priv->rx_skb_complete)
1318                                 dev_kfree_skb_any(priv->rx_skb);
1319                         priv->rx_skb_complete = 1;
1320                 }
1321
1322                 signal = (unsigned char)(((*(priv->rxringtail+3)) & (0x00ff0000))>>16);
1323                 signal = (signal & 0xfe) >> 1;
1324
1325                 quality = (unsigned char)((*(priv->rxringtail+3)) & (0xff));
1326
1327                 stats.mac_time[0] = *(priv->rxringtail+1);
1328                 stats.mac_time[1] = *(priv->rxringtail+2);
1329                 rxpower = ((char)(((*(priv->rxringtail+4)) & (0x00ff0000))>>16))/2 - 42;
1330                 RSSI = ((u8)(((*(priv->rxringtail+3)) & (0x0000ff00))>>8)) & (0x7f);
1331
1332                 rate = ((*(priv->rxringtail)) &
1333                         ((1<<23)|(1<<22)|(1<<21)|(1<<20)))>>20;
1334
1335                 stats.rate = rtl8180_rate2rate(rate);
1336                 Antenna = (((*(priv->rxringtail+3)) & (0x00008000)) == 0) ? 0 : 1;
1337                 if (!rtl8180_IsWirelessBMode(stats.rate)) { /* OFDM rate. */
1338                         RxAGC_dBm = rxpower+1;  /* bias */
1339                 } else { /* CCK rate. */
1340                         RxAGC_dBm = signal; /* bit 0 discard */
1341
1342                         LNA = (u8) (RxAGC_dBm & 0x60) >> 5; /* bit 6~ bit 5 */
1343                         BB  = (u8) (RxAGC_dBm & 0x1F); /* bit 4 ~ bit 0 */
1344
1345                         RxAGC_dBm = -(LNA_gain[LNA] + (BB*2)); /* Pin_11b=-(LNA_gain+BB_gain) (dBm) */
1346
1347                         RxAGC_dBm += 4; /* bias */
1348                 }
1349
1350                 if (RxAGC_dBm & 0x80) /* absolute value */
1351                         RXAGC = ~(RxAGC_dBm)+1;
1352                 bCckRate = rtl8180_IsWirelessBMode(stats.rate);
1353                 /* Translate RXAGC into 1-100. */
1354                 if (!rtl8180_IsWirelessBMode(stats.rate)) { /* OFDM rate. */
1355                         if (RXAGC > 90)
1356                                 RXAGC = 90;
1357                         else if (RXAGC < 25)
1358                                 RXAGC = 25;
1359                         RXAGC = (90-RXAGC)*100/65;
1360                 } else { /* CCK rate. */
1361                         if (RXAGC > 95)
1362                                 RXAGC = 95;
1363                         else if (RXAGC < 30)
1364                                 RXAGC = 30;
1365                         RXAGC = (95-RXAGC)*100/65;
1366                 }
1367                 priv->SignalStrength = (u8)RXAGC;
1368                 priv->RecvSignalPower = RxAGC_dBm;
1369                 priv->RxPower = rxpower;
1370                 priv->RSSI = RSSI;
1371                 /* SQ translation formula is provided by SD3 DZ. 2006.06.27 */
1372                 if (quality >= 127)
1373                         quality = 1; /*0; */ /* 0 will cause epc to show signal zero , walk around now; */
1374                 else if (quality < 27)
1375                         quality = 100;
1376                 else
1377                         quality = 127 - quality;
1378                 priv->SignalQuality = quality;
1379
1380                 stats.signal = (u8)quality; /*priv->wstats.qual.level = priv->SignalStrength; */
1381                 stats.signalstrength = RXAGC;
1382                 if (stats.signalstrength > 100)
1383                         stats.signalstrength = 100;
1384                 stats.signalstrength = (stats.signalstrength * 70)/100 + 30;
1385                 /* printk("==========================>rx : RXAGC is %d,signalstrength is %d\n",RXAGC,stats.signalstrength); */
1386                 stats.rssi = priv->wstats.qual.qual = priv->SignalQuality;
1387                 stats.noise = priv->wstats.qual.noise = 100 - priv->wstats.qual.qual;
1388                 bHwError = (((*(priv->rxringtail)) & (0x00000fff)) == 4080) |
1389                            (((*(priv->rxringtail)) & (0x04000000)) != 0) |
1390                            (((*(priv->rxringtail)) & (0x08000000)) != 0) |
1391                            (((~(*(priv->rxringtail))) & (0x10000000)) != 0) |
1392                            (((~(*(priv->rxringtail))) & (0x20000000)) != 0);
1393                 bCRC = ((*(priv->rxringtail)) & (0x00002000)) >> 13;
1394                 bICV = ((*(priv->rxringtail)) & (0x00001000)) >> 12;
1395                 hdr = (struct ieee80211_hdr_4addr *)priv->rxbuffer->buf;
1396                     fc = le16_to_cpu(hdr->frame_ctl);
1397                 type = WLAN_FC_GET_TYPE(fc);
1398
1399                 if (IEEE80211_FTYPE_CTL != type &&
1400                     !bHwError && !bCRC && !bICV &&
1401                     eqMacAddr(priv->ieee80211->current_network.bssid,
1402                         fc & IEEE80211_FCTL_TODS ? hdr->addr1 :
1403                         fc & IEEE80211_FCTL_FROMDS ? hdr->addr2 :
1404                         hdr->addr3)) {
1405
1406                         /* Perform signal smoothing for dynamic
1407                          * mechanism on demand. This is different
1408                          * with PerformSignalSmoothing8185 in smoothing
1409                          * fomula. No dramatic adjustion is apply
1410                          * because dynamic mechanism need some degree
1411                          * of correctness. */
1412                         PerformUndecoratedSignalSmoothing8185(priv, bCckRate);
1413
1414                         /* For good-looking singal strength. */
1415                         SignalStrengthIndex = NetgearSignalStrengthTranslate(
1416                                                         priv->LastSignalStrengthInPercent,
1417                                                         priv->SignalStrength);
1418
1419                         priv->LastSignalStrengthInPercent = SignalStrengthIndex;
1420                         priv->Stats_SignalStrength = TranslateToDbm8185((u8)SignalStrengthIndex);
1421                 /*
1422                  * We need more correct power of received packets and the  "SignalStrength" of RxStats is beautified,
1423                  * so we record the correct power here.
1424                  */
1425                         priv->Stats_SignalQuality = (long)(priv->Stats_SignalQuality * 5 + (long)priv->SignalQuality + 5) / 6;
1426                         priv->Stats_RecvSignalPower = (long)(priv->Stats_RecvSignalPower * 5 + priv->RecvSignalPower - 1) / 6;
1427
1428                 /* Figure out which antenna that received the last packet. */
1429                         priv->LastRxPktAntenna = Antenna ? 1 : 0; /* 0: aux, 1: main. */
1430                         SwAntennaDiversityRxOk8185(dev, priv->SignalStrength);
1431                 }
1432
1433                 if (first) {
1434                         if (!priv->rx_skb_complete) {
1435                                 /* seems that HW sometimes fails to receive and
1436                                    doesn't provide the last descriptor */
1437                                 dev_kfree_skb_any(priv->rx_skb);
1438                                 priv->stats.rxnolast++;
1439                         }
1440                         priv->rx_skb = dev_alloc_skb(len+2);
1441                         if (!priv->rx_skb)
1442                                 goto drop;
1443
1444                         priv->rx_skb_complete = 0;
1445                         priv->rx_skb->dev = dev;
1446                 } else {
1447                         /* if we are here we should have already RXed
1448                         * the first frame.
1449                         * If we get here and the skb is not allocated then
1450                         * we have just throw out garbage (skb not allocated)
1451                         * and we are still rxing garbage....
1452                         */
1453                         if (!priv->rx_skb_complete) {
1454
1455                                 tmp_skb = dev_alloc_skb(priv->rx_skb->len+len+2);
1456
1457                                 if (!tmp_skb)
1458                                         goto drop;
1459
1460                                 tmp_skb->dev = dev;
1461
1462                                 memcpy(skb_put(tmp_skb, priv->rx_skb->len),
1463                                         priv->rx_skb->data,
1464                                         priv->rx_skb->len);
1465
1466                                 dev_kfree_skb_any(priv->rx_skb);
1467
1468                                 priv->rx_skb = tmp_skb;
1469                         }
1470                 }
1471
1472                 if (!priv->rx_skb_complete) {
1473                         if (padding) {
1474                                 memcpy(skb_put(priv->rx_skb, len),
1475                                         (((unsigned char *)priv->rxbuffer->buf) + 2), len);
1476                         } else {
1477                                 memcpy(skb_put(priv->rx_skb, len),
1478                                         priv->rxbuffer->buf, len);
1479                         }
1480                 }
1481
1482                 if (last && !priv->rx_skb_complete) {
1483                         if (priv->rx_skb->len > 4)
1484                                 skb_trim(priv->rx_skb, priv->rx_skb->len-4);
1485                         if (!ieee80211_rtl_rx(priv->ieee80211,
1486                                          priv->rx_skb, &stats))
1487                                 dev_kfree_skb_any(priv->rx_skb);
1488                         priv->rx_skb_complete = 1;
1489                 }
1490
1491                 pci_dma_sync_single_for_device(priv->pdev,
1492                                     priv->rxbuffer->dma,
1493                                     priv->rxbuffersize * sizeof(u8),
1494                                     PCI_DMA_FROMDEVICE);
1495
1496 drop: /* this is used when we have not enough mem */
1497                 /* restore the descriptor */
1498                 *(priv->rxringtail+2) = priv->rxbuffer->dma;
1499                 *(priv->rxringtail) = *(priv->rxringtail) & ~0xfff;
1500                 *(priv->rxringtail) =
1501                         *(priv->rxringtail) | priv->rxbuffersize;
1502
1503                 *(priv->rxringtail) =
1504                         *(priv->rxringtail) | (1<<31);
1505
1506                 priv->rxringtail += rx_desc_size;
1507                 if (priv->rxringtail >=
1508                    (priv->rxring)+(priv->rxringcount)*rx_desc_size)
1509                         priv->rxringtail = priv->rxring;
1510
1511                 priv->rxbuffer = (priv->rxbuffer->next);
1512         }
1513 }
1514
1515
1516 void rtl8180_dma_kick(struct net_device *dev, int priority)
1517 {
1518         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1519
1520         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
1521         write_nic_byte(dev, TX_DMA_POLLING,
1522                         (1 << (priority + 1)) | priv->dma_poll_mask);
1523         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
1524
1525         force_pci_posting(dev);
1526 }
1527
1528 void rtl8180_data_hard_stop(struct net_device *dev)
1529 {
1530         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1531
1532         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
1533         priv->dma_poll_stop_mask |= TPPOLLSTOP_AC_VIQ;
1534         write_nic_byte(dev, TPPollStop, priv->dma_poll_stop_mask);
1535         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
1536 }
1537
1538 void rtl8180_data_hard_resume(struct net_device *dev)
1539 {
1540         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1541
1542         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
1543         priv->dma_poll_stop_mask &= ~(TPPOLLSTOP_AC_VIQ);
1544         write_nic_byte(dev, TPPollStop, priv->dma_poll_stop_mask);
1545         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
1546 }
1547
1548 /*
1549  * This function TX data frames when the ieee80211 stack requires this.
1550  * It checks also if we need to stop the ieee tx queue, eventually do it
1551  */
1552 void rtl8180_hard_data_xmit(struct sk_buff *skb, struct net_device *dev, int
1553 rate) {
1554         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1555         int mode;
1556         struct ieee80211_hdr_3addr *h = (struct ieee80211_hdr_3addr *) skb->data;
1557         short morefrag = (h->frame_control) & IEEE80211_FCTL_MOREFRAGS;
1558         unsigned long flags;
1559         int priority;
1560
1561         mode = priv->ieee80211->iw_mode;
1562
1563         rate = ieeerate2rtlrate(rate);
1564         /*
1565          * This function doesn't require lock because we make
1566          * sure it's called with the tx_lock already acquired.
1567          * this come from the kernel's hard_xmit callback (through
1568          * the ieee stack, or from the try_wake_queue (again through
1569          * the ieee stack.
1570          */
1571         priority = AC2Q(skb->priority);
1572         spin_lock_irqsave(&priv->tx_lock, flags);
1573
1574         if (priv->ieee80211->bHwRadioOff) {
1575                 spin_unlock_irqrestore(&priv->tx_lock, flags);
1576
1577                 return;
1578         }
1579
1580         if (!check_nic_enought_desc(dev, priority)) {
1581                 DMESGW("Error: no descriptor left by previous TX (avail %d) ",
1582                         get_curr_tx_free_desc(dev, priority));
1583                 ieee80211_rtl_stop_queue(priv->ieee80211);
1584         }
1585         rtl8180_tx(dev, skb->data, skb->len, priority, morefrag, 0, rate);
1586         if (!check_nic_enought_desc(dev, priority))
1587                 ieee80211_rtl_stop_queue(priv->ieee80211);
1588
1589         spin_unlock_irqrestore(&priv->tx_lock, flags);
1590 }
1591
1592 /*
1593  * This is a rough attempt to TX a frame
1594  * This is called by the ieee 80211 stack to TX management frames.
1595  * If the ring is full packets are dropped (for data frame the queue
1596  * is stopped before this can happen). For this reason it is better
1597  * if the descriptors are larger than the largest management frame
1598  * we intend to TX: i'm unsure what the HW does if it will not find
1599  * the last fragment of a frame because it has been dropped...
1600  * Since queues for Management and Data frames are different we
1601  * might use a different lock than tx_lock (for example mgmt_tx_lock)
1602  */
1603 /* these function may loop if invoked with 0 descriptors or 0 len buffer */
1604 int rtl8180_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
1605 {
1606         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1607         unsigned long flags;
1608         int priority;
1609
1610         priority = MANAGE_PRIORITY;
1611
1612         spin_lock_irqsave(&priv->tx_lock, flags);
1613
1614         if (priv->ieee80211->bHwRadioOff) {
1615                 spin_unlock_irqrestore(&priv->tx_lock, flags);
1616                 dev_kfree_skb_any(skb);
1617                 return NETDEV_TX_OK;
1618         }
1619
1620         rtl8180_tx(dev, skb->data, skb->len, priority,
1621                 0, 0, ieeerate2rtlrate(priv->ieee80211->basic_rate));
1622
1623         priv->ieee80211->stats.tx_bytes += skb->len;
1624         priv->ieee80211->stats.tx_packets++;
1625         spin_unlock_irqrestore(&priv->tx_lock, flags);
1626
1627         dev_kfree_skb_any(skb);
1628         return NETDEV_TX_OK;
1629 }
1630
1631 /* longpre 144+48 shortpre 72+24 */
1632 u16 rtl8180_len2duration(u32 len, short rate, short *ext)
1633 {
1634         u16 duration;
1635         u16 drift;
1636         *ext = 0;
1637
1638         switch (rate) {
1639         case 0: /* 1mbps */
1640                 *ext = 0;
1641                 duration = ((len+4)<<4) / 0x2;
1642                 drift = ((len+4)<<4) % 0x2;
1643                 if (drift == 0)
1644                         break;
1645                 duration++;
1646                 break;
1647         case 1: /* 2mbps */
1648                 *ext = 0;
1649                 duration = ((len+4)<<4) / 0x4;
1650                 drift = ((len+4)<<4) % 0x4;
1651                 if (drift == 0)
1652                         break;
1653                 duration++;
1654                 break;
1655         case 2: /* 5.5mbps */
1656                 *ext = 0;
1657                 duration = ((len+4)<<4) / 0xb;
1658                 drift = ((len+4)<<4) % 0xb;
1659                 if (drift == 0)
1660                         break;
1661                 duration++;
1662                 break;
1663         default:
1664         case 3: /* 11mbps */
1665                 *ext = 0;
1666                 duration = ((len+4)<<4) / 0x16;
1667                 drift = ((len+4)<<4) % 0x16;
1668                 if (drift == 0)
1669                         break;
1670                 duration++;
1671                 if (drift > 6)
1672                         break;
1673                 *ext = 1;
1674                 break;
1675         }
1676
1677         return duration;
1678 }
1679
1680 void rtl8180_prepare_beacon(struct net_device *dev)
1681 {
1682         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1683         struct sk_buff *skb;
1684
1685         u16 word  = read_nic_word(dev, BcnItv);
1686         word &= ~BcnItv_BcnItv; /* clear Bcn_Itv */
1687         word |= cpu_to_le16(priv->ieee80211->current_network.beacon_interval); /* 0x64; */
1688         write_nic_word(dev, BcnItv, word);
1689
1690         skb = ieee80211_get_beacon(priv->ieee80211);
1691         if (skb) {
1692                 rtl8180_tx(dev, skb->data, skb->len, BEACON_PRIORITY,
1693                         0, 0, ieeerate2rtlrate(priv->ieee80211->basic_rate));
1694                 dev_kfree_skb_any(skb);
1695         }
1696 }
1697
1698 /*
1699  * This function do the real dirty work: it enqueues a TX command
1700  * descriptor in the ring buffer, copyes the frame in a TX buffer
1701  * and kicks the NIC to ensure it does the DMA transfer.
1702  */
1703 short rtl8180_tx(struct net_device *dev, u8 *txbuf, int len, int priority,
1704                  short morefrag, short descfrag, int rate)
1705 {
1706         struct r8180_priv *priv = ieee80211_priv(dev);
1707         u32 *tail, *temp_tail;
1708         u32 *begin;
1709         u32 *buf;
1710         int i;
1711         int remain;
1712         int buflen;
1713         int count;
1714         struct buffer *buflist;
1715         struct ieee80211_hdr_3addr *frag_hdr = (struct ieee80211_hdr_3addr *)txbuf;
1716         u8 dest[ETH_ALEN];
1717         u8                      bUseShortPreamble = 0;
1718         u8                      bCTSEnable = 0;
1719         u8                      bRTSEnable = 0;
1720         u16                     Duration = 0;
1721         u16                     RtsDur = 0;
1722         u16                     ThisFrameTime = 0;
1723         u16                     TxDescDuration = 0;
1724         u8                      ownbit_flag = false;
1725
1726         switch (priority) {
1727         case MANAGE_PRIORITY:
1728                 tail = priv->txmapringtail;
1729                 begin = priv->txmapring;
1730                 buflist = priv->txmapbufstail;
1731                 count = priv->txringcount;
1732                 break;
1733         case BK_PRIORITY:
1734                 tail = priv->txbkpringtail;
1735                 begin = priv->txbkpring;
1736                 buflist = priv->txbkpbufstail;
1737                 count = priv->txringcount;
1738                 break;
1739         case BE_PRIORITY:
1740                 tail = priv->txbepringtail;
1741                 begin = priv->txbepring;
1742                 buflist = priv->txbepbufstail;
1743                 count = priv->txringcount;
1744                 break;
1745         case VI_PRIORITY:
1746                 tail = priv->txvipringtail;
1747                 begin = priv->txvipring;
1748                 buflist = priv->txvipbufstail;
1749                 count = priv->txringcount;
1750                 break;
1751         case VO_PRIORITY:
1752                 tail = priv->txvopringtail;
1753                 begin = priv->txvopring;
1754                 buflist = priv->txvopbufstail;
1755                 count = priv->txringcount;
1756                 break;
1757         case HI_PRIORITY:
1758                 tail = priv->txhpringtail;
1759                 begin = priv->txhpring;
1760                 buflist = priv->txhpbufstail;
1761                 count = priv->txringcount;
1762                 break;
1763         case BEACON_PRIORITY:
1764                 tail = priv->txbeaconringtail;
1765                 begin = priv->txbeaconring;
1766                 buflist = priv->txbeaconbufstail;
1767                 count = priv->txbeaconcount;
1768                 break;
1769         default:
1770                 return -1;
1771                 break;
1772         }
1773
1774                 memcpy(&dest, frag_hdr->addr1, ETH_ALEN);
1775                 if (is_multicast_ether_addr(dest)) {
1776                         Duration = 0;
1777                         RtsDur = 0;
1778                         bRTSEnable = 0;
1779                         bCTSEnable = 0;
1780
1781                         ThisFrameTime = ComputeTxTime(len + sCrcLng, rtl8180_rate2rate(rate),
1782                                                       0, bUseShortPreamble);
1783                         TxDescDuration = ThisFrameTime;
1784                 } else { /* Unicast packet */
1785                         u16 AckTime;
1786
1787                         /* YJ,add,080828,for Keep alive */
1788                         priv->NumTxUnicast++;
1789
1790                         /* Figure out ACK rate according to BSS basic rate
1791                          * and Tx rate. */
1792                         AckTime = ComputeTxTime(14, 10, 0, 0);  /* AckCTSLng = 14 use 1M bps send */
1793
1794                         if (((len + sCrcLng) > priv->rts) && priv->rts) { /* RTS/CTS. */
1795                                 u16 RtsTime, CtsTime;
1796                                 /* u16 CtsRate; */
1797                                 bRTSEnable = 1;
1798                                 bCTSEnable = 0;
1799
1800                                 /* Rate and time required for RTS. */
1801                                 RtsTime = ComputeTxTime(sAckCtsLng/8, priv->ieee80211->basic_rate, 0, 0);
1802                                 /* Rate and time required for CTS. */
1803                                 CtsTime = ComputeTxTime(14, 10, 0, 0);  /* AckCTSLng = 14 use 1M bps send */
1804
1805                                 /* Figure out time required to transmit this frame. */
1806                                 ThisFrameTime = ComputeTxTime(len + sCrcLng,
1807                                                 rtl8180_rate2rate(rate),
1808                                                 0,
1809                                                 bUseShortPreamble);
1810
1811                                 /* RTS-CTS-ThisFrame-ACK. */
1812                                 RtsDur = CtsTime + ThisFrameTime + AckTime + 3*aSifsTime;
1813
1814                                 TxDescDuration = RtsTime + RtsDur;
1815                         } else { /* Normal case. */
1816                                 bCTSEnable = 0;
1817                                 bRTSEnable = 0;
1818                                 RtsDur = 0;
1819
1820                                 ThisFrameTime = ComputeTxTime(len + sCrcLng, rtl8180_rate2rate(rate),
1821                                                               0, bUseShortPreamble);
1822                                 TxDescDuration = ThisFrameTime + aSifsTime + AckTime;
1823                         }
1824
1825                         if (!(frag_hdr->frame_control & IEEE80211_FCTL_MOREFRAGS)) {
1826                                 /* ThisFrame-ACK. */
1827                                 Duration = aSifsTime + AckTime;
1828                         } else { /* One or more fragments remained. */
1829                                 u16 NextFragTime;
1830                                 NextFragTime = ComputeTxTime(len + sCrcLng, /* pretend following packet length equal current packet */
1831                                                 rtl8180_rate2rate(rate),
1832                                                 0,
1833                                                 bUseShortPreamble);
1834
1835                                 /* ThisFrag-ACk-NextFrag-ACK. */
1836                                 Duration = NextFragTime + 3*aSifsTime + 2*AckTime;
1837                         }
1838
1839                 } /* End of Unicast packet */
1840
1841                 frag_hdr->duration_id = Duration;
1842
1843         buflen = priv->txbuffsize;
1844         remain = len;
1845         temp_tail = tail;
1846
1847         while (remain != 0) {
1848                 mb();
1849                 if (!buflist) {
1850                         DMESGE("TX buffer error, cannot TX frames. pri %d.", priority);
1851                         return -1;
1852                 }
1853                 buf = buflist->buf;
1854
1855                 if ((*tail & (1 << 31)) && (priority != BEACON_PRIORITY)) {
1856                         DMESGW("No more TX desc, returning %x of %x",
1857                                remain, len);
1858                         priv->stats.txrdu++;
1859                         return remain;
1860                 }
1861
1862                 *tail = 0; /* zeroes header */
1863                 *(tail+1) = 0;
1864                 *(tail+3) = 0;
1865                 *(tail+5) = 0;
1866                 *(tail+6) = 0;
1867                 *(tail+7) = 0;
1868
1869                 /* FIXME: this should be triggered by HW encryption parameters.*/
1870                 *tail |= (1<<15); /* no encrypt */
1871
1872                 if (remain == len && !descfrag) {
1873                         ownbit_flag = false;
1874                         *tail = *tail | (1<<29) ; /* fist segment of the packet */
1875                         *tail = *tail | (len);
1876                 } else {
1877                         ownbit_flag = true;
1878                 }
1879
1880                 for (i = 0; i < buflen && remain > 0; i++, remain--) {
1881                         ((u8 *)buf)[i] = txbuf[i]; /* copy data into descriptor pointed DMAble buffer */
1882                         if (remain == 4 && i+4 >= buflen)
1883                                 break;
1884                         /* ensure the last desc has at least 4 bytes payload */
1885
1886                 }
1887                 txbuf = txbuf + i;
1888                 *(tail+3) = *(tail+3) & ~0xfff;
1889                 *(tail+3) = *(tail+3) | i; /* buffer length */
1890                 /* Use short preamble or not */
1891                 if (priv->ieee80211->current_network.capability&WLAN_CAPABILITY_SHORT_PREAMBLE)
1892                         if (priv->plcp_preamble_mode == 1 && rate != 0) /*  short mode now, not long! */
1893                         ; /* *tail |= (1<<16); */                               /* enable short preamble mode. */
1894
1895                 if (bCTSEnable)
1896                         *tail |= (1<<18);
1897
1898                 if (bRTSEnable) { /* rts enable */
1899                         *tail |= ((ieeerate2rtlrate(priv->ieee80211->basic_rate))<<19); /* RTS RATE */
1900                         *tail |= (1<<23); /* rts enable */
1901                         *(tail+1) |= (RtsDur&0xffff); /* RTS Duration */
1902                 }
1903                 *(tail+3) |= ((TxDescDuration&0xffff)<<16); /* DURATION */
1904                 /* *(tail+3) |= (0xe6<<16); */
1905                 *(tail+5) |= (11<<8); /* (priv->retry_data<<8); */ /* retry lim; */
1906
1907                 *tail = *tail | ((rate&0xf) << 24);
1908
1909                 if (morefrag)
1910                         *tail = (*tail) | (1<<17); /* more fragment */
1911                 if (!remain)
1912                         *tail = (*tail) | (1<<28); /* last segment of frame */
1913
1914                 *(tail+5) = *(tail+5)|(2<<27);
1915                 *(tail+7) = *(tail+7)|(1<<4);
1916
1917                 wmb();
1918                 if (ownbit_flag)
1919                         *tail = *tail | (1<<31); /* descriptor ready to be txed */
1920
1921                 if ((tail - begin)/8 == count-1)
1922                         tail = begin;
1923                 else
1924                         tail = tail+8;
1925
1926                 buflist = buflist->next;
1927
1928                 mb();
1929
1930                 switch (priority) {
1931                 case MANAGE_PRIORITY:
1932                         priv->txmapringtail = tail;
1933                         priv->txmapbufstail = buflist;
1934                         break;
1935                 case BK_PRIORITY:
1936                         priv->txbkpringtail = tail;
1937                         priv->txbkpbufstail = buflist;
1938                         break;
1939                 case BE_PRIORITY:
1940                         priv->txbepringtail = tail;
1941                         priv->txbepbufstail = buflist;
1942                         break;
1943                 case VI_PRIORITY:
1944                         priv->txvipringtail = tail;
1945                         priv->txvipbufstail = buflist;
1946                         break;
1947                 case VO_PRIORITY:
1948                         priv->txvopringtail = tail;
1949                         priv->txvopbufstail = buflist;
1950                         break;
1951                 case HI_PRIORITY:
1952                         priv->txhpringtail = tail;
1953                         priv->txhpbufstail = buflist;
1954                         break;
1955                 case BEACON_PRIORITY:
1956                         /*
1957                          * The HW seems to be happy with the 1st
1958                          * descriptor filled and the 2nd empty...
1959                          * So always update descriptor 1 and never
1960                          * touch 2nd
1961                          */
1962                         break;
1963                 }
1964         }
1965         *temp_tail = *temp_tail | (1<<31); /* descriptor ready to be txed */
1966         rtl8180_dma_kick(dev, priority);
1967
1968         return 0;
1969 }
1970
1971 void rtl8180_irq_rx_tasklet(struct r8180_priv *priv);
1972
1973 void rtl8180_link_change(struct net_device *dev)
1974 {
1975         struct r8180_priv *priv = ieee80211_priv(dev);
1976         u16 beacon_interval;
1977         struct ieee80211_network *net = &priv->ieee80211->current_network;
1978
1979         rtl8180_update_msr(dev);
1980
1981         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
1982
1983         write_nic_dword(dev, BSSID, ((u32 *)net->bssid)[0]);
1984         write_nic_word(dev, BSSID+4, ((u16 *)net->bssid)[2]);
1985
1986         beacon_interval  = read_nic_word(dev, BEACON_INTERVAL);
1987         beacon_interval &= ~BEACON_INTERVAL_MASK;
1988         beacon_interval |= net->beacon_interval;
1989         write_nic_word(dev, BEACON_INTERVAL, beacon_interval);
1990
1991         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
1992
1993         rtl8180_set_chan(dev, priv->chan);
1994 }
1995
1996 void rtl8180_rq_tx_ack(struct net_device *dev)
1997 {
1998
1999         struct r8180_priv *priv = ieee80211_priv(dev);
2000
2001         write_nic_byte(dev, CONFIG4, read_nic_byte(dev, CONFIG4) | CONFIG4_PWRMGT);
2002         priv->ack_tx_to_ieee = 1;
2003 }
2004
2005 short rtl8180_is_tx_queue_empty(struct net_device *dev)
2006 {
2007
2008         struct r8180_priv *priv = ieee80211_priv(dev);
2009         u32 *d;
2010
2011         for (d = priv->txmapring;
2012                 d < priv->txmapring + priv->txringcount; d += 8)
2013                         if (*d & (1<<31))
2014                                 return 0;
2015
2016         for (d = priv->txbkpring;
2017                 d < priv->txbkpring + priv->txringcount; d += 8)
2018                         if (*d & (1<<31))
2019                                 return 0;
2020
2021         for (d = priv->txbepring;
2022                 d < priv->txbepring + priv->txringcount; d += 8)
2023                         if (*d & (1<<31))
2024                                 return 0;
2025
2026         for (d = priv->txvipring;
2027                 d < priv->txvipring + priv->txringcount; d += 8)
2028                         if (*d & (1<<31))
2029                                 return 0;
2030
2031         for (d = priv->txvopring;
2032                 d < priv->txvopring + priv->txringcount; d += 8)
2033                         if (*d & (1<<31))
2034                                 return 0;
2035
2036         for (d = priv->txhpring;
2037                 d < priv->txhpring + priv->txringcount; d += 8)
2038                         if (*d & (1<<31))
2039                                 return 0;
2040         return 1;
2041 }
2042
2043 void rtl8180_hw_wakeup(struct net_device *dev)
2044 {
2045         unsigned long flags;
2046         struct r8180_priv *priv = ieee80211_priv(dev);
2047
2048         spin_lock_irqsave(&priv->ps_lock, flags);
2049         write_nic_byte(dev, CONFIG4, read_nic_byte(dev, CONFIG4) & ~CONFIG4_PWRMGT);
2050         if (priv->rf_wakeup)
2051                 priv->rf_wakeup(dev);
2052         spin_unlock_irqrestore(&priv->ps_lock, flags);
2053 }
2054
2055 void rtl8180_hw_sleep_down(struct net_device *dev)
2056 {
2057         unsigned long flags;
2058         struct r8180_priv *priv = ieee80211_priv(dev);
2059
2060         spin_lock_irqsave(&priv->ps_lock, flags);
2061         if (priv->rf_sleep)
2062                 priv->rf_sleep(dev);
2063         spin_unlock_irqrestore(&priv->ps_lock, flags);
2064 }
2065
2066 void rtl8180_hw_sleep(struct net_device *dev, u32 th, u32 tl)
2067 {
2068         struct r8180_priv *priv = ieee80211_priv(dev);
2069         u32 rb = jiffies;
2070         unsigned long flags;
2071
2072         spin_lock_irqsave(&priv->ps_lock, flags);
2073
2074         /*
2075          * Writing HW register with 0 equals to disable
2076          * the timer, that is not really what we want
2077          */
2078         tl -= MSECS(4+16+7);
2079
2080         /*
2081          * If the interval in witch we are requested to sleep is too
2082          * short then give up and remain awake
2083          */
2084         if (((tl >= rb) && (tl-rb) <= MSECS(MIN_SLEEP_TIME))
2085                 || ((rb > tl) && (rb-tl) < MSECS(MIN_SLEEP_TIME))) {
2086                 spin_unlock_irqrestore(&priv->ps_lock, flags);
2087                 printk("too short to sleep\n");
2088                 return;
2089         }
2090
2091         {
2092                 u32 tmp = (tl > rb) ? (tl-rb) : (rb-tl);
2093
2094                 priv->DozePeriodInPast2Sec += jiffies_to_msecs(tmp);
2095                 /* as tl may be less than rb */
2096                 queue_delayed_work(priv->ieee80211->wq, &priv->ieee80211->hw_wakeup_wq, tmp);
2097         }
2098         /*
2099          * If we suspect the TimerInt is gone beyond tl
2100          * while setting it, then give up
2101          */
2102
2103         if (((tl > rb) && ((tl-rb) > MSECS(MAX_SLEEP_TIME))) ||
2104                 ((tl < rb) && ((rb-tl) > MSECS(MAX_SLEEP_TIME)))) {
2105                 spin_unlock_irqrestore(&priv->ps_lock, flags);
2106                 return;
2107         }
2108
2109         queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_sleep_wq);
2110         spin_unlock_irqrestore(&priv->ps_lock, flags);
2111 }
2112
2113 void rtl8180_wmm_param_update(struct work_struct *work)
2114 {
2115         struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, wmm_param_update_wq);
2116         struct net_device *dev = ieee->dev;
2117         u8 *ac_param = (u8 *)(ieee->current_network.wmm_param);
2118         u8 mode = ieee->current_network.mode;
2119         AC_CODING       eACI;
2120         AC_PARAM        AcParam;
2121         PAC_PARAM       pAcParam;
2122         u8 i;
2123
2124         if (!ieee->current_network.QoS_Enable) {
2125                 /* legacy ac_xx_param update */
2126                 AcParam.longData = 0;
2127                 AcParam.f.AciAifsn.f.AIFSN = 2; /* Follow 802.11 DIFS. */
2128                 AcParam.f.AciAifsn.f.ACM = 0;
2129                 AcParam.f.Ecw.f.ECWmin = 3; /* Follow 802.11 CWmin. */
2130                 AcParam.f.Ecw.f.ECWmax = 7; /* Follow 802.11 CWmax. */
2131                 AcParam.f.TXOPLimit = 0;
2132                 for (eACI = 0; eACI < AC_MAX; eACI++) {
2133                         AcParam.f.AciAifsn.f.ACI = (u8)eACI;
2134                         {
2135                                 u8              u1bAIFS;
2136                                 u32             u4bAcParam;
2137                                 pAcParam = (PAC_PARAM)(&AcParam);
2138                                 /* Retrieve parameters to update. */
2139                                 u1bAIFS = pAcParam->f.AciAifsn.f.AIFSN * (((mode&IEEE_G) == IEEE_G) ? 9 : 20) + aSifsTime;
2140                                 u4bAcParam = ((((u32)(pAcParam->f.TXOPLimit))<<AC_PARAM_TXOP_LIMIT_OFFSET)|
2141                                               (((u32)(pAcParam->f.Ecw.f.ECWmax))<<AC_PARAM_ECW_MAX_OFFSET)|
2142                                               (((u32)(pAcParam->f.Ecw.f.ECWmin))<<AC_PARAM_ECW_MIN_OFFSET)|
2143                                                (((u32)u1bAIFS) << AC_PARAM_AIFS_OFFSET));
2144                                 switch (eACI) {
2145                                 case AC1_BK:
2146                                         write_nic_dword(dev, AC_BK_PARAM, u4bAcParam);
2147                                         break;
2148                                 case AC0_BE:
2149                                         write_nic_dword(dev, AC_BE_PARAM, u4bAcParam);
2150                                         break;
2151                                 case AC2_VI:
2152                                         write_nic_dword(dev, AC_VI_PARAM, u4bAcParam);
2153                                         break;
2154                                 case AC3_VO:
2155                                         write_nic_dword(dev, AC_VO_PARAM, u4bAcParam);
2156                                         break;
2157                                 default:
2158                                         pr_warn("SetHwReg8185():invalid ACI: %d!\n",
2159                                                 eACI);
2160                                         break;
2161                                 }
2162                         }
2163                 }
2164                 return;
2165         }
2166
2167         for (i = 0; i < AC_MAX; i++) {
2168                 /* AcParam.longData = 0; */
2169                 pAcParam = (AC_PARAM *)ac_param;
2170                 {
2171                         AC_CODING       eACI;
2172                         u8              u1bAIFS;
2173                         u32             u4bAcParam;
2174
2175                         /* Retrieve parameters to update. */
2176                         eACI = pAcParam->f.AciAifsn.f.ACI;
2177                         /* Mode G/A: slotTimeTimer = 9; Mode B: 20 */
2178                         u1bAIFS = pAcParam->f.AciAifsn.f.AIFSN * (((mode&IEEE_G) == IEEE_G) ? 9 : 20) + aSifsTime;
2179                         u4bAcParam = ((((u32)(pAcParam->f.TXOPLimit)) << AC_PARAM_TXOP_LIMIT_OFFSET)    |
2180                                         (((u32)(pAcParam->f.Ecw.f.ECWmax)) << AC_PARAM_ECW_MAX_OFFSET)  |
2181                                         (((u32)(pAcParam->f.Ecw.f.ECWmin)) << AC_PARAM_ECW_MIN_OFFSET)  |
2182                                         (((u32)u1bAIFS) << AC_PARAM_AIFS_OFFSET));
2183
2184                         switch (eACI) {
2185                         case AC1_BK:
2186                                 write_nic_dword(dev, AC_BK_PARAM, u4bAcParam);
2187                                 break;
2188                         case AC0_BE:
2189                                 write_nic_dword(dev, AC_BE_PARAM, u4bAcParam);
2190                                 break;
2191                         case AC2_VI:
2192                                 write_nic_dword(dev, AC_VI_PARAM, u4bAcParam);
2193                                 break;
2194                         case AC3_VO:
2195                                 write_nic_dword(dev, AC_VO_PARAM, u4bAcParam);
2196                                 break;
2197                         default:
2198                                 pr_warn("SetHwReg8185(): invalid ACI: %d !\n",
2199                                         eACI);
2200                                 break;
2201                         }
2202                 }
2203                 ac_param += (sizeof(AC_PARAM));
2204         }
2205 }
2206
2207 void rtl8180_restart_wq(struct work_struct *work);
2208 /* void rtl8180_rq_tx_ack(struct work_struct *work); */
2209 void rtl8180_watch_dog_wq(struct work_struct *work);
2210 void rtl8180_hw_wakeup_wq(struct work_struct *work);
2211 void rtl8180_hw_sleep_wq(struct work_struct *work);
2212 void rtl8180_sw_antenna_wq(struct work_struct *work);
2213 void rtl8180_watch_dog(struct net_device *dev);
2214
2215 void watch_dog_adaptive(unsigned long data)
2216 {
2217         struct r8180_priv *priv = ieee80211_priv((struct net_device *)data);
2218
2219         if (!priv->up) {
2220                 DMESG("<----watch_dog_adaptive():driver is not up!\n");
2221                 return;
2222         }
2223
2224         /* Tx High Power Mechanism. */
2225         if (CheckHighPower((struct net_device *)data))
2226                 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->tx_pw_wq);
2227
2228         /* Tx Power Tracking on 87SE. */
2229         if (CheckTxPwrTracking((struct net_device *)data))
2230                 TxPwrTracking87SE((struct net_device *)data);
2231
2232         /* Perform DIG immediately. */
2233         if (CheckDig((struct net_device *)data) == true)
2234                 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_dig_wq);
2235         rtl8180_watch_dog((struct net_device *)data);
2236
2237         queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->GPIOChangeRFWorkItem);
2238
2239         priv->watch_dog_timer.expires = jiffies + MSECS(IEEE80211_WATCH_DOG_TIME);
2240         add_timer(&priv->watch_dog_timer);
2241 }
2242
2243 static CHANNEL_LIST ChannelPlan[] = {
2244         {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64},19},         /* FCC */
2245         {{1,2,3,4,5,6,7,8,9,10,11},11},                                 /* IC */
2246         {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},   /* ETSI */
2247         {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},   /* Spain. Change to ETSI. */
2248         {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},   /* France. Change to ETSI. */
2249         {{14,36,40,44,48,52,56,60,64},9},                               /* MKK */
2250         {{1,2,3,4,5,6,7,8,9,10,11,12,13,14, 36,40,44,48,52,56,60,64},22},/* MKK1 */
2251         {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},   /* Israel. */
2252         {{1,2,3,4,5,6,7,8,9,10,11,12,13,34,38,42,46},17},               /* For 11a , TELEC */
2253         {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14},  /* For Global Domain. 1-11:active scan, 12-14 passive scan. //+YJ, 080626 */
2254         {{1,2,3,4,5,6,7,8,9,10,11,12,13},13} /* world wide 13: ch1~ch11 active scan, ch12~13 passive //lzm add 080826 */
2255 };
2256
2257 static void rtl8180_set_channel_map(u8 channel_plan, struct ieee80211_device *ieee)
2258 {
2259         int i;
2260
2261         /* lzm add 080826 */
2262         ieee->MinPassiveChnlNum = MAX_CHANNEL_NUMBER+1;
2263         ieee->IbssStartChnl = 0;
2264
2265         switch (channel_plan) {
2266         case COUNTRY_CODE_FCC:
2267         case COUNTRY_CODE_IC:
2268         case COUNTRY_CODE_ETSI:
2269         case COUNTRY_CODE_SPAIN:
2270         case COUNTRY_CODE_FRANCE:
2271         case COUNTRY_CODE_MKK:
2272         case COUNTRY_CODE_MKK1:
2273         case COUNTRY_CODE_ISRAEL:
2274         case COUNTRY_CODE_TELEC:
2275                 {
2276                         Dot11d_Init(ieee);
2277                         ieee->bGlobalDomain = false;
2278                         if (ChannelPlan[channel_plan].Len != 0) {
2279                                 /* Clear old channel map */
2280                                 memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
2281                                 /* Set new channel map */
2282                                 for (i = 0; i < ChannelPlan[channel_plan].Len; i++) {
2283                                         if (ChannelPlan[channel_plan].Channel[i] <= 14)
2284                                                 GET_DOT11D_INFO(ieee)->channel_map[ChannelPlan[channel_plan].Channel[i]] = 1;
2285                                 }
2286                         }
2287                         break;
2288                 }
2289         case COUNTRY_CODE_GLOBAL_DOMAIN:
2290                 {
2291                         GET_DOT11D_INFO(ieee)->bEnabled = 0;
2292                         Dot11d_Reset(ieee);
2293                         ieee->bGlobalDomain = true;
2294                         break;
2295                 }
2296         case COUNTRY_CODE_WORLD_WIDE_13_INDEX:/* lzm add 080826 */
2297                 {
2298                         ieee->MinPassiveChnlNum = 12;
2299                         ieee->IbssStartChnl = 10;
2300                         break;
2301                 }
2302         default:
2303                 {
2304                         Dot11d_Init(ieee);
2305                         ieee->bGlobalDomain = false;
2306                         memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
2307                         for (i = 1; i <= 14; i++)
2308                                 GET_DOT11D_INFO(ieee)->channel_map[i] = 1;
2309                         break;
2310                 }
2311         }
2312 }
2313
2314 void GPIOChangeRFWorkItemCallBack(struct work_struct *work);
2315
2316 /* YJ,add,080828 */
2317 static void rtl8180_statistics_init(struct Stats *pstats)
2318 {
2319         memset(pstats, 0, sizeof(struct Stats));
2320 }
2321
2322 static void rtl8180_link_detect_init(plink_detect_t plink_detect)
2323 {
2324         memset(plink_detect, 0, sizeof(link_detect_t));
2325         plink_detect->SlotNum = DEFAULT_SLOT_NUM;
2326 }
2327
2328 /* YJ,add,080828,end */
2329 static void rtl8187se_eeprom_register_read(struct eeprom_93cx6 *eeprom)
2330 {
2331         struct net_device *dev = eeprom->data;
2332         u8 reg = read_nic_byte(dev, EPROM_CMD);
2333
2334         eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
2335         eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
2336         eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
2337         eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
2338 }
2339
2340 static void rtl8187se_eeprom_register_write(struct eeprom_93cx6 *eeprom)
2341 {
2342         struct net_device *dev = eeprom->data;
2343         u8 reg = 2 << 6;
2344
2345         if (eeprom->reg_data_in)
2346                 reg |= RTL818X_EEPROM_CMD_WRITE;
2347         if (eeprom->reg_data_out)
2348                 reg |= RTL818X_EEPROM_CMD_READ;
2349         if (eeprom->reg_data_clock)
2350                 reg |= RTL818X_EEPROM_CMD_CK;
2351         if (eeprom->reg_chip_select)
2352                 reg |= RTL818X_EEPROM_CMD_CS;
2353
2354         write_nic_byte(dev, EPROM_CMD, reg);
2355         read_nic_byte(dev, EPROM_CMD);
2356         udelay(10);
2357 }
2358
2359 short rtl8180_init(struct net_device *dev)
2360 {
2361         struct r8180_priv *priv = ieee80211_priv(dev);
2362         u16 word;
2363         u16 usValue;
2364         u16 tmpu16;
2365         int i, j;
2366         struct eeprom_93cx6 eeprom;
2367         u16 eeprom_val;
2368
2369         eeprom.data = dev;
2370         eeprom.register_read = rtl8187se_eeprom_register_read;
2371         eeprom.register_write = rtl8187se_eeprom_register_write;
2372         eeprom.width = PCI_EEPROM_WIDTH_93C46;
2373
2374         eeprom_93cx6_read(&eeprom, EEPROM_COUNTRY_CODE>>1, &eeprom_val);
2375         priv->channel_plan = eeprom_val & 0xFF;
2376         if (priv->channel_plan > COUNTRY_CODE_GLOBAL_DOMAIN) {
2377                 printk("rtl8180_init:Error channel plan! Set to default.\n");
2378                 priv->channel_plan = 0;
2379         }
2380
2381         DMESG("Channel plan is %d\n", priv->channel_plan);
2382         rtl8180_set_channel_map(priv->channel_plan, priv->ieee80211);
2383
2384         /* FIXME: these constants are placed in a bad pleace. */
2385         priv->txbuffsize = 2048;        /* 1024; */
2386         priv->txringcount = 32;         /* 32; */
2387         priv->rxbuffersize = 2048;      /* 1024; */
2388         priv->rxringcount = 64;         /* 32; */
2389         priv->txbeaconcount = 2;
2390         priv->rx_skb_complete = 1;
2391
2392         priv->RFChangeInProgress = false;
2393         priv->SetRFPowerStateInProgress = false;
2394         priv->RFProgType = 0;
2395
2396         priv->irq_enabled = 0;
2397
2398         rtl8180_statistics_init(&priv->stats);
2399         rtl8180_link_detect_init(&priv->link_detect);
2400
2401         priv->ack_tx_to_ieee = 0;
2402         priv->ieee80211->current_network.beacon_interval = DEFAULT_BEACONINTERVAL;
2403         priv->ieee80211->iw_mode = IW_MODE_INFRA;
2404         priv->ieee80211->softmac_features  = IEEE_SOFTMAC_SCAN |
2405                 IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ |
2406                 IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE;
2407         priv->ieee80211->active_scan = 1;
2408         priv->ieee80211->rate = 110; /* 11 mbps */
2409         priv->ieee80211->modulation = IEEE80211_CCK_MODULATION;
2410         priv->ieee80211->host_encrypt = 1;
2411         priv->ieee80211->host_decrypt = 1;
2412         priv->ieee80211->sta_wake_up = rtl8180_hw_wakeup;
2413         priv->ieee80211->ps_request_tx_ack = rtl8180_rq_tx_ack;
2414         priv->ieee80211->enter_sleep_state = rtl8180_hw_sleep;
2415         priv->ieee80211->ps_is_queue_empty = rtl8180_is_tx_queue_empty;
2416
2417         priv->hw_wep = hwwep;
2418         priv->dev = dev;
2419         priv->retry_rts = DEFAULT_RETRY_RTS;
2420         priv->retry_data = DEFAULT_RETRY_DATA;
2421         priv->RFChangeInProgress = false;
2422         priv->SetRFPowerStateInProgress = false;
2423         priv->RFProgType = 0;
2424         priv->bInactivePs = true; /* false; */
2425         priv->ieee80211->bInactivePs = priv->bInactivePs;
2426         priv->bSwRfProcessing = false;
2427         priv->eRFPowerState = eRfOff;
2428         priv->RfOffReason = 0;
2429         priv->LedStrategy = SW_LED_MODE0;
2430         priv->TxPollingTimes = 0; /* lzm add 080826 */
2431         priv->bLeisurePs = true;
2432         priv->dot11PowerSaveMode = eActive;
2433         priv->AdMinCheckPeriod = 5;
2434         priv->AdMaxCheckPeriod = 10;
2435         priv->AdMaxRxSsThreshold = 30;  /* 60->30 */
2436         priv->AdRxSsThreshold = 20;     /* 50->20 */
2437         priv->AdCheckPeriod = priv->AdMinCheckPeriod;
2438         priv->AdTickCount = 0;
2439         priv->AdRxSignalStrength = -1;
2440         priv->RegSwAntennaDiversityMechanism = 0;
2441         priv->RegDefaultAntenna = 0;
2442         priv->SignalStrength = 0;
2443         priv->AdRxOkCnt = 0;
2444         priv->CurrAntennaIndex = 0;
2445         priv->AdRxSsBeforeSwitched = 0;
2446         init_timer(&priv->SwAntennaDiversityTimer);
2447         priv->SwAntennaDiversityTimer.data = (unsigned long)dev;
2448         priv->SwAntennaDiversityTimer.function = (void *)SwAntennaDiversityTimerCallback;
2449         priv->bDigMechanism = 1;
2450         priv->InitialGain = 6;
2451         priv->bXtalCalibration = false;
2452         priv->XtalCal_Xin = 0;
2453         priv->XtalCal_Xout = 0;
2454         priv->bTxPowerTrack = false;
2455         priv->ThermalMeter = 0;
2456         priv->FalseAlarmRegValue = 0;
2457         priv->RegDigOfdmFaUpTh = 0xc; /* Upper threshold of OFDM false alarm, which is used in DIG. */
2458         priv->DIG_NumberFallbackVote = 0;
2459         priv->DIG_NumberUpgradeVote = 0;
2460         priv->LastSignalStrengthInPercent = 0;
2461         priv->Stats_SignalStrength = 0;
2462         priv->LastRxPktAntenna = 0;
2463         priv->SignalQuality = 0; /* in 0-100 index. */
2464         priv->Stats_SignalQuality = 0;
2465         priv->RecvSignalPower = 0; /* in dBm. */
2466         priv->Stats_RecvSignalPower = 0;
2467         priv->AdMainAntennaRxOkCnt = 0;
2468         priv->AdAuxAntennaRxOkCnt = 0;
2469         priv->bHWAdSwitched = false;
2470         priv->bRegHighPowerMechanism = true;
2471         priv->RegHiPwrUpperTh = 77;
2472         priv->RegHiPwrLowerTh = 75;
2473         priv->RegRSSIHiPwrUpperTh = 70;
2474         priv->RegRSSIHiPwrLowerTh = 20;
2475         priv->bCurCCKPkt = false;
2476         priv->UndecoratedSmoothedSS = -1;
2477         priv->bToUpdateTxPwr = false;
2478         priv->CurCCKRSSI = 0;
2479         priv->RxPower = 0;
2480         priv->RSSI = 0;
2481         priv->NumTxOkTotal = 0;
2482         priv->NumTxUnicast = 0;
2483         priv->keepAliveLevel = DEFAULT_KEEP_ALIVE_LEVEL;
2484         priv->CurrRetryCnt = 0;
2485         priv->LastRetryCnt = 0;
2486         priv->LastTxokCnt = 0;
2487         priv->LastRxokCnt = 0;
2488         priv->LastRetryRate = 0;
2489         priv->bTryuping = 0;
2490         priv->CurrTxRate = 0;
2491         priv->CurrRetryRate = 0;
2492         priv->TryupingCount = 0;
2493         priv->TryupingCountNoData = 0;
2494         priv->TryDownCountLowData = 0;
2495         priv->LastTxOKBytes = 0;
2496         priv->LastFailTxRate = 0;
2497         priv->LastFailTxRateSS = 0;
2498         priv->FailTxRateCount = 0;
2499         priv->LastTxThroughput = 0;
2500         priv->NumTxOkBytesTotal = 0;
2501         priv->ForcedDataRate = 0;
2502         priv->RegBModeGainStage = 1;
2503
2504         priv->promisc = (dev->flags & IFF_PROMISC) ? 1 : 0;
2505         spin_lock_init(&priv->irq_th_lock);
2506         spin_lock_init(&priv->tx_lock);
2507         spin_lock_init(&priv->ps_lock);
2508         spin_lock_init(&priv->rf_ps_lock);
2509         sema_init(&priv->wx_sem, 1);
2510         INIT_WORK(&priv->reset_wq, (void *)rtl8180_restart_wq);
2511         INIT_DELAYED_WORK(&priv->ieee80211->hw_wakeup_wq,
2512                           (void *)rtl8180_hw_wakeup_wq);
2513         INIT_DELAYED_WORK(&priv->ieee80211->hw_sleep_wq,
2514                           (void *)rtl8180_hw_sleep_wq);
2515         INIT_WORK(&priv->ieee80211->wmm_param_update_wq,
2516                   (void *)rtl8180_wmm_param_update);
2517         INIT_DELAYED_WORK(&priv->ieee80211->rate_adapter_wq,
2518                           (void *)rtl8180_rate_adapter);
2519         INIT_DELAYED_WORK(&priv->ieee80211->hw_dig_wq,
2520                          (void *)rtl8180_hw_dig_wq);
2521         INIT_DELAYED_WORK(&priv->ieee80211->tx_pw_wq,
2522                          (void *)rtl8180_tx_pw_wq);
2523         INIT_DELAYED_WORK(&priv->ieee80211->GPIOChangeRFWorkItem,
2524                          (void *) GPIOChangeRFWorkItemCallBack);
2525         tasklet_init(&priv->irq_rx_tasklet,
2526                      (void(*)(unsigned long)) rtl8180_irq_rx_tasklet,
2527                      (unsigned long)priv);
2528
2529         init_timer(&priv->watch_dog_timer);
2530         priv->watch_dog_timer.data = (unsigned long)dev;
2531         priv->watch_dog_timer.function = watch_dog_adaptive;
2532
2533         init_timer(&priv->rateadapter_timer);
2534         priv->rateadapter_timer.data = (unsigned long)dev;
2535         priv->rateadapter_timer.function = timer_rate_adaptive;
2536         priv->RateAdaptivePeriod = RATE_ADAPTIVE_TIMER_PERIOD;
2537         priv->bEnhanceTxPwr = false;
2538
2539         priv->ieee80211->softmac_hard_start_xmit = rtl8180_hard_start_xmit;
2540         priv->ieee80211->set_chan = rtl8180_set_chan;
2541         priv->ieee80211->link_change = rtl8180_link_change;
2542         priv->ieee80211->softmac_data_hard_start_xmit = rtl8180_hard_data_xmit;
2543         priv->ieee80211->data_hard_stop = rtl8180_data_hard_stop;
2544         priv->ieee80211->data_hard_resume = rtl8180_data_hard_resume;
2545
2546         priv->ieee80211->init_wmmparam_flag = 0;
2547
2548         priv->ieee80211->start_send_beacons = rtl8180_start_tx_beacon;
2549         priv->ieee80211->stop_send_beacons = rtl8180_beacon_tx_disable;
2550         priv->ieee80211->fts = DEFAULT_FRAG_THRESHOLD;
2551
2552         priv->ShortRetryLimit = 7;
2553         priv->LongRetryLimit = 7;
2554         priv->EarlyRxThreshold = 7;
2555
2556         priv->TransmitConfig =  (1<<TCR_DurProcMode_OFFSET) |
2557                                 (7<<TCR_MXDMA_OFFSET) |
2558                                 (priv->ShortRetryLimit<<TCR_SRL_OFFSET) |
2559                                 (priv->LongRetryLimit<<TCR_LRL_OFFSET);
2560
2561         priv->ReceiveConfig =   RCR_AMF | RCR_ADF | RCR_ACF |
2562                                 RCR_AB | RCR_AM | RCR_APM |
2563                                 (7<<RCR_MXDMA_OFFSET) |
2564                                 (priv->EarlyRxThreshold<<RCR_FIFO_OFFSET) |
2565                                 (priv->EarlyRxThreshold == 7 ?
2566                                          RCR_ONLYERLPKT : 0);
2567
2568         priv->IntrMask          = IMR_TMGDOK | IMR_TBDER | IMR_THPDER |
2569                                   IMR_THPDER | IMR_THPDOK |
2570                                   IMR_TVODER | IMR_TVODOK |
2571                                   IMR_TVIDER | IMR_TVIDOK |
2572                                   IMR_TBEDER | IMR_TBEDOK |
2573                                   IMR_TBKDER | IMR_TBKDOK |
2574                                   IMR_RDU |
2575                                   IMR_RER | IMR_ROK |
2576                                   IMR_RQoSOK;
2577
2578         priv->InitialGain = 6;
2579
2580         DMESG("MAC controller is a RTL8187SE b/g");
2581
2582         priv->ieee80211->modulation |= IEEE80211_OFDM_MODULATION;
2583         priv->ieee80211->short_slot = 1;
2584
2585         eeprom_93cx6_read(&eeprom, EEPROM_SW_REVD_OFFSET, &usValue);
2586         DMESG("usValue is %#hx\n", usValue);
2587         /* 3Read AntennaDiversity */
2588
2589         /* SW Antenna Diversity. */
2590         priv->EEPROMSwAntennaDiversity = (usValue & EEPROM_SW_AD_MASK) ==
2591                 EEPROM_SW_AD_ENABLE;
2592
2593         /* Default Antenna to use. */
2594         priv->EEPROMDefaultAntenna1 = (usValue & EEPROM_DEF_ANT_MASK) ==
2595                 EEPROM_DEF_ANT_1;
2596
2597         if (priv->RegSwAntennaDiversityMechanism == 0) /* Auto */
2598                 /* 0: default from EEPROM. */
2599                 priv->bSwAntennaDiverity = priv->EEPROMSwAntennaDiversity;
2600         else
2601                 /* 1:disable antenna diversity, 2: enable antenna diversity. */
2602                 priv->bSwAntennaDiverity = priv->RegSwAntennaDiversityMechanism == 2;
2603
2604         if (priv->RegDefaultAntenna == 0)
2605                 /* 0: default from EEPROM. */
2606                 priv->bDefaultAntenna1 = priv->EEPROMDefaultAntenna1;
2607         else
2608                 /* 1: main, 2: aux. */
2609                 priv->bDefaultAntenna1 = priv->RegDefaultAntenna == 2;
2610
2611         priv->plcp_preamble_mode = 2;
2612         /* the eeprom type is stored in RCR register bit #6 */
2613         if (RCR_9356SEL & read_nic_dword(dev, RCR))
2614                 priv->epromtype = EPROM_93c56;
2615         else
2616                 priv->epromtype = EPROM_93c46;
2617
2618         eeprom_93cx6_multiread(&eeprom, 0x7, (__le16 *)
2619                                dev->dev_addr, 3);
2620
2621         for (i = 1, j = 0; i < 14; i += 2, j++) {
2622                 eeprom_93cx6_read(&eeprom, EPROM_TXPW_CH1_2 + j, &word);
2623                 priv->chtxpwr[i] = word & 0xff;
2624                 priv->chtxpwr[i+1] = (word & 0xff00)>>8;
2625         }
2626         for (i = 1, j = 0; i < 14; i += 2, j++) {
2627                 eeprom_93cx6_read(&eeprom, EPROM_TXPW_OFDM_CH1_2 + j, &word);
2628                 priv->chtxpwr_ofdm[i] = word & 0xff;
2629                 priv->chtxpwr_ofdm[i+1] = (word & 0xff00) >> 8;
2630         }
2631
2632         /* 3Read crystal calibration and thermal meter indication on 87SE. */
2633         eeprom_93cx6_read(&eeprom, EEPROM_RSV>>1, &tmpu16);
2634
2635         /* Crystal calibration for Xin and Xout resp. */
2636         priv->XtalCal_Xout = tmpu16 & EEPROM_XTAL_CAL_XOUT_MASK;
2637         priv->XtalCal_Xin = (tmpu16 & EEPROM_XTAL_CAL_XIN_MASK) >> 4;
2638         if ((tmpu16 & EEPROM_XTAL_CAL_ENABLE) >> 12)
2639                 priv->bXtalCalibration = true;
2640
2641         /* Thermal meter reference indication. */
2642         priv->ThermalMeter =  (u8)((tmpu16 & EEPROM_THERMAL_METER_MASK) >> 8);
2643         if ((tmpu16 & EEPROM_THERMAL_METER_ENABLE) >> 13)
2644                 priv->bTxPowerTrack = true;
2645
2646         priv->rf_sleep = rtl8225z4_rf_sleep;
2647         priv->rf_wakeup = rtl8225z4_rf_wakeup;
2648         DMESGW("**PLEASE** REPORT SUCCESSFUL/UNSUCCESSFUL TO Realtek!");
2649
2650         priv->rf_close = rtl8225z2_rf_close;
2651         priv->rf_init = rtl8225z2_rf_init;
2652         priv->rf_set_chan = rtl8225z2_rf_set_chan;
2653         priv->rf_set_sens = NULL;
2654
2655         if (0 != alloc_rx_desc_ring(dev, priv->rxbuffersize, priv->rxringcount))
2656                 return -ENOMEM;
2657
2658         if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2659                                   TX_MANAGEPRIORITY_RING_ADDR))
2660                 return -ENOMEM;
2661
2662         if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2663                                  TX_BKPRIORITY_RING_ADDR))
2664                 return -ENOMEM;
2665
2666         if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2667                                  TX_BEPRIORITY_RING_ADDR))
2668                 return -ENOMEM;
2669
2670         if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2671                                   TX_VIPRIORITY_RING_ADDR))
2672                 return -ENOMEM;
2673
2674         if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2675                                   TX_VOPRIORITY_RING_ADDR))
2676                 return -ENOMEM;
2677
2678         if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2679                                   TX_HIGHPRIORITY_RING_ADDR))
2680                 return -ENOMEM;
2681
2682         if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txbeaconcount,
2683                                   TX_BEACON_RING_ADDR))
2684                 return -ENOMEM;
2685
2686         if (request_irq(dev->irq, (void *)rtl8180_interrupt, IRQF_SHARED, dev->name, dev)) {
2687                 DMESGE("Error allocating IRQ %d", dev->irq);
2688                 return -1;
2689         } else {
2690                 priv->irq = dev->irq;
2691                 DMESG("IRQ %d", dev->irq);
2692         }
2693
2694         return 0;
2695 }
2696
2697 void rtl8180_no_hw_wep(struct net_device *dev)
2698 {
2699 }
2700
2701 void rtl8180_set_hw_wep(struct net_device *dev)
2702 {
2703         struct r8180_priv *priv = ieee80211_priv(dev);
2704         u8 pgreg;
2705         u8 security;
2706         u32 key0_word4;
2707
2708         pgreg = read_nic_byte(dev, PGSELECT);
2709         write_nic_byte(dev, PGSELECT, pgreg & ~(1<<PGSELECT_PG_SHIFT));
2710
2711         key0_word4 = read_nic_dword(dev, KEY0+4+4+4);
2712         key0_word4 &= ~0xff;
2713         key0_word4 |= priv->key0[3] & 0xff;
2714         write_nic_dword(dev, KEY0, (priv->key0[0]));
2715         write_nic_dword(dev, KEY0+4, (priv->key0[1]));
2716         write_nic_dword(dev, KEY0+4+4, (priv->key0[2]));
2717         write_nic_dword(dev, KEY0+4+4+4, (key0_word4));
2718
2719         security  = read_nic_byte(dev, SECURITY);
2720         security |= (1<<SECURITY_WEP_TX_ENABLE_SHIFT);
2721         security |= (1<<SECURITY_WEP_RX_ENABLE_SHIFT);
2722         security &= ~SECURITY_ENCRYP_MASK;
2723         security |= (SECURITY_ENCRYP_104<<SECURITY_ENCRYP_SHIFT);
2724
2725         write_nic_byte(dev, SECURITY, security);
2726
2727         DMESG("key %x %x %x %x", read_nic_dword(dev, KEY0+4+4+4),
2728               read_nic_dword(dev, KEY0+4+4), read_nic_dword(dev, KEY0+4),
2729               read_nic_dword(dev, KEY0));
2730 }
2731
2732
2733 void rtl8185_rf_pins_enable(struct net_device *dev)
2734 {
2735         /* u16 tmp; */
2736         /* tmp = read_nic_word(dev, RFPinsEnable); */
2737         write_nic_word(dev, RFPinsEnable, 0x1fff); /* | tmp); */
2738 }
2739
2740 void rtl8185_set_anaparam2(struct net_device *dev, u32 a)
2741 {
2742         u8 conf3;
2743
2744         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
2745
2746         conf3 = read_nic_byte(dev, CONFIG3);
2747         write_nic_byte(dev, CONFIG3, conf3 | (1<<CONFIG3_ANAPARAM_W_SHIFT));
2748         write_nic_dword(dev, ANAPARAM2, a);
2749
2750         conf3 = read_nic_byte(dev, CONFIG3);
2751         write_nic_byte(dev, CONFIG3, conf3 & ~(1<<CONFIG3_ANAPARAM_W_SHIFT));
2752         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
2753 }
2754
2755 void rtl8180_set_anaparam(struct net_device *dev, u32 a)
2756 {
2757         u8 conf3;
2758
2759         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
2760
2761         conf3 = read_nic_byte(dev, CONFIG3);
2762         write_nic_byte(dev, CONFIG3, conf3 | (1<<CONFIG3_ANAPARAM_W_SHIFT));
2763         write_nic_dword(dev, ANAPARAM, a);
2764
2765         conf3 = read_nic_byte(dev, CONFIG3);
2766         write_nic_byte(dev, CONFIG3, conf3 & ~(1<<CONFIG3_ANAPARAM_W_SHIFT));
2767         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
2768 }
2769
2770 void rtl8185_tx_antenna(struct net_device *dev, u8 ant)
2771 {
2772         write_nic_byte(dev, TX_ANTENNA, ant);
2773         force_pci_posting(dev);
2774         mdelay(1);
2775 }
2776
2777 void rtl8185_write_phy(struct net_device *dev, u8 adr, u32 data)
2778 {
2779         u32 phyw;
2780
2781         adr |= 0x80;
2782
2783         phyw = ((data<<8) | adr);
2784
2785         /* Note that, we must write 0xff7c after 0x7d-0x7f to write BB register. */
2786         write_nic_byte(dev, 0x7f, ((phyw & 0xff000000) >> 24));
2787         write_nic_byte(dev, 0x7e, ((phyw & 0x00ff0000) >> 16));
2788         write_nic_byte(dev, 0x7d, ((phyw & 0x0000ff00) >> 8));
2789         write_nic_byte(dev, 0x7c, ((phyw & 0x000000ff)));
2790
2791         /* this is ok to fail when we write AGC table. check for AGC table might be
2792          * done by masking with 0x7f instead of 0xff
2793          */
2794         /* if (phyr != (data&0xff)) DMESGW("Phy write timeout %x %x %x", phyr, data, adr); */
2795 }
2796
2797 inline void write_phy_ofdm(struct net_device *dev, u8 adr, u32 data)
2798 {
2799         data = data & 0xff;
2800         rtl8185_write_phy(dev, adr, data);
2801 }
2802
2803 void write_phy_cck(struct net_device *dev, u8 adr, u32 data)
2804 {
2805         data = data & 0xff;
2806         rtl8185_write_phy(dev, adr, data | 0x10000);
2807 }
2808
2809 /*
2810  * This configures registers for beacon tx and enables it via
2811  * rtl8180_beacon_tx_enable(). rtl8180_beacon_tx_disable() might
2812  * be used to stop beacon transmission
2813  */
2814 void rtl8180_start_tx_beacon(struct net_device *dev)
2815 {
2816         u16 word;
2817
2818         DMESG("Enabling beacon TX");
2819         rtl8180_prepare_beacon(dev);
2820         rtl8180_irq_disable(dev);
2821         rtl8180_beacon_tx_enable(dev);
2822
2823         word = read_nic_word(dev, AtimWnd) & ~AtimWnd_AtimWnd;
2824         write_nic_word(dev, AtimWnd, word); /* word |= */
2825
2826         word  = read_nic_word(dev, BintrItv);
2827         word &= ~BintrItv_BintrItv;
2828         word |= 1000; /* priv->ieee80211->current_network.beacon_interval *
2829                 ((priv->txbeaconcount > 1)?(priv->txbeaconcount-1):1);
2830         // FIXME: check if correct ^^ worked with 0x3e8;
2831         */
2832         write_nic_word(dev, BintrItv, word);
2833
2834         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
2835
2836         rtl8185b_irq_enable(dev);
2837 }
2838
2839 static struct net_device_stats *rtl8180_stats(struct net_device *dev)
2840 {
2841         struct r8180_priv *priv = ieee80211_priv(dev);
2842
2843         return &priv->ieee80211->stats;
2844 }
2845
2846 /*
2847  * Change current and default preamble mode.
2848  */
2849 bool
2850 MgntActSet_802_11_PowerSaveMode(
2851         struct r8180_priv *priv,
2852         RT_PS_MODE              rtPsMode
2853 )
2854 {
2855         /* Currently, we do not change power save mode on IBSS mode. */
2856         if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
2857                 return false;
2858
2859         priv->ieee80211->ps = rtPsMode;
2860
2861         return true;
2862 }
2863
2864 void LeisurePSEnter(struct r8180_priv *priv)
2865 {
2866         if (priv->bLeisurePs) {
2867                 if (priv->ieee80211->ps == IEEE80211_PS_DISABLED)
2868                         /* IEEE80211_PS_ENABLE */
2869                         MgntActSet_802_11_PowerSaveMode(priv, IEEE80211_PS_MBCAST|IEEE80211_PS_UNICAST);
2870         }
2871 }
2872
2873 void LeisurePSLeave(struct r8180_priv *priv)
2874 {
2875         if (priv->bLeisurePs) {
2876                 if (priv->ieee80211->ps != IEEE80211_PS_DISABLED)
2877                         MgntActSet_802_11_PowerSaveMode(priv, IEEE80211_PS_DISABLED);
2878         }
2879 }
2880
2881 void rtl8180_hw_wakeup_wq(struct work_struct *work)
2882 {
2883         struct delayed_work *dwork = to_delayed_work(work);
2884         struct ieee80211_device *ieee = container_of(dwork, struct ieee80211_device, hw_wakeup_wq);
2885         struct net_device *dev = ieee->dev;
2886
2887         rtl8180_hw_wakeup(dev);
2888 }
2889
2890 void rtl8180_hw_sleep_wq(struct work_struct *work)
2891 {
2892         struct delayed_work *dwork = to_delayed_work(work);
2893         struct ieee80211_device *ieee = container_of(dwork, struct ieee80211_device, hw_sleep_wq);
2894         struct net_device *dev = ieee->dev;
2895
2896         rtl8180_hw_sleep_down(dev);
2897 }
2898
2899 static void MgntLinkKeepAlive(struct r8180_priv *priv)
2900 {
2901         if (priv->keepAliveLevel == 0)
2902                 return;
2903
2904         if (priv->ieee80211->state == IEEE80211_LINKED) {
2905                 /*
2906                  * Keep-Alive.
2907                  */
2908
2909                 if ((priv->keepAliveLevel == 2) ||
2910                         (priv->link_detect.LastNumTxUnicast == priv->NumTxUnicast &&
2911                         priv->link_detect.LastNumRxUnicast == priv->ieee80211->NumRxUnicast)
2912                         ) {
2913                         priv->link_detect.IdleCount++;
2914
2915                         /*
2916                          * Send a Keep-Alive packet packet to AP if we had been idle for a while.
2917                          */
2918                         if (priv->link_detect.IdleCount >= ((KEEP_ALIVE_INTERVAL / CHECK_FOR_HANG_PERIOD)-1)) {
2919                                 priv->link_detect.IdleCount = 0;
2920                                 ieee80211_sta_ps_send_null_frame(priv->ieee80211, false);
2921                         }
2922                 } else {
2923                         priv->link_detect.IdleCount = 0;
2924                 }
2925                 priv->link_detect.LastNumTxUnicast = priv->NumTxUnicast;
2926                 priv->link_detect.LastNumRxUnicast = priv->ieee80211->NumRxUnicast;
2927         }
2928 }
2929
2930 void rtl8180_watch_dog(struct net_device *dev)
2931 {
2932         struct r8180_priv *priv = ieee80211_priv(dev);
2933         bool bEnterPS = false;
2934         bool bBusyTraffic = false;
2935         u32 TotalRxNum = 0;
2936         u16 SlotIndex = 0;
2937         u16 i = 0;
2938         if (priv->ieee80211->actscanning == false) {
2939                 if ((priv->ieee80211->iw_mode != IW_MODE_ADHOC) &&
2940                     (priv->ieee80211->state == IEEE80211_NOLINK) &&
2941                     (priv->ieee80211->beinretry == false) &&
2942                     (priv->eRFPowerState == eRfOn))
2943                         IPSEnter(dev);
2944         }
2945         /* YJ,add,080828,for link state check */
2946         if ((priv->ieee80211->state == IEEE80211_LINKED) && (priv->ieee80211->iw_mode == IW_MODE_INFRA)) {
2947                 SlotIndex = (priv->link_detect.SlotIndex++) % priv->link_detect.SlotNum;
2948                 priv->link_detect.RxFrameNum[SlotIndex] = priv->ieee80211->NumRxDataInPeriod + priv->ieee80211->NumRxBcnInPeriod;
2949                 for (i = 0; i < priv->link_detect.SlotNum; i++)
2950                         TotalRxNum += priv->link_detect.RxFrameNum[i];
2951
2952                 if (TotalRxNum == 0) {
2953                         priv->ieee80211->state = IEEE80211_ASSOCIATING;
2954                         queue_work(priv->ieee80211->wq, &priv->ieee80211->associate_procedure_wq);
2955                 }
2956         }
2957
2958         /* YJ,add,080828,for KeepAlive */
2959         MgntLinkKeepAlive(priv);
2960
2961         /* YJ,add,080828,for LPS */
2962         LeisurePSLeave(priv);
2963
2964         if (priv->ieee80211->state == IEEE80211_LINKED) {
2965                 priv->link_detect.NumRxOkInPeriod = priv->ieee80211->NumRxDataInPeriod;
2966                 if (priv->link_detect.NumRxOkInPeriod > 666 ||
2967                         priv->link_detect.NumTxOkInPeriod > 666) {
2968                         bBusyTraffic = true;
2969                 }
2970                 if (((priv->link_detect.NumRxOkInPeriod + priv->link_detect.NumTxOkInPeriod) > 8)
2971                         || (priv->link_detect.NumRxOkInPeriod > 2)) {
2972                         bEnterPS = false;
2973                 } else
2974                         bEnterPS = true;
2975
2976                 if (bEnterPS)
2977                         LeisurePSEnter(priv);
2978                 else
2979                         LeisurePSLeave(priv);
2980         } else
2981                 LeisurePSLeave(priv);
2982         priv->link_detect.bBusyTraffic = bBusyTraffic;
2983         priv->link_detect.NumRxOkInPeriod = 0;
2984         priv->link_detect.NumTxOkInPeriod = 0;
2985         priv->ieee80211->NumRxDataInPeriod = 0;
2986         priv->ieee80211->NumRxBcnInPeriod = 0;
2987 }
2988
2989 int _rtl8180_up(struct net_device *dev)
2990 {
2991         struct r8180_priv *priv = ieee80211_priv(dev);
2992
2993         priv->up = 1;
2994
2995         DMESG("Bringing up iface");
2996         rtl8185b_adapter_start(dev);
2997         rtl8185b_rx_enable(dev);
2998         rtl8185b_tx_enable(dev);
2999         if (priv->bInactivePs) {
3000                 if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
3001                         IPSLeave(dev);
3002         }
3003         timer_rate_adaptive((unsigned long)dev);
3004         watch_dog_adaptive((unsigned long)dev);
3005         if (priv->bSwAntennaDiverity)
3006                         SwAntennaDiversityTimerCallback(dev);
3007         ieee80211_softmac_start_protocol(priv->ieee80211);
3008         return 0;
3009 }
3010
3011 int rtl8180_open(struct net_device *dev)
3012 {
3013         struct r8180_priv *priv = ieee80211_priv(dev);
3014         int ret;
3015
3016         down(&priv->wx_sem);
3017         ret = rtl8180_up(dev);
3018         up(&priv->wx_sem);
3019         return ret;
3020 }
3021
3022 int rtl8180_up(struct net_device *dev)
3023 {
3024         struct r8180_priv *priv = ieee80211_priv(dev);
3025
3026         if (priv->up == 1)
3027                 return -1;
3028
3029         return _rtl8180_up(dev);
3030 }
3031
3032 int rtl8180_close(struct net_device *dev)
3033 {
3034         struct r8180_priv *priv = ieee80211_priv(dev);
3035         int ret;
3036
3037         down(&priv->wx_sem);
3038         ret = rtl8180_down(dev);
3039         up(&priv->wx_sem);
3040
3041         return ret;
3042 }
3043
3044 int rtl8180_down(struct net_device *dev)
3045 {
3046         struct r8180_priv *priv = ieee80211_priv(dev);
3047
3048         if (priv->up == 0)
3049                 return -1;
3050
3051         priv->up = 0;
3052
3053         ieee80211_softmac_stop_protocol(priv->ieee80211);
3054         /* FIXME */
3055         if (!netif_queue_stopped(dev))
3056                 netif_stop_queue(dev);
3057         rtl8180_rtx_disable(dev);
3058         rtl8180_irq_disable(dev);
3059         del_timer_sync(&priv->watch_dog_timer);
3060         del_timer_sync(&priv->rateadapter_timer);
3061         cancel_delayed_work(&priv->ieee80211->rate_adapter_wq);
3062         cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
3063         cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
3064         cancel_delayed_work(&priv->ieee80211->hw_dig_wq);
3065         cancel_delayed_work(&priv->ieee80211->tx_pw_wq);
3066         del_timer_sync(&priv->SwAntennaDiversityTimer);
3067         SetZebraRFPowerState8185(dev, eRfOff);
3068         memset(&(priv->ieee80211->current_network), 0, sizeof(struct ieee80211_network));
3069         priv->ieee80211->state = IEEE80211_NOLINK;
3070         return 0;
3071 }
3072
3073 void rtl8180_restart_wq(struct work_struct *work)
3074 {
3075         struct r8180_priv *priv = container_of(work, struct r8180_priv, reset_wq);
3076         struct net_device *dev = priv->dev;
3077
3078         down(&priv->wx_sem);
3079
3080         rtl8180_commit(dev);
3081
3082         up(&priv->wx_sem);
3083 }
3084
3085 void rtl8180_restart(struct net_device *dev)
3086 {
3087         struct r8180_priv *priv = ieee80211_priv(dev);
3088
3089         schedule_work(&priv->reset_wq);
3090 }
3091
3092 void rtl8180_commit(struct net_device *dev)
3093 {
3094         struct r8180_priv *priv = ieee80211_priv(dev);
3095
3096         if (priv->up == 0)
3097                 return ;
3098
3099         del_timer_sync(&priv->watch_dog_timer);
3100         del_timer_sync(&priv->rateadapter_timer);
3101         cancel_delayed_work(&priv->ieee80211->rate_adapter_wq);
3102         cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
3103         cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
3104         cancel_delayed_work(&priv->ieee80211->hw_dig_wq);
3105         cancel_delayed_work(&priv->ieee80211->tx_pw_wq);
3106         del_timer_sync(&priv->SwAntennaDiversityTimer);
3107         ieee80211_softmac_stop_protocol(priv->ieee80211);
3108         rtl8180_irq_disable(dev);
3109         rtl8180_rtx_disable(dev);
3110         _rtl8180_up(dev);
3111 }
3112
3113 static void r8180_set_multicast(struct net_device *dev)
3114 {
3115         struct r8180_priv *priv = ieee80211_priv(dev);
3116         short promisc;
3117
3118         promisc = (dev->flags & IFF_PROMISC) ? 1 : 0;
3119
3120         if (promisc != priv->promisc)
3121                 rtl8180_restart(dev);
3122
3123         priv->promisc = promisc;
3124 }
3125
3126 int r8180_set_mac_adr(struct net_device *dev, void *mac)
3127 {
3128         struct r8180_priv *priv = ieee80211_priv(dev);
3129         struct sockaddr *addr = mac;
3130
3131         down(&priv->wx_sem);
3132
3133         memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
3134
3135         if (priv->ieee80211->iw_mode == IW_MODE_MASTER)
3136                 memcpy(priv->ieee80211->current_network.bssid, dev->dev_addr, ETH_ALEN);
3137
3138         if (priv->up) {
3139                 rtl8180_down(dev);
3140                 rtl8180_up(dev);
3141         }
3142
3143         up(&priv->wx_sem);
3144
3145         return 0;
3146 }
3147
3148 /* based on ipw2200 driver */
3149 int rtl8180_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
3150 {
3151         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3152         struct iwreq *wrq = (struct iwreq *) rq;
3153         int ret = -1;
3154
3155         switch (cmd) {
3156         case RTL_IOCTL_WPA_SUPPLICANT:
3157                 ret = ieee80211_wpa_supplicant_ioctl(priv->ieee80211, &wrq->u.data);
3158                 return ret;
3159         default:
3160                 return -EOPNOTSUPP;
3161         }
3162
3163         return -EOPNOTSUPP;
3164 }
3165
3166 static const struct net_device_ops rtl8180_netdev_ops = {
3167         .ndo_open               = rtl8180_open,
3168         .ndo_stop               = rtl8180_close,
3169         .ndo_get_stats          = rtl8180_stats,
3170         .ndo_tx_timeout         = rtl8180_restart,
3171         .ndo_do_ioctl           = rtl8180_ioctl,
3172         .ndo_set_rx_mode        = r8180_set_multicast,
3173         .ndo_set_mac_address    = r8180_set_mac_adr,
3174         .ndo_validate_addr      = eth_validate_addr,
3175         .ndo_change_mtu         = eth_change_mtu,
3176         .ndo_start_xmit         = ieee80211_rtl_xmit,
3177 };
3178
3179 static int rtl8180_pci_probe(struct pci_dev *pdev,
3180                                        const struct pci_device_id *id)
3181 {
3182         unsigned long ioaddr = 0;
3183         struct net_device *dev = NULL;
3184         struct r8180_priv *priv = NULL;
3185         u8 unit = 0;
3186         int ret = -ENODEV;
3187
3188         unsigned long pmem_start, pmem_len, pmem_flags;
3189
3190         DMESG("Configuring chip resources");
3191
3192         if (pci_enable_device(pdev)) {
3193                 DMESG("Failed to enable PCI device");
3194                 return -EIO;
3195         }
3196
3197         pci_set_master(pdev);
3198         pci_set_dma_mask(pdev, 0xffffff00ULL);
3199         pci_set_consistent_dma_mask(pdev, 0xffffff00ULL);
3200         dev = alloc_ieee80211(sizeof(struct r8180_priv));
3201         if (!dev) {
3202                 ret = -ENOMEM;
3203                 goto fail_free;
3204         }
3205         priv = ieee80211_priv(dev);
3206         priv->ieee80211 = netdev_priv(dev);
3207
3208         pci_set_drvdata(pdev, dev);
3209         SET_NETDEV_DEV(dev, &pdev->dev);
3210
3211         priv = ieee80211_priv(dev);
3212         priv->pdev = pdev;
3213
3214         pmem_start = pci_resource_start(pdev, 1);
3215         pmem_len = pci_resource_len(pdev, 1);
3216         pmem_flags = pci_resource_flags(pdev, 1);
3217
3218         if (!(pmem_flags & IORESOURCE_MEM)) {
3219                 DMESG("region #1 not a MMIO resource, aborting");
3220                 goto fail;
3221         }
3222
3223         if (!request_mem_region(pmem_start, pmem_len, RTL8180_MODULE_NAME)) {
3224                 DMESG("request_mem_region failed!");
3225                 goto fail;
3226         }
3227
3228         ioaddr = (unsigned long)ioremap_nocache(pmem_start, pmem_len);
3229         if (ioaddr == (unsigned long)NULL) {
3230                 DMESG("ioremap failed!");
3231                 goto fail1;
3232         }
3233
3234         dev->mem_start = ioaddr; /* shared mem start */
3235         dev->mem_end = ioaddr + pci_resource_len(pdev, 0); /* shared mem end */
3236
3237         pci_read_config_byte(pdev, 0x05, &unit);
3238         pci_write_config_byte(pdev, 0x05, unit & (~0x04));
3239
3240         dev->irq = pdev->irq;
3241         priv->irq = 0;
3242
3243         dev->netdev_ops = &rtl8180_netdev_ops;
3244         dev->wireless_handlers = &r8180_wx_handlers_def;
3245
3246         dev->type = ARPHRD_ETHER;
3247         dev->watchdog_timeo = HZ*3;
3248
3249         if (dev_alloc_name(dev, ifname) < 0) {
3250                 DMESG("Oops: devname already taken! Trying wlan%%d...\n");
3251                 strcpy(ifname, "wlan%d");
3252                 dev_alloc_name(dev, ifname);
3253         }
3254
3255         if (rtl8180_init(dev) != 0) {
3256                 DMESG("Initialization failed");
3257                 goto fail1;
3258         }
3259
3260         netif_carrier_off(dev);
3261
3262         if (register_netdev(dev))
3263                 goto fail1;
3264
3265         rtl8180_proc_init_one(dev);
3266
3267         DMESG("Driver probe completed\n");
3268         return 0;
3269 fail1:
3270         if (dev->mem_start != (unsigned long)NULL) {
3271                 iounmap((void *)dev->mem_start);
3272                 release_mem_region(pci_resource_start(pdev, 1),
3273                                    pci_resource_len(pdev, 1));
3274         }
3275 fail:
3276         if (dev) {
3277                 if (priv->irq) {
3278                         free_irq(dev->irq, dev);
3279                         dev->irq = 0;
3280                 }
3281                 free_ieee80211(dev);
3282         }
3283
3284 fail_free:
3285         pci_disable_device(pdev);
3286
3287         DMESG("wlan driver load failed\n");
3288         pci_set_drvdata(pdev, NULL);
3289         return ret;
3290 }
3291
3292 static void rtl8180_pci_remove(struct pci_dev *pdev)
3293 {
3294         struct r8180_priv *priv;
3295         struct net_device *dev = pci_get_drvdata(pdev);
3296
3297         if (dev) {
3298                 unregister_netdev(dev);
3299
3300                 priv = ieee80211_priv(dev);
3301
3302                 rtl8180_proc_remove_one(dev);
3303                 rtl8180_down(dev);
3304                 priv->rf_close(dev);
3305                 rtl8180_reset(dev);
3306                 mdelay(10);
3307
3308                 if (priv->irq) {
3309                         DMESG("Freeing irq %d", dev->irq);
3310                         free_irq(dev->irq, dev);
3311                         priv->irq = 0;
3312                 }
3313
3314                 free_rx_desc_ring(dev);
3315                 free_tx_desc_rings(dev);
3316
3317                 if (dev->mem_start != (unsigned long)NULL) {
3318                         iounmap((void *)dev->mem_start);
3319                         release_mem_region(pci_resource_start(pdev, 1),
3320                                            pci_resource_len(pdev, 1));
3321                 }
3322
3323                 free_ieee80211(dev);
3324         }
3325         pci_disable_device(pdev);
3326
3327         DMESG("wlan driver removed\n");
3328 }
3329
3330 /* fun with the built-in ieee80211 stack... */
3331 extern int ieee80211_crypto_init(void);
3332 extern void ieee80211_crypto_deinit(void);
3333 extern int ieee80211_crypto_tkip_init(void);
3334 extern void ieee80211_crypto_tkip_exit(void);
3335 extern int ieee80211_crypto_ccmp_init(void);
3336 extern void ieee80211_crypto_ccmp_exit(void);
3337 extern int ieee80211_crypto_wep_init(void);
3338 extern void ieee80211_crypto_wep_exit(void);
3339
3340 static int __init rtl8180_pci_module_init(void)
3341 {
3342         int ret;
3343
3344         ret = ieee80211_crypto_init();
3345         if (ret) {
3346                 pr_err("ieee80211_crypto_init() failed %d\n", ret);
3347                 return ret;
3348         }
3349         ret = ieee80211_crypto_tkip_init();
3350         if (ret) {
3351                 pr_err("ieee80211_crypto_tkip_init() failed %d\n", ret);
3352                 return ret;
3353         }
3354         ret = ieee80211_crypto_ccmp_init();
3355         if (ret) {
3356                 pr_err("ieee80211_crypto_ccmp_init() failed %d\n", ret);
3357                 return ret;
3358         }
3359         ret = ieee80211_crypto_wep_init();
3360         if (ret) {
3361                 pr_err("ieee80211_crypto_wep_init() failed %d\n", ret);
3362                 return ret;
3363         }
3364
3365         pr_info("\nLinux kernel driver for RTL8180 / RTL8185 based WLAN cards\n");
3366         pr_info("Copyright (c) 2004-2005, Andrea Merello\n");
3367         DMESG("Initializing module");
3368         DMESG("Wireless extensions version %d", WIRELESS_EXT);
3369         rtl8180_proc_module_init();
3370
3371         if (pci_register_driver(&rtl8180_pci_driver)) {
3372                 DMESG("No device found");
3373                 return -ENODEV;
3374         }
3375         return 0;
3376 }
3377
3378 static void __exit rtl8180_pci_module_exit(void)
3379 {
3380         pci_unregister_driver(&rtl8180_pci_driver);
3381         rtl8180_proc_module_remove();
3382         ieee80211_crypto_tkip_exit();
3383         ieee80211_crypto_ccmp_exit();
3384         ieee80211_crypto_wep_exit();
3385         ieee80211_crypto_deinit();
3386         DMESG("Exiting");
3387 }
3388
3389 void rtl8180_try_wake_queue(struct net_device *dev, int pri)
3390 {
3391         unsigned long flags;
3392         short enough_desc;
3393         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3394
3395         spin_lock_irqsave(&priv->tx_lock, flags);
3396         enough_desc = check_nic_enought_desc(dev, pri);
3397         spin_unlock_irqrestore(&priv->tx_lock, flags);
3398
3399         if (enough_desc)
3400                 ieee80211_rtl_wake_queue(priv->ieee80211);
3401 }
3402
3403 void rtl8180_tx_isr(struct net_device *dev, int pri, short error)
3404 {
3405         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3406         u32 *tail; /* tail virtual addr */
3407         u32 *head; /* head virtual addr */
3408         u32 *begin; /* start of ring virtual addr */
3409         u32 *nicv; /* nic pointer virtual addr */
3410         u32 nic; /* nic pointer physical addr */
3411         u32 nicbegin; /* start of ring physical addr */
3412         unsigned long flag;
3413         /* physical addr are ok on 32 bits since we set DMA mask */
3414         int offs;
3415         int j, i;
3416         int hd;
3417         if (error)
3418                 priv->stats.txretry++; /* tony 20060601 */
3419         spin_lock_irqsave(&priv->tx_lock, flag);
3420         switch (pri) {
3421         case MANAGE_PRIORITY:
3422                 tail = priv->txmapringtail;
3423                 begin = priv->txmapring;
3424                 head = priv->txmapringhead;
3425                 nic = read_nic_dword(dev, TX_MANAGEPRIORITY_RING_ADDR);
3426                 nicbegin = priv->txmapringdma;
3427                 break;
3428         case BK_PRIORITY:
3429                 tail = priv->txbkpringtail;
3430                 begin = priv->txbkpring;
3431                 head = priv->txbkpringhead;
3432                 nic = read_nic_dword(dev, TX_BKPRIORITY_RING_ADDR);
3433                 nicbegin = priv->txbkpringdma;
3434                 break;
3435         case BE_PRIORITY:
3436                 tail = priv->txbepringtail;
3437                 begin = priv->txbepring;
3438                 head = priv->txbepringhead;
3439                 nic = read_nic_dword(dev, TX_BEPRIORITY_RING_ADDR);
3440                 nicbegin = priv->txbepringdma;
3441                 break;
3442         case VI_PRIORITY:
3443                 tail = priv->txvipringtail;
3444                 begin = priv->txvipring;
3445                 head = priv->txvipringhead;
3446                 nic = read_nic_dword(dev, TX_VIPRIORITY_RING_ADDR);
3447                 nicbegin = priv->txvipringdma;
3448                 break;
3449         case VO_PRIORITY:
3450                 tail = priv->txvopringtail;
3451                 begin = priv->txvopring;
3452                 head = priv->txvopringhead;
3453                 nic = read_nic_dword(dev, TX_VOPRIORITY_RING_ADDR);
3454                 nicbegin = priv->txvopringdma;
3455                 break;
3456         case HI_PRIORITY:
3457                 tail = priv->txhpringtail;
3458                 begin = priv->txhpring;
3459                 head = priv->txhpringhead;
3460                 nic = read_nic_dword(dev, TX_HIGHPRIORITY_RING_ADDR);
3461                 nicbegin = priv->txhpringdma;
3462                 break;
3463
3464         default:
3465                 spin_unlock_irqrestore(&priv->tx_lock, flag);
3466                 return ;
3467         }
3468
3469         nicv = (u32 *)((nic - nicbegin) + (u8 *)begin);
3470         if ((head <= tail && (nicv > tail || nicv < head)) ||
3471                 (head > tail && (nicv > tail && nicv < head))) {
3472                         DMESGW("nic has lost pointer");
3473                         spin_unlock_irqrestore(&priv->tx_lock, flag);
3474                         rtl8180_restart(dev);
3475                         return;
3476                 }
3477
3478         /*
3479          * We check all the descriptors between the head and the nic,
3480          * but not the currently pointed by the nic (the next to be txed)
3481          * and the previous of the pointed (might be in process ??)
3482          */
3483         offs = (nic - nicbegin);
3484         offs = offs / 8 / 4;
3485         hd = (head - begin) / 8;
3486
3487         if (offs >= hd)
3488                 j = offs - hd;
3489         else
3490                 j = offs + (priv->txringcount-1-hd);
3491
3492         j -= 2;
3493         if (j < 0)
3494                 j = 0;
3495
3496         for (i = 0; i < j; i++) {
3497                 if ((*head) & (1<<31))
3498                         break;
3499                 if (((*head)&(0x10000000)) != 0) {
3500                         priv->CurrRetryCnt += (u16)((*head) & (0x000000ff));
3501                         if (!error)
3502                                 priv->NumTxOkTotal++;
3503                 }
3504
3505                 if (!error)
3506                         priv->NumTxOkBytesTotal += (*(head+3)) & (0x00000fff);
3507
3508                 *head = *head & ~(1<<31);
3509
3510                 if ((head - begin)/8 == priv->txringcount-1)
3511                         head = begin;
3512                 else
3513                         head += 8;
3514         }
3515
3516         /*
3517          * The head has been moved to the last certainly TXed
3518          * (or at least processed by the nic) packet.
3519          * The driver take forcefully owning of all these packets
3520          * If the packet previous of the nic pointer has been
3521          * processed this doesn't matter: it will be checked
3522          * here at the next round. Anyway if no more packet are
3523          * TXed no memory leak occur at all.
3524          */
3525
3526         switch (pri) {
3527         case MANAGE_PRIORITY:
3528                 priv->txmapringhead = head;
3529
3530                 if (priv->ack_tx_to_ieee) {
3531                         if (rtl8180_is_tx_queue_empty(dev)) {
3532                                 priv->ack_tx_to_ieee = 0;
3533                                 ieee80211_ps_tx_ack(priv->ieee80211, !error);
3534                         }
3535                 }
3536                 break;
3537         case BK_PRIORITY:
3538                 priv->txbkpringhead = head;
3539                 break;
3540         case BE_PRIORITY:
3541                 priv->txbepringhead = head;
3542                 break;
3543         case VI_PRIORITY:
3544                 priv->txvipringhead = head;
3545                 break;
3546         case VO_PRIORITY:
3547                 priv->txvopringhead = head;
3548                 break;
3549         case HI_PRIORITY:
3550                 priv->txhpringhead = head;
3551                 break;
3552         }
3553
3554         spin_unlock_irqrestore(&priv->tx_lock, flag);
3555 }
3556
3557 irqreturn_t rtl8180_interrupt(int irq, void *netdev, struct pt_regs *regs)
3558 {
3559         struct net_device *dev = (struct net_device *) netdev;
3560         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3561         unsigned long flags;
3562         u32 inta;
3563
3564         /* We should return IRQ_NONE, but for now let me keep this */
3565         if (priv->irq_enabled == 0)
3566                 return IRQ_HANDLED;
3567
3568         spin_lock_irqsave(&priv->irq_th_lock, flags);
3569
3570         /* ISR: 4bytes */
3571         inta = read_nic_dword(dev, ISR); /* & priv->IntrMask; */
3572         write_nic_dword(dev, ISR, inta); /* reset int situation */
3573
3574         priv->stats.shints++;
3575
3576         if (!inta) {
3577                 spin_unlock_irqrestore(&priv->irq_th_lock, flags);
3578                 return IRQ_HANDLED;
3579         /*
3580          * most probably we can safely return IRQ_NONE,
3581          * but for now is better to avoid problems
3582          */
3583         }
3584
3585         if (inta == 0xffff) {
3586                 /* HW disappeared */
3587                 spin_unlock_irqrestore(&priv->irq_th_lock, flags);
3588                 return IRQ_HANDLED;
3589         }
3590
3591         priv->stats.ints++;
3592
3593         if (!netif_running(dev)) {
3594                 spin_unlock_irqrestore(&priv->irq_th_lock, flags);
3595                 return IRQ_HANDLED;
3596         }
3597
3598         if (inta & ISR_TimeOut)
3599                 write_nic_dword(dev, TimerInt, 0);
3600
3601         if (inta & ISR_TBDOK)
3602                 priv->stats.txbeacon++;
3603
3604         if (inta & ISR_TBDER)
3605                 priv->stats.txbeaconerr++;
3606
3607         if (inta & IMR_TMGDOK)
3608                 rtl8180_tx_isr(dev, MANAGE_PRIORITY, 0);
3609
3610         if (inta & ISR_THPDER) {
3611                 priv->stats.txhperr++;
3612                 rtl8180_tx_isr(dev, HI_PRIORITY, 1);
3613                 priv->ieee80211->stats.tx_errors++;
3614         }
3615
3616         if (inta & ISR_THPDOK) { /* High priority tx ok */
3617                 priv->link_detect.NumTxOkInPeriod++; /* YJ,add,080828 */
3618                 priv->stats.txhpokint++;
3619                 rtl8180_tx_isr(dev, HI_PRIORITY, 0);
3620         }
3621
3622         if (inta & ISR_RER)
3623                 priv->stats.rxerr++;
3624
3625         if (inta & ISR_TBKDER) { /* corresponding to BK_PRIORITY */
3626                 priv->stats.txbkperr++;
3627                 priv->ieee80211->stats.tx_errors++;
3628                 rtl8180_tx_isr(dev, BK_PRIORITY, 1);
3629                 rtl8180_try_wake_queue(dev, BK_PRIORITY);
3630         }
3631
3632         if (inta & ISR_TBEDER) { /* corresponding to BE_PRIORITY */
3633                 priv->stats.txbeperr++;
3634                 priv->ieee80211->stats.tx_errors++;
3635                 rtl8180_tx_isr(dev, BE_PRIORITY, 1);
3636                 rtl8180_try_wake_queue(dev, BE_PRIORITY);
3637         }
3638         if (inta & ISR_TNPDER) { /* corresponding to VO_PRIORITY */
3639                 priv->stats.txnperr++;
3640                 priv->ieee80211->stats.tx_errors++;
3641                 rtl8180_tx_isr(dev, NORM_PRIORITY, 1);
3642                 rtl8180_try_wake_queue(dev, NORM_PRIORITY);
3643         }
3644
3645         if (inta & ISR_TLPDER) { /* corresponding to VI_PRIORITY */
3646                 priv->stats.txlperr++;
3647                 priv->ieee80211->stats.tx_errors++;
3648                 rtl8180_tx_isr(dev, LOW_PRIORITY, 1);
3649                 rtl8180_try_wake_queue(dev, LOW_PRIORITY);
3650         }
3651
3652         if (inta & ISR_ROK) {
3653                 priv->stats.rxint++;
3654                 tasklet_schedule(&priv->irq_rx_tasklet);
3655         }
3656
3657         if (inta & ISR_RQoSOK) {
3658                 priv->stats.rxint++;
3659                 tasklet_schedule(&priv->irq_rx_tasklet);
3660         }
3661
3662         if (inta & ISR_BcnInt)
3663                 rtl8180_prepare_beacon(dev);
3664
3665         if (inta & ISR_RDU) {
3666                 DMESGW("No RX descriptor available");
3667                 priv->stats.rxrdu++;
3668                 tasklet_schedule(&priv->irq_rx_tasklet);
3669         }
3670
3671         if (inta & ISR_RXFOVW) {
3672                 priv->stats.rxoverflow++;
3673                 tasklet_schedule(&priv->irq_rx_tasklet);
3674         }
3675
3676         if (inta & ISR_TXFOVW)
3677                 priv->stats.txoverflow++;
3678
3679         if (inta & ISR_TNPDOK) { /* Normal priority tx ok */
3680                 priv->link_detect.NumTxOkInPeriod++; /* YJ,add,080828 */
3681                 priv->stats.txnpokint++;
3682                 rtl8180_tx_isr(dev, NORM_PRIORITY, 0);
3683                 rtl8180_try_wake_queue(dev, NORM_PRIORITY);
3684         }
3685
3686         if (inta & ISR_TLPDOK) { /* Low priority tx ok */
3687                 priv->link_detect.NumTxOkInPeriod++; /* YJ,add,080828 */
3688                 priv->stats.txlpokint++;
3689                 rtl8180_tx_isr(dev, LOW_PRIORITY, 0);
3690                 rtl8180_try_wake_queue(dev, LOW_PRIORITY);
3691         }
3692
3693         if (inta & ISR_TBKDOK) { /* corresponding to BK_PRIORITY */
3694                 priv->stats.txbkpokint++;
3695                 priv->link_detect.NumTxOkInPeriod++; /* YJ,add,080828 */
3696                 rtl8180_tx_isr(dev, BK_PRIORITY, 0);
3697                 rtl8180_try_wake_queue(dev, BE_PRIORITY);
3698         }
3699
3700         if (inta & ISR_TBEDOK) { /* corresponding to BE_PRIORITY */
3701                 priv->stats.txbeperr++;
3702                 priv->link_detect.NumTxOkInPeriod++; /* YJ,add,080828 */
3703                 rtl8180_tx_isr(dev, BE_PRIORITY, 0);
3704                 rtl8180_try_wake_queue(dev, BE_PRIORITY);
3705         }
3706         force_pci_posting(dev);
3707         spin_unlock_irqrestore(&priv->irq_th_lock, flags);
3708
3709         return IRQ_HANDLED;
3710 }
3711
3712 void rtl8180_irq_rx_tasklet(struct r8180_priv *priv)
3713 {
3714         rtl8180_rx(priv->dev);
3715 }
3716
3717 void GPIOChangeRFWorkItemCallBack(struct work_struct *work)
3718 {
3719         struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, GPIOChangeRFWorkItem.work);
3720         struct net_device *dev = ieee->dev;
3721         struct r8180_priv *priv = ieee80211_priv(dev);
3722         u8 btPSR;
3723         u8 btConfig0;
3724         RT_RF_POWER_STATE       eRfPowerStateToSet;
3725         bool bActuallySet = false;
3726
3727         char *argv[3];
3728         static char *RadioPowerPath = "/etc/acpi/events/RadioPower.sh";
3729         static char *envp[] = {"HOME=/", "TERM=linux", "PATH=/usr/bin:/bin", NULL};
3730         static int readf_count;
3731
3732         readf_count = (readf_count+1)%0xffff;
3733         /* We should turn off LED before polling FF51[4]. */
3734
3735         /* Turn off LED. */
3736         btPSR = read_nic_byte(dev, PSR);
3737         write_nic_byte(dev, PSR, (btPSR & ~BIT3));
3738
3739         /* It need to delay 4us suggested by Jong, 2008-01-16 */
3740         udelay(4);
3741
3742         /* HW radio On/Off according to the value of FF51[4](config0) */
3743         btConfig0 = btPSR = read_nic_byte(dev, CONFIG0);
3744
3745         eRfPowerStateToSet = (btConfig0 & BIT4) ?  eRfOn : eRfOff;
3746
3747         /* Turn LED back on when radio enabled */
3748         if (eRfPowerStateToSet == eRfOn)
3749                 write_nic_byte(dev, PSR, btPSR | BIT3);
3750
3751         if ((priv->ieee80211->bHwRadioOff == true) &&
3752            (eRfPowerStateToSet == eRfOn)) {
3753                 priv->ieee80211->bHwRadioOff = false;
3754                 bActuallySet = true;
3755         } else if ((priv->ieee80211->bHwRadioOff == false) &&
3756                   (eRfPowerStateToSet == eRfOff)) {
3757                 priv->ieee80211->bHwRadioOff = true;
3758                 bActuallySet = true;
3759         }
3760
3761         if (bActuallySet) {
3762                 MgntActSet_RF_State(dev, eRfPowerStateToSet, RF_CHANGE_BY_HW);
3763
3764                 /* To update the UI status for Power status changed */
3765                 if (priv->ieee80211->bHwRadioOff == true)
3766                         argv[1] = "RFOFF";
3767                 else
3768                         argv[1] = "RFON";
3769                 argv[0] = RadioPowerPath;
3770                 argv[2] = NULL;
3771
3772                 call_usermodehelper(RadioPowerPath, argv, envp, UMH_WAIT_PROC);
3773         }
3774 }
3775
3776 module_init(rtl8180_pci_module_init);
3777 module_exit(rtl8180_pci_module_exit);