2 *************************************************************************
4 * 5F., No.36, Taiyuan St., Jhubei City,
8 * (c) Copyright 2002-2007, Ralink Technology, Inc.
10 * This program is free software; you can redistribute it and/or modify *
11 * it under the terms of the GNU General Public License as published by *
12 * the Free Software Foundation; either version 2 of the License, or *
13 * (at your option) any later version. *
15 * This program is distributed in the hope that it will be useful, *
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
18 * GNU General Public License for more details. *
20 * You should have received a copy of the GNU General Public License *
21 * along with this program; if not, write to the *
22 * Free Software Foundation, Inc., *
23 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
25 *************************************************************************
31 Miniport generic portion header file
35 -------- ---------- ----------------------------------------------
36 Paul Lin 2002-08-01 created
37 John Chang 2004-08-20 RT2561/2661 use scatter-gather scheme
38 Jan Lee 2006-09-15 RT2860. Change for 802.11n , EEPROM, Led, BA, HT.
40 #include "../rt_config.h"
41 #include "../firmware.h"
43 //#define BIN_IN_FILE /* use *.bin firmware */
45 UCHAR BIT8[] = {0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80};
46 ULONG BIT32[] = {0x00000001, 0x00000002, 0x00000004, 0x00000008,
47 0x00000010, 0x00000020, 0x00000040, 0x00000080,
48 0x00000100, 0x00000200, 0x00000400, 0x00000800,
49 0x00001000, 0x00002000, 0x00004000, 0x00008000,
50 0x00010000, 0x00020000, 0x00040000, 0x00080000,
51 0x00100000, 0x00200000, 0x00400000, 0x00800000,
52 0x01000000, 0x02000000, 0x04000000, 0x08000000,
53 0x10000000, 0x20000000, 0x40000000, 0x80000000};
55 char* CipherName[] = {"none","wep64","wep128","TKIP","AES","CKIP64","CKIP128"};
57 const unsigned short ccitt_16Table[] = {
58 0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50A5, 0x60C6, 0x70E7,
59 0x8108, 0x9129, 0xA14A, 0xB16B, 0xC18C, 0xD1AD, 0xE1CE, 0xF1EF,
60 0x1231, 0x0210, 0x3273, 0x2252, 0x52B5, 0x4294, 0x72F7, 0x62D6,
61 0x9339, 0x8318, 0xB37B, 0xA35A, 0xD3BD, 0xC39C, 0xF3FF, 0xE3DE,
62 0x2462, 0x3443, 0x0420, 0x1401, 0x64E6, 0x74C7, 0x44A4, 0x5485,
63 0xA56A, 0xB54B, 0x8528, 0x9509, 0xE5EE, 0xF5CF, 0xC5AC, 0xD58D,
64 0x3653, 0x2672, 0x1611, 0x0630, 0x76D7, 0x66F6, 0x5695, 0x46B4,
65 0xB75B, 0xA77A, 0x9719, 0x8738, 0xF7DF, 0xE7FE, 0xD79D, 0xC7BC,
66 0x48C4, 0x58E5, 0x6886, 0x78A7, 0x0840, 0x1861, 0x2802, 0x3823,
67 0xC9CC, 0xD9ED, 0xE98E, 0xF9AF, 0x8948, 0x9969, 0xA90A, 0xB92B,
68 0x5AF5, 0x4AD4, 0x7AB7, 0x6A96, 0x1A71, 0x0A50, 0x3A33, 0x2A12,
69 0xDBFD, 0xCBDC, 0xFBBF, 0xEB9E, 0x9B79, 0x8B58, 0xBB3B, 0xAB1A,
70 0x6CA6, 0x7C87, 0x4CE4, 0x5CC5, 0x2C22, 0x3C03, 0x0C60, 0x1C41,
71 0xEDAE, 0xFD8F, 0xCDEC, 0xDDCD, 0xAD2A, 0xBD0B, 0x8D68, 0x9D49,
72 0x7E97, 0x6EB6, 0x5ED5, 0x4EF4, 0x3E13, 0x2E32, 0x1E51, 0x0E70,
73 0xFF9F, 0xEFBE, 0xDFDD, 0xCFFC, 0xBF1B, 0xAF3A, 0x9F59, 0x8F78,
74 0x9188, 0x81A9, 0xB1CA, 0xA1EB, 0xD10C, 0xC12D, 0xF14E, 0xE16F,
75 0x1080, 0x00A1, 0x30C2, 0x20E3, 0x5004, 0x4025, 0x7046, 0x6067,
76 0x83B9, 0x9398, 0xA3FB, 0xB3DA, 0xC33D, 0xD31C, 0xE37F, 0xF35E,
77 0x02B1, 0x1290, 0x22F3, 0x32D2, 0x4235, 0x5214, 0x6277, 0x7256,
78 0xB5EA, 0xA5CB, 0x95A8, 0x8589, 0xF56E, 0xE54F, 0xD52C, 0xC50D,
79 0x34E2, 0x24C3, 0x14A0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405,
80 0xA7DB, 0xB7FA, 0x8799, 0x97B8, 0xE75F, 0xF77E, 0xC71D, 0xD73C,
81 0x26D3, 0x36F2, 0x0691, 0x16B0, 0x6657, 0x7676, 0x4615, 0x5634,
82 0xD94C, 0xC96D, 0xF90E, 0xE92F, 0x99C8, 0x89E9, 0xB98A, 0xA9AB,
83 0x5844, 0x4865, 0x7806, 0x6827, 0x18C0, 0x08E1, 0x3882, 0x28A3,
84 0xCB7D, 0xDB5C, 0xEB3F, 0xFB1E, 0x8BF9, 0x9BD8, 0xABBB, 0xBB9A,
85 0x4A75, 0x5A54, 0x6A37, 0x7A16, 0x0AF1, 0x1AD0, 0x2AB3, 0x3A92,
86 0xFD2E, 0xED0F, 0xDD6C, 0xCD4D, 0xBDAA, 0xAD8B, 0x9DE8, 0x8DC9,
87 0x7C26, 0x6C07, 0x5C64, 0x4C45, 0x3CA2, 0x2C83, 0x1CE0, 0x0CC1,
88 0xEF1F, 0xFF3E, 0xCF5D, 0xDF7C, 0xAF9B, 0xBFBA, 0x8FD9, 0x9FF8,
89 0x6E17, 0x7E36, 0x4E55, 0x5E74, 0x2E93, 0x3EB2, 0x0ED1, 0x1EF0
91 #define ByteCRC16(v, crc) \
92 (unsigned short)((crc << 8) ^ ccitt_16Table[((crc >> 8) ^ (v)) & 255])
94 unsigned char BitReverse(unsigned char x)
100 if(x & 0x80) Temp |= 0x80;
109 // BBP register initialization set
111 REG_PAIR BBPRegTable[] = {
112 {BBP_R65, 0x2C}, // fix rssi issue
113 {BBP_R66, 0x38}, // Also set this default value to pAd->BbpTuning.R66CurrentValue at initial
115 {BBP_R70, 0xa}, // BBP_R70 will change to 0x8 in ApStartUp and LinkUp for rt2860C, otherwise value is 0xa
120 {BBP_R84, 0x99}, // 0x19 is for rt2860E and after. This is for extension channel overlapping IOT. 0x99 is for rt2860D and before
121 {BBP_R86, 0x00}, // middle range issue, Rory @2008-01-28
122 {BBP_R91, 0x04}, // middle range issue, Rory @2008-01-28
123 {BBP_R92, 0x00}, // middle range issue, Rory @2008-01-28
124 {BBP_R103, 0x00}, // near range high-power issue, requested from Gary @2008-0528
125 {BBP_R105, 0x05}, // 0x05 is for rt2860E to turn on FEQ control. It is safe for rt2860D and before, because Bit 7:2 are reserved in rt2860D and before.
127 #define NUM_BBP_REG_PARMS (sizeof(BBPRegTable) / sizeof(REG_PAIR))
130 // RF register initialization set
133 REG_PAIR RT30xx_RFRegTable[] = {
154 #define NUM_RF_REG_PARMS (sizeof(RT30xx_RFRegTable) / sizeof(REG_PAIR))
158 // ASIC register initialization sets
161 RTMP_REG_PAIR MACRegTable[] = {
162 #if defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x200)
163 {BCN_OFFSET0, 0xf8f0e8e0}, /* 0x3800(e0), 0x3A00(e8), 0x3C00(f0), 0x3E00(f8), 512B for each beacon */
164 {BCN_OFFSET1, 0x6f77d0c8}, /* 0x3200(c8), 0x3400(d0), 0x1DC0(77), 0x1BC0(6f), 512B for each beacon */
165 #elif defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x100)
166 {BCN_OFFSET0, 0xece8e4e0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
167 {BCN_OFFSET1, 0xfcf8f4f0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
169 #error You must re-calculate new value for BCN_OFFSET0 & BCN_OFFSET1 in MACRegTable[]!!!
170 #endif // HW_BEACON_OFFSET //
172 {LEGACY_BASIC_RATE, 0x0000013f}, // Basic rate set bitmap
173 {HT_BASIC_RATE, 0x00008003}, // Basic HT rate set , 20M, MCS=3, MM. Format is the same as in TXWI.
174 {MAC_SYS_CTRL, 0x00}, // 0x1004, , default Disable RX
175 {RX_FILTR_CFG, 0x17f97}, //0x1400 , RX filter control,
176 {BKOFF_SLOT_CFG, 0x209}, // default set short slot time, CC_DELAY_TIME should be 2
177 //{TX_SW_CFG0, 0x40a06}, // Gary,2006-08-23
178 {TX_SW_CFG0, 0x0}, // Gary,2008-05-21 for CWC test
179 {TX_SW_CFG1, 0x80606}, // Gary,2006-08-23
180 {TX_LINK_CFG, 0x1020}, // Gary,2006-08-23
181 {TX_TIMEOUT_CFG, 0x000a2090},
182 {MAX_LEN_CFG, MAX_AGGREGATION_SIZE | 0x00001000}, // 0x3018, MAX frame length. Max PSDU = 16kbytes.
183 {LED_CFG, 0x7f031e46}, // Gary, 2006-08-23
185 //#ifdef CONFIG_STA_SUPPORT
186 // {WMM_AIFSN_CFG, 0x00002273},
187 // {WMM_CWMIN_CFG, 0x00002344},
188 // {WMM_CWMAX_CFG, 0x000034aa},
189 //#endif // CONFIG_STA_SUPPORT //
191 {PBF_MAX_PCNT, 0x1F3F6F6F}, //iverson modify for usb issue, 2008/09/19
192 // 6F + 6F < total page count FE
193 // so that RX doesn't occupy TX's buffer space when WMM congestion.
195 {PBF_MAX_PCNT, 0x1F3FBF9F}, //0x1F3f7f9f}, //Jan, 2006/04/20
196 #endif // INF_AMAZON_SE //
197 //{TX_RTY_CFG, 0x6bb80408}, // Jan, 2006/11/16
198 {TX_RTY_CFG, 0x47d01f0f}, // Jan, 2006/11/16, Set TxWI->ACK =0 in Probe Rsp Modify for 2860E ,2007-08-03
199 {AUTO_RSP_CFG, 0x00000013}, // Initial Auto_Responder, because QA will turn off Auto-Responder
200 {CCK_PROT_CFG, 0x05740003 /*0x01740003*/}, // Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled.
201 {OFDM_PROT_CFG, 0x05740003 /*0x01740003*/}, // Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled.
202 //PS packets use Tx1Q (for HCCA) when dequeue from PS unicast queue (WiFi WPA2 MA9_DT1 for Marvell B STA)
204 #ifdef CONFIG_STA_SUPPORT
205 {PBF_CFG, 0xf40006}, // Only enable Queue 2
206 #endif // CONFIG_STA_SUPPORT //
207 {MM40_PROT_CFG, 0x3F44084}, // Initial Auto_Responder, because QA will turn off Auto-Responder
208 {WPDMA_GLO_CFG, 0x00000030},
210 {GF20_PROT_CFG, 0x01744004}, // set 19:18 --> Short NAV for MIMO PS
211 {GF40_PROT_CFG, 0x03F44084},
212 {MM20_PROT_CFG, 0x01744004},
213 {TXOP_CTRL_CFG, 0x0000583f, /*0x0000243f*/ /*0x000024bf*/}, //Extension channel backoff.
214 {TX_RTS_CFG, 0x00092b20},
216 {EXP_ACK_TIME, 0x002400ca}, // default value
218 // {EXP_ACK_TIME, 0x005400ca}, // suggested by Gray @ 20070323 for 11n intel-sta throughput
219 //#endif // end - WIFI_TEST //
220 {TXOP_HLDR_ET, 0x00000002},
222 /* Jerry comments 2008/01/16: we use SIFS = 10us in CCK defaultly, but it seems that 10us
223 is too small for INTEL 2200bg card, so in MBSS mode, the delta time between beacon0
224 and beacon1 is SIFS (10us), so if INTEL 2200bg card connects to BSS0, the ping
225 will always lost. So we change the SIFS of CCK from 10us to 16us. */
226 {XIFS_TIME_CFG, 0x33a41010},
227 {PWR_PIN_CFG, 0x00000003}, // patch for 2880-E
231 #ifdef CONFIG_STA_SUPPORT
232 RTMP_REG_PAIR STAMACRegTable[] = {
233 {WMM_AIFSN_CFG, 0x00002273},
234 {WMM_CWMIN_CFG, 0x00002344},
235 {WMM_CWMAX_CFG, 0x000034aa},
237 #endif // CONFIG_STA_SUPPORT //
239 #define NUM_MAC_REG_PARMS (sizeof(MACRegTable) / sizeof(RTMP_REG_PAIR))
240 #ifdef CONFIG_STA_SUPPORT
241 #define NUM_STA_MAC_REG_PARMS (sizeof(STAMACRegTable) / sizeof(RTMP_REG_PAIR))
242 #endif // CONFIG_STA_SUPPORT //
246 // RT2870 Firmware Spec only used 1 oct for version expression
248 #define FIRMWARE_MINOR_VERSION 7
252 // New 8k byte firmware size for RT3071/RT3072
253 #define FIRMWAREIMAGE_MAX_LENGTH 0x2000
254 #define FIRMWAREIMAGE_LENGTH (sizeof (FirmwareImage) / sizeof(UCHAR))
255 #define FIRMWARE_MAJOR_VERSION 0
257 #define FIRMWAREIMAGEV1_LENGTH 0x1000
258 #define FIRMWAREIMAGEV2_LENGTH 0x1000
263 ========================================================================
266 Allocate RTMP_ADAPTER data block and do some initialization
269 Adapter Pointer to our adapter
279 ========================================================================
281 NDIS_STATUS RTMPAllocAdapterBlock(
283 OUT PRTMP_ADAPTER *ppAdapter)
288 UCHAR *pBeaconBuf = NULL;
290 DBGPRINT(RT_DEBUG_TRACE, ("--> RTMPAllocAdapterBlock\n"));
296 // Allocate RTMP_ADAPTER memory block
297 pBeaconBuf = kmalloc(MAX_BEACON_SIZE, MEM_ALLOC_FLAG);
298 if (pBeaconBuf == NULL)
300 Status = NDIS_STATUS_FAILURE;
301 DBGPRINT_ERR(("Failed to allocate memory - BeaconBuf!\n"));
305 Status = AdapterBlockAllocateMemory(handle, (PVOID *)&pAd);
306 if (Status != NDIS_STATUS_SUCCESS)
308 DBGPRINT_ERR(("Failed to allocate memory - ADAPTER\n"));
311 pAd->BeaconBuf = pBeaconBuf;
312 printk("\n\n=== pAd = %p, size = %d ===\n\n", pAd, (UINT32)sizeof(RTMP_ADAPTER));
316 NdisAllocateSpinLock(&pAd->MgmtRingLock);
318 for (index =0 ; index < NUM_OF_TX_RING; index++)
320 NdisAllocateSpinLock(&pAd->TxSwQueueLock[index]);
321 NdisAllocateSpinLock(&pAd->DeQueueLock[index]);
322 pAd->DeQueueRunning[index] = FALSE;
325 NdisAllocateSpinLock(&pAd->irq_lock);
329 if ((Status != NDIS_STATUS_SUCCESS) && (pBeaconBuf))
334 DBGPRINT_S(Status, ("<-- RTMPAllocAdapterBlock, Status=%x\n", Status));
339 ========================================================================
342 Read initial Tx power per MCS and BW from EEPROM
345 Adapter Pointer to our adapter
354 ========================================================================
356 VOID RTMPReadTxPwrPerRate(
357 IN PRTMP_ADAPTER pAd)
359 ULONG data, Adata, Gdata;
360 USHORT i, value, value2;
361 INT Apwrdelta, Gpwrdelta;
363 BOOLEAN bValid, bApwrdeltaMinus = TRUE, bGpwrdeltaMinus = TRUE;
366 // Get power delta for 20MHz and 40MHz.
368 DBGPRINT(RT_DEBUG_TRACE, ("Txpower per Rate\n"));
369 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_DELTA, value2);
373 if ((value2 & 0xff) != 0xff)
376 Gpwrdelta = (value2&0xf);
379 bGpwrdeltaMinus = FALSE;
381 bGpwrdeltaMinus = TRUE;
383 if ((value2 & 0xff00) != 0xff00)
385 if ((value2 & 0x8000))
386 Apwrdelta = ((value2&0xf00)>>8);
388 if ((value2 & 0x4000))
389 bApwrdeltaMinus = FALSE;
391 bApwrdeltaMinus = TRUE;
393 DBGPRINT(RT_DEBUG_TRACE, ("Gpwrdelta = %x, Apwrdelta = %x .\n", Gpwrdelta, Apwrdelta));
396 // Get Txpower per MCS for 20MHz in 2.4G.
400 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i*4, value);
402 if (bApwrdeltaMinus == FALSE)
404 t1 = (value&0xf)+(Apwrdelta);
407 t2 = ((value&0xf0)>>4)+(Apwrdelta);
410 t3 = ((value&0xf00)>>8)+(Apwrdelta);
413 t4 = ((value&0xf000)>>12)+(Apwrdelta);
419 if ((value&0xf) > Apwrdelta)
420 t1 = (value&0xf)-(Apwrdelta);
423 if (((value&0xf0)>>4) > Apwrdelta)
424 t2 = ((value&0xf0)>>4)-(Apwrdelta);
427 if (((value&0xf00)>>8) > Apwrdelta)
428 t3 = ((value&0xf00)>>8)-(Apwrdelta);
431 if (((value&0xf000)>>12) > Apwrdelta)
432 t4 = ((value&0xf000)>>12)-(Apwrdelta);
436 Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
437 if (bGpwrdeltaMinus == FALSE)
439 t1 = (value&0xf)+(Gpwrdelta);
442 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
445 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
448 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
454 if ((value&0xf) > Gpwrdelta)
455 t1 = (value&0xf)-(Gpwrdelta);
458 if (((value&0xf0)>>4) > Gpwrdelta)
459 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
462 if (((value&0xf00)>>8) > Gpwrdelta)
463 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
466 if (((value&0xf000)>>12) > Gpwrdelta)
467 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
471 Gdata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
473 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i*4 + 2, value);
474 if (bApwrdeltaMinus == FALSE)
476 t1 = (value&0xf)+(Apwrdelta);
479 t2 = ((value&0xf0)>>4)+(Apwrdelta);
482 t3 = ((value&0xf00)>>8)+(Apwrdelta);
485 t4 = ((value&0xf000)>>12)+(Apwrdelta);
491 if ((value&0xf) > Apwrdelta)
492 t1 = (value&0xf)-(Apwrdelta);
495 if (((value&0xf0)>>4) > Apwrdelta)
496 t2 = ((value&0xf0)>>4)-(Apwrdelta);
499 if (((value&0xf00)>>8) > Apwrdelta)
500 t3 = ((value&0xf00)>>8)-(Apwrdelta);
503 if (((value&0xf000)>>12) > Apwrdelta)
504 t4 = ((value&0xf000)>>12)-(Apwrdelta);
508 Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
509 if (bGpwrdeltaMinus == FALSE)
511 t1 = (value&0xf)+(Gpwrdelta);
514 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
517 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
520 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
526 if ((value&0xf) > Gpwrdelta)
527 t1 = (value&0xf)-(Gpwrdelta);
530 if (((value&0xf0)>>4) > Gpwrdelta)
531 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
534 if (((value&0xf00)>>8) > Gpwrdelta)
535 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
538 if (((value&0xf000)>>12) > Gpwrdelta)
539 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
543 Gdata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
546 pAd->Tx20MPwrCfgABand[i] = pAd->Tx40MPwrCfgABand[i] = Adata;
547 pAd->Tx20MPwrCfgGBand[i] = pAd->Tx40MPwrCfgGBand[i] = Gdata;
549 if (data != 0xffffffff)
550 RTMP_IO_WRITE32(pAd, TX_PWR_CFG_0 + i*4, data);
551 DBGPRINT_RAW(RT_DEBUG_TRACE, ("20MHz BW, 2.4G band-%lx, Adata = %lx, Gdata = %lx \n", data, Adata, Gdata));
555 // Check this block is valid for 40MHz in 2.4G. If invalid, use parameter for 20MHz in 2.4G
560 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + 2 + i*2, value);
561 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
569 // Get Txpower per MCS for 40MHz in 2.4G.
575 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + i*4, value);
576 if (bGpwrdeltaMinus == FALSE)
578 t1 = (value&0xf)+(Gpwrdelta);
581 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
584 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
587 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
593 if ((value&0xf) > Gpwrdelta)
594 t1 = (value&0xf)-(Gpwrdelta);
597 if (((value&0xf0)>>4) > Gpwrdelta)
598 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
601 if (((value&0xf00)>>8) > Gpwrdelta)
602 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
605 if (((value&0xf000)>>12) > Gpwrdelta)
606 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
610 Gdata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
612 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + i*4 + 2, value);
613 if (bGpwrdeltaMinus == FALSE)
615 t1 = (value&0xf)+(Gpwrdelta);
618 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
621 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
624 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
630 if ((value&0xf) > Gpwrdelta)
631 t1 = (value&0xf)-(Gpwrdelta);
634 if (((value&0xf0)>>4) > Gpwrdelta)
635 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
638 if (((value&0xf00)>>8) > Gpwrdelta)
639 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
642 if (((value&0xf000)>>12) > Gpwrdelta)
643 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
647 Gdata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
650 pAd->Tx40MPwrCfgGBand[i+1] = (pAd->Tx40MPwrCfgGBand[i+1] & 0x0000FFFF) | (Gdata & 0xFFFF0000);
652 pAd->Tx40MPwrCfgGBand[i+1] = Gdata;
654 DBGPRINT_RAW(RT_DEBUG_TRACE, ("40MHz BW, 2.4G band, Gdata = %lx \n", Gdata));
659 // Check this block is valid for 20MHz in 5G. If invalid, use parameter for 20MHz in 2.4G
664 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + 2 + i*2, value);
665 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
673 // Get Txpower per MCS for 20MHz in 5G.
679 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + i*4, value);
680 if (bApwrdeltaMinus == FALSE)
682 t1 = (value&0xf)+(Apwrdelta);
685 t2 = ((value&0xf0)>>4)+(Apwrdelta);
688 t3 = ((value&0xf00)>>8)+(Apwrdelta);
691 t4 = ((value&0xf000)>>12)+(Apwrdelta);
697 if ((value&0xf) > Apwrdelta)
698 t1 = (value&0xf)-(Apwrdelta);
701 if (((value&0xf0)>>4) > Apwrdelta)
702 t2 = ((value&0xf0)>>4)-(Apwrdelta);
705 if (((value&0xf00)>>8) > Apwrdelta)
706 t3 = ((value&0xf00)>>8)-(Apwrdelta);
709 if (((value&0xf000)>>12) > Apwrdelta)
710 t4 = ((value&0xf000)>>12)-(Apwrdelta);
714 Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
716 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + i*4 + 2, value);
717 if (bApwrdeltaMinus == FALSE)
719 t1 = (value&0xf)+(Apwrdelta);
722 t2 = ((value&0xf0)>>4)+(Apwrdelta);
725 t3 = ((value&0xf00)>>8)+(Apwrdelta);
728 t4 = ((value&0xf000)>>12)+(Apwrdelta);
734 if ((value&0xf) > Apwrdelta)
735 t1 = (value&0xf)-(Apwrdelta);
738 if (((value&0xf0)>>4) > Apwrdelta)
739 t2 = ((value&0xf0)>>4)-(Apwrdelta);
742 if (((value&0xf00)>>8) > Apwrdelta)
743 t3 = ((value&0xf00)>>8)-(Apwrdelta);
746 if (((value&0xf000)>>12) > Apwrdelta)
747 t4 = ((value&0xf000)>>12)-(Apwrdelta);
751 Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
754 pAd->Tx20MPwrCfgABand[i] = (pAd->Tx20MPwrCfgABand[i] & 0x0000FFFF) | (Adata & 0xFFFF0000);
756 pAd->Tx20MPwrCfgABand[i] = Adata;
758 DBGPRINT_RAW(RT_DEBUG_TRACE, ("20MHz BW, 5GHz band, Adata = %lx \n", Adata));
763 // Check this block is valid for 40MHz in 5G. If invalid, use parameter for 20MHz in 2.4G
768 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + 2 + i*2, value);
769 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
777 // Get Txpower per MCS for 40MHz in 5G.
783 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + i*4, value);
784 if (bApwrdeltaMinus == FALSE)
786 t1 = (value&0xf)+(Apwrdelta);
789 t2 = ((value&0xf0)>>4)+(Apwrdelta);
792 t3 = ((value&0xf00)>>8)+(Apwrdelta);
795 t4 = ((value&0xf000)>>12)+(Apwrdelta);
801 if ((value&0xf) > Apwrdelta)
802 t1 = (value&0xf)-(Apwrdelta);
805 if (((value&0xf0)>>4) > Apwrdelta)
806 t2 = ((value&0xf0)>>4)-(Apwrdelta);
809 if (((value&0xf00)>>8) > Apwrdelta)
810 t3 = ((value&0xf00)>>8)-(Apwrdelta);
813 if (((value&0xf000)>>12) > Apwrdelta)
814 t4 = ((value&0xf000)>>12)-(Apwrdelta);
818 Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
820 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + i*4 + 2, value);
821 if (bApwrdeltaMinus == FALSE)
823 t1 = (value&0xf)+(Apwrdelta);
826 t2 = ((value&0xf0)>>4)+(Apwrdelta);
829 t3 = ((value&0xf00)>>8)+(Apwrdelta);
832 t4 = ((value&0xf000)>>12)+(Apwrdelta);
838 if ((value&0xf) > Apwrdelta)
839 t1 = (value&0xf)-(Apwrdelta);
842 if (((value&0xf0)>>4) > Apwrdelta)
843 t2 = ((value&0xf0)>>4)-(Apwrdelta);
846 if (((value&0xf00)>>8) > Apwrdelta)
847 t3 = ((value&0xf00)>>8)-(Apwrdelta);
850 if (((value&0xf000)>>12) > Apwrdelta)
851 t4 = ((value&0xf000)>>12)-(Apwrdelta);
855 Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
858 pAd->Tx40MPwrCfgABand[i+1] = (pAd->Tx40MPwrCfgABand[i+1] & 0x0000FFFF) | (Adata & 0xFFFF0000);
860 pAd->Tx40MPwrCfgABand[i+1] = Adata;
862 DBGPRINT_RAW(RT_DEBUG_TRACE, ("40MHz BW, 5GHz band, Adata = %lx \n", Adata));
869 ========================================================================
872 Read initial channel power parameters from EEPROM
875 Adapter Pointer to our adapter
884 ========================================================================
886 VOID RTMPReadChannelPwr(
887 IN PRTMP_ADAPTER pAd)
890 EEPROM_TX_PWR_STRUC Power;
891 EEPROM_TX_PWR_STRUC Power2;
893 // Read Tx power value for all channels
894 // Value from 1 - 0x7f. Default value is 24.
895 // Power value : 2.4G 0x00 (0) ~ 0x1F (31)
896 // : 5.5G 0xF9 (-7) ~ 0x0F (15)
898 // 0. 11b/g, ch1 - ch 14
899 for (i = 0; i < 7; i++)
901 // Power.word = RTMP_EEPROM_READ16(pAd, EEPROM_G_TX_PWR_OFFSET + i * 2);
902 // Power2.word = RTMP_EEPROM_READ16(pAd, EEPROM_G_TX2_PWR_OFFSET + i * 2);
903 RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX_PWR_OFFSET + i * 2, Power.word);
904 RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX2_PWR_OFFSET + i * 2, Power2.word);
905 pAd->TxPower[i * 2].Channel = i * 2 + 1;
906 pAd->TxPower[i * 2 + 1].Channel = i * 2 + 2;
908 if ((Power.field.Byte0 > 31) || (Power.field.Byte0 < 0))
909 pAd->TxPower[i * 2].Power = DEFAULT_RF_TX_POWER;
911 pAd->TxPower[i * 2].Power = Power.field.Byte0;
913 if ((Power.field.Byte1 > 31) || (Power.field.Byte1 < 0))
914 pAd->TxPower[i * 2 + 1].Power = DEFAULT_RF_TX_POWER;
916 pAd->TxPower[i * 2 + 1].Power = Power.field.Byte1;
918 if ((Power2.field.Byte0 > 31) || (Power2.field.Byte0 < 0))
919 pAd->TxPower[i * 2].Power2 = DEFAULT_RF_TX_POWER;
921 pAd->TxPower[i * 2].Power2 = Power2.field.Byte0;
923 if ((Power2.field.Byte1 > 31) || (Power2.field.Byte1 < 0))
924 pAd->TxPower[i * 2 + 1].Power2 = DEFAULT_RF_TX_POWER;
926 pAd->TxPower[i * 2 + 1].Power2 = Power2.field.Byte1;
929 // 1. U-NII lower/middle band: 36, 38, 40; 44, 46, 48; 52, 54, 56; 60, 62, 64 (including central frequency in BW 40MHz)
930 // 1.1 Fill up channel
932 for (i = 0; i < 4; i++)
934 pAd->TxPower[3 * i + choffset + 0].Channel = 36 + i * 8 + 0;
935 pAd->TxPower[3 * i + choffset + 0].Power = DEFAULT_RF_TX_POWER;
936 pAd->TxPower[3 * i + choffset + 0].Power2 = DEFAULT_RF_TX_POWER;
938 pAd->TxPower[3 * i + choffset + 1].Channel = 36 + i * 8 + 2;
939 pAd->TxPower[3 * i + choffset + 1].Power = DEFAULT_RF_TX_POWER;
940 pAd->TxPower[3 * i + choffset + 1].Power2 = DEFAULT_RF_TX_POWER;
942 pAd->TxPower[3 * i + choffset + 2].Channel = 36 + i * 8 + 4;
943 pAd->TxPower[3 * i + choffset + 2].Power = DEFAULT_RF_TX_POWER;
944 pAd->TxPower[3 * i + choffset + 2].Power2 = DEFAULT_RF_TX_POWER;
948 for (i = 0; i < 6; i++)
950 // Power.word = RTMP_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + i * 2);
951 // Power2.word = RTMP_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + i * 2);
952 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + i * 2, Power.word);
953 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + i * 2, Power2.word);
955 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
956 pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
958 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
959 pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
961 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
962 pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
964 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
965 pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
968 // 2. HipperLAN 2 100, 102 ,104; 108, 110, 112; 116, 118, 120; 124, 126, 128; 132, 134, 136; 140 (including central frequency in BW 40MHz)
969 // 2.1 Fill up channel
971 for (i = 0; i < 5; i++)
973 pAd->TxPower[3 * i + choffset + 0].Channel = 100 + i * 8 + 0;
974 pAd->TxPower[3 * i + choffset + 0].Power = DEFAULT_RF_TX_POWER;
975 pAd->TxPower[3 * i + choffset + 0].Power2 = DEFAULT_RF_TX_POWER;
977 pAd->TxPower[3 * i + choffset + 1].Channel = 100 + i * 8 + 2;
978 pAd->TxPower[3 * i + choffset + 1].Power = DEFAULT_RF_TX_POWER;
979 pAd->TxPower[3 * i + choffset + 1].Power2 = DEFAULT_RF_TX_POWER;
981 pAd->TxPower[3 * i + choffset + 2].Channel = 100 + i * 8 + 4;
982 pAd->TxPower[3 * i + choffset + 2].Power = DEFAULT_RF_TX_POWER;
983 pAd->TxPower[3 * i + choffset + 2].Power2 = DEFAULT_RF_TX_POWER;
985 pAd->TxPower[3 * 5 + choffset + 0].Channel = 140;
986 pAd->TxPower[3 * 5 + choffset + 0].Power = DEFAULT_RF_TX_POWER;
987 pAd->TxPower[3 * 5 + choffset + 0].Power2 = DEFAULT_RF_TX_POWER;
990 for (i = 0; i < 8; i++)
992 // Power.word = RTMP_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2);
993 // Power2.word = RTMP_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2);
994 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2, Power.word);
995 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2, Power2.word);
997 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
998 pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
1000 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
1001 pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
1003 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
1004 pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
1006 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
1007 pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
1010 // 3. U-NII upper band: 149, 151, 153; 157, 159, 161; 165 (including central frequency in BW 40MHz)
1011 // 3.1 Fill up channel
1012 choffset = 14 + 12 + 16;
1013 for (i = 0; i < 2; i++)
1015 pAd->TxPower[3 * i + choffset + 0].Channel = 149 + i * 8 + 0;
1016 pAd->TxPower[3 * i + choffset + 0].Power = DEFAULT_RF_TX_POWER;
1017 pAd->TxPower[3 * i + choffset + 0].Power2 = DEFAULT_RF_TX_POWER;
1019 pAd->TxPower[3 * i + choffset + 1].Channel = 149 + i * 8 + 2;
1020 pAd->TxPower[3 * i + choffset + 1].Power = DEFAULT_RF_TX_POWER;
1021 pAd->TxPower[3 * i + choffset + 1].Power2 = DEFAULT_RF_TX_POWER;
1023 pAd->TxPower[3 * i + choffset + 2].Channel = 149 + i * 8 + 4;
1024 pAd->TxPower[3 * i + choffset + 2].Power = DEFAULT_RF_TX_POWER;
1025 pAd->TxPower[3 * i + choffset + 2].Power2 = DEFAULT_RF_TX_POWER;
1027 pAd->TxPower[3 * 2 + choffset + 0].Channel = 165;
1028 pAd->TxPower[3 * 2 + choffset + 0].Power = DEFAULT_RF_TX_POWER;
1029 pAd->TxPower[3 * 2 + choffset + 0].Power2 = DEFAULT_RF_TX_POWER;
1031 // 3.2 Fill up power
1032 for (i = 0; i < 4; i++)
1034 // Power.word = RTMP_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2);
1035 // Power2.word = RTMP_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2);
1036 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2, Power.word);
1037 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2, Power2.word);
1039 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
1040 pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
1042 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
1043 pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
1045 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
1046 pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
1048 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
1049 pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
1052 // 4. Print and Debug
1053 choffset = 14 + 12 + 16 + 7;
1058 ========================================================================
1060 Routine Description:
1061 Read the following from the registry
1062 1. All the parameters
1066 Adapter Pointer to our adapter
1067 WrapperConfigurationContext For use by NdisOpenConfiguration
1072 NDIS_STATUS_RESOURCES
1074 IRQL = PASSIVE_LEVEL
1078 ========================================================================
1080 NDIS_STATUS NICReadRegParameters(
1081 IN PRTMP_ADAPTER pAd,
1082 IN NDIS_HANDLE WrapperConfigurationContext
1085 NDIS_STATUS Status = NDIS_STATUS_SUCCESS;
1086 DBGPRINT_S(Status, ("<-- NICReadRegParameters, Status=%x\n", Status));
1093 ========================================================================
1095 Routine Description:
1096 For RF filter calibration purpose
1099 pAd Pointer to our adapter
1104 IRQL = PASSIVE_LEVEL
1106 ========================================================================
1108 VOID RTMPFilterCalibration(
1109 IN PRTMP_ADAPTER pAd)
1111 UCHAR R55x = 0, value, FilterTarget = 0x1E, BBPValue=0;
1112 UINT loop = 0, count = 0, loopcnt = 0, ReTry = 0;
1113 UCHAR RF_R24_Value = 0;
1115 // Give bbp filter initial value
1116 pAd->Mlme.CaliBW20RfR24 = 0x1F;
1117 pAd->Mlme.CaliBW40RfR24 = 0x2F; //Bit[5] must be 1 for BW 40
1121 if (loop == 1) //BandWidth = 40 MHz
1123 // Write 0x27 to RF_R24 to program filter
1124 RF_R24_Value = 0x27;
1125 RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
1127 FilterTarget = 0x15;
1129 FilterTarget = 0x19;
1131 // when calibrate BW40, BBP mask must set to BW40.
1132 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BBPValue);
1135 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BBPValue);
1138 RT30xxReadRFRegister(pAd, RF_R31, &value);
1140 RT30xxWriteRFRegister(pAd, RF_R31, value);
1142 else //BandWidth = 20 MHz
1144 // Write 0x07 to RF_R24 to program filter
1145 RF_R24_Value = 0x07;
1146 RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
1148 FilterTarget = 0x13;
1150 FilterTarget = 0x16;
1153 RT30xxReadRFRegister(pAd, RF_R31, &value);
1155 RT30xxWriteRFRegister(pAd, RF_R31, value);
1158 // Write 0x01 to RF_R22 to enable baseband loopback mode
1159 RT30xxReadRFRegister(pAd, RF_R22, &value);
1161 RT30xxWriteRFRegister(pAd, RF_R22, value);
1163 // Write 0x00 to BBP_R24 to set power & frequency of passband test tone
1164 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, 0);
1168 // Write 0x90 to BBP_R25 to transmit test tone
1169 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R25, 0x90);
1171 RTMPusecDelay(1000);
1172 // Read BBP_R55[6:0] for received power, set R55x = BBP_R55[6:0]
1173 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R55, &value);
1174 R55x = value & 0xFF;
1176 } while ((ReTry++ < 100) && (R55x == 0));
1178 // Write 0x06 to BBP_R24 to set power & frequency of stopband test tone
1179 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, 0x06);
1183 // Write 0x90 to BBP_R25 to transmit test tone
1184 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R25, 0x90);
1186 //We need to wait for calibration
1187 RTMPusecDelay(1000);
1188 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R55, &value);
1190 if ((R55x - value) < FilterTarget)
1194 else if ((R55x - value) == FilterTarget)
1204 // prevent infinite loop cause driver hang.
1205 if (loopcnt++ > 100)
1207 DBGPRINT(RT_DEBUG_ERROR, ("RTMPFilterCalibration - can't find a valid value, loopcnt=%d stop calibrating", loopcnt));
1211 // Write RF_R24 to program filter
1212 RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
1217 RF_R24_Value = RF_R24_Value - ((count) ? (1) : (0));
1220 // Store for future usage
1225 //BandWidth = 20 MHz
1226 pAd->Mlme.CaliBW20RfR24 = (UCHAR)RF_R24_Value;
1230 //BandWidth = 40 MHz
1231 pAd->Mlme.CaliBW40RfR24 = (UCHAR)RF_R24_Value;
1238 RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
1245 // Set back to initial state
1247 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, 0);
1249 RT30xxReadRFRegister(pAd, RF_R22, &value);
1251 RT30xxWriteRFRegister(pAd, RF_R22, value);
1253 // set BBP back to BW20
1254 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BBPValue);
1256 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BBPValue);
1258 DBGPRINT(RT_DEBUG_TRACE, ("RTMPFilterCalibration - CaliBW20RfR24=0x%x, CaliBW40RfR24=0x%x\n", pAd->Mlme.CaliBW20RfR24, pAd->Mlme.CaliBW40RfR24));
1264 VOID NICInitRT30xxRFRegisters(IN PRTMP_ADAPTER pAd)
1267 // Driver must read EEPROM to get RfIcType before initial RF registers
1268 // Initialize RF register to default value
1269 if (IS_RT3070(pAd) || IS_RT3071(pAd))
1271 // Init RF calibration
1272 // Driver should toggle RF R30 bit7 before init RF registers
1276 RT30xxReadRFRegister(pAd, RF_R30, (PUCHAR)&RfReg);
1278 RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RfReg);
1279 RTMPusecDelay(1000);
1281 RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RfReg);
1283 // Initialize RF register to default value
1284 for (i = 0; i < NUM_RF_REG_PARMS; i++)
1286 RT30xxWriteRFRegister(pAd, RT30xx_RFRegTable[i].Register, RT30xx_RFRegTable[i].Value);
1292 // Update MAC 0x05D4 from 01xxxxxx to 0Dxxxxxx (voltage 1.2V to 1.35V) for RT3070 to improve yield rate
1293 RTUSBReadMACRegister(pAd, LDO_CFG0, &data);
1294 data = ((data & 0xF0FFFFFF) | 0x0D000000);
1295 RTUSBWriteMACRegister(pAd, LDO_CFG0, data);
1297 else if (IS_RT3071(pAd))
1299 // Driver should set RF R6 bit6 on before init RF registers
1300 RT30xxReadRFRegister(pAd, RF_R06, (PUCHAR)&RfReg);
1302 RT30xxWriteRFRegister(pAd, RF_R06, (UCHAR)RfReg);
1305 RT30xxWriteRFRegister(pAd, RF_R31, 0x14);
1307 // RT3071 version E has fixed this issue
1308 if ((pAd->NicConfig2.field.DACTestBit == 1) && ((pAd->MACVersion & 0xffff) < 0x0211))
1310 // patch tx EVM issue temporarily
1311 RTUSBReadMACRegister(pAd, LDO_CFG0, &data);
1312 data = ((data & 0xE0FFFFFF) | 0x0D000000);
1313 RTUSBWriteMACRegister(pAd, LDO_CFG0, data);
1317 RTMP_IO_READ32(pAd, LDO_CFG0, &data);
1318 data = ((data & 0xE0FFFFFF) | 0x01000000);
1319 RTMP_IO_WRITE32(pAd, LDO_CFG0, data);
1322 // patch LNA_PE_G1 failed issue
1323 RTUSBReadMACRegister(pAd, GPIO_SWITCH, &data);
1325 RTUSBWriteMACRegister(pAd, GPIO_SWITCH, data);
1328 //For RF filter Calibration
1329 RTMPFilterCalibration(pAd);
1331 // Initialize RF R27 register, set RF R27 must be behind RTMPFilterCalibration()
1332 if ((pAd->MACVersion & 0xffff) < 0x0211)
1333 RT30xxWriteRFRegister(pAd, RF_R27, 0x3);
1335 // set led open drain enable
1336 RTUSBReadMACRegister(pAd, OPT_14, &data);
1338 RTUSBWriteMACRegister(pAd, OPT_14, data);
1342 // add by johnli, RF power sequence setup, load RF normal operation-mode setup
1343 RT30xxLoadRFNormalModeSetup(pAd);
1352 ========================================================================
1354 Routine Description:
1355 Read initial parameters from EEPROM
1358 Adapter Pointer to our adapter
1363 IRQL = PASSIVE_LEVEL
1367 ========================================================================
1369 VOID NICReadEEPROMParameters(
1370 IN PRTMP_ADAPTER pAd,
1374 USHORT i, value, value2;
1376 EEPROM_TX_PWR_STRUC Power;
1377 EEPROM_VERSION_STRUC Version;
1378 EEPROM_ANTENNA_STRUC Antenna;
1379 EEPROM_NIC_CONFIG2_STRUC NicConfig2;
1381 DBGPRINT(RT_DEBUG_TRACE, ("--> NICReadEEPROMParameters\n"));
1383 // Init EEPROM Address Number, before access EEPROM; if 93c46, EEPROMAddressNum=6, else if 93c66, EEPROMAddressNum=8
1384 RTMP_IO_READ32(pAd, E2PROM_CSR, &data);
1385 DBGPRINT(RT_DEBUG_TRACE, ("--> E2PROM_CSR = 0x%x\n", data));
1387 if((data & 0x30) == 0)
1388 pAd->EEPROMAddressNum = 6; // 93C46
1389 else if((data & 0x30) == 0x10)
1390 pAd->EEPROMAddressNum = 8; // 93C66
1392 pAd->EEPROMAddressNum = 8; // 93C86
1393 DBGPRINT(RT_DEBUG_TRACE, ("--> EEPROMAddressNum = %d\n", pAd->EEPROMAddressNum ));
1395 // RT2860 MAC no longer auto load MAC address from E2PROM. Driver has to intialize
1396 // MAC address registers according to E2PROM setting
1397 if (mac_addr == NULL ||
1398 strlen(mac_addr) != 17 ||
1399 mac_addr[2] != ':' || mac_addr[5] != ':' || mac_addr[8] != ':' ||
1400 mac_addr[11] != ':' || mac_addr[14] != ':')
1402 USHORT Addr01,Addr23,Addr45 ;
1404 RT28xx_EEPROM_READ16(pAd, 0x04, Addr01);
1405 RT28xx_EEPROM_READ16(pAd, 0x06, Addr23);
1406 RT28xx_EEPROM_READ16(pAd, 0x08, Addr45);
1408 pAd->PermanentAddress[0] = (UCHAR)(Addr01 & 0xff);
1409 pAd->PermanentAddress[1] = (UCHAR)(Addr01 >> 8);
1410 pAd->PermanentAddress[2] = (UCHAR)(Addr23 & 0xff);
1411 pAd->PermanentAddress[3] = (UCHAR)(Addr23 >> 8);
1412 pAd->PermanentAddress[4] = (UCHAR)(Addr45 & 0xff);
1413 pAd->PermanentAddress[5] = (UCHAR)(Addr45 >> 8);
1415 DBGPRINT(RT_DEBUG_TRACE, ("Initialize MAC Address from E2PROM \n"));
1424 for (j=0; j<MAC_ADDR_LEN; j++)
1426 AtoH(macptr, &pAd->PermanentAddress[j], 1);
1430 DBGPRINT(RT_DEBUG_TRACE, ("Initialize MAC Address from module parameter \n"));
1435 //more conveninet to test mbssid, so ap's bssid &0xf1
1436 if (pAd->PermanentAddress[0] == 0xff)
1437 pAd->PermanentAddress[0] = RandomByte(pAd)&0xf8;
1439 //if (pAd->PermanentAddress[5] == 0xff)
1440 // pAd->PermanentAddress[5] = RandomByte(pAd)&0xf8;
1442 DBGPRINT_RAW(RT_DEBUG_TRACE,("E2PROM MAC: =%02x:%02x:%02x:%02x:%02x:%02x\n",
1443 pAd->PermanentAddress[0], pAd->PermanentAddress[1],
1444 pAd->PermanentAddress[2], pAd->PermanentAddress[3],
1445 pAd->PermanentAddress[4], pAd->PermanentAddress[5]));
1446 if (pAd->bLocalAdminMAC == FALSE)
1450 COPY_MAC_ADDR(pAd->CurrentAddress, pAd->PermanentAddress);
1451 csr2.field.Byte0 = pAd->CurrentAddress[0];
1452 csr2.field.Byte1 = pAd->CurrentAddress[1];
1453 csr2.field.Byte2 = pAd->CurrentAddress[2];
1454 csr2.field.Byte3 = pAd->CurrentAddress[3];
1455 RTMP_IO_WRITE32(pAd, MAC_ADDR_DW0, csr2.word);
1457 csr3.field.Byte4 = pAd->CurrentAddress[4];
1458 csr3.field.Byte5 = pAd->CurrentAddress[5];
1459 csr3.field.U2MeMask = 0xff;
1460 RTMP_IO_WRITE32(pAd, MAC_ADDR_DW1, csr3.word);
1461 DBGPRINT_RAW(RT_DEBUG_TRACE,("E2PROM MAC: =%02x:%02x:%02x:%02x:%02x:%02x\n",
1462 pAd->PermanentAddress[0], pAd->PermanentAddress[1],
1463 pAd->PermanentAddress[2], pAd->PermanentAddress[3],
1464 pAd->PermanentAddress[4], pAd->PermanentAddress[5]));
1468 // if not return early. cause fail at emulation.
1469 // Init the channel number for TX channel power
1470 RTMPReadChannelPwr(pAd);
1472 // if E2PROM version mismatch with driver's expectation, then skip
1473 // all subsequent E2RPOM retieval and set a system error bit to notify GUI
1474 RT28xx_EEPROM_READ16(pAd, EEPROM_VERSION_OFFSET, Version.word);
1475 pAd->EepromVersion = Version.field.Version + Version.field.FaeReleaseNumber * 256;
1476 DBGPRINT(RT_DEBUG_TRACE, ("E2PROM: Version = %d, FAE release #%d\n", Version.field.Version, Version.field.FaeReleaseNumber));
1478 if (Version.field.Version > VALID_EEPROM_VERSION)
1480 DBGPRINT_ERR(("E2PROM: WRONG VERSION 0x%x, should be %d\n",Version.field.Version, VALID_EEPROM_VERSION));
1481 /*pAd->SystemErrorBitmap |= 0x00000001;
1483 // hard-code default value when no proper E2PROM installed
1484 pAd->bAutoTxAgcA = FALSE;
1485 pAd->bAutoTxAgcG = FALSE;
1487 // Default the channel power
1488 for (i = 0; i < MAX_NUM_OF_CHANNELS; i++)
1489 pAd->TxPower[i].Power = DEFAULT_RF_TX_POWER;
1491 // Default the channel power
1492 for (i = 0; i < MAX_NUM_OF_11JCHANNELS; i++)
1493 pAd->TxPower11J[i].Power = DEFAULT_RF_TX_POWER;
1495 for(i = 0; i < NUM_EEPROM_BBP_PARMS; i++)
1496 pAd->EEPROMDefaultValue[i] = 0xffff;
1500 // Read BBP default value from EEPROM and store to array(EEPROMDefaultValue) in pAd
1501 RT28xx_EEPROM_READ16(pAd, EEPROM_NIC1_OFFSET, value);
1502 pAd->EEPROMDefaultValue[0] = value;
1504 RT28xx_EEPROM_READ16(pAd, EEPROM_NIC2_OFFSET, value);
1505 pAd->EEPROMDefaultValue[1] = value;
1507 RT28xx_EEPROM_READ16(pAd, 0x38, value); // Country Region
1508 pAd->EEPROMDefaultValue[2] = value;
1510 for(i = 0; i < 8; i++)
1512 RT28xx_EEPROM_READ16(pAd, EEPROM_BBP_BASE_OFFSET + i*2, value);
1513 pAd->EEPROMDefaultValue[i+3] = value;
1516 // We have to parse NIC configuration 0 at here.
1517 // If TSSI did not have preloaded value, it should reset the TxAutoAgc to false
1518 // Therefore, we have to read TxAutoAgc control beforehand.
1519 // Read Tx AGC control bit
1520 Antenna.word = pAd->EEPROMDefaultValue[0];
1521 if (Antenna.word == 0xFFFF)
1527 Antenna.field.RfIcType = RFIC_3020;
1528 Antenna.field.TxPath = 1;
1529 Antenna.field.RxPath = 1;
1535 Antenna.field.RfIcType = RFIC_2820;
1536 Antenna.field.TxPath = 1;
1537 Antenna.field.RxPath = 2;
1538 DBGPRINT(RT_DEBUG_WARN, ("E2PROM error, hard code as 0x%04x\n", Antenna.word));
1544 // Choose the desired Tx&Rx stream.
1545 if ((pAd->CommonCfg.TxStream == 0) || (pAd->CommonCfg.TxStream > Antenna.field.TxPath))
1546 pAd->CommonCfg.TxStream = Antenna.field.TxPath;
1548 if ((pAd->CommonCfg.RxStream == 0) || (pAd->CommonCfg.RxStream > Antenna.field.RxPath))
1550 pAd->CommonCfg.RxStream = Antenna.field.RxPath;
1552 if ((pAd->MACVersion < RALINK_2883_VERSION) &&
1553 (pAd->CommonCfg.RxStream > 2))
1555 // only 2 Rx streams for RT2860 series
1556 pAd->CommonCfg.RxStream = 2;
1561 // read value from EEPROM and set them to CSR174 ~ 177 in chain0 ~ chain2
1567 NicConfig2.word = pAd->EEPROMDefaultValue[1];
1571 #ifdef CONFIG_STA_SUPPORT
1572 IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1574 if ((NicConfig2.word & 0x00ff) == 0xff)
1576 NicConfig2.word &= 0xff00;
1579 if ((NicConfig2.word >> 8) == 0xff)
1581 NicConfig2.word &= 0x00ff;
1584 #endif // CONFIG_STA_SUPPORT //
1586 if (NicConfig2.field.DynamicTxAgcControl == 1)
1587 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
1589 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
1591 DBGPRINT_RAW(RT_DEBUG_TRACE, ("NICReadEEPROMParameters: RxPath = %d, TxPath = %d\n", Antenna.field.RxPath, Antenna.field.TxPath));
1593 // Save the antenna for future use
1594 pAd->Antenna.word = Antenna.word;
1597 // Reset PhyMode if we don't support 802.11a
1598 // Only RFIC_2850 & RFIC_2750 support 802.11a
1600 if ((Antenna.field.RfIcType != RFIC_2850) && (Antenna.field.RfIcType != RFIC_2750))
1602 if ((pAd->CommonCfg.PhyMode == PHY_11ABG_MIXED) ||
1603 (pAd->CommonCfg.PhyMode == PHY_11A))
1604 pAd->CommonCfg.PhyMode = PHY_11BG_MIXED;
1605 #ifdef DOT11_N_SUPPORT
1606 else if ((pAd->CommonCfg.PhyMode == PHY_11ABGN_MIXED) ||
1607 (pAd->CommonCfg.PhyMode == PHY_11AN_MIXED) ||
1608 (pAd->CommonCfg.PhyMode == PHY_11AGN_MIXED) ||
1609 (pAd->CommonCfg.PhyMode == PHY_11N_5G))
1610 pAd->CommonCfg.PhyMode = PHY_11BGN_MIXED;
1611 #endif // DOT11_N_SUPPORT //
1614 // Read TSSI reference and TSSI boundary for temperature compensation. This is ugly
1617 /* these are tempature reference value (0x00 ~ 0xFE)
1618 ex: 0x00 0x15 0x25 0x45 0x88 0xA0 0xB5 0xD0 0xF0
1619 TssiPlusBoundaryG [4] [3] [2] [1] [0] (smaller) +
1620 TssiMinusBoundaryG[0] [1] [2] [3] [4] (larger) */
1621 RT28xx_EEPROM_READ16(pAd, 0x6E, Power.word);
1622 pAd->TssiMinusBoundaryG[4] = Power.field.Byte0;
1623 pAd->TssiMinusBoundaryG[3] = Power.field.Byte1;
1624 RT28xx_EEPROM_READ16(pAd, 0x70, Power.word);
1625 pAd->TssiMinusBoundaryG[2] = Power.field.Byte0;
1626 pAd->TssiMinusBoundaryG[1] = Power.field.Byte1;
1627 RT28xx_EEPROM_READ16(pAd, 0x72, Power.word);
1628 pAd->TssiRefG = Power.field.Byte0; /* reference value [0] */
1629 pAd->TssiPlusBoundaryG[1] = Power.field.Byte1;
1630 RT28xx_EEPROM_READ16(pAd, 0x74, Power.word);
1631 pAd->TssiPlusBoundaryG[2] = Power.field.Byte0;
1632 pAd->TssiPlusBoundaryG[3] = Power.field.Byte1;
1633 RT28xx_EEPROM_READ16(pAd, 0x76, Power.word);
1634 pAd->TssiPlusBoundaryG[4] = Power.field.Byte0;
1635 pAd->TxAgcStepG = Power.field.Byte1;
1636 pAd->TxAgcCompensateG = 0;
1637 pAd->TssiMinusBoundaryG[0] = pAd->TssiRefG;
1638 pAd->TssiPlusBoundaryG[0] = pAd->TssiRefG;
1640 // Disable TxAgc if the based value is not right
1641 if (pAd->TssiRefG == 0xff)
1642 pAd->bAutoTxAgcG = FALSE;
1644 DBGPRINT(RT_DEBUG_TRACE,("E2PROM: G Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
1645 pAd->TssiMinusBoundaryG[4], pAd->TssiMinusBoundaryG[3], pAd->TssiMinusBoundaryG[2], pAd->TssiMinusBoundaryG[1],
1647 pAd->TssiPlusBoundaryG[1], pAd->TssiPlusBoundaryG[2], pAd->TssiPlusBoundaryG[3], pAd->TssiPlusBoundaryG[4],
1648 pAd->TxAgcStepG, pAd->bAutoTxAgcG));
1652 RT28xx_EEPROM_READ16(pAd, 0xD4, Power.word);
1653 pAd->TssiMinusBoundaryA[4] = Power.field.Byte0;
1654 pAd->TssiMinusBoundaryA[3] = Power.field.Byte1;
1655 RT28xx_EEPROM_READ16(pAd, 0xD6, Power.word);
1656 pAd->TssiMinusBoundaryA[2] = Power.field.Byte0;
1657 pAd->TssiMinusBoundaryA[1] = Power.field.Byte1;
1658 RT28xx_EEPROM_READ16(pAd, 0xD8, Power.word);
1659 pAd->TssiRefA = Power.field.Byte0;
1660 pAd->TssiPlusBoundaryA[1] = Power.field.Byte1;
1661 RT28xx_EEPROM_READ16(pAd, 0xDA, Power.word);
1662 pAd->TssiPlusBoundaryA[2] = Power.field.Byte0;
1663 pAd->TssiPlusBoundaryA[3] = Power.field.Byte1;
1664 RT28xx_EEPROM_READ16(pAd, 0xDC, Power.word);
1665 pAd->TssiPlusBoundaryA[4] = Power.field.Byte0;
1666 pAd->TxAgcStepA = Power.field.Byte1;
1667 pAd->TxAgcCompensateA = 0;
1668 pAd->TssiMinusBoundaryA[0] = pAd->TssiRefA;
1669 pAd->TssiPlusBoundaryA[0] = pAd->TssiRefA;
1671 // Disable TxAgc if the based value is not right
1672 if (pAd->TssiRefA == 0xff)
1673 pAd->bAutoTxAgcA = FALSE;
1675 DBGPRINT(RT_DEBUG_TRACE,("E2PROM: A Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
1676 pAd->TssiMinusBoundaryA[4], pAd->TssiMinusBoundaryA[3], pAd->TssiMinusBoundaryA[2], pAd->TssiMinusBoundaryA[1],
1678 pAd->TssiPlusBoundaryA[1], pAd->TssiPlusBoundaryA[2], pAd->TssiPlusBoundaryA[3], pAd->TssiPlusBoundaryA[4],
1679 pAd->TxAgcStepA, pAd->bAutoTxAgcA));
1681 pAd->BbpRssiToDbmDelta = 0x0;
1683 // Read frequency offset setting for RF
1684 RT28xx_EEPROM_READ16(pAd, EEPROM_FREQ_OFFSET, value);
1685 if ((value & 0x00FF) != 0x00FF)
1686 pAd->RfFreqOffset = (ULONG) (value & 0x00FF);
1688 pAd->RfFreqOffset = 0;
1689 DBGPRINT(RT_DEBUG_TRACE, ("E2PROM: RF FreqOffset=0x%lx \n", pAd->RfFreqOffset));
1691 //CountryRegion byte offset (38h)
1692 value = pAd->EEPROMDefaultValue[2] >> 8; // 2.4G band
1693 value2 = pAd->EEPROMDefaultValue[2] & 0x00FF; // 5G band
1695 if ((value <= REGION_MAXIMUM_BG_BAND) && (value2 <= REGION_MAXIMUM_A_BAND))
1697 pAd->CommonCfg.CountryRegion = ((UCHAR) value) | 0x80;
1698 pAd->CommonCfg.CountryRegionForABand = ((UCHAR) value2) | 0x80;
1699 TmpPhy = pAd->CommonCfg.PhyMode;
1700 pAd->CommonCfg.PhyMode = 0xff;
1701 RTMPSetPhyMode(pAd, TmpPhy);
1702 #ifdef DOT11_N_SUPPORT
1704 #endif // DOT11_N_SUPPORT //
1708 // Get RSSI Offset on EEPROM 0x9Ah & 0x9Ch.
1709 // The valid value are (-10 ~ 10)
1711 RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET, value);
1712 pAd->BGRssiOffset0 = value & 0x00ff;
1713 pAd->BGRssiOffset1 = (value >> 8);
1714 RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET+2, value);
1715 pAd->BGRssiOffset2 = value & 0x00ff;
1716 pAd->ALNAGain1 = (value >> 8);
1717 RT28xx_EEPROM_READ16(pAd, EEPROM_LNA_OFFSET, value);
1718 pAd->BLNAGain = value & 0x00ff;
1719 pAd->ALNAGain0 = (value >> 8);
1721 // Validate 11b/g RSSI_0 offset.
1722 if ((pAd->BGRssiOffset0 < -10) || (pAd->BGRssiOffset0 > 10))
1723 pAd->BGRssiOffset0 = 0;
1725 // Validate 11b/g RSSI_1 offset.
1726 if ((pAd->BGRssiOffset1 < -10) || (pAd->BGRssiOffset1 > 10))
1727 pAd->BGRssiOffset1 = 0;
1729 // Validate 11b/g RSSI_2 offset.
1730 if ((pAd->BGRssiOffset2 < -10) || (pAd->BGRssiOffset2 > 10))
1731 pAd->BGRssiOffset2 = 0;
1733 RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_A_OFFSET, value);
1734 pAd->ARssiOffset0 = value & 0x00ff;
1735 pAd->ARssiOffset1 = (value >> 8);
1736 RT28xx_EEPROM_READ16(pAd, (EEPROM_RSSI_A_OFFSET+2), value);
1737 pAd->ARssiOffset2 = value & 0x00ff;
1738 pAd->ALNAGain2 = (value >> 8);
1740 if (((UCHAR)pAd->ALNAGain1 == 0xFF) || (pAd->ALNAGain1 == 0x00))
1741 pAd->ALNAGain1 = pAd->ALNAGain0;
1742 if (((UCHAR)pAd->ALNAGain2 == 0xFF) || (pAd->ALNAGain2 == 0x00))
1743 pAd->ALNAGain2 = pAd->ALNAGain0;
1745 // Validate 11a RSSI_0 offset.
1746 if ((pAd->ARssiOffset0 < -10) || (pAd->ARssiOffset0 > 10))
1747 pAd->ARssiOffset0 = 0;
1749 // Validate 11a RSSI_1 offset.
1750 if ((pAd->ARssiOffset1 < -10) || (pAd->ARssiOffset1 > 10))
1751 pAd->ARssiOffset1 = 0;
1753 //Validate 11a RSSI_2 offset.
1754 if ((pAd->ARssiOffset2 < -10) || (pAd->ARssiOffset2 > 10))
1755 pAd->ARssiOffset2 = 0;
1760 RT28xx_EEPROM_READ16(pAd, 0x3a, value);
1761 pAd->LedCntl.word = (value&0xff00) >> 8;
1762 RT28xx_EEPROM_READ16(pAd, EEPROM_LED1_OFFSET, value);
1764 RT28xx_EEPROM_READ16(pAd, EEPROM_LED2_OFFSET, value);
1766 RT28xx_EEPROM_READ16(pAd, EEPROM_LED3_OFFSET, value);
1769 RTMPReadTxPwrPerRate(pAd);
1772 //pAd->CommonCfg.DefineMaxTxPwr = RTMP_EEPROM_READ16(pAd, EEPROM_DEFINE_MAX_TXPWR);
1773 RT28xx_EEPROM_READ16(pAd, EEPROM_DEFINE_MAX_TXPWR, pAd->CommonCfg.DefineMaxTxPwr);
1774 #endif // SINGLE_SKU //
1778 eFusePhysicalReadRegisters(pAd, EFUSE_TAG, 2, &value);
1779 pAd->EFuseTag = (value & 0xff);
1783 DBGPRINT(RT_DEBUG_TRACE, ("<-- NICReadEEPROMParameters\n"));
1787 ========================================================================
1789 Routine Description:
1790 Set default value from EEPROM
1793 Adapter Pointer to our adapter
1798 IRQL = PASSIVE_LEVEL
1802 ========================================================================
1804 VOID NICInitAsicFromEEPROM(
1805 IN PRTMP_ADAPTER pAd)
1807 #ifdef CONFIG_STA_SUPPORT
1810 #endif // CONFIG_STA_SUPPORT //
1812 EEPROM_ANTENNA_STRUC Antenna;
1813 EEPROM_NIC_CONFIG2_STRUC NicConfig2;
1816 DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitAsicFromEEPROM\n"));
1817 for(i = 3; i < NUM_EEPROM_BBP_PARMS; i++)
1819 UCHAR BbpRegIdx, BbpValue;
1821 if ((pAd->EEPROMDefaultValue[i] != 0xFFFF) && (pAd->EEPROMDefaultValue[i] != 0))
1823 BbpRegIdx = (UCHAR)(pAd->EEPROMDefaultValue[i] >> 8);
1824 BbpValue = (UCHAR)(pAd->EEPROMDefaultValue[i] & 0xff);
1825 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BbpRegIdx, BbpValue);
1829 Antenna.word = pAd->EEPROMDefaultValue[0];
1830 if (Antenna.word == 0xFFFF)
1832 DBGPRINT(RT_DEBUG_ERROR, ("E2PROM error, hard code as 0x%04x\n", Antenna.word));
1833 BUG_ON(Antenna.word == 0xFFFF);
1835 pAd->Mlme.RealRxPath = (UCHAR) Antenna.field.RxPath;
1836 pAd->RfIcType = (UCHAR) Antenna.field.RfIcType;
1838 DBGPRINT(RT_DEBUG_WARN, ("pAd->RfIcType = %d, RealRxPath=%d, TxPath = %d\n", pAd->RfIcType, pAd->Mlme.RealRxPath,Antenna.field.TxPath));
1840 // Save the antenna for future use
1841 pAd->Antenna.word = Antenna.word;
1843 NicConfig2.word = pAd->EEPROMDefaultValue[1];
1846 #ifdef CONFIG_STA_SUPPORT
1847 IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1849 if ((NicConfig2.word & 0x00ff) == 0xff)
1851 NicConfig2.word &= 0xff00;
1854 if ((NicConfig2.word >> 8) == 0xff)
1856 NicConfig2.word &= 0x00ff;
1859 #endif // CONFIG_STA_SUPPORT //
1861 // Save the antenna for future use
1862 pAd->NicConfig2.word = NicConfig2.word;
1864 // set default antenna as main
1865 if (pAd->RfIcType == RFIC_3020)
1866 AsicSetRxAnt(pAd, pAd->RxAnt.Pair1PrimaryRxAnt);
1869 // Send LED Setting to MCU.
1871 if (pAd->LedCntl.word == 0xFF)
1873 pAd->LedCntl.word = 0x01;
1882 AsicSendCommandToMcu(pAd, 0x52, 0xff, (UCHAR)pAd->Led1, (UCHAR)(pAd->Led1 >> 8));
1883 AsicSendCommandToMcu(pAd, 0x53, 0xff, (UCHAR)pAd->Led2, (UCHAR)(pAd->Led2 >> 8));
1884 AsicSendCommandToMcu(pAd, 0x54, 0xff, (UCHAR)pAd->Led3, (UCHAR)(pAd->Led3 >> 8));
1885 pAd->LedIndicatorStregth = 0xFF;
1886 RTMPSetSignalLED(pAd, -100); // Force signal strength Led to be turned off, before link up
1888 #ifdef CONFIG_STA_SUPPORT
1889 IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1891 // Read Hardware controlled Radio state enable bit
1892 if (NicConfig2.field.HardwareRadioControl == 1)
1894 pAd->StaCfg.bHardwareRadio = TRUE;
1896 // Read GPIO pin2 as Hardware controlled radio state
1897 RTMP_IO_READ32(pAd, GPIO_CTRL_CFG, &data);
1898 if ((data & 0x04) == 0)
1900 pAd->StaCfg.bHwRadio = FALSE;
1901 pAd->StaCfg.bRadio = FALSE;
1902 // RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x00001818);
1903 RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
1907 pAd->StaCfg.bHardwareRadio = FALSE;
1909 if (pAd->StaCfg.bRadio == FALSE)
1911 RTMPSetLED(pAd, LED_RADIO_OFF);
1915 RTMPSetLED(pAd, LED_RADIO_ON);
1918 #endif // CONFIG_STA_SUPPORT //
1920 // Turn off patching for cardbus controller
1921 if (NicConfig2.field.CardbusAcceleration == 1)
1923 // pAd->bTest1 = TRUE;
1926 if (NicConfig2.field.DynamicTxAgcControl == 1)
1927 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
1929 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
1931 // Since BBP has been progamed, to make sure BBP setting will be
1932 // upate inside of AsicAntennaSelect, so reset to UNKNOWN_BAND!!
1934 pAd->CommonCfg.BandState = UNKNOWN_BAND;
1936 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BBPR3);
1938 if(pAd->Antenna.field.RxPath == 3)
1942 else if(pAd->Antenna.field.RxPath == 2)
1946 else if(pAd->Antenna.field.RxPath == 1)
1950 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BBPR3);
1952 #ifdef CONFIG_STA_SUPPORT
1953 IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1955 // Handle the difference when 1T
1956 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R1, &BBPR1);
1957 if(pAd->Antenna.field.TxPath == 1)
1961 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R1, BBPR1);
1963 DBGPRINT(RT_DEBUG_TRACE, ("Use Hw Radio Control Pin=%d; if used Pin=%d;\n", pAd->CommonCfg.bHardwareRadio, pAd->CommonCfg.bHardwareRadio));
1965 #endif // CONFIG_STA_SUPPORT //
1966 DBGPRINT(RT_DEBUG_TRACE, ("TxPath = %d, RxPath = %d, RFIC=%d, Polar+LED mode=%x\n", pAd->Antenna.field.TxPath, pAd->Antenna.field.RxPath, pAd->RfIcType, pAd->LedCntl.word));
1967 DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitAsicFromEEPROM\n"));
1971 ========================================================================
1973 Routine Description:
1974 Initialize NIC hardware
1977 Adapter Pointer to our adapter
1982 IRQL = PASSIVE_LEVEL
1986 ========================================================================
1988 NDIS_STATUS NICInitializeAdapter(
1989 IN PRTMP_ADAPTER pAd,
1990 IN BOOLEAN bHardReset)
1992 NDIS_STATUS Status = NDIS_STATUS_SUCCESS;
1993 WPDMA_GLO_CFG_STRUC GloCfg;
1994 // INT_MASK_CSR_STRUC IntMask;
1996 AC_TXOP_CSR0_STRUC csr0;
1998 DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAdapter\n"));
2000 // 3. Set DMA global configuration except TX_DMA_EN and RX_DMA_EN bits:
2005 RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word);
2006 if ((GloCfg.field.TxDMABusy == 0) && (GloCfg.field.RxDMABusy == 0))
2009 RTMPusecDelay(1000);
2012 DBGPRINT(RT_DEBUG_TRACE, ("<== DMA offset 0x208 = 0x%x\n", GloCfg.word));
2013 GloCfg.word &= 0xff0;
2014 GloCfg.field.EnTXWriteBackDDONE =1;
2015 RTMP_IO_WRITE32(pAd, WPDMA_GLO_CFG, GloCfg.word);
2017 // Record HW Beacon offset
2018 pAd->BeaconOffset[0] = HW_BEACON_BASE0;
2019 pAd->BeaconOffset[1] = HW_BEACON_BASE1;
2020 pAd->BeaconOffset[2] = HW_BEACON_BASE2;
2021 pAd->BeaconOffset[3] = HW_BEACON_BASE3;
2022 pAd->BeaconOffset[4] = HW_BEACON_BASE4;
2023 pAd->BeaconOffset[5] = HW_BEACON_BASE5;
2024 pAd->BeaconOffset[6] = HW_BEACON_BASE6;
2025 pAd->BeaconOffset[7] = HW_BEACON_BASE7;
2028 // write all shared Ring's base address into ASIC
2031 // asic simulation sequence put this ahead before loading firmware.
2032 // pbf hardware reset
2034 // Initialze ASIC for TX & Rx operation
2035 if (NICInitializeAsic(pAd , bHardReset) != NDIS_STATUS_SUCCESS)
2039 NICLoadFirmware(pAd);
2042 return NDIS_STATUS_FAILURE;
2050 RTMP_IO_WRITE32(pAd, WMM_TXOP0_CFG, csr0.word);
2051 if (pAd->CommonCfg.PhyMode == PHY_11B)
2053 csr0.field.Ac0Txop = 192; // AC_VI: 192*32us ~= 6ms
2054 csr0.field.Ac1Txop = 96; // AC_VO: 96*32us ~= 3ms
2058 csr0.field.Ac0Txop = 96; // AC_VI: 96*32us ~= 3ms
2059 csr0.field.Ac1Txop = 48; // AC_VO: 48*32us ~= 1.5ms
2061 RTMP_IO_WRITE32(pAd, WMM_TXOP1_CFG, csr0.word);
2068 // Status = NICLoadFirmware(pAd);
2070 DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAdapter\n"));
2075 ========================================================================
2077 Routine Description:
2081 Adapter Pointer to our adapter
2086 IRQL = PASSIVE_LEVEL
2090 ========================================================================
2092 NDIS_STATUS NICInitializeAsic(
2093 IN PRTMP_ADAPTER pAd,
2094 IN BOOLEAN bHardReset)
2098 UINT32 MacCsr12 = 0, Counter = 0;
2110 DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAsic\n"));
2115 // Make sure MAC gets ready after NICLoadFirmware().
2119 //To avoid hang-on issue when interface up in kernel 2.4,
2120 //we use a local variable "MacCsr0" instead of using "pAd->MACVersion" directly.
2123 RTMP_IO_READ32(pAd, MAC_CSR0, &MacCsr0);
2125 if ((MacCsr0 != 0x00) && (MacCsr0 != 0xFFFFFFFF))
2129 } while (Index++ < 100);
2131 pAd->MACVersion = MacCsr0;
2132 DBGPRINT(RT_DEBUG_TRACE, ("MAC_CSR0 [ Ver:Rev=0x%08x]\n", pAd->MACVersion));
2133 // turn on bit13 (set to zero) after rt2860D. This is to solve high-current issue.
2134 RTMP_IO_READ32(pAd, PBF_SYS_CTRL, &MacCsr12);
2135 MacCsr12 &= (~0x2000);
2136 RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, MacCsr12);
2138 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x3);
2139 RTMP_IO_WRITE32(pAd, USB_DMA_CFG, 0x0);
2140 Status = RTUSBVenderReset(pAd);
2142 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
2144 // Initialize MAC register to default value
2145 for(Index=0; Index<NUM_MAC_REG_PARMS; Index++)
2148 if ((MACRegTable[Index].Register == TX_SW_CFG0) && (IS_RT3070(pAd) || IS_RT3071(pAd)))
2150 MACRegTable[Index].Value = 0x00000400;
2153 RTMP_IO_WRITE32(pAd, (USHORT)MACRegTable[Index].Register, MACRegTable[Index].Value);
2157 #ifdef CONFIG_STA_SUPPORT
2158 IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
2160 for (Index = 0; Index < NUM_STA_MAC_REG_PARMS; Index++)
2162 RTMP_IO_WRITE32(pAd, (USHORT)STAMACRegTable[Index].Register, STAMACRegTable[Index].Value);
2165 #endif // CONFIG_STA_SUPPORT //
2169 // Initialize RT3070 serial MAc registers which is different from RT2870 serial
2172 RTMP_IO_WRITE32(pAd, TX_SW_CFG1, 0);
2174 // RT3071 version E has fixed this issue
2175 if ((pAd->MACVersion & 0xffff) < 0x0211)
2177 if (pAd->NicConfig2.field.DACTestBit == 1)
2179 RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x1F); // To fix throughput drop drastically
2183 RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x0F); // To fix throughput drop drastically
2188 RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x0);
2191 else if (IS_RT3070(pAd))
2193 RTMP_IO_WRITE32(pAd, TX_SW_CFG1, 0);
2194 RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x1F); // To fix throughput drop drastically
2199 // Before program BBP, we need to wait BBP/RF get wake up.
2204 RTMP_IO_READ32(pAd, MAC_STATUS_CFG, &MacCsr12);
2206 if ((MacCsr12 & 0x03) == 0) // if BB.RF is stable
2209 DBGPRINT(RT_DEBUG_TRACE, ("Check MAC_STATUS_CFG = Busy = %x\n", MacCsr12));
2210 RTMPusecDelay(1000);
2211 } while (Index++ < 100);
2213 // The commands to firmware should be after these commands, these commands will init firmware
2214 // PCI and USB are not the same because PCI driver needs to wait for PCI bus ready
2215 RTMP_IO_WRITE32(pAd, H2M_BBP_AGENT, 0); // initialize BBP R/W access agent
2216 RTMP_IO_WRITE32(pAd, H2M_MAILBOX_CSR, 0);
2217 RTMPusecDelay(1000);
2219 // Read BBP register, make sure BBP is up and running before write new data
2223 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R0, &R0);
2224 DBGPRINT(RT_DEBUG_TRACE, ("BBP version = %x\n", R0));
2225 } while ((++Index < 20) && ((R0 == 0xff) || (R0 == 0x00)));
2226 //ASSERT(Index < 20); //this will cause BSOD on Check-build driver
2228 if ((R0 == 0xff) || (R0 == 0x00))
2229 return NDIS_STATUS_FAILURE;
2231 // Initialize BBP register to default value
2232 for (Index = 0; Index < NUM_BBP_REG_PARMS; Index++)
2234 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[Index].Register, BBPRegTable[Index].Value);
2237 // for rt2860E and after, init BBP_R84 with 0x19. This is for extension channel overlapping IOT.
2238 // RT3090 should not program BBP R84 to 0x19, otherwise TX will block.
2239 if (((pAd->MACVersion&0xffff) != 0x0101) && (!IS_RT30xx(pAd)))
2240 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R84, 0x19);
2242 // add by johnli, RF power sequence setup
2245 { //update for RT3070/71/72/90/91/92.
2246 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R79, 0x13);
2247 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R80, 0x05);
2248 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R81, 0x33);
2256 if ((pAd->MACVersion & 0xffff) >= 0x0211)
2258 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R103, 0xc0);
2261 // improve power consumption
2262 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R138, &bbpreg);
2263 if (pAd->Antenna.field.TxPath == 1)
2265 // turn off tx DAC_1
2266 bbpreg = (bbpreg | 0x20);
2269 if (pAd->Antenna.field.RxPath == 1)
2271 // turn off tx ADC_1
2274 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R138, bbpreg);
2276 // improve power consumption in RT3071 Ver.E
2277 if ((pAd->MACVersion & 0xffff) >= 0x0211)
2279 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R31, &bbpreg);
2281 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R31, bbpreg);
2287 if (pAd->MACVersion == 0x28600100)
2289 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
2290 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x12);
2293 if (pAd->MACVersion >= RALINK_2880E_VERSION && pAd->MACVersion < RALINK_3070_VERSION) // 3*3
2295 // enlarge MAX_LEN_CFG
2297 RTMP_IO_READ32(pAd, MAX_LEN_CFG, &csr);
2300 RTMP_IO_WRITE32(pAd, MAX_LEN_CFG, csr);
2305 UCHAR MAC_Value[]={0xff,0xff,0xff,0xff,0xff,0xff,0xff,0,0};
2307 //Initialize WCID table
2309 for(Index =0 ;Index < 254;Index++)
2311 RTUSBMultiWrite(pAd, (USHORT)(MAC_WCID_BASE + Index * 8), MAC_Value, 8);
2316 // Add radio off control
2317 #ifdef CONFIG_STA_SUPPORT
2318 IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
2320 if (pAd->StaCfg.bRadio == FALSE)
2322 // RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x00001818);
2323 RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
2324 DBGPRINT(RT_DEBUG_TRACE, ("Set Radio Off\n"));
2327 #endif // CONFIG_STA_SUPPORT //
2329 // Clear raw counters
2330 RTMP_IO_READ32(pAd, RX_STA_CNT0, &Counter);
2331 RTMP_IO_READ32(pAd, RX_STA_CNT1, &Counter);
2332 RTMP_IO_READ32(pAd, RX_STA_CNT2, &Counter);
2333 RTMP_IO_READ32(pAd, TX_STA_CNT0, &Counter);
2334 RTMP_IO_READ32(pAd, TX_STA_CNT1, &Counter);
2335 RTMP_IO_READ32(pAd, TX_STA_CNT2, &Counter);
2337 // ASIC will keep garbage value after boot
2338 // Clear all seared key table when initial
2339 // This routine can be ignored in radio-ON/OFF operation.
2342 for (KeyIdx = 0; KeyIdx < 4; KeyIdx++)
2344 RTMP_IO_WRITE32(pAd, SHARED_KEY_MODE_BASE + 4*KeyIdx, 0);
2347 // Clear all pairwise key table when initial
2348 for (KeyIdx = 0; KeyIdx < 256; KeyIdx++)
2350 RTMP_IO_WRITE32(pAd, MAC_WCID_ATTRIBUTE_BASE + (KeyIdx * HW_WCID_ATTRI_SIZE), 1);
2354 // assert HOST ready bit
2355 // RTMP_IO_WRITE32(pAd, MAC_CSR1, 0x0); // 2004-09-14 asked by Mark
2356 // RTMP_IO_WRITE32(pAd, MAC_CSR1, 0x4);
2358 // It isn't necessary to clear this space when not hard reset.
2359 if (bHardReset == TRUE)
2361 // clear all on-chip BEACON frame space
2362 for (apidx = 0; apidx < HW_BEACON_MAX_COUNT; apidx++)
2364 for (i = 0; i < HW_BEACON_OFFSET>>2; i+=4)
2365 RTMP_IO_WRITE32(pAd, pAd->BeaconOffset[apidx] + i, 0x00);
2369 AsicDisableSync(pAd);
2370 // Clear raw counters
2371 RTMP_IO_READ32(pAd, RX_STA_CNT0, &Counter);
2372 RTMP_IO_READ32(pAd, RX_STA_CNT1, &Counter);
2373 RTMP_IO_READ32(pAd, RX_STA_CNT2, &Counter);
2374 RTMP_IO_READ32(pAd, TX_STA_CNT0, &Counter);
2375 RTMP_IO_READ32(pAd, TX_STA_CNT1, &Counter);
2376 RTMP_IO_READ32(pAd, TX_STA_CNT2, &Counter);
2377 // Default PCI clock cycle per ms is different as default setting, which is based on PCI.
2378 RTMP_IO_READ32(pAd, USB_CYC_CFG, &Counter);
2379 Counter&=0xffffff00;
2381 RTMP_IO_WRITE32(pAd, USB_CYC_CFG, Counter);
2384 pAd->bUseEfuse=FALSE;
2385 RTMP_IO_READ32(pAd, EFUSE_CTRL, &eFuseCtrl);
2386 pAd->bUseEfuse = ( (eFuseCtrl & 0x80000000) == 0x80000000) ? 1 : 0;
2389 DBGPRINT(RT_DEBUG_TRACE, ("NVM is Efuse\n"));
2393 DBGPRINT(RT_DEBUG_TRACE, ("NVM is EEPROM\n"));
2398 #ifdef CONFIG_STA_SUPPORT
2399 IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
2401 // for rt2860E and after, init TXOP_CTRL_CFG with 0x583f. This is for extension channel overlapping IOT.
2402 if ((pAd->MACVersion&0xffff) != 0x0101)
2403 RTMP_IO_WRITE32(pAd, TXOP_CTRL_CFG, 0x583f);
2405 #endif // CONFIG_STA_SUPPORT //
2407 DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAsic\n"));
2408 return NDIS_STATUS_SUCCESS;
2412 ========================================================================
2414 Routine Description:
2418 Adapter Pointer to our adapter
2423 IRQL = PASSIVE_LEVEL
2426 Reset NIC to initial state AS IS system boot up time.
2428 ========================================================================
2431 IN PRTMP_ADAPTER pAd)
2434 DBGPRINT(RT_DEBUG_TRACE, ("--> NICIssueReset\n"));
2436 // Abort Tx, prevent ASIC from writing to Host memory
2437 //RTMP_IO_WRITE32(pAd, TX_CNTL_CSR, 0x001f0000);
2439 // Disable Rx, register value supposed will remain after reset
2440 RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
2441 Value &= (0xfffffff3);
2442 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
2444 // Issue reset and clear from reset state
2445 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x03); // 2004-09-17 change from 0x01
2446 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x00);
2448 DBGPRINT(RT_DEBUG_TRACE, ("<-- NICIssueReset\n"));
2452 ========================================================================
2454 Routine Description:
2455 Check ASIC registers and find any reason the system might hang
2458 Adapter Pointer to our adapter
2463 IRQL = DISPATCH_LEVEL
2465 ========================================================================
2467 BOOLEAN NICCheckForHang(
2468 IN PRTMP_ADAPTER pAd)
2473 VOID NICUpdateFifoStaCounters(
2474 IN PRTMP_ADAPTER pAd)
2476 TX_STA_FIFO_STRUC StaFifo;
2477 MAC_TABLE_ENTRY *pEntry;
2479 UCHAR pid = 0, wcid = 0;
2484 /* Nothing to do in ATE mode */
2487 #endif // RALINK_ATE //
2491 RTMP_IO_READ32(pAd, TX_STA_FIFO, &StaFifo.word);
2493 if (StaFifo.field.bValid == 0)
2496 wcid = (UCHAR)StaFifo.field.wcid;
2499 /* ignore NoACK and MGMT frame use 0xFF as WCID */
2500 if ((StaFifo.field.TxAckRequired == 0) || (wcid >= MAX_LEN_OF_MAC_TABLE))
2506 /* PID store Tx MCS Rate */
2507 pid = (UCHAR)StaFifo.field.PidType;
2509 pEntry = &pAd->MacTab.Content[wcid];
2511 pEntry->DebugFIFOCount++;
2513 #ifdef DOT11_N_SUPPORT
2514 if (StaFifo.field.TxBF) // 3*3
2515 pEntry->TxBFCount++;
2516 #endif // DOT11_N_SUPPORT //
2518 #ifdef UAPSD_AP_SUPPORT
2519 UAPSD_SP_AUE_Handle(pAd, pEntry, StaFifo.field.TxSuccess);
2520 #endif // UAPSD_AP_SUPPORT //
2522 if (!StaFifo.field.TxSuccess)
2524 pEntry->FIFOCount++;
2525 pEntry->OneSecTxFailCount++;
2527 if (pEntry->FIFOCount >= 1)
2529 DBGPRINT(RT_DEBUG_TRACE, ("#"));
2530 #ifdef DOT11_N_SUPPORT
2531 pEntry->NoBADataCountDown = 64;
2532 #endif // DOT11_N_SUPPORT //
2534 if(pEntry->PsMode == PWR_ACTIVE)
2536 #ifdef DOT11_N_SUPPORT
2538 for (tid=0; tid<NUM_OF_TID; tid++)
2540 BAOriSessionTearDown(pAd, pEntry->Aid, tid, FALSE, FALSE);
2542 #endif // DOT11_N_SUPPORT //
2544 // Update the continuous transmission counter except PS mode
2545 pEntry->ContinueTxFailCnt++;
2549 // Clear the FIFOCount when sta in Power Save mode. Basically we assume
2550 // this tx error happened due to sta just go to sleep.
2551 pEntry->FIFOCount = 0;
2552 pEntry->ContinueTxFailCnt = 0;
2554 //pEntry->FIFOCount = 0;
2556 //pEntry->bSendBAR = TRUE;
2560 #ifdef DOT11_N_SUPPORT
2561 if ((pEntry->PsMode != PWR_SAVE) && (pEntry->NoBADataCountDown > 0))
2563 pEntry->NoBADataCountDown--;
2564 if (pEntry->NoBADataCountDown==0)
2566 DBGPRINT(RT_DEBUG_TRACE, ("@\n"));
2569 #endif // DOT11_N_SUPPORT //
2570 pEntry->FIFOCount = 0;
2571 pEntry->OneSecTxNoRetryOkCount++;
2572 // update NoDataIdleCount when sucessful send packet to STA.
2573 pEntry->NoDataIdleCount = 0;
2574 pEntry->ContinueTxFailCnt = 0;
2577 succMCS = StaFifo.field.SuccessRate & 0x7F;
2579 reTry = pid - succMCS;
2581 if (StaFifo.field.TxSuccess)
2583 pEntry->TXMCSExpected[pid]++;
2586 pEntry->TXMCSSuccessful[pid]++;
2590 pEntry->TXMCSAutoFallBack[pid][succMCS]++;
2595 pEntry->TXMCSFailed[pid]++;
2600 if ((pid >= 12) && succMCS <=7)
2604 pEntry->OneSecTxRetryOkCount += reTry;
2608 // ASIC store 16 stack
2609 } while ( i < (2*TX_RING_SIZE) );
2614 ========================================================================
2616 Routine Description:
2617 Read statistical counters from hardware registers and record them
2618 in software variables for later on query
2621 pAd Pointer to our adapter
2626 IRQL = DISPATCH_LEVEL
2628 ========================================================================
2630 VOID NICUpdateRawCounters(
2631 IN PRTMP_ADAPTER pAd)
2633 UINT32 OldValue;//, Value2;
2634 //ULONG PageSum, OneSecTransmitCount;
2635 //ULONG TxErrorRatio, Retry, Fail;
2636 RX_STA_CNT0_STRUC RxStaCnt0;
2637 RX_STA_CNT1_STRUC RxStaCnt1;
2638 RX_STA_CNT2_STRUC RxStaCnt2;
2639 TX_STA_CNT0_STRUC TxStaCnt0;
2640 TX_STA_CNT1_STRUC StaTx1;
2641 TX_STA_CNT2_STRUC StaTx2;
2642 TX_AGG_CNT_STRUC TxAggCnt;
2643 TX_AGG_CNT0_STRUC TxAggCnt0;
2644 TX_AGG_CNT1_STRUC TxAggCnt1;
2645 TX_AGG_CNT2_STRUC TxAggCnt2;
2646 TX_AGG_CNT3_STRUC TxAggCnt3;
2647 TX_AGG_CNT4_STRUC TxAggCnt4;
2648 TX_AGG_CNT5_STRUC TxAggCnt5;
2649 TX_AGG_CNT6_STRUC TxAggCnt6;
2650 TX_AGG_CNT7_STRUC TxAggCnt7;
2652 RTMP_IO_READ32(pAd, RX_STA_CNT0, &RxStaCnt0.word);
2653 RTMP_IO_READ32(pAd, RX_STA_CNT2, &RxStaCnt2.word);
2656 RTMP_IO_READ32(pAd, RX_STA_CNT1, &RxStaCnt1.word);
2657 // Update RX PLCP error counter
2658 pAd->PrivateInfo.PhyRxErrCnt += RxStaCnt1.field.PlcpErr;
2659 // Update False CCA counter
2660 pAd->RalinkCounters.OneSecFalseCCACnt += RxStaCnt1.field.FalseCca;
2663 // Update FCS counters
2664 OldValue= pAd->WlanCounters.FCSErrorCount.u.LowPart;
2665 pAd->WlanCounters.FCSErrorCount.u.LowPart += (RxStaCnt0.field.CrcErr); // >> 7);
2666 if (pAd->WlanCounters.FCSErrorCount.u.LowPart < OldValue)
2667 pAd->WlanCounters.FCSErrorCount.u.HighPart++;
2669 // Add FCS error count to private counters
2670 pAd->RalinkCounters.OneSecRxFcsErrCnt += RxStaCnt0.field.CrcErr;
2671 OldValue = pAd->RalinkCounters.RealFcsErrCount.u.LowPart;
2672 pAd->RalinkCounters.RealFcsErrCount.u.LowPart += RxStaCnt0.field.CrcErr;
2673 if (pAd->RalinkCounters.RealFcsErrCount.u.LowPart < OldValue)
2674 pAd->RalinkCounters.RealFcsErrCount.u.HighPart++;
2676 // Update Duplicate Rcv check
2677 pAd->RalinkCounters.DuplicateRcv += RxStaCnt2.field.RxDupliCount;
2678 pAd->WlanCounters.FrameDuplicateCount.u.LowPart += RxStaCnt2.field.RxDupliCount;
2679 // Update RX Overflow counter
2680 pAd->Counters8023.RxNoBuffer += (RxStaCnt2.field.RxFifoOverflowCount);
2682 //pAd->RalinkCounters.RxCount = 0;
2684 if (pAd->RalinkCounters.RxCount != pAd->watchDogRxCnt)
2686 pAd->watchDogRxCnt = pAd->RalinkCounters.RxCount;
2687 pAd->watchDogRxOverFlowCnt = 0;
2691 if (RxStaCnt2.field.RxFifoOverflowCount)
2692 pAd->watchDogRxOverFlowCnt++;
2694 pAd->watchDogRxOverFlowCnt = 0;
2699 //if (!OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_TX_RATE_SWITCH_ENABLED) ||
2700 // (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_TX_RATE_SWITCH_ENABLED) && (pAd->MacTab.Size != 1)))
2701 if (!pAd->bUpdateBcnCntDone)
2703 // Update BEACON sent count
2704 RTMP_IO_READ32(pAd, TX_STA_CNT0, &TxStaCnt0.word);
2705 RTMP_IO_READ32(pAd, TX_STA_CNT1, &StaTx1.word);
2706 RTMP_IO_READ32(pAd, TX_STA_CNT2, &StaTx2.word);
2707 pAd->RalinkCounters.OneSecBeaconSentCnt += TxStaCnt0.field.TxBeaconCount;
2708 pAd->RalinkCounters.OneSecTxRetryOkCount += StaTx1.field.TxRetransmit;
2709 pAd->RalinkCounters.OneSecTxNoRetryOkCount += StaTx1.field.TxSuccess;
2710 pAd->RalinkCounters.OneSecTxFailCount += TxStaCnt0.field.TxFailCount;
2711 pAd->WlanCounters.TransmittedFragmentCount.u.LowPart += StaTx1.field.TxSuccess;
2712 pAd->WlanCounters.RetryCount.u.LowPart += StaTx1.field.TxRetransmit;
2713 pAd->WlanCounters.FailedCount.u.LowPart += TxStaCnt0.field.TxFailCount;
2716 //if (pAd->bStaFifoTest == TRUE)
2718 RTMP_IO_READ32(pAd, TX_AGG_CNT, &TxAggCnt.word);
2719 RTMP_IO_READ32(pAd, TX_AGG_CNT0, &TxAggCnt0.word);
2720 RTMP_IO_READ32(pAd, TX_AGG_CNT1, &TxAggCnt1.word);
2721 RTMP_IO_READ32(pAd, TX_AGG_CNT2, &TxAggCnt2.word);
2722 RTMP_IO_READ32(pAd, TX_AGG_CNT3, &TxAggCnt3.word);
2723 RTMP_IO_READ32(pAd, TX_AGG_CNT4, &TxAggCnt4.word);
2724 RTMP_IO_READ32(pAd, TX_AGG_CNT5, &TxAggCnt5.word);
2725 RTMP_IO_READ32(pAd, TX_AGG_CNT6, &TxAggCnt6.word);
2726 RTMP_IO_READ32(pAd, TX_AGG_CNT7, &TxAggCnt7.word);
2727 pAd->RalinkCounters.TxAggCount += TxAggCnt.field.AggTxCount;
2728 pAd->RalinkCounters.TxNonAggCount += TxAggCnt.field.NonAggTxCount;
2729 pAd->RalinkCounters.TxAgg1MPDUCount += TxAggCnt0.field.AggSize1Count;
2730 pAd->RalinkCounters.TxAgg2MPDUCount += TxAggCnt0.field.AggSize2Count;
2732 pAd->RalinkCounters.TxAgg3MPDUCount += TxAggCnt1.field.AggSize3Count;
2733 pAd->RalinkCounters.TxAgg4MPDUCount += TxAggCnt1.field.AggSize4Count;
2734 pAd->RalinkCounters.TxAgg5MPDUCount += TxAggCnt2.field.AggSize5Count;
2735 pAd->RalinkCounters.TxAgg6MPDUCount += TxAggCnt2.field.AggSize6Count;
2737 pAd->RalinkCounters.TxAgg7MPDUCount += TxAggCnt3.field.AggSize7Count;
2738 pAd->RalinkCounters.TxAgg8MPDUCount += TxAggCnt3.field.AggSize8Count;
2739 pAd->RalinkCounters.TxAgg9MPDUCount += TxAggCnt4.field.AggSize9Count;
2740 pAd->RalinkCounters.TxAgg10MPDUCount += TxAggCnt4.field.AggSize10Count;
2742 pAd->RalinkCounters.TxAgg11MPDUCount += TxAggCnt5.field.AggSize11Count;
2743 pAd->RalinkCounters.TxAgg12MPDUCount += TxAggCnt5.field.AggSize12Count;
2744 pAd->RalinkCounters.TxAgg13MPDUCount += TxAggCnt6.field.AggSize13Count;
2745 pAd->RalinkCounters.TxAgg14MPDUCount += TxAggCnt6.field.AggSize14Count;
2747 pAd->RalinkCounters.TxAgg15MPDUCount += TxAggCnt7.field.AggSize15Count;
2748 pAd->RalinkCounters.TxAgg16MPDUCount += TxAggCnt7.field.AggSize16Count;
2750 // Calculate the transmitted A-MPDU count
2751 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += TxAggCnt0.field.AggSize1Count;
2752 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt0.field.AggSize2Count / 2);
2754 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt1.field.AggSize3Count / 3);
2755 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt1.field.AggSize4Count / 4);
2757 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt2.field.AggSize5Count / 5);
2758 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt2.field.AggSize6Count / 6);
2760 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt3.field.AggSize7Count / 7);
2761 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt3.field.AggSize8Count / 8);
2763 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt4.field.AggSize9Count / 9);
2764 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt4.field.AggSize10Count / 10);
2766 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt5.field.AggSize11Count / 11);
2767 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt5.field.AggSize12Count / 12);
2769 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt6.field.AggSize13Count / 13);
2770 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt6.field.AggSize14Count / 14);
2772 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt7.field.AggSize15Count / 15);
2773 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt7.field.AggSize16Count / 16);
2778 RtmpDiagStruct *pDiag;
2779 COUNTER_RALINK *pRalinkCounters;
2780 UCHAR ArrayCurIdx, i;
2782 pDiag = &pAd->DiagStruct;
2783 pRalinkCounters = &pAd->RalinkCounters;
2784 ArrayCurIdx = pDiag->ArrayCurIdx;
2786 if (pDiag->inited == 0)
2788 NdisZeroMemory(pDiag, sizeof(struct _RtmpDiagStrcut_));
2789 pDiag->ArrayStartIdx = pDiag->ArrayCurIdx = 0;
2795 pDiag->TxFailCnt[ArrayCurIdx] = TxStaCnt0.field.TxFailCount;
2796 pDiag->TxAggCnt[ArrayCurIdx] = TxAggCnt.field.AggTxCount;
2797 pDiag->TxNonAggCnt[ArrayCurIdx] = TxAggCnt.field.NonAggTxCount;
2798 pDiag->TxAMPDUCnt[ArrayCurIdx][0] = TxAggCnt0.field.AggSize1Count;
2799 pDiag->TxAMPDUCnt[ArrayCurIdx][1] = TxAggCnt0.field.AggSize2Count;
2800 pDiag->TxAMPDUCnt[ArrayCurIdx][2] = TxAggCnt1.field.AggSize3Count;
2801 pDiag->TxAMPDUCnt[ArrayCurIdx][3] = TxAggCnt1.field.AggSize4Count;
2802 pDiag->TxAMPDUCnt[ArrayCurIdx][4] = TxAggCnt2.field.AggSize5Count;
2803 pDiag->TxAMPDUCnt[ArrayCurIdx][5] = TxAggCnt2.field.AggSize6Count;
2804 pDiag->TxAMPDUCnt[ArrayCurIdx][6] = TxAggCnt3.field.AggSize7Count;
2805 pDiag->TxAMPDUCnt[ArrayCurIdx][7] = TxAggCnt3.field.AggSize8Count;
2806 pDiag->TxAMPDUCnt[ArrayCurIdx][8] = TxAggCnt4.field.AggSize9Count;
2807 pDiag->TxAMPDUCnt[ArrayCurIdx][9] = TxAggCnt4.field.AggSize10Count;
2808 pDiag->TxAMPDUCnt[ArrayCurIdx][10] = TxAggCnt5.field.AggSize11Count;
2809 pDiag->TxAMPDUCnt[ArrayCurIdx][11] = TxAggCnt5.field.AggSize12Count;
2810 pDiag->TxAMPDUCnt[ArrayCurIdx][12] = TxAggCnt6.field.AggSize13Count;
2811 pDiag->TxAMPDUCnt[ArrayCurIdx][13] = TxAggCnt6.field.AggSize14Count;
2812 pDiag->TxAMPDUCnt[ArrayCurIdx][14] = TxAggCnt7.field.AggSize15Count;
2813 pDiag->TxAMPDUCnt[ArrayCurIdx][15] = TxAggCnt7.field.AggSize16Count;
2815 pDiag->RxCrcErrCnt[ArrayCurIdx] = RxStaCnt0.field.CrcErr;
2817 INC_RING_INDEX(pDiag->ArrayCurIdx, DIAGNOSE_TIME);
2818 ArrayCurIdx = pDiag->ArrayCurIdx;
2819 for (i =0; i < 9; i++)
2821 pDiag->TxDescCnt[ArrayCurIdx][i]= 0;
2822 pDiag->TxSWQueCnt[ArrayCurIdx][i] =0;
2823 pDiag->TxMcsCnt[ArrayCurIdx][i] = 0;
2824 pDiag->RxMcsCnt[ArrayCurIdx][i] = 0;
2826 pDiag->TxDataCnt[ArrayCurIdx] = 0;
2827 pDiag->TxFailCnt[ArrayCurIdx] = 0;
2828 pDiag->RxDataCnt[ArrayCurIdx] = 0;
2829 pDiag->RxCrcErrCnt[ArrayCurIdx] = 0;
2830 // for (i = 9; i < 16; i++)
2831 for (i = 9; i < 24; i++) // 3*3
2833 pDiag->TxDescCnt[ArrayCurIdx][i] = 0;
2834 pDiag->TxMcsCnt[ArrayCurIdx][i] = 0;
2835 pDiag->RxMcsCnt[ArrayCurIdx][i] = 0;
2838 if (pDiag->ArrayCurIdx == pDiag->ArrayStartIdx)
2839 INC_RING_INDEX(pDiag->ArrayStartIdx, DIAGNOSE_TIME);
2843 #endif // DBG_DIAGNOSE //
2850 ========================================================================
2852 Routine Description:
2853 Reset NIC from error
2856 Adapter Pointer to our adapter
2861 IRQL = PASSIVE_LEVEL
2864 Reset NIC from error state
2866 ========================================================================
2868 VOID NICResetFromError(
2869 IN PRTMP_ADAPTER pAd)
2871 // Reset BBP (according to alex, reset ASIC will force reset BBP
2872 // Therefore, skip the reset BBP
2873 // RTMP_IO_WRITE32(pAd, MAC_CSR1, 0x2);
2875 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x1);
2876 // Remove ASIC from reset state
2877 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
2879 NICInitializeAdapter(pAd, FALSE);
2880 NICInitAsicFromEEPROM(pAd);
2882 // Switch to current channel, since during reset process, the connection should remains on.
2883 AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
2884 AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
2888 ========================================================================
2890 Routine Description:
2891 erase 8051 firmware image in MAC ASIC
2894 Adapter Pointer to our adapter
2896 IRQL = PASSIVE_LEVEL
2898 ========================================================================
2900 VOID NICEraseFirmware(
2901 IN PRTMP_ADAPTER pAd)
2905 for(i=0; i<MAX_FIRMWARE_IMAGE_SIZE; i+=4)
2906 RTMP_IO_WRITE32(pAd, FIRMWARE_IMAGE_BASE + i, 0);
2908 }/* End of NICEraseFirmware */
2911 ========================================================================
2913 Routine Description:
2914 Load 8051 firmware RT2561.BIN file into MAC ASIC
2917 Adapter Pointer to our adapter
2920 NDIS_STATUS_SUCCESS firmware image load ok
2921 NDIS_STATUS_FAILURE image not found
2923 IRQL = PASSIVE_LEVEL
2925 ========================================================================
2927 NDIS_STATUS NICLoadFirmware(
2928 IN PRTMP_ADAPTER pAd)
2931 #define NICLF_DEFAULT_USE() \
2932 flg_default_firm_use = TRUE; \
2933 printk("%s - Use default firmware!\n", __FUNCTION__);
2935 NDIS_STATUS Status = NDIS_STATUS_SUCCESS;
2938 INT retval, orgfsuid, orgfsgid, i;
2940 PUCHAR pFirmwareImage;
2941 UINT FileLength = 0;
2945 BOOLEAN flg_default_firm_use = FALSE;
2948 DBGPRINT(RT_DEBUG_TRACE, ("===> %s\n", __FUNCTION__));
2951 pFirmwareImage = NULL;
2952 src = RTMP_FIRMWARE_FILE_NAME;
2954 /* save uid and gid used for filesystem access.
2955 set user and group to 0 (root) */
2956 orgfsuid = current->fsuid;
2957 orgfsgid = current->fsgid;
2958 current->fsuid = current->fsgid = 0;
2962 pAd->FirmwareVersion = (FIRMWARE_MAJOR_VERSION << 8) + \
2963 FIRMWARE_MINOR_VERSION;
2966 /* allocate firmware buffer */
2967 pFirmwareImage = kmalloc(MAX_FIRMWARE_IMAGE_SIZE, MEM_ALLOC_FLAG);
2968 if (pFirmwareImage == NULL)
2970 /* allocate fail, use default firmware array in firmware.h */
2971 printk("%s - Allocate memory fail!\n", __FUNCTION__);
2972 NICLF_DEFAULT_USE();
2976 /* allocate ok! zero the firmware buffer */
2977 memset(pFirmwareImage, 0x00, MAX_FIRMWARE_IMAGE_SIZE);
2981 /* if ok, read firmware file from *.bin file */
2982 if (flg_default_firm_use == FALSE)
2986 /* open the bin file */
2987 srcf = filp_open(src, O_RDONLY, 0);
2991 printk("%s - Error %ld opening %s\n",
2992 __FUNCTION__, -PTR_ERR(srcf), src);
2993 NICLF_DEFAULT_USE();
2997 /* the object must have a read method */
2998 if ((srcf->f_op == NULL) || (srcf->f_op->read == NULL))
3000 printk("%s - %s does not have a write method\n", __FUNCTION__, src);
3001 NICLF_DEFAULT_USE();
3005 /* read the firmware from the file *.bin */
3006 FileLength = srcf->f_op->read(srcf,
3008 MAX_FIRMWARE_IMAGE_SIZE,
3011 if (FileLength != MAX_FIRMWARE_IMAGE_SIZE)
3013 printk("%s: error file length (=%d) in RT2860AP.BIN\n",
3014 __FUNCTION__, FileLength);
3015 NICLF_DEFAULT_USE();
3020 PUCHAR ptr = pFirmwareImage;
3021 USHORT crc = 0xffff;
3024 /* calculate firmware CRC */
3025 for(i=0; i<(MAX_FIRMWARE_IMAGE_SIZE-2); i++, ptr++)
3026 crc = ByteCRC16(BitReverse(*ptr), crc);
3029 if ((pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-2] != \
3030 (UCHAR)BitReverse((UCHAR)(crc>>8))) ||
3031 (pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-1] != \
3032 (UCHAR)BitReverse((UCHAR)crc)))
3035 printk("%s: CRC = 0x%02x 0x%02x "
3036 "error, should be 0x%02x 0x%02x\n",
3038 pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-2],
3039 pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-1],
3040 (UCHAR)(crc>>8), (UCHAR)(crc));
3041 NICLF_DEFAULT_USE();
3046 /* firmware is ok */
3047 pAd->FirmwareVersion = \
3048 (pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-4] << 8) +
3049 pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-3];
3051 /* check if firmware version of the file is too old */
3052 if ((pAd->FirmwareVersion) < \
3053 ((FIRMWARE_MAJOR_VERSION << 8) +
3054 FIRMWARE_MINOR_VERSION))
3056 printk("%s: firmware version too old!\n", __FUNCTION__);
3057 NICLF_DEFAULT_USE();
3062 DBGPRINT(RT_DEBUG_TRACE,
3063 ("NICLoadFirmware: CRC ok, ver=%d.%d\n",
3064 pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-4],
3065 pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-3]));
3066 } /* End of if (FileLength == MAX_FIRMWARE_IMAGE_SIZE) */
3070 /* close firmware file */
3075 retval = filp_close(srcf, NULL);
3078 DBGPRINT(RT_DEBUG_ERROR,
3079 ("--> Error %d closing %s\n", -retval, src));
3085 /* write firmware to ASIC */
3086 if (flg_default_firm_use == TRUE)
3088 /* use default fimeware, free allocated buffer */
3089 if (pFirmwareImage != NULL)
3090 kfree(pFirmwareImage);
3093 /* use default *.bin array */
3094 pFirmwareImage = FirmwareImage;
3095 FileLength = sizeof(FirmwareImage);
3098 /* enable Host program ram write selection */
3099 RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0x10000);
3101 for(i=0; i<FileLength; i+=4)
3103 firm = pFirmwareImage[i] +
3104 (pFirmwareImage[i+3] << 24) +
3105 (pFirmwareImage[i+2] << 16) +
3106 (pFirmwareImage[i+1] << 8);
3108 RTMP_IO_WRITE32(pAd, FIRMWARE_IMAGE_BASE + i, firm);
3111 RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0x00000);
3112 RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0x00001);
3114 /* initialize BBP R/W access agent */
3115 RTMP_IO_WRITE32(pAd, H2M_BBP_AGENT, 0);
3116 RTMP_IO_WRITE32(pAd, H2M_MAILBOX_CSR, 0);
3118 if (flg_default_firm_use == FALSE)
3120 /* use file firmware, free allocated buffer */
3121 if (pFirmwareImage != NULL)
3122 kfree(pFirmwareImage);
3127 current->fsuid = orgfsuid;
3128 current->fsgid = orgfsgid;
3131 NDIS_STATUS Status = NDIS_STATUS_SUCCESS;
3132 PUCHAR pFirmwareImage;
3133 ULONG FileLength, Index;
3136 UINT32 Version = (pAd->MACVersion >> 16);
3138 pFirmwareImage = FirmwareImage;
3139 FileLength = sizeof(FirmwareImage);
3141 // New 8k byte firmware size for RT3071/RT3072
3142 //printk("Usb Chip\n");
3143 if (FIRMWAREIMAGE_LENGTH == FIRMWAREIMAGE_MAX_LENGTH)
3144 //The firmware image consists of two parts. One is the origianl and the other is the new.
3148 if ((Version != 0x2860) && (Version != 0x2872) && (Version != 0x3070))
3149 { // Use Firmware V2.
3150 //printk("KH:Use New Version,part2\n");
3151 pFirmwareImage = (PUCHAR)&FirmwareImage[FIRMWAREIMAGEV1_LENGTH];
3152 FileLength = FIRMWAREIMAGEV2_LENGTH;
3156 //printk("KH:Use New Version,part1\n");
3157 pFirmwareImage = FirmwareImage;
3158 FileLength = FIRMWAREIMAGEV1_LENGTH;
3164 DBGPRINT(RT_DEBUG_ERROR, ("KH: bin file should be 8KB.\n"));
3165 Status = NDIS_STATUS_FAILURE;
3168 RT28XX_WRITE_FIRMWARE(pAd, pFirmwareImage, FileLength);
3172 /* check if MCU is ready */
3176 RTMP_IO_READ32(pAd, PBF_SYS_CTRL, &MacReg);
3181 RTMPusecDelay(1000);
3182 } while (Index++ < 1000);
3186 Status = NDIS_STATUS_FAILURE;
3187 DBGPRINT(RT_DEBUG_ERROR, ("NICLoadFirmware: MCU is not ready\n\n\n"));
3190 DBGPRINT(RT_DEBUG_TRACE,
3191 ("<=== %s (status=%d)\n", __FUNCTION__, Status));
3193 } /* End of NICLoadFirmware */
3197 ========================================================================
3199 Routine Description:
3200 Load Tx rate switching parameters
3203 Adapter Pointer to our adapter
3206 NDIS_STATUS_SUCCESS firmware image load ok
3207 NDIS_STATUS_FAILURE image not found
3209 IRQL = PASSIVE_LEVEL
3212 1. (B0: Valid Item number) (B1:Initial item from zero)
3213 2. Item Number(Dec) Mode(Hex) Current MCS(Dec) TrainUp(Dec) TrainDown(Dec)
3215 ========================================================================
3217 NDIS_STATUS NICLoadRateSwitchingParams(
3218 IN PRTMP_ADAPTER pAd)
3220 return NDIS_STATUS_SUCCESS;
3224 ========================================================================
3226 Routine Description:
3227 if pSrc1 all zero with length Length, return 0.
3228 If not all zero, return 1
3237 IRQL = DISPATCH_LEVEL
3241 ========================================================================
3243 ULONG RTMPNotAllZero(
3250 pMem1 = (PUCHAR) pSrc1;
3252 for (Index = 0; Index < Length; Index++)
3254 if (pMem1[Index] != 0x0)
3260 if (Index == Length)
3271 ========================================================================
3273 Routine Description:
3274 Compare two memory block
3277 pSrc1 Pointer to first memory address
3278 pSrc2 Pointer to second memory address
3282 1: pSrc1 memory is larger
3283 2: pSrc2 memory is larger
3285 IRQL = DISPATCH_LEVEL
3289 ========================================================================
3291 ULONG RTMPCompareMemory(
3300 pMem1 = (PUCHAR) pSrc1;
3301 pMem2 = (PUCHAR) pSrc2;
3303 for (Index = 0; Index < Length; Index++)
3305 if (pMem1[Index] > pMem2[Index])
3307 else if (pMem1[Index] < pMem2[Index])
3316 ========================================================================
3318 Routine Description:
3319 Zero out memory block
3322 pSrc1 Pointer to memory address
3328 IRQL = PASSIVE_LEVEL
3329 IRQL = DISPATCH_LEVEL
3333 ========================================================================
3335 VOID RTMPZeroMemory(
3342 pMem = (PUCHAR) pSrc;
3344 for (Index = 0; Index < Length; Index++)
3350 VOID RTMPFillMemory(
3358 pMem = (PUCHAR) pSrc;
3360 for (Index = 0; Index < Length; Index++)
3367 ========================================================================
3369 Routine Description:
3370 Copy data from memory block 1 to memory block 2
3373 pDest Pointer to destination memory address
3374 pSrc Pointer to source memory address
3380 IRQL = PASSIVE_LEVEL
3381 IRQL = DISPATCH_LEVEL
3385 ========================================================================
3387 VOID RTMPMoveMemory(
3396 ASSERT((Length==0) || (pDest && pSrc));
3398 pMem1 = (PUCHAR) pDest;
3399 pMem2 = (PUCHAR) pSrc;
3401 for (Index = 0; Index < Length; Index++)
3403 pMem1[Index] = pMem2[Index];
3408 ========================================================================
3410 Routine Description:
3411 Initialize port configuration structure
3414 Adapter Pointer to our adapter
3419 IRQL = PASSIVE_LEVEL
3423 ========================================================================
3426 IN PRTMP_ADAPTER pAd)
3428 // EDCA_PARM DefaultEdcaParm;
3429 UINT key_index, bss_index;
3431 DBGPRINT(RT_DEBUG_TRACE, ("--> UserCfgInit\n"));
3434 // part I. intialize common configuration
3437 pAd->BulkOutReq = 0;
3439 pAd->BulkOutComplete = 0;
3440 pAd->BulkOutCompleteOther = 0;
3441 pAd->BulkOutCompleteCancel = 0;
3443 pAd->BulkInComplete = 0;
3444 pAd->BulkInCompleteFail = 0;
3446 //pAd->QuickTimerP = 100;
3447 //pAd->TurnAggrBulkInCount = 0;
3448 pAd->bUsbTxBulkAggre = 0;
3450 // init as unsed value to ensure driver will set to MCU once.
3451 pAd->LedIndicatorStregth = 0xFF;
3453 pAd->CommonCfg.MaxPktOneTxBulk = 2;
3454 pAd->CommonCfg.TxBulkFactor = 1;
3455 pAd->CommonCfg.RxBulkFactor =1;
3457 pAd->CommonCfg.TxPower = 100; //mW
3459 NdisZeroMemory(&pAd->CommonCfg.IOTestParm, sizeof(pAd->CommonCfg.IOTestParm));
3462 for(key_index=0; key_index<SHARE_KEY_NUM; key_index++)
3464 for(bss_index = 0; bss_index < MAX_MBSSID_NUM; bss_index++)
3466 pAd->SharedKey[bss_index][key_index].KeyLen = 0;
3467 pAd->SharedKey[bss_index][key_index].CipherAlg = CIPHER_NONE;
3471 pAd->EepromAccess = FALSE;
3473 pAd->Antenna.word = 0;
3474 pAd->CommonCfg.BBPCurrentBW = BW_20;
3476 pAd->LedCntl.word = 0;
3478 pAd->bAutoTxAgcA = FALSE; // Default is OFF
3479 pAd->bAutoTxAgcG = FALSE; // Default is OFF
3480 pAd->RfIcType = RFIC_2820;
3482 // Init timer for reset complete event
3483 pAd->CommonCfg.CentralChannel = 1;
3484 pAd->bForcePrintTX = FALSE;
3485 pAd->bForcePrintRX = FALSE;
3486 pAd->bStaFifoTest = FALSE;
3487 pAd->bProtectionTest = FALSE;
3488 pAd->bHCCATest = FALSE;
3489 pAd->bGenOneHCCA = FALSE;
3490 pAd->CommonCfg.Dsifs = 10; // in units of usec
3491 pAd->CommonCfg.TxPower = 100; //mW
3492 pAd->CommonCfg.TxPowerPercentage = 0xffffffff; // AUTO
3493 pAd->CommonCfg.TxPowerDefault = 0xffffffff; // AUTO
3494 pAd->CommonCfg.TxPreamble = Rt802_11PreambleAuto; // use Long preamble on TX by defaut
3495 pAd->CommonCfg.bUseZeroToDisableFragment = FALSE;
3496 pAd->CommonCfg.RtsThreshold = 2347;
3497 pAd->CommonCfg.FragmentThreshold = 2346;
3498 pAd->CommonCfg.UseBGProtection = 0; // 0: AUTO
3499 pAd->CommonCfg.bEnableTxBurst = TRUE; //0;
3500 pAd->CommonCfg.PhyMode = 0xff; // unknown
3501 pAd->CommonCfg.BandState = UNKNOWN_BAND;
3502 pAd->CommonCfg.RadarDetect.CSPeriod = 10;
3503 pAd->CommonCfg.RadarDetect.CSCount = 0;
3504 pAd->CommonCfg.RadarDetect.RDMode = RD_NORMAL_MODE;
3505 pAd->CommonCfg.RadarDetect.ChMovingTime = 65;
3506 pAd->CommonCfg.RadarDetect.LongPulseRadarTh = 3;
3507 pAd->CommonCfg.bAPSDCapable = FALSE;
3508 pAd->CommonCfg.bNeedSendTriggerFrame = FALSE;
3509 pAd->CommonCfg.TriggerTimerCount = 0;
3510 pAd->CommonCfg.bAPSDForcePowerSave = FALSE;
3511 pAd->CommonCfg.bCountryFlag = FALSE;
3512 pAd->CommonCfg.TxStream = 0;
3513 pAd->CommonCfg.RxStream = 0;
3515 NdisZeroMemory(&pAd->BeaconTxWI, sizeof(pAd->BeaconTxWI));
3517 #ifdef DOT11_N_SUPPORT
3518 NdisZeroMemory(&pAd->CommonCfg.HtCapability, sizeof(pAd->CommonCfg.HtCapability));
3519 pAd->HTCEnable = FALSE;
3520 pAd->bBroadComHT = FALSE;
3521 pAd->CommonCfg.bRdg = FALSE;
3523 #ifdef DOT11N_DRAFT3
3524 pAd->CommonCfg.Dot11OBssScanPassiveDwell = dot11OBSSScanPassiveDwell; // Unit : TU. 5~1000
3525 pAd->CommonCfg.Dot11OBssScanActiveDwell = dot11OBSSScanActiveDwell; // Unit : TU. 10~1000
3526 pAd->CommonCfg.Dot11BssWidthTriggerScanInt = dot11BSSWidthTriggerScanInterval; // Unit : Second
3527 pAd->CommonCfg.Dot11OBssScanPassiveTotalPerChannel = dot11OBSSScanPassiveTotalPerChannel; // Unit : TU. 200~10000
3528 pAd->CommonCfg.Dot11OBssScanActiveTotalPerChannel = dot11OBSSScanActiveTotalPerChannel; // Unit : TU. 20~10000
3529 pAd->CommonCfg.Dot11BssWidthChanTranDelayFactor = dot11BSSWidthChannelTransactionDelayFactor;
3530 pAd->CommonCfg.Dot11OBssScanActivityThre = dot11BSSScanActivityThreshold; // Unit : percentage
3531 pAd->CommonCfg.Dot11BssWidthChanTranDelay = (pAd->CommonCfg.Dot11BssWidthTriggerScanInt * pAd->CommonCfg.Dot11BssWidthChanTranDelayFactor);
3532 #endif // DOT11N_DRAFT3 //
3534 NdisZeroMemory(&pAd->CommonCfg.AddHTInfo, sizeof(pAd->CommonCfg.AddHTInfo));
3535 pAd->CommonCfg.BACapability.field.MMPSmode = MMPS_ENABLE;
3536 pAd->CommonCfg.BACapability.field.MpduDensity = 0;
3537 pAd->CommonCfg.BACapability.field.Policy = IMMED_BA;
3538 pAd->CommonCfg.BACapability.field.RxBAWinLimit = 64; //32;
3539 pAd->CommonCfg.BACapability.field.TxBAWinLimit = 64; //32;
3540 DBGPRINT(RT_DEBUG_TRACE, ("--> UserCfgInit. BACapability = 0x%x\n", pAd->CommonCfg.BACapability.word));
3542 pAd->CommonCfg.BACapability.field.AutoBA = FALSE;
3543 BATableInit(pAd, &pAd->BATable);
3545 pAd->CommonCfg.bExtChannelSwitchAnnouncement = 1;
3546 pAd->CommonCfg.bHTProtect = 1;
3547 pAd->CommonCfg.bMIMOPSEnable = TRUE;
3548 pAd->CommonCfg.bBADecline = FALSE;
3549 pAd->CommonCfg.bDisableReordering = FALSE;
3551 pAd->CommonCfg.TxBASize = 7;
3553 pAd->CommonCfg.REGBACapability.word = pAd->CommonCfg.BACapability.word;
3554 #endif // DOT11_N_SUPPORT //
3556 //pAd->CommonCfg.HTPhyMode.field.BW = BW_20;
3557 //pAd->CommonCfg.HTPhyMode.field.MCS = MCS_AUTO;
3558 //pAd->CommonCfg.HTPhyMode.field.ShortGI = GI_800;
3559 //pAd->CommonCfg.HTPhyMode.field.STBC = STBC_NONE;
3560 pAd->CommonCfg.TxRate = RATE_6;
3562 pAd->CommonCfg.MlmeTransmit.field.MCS = MCS_RATE_6;
3563 pAd->CommonCfg.MlmeTransmit.field.BW = BW_20;
3564 pAd->CommonCfg.MlmeTransmit.field.MODE = MODE_OFDM;
3566 pAd->CommonCfg.BeaconPeriod = 100; // in mSec
3569 // part II. intialize STA specific configuration
3571 #ifdef CONFIG_STA_SUPPORT
3572 IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
3574 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_DIRECT);
3575 RX_FILTER_CLEAR_FLAG(pAd, fRX_FILTER_ACCEPT_MULTICAST);
3576 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_BROADCAST);
3577 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_ALL_MULTICAST);
3579 pAd->StaCfg.Psm = PWR_ACTIVE;
3581 pAd->StaCfg.OrigWepStatus = Ndis802_11EncryptionDisabled;
3582 pAd->StaCfg.PairCipher = Ndis802_11EncryptionDisabled;
3583 pAd->StaCfg.GroupCipher = Ndis802_11EncryptionDisabled;
3584 pAd->StaCfg.bMixCipher = FALSE;
3585 pAd->StaCfg.DefaultKeyId = 0;
3587 // 802.1x port control
3588 pAd->StaCfg.PrivacyFilter = Ndis802_11PrivFilter8021xWEP;
3589 pAd->StaCfg.PortSecured = WPA_802_1X_PORT_NOT_SECURED;
3590 pAd->StaCfg.LastMicErrorTime = 0;
3591 pAd->StaCfg.MicErrCnt = 0;
3592 pAd->StaCfg.bBlockAssoc = FALSE;
3593 pAd->StaCfg.WpaState = SS_NOTUSE;
3595 pAd->CommonCfg.NdisRadioStateOff = FALSE; // New to support microsoft disable radio with OID command
3597 pAd->StaCfg.RssiTrigger = 0;
3598 NdisZeroMemory(&pAd->StaCfg.RssiSample, sizeof(RSSI_SAMPLE));
3599 pAd->StaCfg.RssiTriggerMode = RSSI_TRIGGERED_UPON_BELOW_THRESHOLD;
3600 pAd->StaCfg.AtimWin = 0;
3601 pAd->StaCfg.DefaultListenCount = 3;//default listen count;
3602 pAd->StaCfg.BssType = BSS_INFRA; // BSS_INFRA or BSS_ADHOC or BSS_MONITOR
3603 pAd->StaCfg.bScanReqIsFromWebUI = FALSE;
3604 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_DOZE);
3605 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_WAKEUP_NOW);
3607 pAd->StaCfg.bAutoTxRateSwitch = TRUE;
3608 pAd->StaCfg.DesiredTransmitSetting.field.MCS = MCS_AUTO;
3611 #ifdef EXT_BUILD_CHANNEL_LIST
3612 pAd->StaCfg.IEEE80211dClientMode = Rt802_11_D_None;
3613 #endif // EXT_BUILD_CHANNEL_LIST //
3614 #endif // CONFIG_STA_SUPPORT //
3616 // global variables mXXXX used in MAC protocol state machines
3617 OPSTATUS_SET_FLAG(pAd, fOP_STATUS_RECEIVE_DTIM);
3618 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_ADHOC_ON);
3619 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_INFRA_ON);
3621 // PHY specification
3622 pAd->CommonCfg.PhyMode = PHY_11BG_MIXED; // default PHY mode
3623 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_SHORT_PREAMBLE_INUSED); // CCK use LONG preamble
3625 #ifdef CONFIG_STA_SUPPORT
3626 IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
3628 // user desired power mode
3629 pAd->StaCfg.WindowsPowerMode = Ndis802_11PowerModeCAM;
3630 pAd->StaCfg.WindowsBatteryPowerMode = Ndis802_11PowerModeCAM;
3631 pAd->StaCfg.bWindowsACCAMEnable = FALSE;
3634 // CCX v1.0 releated init value
3635 RTMPInitTimer(pAd, &pAd->StaCfg.LeapAuthTimer, GET_TIMER_FUNCTION(LeapAuthTimeout), pAd, FALSE);
3636 pAd->StaCfg.LeapAuthMode = CISCO_AuthModeLEAPNone;
3637 pAd->StaCfg.bCkipOn = FALSE;
3638 #endif // LEAP_SUPPORT //
3640 RTMPInitTimer(pAd, &pAd->StaCfg.StaQuickResponeForRateUpTimer, GET_TIMER_FUNCTION(StaQuickResponeForRateUpExec), pAd, FALSE);
3641 pAd->StaCfg.StaQuickResponeForRateUpTimerRunning = FALSE;
3644 pAd->StaCfg.ScanCnt = 0;
3646 // CCX 2.0 control flag init
3647 pAd->StaCfg.CCXEnable = FALSE;
3648 pAd->StaCfg.CCXReqType = MSRN_TYPE_UNUSED;
3649 pAd->StaCfg.CCXQosECWMin = 4;
3650 pAd->StaCfg.CCXQosECWMax = 10;
3652 pAd->StaCfg.bHwRadio = TRUE; // Default Hardware Radio status is On
3653 pAd->StaCfg.bSwRadio = TRUE; // Default Software Radio status is On
3654 pAd->StaCfg.bRadio = TRUE; // bHwRadio && bSwRadio
3655 pAd->StaCfg.bHardwareRadio = FALSE; // Default is OFF
3656 pAd->StaCfg.bShowHiddenSSID = FALSE; // Default no show
3658 // Nitro mode control
3659 pAd->StaCfg.bAutoReconnect = TRUE;
3661 // Save the init time as last scan time, the system should do scan after 2 seconds.
3662 // This patch is for driver wake up from standby mode, system will do scan right away.
3663 pAd->StaCfg.LastScanTime = 0;
3664 NdisZeroMemory(pAd->nickname, IW_ESSID_MAX_SIZE+1);
3665 sprintf(pAd->nickname, "%s", STA_NIC_DEVICE_NAME);
3666 RTMPInitTimer(pAd, &pAd->StaCfg.WpaDisassocAndBlockAssocTimer, GET_TIMER_FUNCTION(WpaDisassocApAndBlockAssoc), pAd, FALSE);
3667 #ifdef WPA_SUPPLICANT_SUPPORT
3668 pAd->StaCfg.IEEE8021X = FALSE;
3669 pAd->StaCfg.IEEE8021x_required_keys = FALSE;
3670 pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_DISABLE;
3671 #ifdef NATIVE_WPA_SUPPLICANT_SUPPORT
3672 pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_ENABLE;
3673 #endif // NATIVE_WPA_SUPPLICANT_SUPPORT //
3674 #endif // WPA_SUPPLICANT_SUPPORT //
3677 #endif // CONFIG_STA_SUPPORT //
3679 // Default for extra information is not valid
3680 pAd->ExtraInfo = EXTRA_INFO_CLEAR;
3682 // Default Config change flag
3683 pAd->bConfigChanged = FALSE;
3686 // part III. AP configurations
3693 // dynamic BBP R66:sensibity tuning to overcome background noise
3694 pAd->BbpTuning.bEnable = TRUE;
3695 pAd->BbpTuning.FalseCcaLowerThreshold = 100;
3696 pAd->BbpTuning.FalseCcaUpperThreshold = 512;
3697 pAd->BbpTuning.R66Delta = 4;
3698 pAd->Mlme.bEnableAutoAntennaCheck = TRUE;
3701 // Also initial R66CurrentValue, RTUSBResumeMsduTransmission might use this value.
3702 // if not initial this value, the default value will be 0.
3704 pAd->BbpTuning.R66CurrentValue = 0x38;
3706 pAd->Bbp94 = BBPR94_DEFAULT;
3707 pAd->BbpForCCK = FALSE;
3709 // Default is FALSE for test bit 1
3710 //pAd->bTest1 = FALSE;
3712 // initialize MAC table and allocate spin lock
3713 NdisZeroMemory(&pAd->MacTab, sizeof(MAC_TABLE));
3714 InitializeQueueHeader(&pAd->MacTab.McastPsQueue);
3715 NdisAllocateSpinLock(&pAd->MacTabLock);
3717 //RTMPInitTimer(pAd, &pAd->RECBATimer, RECBATimerTimeout, pAd, TRUE);
3718 //RTMPSetTimer(&pAd->RECBATimer, REORDER_EXEC_INTV);
3721 NdisZeroMemory(&pAd->ate, sizeof(ATE_INFO));
3722 pAd->ate.Mode = ATE_STOP;
3723 pAd->ate.TxCount = 200;/* to exceed TX_RING_SIZE ... */
3724 pAd->ate.TxLength = 1024;
3725 pAd->ate.TxWI.ShortGI = 0;// LONG GI : 800 ns
3726 pAd->ate.TxWI.PHYMODE = MODE_CCK;
3727 pAd->ate.TxWI.MCS = 3;
3728 pAd->ate.TxWI.BW = BW_20;
3729 pAd->ate.Channel = 1;
3730 pAd->ate.QID = QID_AC_BE;
3731 pAd->ate.Addr1[0] = 0x00;
3732 pAd->ate.Addr1[1] = 0x11;
3733 pAd->ate.Addr1[2] = 0x22;
3734 pAd->ate.Addr1[3] = 0xAA;
3735 pAd->ate.Addr1[4] = 0xBB;
3736 pAd->ate.Addr1[5] = 0xCC;
3737 NdisMoveMemory(pAd->ate.Addr2, pAd->ate.Addr1, ETH_LENGTH_OF_ADDRESS);
3738 NdisMoveMemory(pAd->ate.Addr3, pAd->ate.Addr1, ETH_LENGTH_OF_ADDRESS);
3739 pAd->ate.bRxFer = 0;
3740 pAd->ate.bQATxStart = FALSE;
3741 pAd->ate.bQARxStart = FALSE;
3742 #ifdef RALINK_28xx_QA
3743 //pAd->ate.Repeat = 0;
3744 pAd->ate.TxStatus = 0;
3745 pAd->ate.AtePid = 0;
3746 #endif // RALINK_28xx_QA //
3747 #endif // RALINK_ATE //
3750 pAd->CommonCfg.bWiFiTest = FALSE;
3753 DBGPRINT(RT_DEBUG_TRACE, ("<-- UserCfgInit\n"));
3756 // IRQL = PASSIVE_LEVEL
3759 if (ch >= '0' && ch <= '9') return (ch - '0'); // Handle numerals
3760 if (ch >= 'A' && ch <= 'F') return (ch - 'A' + 0xA); // Handle capitol hex digits
3761 if (ch >= 'a' && ch <= 'f') return (ch - 'a' + 0xA); // Handle small hex digits
3766 // FUNCTION: AtoH(char *, UCHAR *, int)
3768 // PURPOSE: Converts ascii string to network order hex
3771 // src - pointer to input ascii string
3772 // dest - pointer to output hex
3773 // destlen - size of dest
3777 // 2 ascii bytes make a hex byte so must put 1st ascii byte of pair
3778 // into upper nibble and 2nd ascii byte of pair into lower nibble.
3780 // IRQL = PASSIVE_LEVEL
3782 void AtoH(char * src, UCHAR * dest, int destlen)
3788 destTemp = (PUCHAR) dest;
3792 *destTemp = BtoH(*srcptr++) << 4; // Put 1st ascii byte in upper nibble.
3793 *destTemp += BtoH(*srcptr++); // Add 2nd ascii byte to above.
3798 VOID RTMPPatchMacBbpBug(
3799 IN PRTMP_ADAPTER pAd)
3803 // Initialize BBP register to default value
3804 for (Index = 0; Index < NUM_BBP_REG_PARMS; Index++)
3806 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[Index].Register, (UCHAR)BBPRegTable[Index].Value);
3809 // Initialize RF register to default value
3810 AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE);
3811 AsicLockChannel(pAd, pAd->CommonCfg.Channel);
3813 // Re-init BBP register from EEPROM value
3814 NICInitAsicFromEEPROM(pAd);
3818 ========================================================================
3820 Routine Description:
3824 pAd Pointer to our adapter
3825 pTimer Timer structure
3826 pTimerFunc Function to execute when timer expired
3827 Repeat Ture for period timer
3834 ========================================================================
3837 IN PRTMP_ADAPTER pAd,
3838 IN PRALINK_TIMER_STRUCT pTimer,
3839 IN PVOID pTimerFunc,
3844 // Set Valid to TRUE for later used.
3845 // It will crash if we cancel a timer or set a timer
3846 // that we haven't initialize before.
3848 pTimer->Valid = TRUE;
3850 pTimer->PeriodicType = Repeat;
3851 pTimer->State = FALSE;
3852 pTimer->cookie = (ULONG) pData;
3858 RTMP_OS_Init_Timer(pAd, &pTimer->TimerObj, pTimerFunc, (PVOID) pTimer);
3862 ========================================================================
3864 Routine Description:
3868 pTimer Timer structure
3869 Value Timer value in milliseconds
3875 To use this routine, must call RTMPInitTimer before.
3877 ========================================================================
3880 IN PRALINK_TIMER_STRUCT pTimer,
3885 pTimer->TimerValue = Value;
3886 pTimer->State = FALSE;
3887 if (pTimer->PeriodicType == TRUE)
3889 pTimer->Repeat = TRUE;
3890 RTMP_SetPeriodicTimer(&pTimer->TimerObj, Value);
3894 pTimer->Repeat = FALSE;
3895 RTMP_OS_Add_Timer(&pTimer->TimerObj, Value);
3900 DBGPRINT_ERR(("RTMPSetTimer failed, Timer hasn't been initialize!\n"));
3906 ========================================================================
3908 Routine Description:
3912 pTimer Timer structure
3913 Value Timer value in milliseconds
3919 To use this routine, must call RTMPInitTimer before.
3921 ========================================================================
3924 IN PRALINK_TIMER_STRUCT pTimer,
3931 pTimer->TimerValue = Value;
3932 pTimer->State = FALSE;
3933 if (pTimer->PeriodicType == TRUE)
3935 RTMPCancelTimer(pTimer, &Cancel);
3936 RTMPSetTimer(pTimer, Value);
3940 RTMP_OS_Mod_Timer(&pTimer->TimerObj, Value);
3945 DBGPRINT_ERR(("RTMPModTimer failed, Timer hasn't been initialize!\n"));
3950 ========================================================================
3952 Routine Description:
3953 Cancel timer objects
3956 Adapter Pointer to our adapter
3961 IRQL = PASSIVE_LEVEL
3962 IRQL = DISPATCH_LEVEL
3965 1.) To use this routine, must call RTMPInitTimer before.
3966 2.) Reset NIC to initial state AS IS system boot up time.
3968 ========================================================================
3970 VOID RTMPCancelTimer(
3971 IN PRALINK_TIMER_STRUCT pTimer,
3972 OUT BOOLEAN *pCancelled)
3976 if (pTimer->State == FALSE)
3977 pTimer->Repeat = FALSE;
3978 RTMP_OS_Del_Timer(&pTimer->TimerObj, pCancelled);
3980 if (*pCancelled == TRUE)
3981 pTimer->State = TRUE;
3984 // We need to go-through the TimerQ to findout this timer handler and remove it if
3985 // it's still waiting for execution.
3987 RT2870_TimerQ_Remove(pTimer->pAd, pTimer);
3993 // NdisMCancelTimer just canced the timer and not mean release the timer.
3994 // And don't set the "Valid" to False. So that we can use this timer again.
3996 DBGPRINT_ERR(("RTMPCancelTimer failed, Timer hasn't been initialize!\n"));
4001 ========================================================================
4003 Routine Description:
4007 pAd Pointer to our adapter
4013 IRQL = PASSIVE_LEVEL
4014 IRQL = DISPATCH_LEVEL
4018 ========================================================================
4021 IN PRTMP_ADAPTER pAd,
4028 // In ATE mode of RT2860 AP/STA, we have erased 8051 firmware.
4029 // So LED mode is not supported when ATE is running.
4033 #endif // RALINK_ATE //
4035 LowByte = pAd->LedCntl.field.LedMode&0x7f;
4040 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
4041 pAd->LedIndicatorStregth = 0;
4044 if (pAd->CommonCfg.Channel > 14)
4048 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
4052 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
4055 LowByte = 0; // Driver sets MAC register and MAC controls LED
4058 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
4062 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
4064 case LED_ON_SITE_SURVEY:
4066 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
4070 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
4073 DBGPRINT(RT_DEBUG_WARN, ("RTMPSetLED::Unknown Status %d\n", Status));
4078 // Keep LED status for LED SiteSurvey mode.
4079 // After SiteSurvey, we will set the LED mode to previous status.
4081 if ((Status != LED_ON_SITE_SURVEY) && (Status != LED_POWER_UP))
4082 pAd->LedStatus = Status;
4084 DBGPRINT(RT_DEBUG_TRACE, ("RTMPSetLED::Mode=%d,HighByte=0x%02x,LowByte=0x%02x\n", pAd->LedCntl.field.LedMode, HighByte, LowByte));
4088 ========================================================================
4090 Routine Description:
4091 Set LED Signal Stregth
4094 pAd Pointer to our adapter
4100 IRQL = PASSIVE_LEVEL
4103 Can be run on any IRQL level.
4105 According to Microsoft Zero Config Wireless Signal Stregth definition as belows.
4112 ========================================================================
4114 VOID RTMPSetSignalLED(
4115 IN PRTMP_ADAPTER pAd,
4116 IN NDIS_802_11_RSSI Dbm)
4121 // if not Signal Stregth, then do nothing.
4123 if (pAd->LedCntl.field.LedMode != LED_MODE_SIGNAL_STREGTH)
4130 else if (Dbm <= -81)
4132 else if (Dbm <= -71)
4134 else if (Dbm <= -67)
4136 else if (Dbm <= -57)
4142 // Update Signal Stregth to firmware if changed.
4144 if (pAd->LedIndicatorStregth != nLed)
4146 AsicSendCommandToMcu(pAd, 0x51, 0xff, nLed, pAd->LedCntl.field.Polarity);
4147 pAd->LedIndicatorStregth = nLed;
4152 ========================================================================
4154 Routine Description:
4158 pAd Pointer to our adapter
4163 IRQL <= DISPATCH_LEVEL
4166 Before Enable RX, make sure you have enabled Interrupt.
4167 ========================================================================
4169 VOID RTMPEnableRxTx(
4170 IN PRTMP_ADAPTER pAd)
4172 // WPDMA_GLO_CFG_STRUC GloCfg;
4175 DBGPRINT(RT_DEBUG_TRACE, ("==> RTMPEnableRxTx\n"));
4178 RT28XXDMAEnable(pAd);
4180 // enable RX of MAC block
4181 if (pAd->OpMode == OPMODE_AP)
4183 UINT32 rx_filter_flag = APNORMAL;
4186 RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, rx_filter_flag); // enable RX of DMA block
4190 RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, STANORMAL); // Staion not drop control frame will fail WiFi Certification.
4193 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0xc);
4194 DBGPRINT(RT_DEBUG_TRACE, ("<== RTMPEnableRxTx\n"));