2 *************************************************************************
4 * 5F., No.36, Taiyuan St., Jhubei City,
8 * (c) Copyright 2002-2007, Ralink Technology, Inc.
10 * This program is free software; you can redistribute it and/or modify *
11 * it under the terms of the GNU General Public License as published by *
12 * the Free Software Foundation; either version 2 of the License, or *
13 * (at your option) any later version. *
15 * This program is distributed in the hope that it will be useful, *
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
18 * GNU General Public License for more details. *
20 * You should have received a copy of the GNU General Public License *
21 * along with this program; if not, write to the *
22 * Free Software Foundation, Inc., *
23 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
25 *************************************************************************
31 Specific funcitons and variables for RT30xx.
35 -------- ---------- ----------------------------------------------
40 #ifndef RTMP_RF_RW_SUPPORT
41 #error "You Should Enable compile flag RTMP_RF_RW_SUPPORT for this chip"
42 #endif // RTMP_RF_RW_SUPPORT //
44 #include "../rt_config.h"
47 // RF register initialization set
49 REG_PAIR RT30xx_RFRegTable[] = {
90 UCHAR NUM_RF_REG_PARMS = (sizeof(RT30xx_RFRegTable) / sizeof(REG_PAIR));
92 // Antenna divesity use GPIO3 and EESK pin for control
93 // Antenna and EEPROM access are both using EESK pin,
94 // Therefor we should avoid accessing EESK at the same time
95 // Then restore antenna after EEPROM access
96 // The original name of this function is AsicSetRxAnt(), now change to
98 VOID RT30xxSetRxAnt(IN PRTMP_ADAPTER pAd, IN UCHAR Ant)
105 if ((pAd->EepromAccess) ||
106 (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_RESET_IN_PROGRESS)) ||
107 (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_HALT_IN_PROGRESS)) ||
108 (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF)) ||
109 (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST))) {
112 // the antenna selection is through firmware and MAC register(GPIO3)
116 RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
118 RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
120 AsicSendCommandToMcu(pAd, 0x73, 0xFF, 0x1, 0x0);
121 #endif // RTMP_MAC_PCI //
123 RTMP_IO_READ32(pAd, GPIO_CTRL_CFG, &Value);
125 RTMP_IO_WRITE32(pAd, GPIO_CTRL_CFG, Value);
126 DBGPRINT_RAW(RT_DEBUG_TRACE,
127 ("AsicSetRxAnt, switch to main antenna\n"));
131 RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
133 RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
135 AsicSendCommandToMcu(pAd, 0x73, 0xFF, 0x0, 0x0);
136 #endif // RTMP_MAC_PCI //
137 RTMP_IO_READ32(pAd, GPIO_CTRL_CFG, &Value);
140 RTMP_IO_WRITE32(pAd, GPIO_CTRL_CFG, Value);
141 DBGPRINT_RAW(RT_DEBUG_TRACE,
142 ("AsicSetRxAnt, switch to aux antenna\n"));
147 ========================================================================
150 For RF filter calibration purpose
153 pAd Pointer to our adapter
160 ========================================================================
162 VOID RTMPFilterCalibration(IN PRTMP_ADAPTER pAd)
164 UCHAR R55x = 0, value, FilterTarget = 0x1E, BBPValue = 0;
165 UINT loop = 0, count = 0, loopcnt = 0, ReTry = 0;
166 UCHAR RF_R24_Value = 0;
168 // Give bbp filter initial value
169 pAd->Mlme.CaliBW20RfR24 = 0x1F;
170 pAd->Mlme.CaliBW40RfR24 = 0x2F; //Bit[5] must be 1 for BW 40
173 if (loop == 1) //BandWidth = 40 MHz
175 // Write 0x27 to RF_R24 to program filter
177 RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
178 if (IS_RT3090(pAd) || IS_RT3572(pAd) || IS_RT3390(pAd))
183 // when calibrate BW40, BBP mask must set to BW40.
184 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BBPValue);
187 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BBPValue);
190 RT30xxReadRFRegister(pAd, RF_R31, &value);
192 RT30xxWriteRFRegister(pAd, RF_R31, value);
193 } else //BandWidth = 20 MHz
195 // Write 0x07 to RF_R24 to program filter
197 RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
198 if (IS_RT3090(pAd) || IS_RT3572(pAd) || IS_RT3390(pAd))
204 RT30xxReadRFRegister(pAd, RF_R31, &value);
206 RT30xxWriteRFRegister(pAd, RF_R31, value);
209 // Write 0x01 to RF_R22 to enable baseband loopback mode
210 RT30xxReadRFRegister(pAd, RF_R22, &value);
212 RT30xxWriteRFRegister(pAd, RF_R22, value);
214 // Write 0x00 to BBP_R24 to set power & frequency of passband test tone
215 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, 0);
218 // Write 0x90 to BBP_R25 to transmit test tone
219 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R25, 0x90);
222 // Read BBP_R55[6:0] for received power, set R55x = BBP_R55[6:0]
223 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R55, &value);
226 } while ((ReTry++ < 100) && (R55x == 0));
228 // Write 0x06 to BBP_R24 to set power & frequency of stopband test tone
229 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, 0x06);
232 // Write 0x90 to BBP_R25 to transmit test tone
233 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R25, 0x90);
235 //We need to wait for calibration
237 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R55, &value);
239 if ((R55x - value) < FilterTarget) {
241 } else if ((R55x - value) == FilterTarget) {
248 // prevent infinite loop cause driver hang.
249 if (loopcnt++ > 100) {
250 DBGPRINT(RT_DEBUG_ERROR,
251 ("RTMPFilterCalibration - can't find a valid value, loopcnt=%d stop calibrating",
255 // Write RF_R24 to program filter
256 RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
260 RF_R24_Value = RF_R24_Value - ((count) ? (1) : (0));
262 // Store for future usage
266 pAd->Mlme.CaliBW20RfR24 = (UCHAR) RF_R24_Value;
269 pAd->Mlme.CaliBW40RfR24 = (UCHAR) RF_R24_Value;
275 RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
282 // Set back to initial state
284 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, 0);
286 RT30xxReadRFRegister(pAd, RF_R22, &value);
288 RT30xxWriteRFRegister(pAd, RF_R22, value);
290 // set BBP back to BW20
291 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BBPValue);
293 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BBPValue);
295 DBGPRINT(RT_DEBUG_TRACE,
296 ("RTMPFilterCalibration - CaliBW20RfR24=0x%x, CaliBW40RfR24=0x%x\n",
297 pAd->Mlme.CaliBW20RfR24, pAd->Mlme.CaliBW40RfR24));
300 // add by johnli, RF power sequence setup
302 ==========================================================================
305 Load RF normal operation-mode setup
307 ==========================================================================
309 VOID RT30xxLoadRFNormalModeSetup(IN PRTMP_ADAPTER pAd)
313 // RX0_PD & TX0_PD, RF R1 register Bit 2 & Bit 3 to 0 and RF_BLOCK_en,RX1_PD & TX1_PD, Bit0, Bit 4 & Bit5 to 1
314 RT30xxReadRFRegister(pAd, RF_R01, &RFValue);
315 RFValue = (RFValue & (~0x0C)) | 0x31;
316 RT30xxWriteRFRegister(pAd, RF_R01, RFValue);
318 // TX_LO2_en, RF R15 register Bit 3 to 0
319 RT30xxReadRFRegister(pAd, RF_R15, &RFValue);
321 RT30xxWriteRFRegister(pAd, RF_R15, RFValue);
323 /* move to NICInitRT30xxRFRegisters
324 // TX_LO1_en, RF R17 register Bit 3 to 0
325 RT30xxReadRFRegister(pAd, RF_R17, &RFValue);
327 // to fix rx long range issue
328 if (((pAd->MACVersion & 0xffff) >= 0x0211) && (pAd->NicConfig2.field.ExternalLNAForG == 0))
332 // set RF_R17_bit[2:0] equal to EEPROM setting at 0x48h
333 if (pAd->TxMixerGain24G >= 2)
335 RFValue &= (~0x7); // clean bit [2:0]
336 RFValue |= pAd->TxMixerGain24G;
338 RT30xxWriteRFRegister(pAd, RF_R17, RFValue);
341 // RX_LO1_en, RF R20 register Bit 3 to 0
342 RT30xxReadRFRegister(pAd, RF_R20, &RFValue);
344 RT30xxWriteRFRegister(pAd, RF_R20, RFValue);
346 // RX_LO2_en, RF R21 register Bit 3 to 0
347 RT30xxReadRFRegister(pAd, RF_R21, &RFValue);
349 RT30xxWriteRFRegister(pAd, RF_R21, RFValue);
351 /* add by johnli, reset RF_R27 when interface down & up to fix throughput problem */
352 // LDORF_VC, RF R27 register Bit 2 to 0
353 RT30xxReadRFRegister(pAd, RF_R27, &RFValue);
354 // TX to RX IQ glitch(RF_R27) has been fixed in RT3070(F).
355 // Raising RF voltage is no longer needed for RT3070(F)
356 if (IS_RT3090(pAd)) // RT309x and RT3071/72
358 if ((pAd->MACVersion & 0xffff) < 0x0211)
359 RFValue = (RFValue & (~0x77)) | 0x3;
361 RFValue = (RFValue & (~0x77));
362 RT30xxWriteRFRegister(pAd, RF_R27, RFValue);
368 ==========================================================================
371 Load RF sleep-mode setup
373 ==========================================================================
375 VOID RT30xxLoadRFSleepModeSetup(IN PRTMP_ADAPTER pAd)
382 #endif // RTMP_MAC_USB //
384 // RF_BLOCK_en. RF R1 register Bit 0 to 0
385 RT30xxReadRFRegister(pAd, RF_R01, &RFValue);
387 RT30xxWriteRFRegister(pAd, RF_R01, RFValue);
389 // VCO_IC, RF R7 register Bit 4 & Bit 5 to 0
390 RT30xxReadRFRegister(pAd, RF_R07, &RFValue);
392 RT30xxWriteRFRegister(pAd, RF_R07, RFValue);
394 // Idoh, RF R9 register Bit 1, Bit 2 & Bit 3 to 0
395 RT30xxReadRFRegister(pAd, RF_R09, &RFValue);
397 RT30xxWriteRFRegister(pAd, RF_R09, RFValue);
399 // RX_CTB_en, RF R21 register Bit 7 to 0
400 RT30xxReadRFRegister(pAd, RF_R21, &RFValue);
402 RT30xxWriteRFRegister(pAd, RF_R21, RFValue);
405 if (IS_RT3090(pAd) || // IS_RT3090 including RT309x and RT3071/72
407 (IS_RT3070(pAd) && ((pAd->MACVersion & 0xffff) < 0x0201))) {
410 #endif // RTMP_MAC_USB //
412 RT30xxReadRFRegister(pAd, RF_R27, &RFValue);
414 RT30xxWriteRFRegister(pAd, RF_R27, RFValue);
417 RTMP_IO_READ32(pAd, LDO_CFG0, &MACValue);
418 MACValue |= 0x1D000000;
419 RTMP_IO_WRITE32(pAd, LDO_CFG0, MACValue);
424 ==========================================================================
427 Reverse RF sleep-mode setup
429 ==========================================================================
431 VOID RT30xxReverseRFSleepModeSetup(IN PRTMP_ADAPTER pAd)
438 #endif // RTMP_MAC_USB //
440 // RF_BLOCK_en, RF R1 register Bit 0 to 1
441 RT30xxReadRFRegister(pAd, RF_R01, &RFValue);
443 RT30xxWriteRFRegister(pAd, RF_R01, RFValue);
445 // VCO_IC, RF R7 register Bit 4 & Bit 5 to 1
446 RT30xxReadRFRegister(pAd, RF_R07, &RFValue);
448 RT30xxWriteRFRegister(pAd, RF_R07, RFValue);
450 // Idoh, RF R9 register Bit 1, Bit 2 & Bit 3 to 1
451 RT30xxReadRFRegister(pAd, RF_R09, &RFValue);
453 RT30xxWriteRFRegister(pAd, RF_R09, RFValue);
455 // RX_CTB_en, RF R21 register Bit 7 to 1
456 RT30xxReadRFRegister(pAd, RF_R21, &RFValue);
458 RT30xxWriteRFRegister(pAd, RF_R21, RFValue);
461 if (IS_RT3090(pAd) || // IS_RT3090 including RT309x and RT3071/72
464 (IS_RT3070(pAd) && ((pAd->MACVersion & 0xffff) < 0x0201))) {
467 #endif // RTMP_MAC_USB //
469 RT30xxReadRFRegister(pAd, RF_R27, &RFValue);
470 if ((pAd->MACVersion & 0xffff) < 0x0211)
471 RFValue = (RFValue & (~0x77)) | 0x3;
473 RFValue = (RFValue & (~0x77));
474 RT30xxWriteRFRegister(pAd, RF_R27, RFValue);
476 // RT3071 version E has fixed this issue
477 if ((pAd->NicConfig2.field.DACTestBit == 1)
478 && ((pAd->MACVersion & 0xffff) < 0x0211)) {
479 // patch tx EVM issue temporarily
480 RTMP_IO_READ32(pAd, LDO_CFG0, &MACValue);
481 MACValue = ((MACValue & 0xE0FFFFFF) | 0x0D000000);
482 RTMP_IO_WRITE32(pAd, LDO_CFG0, MACValue);
484 RTMP_IO_READ32(pAd, LDO_CFG0, &MACValue);
485 MACValue = ((MACValue & 0xE0FFFFFF) | 0x01000000);
486 RTMP_IO_WRITE32(pAd, LDO_CFG0, MACValue);
491 RT30xxWriteRFRegister(pAd, RF_R08, 0x80);
496 VOID RT30xxHaltAction(IN PRTMP_ADAPTER pAd)
498 UINT32 TxPinCfg = 0x00050F0F;
501 // Turn off LNA_PE or TRSW_POL
503 if (IS_RT3070(pAd) || IS_RT3071(pAd) || IS_RT3572(pAd)) {
504 if ((IS_RT3071(pAd) || IS_RT3572(pAd))
505 #ifdef RTMP_EFUSE_SUPPORT
507 #endif // RTMP_EFUSE_SUPPORT //
509 TxPinCfg &= 0xFFFBF0F0; // bit18 off
511 TxPinCfg &= 0xFFFFF0F0;
514 RTMP_IO_WRITE32(pAd, TX_PIN_CFG, TxPinCfg);