Staging: rt28x0: run *.c files through Lindent
[pandora-kernel.git] / drivers / staging / rt2860 / chips / rt30xx.c
1 /*
2  *************************************************************************
3  * Ralink Tech Inc.
4  * 5F., No.36, Taiyuan St., Jhubei City,
5  * Hsinchu County 302,
6  * Taiwan, R.O.C.
7  *
8  * (c) Copyright 2002-2007, Ralink Technology, Inc.
9  *
10  * This program is free software; you can redistribute it and/or modify  *
11  * it under the terms of the GNU General Public License as published by  *
12  * the Free Software Foundation; either version 2 of the License, or     *
13  * (at your option) any later version.                                   *
14  *                                                                       *
15  * This program is distributed in the hope that it will be useful,       *
16  * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
18  * GNU General Public License for more details.                          *
19  *                                                                       *
20  * You should have received a copy of the GNU General Public License     *
21  * along with this program; if not, write to the                         *
22  * Free Software Foundation, Inc.,                                       *
23  * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
24  *                                                                       *
25  *************************************************************************
26
27         Module Name:
28         rt30xx.c
29
30         Abstract:
31         Specific funcitons and variables for RT30xx.
32
33         Revision History:
34         Who         When          What
35         --------    ----------    ----------------------------------------------
36 */
37
38 #ifdef RT30xx
39
40 #ifndef RTMP_RF_RW_SUPPORT
41 #error "You Should Enable compile flag RTMP_RF_RW_SUPPORT for this chip"
42 #endif // RTMP_RF_RW_SUPPORT //
43
44 #include "../rt_config.h"
45
46 //
47 // RF register initialization set
48 //
49 REG_PAIR RT30xx_RFRegTable[] = {
50         {RF_R04, 0x40}
51         ,
52         {RF_R05, 0x03}
53         ,
54         {RF_R06, 0x02}
55         ,
56         {RF_R07, 0x70}
57         ,
58         {RF_R09, 0x0F}
59         ,
60         {RF_R10, 0x41}
61         ,
62         {RF_R11, 0x21}
63         ,
64         {RF_R12, 0x7B}
65         ,
66         {RF_R14, 0x90}
67         ,
68         {RF_R15, 0x58}
69         ,
70         {RF_R16, 0xB3}
71         ,
72         {RF_R17, 0x92}
73         ,
74         {RF_R18, 0x2C}
75         ,
76         {RF_R19, 0x02}
77         ,
78         {RF_R20, 0xBA}
79         ,
80         {RF_R21, 0xDB}
81         ,
82         {RF_R24, 0x16}
83         ,
84         {RF_R25, 0x01}
85         ,
86         {RF_R29, 0x1F}
87         ,
88 };
89
90 UCHAR NUM_RF_REG_PARMS = (sizeof(RT30xx_RFRegTable) / sizeof(REG_PAIR));
91
92 // Antenna divesity use GPIO3 and EESK pin for control
93 // Antenna and EEPROM access are both using EESK pin,
94 // Therefor we should avoid accessing EESK at the same time
95 // Then restore antenna after EEPROM access
96 // The original name of this function is AsicSetRxAnt(), now change to
97 //VOID AsicSetRxAnt(
98 VOID RT30xxSetRxAnt(IN PRTMP_ADAPTER pAd, IN UCHAR Ant)
99 {
100         UINT32 Value;
101 #ifdef RTMP_MAC_PCI
102         UINT32 x;
103 #endif
104
105         if ((pAd->EepromAccess) ||
106             (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_RESET_IN_PROGRESS)) ||
107             (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_HALT_IN_PROGRESS)) ||
108             (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF)) ||
109             (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST))) {
110                 return;
111         }
112         // the antenna selection is through firmware and MAC register(GPIO3)
113         if (Ant == 0) {
114                 // Main antenna
115 #ifdef RTMP_MAC_PCI
116                 RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
117                 x |= (EESK);
118                 RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
119 #else
120                 AsicSendCommandToMcu(pAd, 0x73, 0xFF, 0x1, 0x0);
121 #endif // RTMP_MAC_PCI //
122
123                 RTMP_IO_READ32(pAd, GPIO_CTRL_CFG, &Value);
124                 Value &= ~(0x0808);
125                 RTMP_IO_WRITE32(pAd, GPIO_CTRL_CFG, Value);
126                 DBGPRINT_RAW(RT_DEBUG_TRACE,
127                              ("AsicSetRxAnt, switch to main antenna\n"));
128         } else {
129                 // Aux antenna
130 #ifdef RTMP_MAC_PCI
131                 RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
132                 x &= ~(EESK);
133                 RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
134 #else
135                 AsicSendCommandToMcu(pAd, 0x73, 0xFF, 0x0, 0x0);
136 #endif // RTMP_MAC_PCI //
137                 RTMP_IO_READ32(pAd, GPIO_CTRL_CFG, &Value);
138                 Value &= ~(0x0808);
139                 Value |= 0x08;
140                 RTMP_IO_WRITE32(pAd, GPIO_CTRL_CFG, Value);
141                 DBGPRINT_RAW(RT_DEBUG_TRACE,
142                              ("AsicSetRxAnt, switch to aux antenna\n"));
143         }
144 }
145
146 /*
147         ========================================================================
148
149         Routine Description:
150                 For RF filter calibration purpose
151
152         Arguments:
153                 pAd                          Pointer to our adapter
154
155         Return Value:
156                 None
157
158         IRQL = PASSIVE_LEVEL
159
160         ========================================================================
161 */
162 VOID RTMPFilterCalibration(IN PRTMP_ADAPTER pAd)
163 {
164         UCHAR R55x = 0, value, FilterTarget = 0x1E, BBPValue = 0;
165         UINT loop = 0, count = 0, loopcnt = 0, ReTry = 0;
166         UCHAR RF_R24_Value = 0;
167
168         // Give bbp filter initial value
169         pAd->Mlme.CaliBW20RfR24 = 0x1F;
170         pAd->Mlme.CaliBW40RfR24 = 0x2F; //Bit[5] must be 1 for BW 40
171
172         do {
173                 if (loop == 1)  //BandWidth = 40 MHz
174                 {
175                         // Write 0x27 to RF_R24 to program filter
176                         RF_R24_Value = 0x27;
177                         RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
178                         if (IS_RT3090(pAd) || IS_RT3572(pAd) || IS_RT3390(pAd))
179                                 FilterTarget = 0x15;
180                         else
181                                 FilterTarget = 0x19;
182
183                         // when calibrate BW40, BBP mask must set to BW40.
184                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BBPValue);
185                         BBPValue &= (~0x18);
186                         BBPValue |= (0x10);
187                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BBPValue);
188
189                         // set to BW40
190                         RT30xxReadRFRegister(pAd, RF_R31, &value);
191                         value |= 0x20;
192                         RT30xxWriteRFRegister(pAd, RF_R31, value);
193                 } else          //BandWidth = 20 MHz
194                 {
195                         // Write 0x07 to RF_R24 to program filter
196                         RF_R24_Value = 0x07;
197                         RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
198                         if (IS_RT3090(pAd) || IS_RT3572(pAd) || IS_RT3390(pAd))
199                                 FilterTarget = 0x13;
200                         else
201                                 FilterTarget = 0x16;
202
203                         // set to BW20
204                         RT30xxReadRFRegister(pAd, RF_R31, &value);
205                         value &= (~0x20);
206                         RT30xxWriteRFRegister(pAd, RF_R31, value);
207                 }
208
209                 // Write 0x01 to RF_R22 to enable baseband loopback mode
210                 RT30xxReadRFRegister(pAd, RF_R22, &value);
211                 value |= 0x01;
212                 RT30xxWriteRFRegister(pAd, RF_R22, value);
213
214                 // Write 0x00 to BBP_R24 to set power & frequency of passband test tone
215                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, 0);
216
217                 do {
218                         // Write 0x90 to BBP_R25 to transmit test tone
219                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R25, 0x90);
220
221                         RTMPusecDelay(1000);
222                         // Read BBP_R55[6:0] for received power, set R55x = BBP_R55[6:0]
223                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R55, &value);
224                         R55x = value & 0xFF;
225
226                 } while ((ReTry++ < 100) && (R55x == 0));
227
228                 // Write 0x06 to BBP_R24 to set power & frequency of stopband test tone
229                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, 0x06);
230
231                 while (TRUE) {
232                         // Write 0x90 to BBP_R25 to transmit test tone
233                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R25, 0x90);
234
235                         //We need to wait for calibration
236                         RTMPusecDelay(1000);
237                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R55, &value);
238                         value &= 0xFF;
239                         if ((R55x - value) < FilterTarget) {
240                                 RF_R24_Value++;
241                         } else if ((R55x - value) == FilterTarget) {
242                                 RF_R24_Value++;
243                                 count++;
244                         } else {
245                                 break;
246                         }
247
248                         // prevent infinite loop cause driver hang.
249                         if (loopcnt++ > 100) {
250                                 DBGPRINT(RT_DEBUG_ERROR,
251                                          ("RTMPFilterCalibration - can't find a valid value, loopcnt=%d stop calibrating",
252                                           loopcnt));
253                                 break;
254                         }
255                         // Write RF_R24 to program filter
256                         RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
257                 }
258
259                 if (count > 0) {
260                         RF_R24_Value = RF_R24_Value - ((count) ? (1) : (0));
261                 }
262                 // Store for future usage
263                 if (loopcnt < 100) {
264                         if (loop++ == 0) {
265                                 //BandWidth = 20 MHz
266                                 pAd->Mlme.CaliBW20RfR24 = (UCHAR) RF_R24_Value;
267                         } else {
268                                 //BandWidth = 40 MHz
269                                 pAd->Mlme.CaliBW40RfR24 = (UCHAR) RF_R24_Value;
270                                 break;
271                         }
272                 } else
273                         break;
274
275                 RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
276
277                 // reset count
278                 count = 0;
279         } while (TRUE);
280
281         //
282         // Set back to initial state
283         //
284         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, 0);
285
286         RT30xxReadRFRegister(pAd, RF_R22, &value);
287         value &= ~(0x01);
288         RT30xxWriteRFRegister(pAd, RF_R22, value);
289
290         // set BBP back to BW20
291         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BBPValue);
292         BBPValue &= (~0x18);
293         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BBPValue);
294
295         DBGPRINT(RT_DEBUG_TRACE,
296                  ("RTMPFilterCalibration - CaliBW20RfR24=0x%x, CaliBW40RfR24=0x%x\n",
297                   pAd->Mlme.CaliBW20RfR24, pAd->Mlme.CaliBW40RfR24));
298 }
299
300 // add by johnli, RF power sequence setup
301 /*
302         ==========================================================================
303         Description:
304
305         Load RF normal operation-mode setup
306
307         ==========================================================================
308  */
309 VOID RT30xxLoadRFNormalModeSetup(IN PRTMP_ADAPTER pAd)
310 {
311         UCHAR RFValue;
312
313         // RX0_PD & TX0_PD, RF R1 register Bit 2 & Bit 3 to 0 and RF_BLOCK_en,RX1_PD & TX1_PD, Bit0, Bit 4 & Bit5 to 1
314         RT30xxReadRFRegister(pAd, RF_R01, &RFValue);
315         RFValue = (RFValue & (~0x0C)) | 0x31;
316         RT30xxWriteRFRegister(pAd, RF_R01, RFValue);
317
318         // TX_LO2_en, RF R15 register Bit 3 to 0
319         RT30xxReadRFRegister(pAd, RF_R15, &RFValue);
320         RFValue &= (~0x08);
321         RT30xxWriteRFRegister(pAd, RF_R15, RFValue);
322
323         /* move to NICInitRT30xxRFRegisters
324            // TX_LO1_en, RF R17 register Bit 3 to 0
325            RT30xxReadRFRegister(pAd, RF_R17, &RFValue);
326            RFValue &= (~0x08);
327            // to fix rx long range issue
328            if (((pAd->MACVersion & 0xffff) >= 0x0211) && (pAd->NicConfig2.field.ExternalLNAForG == 0))
329            {
330            RFValue |= 0x20;
331            }
332            // set RF_R17_bit[2:0] equal to EEPROM setting at 0x48h
333            if (pAd->TxMixerGain24G >= 2)
334            {
335            RFValue &= (~0x7);  // clean bit [2:0]
336            RFValue |= pAd->TxMixerGain24G;
337            }
338            RT30xxWriteRFRegister(pAd, RF_R17, RFValue);
339          */
340
341         // RX_LO1_en, RF R20 register Bit 3 to 0
342         RT30xxReadRFRegister(pAd, RF_R20, &RFValue);
343         RFValue &= (~0x08);
344         RT30xxWriteRFRegister(pAd, RF_R20, RFValue);
345
346         // RX_LO2_en, RF R21 register Bit 3 to 0
347         RT30xxReadRFRegister(pAd, RF_R21, &RFValue);
348         RFValue &= (~0x08);
349         RT30xxWriteRFRegister(pAd, RF_R21, RFValue);
350
351         /* add by johnli, reset RF_R27 when interface down & up to fix throughput problem */
352         // LDORF_VC, RF R27 register Bit 2 to 0
353         RT30xxReadRFRegister(pAd, RF_R27, &RFValue);
354         // TX to RX IQ glitch(RF_R27) has been fixed in RT3070(F).
355         // Raising RF voltage is no longer needed for RT3070(F)
356         if (IS_RT3090(pAd))     // RT309x and RT3071/72
357         {
358                 if ((pAd->MACVersion & 0xffff) < 0x0211)
359                         RFValue = (RFValue & (~0x77)) | 0x3;
360                 else
361                         RFValue = (RFValue & (~0x77));
362                 RT30xxWriteRFRegister(pAd, RF_R27, RFValue);
363         }
364         /* end johnli */
365 }
366
367 /*
368         ==========================================================================
369         Description:
370
371         Load RF sleep-mode setup
372
373         ==========================================================================
374  */
375 VOID RT30xxLoadRFSleepModeSetup(IN PRTMP_ADAPTER pAd)
376 {
377         UCHAR RFValue;
378         UINT32 MACValue;
379
380 #ifdef RTMP_MAC_USB
381         if (!IS_RT3572(pAd))
382 #endif // RTMP_MAC_USB //
383         {
384                 // RF_BLOCK_en. RF R1 register Bit 0 to 0
385                 RT30xxReadRFRegister(pAd, RF_R01, &RFValue);
386                 RFValue &= (~0x01);
387                 RT30xxWriteRFRegister(pAd, RF_R01, RFValue);
388
389                 // VCO_IC, RF R7 register Bit 4 & Bit 5 to 0
390                 RT30xxReadRFRegister(pAd, RF_R07, &RFValue);
391                 RFValue &= (~0x30);
392                 RT30xxWriteRFRegister(pAd, RF_R07, RFValue);
393
394                 // Idoh, RF R9 register Bit 1, Bit 2 & Bit 3 to 0
395                 RT30xxReadRFRegister(pAd, RF_R09, &RFValue);
396                 RFValue &= (~0x0E);
397                 RT30xxWriteRFRegister(pAd, RF_R09, RFValue);
398
399                 // RX_CTB_en, RF R21 register Bit 7 to 0
400                 RT30xxReadRFRegister(pAd, RF_R21, &RFValue);
401                 RFValue &= (~0x80);
402                 RT30xxWriteRFRegister(pAd, RF_R21, RFValue);
403         }
404
405         if (IS_RT3090(pAd) ||   // IS_RT3090 including RT309x and RT3071/72
406             IS_RT3572(pAd) ||
407             (IS_RT3070(pAd) && ((pAd->MACVersion & 0xffff) < 0x0201))) {
408 #ifdef RTMP_MAC_USB
409                 if (!IS_RT3572(pAd))
410 #endif // RTMP_MAC_USB //
411                 {
412                         RT30xxReadRFRegister(pAd, RF_R27, &RFValue);
413                         RFValue |= 0x77;
414                         RT30xxWriteRFRegister(pAd, RF_R27, RFValue);
415                 }
416
417                 RTMP_IO_READ32(pAd, LDO_CFG0, &MACValue);
418                 MACValue |= 0x1D000000;
419                 RTMP_IO_WRITE32(pAd, LDO_CFG0, MACValue);
420         }
421 }
422
423 /*
424         ==========================================================================
425         Description:
426
427         Reverse RF sleep-mode setup
428
429         ==========================================================================
430  */
431 VOID RT30xxReverseRFSleepModeSetup(IN PRTMP_ADAPTER pAd)
432 {
433         UCHAR RFValue;
434         UINT32 MACValue;
435
436 #ifdef RTMP_MAC_USB
437         if (!IS_RT3572(pAd))
438 #endif // RTMP_MAC_USB //
439         {
440                 // RF_BLOCK_en, RF R1 register Bit 0 to 1
441                 RT30xxReadRFRegister(pAd, RF_R01, &RFValue);
442                 RFValue |= 0x01;
443                 RT30xxWriteRFRegister(pAd, RF_R01, RFValue);
444
445                 // VCO_IC, RF R7 register Bit 4 & Bit 5 to 1
446                 RT30xxReadRFRegister(pAd, RF_R07, &RFValue);
447                 RFValue |= 0x30;
448                 RT30xxWriteRFRegister(pAd, RF_R07, RFValue);
449
450                 // Idoh, RF R9 register Bit 1, Bit 2 & Bit 3 to 1
451                 RT30xxReadRFRegister(pAd, RF_R09, &RFValue);
452                 RFValue |= 0x0E;
453                 RT30xxWriteRFRegister(pAd, RF_R09, RFValue);
454
455                 // RX_CTB_en, RF R21 register Bit 7 to 1
456                 RT30xxReadRFRegister(pAd, RF_R21, &RFValue);
457                 RFValue |= 0x80;
458                 RT30xxWriteRFRegister(pAd, RF_R21, RFValue);
459         }
460
461         if (IS_RT3090(pAd) ||   // IS_RT3090 including RT309x and RT3071/72
462             IS_RT3572(pAd) ||
463             IS_RT3390(pAd) ||
464             (IS_RT3070(pAd) && ((pAd->MACVersion & 0xffff) < 0x0201))) {
465 #ifdef RTMP_MAC_USB
466                 if (!IS_RT3572(pAd))
467 #endif // RTMP_MAC_USB //
468                 {
469                         RT30xxReadRFRegister(pAd, RF_R27, &RFValue);
470                         if ((pAd->MACVersion & 0xffff) < 0x0211)
471                                 RFValue = (RFValue & (~0x77)) | 0x3;
472                         else
473                                 RFValue = (RFValue & (~0x77));
474                         RT30xxWriteRFRegister(pAd, RF_R27, RFValue);
475                 }
476                 // RT3071 version E has fixed this issue
477                 if ((pAd->NicConfig2.field.DACTestBit == 1)
478                     && ((pAd->MACVersion & 0xffff) < 0x0211)) {
479                         // patch tx EVM issue temporarily
480                         RTMP_IO_READ32(pAd, LDO_CFG0, &MACValue);
481                         MACValue = ((MACValue & 0xE0FFFFFF) | 0x0D000000);
482                         RTMP_IO_WRITE32(pAd, LDO_CFG0, MACValue);
483                 } else {
484                         RTMP_IO_READ32(pAd, LDO_CFG0, &MACValue);
485                         MACValue = ((MACValue & 0xE0FFFFFF) | 0x01000000);
486                         RTMP_IO_WRITE32(pAd, LDO_CFG0, MACValue);
487                 }
488         }
489
490         if (IS_RT3572(pAd))
491                 RT30xxWriteRFRegister(pAd, RF_R08, 0x80);
492 }
493
494 // end johnli
495
496 VOID RT30xxHaltAction(IN PRTMP_ADAPTER pAd)
497 {
498         UINT32 TxPinCfg = 0x00050F0F;
499
500         //
501         // Turn off LNA_PE or TRSW_POL
502         //
503         if (IS_RT3070(pAd) || IS_RT3071(pAd) || IS_RT3572(pAd)) {
504                 if ((IS_RT3071(pAd) || IS_RT3572(pAd))
505 #ifdef RTMP_EFUSE_SUPPORT
506                     && (pAd->bUseEfuse)
507 #endif // RTMP_EFUSE_SUPPORT //
508                     ) {
509                         TxPinCfg &= 0xFFFBF0F0; // bit18 off
510                 } else {
511                         TxPinCfg &= 0xFFFFF0F0;
512                 }
513
514                 RTMP_IO_WRITE32(pAd, TX_PIN_CFG, TxPinCfg);
515         }
516 }
517
518 #endif // RT30xx //