Staging: meilhaus: Remove long-deprecated SA_* interrupt macros.
[pandora-kernel.git] / drivers / staging / meilhaus / me4600_ai_reg.h
1 /**
2  * @file me4600_ai_reg.h
3  *
4  * @brief ME-4000 analog input subdevice register definitions.
5  * @note Copyright (C) 2007 Meilhaus Electronic GmbH (support@meilhaus.de)
6  * @author Guenter Gebhardt
7  */
8
9 /*
10  * Copyright (C) 2007 Meilhaus Electronic GmbH (support@meilhaus.de)
11  *
12  * This file is free software; you can redistribute it and/or modify
13  * it under the terms of the GNU General Public License as published by
14  * the Free Software Foundation; either version 2 of the License, or
15  * (at your option) any later version.
16  *
17  * This program is distributed in the hope that it will be useful,
18  * but WITHOUT ANY WARRANTY; without even the implied warranty of
19  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
20  * GNU General Public License for more details.
21  *
22  * You should have received a copy of the GNU General Public License
23  * along with this program; if not, write to the Free Software
24  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25  */
26
27 #ifndef _ME4600_AI_REG_H_
28 #define _ME4600_AI_REG_H_
29
30 #ifdef __KERNEL__
31
32 #define ME4600_AI_CTRL_REG                                      0x74    // _/W
33 #define ME4600_AI_STATUS_REG                            0x74    // R/_
34 #define ME4600_AI_CHANNEL_LIST_REG                      0x78    // _/W
35 #define ME4600_AI_DATA_REG                                      0x7C    // R/_
36 #define ME4600_AI_CHAN_TIMER_REG                        0x80    // _/W
37 #define ME4600_AI_CHAN_PRE_TIMER_REG            0x84    // _/W
38 #define ME4600_AI_SCAN_TIMER_LOW_REG            0x88    // _/W
39 #define ME4600_AI_SCAN_TIMER_HIGH_REG           0x8C    // _/W
40 #define ME4600_AI_SCAN_PRE_TIMER_LOW_REG        0x90    // _/W
41 #define ME4600_AI_SCAN_PRE_TIMER_HIGH_REG       0x94    // _/W
42 #define ME4600_AI_START_REG                                     0x98    // R/_
43
44 #define ME4600_AI_SAMPLE_COUNTER_REG            0xC0    // _/W
45
46 #define ME4600_AI_CTRL_BIT_MODE_0                       0x00000001
47 #define ME4600_AI_CTRL_BIT_MODE_1                       0x00000002
48 #define ME4600_AI_CTRL_BIT_MODE_2                       0x00000004
49 #define ME4600_AI_CTRL_BIT_SAMPLE_HOLD          0x00000008
50 #define ME4600_AI_CTRL_BIT_IMMEDIATE_STOP       0x00000010
51 #define ME4600_AI_CTRL_BIT_STOP                         0x00000020
52 #define ME4600_AI_CTRL_BIT_CHANNEL_FIFO         0x00000040
53 #define ME4600_AI_CTRL_BIT_DATA_FIFO            0x00000080
54 #define ME4600_AI_CTRL_BIT_FULLSCALE            0x00000100
55 #define ME4600_AI_CTRL_BIT_OFFSET                       0x00000200
56 #define ME4600_AI_CTRL_BIT_EX_TRIG_ANALOG       0x00000400
57 #define ME4600_AI_CTRL_BIT_EX_TRIG                      0x00000800
58 #define ME4600_AI_CTRL_BIT_EX_TRIG_FALLING      0x00001000
59 #define ME4600_AI_CTRL_BIT_EX_IRQ                       0x00002000
60 #define ME4600_AI_CTRL_BIT_EX_IRQ_RESET         0x00004000
61 #define ME4600_AI_CTRL_BIT_LE_IRQ                       0x00008000
62 #define ME4600_AI_CTRL_BIT_LE_IRQ_RESET         0x00010000
63 #define ME4600_AI_CTRL_BIT_HF_IRQ                       0x00020000
64 #define ME4600_AI_CTRL_BIT_HF_IRQ_RESET         0x00040000
65 #define ME4600_AI_CTRL_BIT_SC_IRQ                       0x00080000
66 #define ME4600_AI_CTRL_BIT_SC_IRQ_RESET         0x00100000
67 #define ME4600_AI_CTRL_BIT_SC_RELOAD            0x00200000
68 #define ME4600_AI_CTRL_BIT_EX_TRIG_BOTH         0x80000000
69
70 #define ME4600_AI_STATUS_BIT_EF_CHANNEL         0x00400000
71 #define ME4600_AI_STATUS_BIT_HF_CHANNEL         0x00800000
72 #define ME4600_AI_STATUS_BIT_FF_CHANNEL         0x01000000
73 #define ME4600_AI_STATUS_BIT_EF_DATA            0x02000000
74 #define ME4600_AI_STATUS_BIT_HF_DATA            0x04000000
75 #define ME4600_AI_STATUS_BIT_FF_DATA            0x08000000
76 #define ME4600_AI_STATUS_BIT_LE                         0x10000000
77 #define ME4600_AI_STATUS_BIT_FSM                        0x20000000
78
79 #define ME4600_AI_CTRL_RPCI_FIFO                        0x40000000      //Always set to zero!
80
81 #define ME4600_AI_BASE_FREQUENCY                        33E6
82
83 #define ME4600_AI_MIN_ACQ_TICKS                         66LL
84 #define ME4600_AI_MAX_ACQ_TICKS                         0xFFFFFFFFLL
85
86 #define ME4600_AI_MIN_SCAN_TICKS                        66LL
87 #define ME4600_AI_MAX_SCAN_TICKS                        0xFFFFFFFFFLL
88
89 #define ME4600_AI_MIN_CHAN_TICKS                        66LL
90 #define ME4600_AI_MAX_CHAN_TICKS                        0xFFFFFFFFLL
91
92 #define ME4600_AI_FIFO_COUNT                            2048
93
94 #define ME4600_AI_LIST_COUNT                            1024
95
96 #define ME4600_AI_LIST_INPUT_SINGLE_ENDED       0x000
97 #define ME4600_AI_LIST_INPUT_DIFFERENTIAL       0x020
98
99 #define ME4600_AI_LIST_RANGE_BIPOLAR_10         0x000
100 #define ME4600_AI_LIST_RANGE_BIPOLAR_2_5        0x040
101 #define ME4600_AI_LIST_RANGE_UNIPOLAR_10        0x080
102 #define ME4600_AI_LIST_RANGE_UNIPOLAR_2_5       0x0C0
103
104 #define ME4600_AI_LIST_LAST_ENTRY               0x100
105
106 #endif
107 #endif