2 * LIRC SIR driver, (C) 2000 Milan Pikula <www@fornax.sk>
4 * lirc_sir - Device driver for use with SIR (serial infra red)
5 * mode of IrDA on many notebooks.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 * 2000/09/16 Frank Przybylski <mail@frankprzybylski.de> :
23 * added timeout and relaxed pulse detection, removed gap bug
25 * 2000/12/15 Christoph Bartelmus <lirc@bartelmus.de> :
26 * added support for Tekram Irmate 210 (sending does not work yet,
27 * kind of disappointing that nobody was able to implement that
31 * 2001/02/27 Christoph Bartelmus <lirc@bartelmus.de> :
32 * added support for StrongARM SA1100 embedded microprocessor
33 * parts cut'n'pasted from sa1100_ir.c (C) 2000 Russell King
36 #include <linux/module.h>
37 #include <linux/sched.h>
38 #include <linux/errno.h>
39 #include <linux/signal.h>
41 #include <linux/interrupt.h>
42 #include <linux/ioport.h>
43 #include <linux/kernel.h>
44 #include <linux/serial_reg.h>
45 #include <linux/time.h>
46 #include <linux/string.h>
47 #include <linux/types.h>
48 #include <linux/wait.h>
50 #include <linux/delay.h>
51 #include <linux/poll.h>
52 #include <asm/system.h>
55 #include <linux/fcntl.h>
56 #include <linux/platform_device.h>
58 #include <asm/hardware.h>
59 #ifdef CONFIG_SA1100_COLLIE
60 #include <asm/arch/tc35143.h>
61 #include <asm/ucb1200.h>
65 #include <linux/timer.h>
67 #include <media/lirc.h>
68 #include <media/lirc_dev.h>
70 /* SECTION: Definitions */
72 /*** Tekram dongle ***/
73 #ifdef LIRC_SIR_TEKRAM
74 /* stolen from kernel source */
75 /* definitions for Tekram dongle */
76 #define TEKRAM_115200 0x00
77 #define TEKRAM_57600 0x01
78 #define TEKRAM_38400 0x02
79 #define TEKRAM_19200 0x03
80 #define TEKRAM_9600 0x04
81 #define TEKRAM_2400 0x08
83 #define TEKRAM_PW 0x10 /* Pulse select bit */
85 /* 10bit * 1s/115200bit in milliseconds = 87ms*/
86 #define TIME_CONST (10000000ul/115200ul)
90 #ifdef LIRC_SIR_ACTISYS_ACT200L
91 static void init_act200(void);
92 #elif defined(LIRC_SIR_ACTISYS_ACT220L)
93 static void init_act220(void);
98 struct sa1100_ser2_registers {
99 /* HSSP control register */
112 static int irq = IRQ_Ser2ICP;
114 #define LIRC_ON_SA1100_TRANSMITTER_LATENCY 0
116 /* pulse/space ratio of 50/50 */
117 static unsigned long pulse_width = (13-LIRC_ON_SA1100_TRANSMITTER_LATENCY);
118 /* 1000000/freq-pulse_width */
119 static unsigned long space_width = (13-LIRC_ON_SA1100_TRANSMITTER_LATENCY);
120 static unsigned int freq = 38000; /* modulation frequency */
121 static unsigned int duty_cycle = 50; /* duty cycle of 50% */
125 #define RBUF_LEN 1024
126 #define WBUF_LEN 1024
128 #define LIRC_DRIVER_NAME "lirc_sir"
132 #ifndef LIRC_SIR_TEKRAM
133 /* 9bit * 1s/115200bit in milli seconds = 78.125ms*/
134 #define TIME_CONST (9000000ul/115200ul)
138 /* timeout for sequences in jiffies (=5/100s), must be longer than TIME_CONST */
139 #define SIR_TIMEOUT (HZ*5/100)
141 #ifndef LIRC_ON_SA1100
146 /* for external dongles, default to com1 */
147 #if defined(LIRC_SIR_ACTISYS_ACT200L) || \
148 defined(LIRC_SIR_ACTISYS_ACT220L) || \
149 defined(LIRC_SIR_TEKRAM)
150 #define LIRC_PORT 0x3f8
152 /* onboard sir ports are typically com3 */
153 #define LIRC_PORT 0x3e8
157 static int io = LIRC_PORT;
158 static int irq = LIRC_IRQ;
159 static int threshold = 3;
162 static DEFINE_SPINLOCK(timer_lock);
163 static struct timer_list timerlist;
164 /* time of last signal change detected */
165 static struct timeval last_tv = {0, 0};
166 /* time of last UART data ready interrupt */
167 static struct timeval last_intr_tv = {0, 0};
168 static int last_value;
170 static DECLARE_WAIT_QUEUE_HEAD(lirc_read_queue);
172 static DEFINE_SPINLOCK(hardware_lock);
174 static int rx_buf[RBUF_LEN];
175 static unsigned int rx_tail, rx_head;
178 #define dprintk(fmt, args...) \
181 printk(KERN_DEBUG LIRC_DRIVER_NAME ": " \
185 /* SECTION: Prototypes */
187 /* Communication with user-space */
188 static unsigned int lirc_poll(struct file *file, poll_table *wait);
189 static ssize_t lirc_read(struct file *file, char *buf, size_t count,
191 static ssize_t lirc_write(struct file *file, const char *buf, size_t n,
193 static long lirc_ioctl(struct file *filep, unsigned int cmd, unsigned long arg);
194 static void add_read_queue(int flag, unsigned long val);
195 static int init_chrdev(void);
196 static void drop_chrdev(void);
198 static irqreturn_t sir_interrupt(int irq, void *dev_id);
199 static void send_space(unsigned long len);
200 static void send_pulse(unsigned long len);
201 static int init_hardware(void);
202 static void drop_hardware(void);
204 static int init_port(void);
205 static void drop_port(void);
207 #ifdef LIRC_ON_SA1100
213 static void off(void)
218 static inline unsigned int sinp(int offset)
220 return inb(io + offset);
223 static inline void soutp(int offset, int value)
225 outb(value, io + offset);
229 #ifndef MAX_UDELAY_MS
230 #define MAX_UDELAY_US 5000
232 #define MAX_UDELAY_US (MAX_UDELAY_MS*1000)
235 static void safe_udelay(unsigned long usecs)
237 while (usecs > MAX_UDELAY_US) {
238 udelay(MAX_UDELAY_US);
239 usecs -= MAX_UDELAY_US;
244 /* SECTION: Communication with user-space */
246 static unsigned int lirc_poll(struct file *file, poll_table *wait)
248 poll_wait(file, &lirc_read_queue, wait);
249 if (rx_head != rx_tail)
250 return POLLIN | POLLRDNORM;
254 static ssize_t lirc_read(struct file *file, char *buf, size_t count,
259 DECLARE_WAITQUEUE(wait, current);
261 if (count % sizeof(int))
264 add_wait_queue(&lirc_read_queue, &wait);
265 set_current_state(TASK_INTERRUPTIBLE);
267 if (rx_head != rx_tail) {
268 if (copy_to_user((void *) buf + n,
269 (void *) (rx_buf + rx_head),
274 rx_head = (rx_head + 1) & (RBUF_LEN - 1);
277 if (file->f_flags & O_NONBLOCK) {
281 if (signal_pending(current)) {
282 retval = -ERESTARTSYS;
286 set_current_state(TASK_INTERRUPTIBLE);
289 remove_wait_queue(&lirc_read_queue, &wait);
290 set_current_state(TASK_RUNNING);
291 return n ? n : retval;
293 static ssize_t lirc_write(struct file *file, const char *buf, size_t n,
300 count = n / sizeof(int);
301 if (n % sizeof(int) || count % 2 == 0)
303 tx_buf = memdup_user(buf, n);
305 return PTR_ERR(tx_buf);
307 #ifdef LIRC_ON_SA1100
308 /* disable receiver */
311 local_irq_save(flags);
316 send_pulse(tx_buf[i]);
321 send_space(tx_buf[i]);
324 local_irq_restore(flags);
325 #ifdef LIRC_ON_SA1100
327 udelay(1000); /* wait 1ms for IR diode to recover */
329 /* clear status register to prevent unwanted interrupts */
330 Ser2UTSR0 &= (UTSR0_RID | UTSR0_RBB | UTSR0_REB);
331 /* enable receiver */
332 Ser2UTCR3 = UTCR3_RXE|UTCR3_RIE;
338 static long lirc_ioctl(struct file *filep, unsigned int cmd, unsigned long arg)
342 #ifdef LIRC_ON_SA1100
344 if (cmd == LIRC_GET_FEATURES)
345 value = LIRC_CAN_SEND_PULSE |
346 LIRC_CAN_SET_SEND_DUTY_CYCLE |
347 LIRC_CAN_SET_SEND_CARRIER |
349 else if (cmd == LIRC_GET_SEND_MODE)
350 value = LIRC_MODE_PULSE;
351 else if (cmd == LIRC_GET_REC_MODE)
352 value = LIRC_MODE_MODE2;
354 if (cmd == LIRC_GET_FEATURES)
355 value = LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2;
356 else if (cmd == LIRC_GET_SEND_MODE)
357 value = LIRC_MODE_PULSE;
358 else if (cmd == LIRC_GET_REC_MODE)
359 value = LIRC_MODE_MODE2;
363 case LIRC_GET_FEATURES:
364 case LIRC_GET_SEND_MODE:
365 case LIRC_GET_REC_MODE:
366 retval = put_user(value, (__u32 *) arg);
369 case LIRC_SET_SEND_MODE:
370 case LIRC_SET_REC_MODE:
371 retval = get_user(value, (__u32 *) arg);
373 #ifdef LIRC_ON_SA1100
374 case LIRC_SET_SEND_DUTY_CYCLE:
375 retval = get_user(value, (__u32 *) arg);
378 if (value <= 0 || value > 100)
380 /* (value/100)*(1000000/freq) */
382 pulse_width = (unsigned long) duty_cycle*10000/freq;
383 space_width = (unsigned long) 1000000L/freq-pulse_width;
384 if (pulse_width >= LIRC_ON_SA1100_TRANSMITTER_LATENCY)
385 pulse_width -= LIRC_ON_SA1100_TRANSMITTER_LATENCY;
386 if (space_width >= LIRC_ON_SA1100_TRANSMITTER_LATENCY)
387 space_width -= LIRC_ON_SA1100_TRANSMITTER_LATENCY;
389 case LIRC_SET_SEND_CARRIER:
390 retval = get_user(value, (__u32 *) arg);
393 if (value > 500000 || value < 20000)
396 pulse_width = (unsigned long) duty_cycle*10000/freq;
397 space_width = (unsigned long) 1000000L/freq-pulse_width;
398 if (pulse_width >= LIRC_ON_SA1100_TRANSMITTER_LATENCY)
399 pulse_width -= LIRC_ON_SA1100_TRANSMITTER_LATENCY;
400 if (space_width >= LIRC_ON_SA1100_TRANSMITTER_LATENCY)
401 space_width -= LIRC_ON_SA1100_TRANSMITTER_LATENCY;
405 retval = -ENOIOCTLCMD;
411 if (cmd == LIRC_SET_REC_MODE) {
412 if (value != LIRC_MODE_MODE2)
414 } else if (cmd == LIRC_SET_SEND_MODE) {
415 if (value != LIRC_MODE_PULSE)
422 static void add_read_queue(int flag, unsigned long val)
424 unsigned int new_rx_tail;
427 dprintk("add flag %d with val %lu\n", flag, val);
429 newval = val & PULSE_MASK;
432 * statistically, pulses are ~TIME_CONST/2 too long. we could
433 * maybe make this more exact, but this is good enough
437 if (newval > TIME_CONST/2)
438 newval -= TIME_CONST/2;
439 else /* should not ever happen */
443 newval += TIME_CONST/2;
445 new_rx_tail = (rx_tail + 1) & (RBUF_LEN - 1);
446 if (new_rx_tail == rx_head) {
447 dprintk("Buffer overrun.\n");
450 rx_buf[rx_tail] = newval;
451 rx_tail = new_rx_tail;
452 wake_up_interruptible(&lirc_read_queue);
455 static const struct file_operations lirc_fops = {
456 .owner = THIS_MODULE,
460 .unlocked_ioctl = lirc_ioctl,
462 .compat_ioctl = lirc_ioctl,
464 .open = lirc_dev_fop_open,
465 .release = lirc_dev_fop_close,
469 static int set_use_inc(void *data)
474 static void set_use_dec(void *data)
478 static struct lirc_driver driver = {
479 .name = LIRC_DRIVER_NAME,
485 .set_use_inc = set_use_inc,
486 .set_use_dec = set_use_dec,
489 .owner = THIS_MODULE,
492 static struct platform_device *lirc_sir_dev;
494 static int init_chrdev(void)
496 driver.dev = &lirc_sir_dev->dev;
497 driver.minor = lirc_register_driver(&driver);
498 if (driver.minor < 0) {
499 printk(KERN_ERR LIRC_DRIVER_NAME ": init_chrdev() failed.\n");
505 static void drop_chrdev(void)
507 lirc_unregister_driver(driver.minor);
510 /* SECTION: Hardware */
511 static long delta(struct timeval *tv1, struct timeval *tv2)
515 deltv = tv2->tv_sec - tv1->tv_sec;
519 deltv = deltv*1000000 +
525 static void sir_timeout(unsigned long data)
528 * if last received signal was a pulse, but receiving stopped
529 * within the 9 bit frame, we need to finish this pulse and
530 * simulate a signal change to from pulse to space. Otherwise
531 * upper layers will receive two sequences next time.
535 unsigned long pulse_end;
537 /* avoid interference with interrupt */
538 spin_lock_irqsave(&timer_lock, flags);
540 #ifndef LIRC_ON_SA1100
541 /* clear unread bits in UART and restart */
542 outb(UART_FCR_CLEAR_RCVR, io + UART_FCR);
544 /* determine 'virtual' pulse end: */
545 pulse_end = delta(&last_tv, &last_intr_tv);
546 dprintk("timeout add %d for %lu usec\n", last_value, pulse_end);
547 add_read_queue(last_value, pulse_end);
549 last_tv = last_intr_tv;
551 spin_unlock_irqrestore(&timer_lock, flags);
554 static irqreturn_t sir_interrupt(int irq, void *dev_id)
557 struct timeval curr_tv;
558 static unsigned long deltv;
559 #ifdef LIRC_ON_SA1100
565 * Deal with any receive errors first. The bytes in error may be
566 * the only bytes in the receive FIFO, so we do this first.
568 while (status & UTSR0_EIF) {
575 if (bstat & UTSR1_FRE)
576 dprintk("frame error\n");
577 if (bstat & UTSR1_ROR)
578 dprintk("receive fifo overrun\n");
579 if (bstat & UTSR1_PRE)
580 dprintk("parity error\n");
588 if (status & (UTSR0_RFS | UTSR0_RID)) {
589 do_gettimeofday(&curr_tv);
590 deltv = delta(&last_tv, &curr_tv);
593 dprintk("%d data: %u\n", n, (unsigned int) data);
595 } while (status & UTSR0_RID && /* do not empty fifo in order to
596 * get UTSR0_RID in any case */
597 Ser2UTSR1 & UTSR1_RNE); /* data ready */
599 if (status&UTSR0_RID) {
600 add_read_queue(0 , deltv - n * TIME_CONST); /*space*/
601 add_read_queue(1, n * TIME_CONST); /*pulse*/
607 if (status & UTSR0_TFS)
608 printk(KERN_ERR "transmit fifo not full, shouldn't happen\n");
610 /* We must clear certain bits. */
611 status &= (UTSR0_RID | UTSR0_RBB | UTSR0_REB);
615 unsigned long deltintrtv;
619 while ((iir = inb(io + UART_IIR) & UART_IIR_ID)) {
620 switch (iir&UART_IIR_ID) { /* FIXME toto treba preriedit */
622 (void) inb(io + UART_MSR);
625 (void) inb(io + UART_LSR);
629 if (lsr & UART_LSR_THRE) /* FIFO is empty */
630 outb(data, io + UART_TX)
634 /* avoid interference with timer */
635 spin_lock_irqsave(&timer_lock, flags);
637 del_timer(&timerlist);
638 data = inb(io + UART_RX);
639 do_gettimeofday(&curr_tv);
640 deltv = delta(&last_tv, &curr_tv);
641 deltintrtv = delta(&last_intr_tv, &curr_tv);
642 dprintk("t %lu, d %d\n", deltintrtv, (int)data);
644 * if nothing came in last X cycles,
647 if (deltintrtv > TIME_CONST * threshold) {
650 /* simulate signal change */
651 add_read_queue(last_value,
658 last_intr_tv.tv_usec;
663 if (data ^ last_value) {
665 * deltintrtv > 2*TIME_CONST, remember?
666 * the other case is timeout
668 add_read_queue(last_value,
672 if (last_tv.tv_usec >= TIME_CONST) {
673 last_tv.tv_usec -= TIME_CONST;
676 last_tv.tv_usec += 1000000 -
680 last_intr_tv = curr_tv;
683 * start timer for end of
686 timerlist.expires = jiffies +
688 add_timer(&timerlist);
691 lsr = inb(io + UART_LSR);
692 } while (lsr & UART_LSR_DR); /* data ready */
693 spin_unlock_irqrestore(&timer_lock, flags);
700 return IRQ_RETVAL(IRQ_HANDLED);
703 #ifdef LIRC_ON_SA1100
704 static void send_pulse(unsigned long length)
706 unsigned long k, delay;
712 * this won't give us the carrier frequency we really want
713 * due to integer arithmetic, but we can accept this inaccuracy
716 for (k = flag = 0; k < length; k += delay, flag = !flag) {
729 static void send_space(unsigned long length)
737 static void send_space(unsigned long len)
742 static void send_pulse(unsigned long len)
744 long bytes_out = len / TIME_CONST;
749 while (bytes_out--) {
750 outb(PULSE, io + UART_TX);
751 /* FIXME treba seriozne cakanie z char/serial.c */
752 while (!(inb(io + UART_LSR) & UART_LSR_THRE))
758 #ifdef CONFIG_SA1100_COLLIE
759 static int sa1100_irda_set_power_collie(int state)
764 * 1 - short range, lowest power
765 * 2 - medium range, medium power
766 * 3 - maximum range, high power
768 ucb1200_set_io_direction(TC35143_GPIO_IR_ON,
769 TC35143_IODIR_OUTPUT);
770 ucb1200_set_io(TC35143_GPIO_IR_ON, TC35143_IODAT_LOW);
774 ucb1200_set_io_direction(TC35143_GPIO_IR_ON,
775 TC35143_IODIR_OUTPUT);
776 ucb1200_set_io(TC35143_GPIO_IR_ON, TC35143_IODAT_HIGH);
782 static int init_hardware(void)
786 spin_lock_irqsave(&hardware_lock, flags);
788 #ifdef LIRC_ON_SA1100
789 #ifdef CONFIG_SA1100_BITSY
790 if (machine_is_bitsy()) {
791 printk(KERN_INFO "Power on IR module\n");
792 set_bitsy_egpio(EGPIO_BITSY_IR_ON);
795 #ifdef CONFIG_SA1100_COLLIE
796 sa1100_irda_set_power_collie(3); /* power on */
798 sr.hscr0 = Ser2HSCR0;
800 sr.utcr0 = Ser2UTCR0;
801 sr.utcr1 = Ser2UTCR1;
802 sr.utcr2 = Ser2UTCR2;
803 sr.utcr3 = Ser2UTCR3;
804 sr.utcr4 = Ser2UTCR4;
807 sr.utsr0 = Ser2UTSR0;
808 sr.utsr1 = Ser2UTSR1;
814 /* set output to 0 */
817 /* Enable HP-SIR modulation, and ensure that the port is disabled. */
819 Ser2HSCR0 = sr.hscr0 & (~HSCR0_HSSP);
821 /* clear status register to prevent unwanted interrupts */
822 Ser2UTSR0 &= (UTSR0_RID | UTSR0_RBB | UTSR0_REB);
825 Ser2UTCR0 = UTCR0_1StpBit|UTCR0_7BitData;
829 /* use HPSIR, 1.6 usec pulses */
830 Ser2UTCR4 = UTCR4_HPSIR|UTCR4_Z1_6us;
832 /* enable receiver, receive fifo interrupt */
833 Ser2UTCR3 = UTCR3_RXE|UTCR3_RIE;
835 /* clear status register to prevent unwanted interrupts */
836 Ser2UTSR0 &= (UTSR0_RID | UTSR0_RBB | UTSR0_REB);
838 #elif defined(LIRC_SIR_TEKRAM)
846 soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
848 /* First of all, disable all interrupts */
849 soutp(UART_IER, sinp(UART_IER) &
850 (~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI)));
853 soutp(UART_LCR, sinp(UART_LCR) | UART_LCR_DLAB);
855 /* Set divisor to 12 => 9600 Baud */
860 soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
863 soutp(UART_MCR, UART_MCR_RTS|UART_MCR_DTR|UART_MCR_OUT2);
864 safe_udelay(50*1000);
866 /* -DTR low -> reset PIC */
867 soutp(UART_MCR, UART_MCR_RTS|UART_MCR_OUT2);
870 soutp(UART_MCR, UART_MCR_RTS|UART_MCR_DTR|UART_MCR_OUT2);
874 /* -RTS low -> send control byte */
875 soutp(UART_MCR, UART_MCR_DTR|UART_MCR_OUT2);
877 soutp(UART_TX, TEKRAM_115200|TEKRAM_PW);
879 /* one byte takes ~1042 usec to transmit at 9600,8N1 */
882 /* back to normal operation */
883 soutp(UART_MCR, UART_MCR_RTS|UART_MCR_DTR|UART_MCR_OUT2);
888 /* read previous control byte */
889 printk(KERN_INFO LIRC_DRIVER_NAME
890 ": 0x%02x\n", sinp(UART_RX));
893 soutp(UART_LCR, sinp(UART_LCR) | UART_LCR_DLAB);
895 /* Set divisor to 1 => 115200 Baud */
899 /* Set DLAB 0, 8 Bit */
900 soutp(UART_LCR, UART_LCR_WLEN8);
901 /* enable interrupts */
902 soutp(UART_IER, sinp(UART_IER)|UART_IER_RDI);
904 outb(0, io + UART_MCR);
905 outb(0, io + UART_IER);
907 /* set DLAB, speed = 115200 */
908 outb(UART_LCR_DLAB | UART_LCR_WLEN7, io + UART_LCR);
909 outb(1, io + UART_DLL); outb(0, io + UART_DLM);
910 /* 7N1+start = 9 bits at 115200 ~ 3 bits at 44000 */
911 outb(UART_LCR_WLEN7, io + UART_LCR);
913 outb(UART_FCR_ENABLE_FIFO, io + UART_FCR);
915 /* outb(UART_IER_RLSI|UART_IER_RDI|UART_IER_THRI, io + UART_IER); */
916 outb(UART_IER_RDI, io + UART_IER);
918 outb(UART_MCR_DTR|UART_MCR_RTS|UART_MCR_OUT2, io + UART_MCR);
919 #ifdef LIRC_SIR_ACTISYS_ACT200L
921 #elif defined(LIRC_SIR_ACTISYS_ACT220L)
925 spin_unlock_irqrestore(&hardware_lock, flags);
929 static void drop_hardware(void)
933 spin_lock_irqsave(&hardware_lock, flags);
935 #ifdef LIRC_ON_SA1100
938 Ser2UTCR0 = sr.utcr0;
939 Ser2UTCR1 = sr.utcr1;
940 Ser2UTCR2 = sr.utcr2;
941 Ser2UTCR4 = sr.utcr4;
942 Ser2UTCR3 = sr.utcr3;
944 Ser2HSCR0 = sr.hscr0;
945 #ifdef CONFIG_SA1100_BITSY
946 if (machine_is_bitsy())
947 clr_bitsy_egpio(EGPIO_BITSY_IR_ON);
949 #ifdef CONFIG_SA1100_COLLIE
950 sa1100_irda_set_power_collie(0); /* power off */
953 /* turn off interrupts */
954 outb(0, io + UART_IER);
956 spin_unlock_irqrestore(&hardware_lock, flags);
959 /* SECTION: Initialisation */
961 static int init_port(void)
965 /* get I/O port access and IRQ line */
966 #ifndef LIRC_ON_SA1100
967 if (request_region(io, 8, LIRC_DRIVER_NAME) == NULL) {
968 printk(KERN_ERR LIRC_DRIVER_NAME
969 ": i/o port 0x%.4x already in use.\n", io);
973 retval = request_irq(irq, sir_interrupt, 0,
974 LIRC_DRIVER_NAME, NULL);
976 # ifndef LIRC_ON_SA1100
977 release_region(io, 8);
979 printk(KERN_ERR LIRC_DRIVER_NAME
980 ": IRQ %d already in use.\n",
984 #ifndef LIRC_ON_SA1100
985 printk(KERN_INFO LIRC_DRIVER_NAME
986 ": I/O port 0x%.4x, IRQ %d.\n",
990 init_timer(&timerlist);
991 timerlist.function = sir_timeout;
992 timerlist.data = 0xabadcafe;
997 static void drop_port(void)
1000 del_timer_sync(&timerlist);
1001 #ifndef LIRC_ON_SA1100
1002 release_region(io, 8);
1006 #ifdef LIRC_SIR_ACTISYS_ACT200L
1007 /* Crystal/Cirrus CS8130 IR transceiver, used in Actisys Act200L dongle */
1008 /* some code borrowed from Linux IRDA driver */
1010 /* Register 0: Control register #1 */
1011 #define ACT200L_REG0 0x00
1012 #define ACT200L_TXEN 0x01 /* Enable transmitter */
1013 #define ACT200L_RXEN 0x02 /* Enable receiver */
1014 #define ACT200L_ECHO 0x08 /* Echo control chars */
1016 /* Register 1: Control register #2 */
1017 #define ACT200L_REG1 0x10
1018 #define ACT200L_LODB 0x01 /* Load new baud rate count value */
1019 #define ACT200L_WIDE 0x04 /* Expand the maximum allowable pulse */
1021 /* Register 3: Transmit mode register #2 */
1022 #define ACT200L_REG3 0x30
1023 #define ACT200L_B0 0x01 /* DataBits, 0=6, 1=7, 2=8, 3=9(8P) */
1024 #define ACT200L_B1 0x02 /* DataBits, 0=6, 1=7, 2=8, 3=9(8P) */
1025 #define ACT200L_CHSY 0x04 /* StartBit Synced 0=bittime, 1=startbit */
1027 /* Register 4: Output Power register */
1028 #define ACT200L_REG4 0x40
1029 #define ACT200L_OP0 0x01 /* Enable LED1C output */
1030 #define ACT200L_OP1 0x02 /* Enable LED2C output */
1031 #define ACT200L_BLKR 0x04
1033 /* Register 5: Receive Mode register */
1034 #define ACT200L_REG5 0x50
1035 #define ACT200L_RWIDL 0x01 /* fixed 1.6us pulse mode */
1036 /*.. other various IRDA bit modes, and TV remote modes..*/
1038 /* Register 6: Receive Sensitivity register #1 */
1039 #define ACT200L_REG6 0x60
1040 #define ACT200L_RS0 0x01 /* receive threshold bit 0 */
1041 #define ACT200L_RS1 0x02 /* receive threshold bit 1 */
1043 /* Register 7: Receive Sensitivity register #2 */
1044 #define ACT200L_REG7 0x70
1045 #define ACT200L_ENPOS 0x04 /* Ignore the falling edge */
1047 /* Register 8,9: Baud Rate Divider register #1,#2 */
1048 #define ACT200L_REG8 0x80
1049 #define ACT200L_REG9 0x90
1051 #define ACT200L_2400 0x5f
1052 #define ACT200L_9600 0x17
1053 #define ACT200L_19200 0x0b
1054 #define ACT200L_38400 0x05
1055 #define ACT200L_57600 0x03
1056 #define ACT200L_115200 0x01
1058 /* Register 13: Control register #3 */
1059 #define ACT200L_REG13 0xd0
1060 #define ACT200L_SHDW 0x01 /* Enable access to shadow registers */
1062 /* Register 15: Status register */
1063 #define ACT200L_REG15 0xf0
1065 /* Register 21: Control register #4 */
1066 #define ACT200L_REG21 0x50
1067 #define ACT200L_EXCK 0x02 /* Disable clock output driver */
1068 #define ACT200L_OSCL 0x04 /* oscillator in low power, medium accuracy mode */
1070 static void init_act200(void)
1075 ACT200L_REG13 | ACT200L_SHDW,
1076 ACT200L_REG21 | ACT200L_EXCK | ACT200L_OSCL,
1078 ACT200L_REG7 | ACT200L_ENPOS,
1079 ACT200L_REG6 | ACT200L_RS0 | ACT200L_RS1,
1080 ACT200L_REG5 | ACT200L_RWIDL,
1081 ACT200L_REG4 | ACT200L_OP0 | ACT200L_OP1 | ACT200L_BLKR,
1082 ACT200L_REG3 | ACT200L_B0,
1083 ACT200L_REG0 | ACT200L_TXEN | ACT200L_RXEN,
1084 ACT200L_REG8 | (ACT200L_115200 & 0x0f),
1085 ACT200L_REG9 | ((ACT200L_115200 >> 4) & 0x0f),
1086 ACT200L_REG1 | ACT200L_LODB | ACT200L_WIDE
1090 soutp(UART_LCR, UART_LCR_DLAB | UART_LCR_WLEN8);
1092 /* Set divisor to 12 => 9600 Baud */
1094 soutp(UART_DLL, 12);
1097 soutp(UART_LCR, UART_LCR_WLEN8);
1098 /* Set divisor to 12 => 9600 Baud */
1101 soutp(UART_MCR, UART_MCR_RTS|UART_MCR_DTR|UART_MCR_OUT2);
1102 for (i = 0; i < 50; i++)
1105 /* Reset the dongle : set RTS low for 25 ms */
1106 soutp(UART_MCR, UART_MCR_DTR|UART_MCR_OUT2);
1107 for (i = 0; i < 25; i++)
1110 soutp(UART_MCR, UART_MCR_RTS|UART_MCR_DTR|UART_MCR_OUT2);
1113 /* Clear DTR and set RTS to enter command mode */
1114 soutp(UART_MCR, UART_MCR_RTS|UART_MCR_OUT2);
1117 /* send out the control register settings for 115K 7N1 SIR operation */
1118 for (i = 0; i < sizeof(control); i++) {
1119 soutp(UART_TX, control[i]);
1120 /* one byte takes ~1042 usec to transmit at 9600,8N1 */
1124 /* back to normal operation */
1125 soutp(UART_MCR, UART_MCR_RTS|UART_MCR_DTR|UART_MCR_OUT2);
1129 soutp(UART_LCR, sinp(UART_LCR) | UART_LCR_DLAB);
1132 soutp(UART_LCR, UART_LCR_DLAB | UART_LCR_WLEN7);
1134 /* Set divisor to 1 => 115200 Baud */
1139 soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
1141 /* Set DLAB 0, 7 Bit */
1142 soutp(UART_LCR, UART_LCR_WLEN7);
1144 /* enable interrupts */
1145 soutp(UART_IER, sinp(UART_IER)|UART_IER_RDI);
1149 #ifdef LIRC_SIR_ACTISYS_ACT220L
1151 * Derived from linux IrDA driver (net/irda/actisys.c)
1152 * Drop me a mail for any kind of comment: maxx@spaceboyz.net
1155 void init_act220(void)
1160 soutp(UART_LCR, UART_LCR_DLAB|UART_LCR_WLEN7);
1164 soutp(UART_DLL, 12);
1167 soutp(UART_LCR, UART_LCR_WLEN7);
1169 /* reset the dongle, set DTR low for 10us */
1170 soutp(UART_MCR, UART_MCR_RTS|UART_MCR_OUT2);
1173 /* back to normal (still 9600) */
1174 soutp(UART_MCR, UART_MCR_DTR|UART_MCR_RTS|UART_MCR_OUT2);
1177 * send RTS pulses until we reach 115200
1178 * i hope this is really the same for act220l/act220l+
1180 for (i = 0; i < 3; i++) {
1182 /* set RTS low for 10 us */
1183 soutp(UART_MCR, UART_MCR_DTR|UART_MCR_OUT2);
1185 /* set RTS high for 10 us */
1186 soutp(UART_MCR, UART_MCR_RTS|UART_MCR_DTR|UART_MCR_OUT2);
1189 /* back to normal operation */
1190 udelay(1500); /* better safe than sorry ;) */
1193 soutp(UART_LCR, UART_LCR_DLAB | UART_LCR_WLEN7);
1195 /* Set divisor to 1 => 115200 Baud */
1199 /* Set DLAB 0, 7 Bit */
1200 /* The dongle doesn't seem to have any problems with operation at 7N1 */
1201 soutp(UART_LCR, UART_LCR_WLEN7);
1203 /* enable interrupts */
1204 soutp(UART_IER, UART_IER_RDI);
1208 static int init_lirc_sir(void)
1212 init_waitqueue_head(&lirc_read_queue);
1213 retval = init_port();
1217 printk(KERN_INFO LIRC_DRIVER_NAME
1222 static int __devinit lirc_sir_probe(struct platform_device *dev)
1227 static int __devexit lirc_sir_remove(struct platform_device *dev)
1232 static struct platform_driver lirc_sir_driver = {
1233 .probe = lirc_sir_probe,
1234 .remove = __devexit_p(lirc_sir_remove),
1237 .owner = THIS_MODULE,
1241 static int __init lirc_sir_init(void)
1245 retval = platform_driver_register(&lirc_sir_driver);
1247 printk(KERN_ERR LIRC_DRIVER_NAME ": Platform driver register "
1252 lirc_sir_dev = platform_device_alloc("lirc_dev", 0);
1253 if (!lirc_sir_dev) {
1254 printk(KERN_ERR LIRC_DRIVER_NAME ": Platform device alloc "
1257 goto pdev_alloc_fail;
1260 retval = platform_device_add(lirc_sir_dev);
1262 printk(KERN_ERR LIRC_DRIVER_NAME ": Platform device add "
1268 retval = init_chrdev();
1272 retval = init_lirc_sir();
1281 platform_device_del(lirc_sir_dev);
1283 platform_device_put(lirc_sir_dev);
1285 platform_driver_unregister(&lirc_sir_driver);
1289 static void __exit lirc_sir_exit(void)
1294 platform_device_unregister(lirc_sir_dev);
1295 platform_driver_unregister(&lirc_sir_driver);
1296 printk(KERN_INFO LIRC_DRIVER_NAME ": Uninstalled.\n");
1299 module_init(lirc_sir_init);
1300 module_exit(lirc_sir_exit);
1302 #ifdef LIRC_SIR_TEKRAM
1303 MODULE_DESCRIPTION("Infrared receiver driver for Tekram Irmate 210");
1304 MODULE_AUTHOR("Christoph Bartelmus");
1305 #elif defined(LIRC_ON_SA1100)
1306 MODULE_DESCRIPTION("LIRC driver for StrongARM SA1100 embedded microprocessor");
1307 MODULE_AUTHOR("Christoph Bartelmus");
1308 #elif defined(LIRC_SIR_ACTISYS_ACT200L)
1309 MODULE_DESCRIPTION("LIRC driver for Actisys Act200L");
1310 MODULE_AUTHOR("Karl Bongers");
1311 #elif defined(LIRC_SIR_ACTISYS_ACT220L)
1312 MODULE_DESCRIPTION("LIRC driver for Actisys Act220L(+)");
1313 MODULE_AUTHOR("Jan Roemisch");
1315 MODULE_DESCRIPTION("Infrared receiver driver for SIR type serial ports");
1316 MODULE_AUTHOR("Milan Pikula");
1318 MODULE_LICENSE("GPL");
1320 #ifdef LIRC_ON_SA1100
1321 module_param(irq, int, S_IRUGO);
1322 MODULE_PARM_DESC(irq, "Interrupt (16)");
1324 module_param(io, int, S_IRUGO);
1325 MODULE_PARM_DESC(io, "I/O address base (0x3f8 or 0x2f8)");
1327 module_param(irq, int, S_IRUGO);
1328 MODULE_PARM_DESC(irq, "Interrupt (4 or 3)");
1330 module_param(threshold, int, S_IRUGO);
1331 MODULE_PARM_DESC(threshold, "space detection threshold (3)");
1334 module_param(debug, bool, S_IRUGO | S_IWUSR);
1335 MODULE_PARM_DESC(debug, "Enable debugging messages");