Merge branch 'for-linus' of git://ceph.newdream.net/git/ceph-client
[pandora-kernel.git] / drivers / staging / intel_sst / intel_sst.c
1 /*
2  *  intel_sst.c - Intel SST Driver for audio engine
3  *
4  *  Copyright (C) 2008-10       Intel Corp
5  *  Authors:    Vinod Koul <vinod.koul@intel.com>
6  *              Harsha Priya <priya.harsha@intel.com>
7  *              Dharageswari R <dharageswari.r@intel.com>
8  *              KP Jeeja <jeeja.kp@intel.com>
9  *  ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
10  *
11  *  This program is free software; you can redistribute it and/or modify
12  *  it under the terms of the GNU General Public License as published by
13  *  the Free Software Foundation; version 2 of the License.
14  *
15  *  This program is distributed in the hope that it will be useful, but
16  *  WITHOUT ANY WARRANTY; without even the implied warranty of
17  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
18  *  General Public License for more details.
19  *
20  *  You should have received a copy of the GNU General Public License along
21  *  with this program; if not, write to the Free Software Foundation, Inc.,
22  *  59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
23  *
24  * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
25  *
26  *  This driver exposes the audio engine functionalities to the ALSA
27  *       and middleware.
28  *
29  *  This file contains all init functions
30  */
31
32 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
33
34 #include <linux/pci.h>
35 #include <linux/fs.h>
36 #include <linux/interrupt.h>
37 #include <linux/firmware.h>
38 #include <linux/miscdevice.h>
39 #include <linux/pm_runtime.h>
40 #include <asm/mrst.h>
41 #include "intel_sst.h"
42 #include "intel_sst_ioctl.h"
43 #include "intel_sst_fw_ipc.h"
44 #include "intel_sst_common.h"
45
46
47 MODULE_AUTHOR("Vinod Koul <vinod.koul@intel.com>");
48 MODULE_AUTHOR("Harsha Priya <priya.harsha@intel.com>");
49 MODULE_AUTHOR("Dharageswari R <dharageswari.r@intel.com>");
50 MODULE_AUTHOR("KP Jeeja <jeeja.kp@intel.com>");
51 MODULE_DESCRIPTION("Intel (R) SST(R) Audio Engine Driver");
52 MODULE_LICENSE("GPL v2");
53 MODULE_VERSION(SST_DRIVER_VERSION);
54
55 struct intel_sst_drv *sst_drv_ctx;
56 static struct mutex drv_ctx_lock;
57 struct class *sst_class;
58
59 /* fops Routines */
60 static const struct file_operations intel_sst_fops = {
61         .owner = THIS_MODULE,
62         .open = intel_sst_open,
63         .release = intel_sst_release,
64         .read = intel_sst_read,
65         .write = intel_sst_write,
66         .unlocked_ioctl = intel_sst_ioctl,
67         .mmap = intel_sst_mmap,
68         .aio_read = intel_sst_aio_read,
69         .aio_write = intel_sst_aio_write,
70 };
71 static const struct file_operations intel_sst_fops_cntrl = {
72         .owner = THIS_MODULE,
73         .open = intel_sst_open_cntrl,
74         .release = intel_sst_release_cntrl,
75         .unlocked_ioctl = intel_sst_ioctl,
76 };
77
78 static struct miscdevice lpe_dev = {
79         .minor = MISC_DYNAMIC_MINOR,/* dynamic allocation */
80         .name = "intel_sst",/* /dev/intel_sst */
81         .fops = &intel_sst_fops
82 };
83
84
85 static struct miscdevice lpe_ctrl = {
86         .minor = MISC_DYNAMIC_MINOR,/* dynamic allocation */
87         .name = "intel_sst_ctrl",/* /dev/intel_sst_ctrl */
88         .fops = &intel_sst_fops_cntrl
89 };
90
91 /**
92 * intel_sst_interrupt - Interrupt service routine for SST
93 *
94 * @irq: irq number of interrupt
95 * @context: pointer to device structre
96 *
97 * This function is called by OS when SST device raises
98 * an interrupt. This will be result of write in IPC register
99 * Source can be busy or done interrupt
100 */
101 static irqreturn_t intel_sst_interrupt(int irq, void *context)
102 {
103         union interrupt_reg isr;
104         union ipc_header header;
105         union interrupt_reg imr;
106         struct intel_sst_drv *drv = (struct intel_sst_drv *) context;
107         unsigned int size = 0, str_id;
108         struct stream_info *stream ;
109
110         /* Do not handle interrupt in suspended state */
111         if (drv->sst_state == SST_SUSPENDED)
112                 return IRQ_NONE;
113         /* Interrupt arrived, check src */
114         isr.full = sst_shim_read(drv->shim, SST_ISRX);
115
116         if (isr.part.busy_interrupt) {
117                 header.full = sst_shim_read(drv->shim, SST_IPCD);
118                 if (header.part.msg_id == IPC_SST_PERIOD_ELAPSED) {
119                         sst_clear_interrupt();
120                         str_id = header.part.str_id;
121                         stream = &sst_drv_ctx->streams[str_id];
122                         if (stream->period_elapsed)
123                                 stream->period_elapsed(stream->pcm_substream);
124                         return IRQ_HANDLED;
125                 }
126                 if (header.part.large)
127                         size = header.part.data;
128                 if (header.part.msg_id & REPLY_MSG) {
129                         sst_drv_ctx->ipc_process_msg.header = header;
130                         memcpy_fromio(sst_drv_ctx->ipc_process_msg.mailbox,
131                                 drv->mailbox + SST_MAILBOX_RCV, size);
132                         queue_work(sst_drv_ctx->process_msg_wq,
133                                         &sst_drv_ctx->ipc_process_msg.wq);
134                 } else {
135                         sst_drv_ctx->ipc_process_reply.header = header;
136                         memcpy_fromio(sst_drv_ctx->ipc_process_reply.mailbox,
137                                 drv->mailbox + SST_MAILBOX_RCV, size);
138                         queue_work(sst_drv_ctx->process_reply_wq,
139                                         &sst_drv_ctx->ipc_process_reply.wq);
140                 }
141                 /* mask busy inetrrupt */
142                 imr.full = sst_shim_read(drv->shim, SST_IMRX);
143                 imr.part.busy_interrupt = 1;
144                 sst_shim_write(sst_drv_ctx->shim, SST_IMRX, imr.full);
145                 return IRQ_HANDLED;
146         } else if (isr.part.done_interrupt) {
147                 /* Clear done bit */
148                 header.full = sst_shim_read(drv->shim, SST_IPCX);
149                 header.part.done = 0;
150                 sst_shim_write(sst_drv_ctx->shim, SST_IPCX, header.full);
151                 /* write 1 to clear status register */;
152                 isr.part.done_interrupt = 1;
153                 /* dummy register for shim workaround */
154                 sst_shim_write(sst_drv_ctx->shim, SST_ISRX, isr.full);
155                 queue_work(sst_drv_ctx->post_msg_wq,
156                         &sst_drv_ctx->ipc_post_msg.wq);
157                 return IRQ_HANDLED;
158         } else
159                 return IRQ_NONE;
160
161 }
162
163
164 /*
165 * intel_sst_probe - PCI probe function
166 *
167 * @pci: PCI device structure
168 * @pci_id: PCI device ID structure
169 *
170 * This function is called by OS when a device is found
171 * This enables the device, interrupt etc
172 */
173 static int __devinit intel_sst_probe(struct pci_dev *pci,
174                         const struct pci_device_id *pci_id)
175 {
176         int i, ret = 0;
177
178         pr_debug("Probe for DID %x\n", pci->device);
179         mutex_lock(&drv_ctx_lock);
180         if (sst_drv_ctx) {
181                 pr_err("Only one sst handle is supported\n");
182                 mutex_unlock(&drv_ctx_lock);
183                 return -EBUSY;
184         }
185
186         sst_drv_ctx = kzalloc(sizeof(*sst_drv_ctx), GFP_KERNEL);
187         if (!sst_drv_ctx) {
188                 pr_err("malloc fail\n");
189                 mutex_unlock(&drv_ctx_lock);
190                 return -ENOMEM;
191         }
192         mutex_unlock(&drv_ctx_lock);
193
194         sst_drv_ctx->pci_id = pci->device;
195
196         mutex_init(&sst_drv_ctx->stream_lock);
197         mutex_init(&sst_drv_ctx->sst_lock);
198         sst_drv_ctx->pmic_state = SND_MAD_UN_INIT;
199
200         sst_drv_ctx->stream_cnt = 0;
201         sst_drv_ctx->encoded_cnt = 0;
202         sst_drv_ctx->am_cnt = 0;
203         sst_drv_ctx->pb_streams = 0;
204         sst_drv_ctx->cp_streams = 0;
205         sst_drv_ctx->unique_id = 0;
206         sst_drv_ctx->pmic_port_instance = SST_DEFAULT_PMIC_PORT;
207
208         INIT_LIST_HEAD(&sst_drv_ctx->ipc_dispatch_list);
209         INIT_WORK(&sst_drv_ctx->ipc_post_msg.wq, sst_post_message);
210         INIT_WORK(&sst_drv_ctx->ipc_process_msg.wq, sst_process_message);
211         INIT_WORK(&sst_drv_ctx->ipc_process_reply.wq, sst_process_reply);
212         INIT_WORK(&sst_drv_ctx->mad_ops.wq, sst_process_mad_ops);
213         init_waitqueue_head(&sst_drv_ctx->wait_queue);
214
215         sst_drv_ctx->mad_wq = create_workqueue("sst_mad_wq");
216         if (!sst_drv_ctx->mad_wq)
217                 goto do_free_drv_ctx;
218         sst_drv_ctx->post_msg_wq = create_workqueue("sst_post_msg_wq");
219         if (!sst_drv_ctx->post_msg_wq)
220                 goto free_mad_wq;
221         sst_drv_ctx->process_msg_wq = create_workqueue("sst_process_msg_wqq");
222         if (!sst_drv_ctx->process_msg_wq)
223                 goto free_post_msg_wq;
224         sst_drv_ctx->process_reply_wq = create_workqueue("sst_proces_reply_wq");
225         if (!sst_drv_ctx->process_reply_wq)
226                 goto free_process_msg_wq;
227
228         for (i = 0; i < MAX_ACTIVE_STREAM; i++) {
229                 sst_drv_ctx->alloc_block[i].sst_id = BLOCK_UNINIT;
230                 sst_drv_ctx->alloc_block[i].ops_block.condition = false;
231         }
232         spin_lock_init(&sst_drv_ctx->list_spin_lock);
233
234         sst_drv_ctx->max_streams = pci_id->driver_data;
235         pr_debug("Got drv data max stream %d\n",
236                                 sst_drv_ctx->max_streams);
237         for (i = 1; i <= sst_drv_ctx->max_streams; i++) {
238                 struct stream_info *stream = &sst_drv_ctx->streams[i];
239                 INIT_LIST_HEAD(&stream->bufs);
240                 mutex_init(&stream->lock);
241                 spin_lock_init(&stream->pcm_lock);
242         }
243         if (sst_drv_ctx->pci_id == SST_MRST_PCI_ID) {
244                 sst_drv_ctx->mmap_mem = NULL;
245                 sst_drv_ctx->mmap_len = SST_MMAP_PAGES * PAGE_SIZE;
246                 while (sst_drv_ctx->mmap_len > 0) {
247                         sst_drv_ctx->mmap_mem =
248                                 kzalloc(sst_drv_ctx->mmap_len, GFP_KERNEL);
249                         if (sst_drv_ctx->mmap_mem) {
250                                 pr_debug("Got memory %p size 0x%x\n",
251                                         sst_drv_ctx->mmap_mem,
252                                         sst_drv_ctx->mmap_len);
253                                 break;
254                         }
255                         if (sst_drv_ctx->mmap_len < (SST_MMAP_STEP*PAGE_SIZE)) {
256                                 pr_err("mem alloc fail...abort!!\n");
257                                 ret = -ENOMEM;
258                                 goto free_process_reply_wq;
259                         }
260                         sst_drv_ctx->mmap_len -= (SST_MMAP_STEP * PAGE_SIZE);
261                         pr_debug("mem alloc failed...trying %d\n",
262                                                 sst_drv_ctx->mmap_len);
263                 }
264         }
265
266         /* Init the device */
267         ret = pci_enable_device(pci);
268         if (ret) {
269                 pr_err("device can't be enabled\n");
270                 goto do_free_mem;
271         }
272         sst_drv_ctx->pci = pci_dev_get(pci);
273         ret = pci_request_regions(pci, SST_DRV_NAME);
274         if (ret)
275                 goto do_disable_device;
276         /* map registers */
277         /* SST Shim */
278         sst_drv_ctx->shim_phy_add = pci_resource_start(pci, 1);
279         sst_drv_ctx->shim = pci_ioremap_bar(pci, 1);
280         if (!sst_drv_ctx->shim)
281                 goto do_release_regions;
282         pr_debug("SST Shim Ptr %p\n", sst_drv_ctx->shim);
283
284         /* Shared SRAM */
285         sst_drv_ctx->mailbox = pci_ioremap_bar(pci, 2);
286         if (!sst_drv_ctx->mailbox)
287                 goto do_unmap_shim;
288         pr_debug("SRAM Ptr %p\n", sst_drv_ctx->mailbox);
289
290         /* IRAM */
291         sst_drv_ctx->iram = pci_ioremap_bar(pci, 3);
292         if (!sst_drv_ctx->iram)
293                 goto do_unmap_sram;
294         pr_debug("IRAM Ptr %p\n", sst_drv_ctx->iram);
295
296         /* DRAM */
297         sst_drv_ctx->dram = pci_ioremap_bar(pci, 4);
298         if (!sst_drv_ctx->dram)
299                 goto do_unmap_iram;
300         pr_debug("DRAM Ptr %p\n", sst_drv_ctx->dram);
301
302         mutex_lock(&sst_drv_ctx->sst_lock);
303         sst_drv_ctx->sst_state = SST_UN_INIT;
304         mutex_unlock(&sst_drv_ctx->sst_lock);
305         /* Register the ISR */
306         ret = request_irq(pci->irq, intel_sst_interrupt,
307                 IRQF_SHARED, SST_DRV_NAME, sst_drv_ctx);
308         if (ret)
309                 goto do_unmap_dram;
310         pr_debug("Registered IRQ 0x%x\n", pci->irq);
311
312         /*Register LPE Control as misc driver*/
313         ret = misc_register(&lpe_ctrl);
314         if (ret) {
315                 pr_err("couldn't register control device\n");
316                 goto do_free_irq;
317         }
318
319         if (sst_drv_ctx->pci_id == SST_MRST_PCI_ID) {
320                 ret = misc_register(&lpe_dev);
321                 if (ret) {
322                         pr_err("couldn't register LPE device\n");
323                         goto do_free_misc;
324                 }
325         } else if (sst_drv_ctx->pci_id == SST_MFLD_PCI_ID) {
326                 u32 csr;
327
328                 /*allocate mem for fw context save during suspend*/
329                 sst_drv_ctx->fw_cntx = kzalloc(FW_CONTEXT_MEM, GFP_KERNEL);
330                 if (!sst_drv_ctx->fw_cntx) {
331                         ret = -ENOMEM;
332                         goto do_free_misc;
333                 }
334                 /*setting zero as that is valid mem to restore*/
335                 sst_drv_ctx->fw_cntx_size = 0;
336
337                 /*set lpe start clock and ram size*/
338                 csr = sst_shim_read(sst_drv_ctx->shim, SST_CSR);
339                 csr |= 0x30060; /*remove the clock ratio after fw fix*/
340                 sst_shim_write(sst_drv_ctx->shim, SST_CSR, csr);
341         }
342         sst_drv_ctx->lpe_stalled = 0;
343         pci_set_drvdata(pci, sst_drv_ctx);
344         pm_runtime_allow(&pci->dev);
345         pm_runtime_put_noidle(&pci->dev);
346         pr_debug("...successfully done!!!\n");
347         return ret;
348
349 do_free_misc:
350         misc_deregister(&lpe_ctrl);
351 do_free_irq:
352         free_irq(pci->irq, sst_drv_ctx);
353 do_unmap_dram:
354         iounmap(sst_drv_ctx->dram);
355 do_unmap_iram:
356         iounmap(sst_drv_ctx->iram);
357 do_unmap_sram:
358         iounmap(sst_drv_ctx->mailbox);
359 do_unmap_shim:
360         iounmap(sst_drv_ctx->shim);
361 do_release_regions:
362         pci_release_regions(pci);
363 do_disable_device:
364         pci_disable_device(pci);
365 do_free_mem:
366         kfree(sst_drv_ctx->mmap_mem);
367 free_process_reply_wq:
368         destroy_workqueue(sst_drv_ctx->process_reply_wq);
369 free_process_msg_wq:
370         destroy_workqueue(sst_drv_ctx->process_msg_wq);
371 free_post_msg_wq:
372         destroy_workqueue(sst_drv_ctx->post_msg_wq);
373 free_mad_wq:
374         destroy_workqueue(sst_drv_ctx->mad_wq);
375 do_free_drv_ctx:
376         kfree(sst_drv_ctx);
377         sst_drv_ctx = NULL;
378         pr_err("Probe failed with %d\n", ret);
379         return ret;
380 }
381
382 /**
383 * intel_sst_remove - PCI remove function
384 *
385 * @pci: PCI device structure
386 *
387 * This function is called by OS when a device is unloaded
388 * This frees the interrupt etc
389 */
390 static void __devexit intel_sst_remove(struct pci_dev *pci)
391 {
392         pm_runtime_get_noresume(&pci->dev);
393         pm_runtime_forbid(&pci->dev);
394         pci_dev_put(sst_drv_ctx->pci);
395         mutex_lock(&sst_drv_ctx->sst_lock);
396         sst_drv_ctx->sst_state = SST_UN_INIT;
397         mutex_unlock(&sst_drv_ctx->sst_lock);
398         misc_deregister(&lpe_ctrl);
399         free_irq(pci->irq, sst_drv_ctx);
400         iounmap(sst_drv_ctx->dram);
401         iounmap(sst_drv_ctx->iram);
402         iounmap(sst_drv_ctx->mailbox);
403         iounmap(sst_drv_ctx->shim);
404         sst_drv_ctx->pmic_state = SND_MAD_UN_INIT;
405         if (sst_drv_ctx->pci_id == SST_MRST_PCI_ID) {
406                 misc_deregister(&lpe_dev);
407                 kfree(sst_drv_ctx->mmap_mem);
408         } else
409                 kfree(sst_drv_ctx->fw_cntx);
410         flush_scheduled_work();
411         destroy_workqueue(sst_drv_ctx->process_reply_wq);
412         destroy_workqueue(sst_drv_ctx->process_msg_wq);
413         destroy_workqueue(sst_drv_ctx->post_msg_wq);
414         destroy_workqueue(sst_drv_ctx->mad_wq);
415         kfree(pci_get_drvdata(pci));
416         sst_drv_ctx = NULL;
417         pci_release_regions(pci);
418         pci_disable_device(pci);
419         pci_set_drvdata(pci, NULL);
420 }
421
422 void sst_save_dsp_context(void)
423 {
424         struct snd_sst_ctxt_params fw_context;
425         unsigned int pvt_id, i;
426         struct ipc_post *msg = NULL;
427
428         /*check cpu type*/
429         if (sst_drv_ctx->pci_id != SST_MFLD_PCI_ID)
430                 return;
431                 /*not supported for rest*/
432         if (sst_drv_ctx->sst_state != SST_FW_RUNNING) {
433                 pr_debug("fw not running no context save ...\n");
434                 return;
435         }
436
437         /*send msg to fw*/
438         if (sst_create_large_msg(&msg))
439                 return;
440         pvt_id = sst_assign_pvt_id(sst_drv_ctx);
441         i = sst_get_block_stream(sst_drv_ctx);
442         sst_drv_ctx->alloc_block[i].sst_id = pvt_id;
443         sst_fill_header(&msg->header, IPC_IA_GET_FW_CTXT, 1, pvt_id);
444         msg->header.part.data = sizeof(fw_context) + sizeof(u32);
445         fw_context.address = virt_to_phys((void *)sst_drv_ctx->fw_cntx);
446         fw_context.size = FW_CONTEXT_MEM;
447         memcpy(msg->mailbox_data, &msg->header, sizeof(u32));
448         memcpy(msg->mailbox_data + sizeof(u32),
449                                 &fw_context, sizeof(fw_context));
450         spin_lock(&sst_drv_ctx->list_spin_lock);
451         list_add_tail(&msg->node, &sst_drv_ctx->ipc_dispatch_list);
452         spin_unlock(&sst_drv_ctx->list_spin_lock);
453         sst_post_message(&sst_drv_ctx->ipc_post_msg_wq);
454         /*wait for reply*/
455         if (sst_wait_timeout(sst_drv_ctx, &sst_drv_ctx->alloc_block[i]))
456                 pr_debug("err fw context save timeout  ...\n");
457         sst_drv_ctx->alloc_block[i].sst_id = BLOCK_UNINIT;
458         pr_debug("fw context saved  ...\n");
459         return;
460 }
461
462 /* Power Management */
463 /*
464 * intel_sst_suspend - PCI suspend function
465 *
466 * @pci: PCI device structure
467 * @state: PM message
468 *
469 * This function is called by OS when a power event occurs
470 */
471 int intel_sst_suspend(struct pci_dev *pci, pm_message_t state)
472 {
473         union config_status_reg csr;
474
475         pr_debug("intel_sst_suspend called\n");
476
477         if (sst_drv_ctx->stream_cnt) {
478                 pr_err("active streams,not able to suspend\n");
479                 return -EBUSY;
480         }
481         /*save fw context*/
482         sst_save_dsp_context();
483         /*Assert RESET on LPE Processor*/
484         csr.full = sst_shim_read(sst_drv_ctx->shim, SST_CSR);
485         csr.full = csr.full | 0x2;
486         /* Move the SST state to Suspended */
487         mutex_lock(&sst_drv_ctx->sst_lock);
488         sst_drv_ctx->sst_state = SST_SUSPENDED;
489         sst_shim_write(sst_drv_ctx->shim, SST_CSR, csr.full);
490         mutex_unlock(&sst_drv_ctx->sst_lock);
491         pci_set_drvdata(pci, sst_drv_ctx);
492         pci_save_state(pci);
493         pci_disable_device(pci);
494         pci_set_power_state(pci, PCI_D3hot);
495         return 0;
496 }
497
498 /**
499 * intel_sst_resume - PCI resume function
500 *
501 * @pci: PCI device structure
502 *
503 * This function is called by OS when a power event occurs
504 */
505 int intel_sst_resume(struct pci_dev *pci)
506 {
507         int ret = 0;
508
509         pr_debug("intel_sst_resume called\n");
510         if (sst_drv_ctx->sst_state != SST_SUSPENDED) {
511                 pr_err("SST is not in suspended state\n");
512                 return 0;
513         }
514         sst_drv_ctx = pci_get_drvdata(pci);
515         pci_set_power_state(pci, PCI_D0);
516         pci_restore_state(pci);
517         ret = pci_enable_device(pci);
518         if (ret)
519                 pr_err("device can't be enabled\n");
520
521         mutex_lock(&sst_drv_ctx->sst_lock);
522         sst_drv_ctx->sst_state = SST_UN_INIT;
523         mutex_unlock(&sst_drv_ctx->sst_lock);
524         return 0;
525 }
526
527 /* The runtime_suspend/resume is pretty much similar to the legacy
528  * suspend/resume with the noted exception below:
529  * The PCI core takes care of taking the system through D3hot and
530  * restoring it back to D0 and so there is no need to duplicate
531  * that here.
532  */
533 static int intel_sst_runtime_suspend(struct device *dev)
534 {
535         union config_status_reg csr;
536
537         pr_debug("intel_sst_runtime_suspend called\n");
538         if (sst_drv_ctx->stream_cnt) {
539                 pr_err("active streams,not able to suspend\n");
540                 return -EBUSY;
541         }
542         /*save fw context*/
543         sst_save_dsp_context();
544         /*Assert RESET on LPE Processor*/
545         csr.full = sst_shim_read(sst_drv_ctx->shim, SST_CSR);
546         csr.full = csr.full | 0x2;
547         /* Move the SST state to Suspended */
548         mutex_lock(&sst_drv_ctx->sst_lock);
549         sst_drv_ctx->sst_state = SST_SUSPENDED;
550
551         /* Only needed by Medfield */
552         if (sst_drv_ctx->pci_id != SST_MRST_PCI_ID)
553                 sst_shim_write(sst_drv_ctx->shim, SST_CSR, csr.full);
554         mutex_unlock(&sst_drv_ctx->sst_lock);
555         return 0;
556 }
557
558 static int intel_sst_runtime_resume(struct device *dev)
559 {
560
561         pr_debug("intel_sst_runtime_resume called\n");
562         if (sst_drv_ctx->sst_state != SST_SUSPENDED) {
563                 pr_err("SST is not in suspended state\n");
564                 return 0;
565         }
566
567         mutex_lock(&sst_drv_ctx->sst_lock);
568         sst_drv_ctx->sst_state = SST_UN_INIT;
569         mutex_unlock(&sst_drv_ctx->sst_lock);
570         return 0;
571 }
572
573 static int intel_sst_runtime_idle(struct device *dev)
574 {
575         pr_debug("runtime_idle called\n");
576         if (sst_drv_ctx->stream_cnt == 0 && sst_drv_ctx->am_cnt == 0)
577                 pm_schedule_suspend(dev, SST_SUSPEND_DELAY);
578         return -EBUSY;
579 }
580
581 static const struct dev_pm_ops intel_sst_pm = {
582         .runtime_suspend = intel_sst_runtime_suspend,
583         .runtime_resume = intel_sst_runtime_resume,
584         .runtime_idle = intel_sst_runtime_idle,
585 };
586
587 /* PCI Routines */
588 static struct pci_device_id intel_sst_ids[] = {
589         { PCI_VDEVICE(INTEL, SST_MRST_PCI_ID), 3},
590         { PCI_VDEVICE(INTEL, SST_MFLD_PCI_ID), 6},
591         { 0, }
592 };
593 MODULE_DEVICE_TABLE(pci, intel_sst_ids);
594
595 static struct pci_driver driver = {
596         .name = SST_DRV_NAME,
597         .id_table = intel_sst_ids,
598         .probe = intel_sst_probe,
599         .remove = __devexit_p(intel_sst_remove),
600 #ifdef CONFIG_PM
601         .suspend = intel_sst_suspend,
602         .resume = intel_sst_resume,
603         .driver = {
604                 .pm = &intel_sst_pm,
605         },
606 #endif
607 };
608
609 /**
610 * intel_sst_init - Module init function
611 *
612 * Registers with PCI
613 * Registers with /dev
614 * Init all data strutures
615 */
616 static int __init intel_sst_init(void)
617 {
618         /* Init all variables, data structure etc....*/
619         int ret = 0;
620         pr_debug("INFO: ******** SST DRIVER loading.. Ver: %s\n",
621                                        SST_DRIVER_VERSION);
622
623         mutex_init(&drv_ctx_lock);
624         /* Register with PCI */
625         ret = pci_register_driver(&driver);
626         if (ret)
627                 pr_err("PCI register failed\n");
628         return ret;
629 }
630
631 /**
632 * intel_sst_exit - Module exit function
633 *
634 * Unregisters with PCI
635 * Unregisters with /dev
636 * Frees all data strutures
637 */
638 static void __exit intel_sst_exit(void)
639 {
640         pci_unregister_driver(&driver);
641
642         pr_debug("driver unloaded\n");
643         sst_drv_ctx = NULL;
644         return;
645 }
646
647 module_init(intel_sst_init);
648 module_exit(intel_sst_exit);