2 * lis3l02dq.c support STMicroelectronics LISD02DQ
3 * 3d 2g Linear Accelerometers via SPI
5 * Copyright (c) 2007 Jonathan Cameron <jic23@cam.ac.uk>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 * 16 bit left justified mode used.
15 #include <linux/interrupt.h>
16 #include <linux/irq.h>
17 #include <linux/gpio.h>
18 #include <linux/workqueue.h>
19 #include <linux/mutex.h>
20 #include <linux/device.h>
21 #include <linux/kernel.h>
22 #include <linux/spi/spi.h>
23 #include <linux/slab.h>
25 #include <linux/sysfs.h>
26 #include <linux/list.h>
32 #include "lis3l02dq.h"
34 /* At the moment the spi framework doesn't allow global setting of cs_change.
35 * It's in the likely to be added comment at the top of spi.h.
36 * This means that use cannot be made of spi_write etc.
40 * lis3l02dq_spi_read_reg_8() - read single byte from a single register
41 * @dev: device asosciated with child of actual device (iio_dev or iio_trig)
42 * @reg_address: the address of the register to be read
43 * @val: pass back the resulting value
45 int lis3l02dq_spi_read_reg_8(struct device *dev, u8 reg_address, u8 *val)
48 struct spi_message msg;
49 struct iio_dev *indio_dev = dev_get_drvdata(dev);
50 struct lis3l02dq_state *st = iio_dev_get_devdata(indio_dev);
51 struct spi_transfer xfer = {
59 mutex_lock(&st->buf_lock);
60 st->tx[0] = LIS3L02DQ_READ_REG(reg_address);
63 spi_message_init(&msg);
64 spi_message_add_tail(&xfer, &msg);
65 ret = spi_sync(st->us, &msg);
67 mutex_unlock(&st->buf_lock);
73 * lis3l02dq_spi_write_reg_8() - write single byte to a register
74 * @dev: device associated with child of actual device (iio_dev or iio_trig)
75 * @reg_address: the address of the register to be writen
76 * @val: the value to write
78 int lis3l02dq_spi_write_reg_8(struct device *dev,
83 struct spi_message msg;
84 struct iio_dev *indio_dev = dev_get_drvdata(dev);
85 struct lis3l02dq_state *st = iio_dev_get_devdata(indio_dev);
86 struct spi_transfer xfer = {
93 mutex_lock(&st->buf_lock);
94 st->tx[0] = LIS3L02DQ_WRITE_REG(reg_address);
97 spi_message_init(&msg);
98 spi_message_add_tail(&xfer, &msg);
99 ret = spi_sync(st->us, &msg);
100 mutex_unlock(&st->buf_lock);
106 * lisl302dq_spi_write_reg_s16() - write 2 bytes to a pair of registers
107 * @dev: device associated with child of actual device (iio_dev or iio_trig)
108 * @reg_address: the address of the lower of the two registers. Second register
109 * is assumed to have address one greater.
110 * @val: value to be written
112 static int lis3l02dq_spi_write_reg_s16(struct device *dev,
113 u8 lower_reg_address,
117 struct spi_message msg;
118 struct iio_dev *indio_dev = dev_get_drvdata(dev);
119 struct lis3l02dq_state *st = iio_dev_get_devdata(indio_dev);
120 struct spi_transfer xfers[] = { {
126 .tx_buf = st->tx + 2,
133 mutex_lock(&st->buf_lock);
134 st->tx[0] = LIS3L02DQ_WRITE_REG(lower_reg_address);
135 st->tx[1] = value & 0xFF;
136 st->tx[2] = LIS3L02DQ_WRITE_REG(lower_reg_address + 1);
137 st->tx[3] = (value >> 8) & 0xFF;
139 spi_message_init(&msg);
140 spi_message_add_tail(&xfers[0], &msg);
141 spi_message_add_tail(&xfers[1], &msg);
142 ret = spi_sync(st->us, &msg);
143 mutex_unlock(&st->buf_lock);
149 * lisl302dq_spi_read_reg_s16() - write 2 bytes to a pair of registers
150 * @dev: device associated with child of actual device (iio_dev or iio_trig)
151 * @reg_address: the address of the lower of the two registers. Second register
152 * is assumed to have address one greater.
153 * @val: somewhere to pass back the value read
155 static int lis3l02dq_spi_read_reg_s16(struct device *dev,
156 u8 lower_reg_address,
159 struct spi_message msg;
160 struct iio_dev *indio_dev = dev_get_drvdata(dev);
161 struct lis3l02dq_state *st = iio_dev_get_devdata(indio_dev);
163 struct spi_transfer xfers[] = { {
170 .tx_buf = st->tx + 2,
171 .rx_buf = st->rx + 2,
179 mutex_lock(&st->buf_lock);
180 st->tx[0] = LIS3L02DQ_READ_REG(lower_reg_address);
182 st->tx[2] = LIS3L02DQ_READ_REG(lower_reg_address+1);
185 spi_message_init(&msg);
186 spi_message_add_tail(&xfers[0], &msg);
187 spi_message_add_tail(&xfers[1], &msg);
188 ret = spi_sync(st->us, &msg);
190 dev_err(&st->us->dev, "problem when reading 16 bit register");
193 *val = (s16)(st->rx[1]) | ((s16)(st->rx[3]) << 8);
196 mutex_unlock(&st->buf_lock);
201 * lis3l02dq_read_signed() - attribute function used for 8 bit signed values
202 * @dev: the child device associated with the iio_dev or iio_trigger
203 * @attr: the attribute being processed
204 * @buf: buffer into which put the output string
206 static ssize_t lis3l02dq_read_signed(struct device *dev,
207 struct device_attribute *attr,
212 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
214 ret = lis3l02dq_spi_read_reg_8(dev, this_attr->address, (u8 *)&val);
216 return ret ? ret : sprintf(buf, "%d\n", val);
219 static ssize_t lis3l02dq_read_unsigned(struct device *dev,
220 struct device_attribute *attr,
225 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
227 ret = lis3l02dq_spi_read_reg_8(dev, this_attr->address, &val);
229 return ret ? ret : sprintf(buf, "%d\n", val);
232 static ssize_t lis3l02dq_write_signed(struct device *dev,
233 struct device_attribute *attr,
240 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
242 ret = strict_strtol(buf, 10, &valin);
246 ret = lis3l02dq_spi_write_reg_8(dev, this_attr->address, (u8 *)&val);
249 return ret ? ret : len;
252 static ssize_t lis3l02dq_write_unsigned(struct device *dev,
253 struct device_attribute *attr,
260 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
262 ret = strict_strtoul(buf, 10, &valin);
266 ret = lis3l02dq_spi_write_reg_8(dev, this_attr->address, &val);
269 return ret ? ret : len;
272 static ssize_t lis3l02dq_read_16bit_signed(struct device *dev,
273 struct device_attribute *attr,
278 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
280 ret = lis3l02dq_spi_read_reg_s16(dev, this_attr->address, &val);
285 return sprintf(buf, "%d\n", val);
288 static ssize_t lis3l02dq_read_accel(struct device *dev,
289 struct device_attribute *attr,
292 struct iio_dev *indio_dev = dev_get_drvdata(dev);
295 /* Take the iio_dev status lock */
296 mutex_lock(&indio_dev->mlock);
297 if (indio_dev->currentmode == INDIO_RING_TRIGGERED)
298 ret = lis3l02dq_read_accel_from_ring(dev, attr, buf);
300 ret = lis3l02dq_read_16bit_signed(dev, attr, buf);
301 mutex_unlock(&indio_dev->mlock);
306 static ssize_t lis3l02dq_write_16bit_signed(struct device *dev,
307 struct device_attribute *attr,
311 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
315 ret = strict_strtol(buf, 10, &val);
318 ret = lis3l02dq_spi_write_reg_s16(dev, this_attr->address, val);
321 return ret ? ret : len;
324 static ssize_t lis3l02dq_read_frequency(struct device *dev,
325 struct device_attribute *attr,
330 ret = lis3l02dq_spi_read_reg_8(dev,
331 LIS3L02DQ_REG_CTRL_1_ADDR,
335 t &= LIS3L02DQ_DEC_MASK;
337 case LIS3L02DQ_REG_CTRL_1_DF_128:
338 len = sprintf(buf, "280\n");
340 case LIS3L02DQ_REG_CTRL_1_DF_64:
341 len = sprintf(buf, "560\n");
343 case LIS3L02DQ_REG_CTRL_1_DF_32:
344 len = sprintf(buf, "1120\n");
346 case LIS3L02DQ_REG_CTRL_1_DF_8:
347 len = sprintf(buf, "4480\n");
353 static ssize_t lis3l02dq_write_frequency(struct device *dev,
354 struct device_attribute *attr,
358 struct iio_dev *indio_dev = dev_get_drvdata(dev);
363 ret = strict_strtol(buf, 10, &val);
367 mutex_lock(&indio_dev->mlock);
368 ret = lis3l02dq_spi_read_reg_8(dev,
369 LIS3L02DQ_REG_CTRL_1_ADDR,
372 goto error_ret_mutex;
373 /* Wipe the bits clean */
374 t &= ~LIS3L02DQ_DEC_MASK;
377 t |= LIS3L02DQ_REG_CTRL_1_DF_128;
380 t |= LIS3L02DQ_REG_CTRL_1_DF_64;
383 t |= LIS3L02DQ_REG_CTRL_1_DF_32;
386 t |= LIS3L02DQ_REG_CTRL_1_DF_8;
390 goto error_ret_mutex;
393 ret = lis3l02dq_spi_write_reg_8(dev,
394 LIS3L02DQ_REG_CTRL_1_ADDR,
398 mutex_unlock(&indio_dev->mlock);
400 return ret ? ret : len;
403 static int lis3l02dq_initial_setup(struct lis3l02dq_state *st)
408 st->us->mode = SPI_MODE_3;
412 val = LIS3L02DQ_DEFAULT_CTRL1;
413 /* Write suitable defaults to ctrl1 */
414 ret = lis3l02dq_spi_write_reg_8(&st->indio_dev->dev,
415 LIS3L02DQ_REG_CTRL_1_ADDR,
418 dev_err(&st->us->dev, "problem with setup control register 1");
421 /* Repeat as sometimes doesn't work first time?*/
422 ret = lis3l02dq_spi_write_reg_8(&st->indio_dev->dev,
423 LIS3L02DQ_REG_CTRL_1_ADDR,
426 dev_err(&st->us->dev, "problem with setup control register 1");
430 /* Read back to check this has worked acts as loose test of correct
432 ret = lis3l02dq_spi_read_reg_8(&st->indio_dev->dev,
433 LIS3L02DQ_REG_CTRL_1_ADDR,
435 if (ret || (valtest != val)) {
436 dev_err(&st->indio_dev->dev, "device not playing ball");
441 val = LIS3L02DQ_DEFAULT_CTRL2;
442 ret = lis3l02dq_spi_write_reg_8(&st->indio_dev->dev,
443 LIS3L02DQ_REG_CTRL_2_ADDR,
446 dev_err(&st->us->dev, "problem with setup control register 2");
450 val = LIS3L02DQ_REG_WAKE_UP_CFG_LATCH_SRC;
451 ret = lis3l02dq_spi_write_reg_8(&st->indio_dev->dev,
452 LIS3L02DQ_REG_WAKE_UP_CFG_ADDR,
455 dev_err(&st->us->dev, "problem with interrupt cfg register");
461 static IIO_DEV_ATTR_ACCEL_X_OFFSET(S_IWUSR | S_IRUGO,
462 lis3l02dq_read_signed,
463 lis3l02dq_write_signed,
464 LIS3L02DQ_REG_OFFSET_X_ADDR);
466 static IIO_DEV_ATTR_ACCEL_Y_OFFSET(S_IWUSR | S_IRUGO,
467 lis3l02dq_read_signed,
468 lis3l02dq_write_signed,
469 LIS3L02DQ_REG_OFFSET_Y_ADDR);
471 static IIO_DEV_ATTR_ACCEL_Z_OFFSET(S_IWUSR | S_IRUGO,
472 lis3l02dq_read_signed,
473 lis3l02dq_write_signed,
474 LIS3L02DQ_REG_OFFSET_Z_ADDR);
476 static IIO_DEV_ATTR_ACCEL_X_GAIN(S_IWUSR | S_IRUGO,
477 lis3l02dq_read_unsigned,
478 lis3l02dq_write_unsigned,
479 LIS3L02DQ_REG_GAIN_X_ADDR);
481 static IIO_DEV_ATTR_ACCEL_Y_GAIN(S_IWUSR | S_IRUGO,
482 lis3l02dq_read_unsigned,
483 lis3l02dq_write_unsigned,
484 LIS3L02DQ_REG_GAIN_Y_ADDR);
486 static IIO_DEV_ATTR_ACCEL_Z_GAIN(S_IWUSR | S_IRUGO,
487 lis3l02dq_read_unsigned,
488 lis3l02dq_write_unsigned,
489 LIS3L02DQ_REG_GAIN_Z_ADDR);
491 static IIO_DEV_ATTR_ACCEL_THRESH(S_IWUSR | S_IRUGO,
492 lis3l02dq_read_16bit_signed,
493 lis3l02dq_write_16bit_signed,
494 LIS3L02DQ_REG_THS_L_ADDR);
496 /* RFC The reading method for these will change depending on whether
497 * ring buffer capture is in use. Is it worth making these take two
498 * functions and let the core handle which to call, or leave as in this
499 * driver where it is the drivers problem to manage this?
502 static IIO_DEV_ATTR_ACCEL_X(lis3l02dq_read_accel,
503 LIS3L02DQ_REG_OUT_X_L_ADDR);
505 static IIO_DEV_ATTR_ACCEL_Y(lis3l02dq_read_accel,
506 LIS3L02DQ_REG_OUT_Y_L_ADDR);
508 static IIO_DEV_ATTR_ACCEL_Z(lis3l02dq_read_accel,
509 LIS3L02DQ_REG_OUT_Z_L_ADDR);
511 static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
512 lis3l02dq_read_frequency,
513 lis3l02dq_write_frequency);
515 static IIO_CONST_ATTR_AVAIL_SAMP_FREQ("280 560 1120 4480");
517 static ssize_t lis3l02dq_read_interrupt_config(struct device *dev,
518 struct device_attribute *attr,
523 struct iio_event_attr *this_attr = to_iio_event_attr(attr);
525 ret = lis3l02dq_spi_read_reg_8(dev,
526 LIS3L02DQ_REG_WAKE_UP_CFG_ADDR,
529 return ret ? ret : sprintf(buf, "%d\n",
530 (val & this_attr->mask) ? 1 : 0);;
533 static ssize_t lis3l02dq_write_interrupt_config(struct device *dev,
534 struct device_attribute *attr,
538 struct iio_event_attr *this_attr = to_iio_event_attr(attr);
539 struct iio_dev *indio_dev = dev_get_drvdata(dev);
540 int ret, currentlyset, changed = 0;
541 u8 valold, controlold;
544 val = !(buf[0] == '0');
546 mutex_lock(&indio_dev->mlock);
547 /* read current value */
548 ret = lis3l02dq_spi_read_reg_8(dev,
549 LIS3L02DQ_REG_WAKE_UP_CFG_ADDR,
552 goto error_mutex_unlock;
554 /* read current control */
555 ret = lis3l02dq_spi_read_reg_8(dev,
556 LIS3L02DQ_REG_CTRL_2_ADDR,
559 goto error_mutex_unlock;
560 currentlyset = !!(valold & this_attr->mask);
561 if (val == false && currentlyset) {
562 valold &= ~this_attr->mask;
564 iio_remove_event_from_list(this_attr->listel,
565 &indio_dev->interrupts[0]
567 } else if (val == true && !currentlyset) {
569 valold |= this_attr->mask;
570 iio_add_event_to_list(this_attr->listel,
571 &indio_dev->interrupts[0]->ev_list);
575 ret = lis3l02dq_spi_write_reg_8(dev,
576 LIS3L02DQ_REG_WAKE_UP_CFG_ADDR,
579 goto error_mutex_unlock;
580 /* This always enables the interrupt, even if we've remove the
581 * last thing using it. For this device we can use the reference
582 * count on the handler to tell us if anyone wants the interrupt
584 controlold = this_attr->listel->refcount ?
585 (controlold | LIS3L02DQ_REG_CTRL_2_ENABLE_INTERRUPT) :
586 (controlold & ~LIS3L02DQ_REG_CTRL_2_ENABLE_INTERRUPT);
587 ret = lis3l02dq_spi_write_reg_8(dev,
588 LIS3L02DQ_REG_CTRL_2_ADDR,
591 goto error_mutex_unlock;
594 mutex_unlock(&indio_dev->mlock);
596 return ret ? ret : len;
600 static int lis3l02dq_thresh_handler_th(struct iio_dev *dev_info,
605 struct lis3l02dq_state *st = dev_info->dev_data;
607 /* Stash the timestamp somewhere convenient for the bh */
608 st->last_timestamp = timestamp;
609 schedule_work(&st->work_cont_thresh.ws);
615 /* Unforunately it appears the interrupt won't clear unless you read from the
618 static void lis3l02dq_thresh_handler_bh_no_check(struct work_struct *work_s)
620 struct iio_work_cont *wc
621 = container_of(work_s, struct iio_work_cont, ws_nocheck);
622 struct lis3l02dq_state *st = wc->st;
625 lis3l02dq_spi_read_reg_8(&st->indio_dev->dev,
626 LIS3L02DQ_REG_WAKE_UP_SRC_ADDR,
629 if (t & LIS3L02DQ_REG_WAKE_UP_SRC_INTERRUPT_Z_HIGH)
630 iio_push_event(st->indio_dev, 0,
631 IIO_EVENT_CODE_ACCEL_Z_HIGH,
634 if (t & LIS3L02DQ_REG_WAKE_UP_SRC_INTERRUPT_Z_LOW)
635 iio_push_event(st->indio_dev, 0,
636 IIO_EVENT_CODE_ACCEL_Z_LOW,
639 if (t & LIS3L02DQ_REG_WAKE_UP_SRC_INTERRUPT_Y_HIGH)
640 iio_push_event(st->indio_dev, 0,
641 IIO_EVENT_CODE_ACCEL_Y_HIGH,
644 if (t & LIS3L02DQ_REG_WAKE_UP_SRC_INTERRUPT_Y_LOW)
645 iio_push_event(st->indio_dev, 0,
646 IIO_EVENT_CODE_ACCEL_Y_LOW,
649 if (t & LIS3L02DQ_REG_WAKE_UP_SRC_INTERRUPT_X_HIGH)
650 iio_push_event(st->indio_dev, 0,
651 IIO_EVENT_CODE_ACCEL_X_HIGH,
654 if (t & LIS3L02DQ_REG_WAKE_UP_SRC_INTERRUPT_X_LOW)
655 iio_push_event(st->indio_dev, 0,
656 IIO_EVENT_CODE_ACCEL_X_LOW,
658 /* reenable the irq */
659 enable_irq(st->us->irq);
660 /* Ack and allow for new interrupts */
661 lis3l02dq_spi_read_reg_8(&st->indio_dev->dev,
662 LIS3L02DQ_REG_WAKE_UP_ACK_ADDR,
668 /* A shared handler for a number of threshold types */
669 IIO_EVENT_SH(threshold, &lis3l02dq_thresh_handler_th);
671 IIO_EVENT_ATTR_ACCEL_X_HIGH_SH(iio_event_threshold,
672 lis3l02dq_read_interrupt_config,
673 lis3l02dq_write_interrupt_config,
674 LIS3L02DQ_REG_WAKE_UP_CFG_INTERRUPT_X_HIGH);
676 IIO_EVENT_ATTR_ACCEL_Y_HIGH_SH(iio_event_threshold,
677 lis3l02dq_read_interrupt_config,
678 lis3l02dq_write_interrupt_config,
679 LIS3L02DQ_REG_WAKE_UP_CFG_INTERRUPT_Y_HIGH);
681 IIO_EVENT_ATTR_ACCEL_Z_HIGH_SH(iio_event_threshold,
682 lis3l02dq_read_interrupt_config,
683 lis3l02dq_write_interrupt_config,
684 LIS3L02DQ_REG_WAKE_UP_CFG_INTERRUPT_Z_HIGH);
686 IIO_EVENT_ATTR_ACCEL_X_LOW_SH(iio_event_threshold,
687 lis3l02dq_read_interrupt_config,
688 lis3l02dq_write_interrupt_config,
689 LIS3L02DQ_REG_WAKE_UP_CFG_INTERRUPT_X_LOW);
691 IIO_EVENT_ATTR_ACCEL_Y_LOW_SH(iio_event_threshold,
692 lis3l02dq_read_interrupt_config,
693 lis3l02dq_write_interrupt_config,
694 LIS3L02DQ_REG_WAKE_UP_CFG_INTERRUPT_Y_LOW);
696 IIO_EVENT_ATTR_ACCEL_Z_LOW_SH(iio_event_threshold,
697 lis3l02dq_read_interrupt_config,
698 lis3l02dq_write_interrupt_config,
699 LIS3L02DQ_REG_WAKE_UP_CFG_INTERRUPT_Z_LOW);
701 static struct attribute *lis3l02dq_event_attributes[] = {
702 &iio_event_attr_accel_x_high.dev_attr.attr,
703 &iio_event_attr_accel_y_high.dev_attr.attr,
704 &iio_event_attr_accel_z_high.dev_attr.attr,
705 &iio_event_attr_accel_x_low.dev_attr.attr,
706 &iio_event_attr_accel_y_low.dev_attr.attr,
707 &iio_event_attr_accel_z_low.dev_attr.attr,
711 static struct attribute_group lis3l02dq_event_attribute_group = {
712 .attrs = lis3l02dq_event_attributes,
715 static IIO_CONST_ATTR(name, "lis3l02dq");
717 static struct attribute *lis3l02dq_attributes[] = {
718 &iio_dev_attr_accel_x_offset.dev_attr.attr,
719 &iio_dev_attr_accel_y_offset.dev_attr.attr,
720 &iio_dev_attr_accel_z_offset.dev_attr.attr,
721 &iio_dev_attr_accel_x_gain.dev_attr.attr,
722 &iio_dev_attr_accel_y_gain.dev_attr.attr,
723 &iio_dev_attr_accel_z_gain.dev_attr.attr,
724 &iio_dev_attr_thresh.dev_attr.attr,
725 &iio_dev_attr_accel_x.dev_attr.attr,
726 &iio_dev_attr_accel_y.dev_attr.attr,
727 &iio_dev_attr_accel_z.dev_attr.attr,
728 &iio_dev_attr_sampling_frequency.dev_attr.attr,
729 &iio_const_attr_available_sampling_frequency.dev_attr.attr,
730 &iio_const_attr_name.dev_attr.attr,
734 static const struct attribute_group lis3l02dq_attribute_group = {
735 .attrs = lis3l02dq_attributes,
738 static int __devinit lis3l02dq_probe(struct spi_device *spi)
740 int ret, regdone = 0;
741 struct lis3l02dq_state *st = kzalloc(sizeof *st, GFP_KERNEL);
746 /* this is only used tor removal purposes */
747 spi_set_drvdata(spi, st);
749 /* Allocate the comms buffers */
750 st->rx = kzalloc(sizeof(*st->rx)*LIS3L02DQ_MAX_RX, GFP_KERNEL);
751 if (st->rx == NULL) {
755 st->tx = kzalloc(sizeof(*st->tx)*LIS3L02DQ_MAX_TX, GFP_KERNEL);
756 if (st->tx == NULL) {
761 mutex_init(&st->buf_lock);
762 /* setup the industrialio driver allocated elements */
763 st->indio_dev = iio_allocate_device();
764 if (st->indio_dev == NULL) {
769 st->indio_dev->dev.parent = &spi->dev;
770 st->indio_dev->num_interrupt_lines = 1;
771 st->indio_dev->event_attrs = &lis3l02dq_event_attribute_group;
772 st->indio_dev->attrs = &lis3l02dq_attribute_group;
773 st->indio_dev->dev_data = (void *)(st);
774 st->indio_dev->driver_module = THIS_MODULE;
775 st->indio_dev->modes = INDIO_DIRECT_MODE;
777 ret = lis3l02dq_configure_ring(st->indio_dev);
781 ret = iio_device_register(st->indio_dev);
783 goto error_unreg_ring_funcs;
786 ret = lis3l02dq_initialize_ring(st->indio_dev->ring);
788 printk(KERN_ERR "failed to initialize the ring\n");
789 goto error_unreg_ring_funcs;
792 if (spi->irq && gpio_is_valid(irq_to_gpio(spi->irq)) > 0) {
793 /* This is a little unusual, in that the device seems
794 to need a full read of the interrupt source reg before
795 the interrupt will reset.
796 Hence the two handlers are the same */
797 iio_init_work_cont(&st->work_cont_thresh,
798 lis3l02dq_thresh_handler_bh_no_check,
799 lis3l02dq_thresh_handler_bh_no_check,
800 LIS3L02DQ_REG_WAKE_UP_SRC_ADDR,
804 ret = iio_register_interrupt_line(spi->irq,
810 goto error_uninitialize_ring;
812 ret = lis3l02dq_probe_trigger(st->indio_dev);
814 goto error_unregister_line;
817 /* Get the device into a sane initial state */
818 ret = lis3l02dq_initial_setup(st);
820 goto error_remove_trigger;
823 error_remove_trigger:
824 if (st->indio_dev->modes & INDIO_RING_TRIGGERED)
825 lis3l02dq_remove_trigger(st->indio_dev);
826 error_unregister_line:
827 if (st->indio_dev->modes & INDIO_RING_TRIGGERED)
828 iio_unregister_interrupt_line(st->indio_dev, 0);
829 error_uninitialize_ring:
830 lis3l02dq_uninitialize_ring(st->indio_dev->ring);
831 error_unreg_ring_funcs:
832 lis3l02dq_unconfigure_ring(st->indio_dev);
835 iio_device_unregister(st->indio_dev);
837 iio_free_device(st->indio_dev);
848 /* Power down the device */
849 static int lis3l02dq_stop_device(struct iio_dev *indio_dev)
852 struct lis3l02dq_state *st = indio_dev->dev_data;
855 mutex_lock(&indio_dev->mlock);
856 ret = lis3l02dq_spi_write_reg_8(&indio_dev->dev,
857 LIS3L02DQ_REG_CTRL_1_ADDR,
860 dev_err(&st->us->dev, "problem with turning device off: ctrl1");
864 ret = lis3l02dq_spi_write_reg_8(&indio_dev->dev,
865 LIS3L02DQ_REG_CTRL_2_ADDR,
868 dev_err(&st->us->dev, "problem with turning device off: ctrl2");
870 mutex_unlock(&indio_dev->mlock);
874 /* fixme, confirm ordering in this function */
875 static int lis3l02dq_remove(struct spi_device *spi)
878 struct lis3l02dq_state *st = spi_get_drvdata(spi);
879 struct iio_dev *indio_dev = st->indio_dev;
881 ret = lis3l02dq_stop_device(indio_dev);
885 flush_scheduled_work();
887 lis3l02dq_remove_trigger(indio_dev);
888 if (spi->irq && gpio_is_valid(irq_to_gpio(spi->irq)) > 0)
889 iio_unregister_interrupt_line(indio_dev, 0);
891 lis3l02dq_uninitialize_ring(indio_dev->ring);
892 lis3l02dq_unconfigure_ring(indio_dev);
893 iio_device_unregister(indio_dev);
904 static struct spi_driver lis3l02dq_driver = {
907 .owner = THIS_MODULE,
909 .probe = lis3l02dq_probe,
910 .remove = __devexit_p(lis3l02dq_remove),
913 static __init int lis3l02dq_init(void)
915 return spi_register_driver(&lis3l02dq_driver);
917 module_init(lis3l02dq_init);
919 static __exit void lis3l02dq_exit(void)
921 spi_unregister_driver(&lis3l02dq_driver);
923 module_exit(lis3l02dq_exit);
925 MODULE_AUTHOR("Jonathan Cameron <jic23@cam.ac.uk>");
926 MODULE_DESCRIPTION("ST LIS3L02DQ Accelerometer SPI driver");
927 MODULE_LICENSE("GPL v2");