2 * Copyright © 2006-2009 Intel Corporation
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * You should have received a copy of the GNU General Public License along with
14 * this program; if not, write to the Free Software Foundation, Inc.,
15 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18 * Eric Anholt <eric@anholt.net>
19 * Dave Airlie <airlied@linux.ie>
20 * Jesse Barnes <jesse.barnes@intel.com>
23 #include <linux/i2c.h>
27 #include "intel_bios.h"
29 #include "psb_intel_drv.h"
30 #include "psb_intel_reg.h"
32 #include <linux/pm_runtime.h>
34 /* The max/min PWM frequency in BPCR[31:17] - */
35 /* The smallest number is 1 (not 0) that can fit in the
36 * 15-bit field of the and then*/
37 /* shifts to the left by one bit to get the actual 16-bit
38 * value that the 15-bits correspond to.*/
39 #define MRST_BLC_MAX_PWM_REG_FREQ 0xFFFF
40 #define BRIGHTNESS_MAX_LEVEL 100
43 * Sets the power state for the panel.
45 static void mrst_lvds_set_power(struct drm_device *dev,
46 struct psb_intel_output *output, bool on)
49 struct drm_psb_private *dev_priv = dev->dev_private;
51 if (!gma_power_begin(dev, true))
55 REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) |
58 pp_status = REG_READ(PP_STATUS);
59 } while ((pp_status & (PP_ON | PP_READY)) == PP_READY);
60 dev_priv->is_lvds_on = true;
62 REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) &
65 pp_status = REG_READ(PP_STATUS);
66 } while (pp_status & PP_ON);
67 dev_priv->is_lvds_on = false;
68 pm_request_idle(&dev->pdev->dev);
74 static void mrst_lvds_dpms(struct drm_encoder *encoder, int mode)
76 struct drm_device *dev = encoder->dev;
77 struct psb_intel_output *output = enc_to_psb_intel_output(encoder);
79 if (mode == DRM_MODE_DPMS_ON)
80 mrst_lvds_set_power(dev, output, true);
82 mrst_lvds_set_power(dev, output, false);
84 /* XXX: We never power down the LVDS pairs. */
87 static void mrst_lvds_mode_set(struct drm_encoder *encoder,
88 struct drm_display_mode *mode,
89 struct drm_display_mode *adjusted_mode)
91 struct psb_intel_mode_device *mode_dev =
92 enc_to_psb_intel_output(encoder)->mode_dev;
93 struct drm_device *dev = encoder->dev;
94 struct drm_psb_private *dev_priv = dev->dev_private;
96 uint64_t v = DRM_MODE_SCALE_FULLSCREEN;
98 if (!gma_power_begin(dev, true))
102 * The LVDS pin pair will already have been turned on in the
103 * psb_intel_crtc_mode_set since it has a large impact on the DPLL
106 lvds_port = (REG_READ(LVDS) &
107 (~LVDS_PIPEB_SELECT)) |
111 /* If the firmware says dither on Moorestown, or the BIOS does
112 on Oaktrail then enable dithering */
113 if (mode_dev->panel_wants_dither || dev_priv->lvds_dither)
114 lvds_port |= MRST_PANEL_8TO6_DITHER_ENABLE;
116 REG_WRITE(LVDS, lvds_port);
118 drm_connector_property_get_value(
119 &enc_to_psb_intel_output(encoder)->base,
120 dev->mode_config.scaling_mode_property,
123 if (v == DRM_MODE_SCALE_NO_SCALE)
124 REG_WRITE(PFIT_CONTROL, 0);
125 else if (v == DRM_MODE_SCALE_ASPECT) {
126 if ((mode->vdisplay != adjusted_mode->crtc_vdisplay) ||
127 (mode->hdisplay != adjusted_mode->crtc_hdisplay)) {
128 if ((adjusted_mode->crtc_hdisplay * mode->vdisplay) ==
129 (mode->hdisplay * adjusted_mode->crtc_vdisplay))
130 REG_WRITE(PFIT_CONTROL, PFIT_ENABLE);
131 else if ((adjusted_mode->crtc_hdisplay *
132 mode->vdisplay) > (mode->hdisplay *
133 adjusted_mode->crtc_vdisplay))
134 REG_WRITE(PFIT_CONTROL, PFIT_ENABLE |
135 PFIT_SCALING_MODE_PILLARBOX);
137 REG_WRITE(PFIT_CONTROL, PFIT_ENABLE |
138 PFIT_SCALING_MODE_LETTERBOX);
140 REG_WRITE(PFIT_CONTROL, PFIT_ENABLE);
141 } else /*(v == DRM_MODE_SCALE_FULLSCREEN)*/
142 REG_WRITE(PFIT_CONTROL, PFIT_ENABLE);
148 static const struct drm_encoder_helper_funcs mrst_lvds_helper_funcs = {
149 .dpms = mrst_lvds_dpms,
150 .mode_fixup = psb_intel_lvds_mode_fixup,
151 .prepare = psb_intel_lvds_prepare,
152 .mode_set = mrst_lvds_mode_set,
153 .commit = psb_intel_lvds_commit,
156 static struct drm_display_mode lvds_configuration_modes[] = {
157 /* hard coded fixed mode for TPO LTPS LPJ040K001A */
158 { DRM_MODE("800x480", DRM_MODE_TYPE_DRIVER, 33264, 800, 836,
159 846, 1056, 0, 480, 489, 491, 525, 0, 0) },
160 /* hard coded fixed mode for LVDS 800x480 */
161 { DRM_MODE("800x480", DRM_MODE_TYPE_DRIVER, 30994, 800, 801,
162 802, 1024, 0, 480, 481, 482, 525, 0, 0) },
163 /* hard coded fixed mode for Samsung 480wsvga LVDS 1024x600@75 */
164 { DRM_MODE("1024x600", DRM_MODE_TYPE_DRIVER, 53990, 1024, 1072,
165 1104, 1184, 0, 600, 603, 604, 608, 0, 0) },
166 /* hard coded fixed mode for Samsung 480wsvga LVDS 1024x600@75 */
167 { DRM_MODE("1024x600", DRM_MODE_TYPE_DRIVER, 53990, 1024, 1104,
168 1136, 1184, 0, 600, 603, 604, 608, 0, 0) },
169 /* hard coded fixed mode for Sharp wsvga LVDS 1024x600 */
170 { DRM_MODE("1024x600", DRM_MODE_TYPE_DRIVER, 48885, 1024, 1124,
171 1204, 1312, 0, 600, 607, 610, 621, 0, 0) },
172 /* hard coded fixed mode for LVDS 1024x768 */
173 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
174 1184, 1344, 0, 768, 771, 777, 806, 0, 0) },
175 /* hard coded fixed mode for LVDS 1366x768 */
176 { DRM_MODE("1366x768", DRM_MODE_TYPE_DRIVER, 77500, 1366, 1430,
177 1558, 1664, 0, 768, 769, 770, 776, 0, 0) },
180 /* Returns the panel fixed mode from configuration. */
182 static struct drm_display_mode *
183 mrst_lvds_get_configuration_mode(struct drm_device *dev)
185 struct drm_display_mode *mode = NULL;
186 struct drm_psb_private *dev_priv = dev->dev_private;
187 struct mrst_timing_info *ti = &dev_priv->gct_data.DTD;
189 if (dev_priv->vbt_data.size != 0x00) { /*if non-zero, then use vbt*/
190 mode = kzalloc(sizeof(*mode), GFP_KERNEL);
194 mode->hdisplay = (ti->hactive_hi << 8) | ti->hactive_lo;
195 mode->vdisplay = (ti->vactive_hi << 8) | ti->vactive_lo;
196 mode->hsync_start = mode->hdisplay + \
197 ((ti->hsync_offset_hi << 8) | \
198 ti->hsync_offset_lo);
199 mode->hsync_end = mode->hsync_start + \
200 ((ti->hsync_pulse_width_hi << 8) | \
201 ti->hsync_pulse_width_lo);
202 mode->htotal = mode->hdisplay + ((ti->hblank_hi << 8) | \
204 mode->vsync_start = \
205 mode->vdisplay + ((ti->vsync_offset_hi << 4) | \
206 ti->vsync_offset_lo);
208 mode->vsync_start + ((ti->vsync_pulse_width_hi << 4) | \
209 ti->vsync_pulse_width_lo);
210 mode->vtotal = mode->vdisplay + \
211 ((ti->vblank_hi << 8) | ti->vblank_lo);
212 mode->clock = ti->pixel_clock * 10;
214 printk(KERN_INFO "hdisplay is %d\n", mode->hdisplay);
215 printk(KERN_INFO "vdisplay is %d\n", mode->vdisplay);
216 printk(KERN_INFO "HSS is %d\n", mode->hsync_start);
217 printk(KERN_INFO "HSE is %d\n", mode->hsync_end);
218 printk(KERN_INFO "htotal is %d\n", mode->htotal);
219 printk(KERN_INFO "VSS is %d\n", mode->vsync_start);
220 printk(KERN_INFO "VSE is %d\n", mode->vsync_end);
221 printk(KERN_INFO "vtotal is %d\n", mode->vtotal);
222 printk(KERN_INFO "clock is %d\n", mode->clock);
225 mode = drm_mode_duplicate(dev, &lvds_configuration_modes[2]);
227 drm_mode_set_name(mode);
228 drm_mode_set_crtcinfo(mode, 0);
234 * mrst_lvds_init - setup LVDS connectors on this device
237 * Create the connector, register the LVDS DDC bus, and try to figure out what
238 * modes we can display on the LVDS panel (if present).
240 void mrst_lvds_init(struct drm_device *dev,
241 struct psb_intel_mode_device *mode_dev)
243 struct psb_intel_output *psb_intel_output;
244 struct drm_connector *connector;
245 struct drm_encoder *encoder;
246 struct drm_psb_private *dev_priv =
247 (struct drm_psb_private *) dev->dev_private;
250 struct i2c_adapter *i2c_adap;
251 struct drm_display_mode *scan; /* *modes, *bios_mode; */
253 psb_intel_output = kzalloc(sizeof(struct psb_intel_output), GFP_KERNEL);
254 if (!psb_intel_output)
257 psb_intel_output->mode_dev = mode_dev;
258 connector = &psb_intel_output->base;
259 encoder = &psb_intel_output->enc;
260 dev_priv->is_lvds_on = true;
261 drm_connector_init(dev, &psb_intel_output->base,
262 &psb_intel_lvds_connector_funcs,
263 DRM_MODE_CONNECTOR_LVDS);
265 drm_encoder_init(dev, &psb_intel_output->enc, &psb_intel_lvds_enc_funcs,
266 DRM_MODE_ENCODER_LVDS);
268 drm_mode_connector_attach_encoder(&psb_intel_output->base,
269 &psb_intel_output->enc);
270 psb_intel_output->type = INTEL_OUTPUT_LVDS;
272 drm_encoder_helper_add(encoder, &mrst_lvds_helper_funcs);
273 drm_connector_helper_add(connector,
274 &psb_intel_lvds_connector_helper_funcs);
275 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
276 connector->interlace_allowed = false;
277 connector->doublescan_allowed = false;
279 drm_connector_attach_property(connector,
280 dev->mode_config.scaling_mode_property,
281 DRM_MODE_SCALE_FULLSCREEN);
282 drm_connector_attach_property(connector,
283 dev_priv->backlight_property,
284 BRIGHTNESS_MAX_LEVEL);
286 mode_dev->panel_wants_dither = false;
287 if (dev_priv->vbt_data.size != 0x00)
288 mode_dev->panel_wants_dither = (dev_priv->gct_data.
289 Panel_Port_Control & MRST_PANEL_8TO6_DITHER_ENABLE);
293 * 1) check for EDID on DDC
294 * 2) check for VBT data
295 * 3) check to see if LVDS is already on
296 * if none of the above, no panel
297 * 4) make sure lid is open
298 * if closed, act like it's not there for now
301 /* This ifdef can go once the cpu ident stuff is cleaned up in arch */
302 #if defined(CONFIG_X86_MRST)
303 if (mrst_identify_cpu())
304 i2c_adap = i2c_get_adapter(2);
305 else /* Oaktrail uses I2C 1 */
307 i2c_adap = i2c_get_adapter(1);
309 if (i2c_adap == NULL)
310 printk(KERN_ALERT "No ddc adapter available!\n");
312 * Attempt to get the fixed panel mode from DDC. Assume that the
313 * preferred mode is the right one.
316 edid = drm_get_edid(connector, i2c_adap);
318 drm_mode_connector_update_edid_property(connector,
320 ret = drm_add_edid_modes(connector, edid);
324 list_for_each_entry(scan, &connector->probed_modes, head) {
325 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
326 mode_dev->panel_fixed_mode =
327 drm_mode_duplicate(dev, scan);
328 goto out; /* FIXME: check for quirks */
334 * If we didn't get EDID, try geting panel timing
335 * from configuration data
337 mode_dev->panel_fixed_mode = mrst_lvds_get_configuration_mode(dev);
339 if (mode_dev->panel_fixed_mode) {
340 mode_dev->panel_fixed_mode->type |=
341 DRM_MODE_TYPE_PREFERRED;
342 goto out; /* FIXME: check for quirks */
345 /* If we still don't have a mode after all that, give up. */
346 if (!mode_dev->panel_fixed_mode) {
347 dev_err(dev->dev, "Found no modes on the lvds, ignoring the LVDS\n");
352 drm_sysfs_connector_add(connector);
356 dev_dbg(dev->dev, "No LVDS modes found, disabling.\n");
357 if (psb_intel_output->ddc_bus)
358 psb_intel_i2c_destroy(psb_intel_output->ddc_bus);
362 drm_encoder_cleanup(encoder);
363 drm_connector_cleanup(connector);