3 * 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
5 * Copyright © 2005 Agere Systems Inc.
9 *------------------------------------------------------------------------------
11 * et131x_initpci.c - Routines and data used to register the driver with the
12 * PCI (and PCI Express) subsystem, as well as basic driver
15 *------------------------------------------------------------------------------
19 * This software is provided subject to the following terms and conditions,
20 * which you should read carefully before using the software. Using this
21 * software indicates your acceptance of these terms and conditions. If you do
22 * not agree with these terms and conditions, do not use the software.
24 * Copyright © 2005 Agere Systems Inc.
25 * All rights reserved.
27 * Redistribution and use in source or binary forms, with or without
28 * modifications, are permitted provided that the following conditions are met:
30 * . Redistributions of source code must retain the above copyright notice, this
31 * list of conditions and the following Disclaimer as comments in the code as
32 * well as in the documentation and/or other materials provided with the
35 * . Redistributions in binary form must reproduce the above copyright notice,
36 * this list of conditions and the following Disclaimer in the documentation
37 * and/or other materials provided with the distribution.
39 * . Neither the name of Agere Systems Inc. nor the names of the contributors
40 * may be used to endorse or promote products derived from this software
41 * without specific prior written permission.
45 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
46 * INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
47 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
48 * USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
49 * RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY
50 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
51 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
52 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
53 * ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT
54 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
55 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
60 #include "et131x_version.h"
61 #include "et131x_defs.h"
63 #include <linux/pci.h>
64 #include <linux/init.h>
65 #include <linux/module.h>
66 #include <linux/types.h>
67 #include <linux/kernel.h>
69 #include <linux/sched.h>
70 #include <linux/ptrace.h>
71 #include <linux/slab.h>
72 #include <linux/ctype.h>
73 #include <linux/string.h>
74 #include <linux/timer.h>
75 #include <linux/interrupt.h>
77 #include <linux/delay.h>
79 #include <linux/bitops.h>
80 #include <asm/system.h>
82 #include <linux/netdevice.h>
83 #include <linux/etherdevice.h>
84 #include <linux/skbuff.h>
85 #include <linux/if_arp.h>
86 #include <linux/ioport.h>
87 #include <linux/random.h>
89 #include "et1310_phy.h"
91 #include "et131x_adapter.h"
93 #include "et1310_address_map.h"
94 #include "et1310_tx.h"
95 #include "et1310_rx.h"
98 #define INTERNAL_MEM_SIZE 0x400 /* 1024 of internal memory */
99 #define INTERNAL_MEM_RX_OFFSET 0x1FF /* 50% Tx, 50% Rx */
101 /* Defines for Parameter Default/Min/Max vaules */
102 #define PARM_SPEED_DUPLEX_MIN 0
103 #define PARM_SPEED_DUPLEX_MAX 5
105 /* Module parameter for manual speed setting
106 * Set Link speed and dublex manually (0-5) [0]
107 * 1 : 10Mb Half-Duplex
108 * 2 : 10Mb Full-Duplex
109 * 3 : 100Mb Half-Duplex
110 * 4 : 100Mb Full-Duplex
111 * 5 : 1000Mb Full-Duplex
112 * 0 : Auto Speed Auto Duplex // default
114 static u32 et131x_speed_set;
115 module_param(et131x_speed_set, uint, 0);
116 MODULE_PARM_DESC(et131x_speed_set,
117 "Set Link speed and dublex manually (0-5) [0] \n 1 : 10Mb Half-Duplex \n 2 : 10Mb Full-Duplex \n 3 : 100Mb Half-Duplex \n 4 : 100Mb Full-Duplex \n 5 : 1000Mb Full-Duplex \n 0 : Auto Speed Auto Dublex");
120 * et131x_hwaddr_init - set up the MAC Address on the ET1310
121 * @adapter: pointer to our private adapter structure
123 void et131x_hwaddr_init(struct et131x_adapter *adapter)
125 /* If have our default mac from init and no mac address from
126 * EEPROM then we need to generate the last octet and set it on the
129 if (adapter->PermanentAddress[0] == 0x00 &&
130 adapter->PermanentAddress[1] == 0x00 &&
131 adapter->PermanentAddress[2] == 0x00 &&
132 adapter->PermanentAddress[3] == 0x00 &&
133 adapter->PermanentAddress[4] == 0x00 &&
134 adapter->PermanentAddress[5] == 0x00) {
136 * We need to randomly generate the last octet so we
137 * decrease our chances of setting the mac address to
138 * same as another one of our cards in the system
140 get_random_bytes(&adapter->CurrentAddress[5], 1);
142 * We have the default value in the register we are
143 * working with so we need to copy the current
144 * address into the permanent address
146 memcpy(adapter->PermanentAddress,
147 adapter->CurrentAddress, ETH_ALEN);
149 /* We do not have an override address, so set the
150 * current address to the permanent address and add
153 memcpy(adapter->CurrentAddress,
154 adapter->PermanentAddress, ETH_ALEN);
160 * et131x_pci_init - initial PCI setup
161 * @adapter: pointer to our private adapter structure
162 * @pdev: our PCI device
164 * Perform the initial setup of PCI registers and if possible initialise
165 * the MAC address. At this point the I/O registers have yet to be mapped
168 static int et131x_pci_init(struct et131x_adapter *adapter,
169 struct pci_dev *pdev)
175 if (et131x_init_eeprom(adapter) < 0)
178 /* Let's set up the PORT LOGIC Register. First we need to know what
179 * the max_payload_size is
181 if (pci_read_config_byte(pdev, ET1310_PCI_MAX_PYLD, &max_payload)) {
183 "Could not read PCI config space for Max Payload Size\n");
187 /* Program the Ack/Nak latency and replay timers */
188 max_payload &= 0x07; /* Only the lower 3 bits are valid */
190 if (max_payload < 2) {
191 static const u16 AckNak[2] = { 0x76, 0xD0 };
192 static const u16 Replay[2] = { 0x1E0, 0x2ED };
194 if (pci_write_config_word(pdev, ET1310_PCI_ACK_NACK,
195 AckNak[max_payload])) {
197 "Could not write PCI config space for ACK/NAK\n");
200 if (pci_write_config_word(pdev, ET1310_PCI_REPLAY,
201 Replay[max_payload])) {
203 "Could not write PCI config space for Replay Timer\n");
208 /* l0s and l1 latency timers. We are using default values.
209 * Representing 001 for L0s and 010 for L1
211 if (pci_write_config_byte(pdev, ET1310_PCI_L0L1LATENCY, 0x11)) {
213 "Could not write PCI config space for Latency Timers\n");
217 /* Change the max read size to 2k */
218 if (pci_read_config_byte(pdev, 0x51, &read_size_reg)) {
220 "Could not read PCI config space for Max read size\n");
224 read_size_reg &= 0x8f;
225 read_size_reg |= 0x40;
227 if (pci_write_config_byte(pdev, 0x51, read_size_reg)) {
229 "Could not write PCI config space for Max read size\n");
233 /* Get MAC address from config space if an eeprom exists, otherwise
234 * the MAC address there will not be valid
236 if (!adapter->has_eeprom) {
237 et131x_hwaddr_init(adapter);
241 for (i = 0; i < ETH_ALEN; i++) {
242 if (pci_read_config_byte(pdev, ET1310_PCI_MAC_ADDRESS + i,
243 adapter->PermanentAddress + i)) {
244 dev_err(&pdev->dev, "Could not read PCI config space for MAC address\n");
248 memcpy(adapter->CurrentAddress, adapter->PermanentAddress, ETH_ALEN);
253 * et131x_error_timer_handler
254 * @data: timer-specific variable; here a pointer to our adapter structure
256 * The routine called when the error timer expires, to track the number of
259 void et131x_error_timer_handler(unsigned long data)
261 struct et131x_adapter *etdev = (struct et131x_adapter *) data;
264 pm_csr = readl(&etdev->regs->global.pm_csr);
266 if ((pm_csr & ET_PM_PHY_SW_COMA) == 0)
267 UpdateMacStatHostCounters(etdev);
269 dev_err(&etdev->pdev->dev,
270 "No interrupts, in PHY coma, pm_csr = 0x%x\n", pm_csr);
272 if (!etdev->Bmsr.bits.link_status &&
273 etdev->RegistryPhyComa &&
274 etdev->PoMgmt.TransPhyComaModeOnBoot < 11) {
275 etdev->PoMgmt.TransPhyComaModeOnBoot++;
278 if (etdev->PoMgmt.TransPhyComaModeOnBoot == 10) {
279 if (!etdev->Bmsr.bits.link_status
280 && etdev->RegistryPhyComa) {
281 if ((pm_csr & ET_PM_PHY_SW_COMA) == 0) {
282 /* NOTE - This was originally a 'sync with
283 * interrupt'. How to do that under Linux?
285 et131x_enable_interrupts(etdev);
286 EnablePhyComa(etdev);
291 /* This is a periodic timer, so reschedule */
292 mod_timer(&etdev->ErrorTimer, jiffies +
293 TX_ERROR_PERIOD * HZ / 1000);
297 * et131x_link_detection_handler
299 * Timer function for link up at driver load time
301 void et131x_link_detection_handler(unsigned long data)
303 struct et131x_adapter *etdev = (struct et131x_adapter *) data;
306 if (etdev->MediaState == 0) {
307 spin_lock_irqsave(&etdev->Lock, flags);
309 etdev->MediaState = NETIF_STATUS_MEDIA_DISCONNECT;
310 etdev->Flags &= ~fMP_ADAPTER_LINK_DETECTION;
312 spin_unlock_irqrestore(&etdev->Lock, flags);
314 netif_carrier_off(etdev->netdev);
319 * et131x_configure_global_regs - configure JAGCore global regs
320 * @etdev: pointer to our adapter structure
322 * Used to configure the global registers on the JAGCore
324 void ConfigGlobalRegs(struct et131x_adapter *etdev)
326 struct global_regs __iomem *regs = &etdev->regs->global;
328 writel(0, ®s->rxq_start_addr);
329 writel(INTERNAL_MEM_SIZE - 1, ®s->txq_end_addr);
331 if (etdev->RegistryJumboPacket < 2048) {
332 /* Tx / RxDMA and Tx/Rx MAC interfaces have a 1k word
333 * block of RAM that the driver can split between Tx
334 * and Rx as it desires. Our default is to split it
337 writel(PARM_RX_MEM_END_DEF, ®s->rxq_end_addr);
338 writel(PARM_RX_MEM_END_DEF + 1, ®s->txq_start_addr);
339 } else if (etdev->RegistryJumboPacket < 8192) {
340 /* For jumbo packets > 2k but < 8k, split 50-50. */
341 writel(INTERNAL_MEM_RX_OFFSET, ®s->rxq_end_addr);
342 writel(INTERNAL_MEM_RX_OFFSET + 1, ®s->txq_start_addr);
344 /* 9216 is the only packet size greater than 8k that
345 * is available. The Tx buffer has to be big enough
346 * for one whole packet on the Tx side. We'll make
347 * the Tx 9408, and give the rest to Rx
349 writel(0x01b3, ®s->rxq_end_addr);
350 writel(0x01b4, ®s->txq_start_addr);
353 /* Initialize the loopback register. Disable all loopbacks. */
354 writel(0, ®s->loopback);
357 writel(0, ®s->msi_config);
359 /* By default, disable the watchdog timer. It will be enabled when
360 * a packet is queued.
362 writel(0, ®s->watchdog_timer);
367 * et131x_adapter_setup - Set the adapter up as per cassini+ documentation
368 * @adapter: pointer to our private adapter structure
370 * Returns 0 on success, errno on failure (as defined in errno.h)
372 int et131x_adapter_setup(struct et131x_adapter *etdev)
376 /* Configure the JAGCore */
377 ConfigGlobalRegs(etdev);
379 ConfigMACRegs1(etdev);
381 /* Configure the MMC registers */
382 /* All we need to do is initialize the Memory Control Register */
383 writel(ET_MMC_ENABLE, &etdev->regs->mmc.mmc_ctrl);
385 ConfigRxMacRegs(etdev);
386 ConfigTxMacRegs(etdev);
388 ConfigRxDmaRegs(etdev);
389 ConfigTxDmaRegs(etdev);
391 ConfigMacStatRegs(etdev);
393 /* Move the following code to Timer function?? */
394 status = et131x_xcvr_find(etdev);
397 dev_warn(&etdev->pdev->dev, "Could not find the xcvr\n");
399 /* Prepare the TRUEPHY library. */
400 ET1310_PhyInit(etdev);
402 /* Reset the phy now so changes take place */
403 ET1310_PhyReset(etdev);
406 ET1310_PhyPowerDown(etdev, 1);
409 * We need to turn off 1000 base half dulplex, the mac does not
410 * support it. For the 10/100 part, turn off all gig advertisement
412 if (etdev->pdev->device != ET131X_PCI_DEVICE_ID_FAST)
413 ET1310_PhyAdvertise1000BaseT(etdev, TRUEPHY_ADV_DUPLEX_FULL);
415 ET1310_PhyAdvertise1000BaseT(etdev, TRUEPHY_ADV_DUPLEX_NONE);
418 ET1310_PhyPowerDown(etdev, 0);
420 et131x_setphy_normal(etdev);
425 * et131x_soft_reset - Issue a soft reset to the hardware, complete for ET1310
426 * @adapter: pointer to our private adapter structure
428 void et131x_soft_reset(struct et131x_adapter *adapter)
430 /* Disable MAC Core */
431 writel(0xc00f0000, &adapter->regs->mac.cfg1);
433 /* Set everything to a reset value */
434 writel(0x7F, &adapter->regs->global.sw_reset);
435 writel(0x000f0000, &adapter->regs->mac.cfg1);
436 writel(0x00000000, &adapter->regs->mac.cfg1);
440 * et131x_align_allocated_memory - Align allocated memory on a given boundary
441 * @adapter: pointer to our adapter structure
442 * @phys_addr: pointer to Physical address
443 * @offset: pointer to the offset variable
444 * @mask: correct mask
446 void et131x_align_allocated_memory(struct et131x_adapter *adapter,
448 uint64_t *offset, uint64_t mask)
454 new_addr = *phys_addr & ~mask;
456 if (new_addr != *phys_addr) {
457 /* Move to next aligned block */
458 new_addr += mask + 1;
459 /* Return offset for adjusting virt addr */
460 *offset = new_addr - *phys_addr;
461 /* Return new physical address */
462 *phys_addr = new_addr;
467 * et131x_adapter_memory_alloc
468 * @adapter: pointer to our private adapter structure
470 * Returns 0 on success, errno on failure (as defined in errno.h).
472 * Allocate all the memory blocks for send, receive and others.
474 int et131x_adapter_memory_alloc(struct et131x_adapter *adapter)
478 /* Allocate memory for the Tx Ring */
479 status = et131x_tx_dma_memory_alloc(adapter);
481 dev_err(&adapter->pdev->dev,
482 "et131x_tx_dma_memory_alloc FAILED\n");
485 /* Receive buffer memory allocation */
486 status = et131x_rx_dma_memory_alloc(adapter);
488 dev_err(&adapter->pdev->dev,
489 "et131x_rx_dma_memory_alloc FAILED\n");
490 et131x_tx_dma_memory_free(adapter);
494 /* Init receive data structures */
495 status = et131x_init_recv(adapter);
497 dev_err(&adapter->pdev->dev,
498 "et131x_init_recv FAILED\n");
499 et131x_tx_dma_memory_free(adapter);
500 et131x_rx_dma_memory_free(adapter);
506 * et131x_adapter_memory_free - Free all memory allocated for use by Tx & Rx
507 * @adapter: pointer to our private adapter structure
509 void et131x_adapter_memory_free(struct et131x_adapter *adapter)
511 /* Free DMA memory */
512 et131x_tx_dma_memory_free(adapter);
513 et131x_rx_dma_memory_free(adapter);
519 * et131x_adapter_init
520 * @etdev: pointer to the private adapter struct
521 * @pdev: pointer to the PCI device
523 * Initialize the data structures for the et131x_adapter object and link
524 * them together with the platform provided device structures.
528 static struct et131x_adapter *et131x_adapter_init(struct net_device *netdev,
529 struct pci_dev *pdev)
531 static const u8 default_mac[] = { 0x00, 0x05, 0x3d, 0x00, 0x02, 0x00 };
532 static const u8 duplex[] = { 0, 1, 2, 1, 2, 2 };
533 static const u16 speed[] = { 0, 10, 10, 100, 100, 1000 };
535 struct et131x_adapter *etdev;
537 /* Setup the fundamental net_device and private adapter structure elements */
538 SET_NETDEV_DEV(netdev, &pdev->dev);
540 /* Allocate private adapter struct and copy in relevant information */
541 etdev = netdev_priv(netdev);
542 etdev->pdev = pci_dev_get(pdev);
543 etdev->netdev = netdev;
545 /* Do the same for the netdev struct */
546 netdev->irq = pdev->irq;
547 netdev->base_addr = pci_resource_start(pdev, 0);
549 /* Initialize spinlocks here */
550 spin_lock_init(&etdev->Lock);
551 spin_lock_init(&etdev->TCBSendQLock);
552 spin_lock_init(&etdev->TCBReadyQLock);
553 spin_lock_init(&etdev->SendHWLock);
554 spin_lock_init(&etdev->RcvLock);
555 spin_lock_init(&etdev->RcvPendLock);
556 spin_lock_init(&etdev->FbrLock);
557 spin_lock_init(&etdev->PHYLock);
559 /* Parse configuration parameters into the private adapter struct */
560 if (et131x_speed_set)
561 dev_info(&etdev->pdev->dev,
562 "Speed set manually to : %d \n", et131x_speed_set);
564 etdev->SpeedDuplex = et131x_speed_set;
565 etdev->RegistryJumboPacket = 1514; /* 1514-9216 */
567 /* Set the MAC address to a default */
568 memcpy(etdev->CurrentAddress, default_mac, ETH_ALEN);
570 /* Decode SpeedDuplex
572 * Set up as if we are auto negotiating always and then change if we
575 * If we are the 10/100 device, and gigabit is somehow requested then
576 * knock it down to 100 full.
578 if (etdev->pdev->device == ET131X_PCI_DEVICE_ID_FAST &&
579 etdev->SpeedDuplex == 5)
580 etdev->SpeedDuplex = 4;
582 etdev->AiForceSpeed = speed[etdev->SpeedDuplex];
583 etdev->AiForceDpx = duplex[etdev->SpeedDuplex]; /* Auto FDX */
589 * et131x_pci_setup - Perform device initialization
590 * @pdev: a pointer to the device's pci_dev structure
591 * @ent: this device's entry in the pci_device_id table
593 * Returns 0 on success, errno on failure (as defined in errno.h)
595 * Registered in the pci_driver structure, this function is called when the
596 * PCI subsystem finds a new PCI device which matches the information
597 * contained in the pci_device_id table. This routine is the equivalent to
598 * a device insertion routine.
601 static int __devinit et131x_pci_setup(struct pci_dev *pdev,
602 const struct pci_device_id *ent)
607 struct net_device *netdev;
608 struct et131x_adapter *adapter;
610 /* Enable the device via the PCI subsystem */
611 if (pci_enable_device(pdev) != 0) {
613 "pci_enable_device() failed\n");
617 /* Perform some basic PCI checks */
618 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
620 "Can't find PCI device's base address\n");
624 if (pci_request_regions(pdev, DRIVER_NAME)) {
626 "Can't get PCI resources\n");
630 /* Enable PCI bus mastering */
631 pci_set_master(pdev);
633 /* Query PCI for Power Mgmt Capabilities
635 * NOTE: Now reading PowerMgmt in another location; is this still
638 pm_cap = pci_find_capability(pdev, PCI_CAP_ID_PM);
641 "Cannot find Power Management capabilities\n");
643 goto err_release_res;
646 /* Check the DMA addressing support of this device */
647 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
648 pci_using_dac = true;
650 result = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
653 "Unable to obtain 64 bit DMA for consistent allocations\n");
654 goto err_release_res;
656 } else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
657 pci_using_dac = false;
660 "No usable DMA addressing method\n");
662 goto err_release_res;
665 /* Allocate netdev and private adapter structs */
666 netdev = et131x_device_alloc();
667 if (netdev == NULL) {
668 dev_err(&pdev->dev, "Couldn't alloc netdev struct\n");
670 goto err_release_res;
672 adapter = et131x_adapter_init(netdev, pdev);
673 /* Initialise the PCI setup for the device */
674 et131x_pci_init(adapter, pdev);
676 /* Map the bus-relative registers to system virtual memory */
677 adapter->regs = pci_ioremap_bar(pdev, 0);
678 if (adapter->regs == NULL) {
679 dev_err(&pdev->dev, "Cannot map device registers\n");
684 /* If Phy COMA mode was enabled when we went down, disable it here. */
685 writel(ET_PMCSR_INIT, &adapter->regs->global.pm_csr);
687 /* Issue a global reset to the et1310 */
688 et131x_soft_reset(adapter);
690 /* Disable all interrupts (paranoid) */
691 et131x_disable_interrupts(adapter);
693 /* Allocate DMA memory */
694 result = et131x_adapter_memory_alloc(adapter);
696 dev_err(&pdev->dev, "Could not alloc adapater memory (DMA)\n");
700 /* Init send data structures */
701 et131x_init_send(adapter);
704 * Set up the task structure for the ISR's deferred handler
706 INIT_WORK(&adapter->task, et131x_isr_handler);
708 /* Copy address into the net_device struct */
709 memcpy(netdev->dev_addr, adapter->CurrentAddress, ETH_ALEN);
711 /* Setup et1310 as per the documentation */
712 et131x_adapter_setup(adapter);
714 /* Create a timer to count errors received by the NIC */
715 init_timer(&adapter->ErrorTimer);
717 adapter->ErrorTimer.expires = jiffies + TX_ERROR_PERIOD * HZ / 1000;
718 adapter->ErrorTimer.function = et131x_error_timer_handler;
719 adapter->ErrorTimer.data = (unsigned long)adapter;
721 /* Initialize link state */
722 et131x_link_detection_handler((unsigned long)adapter);
724 /* Intialize variable for counting how long we do not have
726 adapter->PoMgmt.TransPhyComaModeOnBoot = 0;
728 /* We can enable interrupts now
730 * NOTE - Because registration of interrupt handler is done in the
731 * device's open(), defer enabling device interrupts to that
735 /* Register the net_device struct with the Linux network layer */
736 result = register_netdev(netdev);
738 dev_err(&pdev->dev, "register_netdev() failed\n");
742 /* Register the net_device struct with the PCI subsystem. Save a copy
743 * of the PCI config space for this device now that the device has
744 * been initialized, just in case it needs to be quickly restored.
746 pci_set_drvdata(pdev, netdev);
747 pci_save_state(adapter->pdev);
751 et131x_adapter_memory_free(adapter);
753 iounmap(adapter->regs);
758 pci_release_regions(pdev);
760 pci_disable_device(pdev);
766 * @pdev: a pointer to the device's pci_dev structure
768 * Registered in the pci_driver structure, this function is called when the
769 * PCI subsystem detects that a PCI device which matches the information
770 * contained in the pci_device_id table has been removed.
773 static void __devexit et131x_pci_remove(struct pci_dev *pdev)
775 struct net_device *netdev;
776 struct et131x_adapter *adapter;
778 /* Retrieve the net_device pointer from the pci_dev struct, as well
779 * as the private adapter struct
781 netdev = (struct net_device *) pci_get_drvdata(pdev);
782 adapter = netdev_priv(netdev);
784 /* Perform device cleanup */
785 unregister_netdev(netdev);
786 et131x_adapter_memory_free(adapter);
787 iounmap(adapter->regs);
788 pci_dev_put(adapter->pdev);
790 pci_release_regions(pdev);
791 pci_disable_device(pdev);
794 static struct pci_device_id et131x_pci_table[] __devinitdata = {
795 {ET131X_PCI_VENDOR_ID, ET131X_PCI_DEVICE_ID_GIG, PCI_ANY_ID,
796 PCI_ANY_ID, 0, 0, 0UL},
797 {ET131X_PCI_VENDOR_ID, ET131X_PCI_DEVICE_ID_FAST, PCI_ANY_ID,
798 PCI_ANY_ID, 0, 0, 0UL},
802 MODULE_DEVICE_TABLE(pci, et131x_pci_table);
804 static struct pci_driver et131x_driver = {
806 .id_table = et131x_pci_table,
807 .probe = et131x_pci_setup,
808 .remove = __devexit_p(et131x_pci_remove),
809 .suspend = NULL, /* et131x_pci_suspend */
810 .resume = NULL, /* et131x_pci_resume */
815 * et131x_init_module - The "main" entry point called on driver initialization
817 * Returns 0 on success, errno on failure (as defined in errno.h)
819 static int __init et131x_init_module(void)
821 if (et131x_speed_set < PARM_SPEED_DUPLEX_MIN ||
822 et131x_speed_set > PARM_SPEED_DUPLEX_MAX) {
823 printk(KERN_WARNING "et131x: invalid speed setting ignored.\n");
824 et131x_speed_set = 0;
826 return pci_register_driver(&et131x_driver);
830 * et131x_cleanup_module - The entry point called on driver cleanup
832 static void __exit et131x_cleanup_module(void)
834 pci_unregister_driver(&et131x_driver);
837 module_init(et131x_init_module);
838 module_exit(et131x_cleanup_module);
840 /* Modinfo parameters (filled out using defines from et131x_version.h) */
841 MODULE_AUTHOR(DRIVER_AUTHOR);
842 MODULE_DESCRIPTION(DRIVER_INFO);
843 MODULE_LICENSE(DRIVER_LICENSE);