2 comedi/drivers/ni_labpc.c
3 Driver for National Instruments Lab-PC series boards and compatibles
4 Copyright (C) 2001, 2002, 2003 Frank Mori Hess <fmhess@users.sourceforge.net>
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 ************************************************************************
24 Description: National Instruments Lab-PC (& compatibles)
25 Author: Frank Mori Hess <fmhess@users.sourceforge.net>
26 Devices: [National Instruments] Lab-PC-1200 (labpc-1200),
27 Lab-PC-1200AI (labpc-1200ai), Lab-PC+ (lab-pc+), PCI-1200 (ni_labpc)
30 Tested with lab-pc-1200. For the older Lab-PC+, not all input ranges
31 and analog references will work, the available ranges/arefs will
32 depend on how you have configured the jumpers on your board
33 (see your owner's manual).
35 Kernel-level ISA plug-and-play support for the lab-pc-1200
37 yet been added to the driver, mainly due to the fact that
38 I don't know the device id numbers. If you have one
40 please file a bug report at http://comedi.org/
41 so I can get the necessary information from you.
43 The 1200 series boards have onboard calibration dacs for correcting
44 analog input/output offsets and gains. The proper settings for these
45 caldacs are stored on the board's eeprom. To read the caldac values
46 from the eeprom and store them into a file that can be then be used by
47 comedilib, use the comedi_calibrate program.
49 Configuration options - ISA boards:
50 [0] - I/O port base address
51 [1] - IRQ (optional, required for timed or externally triggered conversions)
52 [2] - DMA channel (optional)
54 Configuration options - PCI boards:
58 The Lab-pc+ has quirky chanlist requirements
59 when scanning multiple channels. Multiple channel scan
60 sequence must start at highest channel, then decrement down to
61 channel 0. The rest of the cards can scan down like lab-pc+ or scan
62 up from channel zero. Chanlists consisting of all one channel
63 are also legal, and allow you to pace conversions in bursts.
70 341309a (labpc-1200 register manual)
77 /* #define LABPC_DEBUG enable debugging messages */
79 #include <linux/interrupt.h>
80 #include <linux/slab.h>
82 #include "../comedidev.h"
84 #include <linux/delay.h>
90 #include "comedi_fc.h"
93 #define DRV_NAME "ni_labpc"
95 /* size of io region used by board */
97 /* 2 MHz master clock */
98 #define LABPC_TIMER_BASE 500
100 /* Registers for the lab-pc+ */
102 /* write-only registers */
103 #define COMMAND1_REG 0x0
104 #define ADC_GAIN_MASK (0x7 << 4)
105 #define ADC_CHAN_BITS(x) ((x) & 0x7)
106 /* enables multi channel scans */
107 #define ADC_SCAN_EN_BIT 0x80
108 #define COMMAND2_REG 0x1
109 /* enable pretriggering (used in conjunction with SWTRIG) */
110 #define PRETRIG_BIT 0x1
111 /* enable paced conversions on external trigger */
112 #define HWTRIG_BIT 0x2
113 /* enable paced conversions */
114 #define SWTRIG_BIT 0x4
115 /* use two cascaded counters for pacing */
116 #define CASCADE_BIT 0x8
117 #define DAC_PACED_BIT(channel) (0x40 << ((channel) & 0x1))
118 #define COMMAND3_REG 0x2
119 /* enable dma transfers */
120 #define DMA_EN_BIT 0x1
121 /* enable interrupts for 8255 */
122 #define DIO_INTR_EN_BIT 0x2
123 /* enable dma terminal count interrupt */
124 #define DMATC_INTR_EN_BIT 0x4
125 /* enable timer interrupt */
126 #define TIMER_INTR_EN_BIT 0x8
127 /* enable error interrupt */
128 #define ERR_INTR_EN_BIT 0x10
129 /* enable fifo not empty interrupt */
130 #define ADC_FNE_INTR_EN_BIT 0x20
131 #define ADC_CONVERT_REG 0x3
132 #define DAC_LSB_REG(channel) (0x4 + 2 * ((channel) & 0x1))
133 #define DAC_MSB_REG(channel) (0x5 + 2 * ((channel) & 0x1))
134 #define ADC_CLEAR_REG 0x8
135 #define DMATC_CLEAR_REG 0xa
136 #define TIMER_CLEAR_REG 0xc
137 /* 1200 boards only */
138 #define COMMAND6_REG 0xe
139 /* select ground or common-mode reference */
140 #define ADC_COMMON_BIT 0x1
142 #define ADC_UNIP_BIT 0x2
144 #define DAC_UNIP_BIT(channel) (0x4 << ((channel) & 0x1))
145 /* enable fifo half full interrupt */
146 #define ADC_FHF_INTR_EN_BIT 0x20
147 /* enable interrupt on end of hardware count */
148 #define A1_INTR_EN_BIT 0x40
149 /* scan up from channel zero instead of down to zero */
150 #define ADC_SCAN_UP_BIT 0x80
151 #define COMMAND4_REG 0xf
152 /* enables 'interval' scanning */
153 #define INTERVAL_SCAN_EN_BIT 0x1
154 /* enables external signal on counter b1 output to trigger scan */
155 #define EXT_SCAN_EN_BIT 0x2
156 /* chooses direction (output or input) for EXTCONV* line */
157 #define EXT_CONVERT_OUT_BIT 0x4
158 /* chooses differential inputs for adc (in conjunction with board jumper) */
159 #define ADC_DIFF_BIT 0x8
160 #define EXT_CONVERT_DISABLE_BIT 0x10
161 /* 1200 boards only, calibration stuff */
162 #define COMMAND5_REG 0x1c
163 /* enable eeprom for write */
164 #define EEPROM_WRITE_UNPROTECT_BIT 0x4
165 /* enable dithering */
166 #define DITHER_EN_BIT 0x8
167 /* load calibration dac */
168 #define CALDAC_LOAD_BIT 0x10
169 /* serial clock - rising edge writes, falling edge reads */
170 #define SCLOCK_BIT 0x20
171 /* serial data bit for writing to eeprom or calibration dacs */
172 #define SDATA_BIT 0x40
173 /* enable eeprom for read/write */
174 #define EEPROM_EN_BIT 0x80
175 #define INTERVAL_COUNT_REG 0x1e
176 #define INTERVAL_LOAD_REG 0x1f
177 #define INTERVAL_LOAD_BITS 0x1
179 /* read-only registers */
180 #define STATUS1_REG 0x0
181 /* data is available in fifo */
182 #define DATA_AVAIL_BIT 0x1
183 /* overrun has occurred */
184 #define OVERRUN_BIT 0x2
186 #define OVERFLOW_BIT 0x4
187 /* timer interrupt has occurred */
188 #define TIMER_BIT 0x8
189 /* dma terminal count has occurred */
190 #define DMATC_BIT 0x10
191 /* external trigger has occurred */
192 #define EXT_TRIG_BIT 0x40
193 /* 1200 boards only */
194 #define STATUS2_REG 0x1d
195 /* programmable eeprom serial output */
196 #define EEPROM_OUT_BIT 0x1
197 /* counter A1 terminal count */
198 #define A1_TC_BIT 0x2
199 /* fifo not half full */
201 #define ADC_FIFO_REG 0xa
203 #define DIO_BASE_REG 0x10
204 #define COUNTER_A_BASE_REG 0x14
205 #define COUNTER_A_CONTROL_REG (COUNTER_A_BASE_REG + 0x3)
206 /* check modes put conversion pacer output in harmless state (a0 mode 2) */
207 #define INIT_A0_BITS 0x14
208 /* put hardware conversion counter output in harmless state (a1 mode 0) */
209 #define INIT_A1_BITS 0x70
210 #define COUNTER_B_BASE_REG 0x18
212 static int labpc_attach(struct comedi_device *dev, struct comedi_devconfig *it);
213 static int labpc_cancel(struct comedi_device *dev, struct comedi_subdevice *s);
214 static irqreturn_t labpc_interrupt(int irq, void *d);
215 static int labpc_drain_fifo(struct comedi_device *dev);
216 #ifdef CONFIG_ISA_DMA_API
217 static void labpc_drain_dma(struct comedi_device *dev);
218 static void handle_isa_dma(struct comedi_device *dev);
220 static void labpc_drain_dregs(struct comedi_device *dev);
221 static int labpc_ai_cmdtest(struct comedi_device *dev,
222 struct comedi_subdevice *s, struct comedi_cmd *cmd);
223 static int labpc_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s);
224 static int labpc_ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
225 struct comedi_insn *insn, unsigned int *data);
226 static int labpc_ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s,
227 struct comedi_insn *insn, unsigned int *data);
228 static int labpc_ao_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
229 struct comedi_insn *insn, unsigned int *data);
230 static int labpc_calib_read_insn(struct comedi_device *dev,
231 struct comedi_subdevice *s,
232 struct comedi_insn *insn, unsigned int *data);
233 static int labpc_calib_write_insn(struct comedi_device *dev,
234 struct comedi_subdevice *s,
235 struct comedi_insn *insn, unsigned int *data);
236 static int labpc_eeprom_read_insn(struct comedi_device *dev,
237 struct comedi_subdevice *s,
238 struct comedi_insn *insn, unsigned int *data);
239 static int labpc_eeprom_write_insn(struct comedi_device *dev,
240 struct comedi_subdevice *s,
241 struct comedi_insn *insn,
243 static void labpc_adc_timing(struct comedi_device *dev, struct comedi_cmd *cmd);
244 #ifdef CONFIG_ISA_DMA_API
245 static unsigned int labpc_suggest_transfer_size(struct comedi_cmd cmd);
247 #ifdef CONFIG_COMEDI_PCI
248 static int labpc_find_device(struct comedi_device *dev, int bus, int slot);
250 static int labpc_dio_mem_callback(int dir, int port, int data,
252 static void labpc_serial_out(struct comedi_device *dev, unsigned int value,
253 unsigned int num_bits);
254 static unsigned int labpc_serial_in(struct comedi_device *dev);
255 static unsigned int labpc_eeprom_read(struct comedi_device *dev,
256 unsigned int address);
257 static unsigned int labpc_eeprom_read_status(struct comedi_device *dev);
258 static int labpc_eeprom_write(struct comedi_device *dev,
259 unsigned int address,
261 static void write_caldac(struct comedi_device *dev, unsigned int channel,
266 MODE_SINGLE_CHAN_INTERVAL,
271 /* analog input ranges */
272 #define NUM_LABPC_PLUS_AI_RANGES 16
273 /* indicates unipolar ranges */
274 static const int labpc_plus_is_unipolar[NUM_LABPC_PLUS_AI_RANGES] = {
293 /* map range index to gain bits */
294 static const int labpc_plus_ai_gain_bits[NUM_LABPC_PLUS_AI_RANGES] = {
313 static const struct comedi_lrange range_labpc_plus_ai = {
314 NUM_LABPC_PLUS_AI_RANGES,
335 #define NUM_LABPC_1200_AI_RANGES 14
336 /* indicates unipolar ranges */
337 const int labpc_1200_is_unipolar[NUM_LABPC_1200_AI_RANGES] = {
353 EXPORT_SYMBOL_GPL(labpc_1200_is_unipolar);
355 /* map range index to gain bits */
356 const int labpc_1200_ai_gain_bits[NUM_LABPC_1200_AI_RANGES] = {
372 EXPORT_SYMBOL_GPL(labpc_1200_ai_gain_bits);
374 const struct comedi_lrange range_labpc_1200_ai = {
375 NUM_LABPC_1200_AI_RANGES,
393 EXPORT_SYMBOL_GPL(range_labpc_1200_ai);
395 /* analog output ranges */
396 #define AO_RANGE_IS_UNIPOLAR 0x1
397 static const struct comedi_lrange range_labpc_ao = {
405 /* functions that do inb/outb and readb/writeb so we can use
406 * function pointers to decide which to use */
407 static inline unsigned int labpc_inb(unsigned long address)
412 static inline void labpc_outb(unsigned int byte, unsigned long address)
417 static inline unsigned int labpc_readb(unsigned long address)
419 return readb((void *)address);
422 static inline void labpc_writeb(unsigned int byte, unsigned long address)
424 writeb(byte, (void *)address);
427 static const struct labpc_board_struct labpc_boards[] = {
429 .name = "lab-pc-1200",
431 .bustype = isa_bustype,
432 .register_layout = labpc_1200_layout,
434 .ai_range_table = &range_labpc_1200_ai,
435 .ai_range_code = labpc_1200_ai_gain_bits,
436 .ai_range_is_unipolar = labpc_1200_is_unipolar,
438 .memory_mapped_io = 0,
441 .name = "lab-pc-1200ai",
443 .bustype = isa_bustype,
444 .register_layout = labpc_1200_layout,
446 .ai_range_table = &range_labpc_1200_ai,
447 .ai_range_code = labpc_1200_ai_gain_bits,
448 .ai_range_is_unipolar = labpc_1200_is_unipolar,
450 .memory_mapped_io = 0,
455 .bustype = isa_bustype,
456 .register_layout = labpc_plus_layout,
458 .ai_range_table = &range_labpc_plus_ai,
459 .ai_range_code = labpc_plus_ai_gain_bits,
460 .ai_range_is_unipolar = labpc_plus_is_unipolar,
462 .memory_mapped_io = 0,
464 #ifdef CONFIG_COMEDI_PCI
469 .bustype = pci_bustype,
470 .register_layout = labpc_1200_layout,
472 .ai_range_table = &range_labpc_1200_ai,
473 .ai_range_code = labpc_1200_ai_gain_bits,
474 .ai_range_is_unipolar = labpc_1200_is_unipolar,
476 .memory_mapped_io = 1,
478 /* dummy entry so pci board works when comedi_config is passed driver name */
481 .bustype = pci_bustype,
487 * Useful for shorthand access to the particular board structure
489 #define thisboard ((struct labpc_board_struct *)dev->board_ptr)
491 /* size in bytes of dma buffer */
492 static const int dma_buffer_size = 0xff00;
493 /* 2 bytes per sample */
494 static const int sample_size = 2;
496 #define devpriv ((struct labpc_private *)dev->private)
498 static struct comedi_driver driver_labpc = {
499 .driver_name = DRV_NAME,
500 .module = THIS_MODULE,
501 .attach = labpc_attach,
502 .detach = labpc_common_detach,
503 .num_names = ARRAY_SIZE(labpc_boards),
504 .board_name = &labpc_boards[0].name,
505 .offset = sizeof(struct labpc_board_struct),
508 #ifdef CONFIG_COMEDI_PCI
509 static DEFINE_PCI_DEVICE_TABLE(labpc_pci_table) = {
510 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x161)},
514 MODULE_DEVICE_TABLE(pci, labpc_pci_table);
515 #endif /* CONFIG_COMEDI_PCI */
517 static inline int labpc_counter_load(struct comedi_device *dev,
518 unsigned long base_address,
519 unsigned int counter_number,
520 unsigned int count, unsigned int mode)
522 if (thisboard->memory_mapped_io)
523 return i8254_mm_load((void *)base_address, 0, counter_number,
526 return i8254_load(base_address, 0, counter_number, count, mode);
529 int labpc_common_attach(struct comedi_device *dev, unsigned long iobase,
530 unsigned int irq, unsigned int dma_chan)
532 struct comedi_subdevice *s;
534 unsigned long isr_flags;
535 #ifdef CONFIG_ISA_DMA_API
536 unsigned long dma_flags;
540 printk(KERN_ERR "comedi%d: ni_labpc: %s, io 0x%lx", dev->minor,
544 printk(", irq %u", irq);
546 printk(", dma %u", dma_chan);
550 printk(KERN_ERR "io base address is zero!\n");
553 /* request io regions for isa boards */
554 if (thisboard->bustype == isa_bustype) {
555 /* check if io addresses are available */
556 if (!request_region(iobase, LABPC_SIZE,
557 driver_labpc.driver_name)) {
558 printk(KERN_ERR "I/O port conflict\n");
562 dev->iobase = iobase;
564 if (thisboard->memory_mapped_io) {
565 devpriv->read_byte = labpc_readb;
566 devpriv->write_byte = labpc_writeb;
568 devpriv->read_byte = labpc_inb;
569 devpriv->write_byte = labpc_outb;
571 /* initialize board's command registers */
572 devpriv->write_byte(devpriv->command1_bits, dev->iobase + COMMAND1_REG);
573 devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
574 devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
575 devpriv->write_byte(devpriv->command4_bits, dev->iobase + COMMAND4_REG);
576 if (thisboard->register_layout == labpc_1200_layout) {
577 devpriv->write_byte(devpriv->command5_bits,
578 dev->iobase + COMMAND5_REG);
579 devpriv->write_byte(devpriv->command6_bits,
580 dev->iobase + COMMAND6_REG);
586 if (thisboard->bustype == pci_bustype
587 || thisboard->bustype == pcmcia_bustype)
588 isr_flags |= IRQF_SHARED;
589 if (request_irq(irq, labpc_interrupt, isr_flags,
590 driver_labpc.driver_name, dev)) {
591 printk(KERN_ERR "unable to allocate irq %u\n", irq);
597 #ifdef CONFIG_ISA_DMA_API
598 /* grab dma channel */
600 printk(KERN_ERR " invalid dma channel %u\n", dma_chan);
602 } else if (dma_chan) {
603 /* allocate dma buffer */
604 devpriv->dma_buffer =
605 kmalloc(dma_buffer_size, GFP_KERNEL | GFP_DMA);
606 if (devpriv->dma_buffer == NULL) {
607 printk(KERN_ERR " failed to allocate dma buffer\n");
610 if (request_dma(dma_chan, driver_labpc.driver_name)) {
611 printk(KERN_ERR " failed to allocate dma channel %u\n",
615 devpriv->dma_chan = dma_chan;
616 dma_flags = claim_dma_lock();
617 disable_dma(devpriv->dma_chan);
618 set_dma_mode(devpriv->dma_chan, DMA_MODE_READ);
619 release_dma_lock(dma_flags);
623 dev->board_name = thisboard->name;
625 if (alloc_subdevices(dev, 5) < 0)
628 /* analog input subdevice */
629 s = dev->subdevices + 0;
630 dev->read_subdev = s;
631 s->type = COMEDI_SUBD_AI;
633 SDF_READABLE | SDF_GROUND | SDF_COMMON | SDF_DIFF | SDF_CMD_READ;
636 s->maxdata = (1 << 12) - 1; /* 12 bit resolution */
637 s->range_table = thisboard->ai_range_table;
638 s->do_cmd = labpc_ai_cmd;
639 s->do_cmdtest = labpc_ai_cmdtest;
640 s->insn_read = labpc_ai_rinsn;
641 s->cancel = labpc_cancel;
644 s = dev->subdevices + 1;
645 if (thisboard->has_ao) {
647 * Could provide command support, except it only has a
648 * one sample hardware buffer for analog output and no
651 s->type = COMEDI_SUBD_AO;
652 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_GROUND;
653 s->n_chan = NUM_AO_CHAN;
654 s->maxdata = (1 << 12) - 1; /* 12 bit resolution */
655 s->range_table = &range_labpc_ao;
656 s->insn_read = labpc_ao_rinsn;
657 s->insn_write = labpc_ao_winsn;
658 /* initialize analog outputs to a known value */
659 for (i = 0; i < s->n_chan; i++) {
660 devpriv->ao_value[i] = s->maxdata / 2;
661 lsb = devpriv->ao_value[i] & 0xff;
662 msb = (devpriv->ao_value[i] >> 8) & 0xff;
663 devpriv->write_byte(lsb, dev->iobase + DAC_LSB_REG(i));
664 devpriv->write_byte(msb, dev->iobase + DAC_MSB_REG(i));
667 s->type = COMEDI_SUBD_UNUSED;
671 s = dev->subdevices + 2;
672 /* if board uses io memory we have to give a custom callback
673 * function to the 8255 driver */
674 if (thisboard->memory_mapped_io)
675 subdev_8255_init(dev, s, labpc_dio_mem_callback,
676 (unsigned long)(dev->iobase + DIO_BASE_REG));
678 subdev_8255_init(dev, s, NULL, dev->iobase + DIO_BASE_REG);
680 /* calibration subdevices for boards that have one */
681 s = dev->subdevices + 3;
682 if (thisboard->register_layout == labpc_1200_layout) {
683 s->type = COMEDI_SUBD_CALIB;
684 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
687 s->insn_read = labpc_calib_read_insn;
688 s->insn_write = labpc_calib_write_insn;
690 for (i = 0; i < s->n_chan; i++)
691 write_caldac(dev, i, s->maxdata / 2);
693 s->type = COMEDI_SUBD_UNUSED;
696 s = dev->subdevices + 4;
697 if (thisboard->register_layout == labpc_1200_layout) {
698 s->type = COMEDI_SUBD_MEMORY;
699 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
700 s->n_chan = EEPROM_SIZE;
702 s->insn_read = labpc_eeprom_read_insn;
703 s->insn_write = labpc_eeprom_write_insn;
705 for (i = 0; i < EEPROM_SIZE; i++)
706 devpriv->eeprom_data[i] = labpc_eeprom_read(dev, i);
708 printk(KERN_ERR " eeprom:");
709 for (i = 0; i < EEPROM_SIZE; i++)
710 printk(" %i:0x%x ", i, devpriv->eeprom_data[i]);
714 s->type = COMEDI_SUBD_UNUSED;
718 EXPORT_SYMBOL_GPL(labpc_common_attach);
720 static int labpc_attach(struct comedi_device *dev, struct comedi_devconfig *it)
722 unsigned long iobase = 0;
723 unsigned int irq = 0;
724 unsigned int dma_chan = 0;
725 #ifdef CONFIG_COMEDI_PCI
729 /* allocate and initialize dev->private */
730 if (alloc_private(dev, sizeof(struct labpc_private)) < 0)
733 /* get base address, irq etc. based on bustype */
734 switch (thisboard->bustype) {
736 #ifdef CONFIG_ISA_DMA_API
737 iobase = it->options[0];
738 irq = it->options[1];
739 dma_chan = it->options[2];
741 printk(KERN_ERR " this driver has not been built with ISA DMA "
747 #ifdef CONFIG_COMEDI_PCI
748 retval = labpc_find_device(dev, it->options[0], it->options[1]);
751 retval = mite_setup(devpriv->mite);
754 iobase = (unsigned long)devpriv->mite->daq_io_addr;
755 irq = mite_irq(devpriv->mite);
757 printk(KERN_ERR " this driver has not been built with PCI "
764 (" this driver does not support pcmcia cards, use ni_labpc_cs.o\n");
768 printk(KERN_ERR "bug! couldn't determine board type\n");
773 return labpc_common_attach(dev, iobase, irq, dma_chan);
776 /* adapted from ni_pcimio for finding mite based boards (pc-1200) */
777 #ifdef CONFIG_COMEDI_PCI
778 static int labpc_find_device(struct comedi_device *dev, int bus, int slot)
780 struct mite_struct *mite;
782 for (mite = mite_devices; mite; mite = mite->next) {
785 /* if bus/slot are specified then make sure we have the right bus/slot */
787 if (bus != mite->pcidev->bus->number
788 || slot != PCI_SLOT(mite->pcidev->devfn))
791 for (i = 0; i < driver_labpc.num_names; i++) {
792 if (labpc_boards[i].bustype != pci_bustype)
794 if (mite_device_id(mite) == labpc_boards[i].device_id) {
795 devpriv->mite = mite;
796 /* fixup board pointer, in case we were using the dummy "ni_labpc" entry */
797 dev->board_ptr = &labpc_boards[i];
802 printk(KERN_ERR "no device found\n");
808 int labpc_common_detach(struct comedi_device *dev)
810 printk(KERN_ERR "comedi%d: ni_labpc: detach\n", dev->minor);
813 subdev_8255_cleanup(dev, dev->subdevices + 2);
815 #ifdef CONFIG_ISA_DMA_API
816 /* only free stuff if it has been allocated by _attach */
817 kfree(devpriv->dma_buffer);
818 if (devpriv->dma_chan)
819 free_dma(devpriv->dma_chan);
822 free_irq(dev->irq, dev);
823 if (thisboard->bustype == isa_bustype && dev->iobase)
824 release_region(dev->iobase, LABPC_SIZE);
825 #ifdef CONFIG_COMEDI_PCI
827 mite_unsetup(devpriv->mite);
832 EXPORT_SYMBOL_GPL(labpc_common_detach);
834 static void labpc_clear_adc_fifo(const struct comedi_device *dev)
836 devpriv->write_byte(0x1, dev->iobase + ADC_CLEAR_REG);
837 devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
838 devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
841 static int labpc_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
845 spin_lock_irqsave(&dev->spinlock, flags);
846 devpriv->command2_bits &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT;
847 devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
848 spin_unlock_irqrestore(&dev->spinlock, flags);
850 devpriv->command3_bits = 0;
851 devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
856 static enum scan_mode labpc_ai_scan_mode(const struct comedi_cmd *cmd)
858 if (cmd->chanlist_len == 1)
859 return MODE_SINGLE_CHAN;
861 /* chanlist may be NULL during cmdtest. */
862 if (cmd->chanlist == NULL)
863 return MODE_MULT_CHAN_UP;
865 if (CR_CHAN(cmd->chanlist[0]) == CR_CHAN(cmd->chanlist[1]))
866 return MODE_SINGLE_CHAN_INTERVAL;
868 if (CR_CHAN(cmd->chanlist[0]) < CR_CHAN(cmd->chanlist[1]))
869 return MODE_MULT_CHAN_UP;
871 if (CR_CHAN(cmd->chanlist[0]) > CR_CHAN(cmd->chanlist[1]))
872 return MODE_MULT_CHAN_DOWN;
874 printk(KERN_ERR "ni_labpc: bug! this should never happen\n");
879 static int labpc_ai_chanlist_invalid(const struct comedi_device *dev,
880 const struct comedi_cmd *cmd)
882 int mode, channel, range, aref, i;
884 if (cmd->chanlist == NULL)
887 mode = labpc_ai_scan_mode(cmd);
889 if (mode == MODE_SINGLE_CHAN)
892 if (mode == MODE_SINGLE_CHAN_INTERVAL) {
893 if (cmd->chanlist_len > 0xff) {
895 "ni_labpc: chanlist too long for single channel interval mode\n");
900 channel = CR_CHAN(cmd->chanlist[0]);
901 range = CR_RANGE(cmd->chanlist[0]);
902 aref = CR_AREF(cmd->chanlist[0]);
904 for (i = 0; i < cmd->chanlist_len; i++) {
907 case MODE_SINGLE_CHAN_INTERVAL:
908 if (CR_CHAN(cmd->chanlist[i]) != channel) {
910 "channel scanning order specified in chanlist is not supported by hardware.\n");
914 case MODE_MULT_CHAN_UP:
915 if (CR_CHAN(cmd->chanlist[i]) != i) {
917 "channel scanning order specified in chanlist is not supported by hardware.\n");
921 case MODE_MULT_CHAN_DOWN:
922 if (CR_CHAN(cmd->chanlist[i]) !=
923 cmd->chanlist_len - i - 1) {
925 "channel scanning order specified in chanlist is not supported by hardware.\n");
930 printk(KERN_ERR "ni_labpc: bug! in chanlist check\n");
935 if (CR_RANGE(cmd->chanlist[i]) != range) {
937 "entries in chanlist must all have the same range\n");
941 if (CR_AREF(cmd->chanlist[i]) != aref) {
943 "entries in chanlist must all have the same reference\n");
951 static int labpc_use_continuous_mode(const struct comedi_cmd *cmd)
953 if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN)
956 if (cmd->scan_begin_src == TRIG_FOLLOW)
962 static unsigned int labpc_ai_convert_period(const struct comedi_cmd *cmd)
964 if (cmd->convert_src != TRIG_TIMER)
967 if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN &&
968 cmd->scan_begin_src == TRIG_TIMER)
969 return cmd->scan_begin_arg;
971 return cmd->convert_arg;
974 static void labpc_set_ai_convert_period(struct comedi_cmd *cmd, unsigned int ns)
976 if (cmd->convert_src != TRIG_TIMER)
979 if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN &&
980 cmd->scan_begin_src == TRIG_TIMER) {
981 cmd->scan_begin_arg = ns;
982 if (cmd->convert_arg > cmd->scan_begin_arg)
983 cmd->convert_arg = cmd->scan_begin_arg;
985 cmd->convert_arg = ns;
988 static unsigned int labpc_ai_scan_period(const struct comedi_cmd *cmd)
990 if (cmd->scan_begin_src != TRIG_TIMER)
993 if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN &&
994 cmd->convert_src == TRIG_TIMER)
997 return cmd->scan_begin_arg;
1000 static void labpc_set_ai_scan_period(struct comedi_cmd *cmd, unsigned int ns)
1002 if (cmd->scan_begin_src != TRIG_TIMER)
1005 if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN &&
1006 cmd->convert_src == TRIG_TIMER)
1009 cmd->scan_begin_arg = ns;
1012 static int labpc_ai_cmdtest(struct comedi_device *dev,
1013 struct comedi_subdevice *s, struct comedi_cmd *cmd)
1019 /* step 1: make sure trigger sources are trivially valid */
1021 tmp = cmd->start_src;
1022 cmd->start_src &= TRIG_NOW | TRIG_EXT;
1023 if (!cmd->start_src || tmp != cmd->start_src)
1026 tmp = cmd->scan_begin_src;
1027 cmd->scan_begin_src &= TRIG_TIMER | TRIG_FOLLOW | TRIG_EXT;
1028 if (!cmd->scan_begin_src || tmp != cmd->scan_begin_src)
1031 tmp = cmd->convert_src;
1032 cmd->convert_src &= TRIG_TIMER | TRIG_EXT;
1033 if (!cmd->convert_src || tmp != cmd->convert_src)
1036 tmp = cmd->scan_end_src;
1037 cmd->scan_end_src &= TRIG_COUNT;
1038 if (!cmd->scan_end_src || tmp != cmd->scan_end_src)
1041 tmp = cmd->stop_src;
1042 stop_mask = TRIG_COUNT | TRIG_NONE;
1043 if (thisboard->register_layout == labpc_1200_layout)
1044 stop_mask |= TRIG_EXT;
1045 cmd->stop_src &= stop_mask;
1046 if (!cmd->stop_src || tmp != cmd->stop_src)
1052 /* step 2: make sure trigger sources are unique and mutually compatible */
1054 if (cmd->start_src != TRIG_NOW && cmd->start_src != TRIG_EXT)
1056 if (cmd->scan_begin_src != TRIG_TIMER &&
1057 cmd->scan_begin_src != TRIG_FOLLOW &&
1058 cmd->scan_begin_src != TRIG_EXT)
1060 if (cmd->convert_src != TRIG_TIMER && cmd->convert_src != TRIG_EXT)
1062 if (cmd->stop_src != TRIG_COUNT &&
1063 cmd->stop_src != TRIG_EXT && cmd->stop_src != TRIG_NONE)
1066 /* can't have external stop and start triggers at once */
1067 if (cmd->start_src == TRIG_EXT && cmd->stop_src == TRIG_EXT)
1073 /* step 3: make sure arguments are trivially compatible */
1075 if (cmd->start_arg == TRIG_NOW && cmd->start_arg != 0) {
1080 if (!cmd->chanlist_len)
1083 if (cmd->scan_end_arg != cmd->chanlist_len) {
1084 cmd->scan_end_arg = cmd->chanlist_len;
1088 if (cmd->convert_src == TRIG_TIMER) {
1089 if (cmd->convert_arg < thisboard->ai_speed) {
1090 cmd->convert_arg = thisboard->ai_speed;
1094 /* make sure scan timing is not too fast */
1095 if (cmd->scan_begin_src == TRIG_TIMER) {
1096 if (cmd->convert_src == TRIG_TIMER &&
1097 cmd->scan_begin_arg <
1098 cmd->convert_arg * cmd->chanlist_len) {
1099 cmd->scan_begin_arg =
1100 cmd->convert_arg * cmd->chanlist_len;
1103 if (cmd->scan_begin_arg <
1104 thisboard->ai_speed * cmd->chanlist_len) {
1105 cmd->scan_begin_arg =
1106 thisboard->ai_speed * cmd->chanlist_len;
1111 switch (cmd->stop_src) {
1113 if (!cmd->stop_arg) {
1119 if (cmd->stop_arg != 0) {
1125 * TRIG_EXT doesn't care since it doesn't
1126 * trigger off a numbered channel
1135 /* step 4: fix up any arguments */
1137 tmp = cmd->convert_arg;
1138 tmp2 = cmd->scan_begin_arg;
1139 labpc_adc_timing(dev, cmd);
1140 if (tmp != cmd->convert_arg || tmp2 != cmd->scan_begin_arg)
1146 if (labpc_ai_chanlist_invalid(dev, cmd))
1152 static int labpc_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
1154 int channel, range, aref;
1155 #ifdef CONFIG_ISA_DMA_API
1156 unsigned long irq_flags;
1159 struct comedi_async *async = s->async;
1160 struct comedi_cmd *cmd = &async->cmd;
1161 enum transfer_type xfer;
1162 unsigned long flags;
1165 comedi_error(dev, "no irq assigned, cannot perform command");
1169 range = CR_RANGE(cmd->chanlist[0]);
1170 aref = CR_AREF(cmd->chanlist[0]);
1172 /* make sure board is disabled before setting up acquisition */
1173 spin_lock_irqsave(&dev->spinlock, flags);
1174 devpriv->command2_bits &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT;
1175 devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1176 spin_unlock_irqrestore(&dev->spinlock, flags);
1178 devpriv->command3_bits = 0;
1179 devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
1181 /* initialize software conversion count */
1182 if (cmd->stop_src == TRIG_COUNT)
1183 devpriv->count = cmd->stop_arg * cmd->chanlist_len;
1185 /* setup hardware conversion counter */
1186 if (cmd->stop_src == TRIG_EXT) {
1188 * load counter a1 with count of 3
1189 * (pc+ manual says this is minimum allowed) using mode 0
1191 ret = labpc_counter_load(dev, dev->iobase + COUNTER_A_BASE_REG,
1194 comedi_error(dev, "error loading counter a1");
1198 * otherwise, just put a1 in mode 0
1199 * with no count to set its output low
1201 devpriv->write_byte(INIT_A1_BITS,
1202 dev->iobase + COUNTER_A_CONTROL_REG);
1204 #ifdef CONFIG_ISA_DMA_API
1205 /* figure out what method we will use to transfer data */
1206 if (devpriv->dma_chan && /* need a dma channel allocated */
1208 * dma unsafe at RT priority,
1209 * and too much setup time for TRIG_WAKE_EOS for
1211 (cmd->flags & (TRIG_WAKE_EOS | TRIG_RT)) == 0 &&
1212 /* only available on the isa boards */
1213 thisboard->bustype == isa_bustype) {
1214 xfer = isa_dma_transfer;
1215 /* pc-plus has no fifo-half full interrupt */
1218 if (thisboard->register_layout == labpc_1200_layout &&
1219 /* wake-end-of-scan should interrupt on fifo not empty */
1220 (cmd->flags & TRIG_WAKE_EOS) == 0 &&
1221 /* make sure we are taking more than just a few points */
1222 (cmd->stop_src != TRIG_COUNT || devpriv->count > 256)) {
1223 xfer = fifo_half_full_transfer;
1225 xfer = fifo_not_empty_transfer;
1226 devpriv->current_transfer = xfer;
1228 /* setup command6 register for 1200 boards */
1229 if (thisboard->register_layout == labpc_1200_layout) {
1230 /* reference inputs to ground or common? */
1231 if (aref != AREF_GROUND)
1232 devpriv->command6_bits |= ADC_COMMON_BIT;
1234 devpriv->command6_bits &= ~ADC_COMMON_BIT;
1235 /* bipolar or unipolar range? */
1236 if (thisboard->ai_range_is_unipolar[range])
1237 devpriv->command6_bits |= ADC_UNIP_BIT;
1239 devpriv->command6_bits &= ~ADC_UNIP_BIT;
1240 /* interrupt on fifo half full? */
1241 if (xfer == fifo_half_full_transfer)
1242 devpriv->command6_bits |= ADC_FHF_INTR_EN_BIT;
1244 devpriv->command6_bits &= ~ADC_FHF_INTR_EN_BIT;
1245 /* enable interrupt on counter a1 terminal count? */
1246 if (cmd->stop_src == TRIG_EXT)
1247 devpriv->command6_bits |= A1_INTR_EN_BIT;
1249 devpriv->command6_bits &= ~A1_INTR_EN_BIT;
1250 /* are we scanning up or down through channels? */
1251 if (labpc_ai_scan_mode(cmd) == MODE_MULT_CHAN_UP)
1252 devpriv->command6_bits |= ADC_SCAN_UP_BIT;
1254 devpriv->command6_bits &= ~ADC_SCAN_UP_BIT;
1255 /* write to register */
1256 devpriv->write_byte(devpriv->command6_bits,
1257 dev->iobase + COMMAND6_REG);
1260 /* setup channel list, etc (command1 register) */
1261 devpriv->command1_bits = 0;
1262 if (labpc_ai_scan_mode(cmd) == MODE_MULT_CHAN_UP)
1263 channel = CR_CHAN(cmd->chanlist[cmd->chanlist_len - 1]);
1265 channel = CR_CHAN(cmd->chanlist[0]);
1266 /* munge channel bits for differential / scan disabled mode */
1267 if (labpc_ai_scan_mode(cmd) != MODE_SINGLE_CHAN && aref == AREF_DIFF)
1269 devpriv->command1_bits |= ADC_CHAN_BITS(channel);
1270 devpriv->command1_bits |= thisboard->ai_range_code[range];
1271 devpriv->write_byte(devpriv->command1_bits, dev->iobase + COMMAND1_REG);
1272 /* manual says to set scan enable bit on second pass */
1273 if (labpc_ai_scan_mode(cmd) == MODE_MULT_CHAN_UP ||
1274 labpc_ai_scan_mode(cmd) == MODE_MULT_CHAN_DOWN) {
1275 devpriv->command1_bits |= ADC_SCAN_EN_BIT;
1276 /* need a brief delay before enabling scan, or scan
1277 * list will get screwed when you switch
1278 * between scan up to scan down mode - dunno why */
1280 devpriv->write_byte(devpriv->command1_bits,
1281 dev->iobase + COMMAND1_REG);
1283 /* setup any external triggering/pacing (command4 register) */
1284 devpriv->command4_bits = 0;
1285 if (cmd->convert_src != TRIG_EXT)
1286 devpriv->command4_bits |= EXT_CONVERT_DISABLE_BIT;
1287 /* XXX should discard first scan when using interval scanning
1288 * since manual says it is not synced with scan clock */
1289 if (labpc_use_continuous_mode(cmd) == 0) {
1290 devpriv->command4_bits |= INTERVAL_SCAN_EN_BIT;
1291 if (cmd->scan_begin_src == TRIG_EXT)
1292 devpriv->command4_bits |= EXT_SCAN_EN_BIT;
1294 /* single-ended/differential */
1295 if (aref == AREF_DIFF)
1296 devpriv->command4_bits |= ADC_DIFF_BIT;
1297 devpriv->write_byte(devpriv->command4_bits, dev->iobase + COMMAND4_REG);
1299 devpriv->write_byte(cmd->chanlist_len,
1300 dev->iobase + INTERVAL_COUNT_REG);
1302 devpriv->write_byte(INTERVAL_LOAD_BITS,
1303 dev->iobase + INTERVAL_LOAD_REG);
1305 if (cmd->convert_src == TRIG_TIMER || cmd->scan_begin_src == TRIG_TIMER) {
1307 labpc_adc_timing(dev, cmd);
1308 /* load counter b0 in mode 3 */
1309 ret = labpc_counter_load(dev, dev->iobase + COUNTER_B_BASE_REG,
1310 0, devpriv->divisor_b0, 3);
1312 comedi_error(dev, "error loading counter b0");
1316 /* set up conversion pacing */
1317 if (labpc_ai_convert_period(cmd)) {
1318 /* load counter a0 in mode 2 */
1319 ret = labpc_counter_load(dev, dev->iobase + COUNTER_A_BASE_REG,
1320 0, devpriv->divisor_a0, 2);
1322 comedi_error(dev, "error loading counter a0");
1326 devpriv->write_byte(INIT_A0_BITS,
1327 dev->iobase + COUNTER_A_CONTROL_REG);
1329 /* set up scan pacing */
1330 if (labpc_ai_scan_period(cmd)) {
1331 /* load counter b1 in mode 2 */
1332 ret = labpc_counter_load(dev, dev->iobase + COUNTER_B_BASE_REG,
1333 1, devpriv->divisor_b1, 2);
1335 comedi_error(dev, "error loading counter b1");
1340 labpc_clear_adc_fifo(dev);
1342 #ifdef CONFIG_ISA_DMA_API
1343 /* set up dma transfer */
1344 if (xfer == isa_dma_transfer) {
1345 irq_flags = claim_dma_lock();
1346 disable_dma(devpriv->dma_chan);
1347 /* clear flip-flop to make sure 2-byte registers for
1348 * count and address get set correctly */
1349 clear_dma_ff(devpriv->dma_chan);
1350 set_dma_addr(devpriv->dma_chan,
1351 virt_to_bus(devpriv->dma_buffer));
1352 /* set appropriate size of transfer */
1353 devpriv->dma_transfer_size = labpc_suggest_transfer_size(*cmd);
1354 if (cmd->stop_src == TRIG_COUNT &&
1355 devpriv->count * sample_size < devpriv->dma_transfer_size) {
1356 devpriv->dma_transfer_size =
1357 devpriv->count * sample_size;
1359 set_dma_count(devpriv->dma_chan, devpriv->dma_transfer_size);
1360 enable_dma(devpriv->dma_chan);
1361 release_dma_lock(irq_flags);
1362 /* enable board's dma */
1363 devpriv->command3_bits |= DMA_EN_BIT | DMATC_INTR_EN_BIT;
1365 devpriv->command3_bits &= ~DMA_EN_BIT & ~DMATC_INTR_EN_BIT;
1368 /* enable error interrupts */
1369 devpriv->command3_bits |= ERR_INTR_EN_BIT;
1370 /* enable fifo not empty interrupt? */
1371 if (xfer == fifo_not_empty_transfer)
1372 devpriv->command3_bits |= ADC_FNE_INTR_EN_BIT;
1374 devpriv->command3_bits &= ~ADC_FNE_INTR_EN_BIT;
1375 devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
1377 /* startup acquisition */
1380 /* use 2 cascaded counters for pacing */
1381 spin_lock_irqsave(&dev->spinlock, flags);
1382 devpriv->command2_bits |= CASCADE_BIT;
1383 switch (cmd->start_src) {
1385 devpriv->command2_bits |= HWTRIG_BIT;
1386 devpriv->command2_bits &= ~PRETRIG_BIT & ~SWTRIG_BIT;
1389 devpriv->command2_bits |= SWTRIG_BIT;
1390 devpriv->command2_bits &= ~PRETRIG_BIT & ~HWTRIG_BIT;
1393 comedi_error(dev, "bug with start_src");
1397 switch (cmd->stop_src) {
1399 devpriv->command2_bits |= HWTRIG_BIT | PRETRIG_BIT;
1405 comedi_error(dev, "bug with stop_src");
1408 devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1409 spin_unlock_irqrestore(&dev->spinlock, flags);
1414 /* interrupt service routine */
1415 static irqreturn_t labpc_interrupt(int irq, void *d)
1417 struct comedi_device *dev = d;
1418 struct comedi_subdevice *s = dev->read_subdev;
1419 struct comedi_async *async;
1420 struct comedi_cmd *cmd;
1422 if (dev->attached == 0) {
1423 comedi_error(dev, "premature interrupt");
1431 /* read board status */
1432 devpriv->status1_bits = devpriv->read_byte(dev->iobase + STATUS1_REG);
1433 if (thisboard->register_layout == labpc_1200_layout)
1434 devpriv->status2_bits =
1435 devpriv->read_byte(dev->iobase + STATUS2_REG);
1437 if ((devpriv->status1_bits & (DMATC_BIT | TIMER_BIT | OVERFLOW_BIT |
1438 OVERRUN_BIT | DATA_AVAIL_BIT)) == 0
1439 && (devpriv->status2_bits & A1_TC_BIT) == 0
1440 && (devpriv->status2_bits & FNHF_BIT)) {
1444 if (devpriv->status1_bits & OVERRUN_BIT) {
1445 /* clear error interrupt */
1446 devpriv->write_byte(0x1, dev->iobase + ADC_CLEAR_REG);
1447 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1448 comedi_event(dev, s);
1449 comedi_error(dev, "overrun");
1453 #ifdef CONFIG_ISA_DMA_API
1454 if (devpriv->current_transfer == isa_dma_transfer) {
1456 * if a dma terminal count of external stop trigger
1459 if (devpriv->status1_bits & DMATC_BIT ||
1460 (thisboard->register_layout == labpc_1200_layout
1461 && devpriv->status2_bits & A1_TC_BIT)) {
1462 handle_isa_dma(dev);
1466 labpc_drain_fifo(dev);
1468 if (devpriv->status1_bits & TIMER_BIT) {
1469 comedi_error(dev, "handled timer interrupt?");
1471 devpriv->write_byte(0x1, dev->iobase + TIMER_CLEAR_REG);
1474 if (devpriv->status1_bits & OVERFLOW_BIT) {
1475 /* clear error interrupt */
1476 devpriv->write_byte(0x1, dev->iobase + ADC_CLEAR_REG);
1477 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1478 comedi_event(dev, s);
1479 comedi_error(dev, "overflow");
1482 /* handle external stop trigger */
1483 if (cmd->stop_src == TRIG_EXT) {
1484 if (devpriv->status2_bits & A1_TC_BIT) {
1485 labpc_drain_dregs(dev);
1486 labpc_cancel(dev, s);
1487 async->events |= COMEDI_CB_EOA;
1491 /* TRIG_COUNT end of acquisition */
1492 if (cmd->stop_src == TRIG_COUNT) {
1493 if (devpriv->count == 0) {
1494 labpc_cancel(dev, s);
1495 async->events |= COMEDI_CB_EOA;
1499 comedi_event(dev, s);
1503 /* read all available samples from ai fifo */
1504 static int labpc_drain_fifo(struct comedi_device *dev)
1506 unsigned int lsb, msb;
1508 struct comedi_async *async = dev->read_subdev->async;
1509 const int timeout = 10000;
1512 devpriv->status1_bits = devpriv->read_byte(dev->iobase + STATUS1_REG);
1514 for (i = 0; (devpriv->status1_bits & DATA_AVAIL_BIT) && i < timeout;
1516 /* quit if we have all the data we want */
1517 if (async->cmd.stop_src == TRIG_COUNT) {
1518 if (devpriv->count == 0)
1522 lsb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1523 msb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1524 data = (msb << 8) | lsb;
1525 cfc_write_to_buffer(dev->read_subdev, data);
1526 devpriv->status1_bits =
1527 devpriv->read_byte(dev->iobase + STATUS1_REG);
1530 comedi_error(dev, "ai timeout, fifo never empties");
1531 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1538 #ifdef CONFIG_ISA_DMA_API
1539 static void labpc_drain_dma(struct comedi_device *dev)
1541 struct comedi_subdevice *s = dev->read_subdev;
1542 struct comedi_async *async = s->async;
1544 unsigned long flags;
1545 unsigned int max_points, num_points, residue, leftover;
1548 status = devpriv->status1_bits;
1550 flags = claim_dma_lock();
1551 disable_dma(devpriv->dma_chan);
1552 /* clear flip-flop to make sure 2-byte registers for
1553 * count and address get set correctly */
1554 clear_dma_ff(devpriv->dma_chan);
1556 /* figure out how many points to read */
1557 max_points = devpriv->dma_transfer_size / sample_size;
1558 /* residue is the number of points left to be done on the dma
1559 * transfer. It should always be zero at this point unless
1560 * the stop_src is set to external triggering.
1562 residue = get_dma_residue(devpriv->dma_chan) / sample_size;
1563 num_points = max_points - residue;
1564 if (devpriv->count < num_points && async->cmd.stop_src == TRIG_COUNT)
1565 num_points = devpriv->count;
1567 /* figure out how many points will be stored next time */
1569 if (async->cmd.stop_src != TRIG_COUNT) {
1570 leftover = devpriv->dma_transfer_size / sample_size;
1571 } else if (devpriv->count > num_points) {
1572 leftover = devpriv->count - num_points;
1573 if (leftover > max_points)
1574 leftover = max_points;
1577 /* write data to comedi buffer */
1578 for (i = 0; i < num_points; i++)
1579 cfc_write_to_buffer(s, devpriv->dma_buffer[i]);
1581 if (async->cmd.stop_src == TRIG_COUNT)
1582 devpriv->count -= num_points;
1584 /* set address and count for next transfer */
1585 set_dma_addr(devpriv->dma_chan, virt_to_bus(devpriv->dma_buffer));
1586 set_dma_count(devpriv->dma_chan, leftover * sample_size);
1587 release_dma_lock(flags);
1589 async->events |= COMEDI_CB_BLOCK;
1592 static void handle_isa_dma(struct comedi_device *dev)
1594 labpc_drain_dma(dev);
1596 enable_dma(devpriv->dma_chan);
1598 /* clear dma tc interrupt */
1599 devpriv->write_byte(0x1, dev->iobase + DMATC_CLEAR_REG);
1603 /* makes sure all data acquired by board is transferred to comedi (used
1604 * when acquisition is terminated by stop_src == TRIG_EXT). */
1605 static void labpc_drain_dregs(struct comedi_device *dev)
1607 #ifdef CONFIG_ISA_DMA_API
1608 if (devpriv->current_transfer == isa_dma_transfer)
1609 labpc_drain_dma(dev);
1612 labpc_drain_fifo(dev);
1615 static int labpc_ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
1616 struct comedi_insn *insn, unsigned int *data)
1622 unsigned long flags;
1624 /* disable timed conversions */
1625 spin_lock_irqsave(&dev->spinlock, flags);
1626 devpriv->command2_bits &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT;
1627 devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1628 spin_unlock_irqrestore(&dev->spinlock, flags);
1630 /* disable interrupt generation and dma */
1631 devpriv->command3_bits = 0;
1632 devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
1634 /* set gain and channel */
1635 devpriv->command1_bits = 0;
1636 chan = CR_CHAN(insn->chanspec);
1637 range = CR_RANGE(insn->chanspec);
1638 devpriv->command1_bits |= thisboard->ai_range_code[range];
1639 /* munge channel bits for differential/scan disabled mode */
1640 if (CR_AREF(insn->chanspec) == AREF_DIFF)
1642 devpriv->command1_bits |= ADC_CHAN_BITS(chan);
1643 devpriv->write_byte(devpriv->command1_bits, dev->iobase + COMMAND1_REG);
1645 /* setup command6 register for 1200 boards */
1646 if (thisboard->register_layout == labpc_1200_layout) {
1647 /* reference inputs to ground or common? */
1648 if (CR_AREF(insn->chanspec) != AREF_GROUND)
1649 devpriv->command6_bits |= ADC_COMMON_BIT;
1651 devpriv->command6_bits &= ~ADC_COMMON_BIT;
1652 /* bipolar or unipolar range? */
1653 if (thisboard->ai_range_is_unipolar[range])
1654 devpriv->command6_bits |= ADC_UNIP_BIT;
1656 devpriv->command6_bits &= ~ADC_UNIP_BIT;
1657 /* don't interrupt on fifo half full */
1658 devpriv->command6_bits &= ~ADC_FHF_INTR_EN_BIT;
1659 /* don't enable interrupt on counter a1 terminal count? */
1660 devpriv->command6_bits &= ~A1_INTR_EN_BIT;
1661 /* write to register */
1662 devpriv->write_byte(devpriv->command6_bits,
1663 dev->iobase + COMMAND6_REG);
1665 /* setup command4 register */
1666 devpriv->command4_bits = 0;
1667 devpriv->command4_bits |= EXT_CONVERT_DISABLE_BIT;
1668 /* single-ended/differential */
1669 if (CR_AREF(insn->chanspec) == AREF_DIFF)
1670 devpriv->command4_bits |= ADC_DIFF_BIT;
1671 devpriv->write_byte(devpriv->command4_bits, dev->iobase + COMMAND4_REG);
1674 * initialize pacer counter output to make sure it doesn't
1675 * cause any problems
1677 devpriv->write_byte(INIT_A0_BITS, dev->iobase + COUNTER_A_CONTROL_REG);
1679 labpc_clear_adc_fifo(dev);
1681 for (n = 0; n < insn->n; n++) {
1682 /* trigger conversion */
1683 devpriv->write_byte(0x1, dev->iobase + ADC_CONVERT_REG);
1685 for (i = 0; i < timeout; i++) {
1686 if (devpriv->read_byte(dev->iobase +
1687 STATUS1_REG) & DATA_AVAIL_BIT)
1692 comedi_error(dev, "timeout");
1695 lsb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1696 msb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1697 data[n] = (msb << 8) | lsb;
1703 /* analog output insn */
1704 static int labpc_ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s,
1705 struct comedi_insn *insn, unsigned int *data)
1708 unsigned long flags;
1711 channel = CR_CHAN(insn->chanspec);
1713 /* turn off pacing of analog output channel */
1714 /* note: hardware bug in daqcard-1200 means pacing cannot
1715 * be independently enabled/disabled for its the two channels */
1716 spin_lock_irqsave(&dev->spinlock, flags);
1717 devpriv->command2_bits &= ~DAC_PACED_BIT(channel);
1718 devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1719 spin_unlock_irqrestore(&dev->spinlock, flags);
1722 if (thisboard->register_layout == labpc_1200_layout) {
1723 range = CR_RANGE(insn->chanspec);
1724 if (range & AO_RANGE_IS_UNIPOLAR)
1725 devpriv->command6_bits |= DAC_UNIP_BIT(channel);
1727 devpriv->command6_bits &= ~DAC_UNIP_BIT(channel);
1728 /* write to register */
1729 devpriv->write_byte(devpriv->command6_bits,
1730 dev->iobase + COMMAND6_REG);
1733 lsb = data[0] & 0xff;
1734 msb = (data[0] >> 8) & 0xff;
1735 devpriv->write_byte(lsb, dev->iobase + DAC_LSB_REG(channel));
1736 devpriv->write_byte(msb, dev->iobase + DAC_MSB_REG(channel));
1738 /* remember value for readback */
1739 devpriv->ao_value[channel] = data[0];
1744 /* analog output readback insn */
1745 static int labpc_ao_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
1746 struct comedi_insn *insn, unsigned int *data)
1748 data[0] = devpriv->ao_value[CR_CHAN(insn->chanspec)];
1753 static int labpc_calib_read_insn(struct comedi_device *dev,
1754 struct comedi_subdevice *s,
1755 struct comedi_insn *insn, unsigned int *data)
1757 data[0] = devpriv->caldac[CR_CHAN(insn->chanspec)];
1762 static int labpc_calib_write_insn(struct comedi_device *dev,
1763 struct comedi_subdevice *s,
1764 struct comedi_insn *insn, unsigned int *data)
1766 int channel = CR_CHAN(insn->chanspec);
1768 write_caldac(dev, channel, data[0]);
1772 static int labpc_eeprom_read_insn(struct comedi_device *dev,
1773 struct comedi_subdevice *s,
1774 struct comedi_insn *insn, unsigned int *data)
1776 data[0] = devpriv->eeprom_data[CR_CHAN(insn->chanspec)];
1781 static int labpc_eeprom_write_insn(struct comedi_device *dev,
1782 struct comedi_subdevice *s,
1783 struct comedi_insn *insn, unsigned int *data)
1785 int channel = CR_CHAN(insn->chanspec);
1788 /* only allow writes to user area of eeprom */
1789 if (channel < 16 || channel > 127) {
1791 ("eeprom writes are only allowed to channels 16 through 127 (the pointer and user areas)");
1795 ret = labpc_eeprom_write(dev, channel, data[0]);
1802 #ifdef CONFIG_ISA_DMA_API
1803 /* utility function that suggests a dma transfer size in bytes */
1804 static unsigned int labpc_suggest_transfer_size(struct comedi_cmd cmd)
1809 if (cmd.convert_src == TRIG_TIMER)
1810 freq = 1000000000 / cmd.convert_arg;
1811 /* return some default value */
1815 /* make buffer fill in no more than 1/3 second */
1816 size = (freq / 3) * sample_size;
1818 /* set a minimum and maximum size allowed */
1819 if (size > dma_buffer_size)
1820 size = dma_buffer_size - dma_buffer_size % sample_size;
1821 else if (size < sample_size)
1828 /* figures out what counter values to use based on command */
1829 static void labpc_adc_timing(struct comedi_device *dev, struct comedi_cmd *cmd)
1831 /* max value for 16 bit counter in mode 2 */
1832 const int max_counter_value = 0x10000;
1833 /* min value for 16 bit counter in mode 2 */
1834 const int min_counter_value = 2;
1835 unsigned int base_period;
1838 * if both convert and scan triggers are TRIG_TIMER, then they
1839 * both rely on counter b0
1841 if (labpc_ai_convert_period(cmd) && labpc_ai_scan_period(cmd)) {
1843 * pick the lowest b0 divisor value we can (for maximum input
1844 * clock speed on convert and scan counters)
1846 devpriv->divisor_b0 = (labpc_ai_scan_period(cmd) - 1) /
1847 (LABPC_TIMER_BASE * max_counter_value) + 1;
1848 if (devpriv->divisor_b0 < min_counter_value)
1849 devpriv->divisor_b0 = min_counter_value;
1850 if (devpriv->divisor_b0 > max_counter_value)
1851 devpriv->divisor_b0 = max_counter_value;
1853 base_period = LABPC_TIMER_BASE * devpriv->divisor_b0;
1855 /* set a0 for conversion frequency and b1 for scan frequency */
1856 switch (cmd->flags & TRIG_ROUND_MASK) {
1858 case TRIG_ROUND_NEAREST:
1859 devpriv->divisor_a0 =
1860 (labpc_ai_convert_period(cmd) +
1861 (base_period / 2)) / base_period;
1862 devpriv->divisor_b1 =
1863 (labpc_ai_scan_period(cmd) +
1864 (base_period / 2)) / base_period;
1867 devpriv->divisor_a0 =
1868 (labpc_ai_convert_period(cmd) + (base_period -
1870 devpriv->divisor_b1 =
1871 (labpc_ai_scan_period(cmd) + (base_period -
1874 case TRIG_ROUND_DOWN:
1875 devpriv->divisor_a0 =
1876 labpc_ai_convert_period(cmd) / base_period;
1877 devpriv->divisor_b1 =
1878 labpc_ai_scan_period(cmd) / base_period;
1881 /* make sure a0 and b1 values are acceptable */
1882 if (devpriv->divisor_a0 < min_counter_value)
1883 devpriv->divisor_a0 = min_counter_value;
1884 if (devpriv->divisor_a0 > max_counter_value)
1885 devpriv->divisor_a0 = max_counter_value;
1886 if (devpriv->divisor_b1 < min_counter_value)
1887 devpriv->divisor_b1 = min_counter_value;
1888 if (devpriv->divisor_b1 > max_counter_value)
1889 devpriv->divisor_b1 = max_counter_value;
1890 /* write corrected timings to command */
1891 labpc_set_ai_convert_period(cmd,
1892 base_period * devpriv->divisor_a0);
1893 labpc_set_ai_scan_period(cmd,
1894 base_period * devpriv->divisor_b1);
1896 * if only one TRIG_TIMER is used, we can employ the generic
1897 * cascaded timing functions
1899 } else if (labpc_ai_scan_period(cmd)) {
1900 unsigned int scan_period;
1902 scan_period = labpc_ai_scan_period(cmd);
1904 * calculate cascaded counter values
1905 * that give desired scan timing
1907 i8253_cascade_ns_to_timer_2div(LABPC_TIMER_BASE,
1908 &(devpriv->divisor_b1),
1909 &(devpriv->divisor_b0),
1911 cmd->flags & TRIG_ROUND_MASK);
1912 labpc_set_ai_scan_period(cmd, scan_period);
1913 } else if (labpc_ai_convert_period(cmd)) {
1914 unsigned int convert_period;
1916 convert_period = labpc_ai_convert_period(cmd);
1918 * calculate cascaded counter values
1919 * that give desired conversion timing
1921 i8253_cascade_ns_to_timer_2div(LABPC_TIMER_BASE,
1922 &(devpriv->divisor_a0),
1923 &(devpriv->divisor_b0),
1925 cmd->flags & TRIG_ROUND_MASK);
1926 labpc_set_ai_convert_period(cmd, convert_period);
1930 static int labpc_dio_mem_callback(int dir, int port, int data,
1931 unsigned long iobase)
1934 writeb(data, (void *)(iobase + port));
1937 return readb((void *)(iobase + port));
1941 /* lowlevel write to eeprom/dac */
1942 static void labpc_serial_out(struct comedi_device *dev, unsigned int value,
1943 unsigned int value_width)
1947 for (i = 1; i <= value_width; i++) {
1948 /* clear serial clock */
1949 devpriv->command5_bits &= ~SCLOCK_BIT;
1950 /* send bits most significant bit first */
1951 if (value & (1 << (value_width - i)))
1952 devpriv->command5_bits |= SDATA_BIT;
1954 devpriv->command5_bits &= ~SDATA_BIT;
1956 devpriv->write_byte(devpriv->command5_bits,
1957 dev->iobase + COMMAND5_REG);
1958 /* set clock to load bit */
1959 devpriv->command5_bits |= SCLOCK_BIT;
1961 devpriv->write_byte(devpriv->command5_bits,
1962 dev->iobase + COMMAND5_REG);
1966 /* lowlevel read from eeprom */
1967 static unsigned int labpc_serial_in(struct comedi_device *dev)
1969 unsigned int value = 0;
1971 const int value_width = 8; /* number of bits wide values are */
1973 for (i = 1; i <= value_width; i++) {
1974 /* set serial clock */
1975 devpriv->command5_bits |= SCLOCK_BIT;
1977 devpriv->write_byte(devpriv->command5_bits,
1978 dev->iobase + COMMAND5_REG);
1979 /* clear clock bit */
1980 devpriv->command5_bits &= ~SCLOCK_BIT;
1982 devpriv->write_byte(devpriv->command5_bits,
1983 dev->iobase + COMMAND5_REG);
1984 /* read bits most significant bit first */
1986 devpriv->status2_bits =
1987 devpriv->read_byte(dev->iobase + STATUS2_REG);
1988 if (devpriv->status2_bits & EEPROM_OUT_BIT)
1989 value |= 1 << (value_width - i);
1995 static unsigned int labpc_eeprom_read(struct comedi_device *dev,
1996 unsigned int address)
1999 /* bits to tell eeprom to expect a read */
2000 const int read_instruction = 0x3;
2001 /* 8 bit write lengths to eeprom */
2002 const int write_length = 8;
2004 /* enable read/write to eeprom */
2005 devpriv->command5_bits &= ~EEPROM_EN_BIT;
2007 devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2008 devpriv->command5_bits |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT;
2010 devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2012 /* send read instruction */
2013 labpc_serial_out(dev, read_instruction, write_length);
2014 /* send 8 bit address to read from */
2015 labpc_serial_out(dev, address, write_length);
2017 value = labpc_serial_in(dev);
2019 /* disable read/write to eeprom */
2020 devpriv->command5_bits &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
2022 devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2027 static int labpc_eeprom_write(struct comedi_device *dev,
2028 unsigned int address, unsigned int value)
2030 const int write_enable_instruction = 0x6;
2031 const int write_instruction = 0x2;
2032 const int write_length = 8; /* 8 bit write lengths to eeprom */
2033 const int write_in_progress_bit = 0x1;
2034 const int timeout = 10000;
2037 /* make sure there isn't already a write in progress */
2038 for (i = 0; i < timeout; i++) {
2039 if ((labpc_eeprom_read_status(dev) & write_in_progress_bit) ==
2044 comedi_error(dev, "eeprom write timed out");
2047 /* update software copy of eeprom */
2048 devpriv->eeprom_data[address] = value;
2050 /* enable read/write to eeprom */
2051 devpriv->command5_bits &= ~EEPROM_EN_BIT;
2053 devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2054 devpriv->command5_bits |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT;
2056 devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2058 /* send write_enable instruction */
2059 labpc_serial_out(dev, write_enable_instruction, write_length);
2060 devpriv->command5_bits &= ~EEPROM_EN_BIT;
2062 devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2064 /* send write instruction */
2065 devpriv->command5_bits |= EEPROM_EN_BIT;
2067 devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2068 labpc_serial_out(dev, write_instruction, write_length);
2069 /* send 8 bit address to write to */
2070 labpc_serial_out(dev, address, write_length);
2072 labpc_serial_out(dev, value, write_length);
2073 devpriv->command5_bits &= ~EEPROM_EN_BIT;
2075 devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2077 /* disable read/write to eeprom */
2078 devpriv->command5_bits &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
2080 devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2085 static unsigned int labpc_eeprom_read_status(struct comedi_device *dev)
2088 const int read_status_instruction = 0x5;
2089 const int write_length = 8; /* 8 bit write lengths to eeprom */
2091 /* enable read/write to eeprom */
2092 devpriv->command5_bits &= ~EEPROM_EN_BIT;
2094 devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2095 devpriv->command5_bits |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT;
2097 devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2099 /* send read status instruction */
2100 labpc_serial_out(dev, read_status_instruction, write_length);
2102 value = labpc_serial_in(dev);
2104 /* disable read/write to eeprom */
2105 devpriv->command5_bits &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
2107 devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2112 /* writes to 8 bit calibration dacs */
2113 static void write_caldac(struct comedi_device *dev, unsigned int channel,
2116 if (value == devpriv->caldac[channel])
2118 devpriv->caldac[channel] = value;
2120 /* clear caldac load bit and make sure we don't write to eeprom */
2121 devpriv->command5_bits &=
2122 ~CALDAC_LOAD_BIT & ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
2124 devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2126 /* write 4 bit channel */
2127 labpc_serial_out(dev, channel, 4);
2128 /* write 8 bit caldac value */
2129 labpc_serial_out(dev, value, 8);
2131 /* set and clear caldac bit to load caldac value */
2132 devpriv->command5_bits |= CALDAC_LOAD_BIT;
2134 devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2135 devpriv->command5_bits &= ~CALDAC_LOAD_BIT;
2137 devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2140 #ifdef CONFIG_COMEDI_PCI
2141 static int __devinit driver_labpc_pci_probe(struct pci_dev *dev,
2142 const struct pci_device_id *ent)
2144 return comedi_pci_auto_config(dev, driver_labpc.driver_name);
2147 static void __devexit driver_labpc_pci_remove(struct pci_dev *dev)
2149 comedi_pci_auto_unconfig(dev);
2152 static struct pci_driver driver_labpc_pci_driver = {
2153 .id_table = labpc_pci_table,
2154 .probe = &driver_labpc_pci_probe,
2155 .remove = __devexit_p(&driver_labpc_pci_remove)
2158 static int __init driver_labpc_init_module(void)
2162 retval = comedi_driver_register(&driver_labpc);
2166 driver_labpc_pci_driver.name = (char *)driver_labpc.driver_name;
2167 return pci_register_driver(&driver_labpc_pci_driver);
2170 static void __exit driver_labpc_cleanup_module(void)
2172 pci_unregister_driver(&driver_labpc_pci_driver);
2173 comedi_driver_unregister(&driver_labpc);
2176 module_init(driver_labpc_init_module);
2177 module_exit(driver_labpc_cleanup_module);
2179 static int __init driver_labpc_init_module(void)
2181 return comedi_driver_register(&driver_labpc);
2184 static void __exit driver_labpc_cleanup_module(void)
2186 comedi_driver_unregister(&driver_labpc);
2189 module_init(driver_labpc_init_module);
2190 module_exit(driver_labpc_cleanup_module);
2194 MODULE_AUTHOR("Comedi http://www.comedi.org");
2195 MODULE_DESCRIPTION("Comedi low-level driver");
2196 MODULE_LICENSE("GPL");