drivers/staging/comedi/drivers/ni_labpc.c

   1 /*
   2     comedi/drivers/ni_labpc.c
   3     Driver for National Instruments Lab-PC series boards and compatibles
   4     Copyright (C) 2001, 2002, 2003 Frank Mori Hess <fmhess@users.sourceforge.net>
   5
   6     This program is free software; you can redistribute it and/or modify
   7     it under the terms of the GNU General Public License as published by
   8     the Free Software Foundation; either version 2 of the License, or
   9     (at your option) any later version.
  10
  11     This program is distributed in the hope that it will be useful,
  12     but WITHOUT ANY WARRANTY; without even the implied warranty of
  13     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14     GNU General Public License for more details.
  15
  16     You should have received a copy of the GNU General Public License
  17     along with this program; if not, write to the Free Software
  18     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19
  20 ************************************************************************
  21 */
  22 /*
  23 Driver: ni_labpc
  24 Description: National Instruments Lab-PC (& compatibles)
  25 Author: Frank Mori Hess <fmhess@users.sourceforge.net>
  26 Devices: [National Instruments] Lab-PC-1200 (labpc-1200),
  27   Lab-PC-1200AI (labpc-1200ai), Lab-PC+ (lab-pc+), PCI-1200 (ni_labpc)
  28 Status: works
  29
  30 Tested with lab-pc-1200.  For the older Lab-PC+, not all input ranges
  31 and analog references will work, the available ranges/arefs will
  32 depend on how you have configured the jumpers on your board
  33 (see your owner's manual).
  34
  35 Kernel-level ISA plug-and-play support for the lab-pc-1200
  36 boards has not
  37 yet been added to the driver, mainly due to the fact that
  38 I don't know the device id numbers.  If you have one
  39 of these boards,
  40 please file a bug report at https://bugs.comedi.org/
  41 so I can get the necessary information from you.
  42
  43 The 1200 series boards have onboard calibration dacs for correcting
  44 analog input/output offsets and gains.  The proper settings for these
  45 caldacs are stored on the board's eeprom.  To read the caldac values
  46 from the eeprom and store them into a file that can be then be used by
  47 comedilib, use the comedi_calibrate program.
  48
  49 Configuration options - ISA boards:
  50   [0] - I/O port base address
  51   [1] - IRQ (optional, required for timed or externally triggered conversions)
  52   [2] - DMA channel (optional)
  53
  54 Configuration options - PCI boards:
  55   [0] - bus (optional)
  56   [1] - slot (optional)
  57
  58 The Lab-pc+ has quirky chanlist requirements
  59 when scanning multiple channels.  Multiple channel scan
  60 sequence must start at highest channel, then decrement down to
  61 channel 0.  The rest of the cards can scan down like lab-pc+ or scan
  62 up from channel zero.  Chanlists consisting of all one channel
  63 are also legal, and allow you to pace conversions in bursts.
  64
  65 */
  66
  67 /*
  68
  69 NI manuals:
  70 341309a (labpc-1200 register manual)
  71 340914a (pci-1200)
  72 320502b (lab-pc+)
  73
  74 */
  75
  76 #undef LABPC_DEBUG
  77 /* #define LABPC_DEBUG    enable debugging messages */
  78
  79 #include <linux/interrupt.h>
  80 #include "../comedidev.h"
  81
  82 #include <linux/delay.h>
  83 #include <asm/dma.h>
  84
  85 #include "8253.h"
  86 #include "8255.h"
  87 #include "mite.h"
  88 #include "comedi_fc.h"
  89 #include "ni_labpc.h"
  90
  91 #define DRV_NAME "ni_labpc"
  92
  93 #define LABPC_SIZE           32 /*  size of io region used by board */
  94 #define LABPC_TIMER_BASE            500 /*  2 MHz master clock */
  95
  96 /* Registers for the lab-pc+ */
  97
  98 /* write-only registers */
  99 #define COMMAND1_REG    0x0
 100 #define   ADC_GAIN_MASK (0x7 << 4)
 101 #define   ADC_CHAN_BITS(x)      ((x) & 0x7)
 102 #define   ADC_SCAN_EN_BIT       0x80    /*  enables multi channel scans */
 103 #define COMMAND2_REG    0x1
 104 #define   PRETRIG_BIT   0x1     /*  enable pretriggering (used in conjunction with SWTRIG) */
 105 #define   HWTRIG_BIT    0x2     /*  enable paced conversions on external trigger */
 106 #define   SWTRIG_BIT    0x4     /*  enable paced conversions */
 107 #define   CASCADE_BIT   0x8     /*  use two cascaded counters for pacing */
 108 #define   DAC_PACED_BIT(channel)        (0x40 << ((channel) & 0x1))
 109 #define COMMAND3_REG    0x2
 110 #define   DMA_EN_BIT    0x1     /*  enable dma transfers */
 111 #define   DIO_INTR_EN_BIT       0x2     /*  enable interrupts for 8255 */
 112 #define   DMATC_INTR_EN_BIT     0x4     /*  enable dma terminal count interrupt */
 113 #define   TIMER_INTR_EN_BIT     0x8     /*  enable timer interrupt */
 114 #define   ERR_INTR_EN_BIT       0x10    /*  enable error interrupt */
 115 #define   ADC_FNE_INTR_EN_BIT   0x20    /*  enable fifo not empty interrupt */
 116 #define ADC_CONVERT_REG 0x3
 117 #define DAC_LSB_REG(channel)    (0x4 + 2 * ((channel) & 0x1))
 118 #define DAC_MSB_REG(channel)    (0x5 + 2 * ((channel) & 0x1))
 119 #define ADC_CLEAR_REG   0x8
 120 #define DMATC_CLEAR_REG 0xa
 121 #define TIMER_CLEAR_REG 0xc
 122 #define COMMAND6_REG    0xe     /*  1200 boards only */
 123 #define   ADC_COMMON_BIT        0x1     /*  select ground or common-mode reference */
 124 #define   ADC_UNIP_BIT  0x2     /*  adc unipolar */
 125 #define   DAC_UNIP_BIT(channel) (0x4 << ((channel) & 0x1))      /*  dac unipolar */
 126 #define   ADC_FHF_INTR_EN_BIT   0x20    /*  enable fifo half full interrupt */
 127 #define   A1_INTR_EN_BIT        0x40    /*  enable interrupt on end of hardware count */
 128 #define   ADC_SCAN_UP_BIT 0x80  /*  scan up from channel zero instead of down to zero */
 129 #define COMMAND4_REG    0xf
 130 #define   INTERVAL_SCAN_EN_BIT  0x1     /*  enables 'interval' scanning */
 131 #define   EXT_SCAN_EN_BIT       0x2     /*  enables external signal on counter b1 output to trigger scan */
 132 #define   EXT_CONVERT_OUT_BIT   0x4     /*  chooses direction (output or input) for EXTCONV* line */
 133 #define   ADC_DIFF_BIT  0x8     /*  chooses differential inputs for adc (in conjunction with board jumper) */
 134 #define   EXT_CONVERT_DISABLE_BIT       0x10
 135 #define COMMAND5_REG    0x1c    /*  1200 boards only, calibration stuff */
 136 #define   EEPROM_WRITE_UNPROTECT_BIT    0x4     /*  enable eeprom for write */
 137 #define   DITHER_EN_BIT 0x8     /*  enable dithering */
 138 #define   CALDAC_LOAD_BIT       0x10    /*  load calibration dac */
 139 #define   SCLOCK_BIT    0x20    /*  serial clock - rising edge writes, falling edge reads */
 140 #define   SDATA_BIT     0x40    /*  serial data bit for writing to eeprom or calibration dacs */
 141 #define   EEPROM_EN_BIT 0x80    /*  enable eeprom for read/write */
 142 #define INTERVAL_COUNT_REG      0x1e
 143 #define INTERVAL_LOAD_REG       0x1f
 144 #define   INTERVAL_LOAD_BITS    0x1
 145
 146 /* read-only registers */
 147 #define STATUS1_REG     0x0
 148 #define   DATA_AVAIL_BIT        0x1     /*  data is available in fifo */
 149 #define   OVERRUN_BIT   0x2     /*  overrun has occurred */
 150 #define   OVERFLOW_BIT  0x4     /*  fifo overflow */
 151 #define   TIMER_BIT     0x8     /*  timer interrupt has occured */
 152 #define   DMATC_BIT     0x10    /*  dma terminal count has occured */
 153 #define   EXT_TRIG_BIT  0x40    /*  external trigger has occured */
 154 #define STATUS2_REG     0x1d    /*  1200 boards only */
 155 #define   EEPROM_OUT_BIT        0x1     /*  programmable eeprom serial output */
 156 #define   A1_TC_BIT     0x2     /*  counter A1 terminal count */
 157 #define   FNHF_BIT      0x4     /*  fifo not half full */
 158 #define ADC_FIFO_REG    0xa
 159
 160 #define DIO_BASE_REG    0x10
 161 #define COUNTER_A_BASE_REG      0x14
 162 #define COUNTER_A_CONTROL_REG   (COUNTER_A_BASE_REG + 0x3)
 163 #define   INIT_A0_BITS  0x14    /*  check modes put conversion pacer output in harmless state (a0 mode 2) */
 164 #define   INIT_A1_BITS  0x70    /*  put hardware conversion counter output in harmless state (a1 mode 0) */
 165 #define COUNTER_B_BASE_REG      0x18
 166
 167 static int labpc_attach(struct comedi_device *dev, struct comedi_devconfig *it);
 168 static int labpc_cancel(struct comedi_device *dev, struct comedi_subdevice *s);
 169 static irqreturn_t labpc_interrupt(int irq, void *d);
 170 static int labpc_drain_fifo(struct comedi_device *dev);
 171 static void labpc_drain_dma(struct comedi_device *dev);
 172 static void handle_isa_dma(struct comedi_device *dev);
 173 static void labpc_drain_dregs(struct comedi_device *dev);
 174 static int labpc_ai_cmdtest(struct comedi_device *dev,
 175                             struct comedi_subdevice *s, struct comedi_cmd *cmd);
 176 static int labpc_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s);
 177 static int labpc_ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
 178                           struct comedi_insn *insn, unsigned int *data);
 179 static int labpc_ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s,
 180                           struct comedi_insn *insn, unsigned int *data);
 181 static int labpc_ao_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
 182                           struct comedi_insn *insn, unsigned int *data);
 183 static int labpc_calib_read_insn(struct comedi_device *dev,
 184                                  struct comedi_subdevice *s,
 185                                  struct comedi_insn *insn, unsigned int *data);
 186 static int labpc_calib_write_insn(struct comedi_device *dev,
 187                                   struct comedi_subdevice *s,
 188                                   struct comedi_insn *insn, unsigned int *data);
 189 static int labpc_eeprom_read_insn(struct comedi_device *dev,
 190                                   struct comedi_subdevice *s,
 191                                   struct comedi_insn *insn, unsigned int *data);
 192 static int labpc_eeprom_write_insn(struct comedi_device *dev,
 193                                    struct comedi_subdevice *s,
 194                                    struct comedi_insn *insn,
 195                                    unsigned int *data);
 196 static unsigned int labpc_suggest_transfer_size(struct comedi_cmd cmd);
 197 static void labpc_adc_timing(struct comedi_device *dev, struct comedi_cmd *cmd);
 198 #ifdef CONFIG_COMEDI_PCI
 199 static int labpc_find_device(struct comedi_device *dev, int bus, int slot);
 200 #endif
 201 static int labpc_dio_mem_callback(int dir, int port, int data,
 202                                   unsigned long arg);
 203 static void labpc_serial_out(struct comedi_device *dev, unsigned int value,
 204                              unsigned int num_bits);
 205 static unsigned int labpc_serial_in(struct comedi_device *dev);
 206 static unsigned int labpc_eeprom_read(struct comedi_device *dev,
 207                                       unsigned int address);
 208 static unsigned int labpc_eeprom_read_status(struct comedi_device *dev);
 209 static unsigned int labpc_eeprom_write(struct comedi_device *dev,
 210                                        unsigned int address,
 211                                        unsigned int value);
 212 static void write_caldac(struct comedi_device *dev, unsigned int channel,
 213                          unsigned int value);
 214
 215 enum scan_mode {
 216         MODE_SINGLE_CHAN,
 217         MODE_SINGLE_CHAN_INTERVAL,
 218         MODE_MULT_CHAN_UP,
 219         MODE_MULT_CHAN_DOWN,
 220 };
 221
 222 /* analog input ranges */
 223 #define NUM_LABPC_PLUS_AI_RANGES 16
 224 /* indicates unipolar ranges */
 225 static const int labpc_plus_is_unipolar[NUM_LABPC_PLUS_AI_RANGES] = {
 226         0,
 227         0,
 228         0,
 229         0,
 230         0,
 231         0,
 232         0,
 233         0,
 234         1,
 235         1,
 236         1,
 237         1,
 238         1,
 239         1,
 240         1,
 241         1,
 242 };
 243
 244 /* map range index to gain bits */
 245 static const int labpc_plus_ai_gain_bits[NUM_LABPC_PLUS_AI_RANGES] = {
 246         0x00,
 247         0x10,
 248         0x20,
 249         0x30,
 250         0x40,
 251         0x50,
 252         0x60,
 253         0x70,
 254         0x00,
 255         0x10,
 256         0x20,
 257         0x30,
 258         0x40,
 259         0x50,
 260         0x60,
 261         0x70,
 262 };
 263
 264 static const struct comedi_lrange range_labpc_plus_ai = {
 265         NUM_LABPC_PLUS_AI_RANGES,
 266         {
 267          BIP_RANGE(5),
 268          BIP_RANGE(4),
 269          BIP_RANGE(2.5),
 270          BIP_RANGE(1),
 271          BIP_RANGE(0.5),
 272          BIP_RANGE(0.25),
 273          BIP_RANGE(0.1),
 274          BIP_RANGE(0.05),
 275          UNI_RANGE(10),
 276          UNI_RANGE(8),
 277          UNI_RANGE(5),
 278          UNI_RANGE(2),
 279          UNI_RANGE(1),
 280          UNI_RANGE(0.5),
 281          UNI_RANGE(0.2),
 282          UNI_RANGE(0.1),
 283          }
 284 };
 285
 286 #define NUM_LABPC_1200_AI_RANGES 14
 287 /* indicates unipolar ranges */
 288 const int labpc_1200_is_unipolar[NUM_LABPC_1200_AI_RANGES] = {
 289         0,
 290         0,
 291         0,
 292         0,
 293         0,
 294         0,
 295         0,
 296         1,
 297         1,
 298         1,
 299         1,
 300         1,
 301         1,
 302         1,
 303 };
 304
 305 /* map range index to gain bits */
 306 const int labpc_1200_ai_gain_bits[NUM_LABPC_1200_AI_RANGES] = {
 307         0x00,
 308         0x20,
 309         0x30,
 310         0x40,
 311         0x50,
 312         0x60,
 313         0x70,
 314         0x00,
 315         0x20,
 316         0x30,
 317         0x40,
 318         0x50,
 319         0x60,
 320         0x70,
 321 };
 322
 323 const struct comedi_lrange range_labpc_1200_ai = {
 324         NUM_LABPC_1200_AI_RANGES,
 325         {
 326          BIP_RANGE(5),
 327          BIP_RANGE(2.5),
 328          BIP_RANGE(1),
 329          BIP_RANGE(0.5),
 330          BIP_RANGE(0.25),
 331          BIP_RANGE(0.1),
 332          BIP_RANGE(0.05),
 333          UNI_RANGE(10),
 334          UNI_RANGE(5),
 335          UNI_RANGE(2),
 336          UNI_RANGE(1),
 337          UNI_RANGE(0.5),
 338          UNI_RANGE(0.2),
 339          UNI_RANGE(0.1),
 340          }
 341 };
 342
 343 /* analog output ranges */
 344 #define AO_RANGE_IS_UNIPOLAR 0x1
 345 static const struct comedi_lrange range_labpc_ao = {
 346         2,
 347         {
 348          BIP_RANGE(5),
 349          UNI_RANGE(10),
 350          }
 351 };
 352
 353 /* functions that do inb/outb and readb/writeb so we can use
 354  * function pointers to decide which to use */
 355 static inline unsigned int labpc_inb(unsigned long address)
 356 {
 357         return inb(address);
 358 }
 359
 360 static inline void labpc_outb(unsigned int byte, unsigned long address)
 361 {
 362         outb(byte, address);
 363 }
 364
 365 static inline unsigned int labpc_readb(unsigned long address)
 366 {
 367         return readb((void *)address);
 368 }
 369
 370 static inline void labpc_writeb(unsigned int byte, unsigned long address)
 371 {
 372         writeb(byte, (void *)address);
 373 }
 374
 375 static const struct labpc_board_struct labpc_boards[] = {
 376         {
 377          .name = "lab-pc-1200",
 378          .ai_speed = 10000,
 379          .bustype = isa_bustype,
 380          .register_layout = labpc_1200_layout,
 381          .has_ao = 1,
 382          .ai_range_table = &range_labpc_1200_ai,
 383          .ai_range_code = labpc_1200_ai_gain_bits,
 384          .ai_range_is_unipolar = labpc_1200_is_unipolar,
 385          .ai_scan_up = 1,
 386          .memory_mapped_io = 0,
 387          },
 388         {
 389          .name = "lab-pc-1200ai",
 390          .ai_speed = 10000,
 391          .bustype = isa_bustype,
 392          .register_layout = labpc_1200_layout,
 393          .has_ao = 0,
 394          .ai_range_table = &range_labpc_1200_ai,
 395          .ai_range_code = labpc_1200_ai_gain_bits,
 396          .ai_range_is_unipolar = labpc_1200_is_unipolar,
 397          .ai_scan_up = 1,
 398          .memory_mapped_io = 0,
 399          },
 400         {
 401          .name = "lab-pc+",
 402          .ai_speed = 12000,
 403          .bustype = isa_bustype,
 404          .register_layout = labpc_plus_layout,
 405          .has_ao = 1,
 406          .ai_range_table = &range_labpc_plus_ai,
 407          .ai_range_code = labpc_plus_ai_gain_bits,
 408          .ai_range_is_unipolar = labpc_plus_is_unipolar,
 409          .ai_scan_up = 0,
 410          .memory_mapped_io = 0,
 411          },
 412 #ifdef CONFIG_COMEDI_PCI
 413         {
 414          .name = "pci-1200",
 415          .device_id = 0x161,
 416          .ai_speed = 10000,
 417          .bustype = pci_bustype,
 418          .register_layout = labpc_1200_layout,
 419          .has_ao = 1,
 420          .ai_range_table = &range_labpc_1200_ai,
 421          .ai_range_code = labpc_1200_ai_gain_bits,
 422          .ai_range_is_unipolar = labpc_1200_is_unipolar,
 423          .ai_scan_up = 1,
 424          .memory_mapped_io = 1,
 425          },
 426         /*  dummy entry so pci board works when comedi_config is passed driver name */
 427         {
 428          .name = DRV_NAME,
 429          .bustype = pci_bustype,
 430          },
 431 #endif
 432 };
 433
 434 /*
 435  * Useful for shorthand access to the particular board structure
 436  */
 437 #define thisboard ((struct labpc_board_struct *)dev->board_ptr)
 438
 439 static const int dma_buffer_size = 0xff00;      /*  size in bytes of dma buffer */
 440 static const int sample_size = 2;       /*  2 bytes per sample */
 441
 442 #define devpriv ((struct labpc_private *)dev->private)
 443
 444 static struct comedi_driver driver_labpc = {
 445         .driver_name = DRV_NAME,
 446         .module = THIS_MODULE,
 447         .attach = labpc_attach,
 448         .detach = labpc_common_detach,
 449         .num_names = ARRAY_SIZE(labpc_boards),
 450         .board_name = &labpc_boards[0].name,
 451         .offset = sizeof(struct labpc_board_struct),
 452 };
 453
 454 #ifdef CONFIG_COMEDI_PCI
 455 static DEFINE_PCI_DEVICE_TABLE(labpc_pci_table) = {
 456         {
 457         PCI_VENDOR_ID_NATINST, 0x161, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
 458         0}
 459 };
 460
 461 MODULE_DEVICE_TABLE(pci, labpc_pci_table);
 462 #endif /* CONFIG_COMEDI_PCI */
 463
 464 static inline int labpc_counter_load(struct comedi_device *dev,
 465                                      unsigned long base_address,
 466                                      unsigned int counter_number,
 467                                      unsigned int count, unsigned int mode)
 468 {
 469         if (thisboard->memory_mapped_io)
 470                 return i8254_mm_load((void *)base_address, 0, counter_number,
 471                                      count, mode);
 472         else
 473                 return i8254_load(base_address, 0, counter_number, count, mode);
 474 }
 475
 476 int labpc_common_attach(struct comedi_device *dev, unsigned long iobase,
 477                         unsigned int irq, unsigned int dma_chan)
 478 {
 479         struct comedi_subdevice *s;
 480         int i;
 481         unsigned long dma_flags, isr_flags;
 482         short lsb, msb;
 483
 484         printk("comedi%d: ni_labpc: %s, io 0x%lx", dev->minor, thisboard->name,
 485                iobase);
 486         if (irq)
 487                 printk(", irq %u", irq);
 488         if (dma_chan)
 489                 printk(", dma %u", dma_chan);
 490         printk("\n");
 491
 492         if (iobase == 0) {
 493                 printk("io base address is zero!\n");
 494                 return -EINVAL;
 495         }
 496         /*  request io regions for isa boards */
 497         if (thisboard->bustype == isa_bustype) {
 498                 /* check if io addresses are available */
 499                 if (!request_region(iobase, LABPC_SIZE,
 500                                     driver_labpc.driver_name)) {
 501                         printk("I/O port conflict\n");
 502                         return -EIO;
 503                 }
 504         }
 505         dev->iobase = iobase;
 506
 507         if (thisboard->memory_mapped_io) {
 508                 devpriv->read_byte = labpc_readb;
 509                 devpriv->write_byte = labpc_writeb;
 510         } else {
 511                 devpriv->read_byte = labpc_inb;
 512                 devpriv->write_byte = labpc_outb;
 513         }
 514         /*  initialize board's command registers */
 515         devpriv->write_byte(devpriv->command1_bits, dev->iobase + COMMAND1_REG);
 516         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
 517         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
 518         devpriv->write_byte(devpriv->command4_bits, dev->iobase + COMMAND4_REG);
 519         if (thisboard->register_layout == labpc_1200_layout) {
 520                 devpriv->write_byte(devpriv->command5_bits,
 521                                     dev->iobase + COMMAND5_REG);
 522                 devpriv->write_byte(devpriv->command6_bits,
 523                                     dev->iobase + COMMAND6_REG);
 524         }
 525
 526         /* grab our IRQ */
 527         if (irq) {
 528                 isr_flags = 0;
 529                 if (thisboard->bustype == pci_bustype)
 530                         isr_flags |= IRQF_SHARED;
 531                 if (request_irq(irq, labpc_interrupt, isr_flags,
 532                                 driver_labpc.driver_name, dev)) {
 533                         printk("unable to allocate irq %u\n", irq);
 534                         return -EINVAL;
 535                 }
 536         }
 537         dev->irq = irq;
 538
 539         /*  grab dma channel */
 540         if (dma_chan > 3) {
 541                 printk(" invalid dma channel %u\n", dma_chan);
 542                 return -EINVAL;
 543         } else if (dma_chan) {
 544                 /*  allocate dma buffer */
 545                 devpriv->dma_buffer =
 546                     kmalloc(dma_buffer_size, GFP_KERNEL | GFP_DMA);
 547                 if (devpriv->dma_buffer == NULL) {
 548                         printk(" failed to allocate dma buffer\n");
 549                         return -ENOMEM;
 550                 }
 551                 if (request_dma(dma_chan, driver_labpc.driver_name)) {
 552                         printk(" failed to allocate dma channel %u\n",
 553                                dma_chan);
 554                         return -EINVAL;
 555                 }
 556                 devpriv->dma_chan = dma_chan;
 557                 dma_flags = claim_dma_lock();
 558                 disable_dma(devpriv->dma_chan);
 559                 set_dma_mode(devpriv->dma_chan, DMA_MODE_READ);
 560                 release_dma_lock(dma_flags);
 561         }
 562
 563         dev->board_name = thisboard->name;
 564
 565         if (alloc_subdevices(dev, 5) < 0)
 566                 return -ENOMEM;
 567
 568         /* analog input subdevice */
 569         s = dev->subdevices + 0;
 570         dev->read_subdev = s;
 571         s->type = COMEDI_SUBD_AI;
 572         s->subdev_flags =
 573             SDF_READABLE | SDF_GROUND | SDF_COMMON | SDF_DIFF | SDF_CMD_READ;
 574         s->n_chan = 8;
 575         s->len_chanlist = 8;
 576         s->maxdata = (1 << 12) - 1;     /*  12 bit resolution */
 577         s->range_table = thisboard->ai_range_table;
 578         s->do_cmd = labpc_ai_cmd;
 579         s->do_cmdtest = labpc_ai_cmdtest;
 580         s->insn_read = labpc_ai_rinsn;
 581         s->cancel = labpc_cancel;
 582
 583         /* analog output */
 584         s = dev->subdevices + 1;
 585         if (thisboard->has_ao) {
 586 /* Could provide command support, except it only has a one sample
 587  * hardware buffer for analog output and no underrun flag. */
 588                 s->type = COMEDI_SUBD_AO;
 589                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_GROUND;
 590                 s->n_chan = NUM_AO_CHAN;
 591                 s->maxdata = (1 << 12) - 1;     /*  12 bit resolution */
 592                 s->range_table = &range_labpc_ao;
 593                 s->insn_read = labpc_ao_rinsn;
 594                 s->insn_write = labpc_ao_winsn;
 595                 /* initialize analog outputs to a known value */
 596                 for (i = 0; i < s->n_chan; i++) {
 597                         devpriv->ao_value[i] = s->maxdata / 2;
 598                         lsb = devpriv->ao_value[i] & 0xff;
 599                         msb = (devpriv->ao_value[i] >> 8) & 0xff;
 600                         devpriv->write_byte(lsb, dev->iobase + DAC_LSB_REG(i));
 601                         devpriv->write_byte(msb, dev->iobase + DAC_MSB_REG(i));
 602                 }
 603         } else {
 604                 s->type = COMEDI_SUBD_UNUSED;
 605         }
 606
 607         /* 8255 dio */
 608         s = dev->subdevices + 2;
 609         /*  if board uses io memory we have to give a custom callback function to the 8255 driver */
 610         if (thisboard->memory_mapped_io)
 611                 subdev_8255_init(dev, s, labpc_dio_mem_callback,
 612                                  (unsigned long)(dev->iobase + DIO_BASE_REG));
 613         else
 614                 subdev_8255_init(dev, s, NULL, dev->iobase + DIO_BASE_REG);
 615
 616         /*  calibration subdevices for boards that have one */
 617         s = dev->subdevices + 3;
 618         if (thisboard->register_layout == labpc_1200_layout) {
 619                 s->type = COMEDI_SUBD_CALIB;
 620                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
 621                 s->n_chan = 16;
 622                 s->maxdata = 0xff;
 623                 s->insn_read = labpc_calib_read_insn;
 624                 s->insn_write = labpc_calib_write_insn;
 625
 626                 for (i = 0; i < s->n_chan; i++)
 627                         write_caldac(dev, i, s->maxdata / 2);
 628         } else
 629                 s->type = COMEDI_SUBD_UNUSED;
 630
 631         /* EEPROM */
 632         s = dev->subdevices + 4;
 633         if (thisboard->register_layout == labpc_1200_layout) {
 634                 s->type = COMEDI_SUBD_MEMORY;
 635                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
 636                 s->n_chan = EEPROM_SIZE;
 637                 s->maxdata = 0xff;
 638                 s->insn_read = labpc_eeprom_read_insn;
 639                 s->insn_write = labpc_eeprom_write_insn;
 640
 641                 for (i = 0; i < EEPROM_SIZE; i++) {
 642                         devpriv->eeprom_data[i] = labpc_eeprom_read(dev, i);
 643                 }
 644 #ifdef LABPC_DEBUG
 645                 printk(" eeprom:");
 646                 for (i = 0; i < EEPROM_SIZE; i++) {
 647                         printk(" %i:0x%x ", i, devpriv->eeprom_data[i]);
 648                 }
 649                 printk("\n");
 650 #endif
 651         } else
 652                 s->type = COMEDI_SUBD_UNUSED;
 653
 654         return 0;
 655 }
 656
 657 static int labpc_attach(struct comedi_device *dev, struct comedi_devconfig *it)
 658 {
 659         unsigned long iobase = 0;
 660         unsigned int irq = 0;
 661         unsigned int dma_chan = 0;
 662 #ifdef CONFIG_COMEDI_PCI
 663         int retval;
 664 #endif
 665
 666         /* allocate and initialize dev->private */
 667         if (alloc_private(dev, sizeof(struct labpc_private)) < 0)
 668                 return -ENOMEM;
 669
 670         /*  get base address, irq etc. based on bustype */
 671         switch (thisboard->bustype) {
 672         case isa_bustype:
 673                 iobase = it->options[0];
 674                 irq = it->options[1];
 675                 dma_chan = it->options[2];
 676                 break;
 677         case pci_bustype:
 678 #ifdef CONFIG_COMEDI_PCI
 679                 retval = labpc_find_device(dev, it->options[0], it->options[1]);
 680                 if (retval < 0) {
 681                         return retval;
 682                 }
 683                 retval = mite_setup(devpriv->mite);
 684                 if (retval < 0)
 685                         return retval;
 686                 iobase = (unsigned long)devpriv->mite->daq_io_addr;
 687                 irq = mite_irq(devpriv->mite);
 688 #else
 689                 printk(" this driver has not been built with PCI support.\n");
 690                 return -EINVAL;
 691 #endif
 692                 break;
 693         case pcmcia_bustype:
 694                 printk
 695                     (" this driver does not support pcmcia cards, use ni_labpc_cs.o\n");
 696                 return -EINVAL;
 697                 break;
 698         default:
 699                 printk("bug! couldn't determine board type\n");
 700                 return -EINVAL;
 701                 break;
 702         }
 703
 704         return labpc_common_attach(dev, iobase, irq, dma_chan);
 705 }
 706
 707 /* adapted from ni_pcimio for finding mite based boards (pc-1200) */
 708 #ifdef CONFIG_COMEDI_PCI
 709 static int labpc_find_device(struct comedi_device *dev, int bus, int slot)
 710 {
 711         struct mite_struct *mite;
 712         int i;
 713         for (mite = mite_devices; mite; mite = mite->next) {
 714                 if (mite->used)
 715                         continue;
 716                 /*  if bus/slot are specified then make sure we have the right bus/slot */
 717                 if (bus || slot) {
 718                         if (bus != mite->pcidev->bus->number
 719                             || slot != PCI_SLOT(mite->pcidev->devfn))
 720                                 continue;
 721                 }
 722                 for (i = 0; i < driver_labpc.num_names; i++) {
 723                         if (labpc_boards[i].bustype != pci_bustype)
 724                                 continue;
 725                         if (mite_device_id(mite) == labpc_boards[i].device_id) {
 726                                 devpriv->mite = mite;
 727                                 /*  fixup board pointer, in case we were using the dummy "ni_labpc" entry */
 728                                 dev->board_ptr = &labpc_boards[i];
 729                                 return 0;
 730                         }
 731                 }
 732         }
 733         printk("no device found\n");
 734         mite_list_devices();
 735         return -EIO;
 736 }
 737 #endif
 738
 739 int labpc_common_detach(struct comedi_device *dev)
 740 {
 741         printk("comedi%d: ni_labpc: detach\n", dev->minor);
 742
 743         if (dev->subdevices)
 744                 subdev_8255_cleanup(dev, dev->subdevices + 2);
 745
 746         /* only free stuff if it has been allocated by _attach */
 747         if (devpriv->dma_buffer)
 748                 kfree(devpriv->dma_buffer);
 749         if (devpriv->dma_chan)
 750                 free_dma(devpriv->dma_chan);
 751         if (dev->irq)
 752                 free_irq(dev->irq, dev);
 753         if (thisboard->bustype == isa_bustype && dev->iobase)
 754                 release_region(dev->iobase, LABPC_SIZE);
 755 #ifdef CONFIG_COMEDI_PCI
 756         if (devpriv->mite)
 757                 mite_unsetup(devpriv->mite);
 758 #endif
 759
 760         return 0;
 761 };
 762
 763 static void labpc_clear_adc_fifo(const struct comedi_device *dev)
 764 {
 765         devpriv->write_byte(0x1, dev->iobase + ADC_CLEAR_REG);
 766         devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
 767         devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
 768 }
 769
 770 static int labpc_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
 771 {
 772         unsigned long flags;
 773
 774         spin_lock_irqsave(&dev->spinlock, flags);
 775         devpriv->command2_bits &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT;
 776         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
 777         spin_unlock_irqrestore(&dev->spinlock, flags);
 778
 779         devpriv->command3_bits = 0;
 780         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
 781
 782         return 0;
 783 }
 784
 785 static enum scan_mode labpc_ai_scan_mode(const struct comedi_cmd *cmd)
 786 {
 787         if (cmd->chanlist_len == 1)
 788                 return MODE_SINGLE_CHAN;
 789
 790         /* chanlist may be NULL during cmdtest. */
 791         if (cmd->chanlist == NULL)
 792                 return MODE_MULT_CHAN_UP;
 793
 794         if (CR_CHAN(cmd->chanlist[0]) == CR_CHAN(cmd->chanlist[1]))
 795                 return MODE_SINGLE_CHAN_INTERVAL;
 796
 797         if (CR_CHAN(cmd->chanlist[0]) < CR_CHAN(cmd->chanlist[1]))
 798                 return MODE_MULT_CHAN_UP;
 799
 800         if (CR_CHAN(cmd->chanlist[0]) > CR_CHAN(cmd->chanlist[1]))
 801                 return MODE_MULT_CHAN_DOWN;
 802
 803         printk("ni_labpc: bug! this should never happen\n");
 804
 805         return 0;
 806 }
 807
 808 static int labpc_ai_chanlist_invalid(const struct comedi_device *dev,
 809                                      const struct comedi_cmd *cmd)
 810 {
 811         int mode, channel, range, aref, i;
 812
 813         if (cmd->chanlist == NULL)
 814                 return 0;
 815
 816         mode = labpc_ai_scan_mode(cmd);
 817
 818         if (mode == MODE_SINGLE_CHAN)
 819                 return 0;
 820
 821         if (mode == MODE_SINGLE_CHAN_INTERVAL) {
 822                 if (cmd->chanlist_len > 0xff) {
 823                         comedi_error(dev,
 824                                      "ni_labpc: chanlist too long for single channel interval mode\n");
 825                         return 1;
 826                 }
 827         }
 828
 829         channel = CR_CHAN(cmd->chanlist[0]);
 830         range = CR_RANGE(cmd->chanlist[0]);
 831         aref = CR_AREF(cmd->chanlist[0]);
 832
 833         for (i = 0; i < cmd->chanlist_len; i++) {
 834
 835                 switch (mode) {
 836                 case MODE_SINGLE_CHAN_INTERVAL:
 837                         if (CR_CHAN(cmd->chanlist[i]) != channel) {
 838                                 comedi_error(dev,
 839                                              "channel scanning order specified in chanlist is not supported by hardware.\n");
 840                                 return 1;
 841                         }
 842                         break;
 843                 case MODE_MULT_CHAN_UP:
 844                         if (CR_CHAN(cmd->chanlist[i]) != i) {
 845                                 comedi_error(dev,
 846                                              "channel scanning order specified in chanlist is not supported by hardware.\n");
 847                                 return 1;
 848                         }
 849                         break;
 850                 case MODE_MULT_CHAN_DOWN:
 851                         if (CR_CHAN(cmd->chanlist[i]) !=
 852                             cmd->chanlist_len - i - 1) {
 853                                 comedi_error(dev,
 854                                              "channel scanning order specified in chanlist is not supported by hardware.\n");
 855                                 return 1;
 856                         }
 857                         break;
 858                 default:
 859                         printk("ni_labpc: bug! in chanlist check\n");
 860                         return 1;
 861                         break;
 862                 }
 863
 864                 if (CR_RANGE(cmd->chanlist[i]) != range) {
 865                         comedi_error(dev,
 866                                      "entries in chanlist must all have the same range\n");
 867                         return 1;
 868                 }
 869
 870                 if (CR_AREF(cmd->chanlist[i]) != aref) {
 871                         comedi_error(dev,
 872                                      "entries in chanlist must all have the same reference\n");
 873                         return 1;
 874                 }
 875         }
 876
 877         return 0;
 878 }
 879
 880 static int labpc_use_continuous_mode(const struct comedi_cmd *cmd)
 881 {
 882         if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN)
 883                 return 1;
 884
 885         if (cmd->scan_begin_src == TRIG_FOLLOW)
 886                 return 1;
 887
 888         return 0;
 889 }
 890
 891 static unsigned int labpc_ai_convert_period(const struct comedi_cmd *cmd)
 892 {
 893         if (cmd->convert_src != TRIG_TIMER)
 894                 return 0;
 895
 896         if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN &&
 897             cmd->scan_begin_src == TRIG_TIMER)
 898                 return cmd->scan_begin_arg;
 899
 900         return cmd->convert_arg;
 901 }
 902
 903 static void labpc_set_ai_convert_period(struct comedi_cmd *cmd, unsigned int ns)
 904 {
 905         if (cmd->convert_src != TRIG_TIMER)
 906                 return;
 907
 908         if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN &&
 909             cmd->scan_begin_src == TRIG_TIMER) {
 910                 cmd->scan_begin_arg = ns;
 911                 if (cmd->convert_arg > cmd->scan_begin_arg)
 912                         cmd->convert_arg = cmd->scan_begin_arg;
 913         } else
 914                 cmd->convert_arg = ns;
 915 }
 916
 917 static unsigned int labpc_ai_scan_period(const struct comedi_cmd *cmd)
 918 {
 919         if (cmd->scan_begin_src != TRIG_TIMER)
 920                 return 0;
 921
 922         if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN &&
 923             cmd->convert_src == TRIG_TIMER)
 924                 return 0;
 925
 926         return cmd->scan_begin_arg;
 927 }
 928
 929 static void labpc_set_ai_scan_period(struct comedi_cmd *cmd, unsigned int ns)
 930 {
 931         if (cmd->scan_begin_src != TRIG_TIMER)
 932                 return;
 933
 934         if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN &&
 935             cmd->convert_src == TRIG_TIMER)
 936                 return;
 937
 938         cmd->scan_begin_arg = ns;
 939 }
 940
 941 static int labpc_ai_cmdtest(struct comedi_device *dev,
 942                             struct comedi_subdevice *s, struct comedi_cmd *cmd)
 943 {
 944         int err = 0;
 945         int tmp, tmp2;
 946         int stop_mask;
 947
 948         /* step 1: make sure trigger sources are trivially valid */
 949
 950         tmp = cmd->start_src;
 951         cmd->start_src &= TRIG_NOW | TRIG_EXT;
 952         if (!cmd->start_src || tmp != cmd->start_src)
 953                 err++;
 954
 955         tmp = cmd->scan_begin_src;
 956         cmd->scan_begin_src &= TRIG_TIMER | TRIG_FOLLOW | TRIG_EXT;
 957         if (!cmd->scan_begin_src || tmp != cmd->scan_begin_src)
 958                 err++;
 959
 960         tmp = cmd->convert_src;
 961         cmd->convert_src &= TRIG_TIMER | TRIG_EXT;
 962         if (!cmd->convert_src || tmp != cmd->convert_src)
 963                 err++;
 964
 965         tmp = cmd->scan_end_src;
 966         cmd->scan_end_src &= TRIG_COUNT;
 967         if (!cmd->scan_end_src || tmp != cmd->scan_end_src)
 968                 err++;
 969
 970         tmp = cmd->stop_src;
 971         stop_mask = TRIG_COUNT | TRIG_NONE;
 972         if (thisboard->register_layout == labpc_1200_layout)
 973                 stop_mask |= TRIG_EXT;
 974         cmd->stop_src &= stop_mask;
 975         if (!cmd->stop_src || tmp != cmd->stop_src)
 976                 err++;
 977
 978         if (err)
 979                 return 1;
 980
 981         /* step 2: make sure trigger sources are unique and mutually compatible */
 982
 983         if (cmd->start_src != TRIG_NOW && cmd->start_src != TRIG_EXT)
 984                 err++;
 985         if (cmd->scan_begin_src != TRIG_TIMER &&
 986             cmd->scan_begin_src != TRIG_FOLLOW &&
 987             cmd->scan_begin_src != TRIG_EXT)
 988                 err++;
 989         if (cmd->convert_src != TRIG_TIMER && cmd->convert_src != TRIG_EXT)
 990                 err++;
 991         if (cmd->stop_src != TRIG_COUNT &&
 992             cmd->stop_src != TRIG_EXT && cmd->stop_src != TRIG_NONE)
 993                 err++;
 994
 995         /*  can't have external stop and start triggers at once */
 996         if (cmd->start_src == TRIG_EXT && cmd->stop_src == TRIG_EXT)
 997                 err++;
 998
 999         if (err)
1000                 return 2;
1001
1002         /* step 3: make sure arguments are trivially compatible */
1003
1004         if (cmd->start_arg == TRIG_NOW && cmd->start_arg != 0) {
1005                 cmd->start_arg = 0;
1006                 err++;
1007         }
1008
1009         if (!cmd->chanlist_len) {
1010                 err++;
1011         }
1012         if (cmd->scan_end_arg != cmd->chanlist_len) {
1013                 cmd->scan_end_arg = cmd->chanlist_len;
1014                 err++;
1015         }
1016
1017         if (cmd->convert_src == TRIG_TIMER) {
1018                 if (cmd->convert_arg < thisboard->ai_speed) {
1019                         cmd->convert_arg = thisboard->ai_speed;
1020                         err++;
1021                 }
1022         }
1023         /*  make sure scan timing is not too fast */
1024         if (cmd->scan_begin_src == TRIG_TIMER) {
1025                 if (cmd->convert_src == TRIG_TIMER &&
1026                     cmd->scan_begin_arg <
1027                     cmd->convert_arg * cmd->chanlist_len) {
1028                         cmd->scan_begin_arg =
1029                             cmd->convert_arg * cmd->chanlist_len;
1030                         err++;
1031                 }
1032                 if (cmd->scan_begin_arg <
1033                     thisboard->ai_speed * cmd->chanlist_len) {
1034                         cmd->scan_begin_arg =
1035                             thisboard->ai_speed * cmd->chanlist_len;
1036                         err++;
1037                 }
1038         }
1039         /*  stop source */
1040         switch (cmd->stop_src) {
1041         case TRIG_COUNT:
1042                 if (!cmd->stop_arg) {
1043                         cmd->stop_arg = 1;
1044                         err++;
1045                 }
1046                 break;
1047         case TRIG_NONE:
1048                 if (cmd->stop_arg != 0) {
1049                         cmd->stop_arg = 0;
1050                         err++;
1051                 }
1052                 break;
1053                 /*  TRIG_EXT doesn't care since it doesn't trigger off a numbered channel */
1054         default:
1055                 break;
1056         }
1057
1058         if (err)
1059                 return 3;
1060
1061         /* step 4: fix up any arguments */
1062
1063         tmp = cmd->convert_arg;
1064         tmp2 = cmd->scan_begin_arg;
1065         labpc_adc_timing(dev, cmd);
1066         if (tmp != cmd->convert_arg || tmp2 != cmd->scan_begin_arg)
1067                 err++;
1068
1069         if (err)
1070                 return 4;
1071
1072         if (labpc_ai_chanlist_invalid(dev, cmd))
1073                 return 5;
1074
1075         return 0;
1076 }
1077
1078 static int labpc_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
1079 {
1080         int channel, range, aref;
1081         unsigned long irq_flags;
1082         int ret;
1083         struct comedi_async *async = s->async;
1084         struct comedi_cmd *cmd = &async->cmd;
1085         enum transfer_type xfer;
1086         unsigned long flags;
1087
1088         if (!dev->irq) {
1089                 comedi_error(dev, "no irq assigned, cannot perform command");
1090                 return -1;
1091         }
1092
1093         range = CR_RANGE(cmd->chanlist[0]);
1094         aref = CR_AREF(cmd->chanlist[0]);
1095
1096         /*  make sure board is disabled before setting up aquisition */
1097         spin_lock_irqsave(&dev->spinlock, flags);
1098         devpriv->command2_bits &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT;
1099         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1100         spin_unlock_irqrestore(&dev->spinlock, flags);
1101
1102         devpriv->command3_bits = 0;
1103         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
1104
1105         /*  initialize software conversion count */
1106         if (cmd->stop_src == TRIG_COUNT) {
1107                 devpriv->count = cmd->stop_arg * cmd->chanlist_len;
1108         }
1109         /*  setup hardware conversion counter */
1110         if (cmd->stop_src == TRIG_EXT) {
1111                 /*  load counter a1 with count of 3 (pc+ manual says this is minimum allowed) using mode 0 */
1112                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_A_BASE_REG,
1113                                          1, 3, 0);
1114                 if (ret < 0) {
1115                         comedi_error(dev, "error loading counter a1");
1116                         return -1;
1117                 }
1118         } else                  /*  otherwise, just put a1 in mode 0 with no count to set its output low */
1119                 devpriv->write_byte(INIT_A1_BITS,
1120                                     dev->iobase + COUNTER_A_CONTROL_REG);
1121
1122         /*  figure out what method we will use to transfer data */
1123         if (devpriv->dma_chan &&        /*  need a dma channel allocated */
1124             /*  dma unsafe at RT priority, and too much setup time for TRIG_WAKE_EOS for */
1125             (cmd->flags & (TRIG_WAKE_EOS | TRIG_RT)) == 0 &&
1126             /*  only available on the isa boards */
1127             thisboard->bustype == isa_bustype) {
1128                 xfer = isa_dma_transfer;
1129         } else if (thisboard->register_layout == labpc_1200_layout &&   /*  pc-plus has no fifo-half full interrupt */
1130                    /*  wake-end-of-scan should interrupt on fifo not empty */
1131                    (cmd->flags & TRIG_WAKE_EOS) == 0 &&
1132                    /*  make sure we are taking more than just a few points */
1133                    (cmd->stop_src != TRIG_COUNT || devpriv->count > 256)) {
1134                 xfer = fifo_half_full_transfer;
1135         } else
1136                 xfer = fifo_not_empty_transfer;
1137         devpriv->current_transfer = xfer;
1138
1139         /*  setup command6 register for 1200 boards */
1140         if (thisboard->register_layout == labpc_1200_layout) {
1141                 /*  reference inputs to ground or common? */
1142                 if (aref != AREF_GROUND)
1143                         devpriv->command6_bits |= ADC_COMMON_BIT;
1144                 else
1145                         devpriv->command6_bits &= ~ADC_COMMON_BIT;
1146                 /*  bipolar or unipolar range? */
1147                 if (thisboard->ai_range_is_unipolar[range])
1148                         devpriv->command6_bits |= ADC_UNIP_BIT;
1149                 else
1150                         devpriv->command6_bits &= ~ADC_UNIP_BIT;
1151                 /*  interrupt on fifo half full? */
1152                 if (xfer == fifo_half_full_transfer)
1153                         devpriv->command6_bits |= ADC_FHF_INTR_EN_BIT;
1154                 else
1155                         devpriv->command6_bits &= ~ADC_FHF_INTR_EN_BIT;
1156                 /*  enable interrupt on counter a1 terminal count? */
1157                 if (cmd->stop_src == TRIG_EXT)
1158                         devpriv->command6_bits |= A1_INTR_EN_BIT;
1159                 else
1160                         devpriv->command6_bits &= ~A1_INTR_EN_BIT;
1161                 /*  are we scanning up or down through channels? */
1162                 if (labpc_ai_scan_mode(cmd) == MODE_MULT_CHAN_UP)
1163                         devpriv->command6_bits |= ADC_SCAN_UP_BIT;
1164                 else
1165                         devpriv->command6_bits &= ~ADC_SCAN_UP_BIT;
1166                 /*  write to register */
1167                 devpriv->write_byte(devpriv->command6_bits,
1168                                     dev->iobase + COMMAND6_REG);
1169         }
1170
1171         /* setup channel list, etc (command1 register) */
1172         devpriv->command1_bits = 0;
1173         if (labpc_ai_scan_mode(cmd) == MODE_MULT_CHAN_UP)
1174                 channel = CR_CHAN(cmd->chanlist[cmd->chanlist_len - 1]);
1175         else
1176                 channel = CR_CHAN(cmd->chanlist[0]);
1177         /*  munge channel bits for differential / scan disabled mode */
1178         if (labpc_ai_scan_mode(cmd) != MODE_SINGLE_CHAN && aref == AREF_DIFF)
1179                 channel *= 2;
1180         devpriv->command1_bits |= ADC_CHAN_BITS(channel);
1181         devpriv->command1_bits |= thisboard->ai_range_code[range];
1182         devpriv->write_byte(devpriv->command1_bits, dev->iobase + COMMAND1_REG);
1183         /*  manual says to set scan enable bit on second pass */
1184         if (labpc_ai_scan_mode(cmd) == MODE_MULT_CHAN_UP ||
1185             labpc_ai_scan_mode(cmd) == MODE_MULT_CHAN_DOWN) {
1186                 devpriv->command1_bits |= ADC_SCAN_EN_BIT;
1187                 /* need a brief delay before enabling scan, or scan list will get screwed when you switch
1188                  * between scan up to scan down mode - dunno why */
1189                 udelay(1);
1190                 devpriv->write_byte(devpriv->command1_bits,
1191                                     dev->iobase + COMMAND1_REG);
1192         }
1193         /*  setup any external triggering/pacing (command4 register) */
1194         devpriv->command4_bits = 0;
1195         if (cmd->convert_src != TRIG_EXT)
1196                 devpriv->command4_bits |= EXT_CONVERT_DISABLE_BIT;
1197         /* XXX should discard first scan when using interval scanning
1198          * since manual says it is not synced with scan clock */
1199         if (labpc_use_continuous_mode(cmd) == 0) {
1200                 devpriv->command4_bits |= INTERVAL_SCAN_EN_BIT;
1201                 if (cmd->scan_begin_src == TRIG_EXT)
1202                         devpriv->command4_bits |= EXT_SCAN_EN_BIT;
1203         }
1204         /*  single-ended/differential */
1205         if (aref == AREF_DIFF)
1206                 devpriv->command4_bits |= ADC_DIFF_BIT;
1207         devpriv->write_byte(devpriv->command4_bits, dev->iobase + COMMAND4_REG);
1208
1209         devpriv->write_byte(cmd->chanlist_len,
1210                             dev->iobase + INTERVAL_COUNT_REG);
1211         /*  load count */
1212         devpriv->write_byte(INTERVAL_LOAD_BITS,
1213                             dev->iobase + INTERVAL_LOAD_REG);
1214
1215         if (cmd->convert_src == TRIG_TIMER || cmd->scan_begin_src == TRIG_TIMER) {
1216                 /*  set up pacing */
1217                 labpc_adc_timing(dev, cmd);
1218                 /*  load counter b0 in mode 3 */
1219                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_B_BASE_REG,
1220                                          0, devpriv->divisor_b0, 3);
1221                 if (ret < 0) {
1222                         comedi_error(dev, "error loading counter b0");
1223                         return -1;
1224                 }
1225         }
1226         /*  set up conversion pacing */
1227         if (labpc_ai_convert_period(cmd)) {
1228                 /*  load counter a0 in mode 2 */
1229                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_A_BASE_REG,
1230                                          0, devpriv->divisor_a0, 2);
1231                 if (ret < 0) {
1232                         comedi_error(dev, "error loading counter a0");
1233                         return -1;
1234                 }
1235         } else
1236                 devpriv->write_byte(INIT_A0_BITS,
1237                                     dev->iobase + COUNTER_A_CONTROL_REG);
1238
1239         /*  set up scan pacing */
1240         if (labpc_ai_scan_period(cmd)) {
1241                 /*  load counter b1 in mode 2 */
1242                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_B_BASE_REG,
1243                                          1, devpriv->divisor_b1, 2);
1244                 if (ret < 0) {
1245                         comedi_error(dev, "error loading counter b1");
1246                         return -1;
1247                 }
1248         }
1249
1250         labpc_clear_adc_fifo(dev);
1251
1252         /*  set up dma transfer */
1253         if (xfer == isa_dma_transfer) {
1254                 irq_flags = claim_dma_lock();
1255                 disable_dma(devpriv->dma_chan);
1256                 /* clear flip-flop to make sure 2-byte registers for
1257                  * count and address get set correctly */
1258                 clear_dma_ff(devpriv->dma_chan);
1259                 set_dma_addr(devpriv->dma_chan,
1260                              virt_to_bus(devpriv->dma_buffer));
1261                 /*  set appropriate size of transfer */
1262                 devpriv->dma_transfer_size = labpc_suggest_transfer_size(*cmd);
1263                 if (cmd->stop_src == TRIG_COUNT &&
1264                     devpriv->count * sample_size < devpriv->dma_transfer_size) {
1265                         devpriv->dma_transfer_size =
1266                             devpriv->count * sample_size;
1267                 }
1268                 set_dma_count(devpriv->dma_chan, devpriv->dma_transfer_size);
1269                 enable_dma(devpriv->dma_chan);
1270                 release_dma_lock(irq_flags);
1271                 /*  enable board's dma */
1272                 devpriv->command3_bits |= DMA_EN_BIT | DMATC_INTR_EN_BIT;
1273         } else
1274                 devpriv->command3_bits &= ~DMA_EN_BIT & ~DMATC_INTR_EN_BIT;
1275
1276         /*  enable error interrupts */
1277         devpriv->command3_bits |= ERR_INTR_EN_BIT;
1278         /*  enable fifo not empty interrupt? */
1279         if (xfer == fifo_not_empty_transfer)
1280                 devpriv->command3_bits |= ADC_FNE_INTR_EN_BIT;
1281         else
1282                 devpriv->command3_bits &= ~ADC_FNE_INTR_EN_BIT;
1283         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
1284
1285         /*  startup aquisition */
1286
1287         /*  command2 reg */
1288         /*  use 2 cascaded counters for pacing */
1289         spin_lock_irqsave(&dev->spinlock, flags);
1290         devpriv->command2_bits |= CASCADE_BIT;
1291         switch (cmd->start_src) {
1292         case TRIG_EXT:
1293                 devpriv->command2_bits |= HWTRIG_BIT;
1294                 devpriv->command2_bits &= ~PRETRIG_BIT & ~SWTRIG_BIT;
1295                 break;
1296         case TRIG_NOW:
1297                 devpriv->command2_bits |= SWTRIG_BIT;
1298                 devpriv->command2_bits &= ~PRETRIG_BIT & ~HWTRIG_BIT;
1299                 break;
1300         default:
1301                 comedi_error(dev, "bug with start_src");
1302                 return -1;
1303                 break;
1304         }
1305         switch (cmd->stop_src) {
1306         case TRIG_EXT:
1307                 devpriv->command2_bits |= HWTRIG_BIT | PRETRIG_BIT;
1308                 break;
1309         case TRIG_COUNT:
1310         case TRIG_NONE:
1311                 break;
1312         default:
1313                 comedi_error(dev, "bug with stop_src");
1314                 return -1;
1315         }
1316         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1317         spin_unlock_irqrestore(&dev->spinlock, flags);
1318
1319         return 0;
1320 }
1321
1322 /* interrupt service routine */
1323 static irqreturn_t labpc_interrupt(int irq, void *d)
1324 {
1325         struct comedi_device *dev = d;
1326         struct comedi_subdevice *s = dev->read_subdev;
1327         struct comedi_async *async;
1328         struct comedi_cmd *cmd;
1329
1330         if (dev->attached == 0) {
1331                 comedi_error(dev, "premature interrupt");
1332                 return IRQ_HANDLED;
1333         }
1334
1335         async = s->async;
1336         cmd = &async->cmd;
1337         async->events = 0;
1338
1339         /*  read board status */
1340         devpriv->status1_bits = devpriv->read_byte(dev->iobase + STATUS1_REG);
1341         if (thisboard->register_layout == labpc_1200_layout)
1342                 devpriv->status2_bits =
1343                     devpriv->read_byte(dev->iobase + STATUS2_REG);
1344
1345         if ((devpriv->status1_bits & (DMATC_BIT | TIMER_BIT | OVERFLOW_BIT |
1346                                       OVERRUN_BIT | DATA_AVAIL_BIT)) == 0
1347             && (devpriv->status2_bits & A1_TC_BIT) == 0
1348             && (devpriv->status2_bits & FNHF_BIT)) {
1349                 return IRQ_NONE;
1350         }
1351
1352         if (devpriv->status1_bits & OVERRUN_BIT) {
1353                 /*  clear error interrupt */
1354                 devpriv->write_byte(0x1, dev->iobase + ADC_CLEAR_REG);
1355                 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1356                 comedi_event(dev, s);
1357                 comedi_error(dev, "overrun");
1358                 return IRQ_HANDLED;
1359         }
1360
1361         if (devpriv->current_transfer == isa_dma_transfer) {
1362                 /*  if a dma terminal count of external stop trigger has occurred */
1363                 if (devpriv->status1_bits & DMATC_BIT ||
1364                     (thisboard->register_layout == labpc_1200_layout
1365                      && devpriv->status2_bits & A1_TC_BIT)) {
1366                         handle_isa_dma(dev);
1367                 }
1368         } else
1369                 labpc_drain_fifo(dev);
1370
1371         if (devpriv->status1_bits & TIMER_BIT) {
1372                 comedi_error(dev, "handled timer interrupt?");
1373                 /*  clear it */
1374                 devpriv->write_byte(0x1, dev->iobase + TIMER_CLEAR_REG);
1375         }
1376
1377         if (devpriv->status1_bits & OVERFLOW_BIT) {
1378                 /*  clear error interrupt */
1379                 devpriv->write_byte(0x1, dev->iobase + ADC_CLEAR_REG);
1380                 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1381                 comedi_event(dev, s);
1382                 comedi_error(dev, "overflow");
1383                 return IRQ_HANDLED;
1384         }
1385         /*  handle external stop trigger */
1386         if (cmd->stop_src == TRIG_EXT) {
1387                 if (devpriv->status2_bits & A1_TC_BIT) {
1388                         labpc_drain_dregs(dev);
1389                         labpc_cancel(dev, s);
1390                         async->events |= COMEDI_CB_EOA;
1391                 }
1392         }
1393
1394         /* TRIG_COUNT end of acquisition */
1395         if (cmd->stop_src == TRIG_COUNT) {
1396                 if (devpriv->count == 0) {
1397                         labpc_cancel(dev, s);
1398                         async->events |= COMEDI_CB_EOA;
1399                 }
1400         }
1401
1402         comedi_event(dev, s);
1403         return IRQ_HANDLED;
1404 }
1405
1406 /* read all available samples from ai fifo */
1407 static int labpc_drain_fifo(struct comedi_device *dev)
1408 {
1409         unsigned int lsb, msb;
1410         short data;
1411         struct comedi_async *async = dev->read_subdev->async;
1412         const int timeout = 10000;
1413         unsigned int i;
1414
1415         devpriv->status1_bits = devpriv->read_byte(dev->iobase + STATUS1_REG);
1416
1417         for (i = 0; (devpriv->status1_bits & DATA_AVAIL_BIT) && i < timeout;
1418              i++) {
1419                 /*  quit if we have all the data we want */
1420                 if (async->cmd.stop_src == TRIG_COUNT) {
1421                         if (devpriv->count == 0)
1422                                 break;
1423                         devpriv->count--;
1424                 }
1425                 lsb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1426                 msb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1427                 data = (msb << 8) | lsb;
1428                 cfc_write_to_buffer(dev->read_subdev, data);
1429                 devpriv->status1_bits =
1430                     devpriv->read_byte(dev->iobase + STATUS1_REG);
1431         }
1432         if (i == timeout) {
1433                 comedi_error(dev, "ai timeout, fifo never empties");
1434                 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1435                 return -1;
1436         }
1437
1438         return 0;
1439 }
1440
1441 static void labpc_drain_dma(struct comedi_device *dev)
1442 {
1443         struct comedi_subdevice *s = dev->read_subdev;
1444         struct comedi_async *async = s->async;
1445         int status;
1446         unsigned long flags;
1447         unsigned int max_points, num_points, residue, leftover;
1448         int i;
1449
1450         status = devpriv->status1_bits;
1451
1452         flags = claim_dma_lock();
1453         disable_dma(devpriv->dma_chan);
1454         /* clear flip-flop to make sure 2-byte registers for
1455          * count and address get set correctly */
1456         clear_dma_ff(devpriv->dma_chan);
1457
1458         /*  figure out how many points to read */
1459         max_points = devpriv->dma_transfer_size / sample_size;
1460         /* residue is the number of points left to be done on the dma
1461          * transfer.  It should always be zero at this point unless
1462          * the stop_src is set to external triggering.
1463          */
1464         residue = get_dma_residue(devpriv->dma_chan) / sample_size;
1465         num_points = max_points - residue;
1466         if (devpriv->count < num_points && async->cmd.stop_src == TRIG_COUNT)
1467                 num_points = devpriv->count;
1468
1469         /*  figure out how many points will be stored next time */
1470         leftover = 0;
1471         if (async->cmd.stop_src != TRIG_COUNT) {
1472                 leftover = devpriv->dma_transfer_size / sample_size;
1473         } else if (devpriv->count > num_points) {
1474                 leftover = devpriv->count - num_points;
1475                 if (leftover > max_points)
1476                         leftover = max_points;
1477         }
1478
1479         /* write data to comedi buffer */
1480         for (i = 0; i < num_points; i++) {
1481                 cfc_write_to_buffer(s, devpriv->dma_buffer[i]);
1482         }
1483         if (async->cmd.stop_src == TRIG_COUNT)
1484                 devpriv->count -= num_points;
1485
1486         /*  set address and count for next transfer */
1487         set_dma_addr(devpriv->dma_chan, virt_to_bus(devpriv->dma_buffer));
1488         set_dma_count(devpriv->dma_chan, leftover * sample_size);
1489         release_dma_lock(flags);
1490
1491         async->events |= COMEDI_CB_BLOCK;
1492 }
1493
1494 static void handle_isa_dma(struct comedi_device *dev)
1495 {
1496         labpc_drain_dma(dev);
1497
1498         enable_dma(devpriv->dma_chan);
1499
1500         /*  clear dma tc interrupt */
1501         devpriv->write_byte(0x1, dev->iobase + DMATC_CLEAR_REG);
1502 }
1503
1504 /* makes sure all data aquired by board is transfered to comedi (used
1505  * when aquisition is terminated by stop_src == TRIG_EXT). */
1506 static void labpc_drain_dregs(struct comedi_device *dev)
1507 {
1508         if (devpriv->current_transfer == isa_dma_transfer)
1509                 labpc_drain_dma(dev);
1510
1511         labpc_drain_fifo(dev);
1512 }
1513
1514 static int labpc_ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
1515                           struct comedi_insn *insn, unsigned int *data)
1516 {
1517         int i, n;
1518         int chan, range;
1519         int lsb, msb;
1520         int timeout = 1000;
1521         unsigned long flags;
1522
1523         /*  disable timed conversions */
1524         spin_lock_irqsave(&dev->spinlock, flags);
1525         devpriv->command2_bits &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT;
1526         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1527         spin_unlock_irqrestore(&dev->spinlock, flags);
1528
1529         /*  disable interrupt generation and dma */
1530         devpriv->command3_bits = 0;
1531         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
1532
1533         /* set gain and channel */
1534         devpriv->command1_bits = 0;
1535         chan = CR_CHAN(insn->chanspec);
1536         range = CR_RANGE(insn->chanspec);
1537         devpriv->command1_bits |= thisboard->ai_range_code[range];
1538         /*  munge channel bits for differential/scan disabled mode */
1539         if (CR_AREF(insn->chanspec) == AREF_DIFF)
1540                 chan *= 2;
1541         devpriv->command1_bits |= ADC_CHAN_BITS(chan);
1542         devpriv->write_byte(devpriv->command1_bits, dev->iobase + COMMAND1_REG);
1543
1544         /*  setup command6 register for 1200 boards */
1545         if (thisboard->register_layout == labpc_1200_layout) {
1546                 /*  reference inputs to ground or common? */
1547                 if (CR_AREF(insn->chanspec) != AREF_GROUND)
1548                         devpriv->command6_bits |= ADC_COMMON_BIT;
1549                 else
1550                         devpriv->command6_bits &= ~ADC_COMMON_BIT;
1551                 /*  bipolar or unipolar range? */
1552                 if (thisboard->ai_range_is_unipolar[range])
1553                         devpriv->command6_bits |= ADC_UNIP_BIT;
1554                 else
1555                         devpriv->command6_bits &= ~ADC_UNIP_BIT;
1556                 /*  don't interrupt on fifo half full */
1557                 devpriv->command6_bits &= ~ADC_FHF_INTR_EN_BIT;
1558                 /*  don't enable interrupt on counter a1 terminal count? */
1559                 devpriv->command6_bits &= ~A1_INTR_EN_BIT;
1560                 /*  write to register */
1561                 devpriv->write_byte(devpriv->command6_bits,
1562                                     dev->iobase + COMMAND6_REG);
1563         }
1564         /*  setup command4 register */
1565         devpriv->command4_bits = 0;
1566         devpriv->command4_bits |= EXT_CONVERT_DISABLE_BIT;
1567         /*  single-ended/differential */
1568         if (CR_AREF(insn->chanspec) == AREF_DIFF)
1569                 devpriv->command4_bits |= ADC_DIFF_BIT;
1570         devpriv->write_byte(devpriv->command4_bits, dev->iobase + COMMAND4_REG);
1571
1572         /*  initialize pacer counter output to make sure it doesn't cause any problems */
1573         devpriv->write_byte(INIT_A0_BITS, dev->iobase + COUNTER_A_CONTROL_REG);
1574
1575         labpc_clear_adc_fifo(dev);
1576
1577         for (n = 0; n < insn->n; n++) {
1578                 /* trigger conversion */
1579                 devpriv->write_byte(0x1, dev->iobase + ADC_CONVERT_REG);
1580
1581                 for (i = 0; i < timeout; i++) {
1582                         if (devpriv->read_byte(dev->iobase +
1583                                                STATUS1_REG) & DATA_AVAIL_BIT)
1584                                 break;
1585                         udelay(1);
1586                 }
1587                 if (i == timeout) {
1588                         comedi_error(dev, "timeout");
1589                         return -ETIME;
1590                 }
1591                 lsb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1592                 msb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1593                 data[n] = (msb << 8) | lsb;
1594         }
1595
1596         return n;
1597 }
1598
1599 /* analog output insn */
1600 static int labpc_ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s,
1601                           struct comedi_insn *insn, unsigned int *data)
1602 {
1603         int channel, range;
1604         unsigned long flags;
1605         int lsb, msb;
1606
1607         channel = CR_CHAN(insn->chanspec);
1608
1609         /*  turn off pacing of analog output channel */
1610         /* note: hardware bug in daqcard-1200 means pacing cannot
1611          * be independently enabled/disabled for its the two channels */
1612         spin_lock_irqsave(&dev->spinlock, flags);
1613         devpriv->command2_bits &= ~DAC_PACED_BIT(channel);
1614         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1615         spin_unlock_irqrestore(&dev->spinlock, flags);
1616
1617         /*  set range */
1618         if (thisboard->register_layout == labpc_1200_layout) {
1619                 range = CR_RANGE(insn->chanspec);
1620                 if (range & AO_RANGE_IS_UNIPOLAR)
1621                         devpriv->command6_bits |= DAC_UNIP_BIT(channel);
1622                 else
1623                         devpriv->command6_bits &= ~DAC_UNIP_BIT(channel);
1624                 /*  write to register */
1625                 devpriv->write_byte(devpriv->command6_bits,
1626                                     dev->iobase + COMMAND6_REG);
1627         }
1628         /*  send data */
1629         lsb = data[0] & 0xff;
1630         msb = (data[0] >> 8) & 0xff;
1631         devpriv->write_byte(lsb, dev->iobase + DAC_LSB_REG(channel));
1632         devpriv->write_byte(msb, dev->iobase + DAC_MSB_REG(channel));
1633
1634         /*  remember value for readback */
1635         devpriv->ao_value[channel] = data[0];
1636
1637         return 1;
1638 }
1639
1640 /* analog output readback insn */
1641 static int labpc_ao_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
1642                           struct comedi_insn *insn, unsigned int *data)
1643 {
1644         data[0] = devpriv->ao_value[CR_CHAN(insn->chanspec)];
1645
1646         return 1;
1647 }
1648
1649 static int labpc_calib_read_insn(struct comedi_device *dev,
1650                                  struct comedi_subdevice *s,
1651                                  struct comedi_insn *insn, unsigned int *data)
1652 {
1653         data[0] = devpriv->caldac[CR_CHAN(insn->chanspec)];
1654
1655         return 1;
1656 }
1657
1658 static int labpc_calib_write_insn(struct comedi_device *dev,
1659                                   struct comedi_subdevice *s,
1660                                   struct comedi_insn *insn, unsigned int *data)
1661 {
1662         int channel = CR_CHAN(insn->chanspec);
1663
1664         write_caldac(dev, channel, data[0]);
1665         return 1;
1666 }
1667
1668 static int labpc_eeprom_read_insn(struct comedi_device *dev,
1669                                   struct comedi_subdevice *s,
1670                                   struct comedi_insn *insn, unsigned int *data)
1671 {
1672         data[0] = devpriv->eeprom_data[CR_CHAN(insn->chanspec)];
1673
1674         return 1;
1675 }
1676
1677 static int labpc_eeprom_write_insn(struct comedi_device *dev,
1678                                    struct comedi_subdevice *s,
1679                                    struct comedi_insn *insn, unsigned int *data)
1680 {
1681         int channel = CR_CHAN(insn->chanspec);
1682         int ret;
1683
1684         /*  only allow writes to user area of eeprom */
1685         if (channel < 16 || channel > 127) {
1686                 printk
1687                     ("eeprom writes are only allowed to channels 16 through 127 (the pointer and user areas)");
1688                 return -EINVAL;
1689         }
1690
1691         ret = labpc_eeprom_write(dev, channel, data[0]);
1692         if (ret < 0)
1693                 return ret;
1694
1695         return 1;
1696 }
1697
1698 /* utility function that suggests a dma transfer size in bytes */
1699 static unsigned int labpc_suggest_transfer_size(struct comedi_cmd cmd)
1700 {
1701         unsigned int size;
1702         unsigned int freq;
1703
1704         if (cmd.convert_src == TRIG_TIMER)
1705                 freq = 1000000000 / cmd.convert_arg;
1706         /*  return some default value */
1707         else
1708                 freq = 0xffffffff;
1709
1710         /*  make buffer fill in no more than 1/3 second */
1711         size = (freq / 3) * sample_size;
1712
1713         /*  set a minimum and maximum size allowed */
1714         if (size > dma_buffer_size)
1715                 size = dma_buffer_size - dma_buffer_size % sample_size;
1716         else if (size < sample_size)
1717                 size = sample_size;
1718
1719         return size;
1720 }
1721
1722 /* figures out what counter values to use based on command */
1723 static void labpc_adc_timing(struct comedi_device *dev, struct comedi_cmd *cmd)
1724 {
1725         const int max_counter_value = 0x10000;  /*  max value for 16 bit counter in mode 2 */
1726         const int min_counter_value = 2;        /*  min value for 16 bit counter in mode 2 */
1727         unsigned int base_period;
1728
1729         /*  if both convert and scan triggers are TRIG_TIMER, then they both rely on counter b0 */
1730         if (labpc_ai_convert_period(cmd) && labpc_ai_scan_period(cmd)) {
1731                 /*  pick the lowest b0 divisor value we can (for maximum input clock speed on convert and scan counters) */
1732                 devpriv->divisor_b0 = (labpc_ai_scan_period(cmd) - 1) /
1733                     (LABPC_TIMER_BASE * max_counter_value) + 1;
1734                 if (devpriv->divisor_b0 < min_counter_value)
1735                         devpriv->divisor_b0 = min_counter_value;
1736                 if (devpriv->divisor_b0 > max_counter_value)
1737                         devpriv->divisor_b0 = max_counter_value;
1738
1739                 base_period = LABPC_TIMER_BASE * devpriv->divisor_b0;
1740
1741                 /*  set a0 for conversion frequency and b1 for scan frequency */
1742                 switch (cmd->flags & TRIG_ROUND_MASK) {
1743                 default:
1744                 case TRIG_ROUND_NEAREST:
1745                         devpriv->divisor_a0 =
1746                             (labpc_ai_convert_period(cmd) +
1747                              (base_period / 2)) / base_period;
1748                         devpriv->divisor_b1 =
1749                             (labpc_ai_scan_period(cmd) +
1750                              (base_period / 2)) / base_period;
1751                         break;
1752                 case TRIG_ROUND_UP:
1753                         devpriv->divisor_a0 =
1754                             (labpc_ai_convert_period(cmd) + (base_period -
1755                                                              1)) / base_period;
1756                         devpriv->divisor_b1 =
1757                             (labpc_ai_scan_period(cmd) + (base_period -
1758                                                           1)) / base_period;
1759                         break;
1760                 case TRIG_ROUND_DOWN:
1761                         devpriv->divisor_a0 =
1762                             labpc_ai_convert_period(cmd) / base_period;
1763                         devpriv->divisor_b1 =
1764                             labpc_ai_scan_period(cmd) / base_period;
1765                         break;
1766                 }
1767                 /*  make sure a0 and b1 values are acceptable */
1768                 if (devpriv->divisor_a0 < min_counter_value)
1769                         devpriv->divisor_a0 = min_counter_value;
1770                 if (devpriv->divisor_a0 > max_counter_value)
1771                         devpriv->divisor_a0 = max_counter_value;
1772                 if (devpriv->divisor_b1 < min_counter_value)
1773                         devpriv->divisor_b1 = min_counter_value;
1774                 if (devpriv->divisor_b1 > max_counter_value)
1775                         devpriv->divisor_b1 = max_counter_value;
1776                 /*  write corrected timings to command */
1777                 labpc_set_ai_convert_period(cmd,
1778                                             base_period * devpriv->divisor_a0);
1779                 labpc_set_ai_scan_period(cmd,
1780                                          base_period * devpriv->divisor_b1);
1781                 /*  if only one TRIG_TIMER is used, we can employ the generic cascaded timing functions */
1782         } else if (labpc_ai_scan_period(cmd)) {
1783                 unsigned int scan_period;
1784
1785                 scan_period = labpc_ai_scan_period(cmd);
1786                 /* calculate cascaded counter values that give desired scan timing */
1787                 i8253_cascade_ns_to_timer_2div(LABPC_TIMER_BASE,
1788                                                &(devpriv->divisor_b1),
1789                                                &(devpriv->divisor_b0),
1790                                                &scan_period,
1791                                                cmd->flags & TRIG_ROUND_MASK);
1792                 labpc_set_ai_scan_period(cmd, scan_period);
1793         } else if (labpc_ai_convert_period(cmd)) {
1794                 unsigned int convert_period;
1795
1796                 convert_period = labpc_ai_convert_period(cmd);
1797                 /* calculate cascaded counter values that give desired conversion timing */
1798                 i8253_cascade_ns_to_timer_2div(LABPC_TIMER_BASE,
1799                                                &(devpriv->divisor_a0),
1800                                                &(devpriv->divisor_b0),
1801                                                &convert_period,
1802                                                cmd->flags & TRIG_ROUND_MASK);
1803                 labpc_set_ai_convert_period(cmd, convert_period);
1804         }
1805 }
1806
1807 static int labpc_dio_mem_callback(int dir, int port, int data,
1808                                   unsigned long iobase)
1809 {
1810         if (dir) {
1811                 writeb(data, (void *)(iobase + port));
1812                 return 0;
1813         } else {
1814                 return readb((void *)(iobase + port));
1815         }
1816 }
1817
1818 /* lowlevel write to eeprom/dac */
1819 static void labpc_serial_out(struct comedi_device *dev, unsigned int value,
1820                              unsigned int value_width)
1821 {
1822         int i;
1823
1824         for (i = 1; i <= value_width; i++) {
1825                 /*  clear serial clock */
1826                 devpriv->command5_bits &= ~SCLOCK_BIT;
1827                 /*  send bits most significant bit first */
1828                 if (value & (1 << (value_width - i)))
1829                         devpriv->command5_bits |= SDATA_BIT;
1830                 else
1831                         devpriv->command5_bits &= ~SDATA_BIT;
1832                 udelay(1);
1833                 devpriv->write_byte(devpriv->command5_bits,
1834                                     dev->iobase + COMMAND5_REG);
1835                 /*  set clock to load bit */
1836                 devpriv->command5_bits |= SCLOCK_BIT;
1837                 udelay(1);
1838                 devpriv->write_byte(devpriv->command5_bits,
1839                                     dev->iobase + COMMAND5_REG);
1840         }
1841 }
1842
1843 /* lowlevel read from eeprom */
1844 static unsigned int labpc_serial_in(struct comedi_device *dev)
1845 {
1846         unsigned int value = 0;
1847         int i;
1848         const int value_width = 8;      /*  number of bits wide values are */
1849
1850         for (i = 1; i <= value_width; i++) {
1851                 /*  set serial clock */
1852                 devpriv->command5_bits |= SCLOCK_BIT;
1853                 udelay(1);
1854                 devpriv->write_byte(devpriv->command5_bits,
1855                                     dev->iobase + COMMAND5_REG);
1856                 /*  clear clock bit */
1857                 devpriv->command5_bits &= ~SCLOCK_BIT;
1858                 udelay(1);
1859                 devpriv->write_byte(devpriv->command5_bits,
1860                                     dev->iobase + COMMAND5_REG);
1861                 /*  read bits most significant bit first */
1862                 udelay(1);
1863                 devpriv->status2_bits =
1864                     devpriv->read_byte(dev->iobase + STATUS2_REG);
1865                 if (devpriv->status2_bits & EEPROM_OUT_BIT) {
1866                         value |= 1 << (value_width - i);
1867                 }
1868         }
1869
1870         return value;
1871 }
1872
1873 static unsigned int labpc_eeprom_read(struct comedi_device *dev,
1874                                       unsigned int address)
1875 {
1876         unsigned int value;
1877         const int read_instruction = 0x3;       /*  bits to tell eeprom to expect a read */
1878         const int write_length = 8;     /*  8 bit write lengths to eeprom */
1879
1880         /*  enable read/write to eeprom */
1881         devpriv->command5_bits &= ~EEPROM_EN_BIT;
1882         udelay(1);
1883         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1884         devpriv->command5_bits |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT;
1885         udelay(1);
1886         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1887
1888         /*  send read instruction */
1889         labpc_serial_out(dev, read_instruction, write_length);
1890         /*  send 8 bit address to read from */
1891         labpc_serial_out(dev, address, write_length);
1892         /*  read result */
1893         value = labpc_serial_in(dev);
1894
1895         /*  disable read/write to eeprom */
1896         devpriv->command5_bits &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
1897         udelay(1);
1898         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1899
1900         return value;
1901 }
1902
1903 static unsigned int labpc_eeprom_write(struct comedi_device *dev,
1904                                        unsigned int address, unsigned int value)
1905 {
1906         const int write_enable_instruction = 0x6;
1907         const int write_instruction = 0x2;
1908         const int write_length = 8;     /*  8 bit write lengths to eeprom */
1909         const int write_in_progress_bit = 0x1;
1910         const int timeout = 10000;
1911         int i;
1912
1913         /*  make sure there isn't already a write in progress */
1914         for (i = 0; i < timeout; i++) {
1915                 if ((labpc_eeprom_read_status(dev) & write_in_progress_bit) ==
1916                     0)
1917                         break;
1918         }
1919         if (i == timeout) {
1920                 comedi_error(dev, "eeprom write timed out");
1921                 return -ETIME;
1922         }
1923         /*  update software copy of eeprom */
1924         devpriv->eeprom_data[address] = value;
1925
1926         /*  enable read/write to eeprom */
1927         devpriv->command5_bits &= ~EEPROM_EN_BIT;
1928         udelay(1);
1929         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1930         devpriv->command5_bits |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT;
1931         udelay(1);
1932         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1933
1934         /*  send write_enable instruction */
1935         labpc_serial_out(dev, write_enable_instruction, write_length);
1936         devpriv->command5_bits &= ~EEPROM_EN_BIT;
1937         udelay(1);
1938         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1939
1940         /*  send write instruction */
1941         devpriv->command5_bits |= EEPROM_EN_BIT;
1942         udelay(1);
1943         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1944         labpc_serial_out(dev, write_instruction, write_length);
1945         /*  send 8 bit address to write to */
1946         labpc_serial_out(dev, address, write_length);
1947         /*  write value */
1948         labpc_serial_out(dev, value, write_length);
1949         devpriv->command5_bits &= ~EEPROM_EN_BIT;
1950         udelay(1);
1951         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1952
1953         /*  disable read/write to eeprom */
1954         devpriv->command5_bits &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
1955         udelay(1);
1956         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1957
1958         return 0;
1959 }
1960
1961 static unsigned int labpc_eeprom_read_status(struct comedi_device *dev)
1962 {
1963         unsigned int value;
1964         const int read_status_instruction = 0x5;
1965         const int write_length = 8;     /*  8 bit write lengths to eeprom */
1966
1967         /*  enable read/write to eeprom */
1968         devpriv->command5_bits &= ~EEPROM_EN_BIT;
1969         udelay(1);
1970         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1971         devpriv->command5_bits |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT;
1972         udelay(1);
1973         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1974
1975         /*  send read status instruction */
1976         labpc_serial_out(dev, read_status_instruction, write_length);
1977         /*  read result */
1978         value = labpc_serial_in(dev);
1979
1980         /*  disable read/write to eeprom */
1981         devpriv->command5_bits &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
1982         udelay(1);
1983         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1984
1985         return value;
1986 }
1987
1988 /* writes to 8 bit calibration dacs */
1989 static void write_caldac(struct comedi_device *dev, unsigned int channel,
1990                          unsigned int value)
1991 {
1992         if (value == devpriv->caldac[channel])
1993                 return;
1994         devpriv->caldac[channel] = value;
1995
1996         /*  clear caldac load bit and make sure we don't write to eeprom */
1997         devpriv->command5_bits &=
1998             ~CALDAC_LOAD_BIT & ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
1999         udelay(1);
2000         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2001
2002         /*  write 4 bit channel */
2003         labpc_serial_out(dev, channel, 4);
2004         /*  write 8 bit caldac value */
2005         labpc_serial_out(dev, value, 8);
2006
2007         /*  set and clear caldac bit to load caldac value */
2008         devpriv->command5_bits |= CALDAC_LOAD_BIT;
2009         udelay(1);
2010         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2011         devpriv->command5_bits &= ~CALDAC_LOAD_BIT;
2012         udelay(1);
2013         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2014 }
2015
2016 #ifdef CONFIG_COMEDI_PCI
2017 COMEDI_PCI_INITCLEANUP(driver_labpc, labpc_pci_table);
2018 #else
2019 COMEDI_INITCLEANUP(driver_labpc);
2020 #endif
2021
2022 EXPORT_SYMBOL_GPL(labpc_common_attach);
2023 EXPORT_SYMBOL_GPL(labpc_common_detach);
2024 EXPORT_SYMBOL_GPL(range_labpc_1200_ai);
2025 EXPORT_SYMBOL_GPL(labpc_1200_ai_gain_bits);
2026 EXPORT_SYMBOL_GPL(labpc_1200_is_unipolar);