2 comedi/drivers/ni_labpc.c
3 Driver for National Instruments Lab-PC series boards and compatibles
4 Copyright (C) 2001, 2002, 2003 Frank Mori Hess <fmhess@users.sourceforge.net>
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 ************************************************************************
24 Description: National Instruments Lab-PC (& compatibles)
25 Author: Frank Mori Hess <fmhess@users.sourceforge.net>
26 Devices: [National Instruments] Lab-PC-1200 (labpc-1200),
27 Lab-PC-1200AI (labpc-1200ai), Lab-PC+ (lab-pc+), PCI-1200 (ni_labpc)
30 Tested with lab-pc-1200. For the older Lab-PC+, not all input ranges
31 and analog references will work, the available ranges/arefs will
32 depend on how you have configured the jumpers on your board
33 (see your owner's manual).
35 Kernel-level ISA plug-and-play support for the lab-pc-1200
37 yet been added to the driver, mainly due to the fact that
38 I don't know the device id numbers. If you have one
40 please file a bug report at http://comedi.org/
41 so I can get the necessary information from you.
43 The 1200 series boards have onboard calibration dacs for correcting
44 analog input/output offsets and gains. The proper settings for these
45 caldacs are stored on the board's eeprom. To read the caldac values
46 from the eeprom and store them into a file that can be then be used by
47 comedilib, use the comedi_calibrate program.
49 Configuration options - ISA boards:
50 [0] - I/O port base address
51 [1] - IRQ (optional, required for timed or externally triggered conversions)
52 [2] - DMA channel (optional)
54 Configuration options - PCI boards:
58 The Lab-pc+ has quirky chanlist requirements
59 when scanning multiple channels. Multiple channel scan
60 sequence must start at highest channel, then decrement down to
61 channel 0. The rest of the cards can scan down like lab-pc+ or scan
62 up from channel zero. Chanlists consisting of all one channel
63 are also legal, and allow you to pace conversions in bursts.
70 341309a (labpc-1200 register manual)
77 /* #define LABPC_DEBUG enable debugging messages */
79 #include <linux/interrupt.h>
80 #include <linux/slab.h>
82 #include "../comedidev.h"
84 #include <linux/delay.h>
90 #include "comedi_fc.h"
93 #define DRV_NAME "ni_labpc"
95 /* size of io region used by board */
97 /* 2 MHz master clock */
98 #define LABPC_TIMER_BASE 500
100 /* Registers for the lab-pc+ */
102 /* write-only registers */
103 #define COMMAND1_REG 0x0
104 #define ADC_GAIN_MASK (0x7 << 4)
105 #define ADC_CHAN_BITS(x) ((x) & 0x7)
106 /* enables multi channel scans */
107 #define ADC_SCAN_EN_BIT 0x80
108 #define COMMAND2_REG 0x1
109 /* enable pretriggering (used in conjunction with SWTRIG) */
110 #define PRETRIG_BIT 0x1
111 /* enable paced conversions on external trigger */
112 #define HWTRIG_BIT 0x2
113 /* enable paced conversions */
114 #define SWTRIG_BIT 0x4
115 /* use two cascaded counters for pacing */
116 #define CASCADE_BIT 0x8
117 #define DAC_PACED_BIT(channel) (0x40 << ((channel) & 0x1))
118 #define COMMAND3_REG 0x2
119 /* enable dma transfers */
120 #define DMA_EN_BIT 0x1
121 /* enable interrupts for 8255 */
122 #define DIO_INTR_EN_BIT 0x2
123 /* enable dma terminal count interrupt */
124 #define DMATC_INTR_EN_BIT 0x4
125 /* enable timer interrupt */
126 #define TIMER_INTR_EN_BIT 0x8
127 /* enable error interrupt */
128 #define ERR_INTR_EN_BIT 0x10
129 /* enable fifo not empty interrupt */
130 #define ADC_FNE_INTR_EN_BIT 0x20
131 #define ADC_CONVERT_REG 0x3
132 #define DAC_LSB_REG(channel) (0x4 + 2 * ((channel) & 0x1))
133 #define DAC_MSB_REG(channel) (0x5 + 2 * ((channel) & 0x1))
134 #define ADC_CLEAR_REG 0x8
135 #define DMATC_CLEAR_REG 0xa
136 #define TIMER_CLEAR_REG 0xc
137 /* 1200 boards only */
138 #define COMMAND6_REG 0xe
139 /* select ground or common-mode reference */
140 #define ADC_COMMON_BIT 0x1
142 #define ADC_UNIP_BIT 0x2
144 #define DAC_UNIP_BIT(channel) (0x4 << ((channel) & 0x1))
145 /* enable fifo half full interrupt */
146 #define ADC_FHF_INTR_EN_BIT 0x20
147 /* enable interrupt on end of hardware count */
148 #define A1_INTR_EN_BIT 0x40
149 /* scan up from channel zero instead of down to zero */
150 #define ADC_SCAN_UP_BIT 0x80
151 #define COMMAND4_REG 0xf
152 /* enables 'interval' scanning */
153 #define INTERVAL_SCAN_EN_BIT 0x1
154 /* enables external signal on counter b1 output to trigger scan */
155 #define EXT_SCAN_EN_BIT 0x2
156 /* chooses direction (output or input) for EXTCONV* line */
157 #define EXT_CONVERT_OUT_BIT 0x4
158 /* chooses differential inputs for adc (in conjunction with board jumper) */
159 #define ADC_DIFF_BIT 0x8
160 #define EXT_CONVERT_DISABLE_BIT 0x10
161 /* 1200 boards only, calibration stuff */
162 #define COMMAND5_REG 0x1c
163 /* enable eeprom for write */
164 #define EEPROM_WRITE_UNPROTECT_BIT 0x4
165 /* enable dithering */
166 #define DITHER_EN_BIT 0x8
167 /* load calibration dac */
168 #define CALDAC_LOAD_BIT 0x10
169 /* serial clock - rising edge writes, falling edge reads */
170 #define SCLOCK_BIT 0x20
171 /* serial data bit for writing to eeprom or calibration dacs */
172 #define SDATA_BIT 0x40
173 /* enable eeprom for read/write */
174 #define EEPROM_EN_BIT 0x80
175 #define INTERVAL_COUNT_REG 0x1e
176 #define INTERVAL_LOAD_REG 0x1f
177 #define INTERVAL_LOAD_BITS 0x1
179 /* read-only registers */
180 #define STATUS1_REG 0x0
181 /* data is available in fifo */
182 #define DATA_AVAIL_BIT 0x1
183 /* overrun has occurred */
184 #define OVERRUN_BIT 0x2
186 #define OVERFLOW_BIT 0x4
187 /* timer interrupt has occurred */
188 #define TIMER_BIT 0x8
189 /* dma terminal count has occurred */
190 #define DMATC_BIT 0x10
191 /* external trigger has occurred */
192 #define EXT_TRIG_BIT 0x40
193 /* 1200 boards only */
194 #define STATUS2_REG 0x1d
195 /* programmable eeprom serial output */
196 #define EEPROM_OUT_BIT 0x1
197 /* counter A1 terminal count */
198 #define A1_TC_BIT 0x2
199 /* fifo not half full */
201 #define ADC_FIFO_REG 0xa
203 #define DIO_BASE_REG 0x10
204 #define COUNTER_A_BASE_REG 0x14
205 #define COUNTER_A_CONTROL_REG (COUNTER_A_BASE_REG + 0x3)
206 /* check modes put conversion pacer output in harmless state (a0 mode 2) */
207 #define INIT_A0_BITS 0x14
208 /* put hardware conversion counter output in harmless state (a1 mode 0) */
209 #define INIT_A1_BITS 0x70
210 #define COUNTER_B_BASE_REG 0x18
212 static int labpc_attach(struct comedi_device *dev, struct comedi_devconfig *it);
213 static int labpc_cancel(struct comedi_device *dev, struct comedi_subdevice *s);
214 static irqreturn_t labpc_interrupt(int irq, void *d);
215 static int labpc_drain_fifo(struct comedi_device *dev);
216 #ifdef CONFIG_ISA_DMA_API
217 static void labpc_drain_dma(struct comedi_device *dev);
218 static void handle_isa_dma(struct comedi_device *dev);
220 static void labpc_drain_dregs(struct comedi_device *dev);
221 static int labpc_ai_cmdtest(struct comedi_device *dev,
222 struct comedi_subdevice *s, struct comedi_cmd *cmd);
223 static int labpc_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s);
224 static int labpc_ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
225 struct comedi_insn *insn, unsigned int *data);
226 static int labpc_ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s,
227 struct comedi_insn *insn, unsigned int *data);
228 static int labpc_ao_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
229 struct comedi_insn *insn, unsigned int *data);
230 static int labpc_calib_read_insn(struct comedi_device *dev,
231 struct comedi_subdevice *s,
232 struct comedi_insn *insn, unsigned int *data);
233 static int labpc_calib_write_insn(struct comedi_device *dev,
234 struct comedi_subdevice *s,
235 struct comedi_insn *insn, unsigned int *data);
236 static int labpc_eeprom_read_insn(struct comedi_device *dev,
237 struct comedi_subdevice *s,
238 struct comedi_insn *insn, unsigned int *data);
239 static int labpc_eeprom_write_insn(struct comedi_device *dev,
240 struct comedi_subdevice *s,
241 struct comedi_insn *insn,
243 static void labpc_adc_timing(struct comedi_device *dev, struct comedi_cmd *cmd);
244 #ifdef CONFIG_COMEDI_PCI
245 static unsigned int labpc_suggest_transfer_size(struct comedi_cmd cmd);
246 static int labpc_find_device(struct comedi_device *dev, int bus, int slot);
248 static int labpc_dio_mem_callback(int dir, int port, int data,
250 static void labpc_serial_out(struct comedi_device *dev, unsigned int value,
251 unsigned int num_bits);
252 static unsigned int labpc_serial_in(struct comedi_device *dev);
253 static unsigned int labpc_eeprom_read(struct comedi_device *dev,
254 unsigned int address);
255 static unsigned int labpc_eeprom_read_status(struct comedi_device *dev);
256 static int labpc_eeprom_write(struct comedi_device *dev,
257 unsigned int address,
259 static void write_caldac(struct comedi_device *dev, unsigned int channel,
264 MODE_SINGLE_CHAN_INTERVAL,
269 /* analog input ranges */
270 #define NUM_LABPC_PLUS_AI_RANGES 16
271 /* indicates unipolar ranges */
272 static const int labpc_plus_is_unipolar[NUM_LABPC_PLUS_AI_RANGES] = {
291 /* map range index to gain bits */
292 static const int labpc_plus_ai_gain_bits[NUM_LABPC_PLUS_AI_RANGES] = {
311 static const struct comedi_lrange range_labpc_plus_ai = {
312 NUM_LABPC_PLUS_AI_RANGES,
333 #define NUM_LABPC_1200_AI_RANGES 14
334 /* indicates unipolar ranges */
335 const int labpc_1200_is_unipolar[NUM_LABPC_1200_AI_RANGES] = {
351 EXPORT_SYMBOL_GPL(labpc_1200_is_unipolar);
353 /* map range index to gain bits */
354 const int labpc_1200_ai_gain_bits[NUM_LABPC_1200_AI_RANGES] = {
370 EXPORT_SYMBOL_GPL(labpc_1200_ai_gain_bits);
372 const struct comedi_lrange range_labpc_1200_ai = {
373 NUM_LABPC_1200_AI_RANGES,
391 EXPORT_SYMBOL_GPL(range_labpc_1200_ai);
393 /* analog output ranges */
394 #define AO_RANGE_IS_UNIPOLAR 0x1
395 static const struct comedi_lrange range_labpc_ao = {
403 /* functions that do inb/outb and readb/writeb so we can use
404 * function pointers to decide which to use */
405 static inline unsigned int labpc_inb(unsigned long address)
410 static inline void labpc_outb(unsigned int byte, unsigned long address)
415 static inline unsigned int labpc_readb(unsigned long address)
417 return readb((void *)address);
420 static inline void labpc_writeb(unsigned int byte, unsigned long address)
422 writeb(byte, (void *)address);
425 static const struct labpc_board_struct labpc_boards[] = {
427 .name = "lab-pc-1200",
429 .bustype = isa_bustype,
430 .register_layout = labpc_1200_layout,
432 .ai_range_table = &range_labpc_1200_ai,
433 .ai_range_code = labpc_1200_ai_gain_bits,
434 .ai_range_is_unipolar = labpc_1200_is_unipolar,
436 .memory_mapped_io = 0,
439 .name = "lab-pc-1200ai",
441 .bustype = isa_bustype,
442 .register_layout = labpc_1200_layout,
444 .ai_range_table = &range_labpc_1200_ai,
445 .ai_range_code = labpc_1200_ai_gain_bits,
446 .ai_range_is_unipolar = labpc_1200_is_unipolar,
448 .memory_mapped_io = 0,
453 .bustype = isa_bustype,
454 .register_layout = labpc_plus_layout,
456 .ai_range_table = &range_labpc_plus_ai,
457 .ai_range_code = labpc_plus_ai_gain_bits,
458 .ai_range_is_unipolar = labpc_plus_is_unipolar,
460 .memory_mapped_io = 0,
462 #ifdef CONFIG_COMEDI_PCI
467 .bustype = pci_bustype,
468 .register_layout = labpc_1200_layout,
470 .ai_range_table = &range_labpc_1200_ai,
471 .ai_range_code = labpc_1200_ai_gain_bits,
472 .ai_range_is_unipolar = labpc_1200_is_unipolar,
474 .memory_mapped_io = 1,
476 /* dummy entry so pci board works when comedi_config is passed driver name */
479 .bustype = pci_bustype,
485 * Useful for shorthand access to the particular board structure
487 #define thisboard ((struct labpc_board_struct *)dev->board_ptr)
489 /* size in bytes of dma buffer */
490 static const int dma_buffer_size = 0xff00;
491 /* 2 bytes per sample */
492 static const int sample_size = 2;
494 #define devpriv ((struct labpc_private *)dev->private)
496 static struct comedi_driver driver_labpc = {
497 .driver_name = DRV_NAME,
498 .module = THIS_MODULE,
499 .attach = labpc_attach,
500 .detach = labpc_common_detach,
501 .num_names = ARRAY_SIZE(labpc_boards),
502 .board_name = &labpc_boards[0].name,
503 .offset = sizeof(struct labpc_board_struct),
506 #ifdef CONFIG_COMEDI_PCI
507 static DEFINE_PCI_DEVICE_TABLE(labpc_pci_table) = {
508 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x161)},
512 MODULE_DEVICE_TABLE(pci, labpc_pci_table);
513 #endif /* CONFIG_COMEDI_PCI */
515 static inline int labpc_counter_load(struct comedi_device *dev,
516 unsigned long base_address,
517 unsigned int counter_number,
518 unsigned int count, unsigned int mode)
520 if (thisboard->memory_mapped_io)
521 return i8254_mm_load((void *)base_address, 0, counter_number,
524 return i8254_load(base_address, 0, counter_number, count, mode);
527 int labpc_common_attach(struct comedi_device *dev, unsigned long iobase,
528 unsigned int irq, unsigned int dma_chan)
530 struct comedi_subdevice *s;
532 unsigned long isr_flags;
533 #ifdef CONFIG_ISA_DMA_API
534 unsigned long dma_flags;
538 printk(KERN_ERR "comedi%d: ni_labpc: %s, io 0x%lx", dev->minor,
542 printk(", irq %u", irq);
544 printk(", dma %u", dma_chan);
548 printk(KERN_ERR "io base address is zero!\n");
551 /* request io regions for isa boards */
552 if (thisboard->bustype == isa_bustype) {
553 /* check if io addresses are available */
554 if (!request_region(iobase, LABPC_SIZE,
555 driver_labpc.driver_name)) {
556 printk(KERN_ERR "I/O port conflict\n");
560 dev->iobase = iobase;
562 if (thisboard->memory_mapped_io) {
563 devpriv->read_byte = labpc_readb;
564 devpriv->write_byte = labpc_writeb;
566 devpriv->read_byte = labpc_inb;
567 devpriv->write_byte = labpc_outb;
569 /* initialize board's command registers */
570 devpriv->write_byte(devpriv->command1_bits, dev->iobase + COMMAND1_REG);
571 devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
572 devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
573 devpriv->write_byte(devpriv->command4_bits, dev->iobase + COMMAND4_REG);
574 if (thisboard->register_layout == labpc_1200_layout) {
575 devpriv->write_byte(devpriv->command5_bits,
576 dev->iobase + COMMAND5_REG);
577 devpriv->write_byte(devpriv->command6_bits,
578 dev->iobase + COMMAND6_REG);
584 if (thisboard->bustype == pci_bustype
585 || thisboard->bustype == pcmcia_bustype)
586 isr_flags |= IRQF_SHARED;
587 if (request_irq(irq, labpc_interrupt, isr_flags,
588 driver_labpc.driver_name, dev)) {
589 printk(KERN_ERR "unable to allocate irq %u\n", irq);
595 #ifdef CONFIG_ISA_DMA_API
596 /* grab dma channel */
598 printk(KERN_ERR " invalid dma channel %u\n", dma_chan);
600 } else if (dma_chan) {
601 /* allocate dma buffer */
602 devpriv->dma_buffer =
603 kmalloc(dma_buffer_size, GFP_KERNEL | GFP_DMA);
604 if (devpriv->dma_buffer == NULL) {
605 printk(KERN_ERR " failed to allocate dma buffer\n");
608 if (request_dma(dma_chan, driver_labpc.driver_name)) {
609 printk(KERN_ERR " failed to allocate dma channel %u\n",
613 devpriv->dma_chan = dma_chan;
614 dma_flags = claim_dma_lock();
615 disable_dma(devpriv->dma_chan);
616 set_dma_mode(devpriv->dma_chan, DMA_MODE_READ);
617 release_dma_lock(dma_flags);
621 dev->board_name = thisboard->name;
623 if (alloc_subdevices(dev, 5) < 0)
626 /* analog input subdevice */
627 s = dev->subdevices + 0;
628 dev->read_subdev = s;
629 s->type = COMEDI_SUBD_AI;
631 SDF_READABLE | SDF_GROUND | SDF_COMMON | SDF_DIFF | SDF_CMD_READ;
634 s->maxdata = (1 << 12) - 1; /* 12 bit resolution */
635 s->range_table = thisboard->ai_range_table;
636 s->do_cmd = labpc_ai_cmd;
637 s->do_cmdtest = labpc_ai_cmdtest;
638 s->insn_read = labpc_ai_rinsn;
639 s->cancel = labpc_cancel;
642 s = dev->subdevices + 1;
643 if (thisboard->has_ao) {
645 * Could provide command support, except it only has a
646 * one sample hardware buffer for analog output and no
649 s->type = COMEDI_SUBD_AO;
650 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_GROUND;
651 s->n_chan = NUM_AO_CHAN;
652 s->maxdata = (1 << 12) - 1; /* 12 bit resolution */
653 s->range_table = &range_labpc_ao;
654 s->insn_read = labpc_ao_rinsn;
655 s->insn_write = labpc_ao_winsn;
656 /* initialize analog outputs to a known value */
657 for (i = 0; i < s->n_chan; i++) {
658 devpriv->ao_value[i] = s->maxdata / 2;
659 lsb = devpriv->ao_value[i] & 0xff;
660 msb = (devpriv->ao_value[i] >> 8) & 0xff;
661 devpriv->write_byte(lsb, dev->iobase + DAC_LSB_REG(i));
662 devpriv->write_byte(msb, dev->iobase + DAC_MSB_REG(i));
665 s->type = COMEDI_SUBD_UNUSED;
669 s = dev->subdevices + 2;
670 /* if board uses io memory we have to give a custom callback
671 * function to the 8255 driver */
672 if (thisboard->memory_mapped_io)
673 subdev_8255_init(dev, s, labpc_dio_mem_callback,
674 (unsigned long)(dev->iobase + DIO_BASE_REG));
676 subdev_8255_init(dev, s, NULL, dev->iobase + DIO_BASE_REG);
678 /* calibration subdevices for boards that have one */
679 s = dev->subdevices + 3;
680 if (thisboard->register_layout == labpc_1200_layout) {
681 s->type = COMEDI_SUBD_CALIB;
682 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
685 s->insn_read = labpc_calib_read_insn;
686 s->insn_write = labpc_calib_write_insn;
688 for (i = 0; i < s->n_chan; i++)
689 write_caldac(dev, i, s->maxdata / 2);
691 s->type = COMEDI_SUBD_UNUSED;
694 s = dev->subdevices + 4;
695 if (thisboard->register_layout == labpc_1200_layout) {
696 s->type = COMEDI_SUBD_MEMORY;
697 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
698 s->n_chan = EEPROM_SIZE;
700 s->insn_read = labpc_eeprom_read_insn;
701 s->insn_write = labpc_eeprom_write_insn;
703 for (i = 0; i < EEPROM_SIZE; i++)
704 devpriv->eeprom_data[i] = labpc_eeprom_read(dev, i);
706 printk(KERN_ERR " eeprom:");
707 for (i = 0; i < EEPROM_SIZE; i++)
708 printk(" %i:0x%x ", i, devpriv->eeprom_data[i]);
712 s->type = COMEDI_SUBD_UNUSED;
716 EXPORT_SYMBOL_GPL(labpc_common_attach);
718 static int labpc_attach(struct comedi_device *dev, struct comedi_devconfig *it)
720 unsigned long iobase = 0;
721 unsigned int irq = 0;
722 unsigned int dma_chan = 0;
723 #ifdef CONFIG_COMEDI_PCI
727 /* allocate and initialize dev->private */
728 if (alloc_private(dev, sizeof(struct labpc_private)) < 0)
731 /* get base address, irq etc. based on bustype */
732 switch (thisboard->bustype) {
734 #ifdef CONFIG_ISA_DMA_API
735 iobase = it->options[0];
736 irq = it->options[1];
737 dma_chan = it->options[2];
739 printk(KERN_ERR " this driver has not been built with ISA DMA "
745 #ifdef CONFIG_COMEDI_PCI
746 retval = labpc_find_device(dev, it->options[0], it->options[1]);
749 retval = mite_setup(devpriv->mite);
752 iobase = (unsigned long)devpriv->mite->daq_io_addr;
753 irq = mite_irq(devpriv->mite);
755 printk(KERN_ERR " this driver has not been built with PCI "
762 (" this driver does not support pcmcia cards, use ni_labpc_cs.o\n");
766 printk(KERN_ERR "bug! couldn't determine board type\n");
771 return labpc_common_attach(dev, iobase, irq, dma_chan);
774 /* adapted from ni_pcimio for finding mite based boards (pc-1200) */
775 #ifdef CONFIG_COMEDI_PCI
776 static int labpc_find_device(struct comedi_device *dev, int bus, int slot)
778 struct mite_struct *mite;
780 for (mite = mite_devices; mite; mite = mite->next) {
783 /* if bus/slot are specified then make sure we have the right bus/slot */
785 if (bus != mite->pcidev->bus->number
786 || slot != PCI_SLOT(mite->pcidev->devfn))
789 for (i = 0; i < driver_labpc.num_names; i++) {
790 if (labpc_boards[i].bustype != pci_bustype)
792 if (mite_device_id(mite) == labpc_boards[i].device_id) {
793 devpriv->mite = mite;
794 /* fixup board pointer, in case we were using the dummy "ni_labpc" entry */
795 dev->board_ptr = &labpc_boards[i];
800 printk(KERN_ERR "no device found\n");
806 int labpc_common_detach(struct comedi_device *dev)
808 printk(KERN_ERR "comedi%d: ni_labpc: detach\n", dev->minor);
811 subdev_8255_cleanup(dev, dev->subdevices + 2);
813 #ifdef CONFIG_ISA_DMA_API
814 /* only free stuff if it has been allocated by _attach */
815 kfree(devpriv->dma_buffer);
816 if (devpriv->dma_chan)
817 free_dma(devpriv->dma_chan);
820 free_irq(dev->irq, dev);
821 if (thisboard->bustype == isa_bustype && dev->iobase)
822 release_region(dev->iobase, LABPC_SIZE);
823 #ifdef CONFIG_COMEDI_PCI
825 mite_unsetup(devpriv->mite);
830 EXPORT_SYMBOL_GPL(labpc_common_detach);
832 static void labpc_clear_adc_fifo(const struct comedi_device *dev)
834 devpriv->write_byte(0x1, dev->iobase + ADC_CLEAR_REG);
835 devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
836 devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
839 static int labpc_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
843 spin_lock_irqsave(&dev->spinlock, flags);
844 devpriv->command2_bits &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT;
845 devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
846 spin_unlock_irqrestore(&dev->spinlock, flags);
848 devpriv->command3_bits = 0;
849 devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
854 static enum scan_mode labpc_ai_scan_mode(const struct comedi_cmd *cmd)
856 if (cmd->chanlist_len == 1)
857 return MODE_SINGLE_CHAN;
859 /* chanlist may be NULL during cmdtest. */
860 if (cmd->chanlist == NULL)
861 return MODE_MULT_CHAN_UP;
863 if (CR_CHAN(cmd->chanlist[0]) == CR_CHAN(cmd->chanlist[1]))
864 return MODE_SINGLE_CHAN_INTERVAL;
866 if (CR_CHAN(cmd->chanlist[0]) < CR_CHAN(cmd->chanlist[1]))
867 return MODE_MULT_CHAN_UP;
869 if (CR_CHAN(cmd->chanlist[0]) > CR_CHAN(cmd->chanlist[1]))
870 return MODE_MULT_CHAN_DOWN;
872 printk(KERN_ERR "ni_labpc: bug! this should never happen\n");
877 static int labpc_ai_chanlist_invalid(const struct comedi_device *dev,
878 const struct comedi_cmd *cmd)
880 int mode, channel, range, aref, i;
882 if (cmd->chanlist == NULL)
885 mode = labpc_ai_scan_mode(cmd);
887 if (mode == MODE_SINGLE_CHAN)
890 if (mode == MODE_SINGLE_CHAN_INTERVAL) {
891 if (cmd->chanlist_len > 0xff) {
893 "ni_labpc: chanlist too long for single channel interval mode\n");
898 channel = CR_CHAN(cmd->chanlist[0]);
899 range = CR_RANGE(cmd->chanlist[0]);
900 aref = CR_AREF(cmd->chanlist[0]);
902 for (i = 0; i < cmd->chanlist_len; i++) {
905 case MODE_SINGLE_CHAN_INTERVAL:
906 if (CR_CHAN(cmd->chanlist[i]) != channel) {
908 "channel scanning order specified in chanlist is not supported by hardware.\n");
912 case MODE_MULT_CHAN_UP:
913 if (CR_CHAN(cmd->chanlist[i]) != i) {
915 "channel scanning order specified in chanlist is not supported by hardware.\n");
919 case MODE_MULT_CHAN_DOWN:
920 if (CR_CHAN(cmd->chanlist[i]) !=
921 cmd->chanlist_len - i - 1) {
923 "channel scanning order specified in chanlist is not supported by hardware.\n");
928 printk(KERN_ERR "ni_labpc: bug! in chanlist check\n");
933 if (CR_RANGE(cmd->chanlist[i]) != range) {
935 "entries in chanlist must all have the same range\n");
939 if (CR_AREF(cmd->chanlist[i]) != aref) {
941 "entries in chanlist must all have the same reference\n");
949 static int labpc_use_continuous_mode(const struct comedi_cmd *cmd)
951 if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN)
954 if (cmd->scan_begin_src == TRIG_FOLLOW)
960 static unsigned int labpc_ai_convert_period(const struct comedi_cmd *cmd)
962 if (cmd->convert_src != TRIG_TIMER)
965 if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN &&
966 cmd->scan_begin_src == TRIG_TIMER)
967 return cmd->scan_begin_arg;
969 return cmd->convert_arg;
972 static void labpc_set_ai_convert_period(struct comedi_cmd *cmd, unsigned int ns)
974 if (cmd->convert_src != TRIG_TIMER)
977 if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN &&
978 cmd->scan_begin_src == TRIG_TIMER) {
979 cmd->scan_begin_arg = ns;
980 if (cmd->convert_arg > cmd->scan_begin_arg)
981 cmd->convert_arg = cmd->scan_begin_arg;
983 cmd->convert_arg = ns;
986 static unsigned int labpc_ai_scan_period(const struct comedi_cmd *cmd)
988 if (cmd->scan_begin_src != TRIG_TIMER)
991 if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN &&
992 cmd->convert_src == TRIG_TIMER)
995 return cmd->scan_begin_arg;
998 static void labpc_set_ai_scan_period(struct comedi_cmd *cmd, unsigned int ns)
1000 if (cmd->scan_begin_src != TRIG_TIMER)
1003 if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN &&
1004 cmd->convert_src == TRIG_TIMER)
1007 cmd->scan_begin_arg = ns;
1010 static int labpc_ai_cmdtest(struct comedi_device *dev,
1011 struct comedi_subdevice *s, struct comedi_cmd *cmd)
1017 /* step 1: make sure trigger sources are trivially valid */
1019 tmp = cmd->start_src;
1020 cmd->start_src &= TRIG_NOW | TRIG_EXT;
1021 if (!cmd->start_src || tmp != cmd->start_src)
1024 tmp = cmd->scan_begin_src;
1025 cmd->scan_begin_src &= TRIG_TIMER | TRIG_FOLLOW | TRIG_EXT;
1026 if (!cmd->scan_begin_src || tmp != cmd->scan_begin_src)
1029 tmp = cmd->convert_src;
1030 cmd->convert_src &= TRIG_TIMER | TRIG_EXT;
1031 if (!cmd->convert_src || tmp != cmd->convert_src)
1034 tmp = cmd->scan_end_src;
1035 cmd->scan_end_src &= TRIG_COUNT;
1036 if (!cmd->scan_end_src || tmp != cmd->scan_end_src)
1039 tmp = cmd->stop_src;
1040 stop_mask = TRIG_COUNT | TRIG_NONE;
1041 if (thisboard->register_layout == labpc_1200_layout)
1042 stop_mask |= TRIG_EXT;
1043 cmd->stop_src &= stop_mask;
1044 if (!cmd->stop_src || tmp != cmd->stop_src)
1050 /* step 2: make sure trigger sources are unique and mutually compatible */
1052 if (cmd->start_src != TRIG_NOW && cmd->start_src != TRIG_EXT)
1054 if (cmd->scan_begin_src != TRIG_TIMER &&
1055 cmd->scan_begin_src != TRIG_FOLLOW &&
1056 cmd->scan_begin_src != TRIG_EXT)
1058 if (cmd->convert_src != TRIG_TIMER && cmd->convert_src != TRIG_EXT)
1060 if (cmd->stop_src != TRIG_COUNT &&
1061 cmd->stop_src != TRIG_EXT && cmd->stop_src != TRIG_NONE)
1064 /* can't have external stop and start triggers at once */
1065 if (cmd->start_src == TRIG_EXT && cmd->stop_src == TRIG_EXT)
1071 /* step 3: make sure arguments are trivially compatible */
1073 if (cmd->start_arg == TRIG_NOW && cmd->start_arg != 0) {
1078 if (!cmd->chanlist_len)
1081 if (cmd->scan_end_arg != cmd->chanlist_len) {
1082 cmd->scan_end_arg = cmd->chanlist_len;
1086 if (cmd->convert_src == TRIG_TIMER) {
1087 if (cmd->convert_arg < thisboard->ai_speed) {
1088 cmd->convert_arg = thisboard->ai_speed;
1092 /* make sure scan timing is not too fast */
1093 if (cmd->scan_begin_src == TRIG_TIMER) {
1094 if (cmd->convert_src == TRIG_TIMER &&
1095 cmd->scan_begin_arg <
1096 cmd->convert_arg * cmd->chanlist_len) {
1097 cmd->scan_begin_arg =
1098 cmd->convert_arg * cmd->chanlist_len;
1101 if (cmd->scan_begin_arg <
1102 thisboard->ai_speed * cmd->chanlist_len) {
1103 cmd->scan_begin_arg =
1104 thisboard->ai_speed * cmd->chanlist_len;
1109 switch (cmd->stop_src) {
1111 if (!cmd->stop_arg) {
1117 if (cmd->stop_arg != 0) {
1123 * TRIG_EXT doesn't care since it doesn't
1124 * trigger off a numbered channel
1133 /* step 4: fix up any arguments */
1135 tmp = cmd->convert_arg;
1136 tmp2 = cmd->scan_begin_arg;
1137 labpc_adc_timing(dev, cmd);
1138 if (tmp != cmd->convert_arg || tmp2 != cmd->scan_begin_arg)
1144 if (labpc_ai_chanlist_invalid(dev, cmd))
1150 static int labpc_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
1152 int channel, range, aref;
1153 #ifdef CONFIG_ISA_DMA_API
1154 unsigned long irq_flags;
1157 struct comedi_async *async = s->async;
1158 struct comedi_cmd *cmd = &async->cmd;
1159 enum transfer_type xfer;
1160 unsigned long flags;
1163 comedi_error(dev, "no irq assigned, cannot perform command");
1167 range = CR_RANGE(cmd->chanlist[0]);
1168 aref = CR_AREF(cmd->chanlist[0]);
1170 /* make sure board is disabled before setting up acquisition */
1171 spin_lock_irqsave(&dev->spinlock, flags);
1172 devpriv->command2_bits &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT;
1173 devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1174 spin_unlock_irqrestore(&dev->spinlock, flags);
1176 devpriv->command3_bits = 0;
1177 devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
1179 /* initialize software conversion count */
1180 if (cmd->stop_src == TRIG_COUNT)
1181 devpriv->count = cmd->stop_arg * cmd->chanlist_len;
1183 /* setup hardware conversion counter */
1184 if (cmd->stop_src == TRIG_EXT) {
1186 * load counter a1 with count of 3
1187 * (pc+ manual says this is minimum allowed) using mode 0
1189 ret = labpc_counter_load(dev, dev->iobase + COUNTER_A_BASE_REG,
1192 comedi_error(dev, "error loading counter a1");
1196 * otherwise, just put a1 in mode 0
1197 * with no count to set its output low
1199 devpriv->write_byte(INIT_A1_BITS,
1200 dev->iobase + COUNTER_A_CONTROL_REG);
1202 #ifdef CONFIG_ISA_DMA_API
1203 /* figure out what method we will use to transfer data */
1204 if (devpriv->dma_chan && /* need a dma channel allocated */
1206 * dma unsafe at RT priority,
1207 * and too much setup time for TRIG_WAKE_EOS for
1209 (cmd->flags & (TRIG_WAKE_EOS | TRIG_RT)) == 0 &&
1210 /* only available on the isa boards */
1211 thisboard->bustype == isa_bustype) {
1212 xfer = isa_dma_transfer;
1213 /* pc-plus has no fifo-half full interrupt */
1216 if (thisboard->register_layout == labpc_1200_layout &&
1217 /* wake-end-of-scan should interrupt on fifo not empty */
1218 (cmd->flags & TRIG_WAKE_EOS) == 0 &&
1219 /* make sure we are taking more than just a few points */
1220 (cmd->stop_src != TRIG_COUNT || devpriv->count > 256)) {
1221 xfer = fifo_half_full_transfer;
1223 xfer = fifo_not_empty_transfer;
1224 devpriv->current_transfer = xfer;
1226 /* setup command6 register for 1200 boards */
1227 if (thisboard->register_layout == labpc_1200_layout) {
1228 /* reference inputs to ground or common? */
1229 if (aref != AREF_GROUND)
1230 devpriv->command6_bits |= ADC_COMMON_BIT;
1232 devpriv->command6_bits &= ~ADC_COMMON_BIT;
1233 /* bipolar or unipolar range? */
1234 if (thisboard->ai_range_is_unipolar[range])
1235 devpriv->command6_bits |= ADC_UNIP_BIT;
1237 devpriv->command6_bits &= ~ADC_UNIP_BIT;
1238 /* interrupt on fifo half full? */
1239 if (xfer == fifo_half_full_transfer)
1240 devpriv->command6_bits |= ADC_FHF_INTR_EN_BIT;
1242 devpriv->command6_bits &= ~ADC_FHF_INTR_EN_BIT;
1243 /* enable interrupt on counter a1 terminal count? */
1244 if (cmd->stop_src == TRIG_EXT)
1245 devpriv->command6_bits |= A1_INTR_EN_BIT;
1247 devpriv->command6_bits &= ~A1_INTR_EN_BIT;
1248 /* are we scanning up or down through channels? */
1249 if (labpc_ai_scan_mode(cmd) == MODE_MULT_CHAN_UP)
1250 devpriv->command6_bits |= ADC_SCAN_UP_BIT;
1252 devpriv->command6_bits &= ~ADC_SCAN_UP_BIT;
1253 /* write to register */
1254 devpriv->write_byte(devpriv->command6_bits,
1255 dev->iobase + COMMAND6_REG);
1258 /* setup channel list, etc (command1 register) */
1259 devpriv->command1_bits = 0;
1260 if (labpc_ai_scan_mode(cmd) == MODE_MULT_CHAN_UP)
1261 channel = CR_CHAN(cmd->chanlist[cmd->chanlist_len - 1]);
1263 channel = CR_CHAN(cmd->chanlist[0]);
1264 /* munge channel bits for differential / scan disabled mode */
1265 if (labpc_ai_scan_mode(cmd) != MODE_SINGLE_CHAN && aref == AREF_DIFF)
1267 devpriv->command1_bits |= ADC_CHAN_BITS(channel);
1268 devpriv->command1_bits |= thisboard->ai_range_code[range];
1269 devpriv->write_byte(devpriv->command1_bits, dev->iobase + COMMAND1_REG);
1270 /* manual says to set scan enable bit on second pass */
1271 if (labpc_ai_scan_mode(cmd) == MODE_MULT_CHAN_UP ||
1272 labpc_ai_scan_mode(cmd) == MODE_MULT_CHAN_DOWN) {
1273 devpriv->command1_bits |= ADC_SCAN_EN_BIT;
1274 /* need a brief delay before enabling scan, or scan
1275 * list will get screwed when you switch
1276 * between scan up to scan down mode - dunno why */
1278 devpriv->write_byte(devpriv->command1_bits,
1279 dev->iobase + COMMAND1_REG);
1281 /* setup any external triggering/pacing (command4 register) */
1282 devpriv->command4_bits = 0;
1283 if (cmd->convert_src != TRIG_EXT)
1284 devpriv->command4_bits |= EXT_CONVERT_DISABLE_BIT;
1285 /* XXX should discard first scan when using interval scanning
1286 * since manual says it is not synced with scan clock */
1287 if (labpc_use_continuous_mode(cmd) == 0) {
1288 devpriv->command4_bits |= INTERVAL_SCAN_EN_BIT;
1289 if (cmd->scan_begin_src == TRIG_EXT)
1290 devpriv->command4_bits |= EXT_SCAN_EN_BIT;
1292 /* single-ended/differential */
1293 if (aref == AREF_DIFF)
1294 devpriv->command4_bits |= ADC_DIFF_BIT;
1295 devpriv->write_byte(devpriv->command4_bits, dev->iobase + COMMAND4_REG);
1297 devpriv->write_byte(cmd->chanlist_len,
1298 dev->iobase + INTERVAL_COUNT_REG);
1300 devpriv->write_byte(INTERVAL_LOAD_BITS,
1301 dev->iobase + INTERVAL_LOAD_REG);
1303 if (cmd->convert_src == TRIG_TIMER || cmd->scan_begin_src == TRIG_TIMER) {
1305 labpc_adc_timing(dev, cmd);
1306 /* load counter b0 in mode 3 */
1307 ret = labpc_counter_load(dev, dev->iobase + COUNTER_B_BASE_REG,
1308 0, devpriv->divisor_b0, 3);
1310 comedi_error(dev, "error loading counter b0");
1314 /* set up conversion pacing */
1315 if (labpc_ai_convert_period(cmd)) {
1316 /* load counter a0 in mode 2 */
1317 ret = labpc_counter_load(dev, dev->iobase + COUNTER_A_BASE_REG,
1318 0, devpriv->divisor_a0, 2);
1320 comedi_error(dev, "error loading counter a0");
1324 devpriv->write_byte(INIT_A0_BITS,
1325 dev->iobase + COUNTER_A_CONTROL_REG);
1327 /* set up scan pacing */
1328 if (labpc_ai_scan_period(cmd)) {
1329 /* load counter b1 in mode 2 */
1330 ret = labpc_counter_load(dev, dev->iobase + COUNTER_B_BASE_REG,
1331 1, devpriv->divisor_b1, 2);
1333 comedi_error(dev, "error loading counter b1");
1338 labpc_clear_adc_fifo(dev);
1340 #ifdef CONFIG_ISA_DMA_API
1341 /* set up dma transfer */
1342 if (xfer == isa_dma_transfer) {
1343 irq_flags = claim_dma_lock();
1344 disable_dma(devpriv->dma_chan);
1345 /* clear flip-flop to make sure 2-byte registers for
1346 * count and address get set correctly */
1347 clear_dma_ff(devpriv->dma_chan);
1348 set_dma_addr(devpriv->dma_chan,
1349 virt_to_bus(devpriv->dma_buffer));
1350 /* set appropriate size of transfer */
1351 devpriv->dma_transfer_size = labpc_suggest_transfer_size(*cmd);
1352 if (cmd->stop_src == TRIG_COUNT &&
1353 devpriv->count * sample_size < devpriv->dma_transfer_size) {
1354 devpriv->dma_transfer_size =
1355 devpriv->count * sample_size;
1357 set_dma_count(devpriv->dma_chan, devpriv->dma_transfer_size);
1358 enable_dma(devpriv->dma_chan);
1359 release_dma_lock(irq_flags);
1360 /* enable board's dma */
1361 devpriv->command3_bits |= DMA_EN_BIT | DMATC_INTR_EN_BIT;
1363 devpriv->command3_bits &= ~DMA_EN_BIT & ~DMATC_INTR_EN_BIT;
1366 /* enable error interrupts */
1367 devpriv->command3_bits |= ERR_INTR_EN_BIT;
1368 /* enable fifo not empty interrupt? */
1369 if (xfer == fifo_not_empty_transfer)
1370 devpriv->command3_bits |= ADC_FNE_INTR_EN_BIT;
1372 devpriv->command3_bits &= ~ADC_FNE_INTR_EN_BIT;
1373 devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
1375 /* startup acquisition */
1378 /* use 2 cascaded counters for pacing */
1379 spin_lock_irqsave(&dev->spinlock, flags);
1380 devpriv->command2_bits |= CASCADE_BIT;
1381 switch (cmd->start_src) {
1383 devpriv->command2_bits |= HWTRIG_BIT;
1384 devpriv->command2_bits &= ~PRETRIG_BIT & ~SWTRIG_BIT;
1387 devpriv->command2_bits |= SWTRIG_BIT;
1388 devpriv->command2_bits &= ~PRETRIG_BIT & ~HWTRIG_BIT;
1391 comedi_error(dev, "bug with start_src");
1395 switch (cmd->stop_src) {
1397 devpriv->command2_bits |= HWTRIG_BIT | PRETRIG_BIT;
1403 comedi_error(dev, "bug with stop_src");
1406 devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1407 spin_unlock_irqrestore(&dev->spinlock, flags);
1412 /* interrupt service routine */
1413 static irqreturn_t labpc_interrupt(int irq, void *d)
1415 struct comedi_device *dev = d;
1416 struct comedi_subdevice *s = dev->read_subdev;
1417 struct comedi_async *async;
1418 struct comedi_cmd *cmd;
1420 if (dev->attached == 0) {
1421 comedi_error(dev, "premature interrupt");
1429 /* read board status */
1430 devpriv->status1_bits = devpriv->read_byte(dev->iobase + STATUS1_REG);
1431 if (thisboard->register_layout == labpc_1200_layout)
1432 devpriv->status2_bits =
1433 devpriv->read_byte(dev->iobase + STATUS2_REG);
1435 if ((devpriv->status1_bits & (DMATC_BIT | TIMER_BIT | OVERFLOW_BIT |
1436 OVERRUN_BIT | DATA_AVAIL_BIT)) == 0
1437 && (devpriv->status2_bits & A1_TC_BIT) == 0
1438 && (devpriv->status2_bits & FNHF_BIT)) {
1442 if (devpriv->status1_bits & OVERRUN_BIT) {
1443 /* clear error interrupt */
1444 devpriv->write_byte(0x1, dev->iobase + ADC_CLEAR_REG);
1445 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1446 comedi_event(dev, s);
1447 comedi_error(dev, "overrun");
1451 #ifdef CONFIG_ISA_DMA_API
1452 if (devpriv->current_transfer == isa_dma_transfer) {
1454 * if a dma terminal count of external stop trigger
1457 if (devpriv->status1_bits & DMATC_BIT ||
1458 (thisboard->register_layout == labpc_1200_layout
1459 && devpriv->status2_bits & A1_TC_BIT)) {
1460 handle_isa_dma(dev);
1464 labpc_drain_fifo(dev);
1466 if (devpriv->status1_bits & TIMER_BIT) {
1467 comedi_error(dev, "handled timer interrupt?");
1469 devpriv->write_byte(0x1, dev->iobase + TIMER_CLEAR_REG);
1472 if (devpriv->status1_bits & OVERFLOW_BIT) {
1473 /* clear error interrupt */
1474 devpriv->write_byte(0x1, dev->iobase + ADC_CLEAR_REG);
1475 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1476 comedi_event(dev, s);
1477 comedi_error(dev, "overflow");
1480 /* handle external stop trigger */
1481 if (cmd->stop_src == TRIG_EXT) {
1482 if (devpriv->status2_bits & A1_TC_BIT) {
1483 labpc_drain_dregs(dev);
1484 labpc_cancel(dev, s);
1485 async->events |= COMEDI_CB_EOA;
1489 /* TRIG_COUNT end of acquisition */
1490 if (cmd->stop_src == TRIG_COUNT) {
1491 if (devpriv->count == 0) {
1492 labpc_cancel(dev, s);
1493 async->events |= COMEDI_CB_EOA;
1497 comedi_event(dev, s);
1501 /* read all available samples from ai fifo */
1502 static int labpc_drain_fifo(struct comedi_device *dev)
1504 unsigned int lsb, msb;
1506 struct comedi_async *async = dev->read_subdev->async;
1507 const int timeout = 10000;
1510 devpriv->status1_bits = devpriv->read_byte(dev->iobase + STATUS1_REG);
1512 for (i = 0; (devpriv->status1_bits & DATA_AVAIL_BIT) && i < timeout;
1514 /* quit if we have all the data we want */
1515 if (async->cmd.stop_src == TRIG_COUNT) {
1516 if (devpriv->count == 0)
1520 lsb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1521 msb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1522 data = (msb << 8) | lsb;
1523 cfc_write_to_buffer(dev->read_subdev, data);
1524 devpriv->status1_bits =
1525 devpriv->read_byte(dev->iobase + STATUS1_REG);
1528 comedi_error(dev, "ai timeout, fifo never empties");
1529 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1536 #ifdef CONFIG_ISA_DMA_API
1537 static void labpc_drain_dma(struct comedi_device *dev)
1539 struct comedi_subdevice *s = dev->read_subdev;
1540 struct comedi_async *async = s->async;
1542 unsigned long flags;
1543 unsigned int max_points, num_points, residue, leftover;
1546 status = devpriv->status1_bits;
1548 flags = claim_dma_lock();
1549 disable_dma(devpriv->dma_chan);
1550 /* clear flip-flop to make sure 2-byte registers for
1551 * count and address get set correctly */
1552 clear_dma_ff(devpriv->dma_chan);
1554 /* figure out how many points to read */
1555 max_points = devpriv->dma_transfer_size / sample_size;
1556 /* residue is the number of points left to be done on the dma
1557 * transfer. It should always be zero at this point unless
1558 * the stop_src is set to external triggering.
1560 residue = get_dma_residue(devpriv->dma_chan) / sample_size;
1561 num_points = max_points - residue;
1562 if (devpriv->count < num_points && async->cmd.stop_src == TRIG_COUNT)
1563 num_points = devpriv->count;
1565 /* figure out how many points will be stored next time */
1567 if (async->cmd.stop_src != TRIG_COUNT) {
1568 leftover = devpriv->dma_transfer_size / sample_size;
1569 } else if (devpriv->count > num_points) {
1570 leftover = devpriv->count - num_points;
1571 if (leftover > max_points)
1572 leftover = max_points;
1575 /* write data to comedi buffer */
1576 for (i = 0; i < num_points; i++)
1577 cfc_write_to_buffer(s, devpriv->dma_buffer[i]);
1579 if (async->cmd.stop_src == TRIG_COUNT)
1580 devpriv->count -= num_points;
1582 /* set address and count for next transfer */
1583 set_dma_addr(devpriv->dma_chan, virt_to_bus(devpriv->dma_buffer));
1584 set_dma_count(devpriv->dma_chan, leftover * sample_size);
1585 release_dma_lock(flags);
1587 async->events |= COMEDI_CB_BLOCK;
1590 static void handle_isa_dma(struct comedi_device *dev)
1592 labpc_drain_dma(dev);
1594 enable_dma(devpriv->dma_chan);
1596 /* clear dma tc interrupt */
1597 devpriv->write_byte(0x1, dev->iobase + DMATC_CLEAR_REG);
1601 /* makes sure all data acquired by board is transferred to comedi (used
1602 * when acquisition is terminated by stop_src == TRIG_EXT). */
1603 static void labpc_drain_dregs(struct comedi_device *dev)
1605 #ifdef CONFIG_ISA_DMA_API
1606 if (devpriv->current_transfer == isa_dma_transfer)
1607 labpc_drain_dma(dev);
1610 labpc_drain_fifo(dev);
1613 static int labpc_ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
1614 struct comedi_insn *insn, unsigned int *data)
1620 unsigned long flags;
1622 /* disable timed conversions */
1623 spin_lock_irqsave(&dev->spinlock, flags);
1624 devpriv->command2_bits &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT;
1625 devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1626 spin_unlock_irqrestore(&dev->spinlock, flags);
1628 /* disable interrupt generation and dma */
1629 devpriv->command3_bits = 0;
1630 devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
1632 /* set gain and channel */
1633 devpriv->command1_bits = 0;
1634 chan = CR_CHAN(insn->chanspec);
1635 range = CR_RANGE(insn->chanspec);
1636 devpriv->command1_bits |= thisboard->ai_range_code[range];
1637 /* munge channel bits for differential/scan disabled mode */
1638 if (CR_AREF(insn->chanspec) == AREF_DIFF)
1640 devpriv->command1_bits |= ADC_CHAN_BITS(chan);
1641 devpriv->write_byte(devpriv->command1_bits, dev->iobase + COMMAND1_REG);
1643 /* setup command6 register for 1200 boards */
1644 if (thisboard->register_layout == labpc_1200_layout) {
1645 /* reference inputs to ground or common? */
1646 if (CR_AREF(insn->chanspec) != AREF_GROUND)
1647 devpriv->command6_bits |= ADC_COMMON_BIT;
1649 devpriv->command6_bits &= ~ADC_COMMON_BIT;
1650 /* bipolar or unipolar range? */
1651 if (thisboard->ai_range_is_unipolar[range])
1652 devpriv->command6_bits |= ADC_UNIP_BIT;
1654 devpriv->command6_bits &= ~ADC_UNIP_BIT;
1655 /* don't interrupt on fifo half full */
1656 devpriv->command6_bits &= ~ADC_FHF_INTR_EN_BIT;
1657 /* don't enable interrupt on counter a1 terminal count? */
1658 devpriv->command6_bits &= ~A1_INTR_EN_BIT;
1659 /* write to register */
1660 devpriv->write_byte(devpriv->command6_bits,
1661 dev->iobase + COMMAND6_REG);
1663 /* setup command4 register */
1664 devpriv->command4_bits = 0;
1665 devpriv->command4_bits |= EXT_CONVERT_DISABLE_BIT;
1666 /* single-ended/differential */
1667 if (CR_AREF(insn->chanspec) == AREF_DIFF)
1668 devpriv->command4_bits |= ADC_DIFF_BIT;
1669 devpriv->write_byte(devpriv->command4_bits, dev->iobase + COMMAND4_REG);
1672 * initialize pacer counter output to make sure it doesn't
1673 * cause any problems
1675 devpriv->write_byte(INIT_A0_BITS, dev->iobase + COUNTER_A_CONTROL_REG);
1677 labpc_clear_adc_fifo(dev);
1679 for (n = 0; n < insn->n; n++) {
1680 /* trigger conversion */
1681 devpriv->write_byte(0x1, dev->iobase + ADC_CONVERT_REG);
1683 for (i = 0; i < timeout; i++) {
1684 if (devpriv->read_byte(dev->iobase +
1685 STATUS1_REG) & DATA_AVAIL_BIT)
1690 comedi_error(dev, "timeout");
1693 lsb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1694 msb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1695 data[n] = (msb << 8) | lsb;
1701 /* analog output insn */
1702 static int labpc_ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s,
1703 struct comedi_insn *insn, unsigned int *data)
1706 unsigned long flags;
1709 channel = CR_CHAN(insn->chanspec);
1711 /* turn off pacing of analog output channel */
1712 /* note: hardware bug in daqcard-1200 means pacing cannot
1713 * be independently enabled/disabled for its the two channels */
1714 spin_lock_irqsave(&dev->spinlock, flags);
1715 devpriv->command2_bits &= ~DAC_PACED_BIT(channel);
1716 devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1717 spin_unlock_irqrestore(&dev->spinlock, flags);
1720 if (thisboard->register_layout == labpc_1200_layout) {
1721 range = CR_RANGE(insn->chanspec);
1722 if (range & AO_RANGE_IS_UNIPOLAR)
1723 devpriv->command6_bits |= DAC_UNIP_BIT(channel);
1725 devpriv->command6_bits &= ~DAC_UNIP_BIT(channel);
1726 /* write to register */
1727 devpriv->write_byte(devpriv->command6_bits,
1728 dev->iobase + COMMAND6_REG);
1731 lsb = data[0] & 0xff;
1732 msb = (data[0] >> 8) & 0xff;
1733 devpriv->write_byte(lsb, dev->iobase + DAC_LSB_REG(channel));
1734 devpriv->write_byte(msb, dev->iobase + DAC_MSB_REG(channel));
1736 /* remember value for readback */
1737 devpriv->ao_value[channel] = data[0];
1742 /* analog output readback insn */
1743 static int labpc_ao_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
1744 struct comedi_insn *insn, unsigned int *data)
1746 data[0] = devpriv->ao_value[CR_CHAN(insn->chanspec)];
1751 static int labpc_calib_read_insn(struct comedi_device *dev,
1752 struct comedi_subdevice *s,
1753 struct comedi_insn *insn, unsigned int *data)
1755 data[0] = devpriv->caldac[CR_CHAN(insn->chanspec)];
1760 static int labpc_calib_write_insn(struct comedi_device *dev,
1761 struct comedi_subdevice *s,
1762 struct comedi_insn *insn, unsigned int *data)
1764 int channel = CR_CHAN(insn->chanspec);
1766 write_caldac(dev, channel, data[0]);
1770 static int labpc_eeprom_read_insn(struct comedi_device *dev,
1771 struct comedi_subdevice *s,
1772 struct comedi_insn *insn, unsigned int *data)
1774 data[0] = devpriv->eeprom_data[CR_CHAN(insn->chanspec)];
1779 static int labpc_eeprom_write_insn(struct comedi_device *dev,
1780 struct comedi_subdevice *s,
1781 struct comedi_insn *insn, unsigned int *data)
1783 int channel = CR_CHAN(insn->chanspec);
1786 /* only allow writes to user area of eeprom */
1787 if (channel < 16 || channel > 127) {
1789 ("eeprom writes are only allowed to channels 16 through 127 (the pointer and user areas)");
1793 ret = labpc_eeprom_write(dev, channel, data[0]);
1800 #ifdef CONFIG_ISA_DMA_API
1801 /* utility function that suggests a dma transfer size in bytes */
1802 static unsigned int labpc_suggest_transfer_size(struct comedi_cmd cmd)
1807 if (cmd.convert_src == TRIG_TIMER)
1808 freq = 1000000000 / cmd.convert_arg;
1809 /* return some default value */
1813 /* make buffer fill in no more than 1/3 second */
1814 size = (freq / 3) * sample_size;
1816 /* set a minimum and maximum size allowed */
1817 if (size > dma_buffer_size)
1818 size = dma_buffer_size - dma_buffer_size % sample_size;
1819 else if (size < sample_size)
1826 /* figures out what counter values to use based on command */
1827 static void labpc_adc_timing(struct comedi_device *dev, struct comedi_cmd *cmd)
1829 /* max value for 16 bit counter in mode 2 */
1830 const int max_counter_value = 0x10000;
1831 /* min value for 16 bit counter in mode 2 */
1832 const int min_counter_value = 2;
1833 unsigned int base_period;
1836 * if both convert and scan triggers are TRIG_TIMER, then they
1837 * both rely on counter b0
1839 if (labpc_ai_convert_period(cmd) && labpc_ai_scan_period(cmd)) {
1841 * pick the lowest b0 divisor value we can (for maximum input
1842 * clock speed on convert and scan counters)
1844 devpriv->divisor_b0 = (labpc_ai_scan_period(cmd) - 1) /
1845 (LABPC_TIMER_BASE * max_counter_value) + 1;
1846 if (devpriv->divisor_b0 < min_counter_value)
1847 devpriv->divisor_b0 = min_counter_value;
1848 if (devpriv->divisor_b0 > max_counter_value)
1849 devpriv->divisor_b0 = max_counter_value;
1851 base_period = LABPC_TIMER_BASE * devpriv->divisor_b0;
1853 /* set a0 for conversion frequency and b1 for scan frequency */
1854 switch (cmd->flags & TRIG_ROUND_MASK) {
1856 case TRIG_ROUND_NEAREST:
1857 devpriv->divisor_a0 =
1858 (labpc_ai_convert_period(cmd) +
1859 (base_period / 2)) / base_period;
1860 devpriv->divisor_b1 =
1861 (labpc_ai_scan_period(cmd) +
1862 (base_period / 2)) / base_period;
1865 devpriv->divisor_a0 =
1866 (labpc_ai_convert_period(cmd) + (base_period -
1868 devpriv->divisor_b1 =
1869 (labpc_ai_scan_period(cmd) + (base_period -
1872 case TRIG_ROUND_DOWN:
1873 devpriv->divisor_a0 =
1874 labpc_ai_convert_period(cmd) / base_period;
1875 devpriv->divisor_b1 =
1876 labpc_ai_scan_period(cmd) / base_period;
1879 /* make sure a0 and b1 values are acceptable */
1880 if (devpriv->divisor_a0 < min_counter_value)
1881 devpriv->divisor_a0 = min_counter_value;
1882 if (devpriv->divisor_a0 > max_counter_value)
1883 devpriv->divisor_a0 = max_counter_value;
1884 if (devpriv->divisor_b1 < min_counter_value)
1885 devpriv->divisor_b1 = min_counter_value;
1886 if (devpriv->divisor_b1 > max_counter_value)
1887 devpriv->divisor_b1 = max_counter_value;
1888 /* write corrected timings to command */
1889 labpc_set_ai_convert_period(cmd,
1890 base_period * devpriv->divisor_a0);
1891 labpc_set_ai_scan_period(cmd,
1892 base_period * devpriv->divisor_b1);
1894 * if only one TRIG_TIMER is used, we can employ the generic
1895 * cascaded timing functions
1897 } else if (labpc_ai_scan_period(cmd)) {
1898 unsigned int scan_period;
1900 scan_period = labpc_ai_scan_period(cmd);
1902 * calculate cascaded counter values
1903 * that give desired scan timing
1905 i8253_cascade_ns_to_timer_2div(LABPC_TIMER_BASE,
1906 &(devpriv->divisor_b1),
1907 &(devpriv->divisor_b0),
1909 cmd->flags & TRIG_ROUND_MASK);
1910 labpc_set_ai_scan_period(cmd, scan_period);
1911 } else if (labpc_ai_convert_period(cmd)) {
1912 unsigned int convert_period;
1914 convert_period = labpc_ai_convert_period(cmd);
1916 * calculate cascaded counter values
1917 * that give desired conversion timing
1919 i8253_cascade_ns_to_timer_2div(LABPC_TIMER_BASE,
1920 &(devpriv->divisor_a0),
1921 &(devpriv->divisor_b0),
1923 cmd->flags & TRIG_ROUND_MASK);
1924 labpc_set_ai_convert_period(cmd, convert_period);
1928 static int labpc_dio_mem_callback(int dir, int port, int data,
1929 unsigned long iobase)
1932 writeb(data, (void *)(iobase + port));
1935 return readb((void *)(iobase + port));
1939 /* lowlevel write to eeprom/dac */
1940 static void labpc_serial_out(struct comedi_device *dev, unsigned int value,
1941 unsigned int value_width)
1945 for (i = 1; i <= value_width; i++) {
1946 /* clear serial clock */
1947 devpriv->command5_bits &= ~SCLOCK_BIT;
1948 /* send bits most significant bit first */
1949 if (value & (1 << (value_width - i)))
1950 devpriv->command5_bits |= SDATA_BIT;
1952 devpriv->command5_bits &= ~SDATA_BIT;
1954 devpriv->write_byte(devpriv->command5_bits,
1955 dev->iobase + COMMAND5_REG);
1956 /* set clock to load bit */
1957 devpriv->command5_bits |= SCLOCK_BIT;
1959 devpriv->write_byte(devpriv->command5_bits,
1960 dev->iobase + COMMAND5_REG);
1964 /* lowlevel read from eeprom */
1965 static unsigned int labpc_serial_in(struct comedi_device *dev)
1967 unsigned int value = 0;
1969 const int value_width = 8; /* number of bits wide values are */
1971 for (i = 1; i <= value_width; i++) {
1972 /* set serial clock */
1973 devpriv->command5_bits |= SCLOCK_BIT;
1975 devpriv->write_byte(devpriv->command5_bits,
1976 dev->iobase + COMMAND5_REG);
1977 /* clear clock bit */
1978 devpriv->command5_bits &= ~SCLOCK_BIT;
1980 devpriv->write_byte(devpriv->command5_bits,
1981 dev->iobase + COMMAND5_REG);
1982 /* read bits most significant bit first */
1984 devpriv->status2_bits =
1985 devpriv->read_byte(dev->iobase + STATUS2_REG);
1986 if (devpriv->status2_bits & EEPROM_OUT_BIT)
1987 value |= 1 << (value_width - i);
1993 static unsigned int labpc_eeprom_read(struct comedi_device *dev,
1994 unsigned int address)
1997 /* bits to tell eeprom to expect a read */
1998 const int read_instruction = 0x3;
1999 /* 8 bit write lengths to eeprom */
2000 const int write_length = 8;
2002 /* enable read/write to eeprom */
2003 devpriv->command5_bits &= ~EEPROM_EN_BIT;
2005 devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2006 devpriv->command5_bits |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT;
2008 devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2010 /* send read instruction */
2011 labpc_serial_out(dev, read_instruction, write_length);
2012 /* send 8 bit address to read from */
2013 labpc_serial_out(dev, address, write_length);
2015 value = labpc_serial_in(dev);
2017 /* disable read/write to eeprom */
2018 devpriv->command5_bits &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
2020 devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2025 static int labpc_eeprom_write(struct comedi_device *dev,
2026 unsigned int address, unsigned int value)
2028 const int write_enable_instruction = 0x6;
2029 const int write_instruction = 0x2;
2030 const int write_length = 8; /* 8 bit write lengths to eeprom */
2031 const int write_in_progress_bit = 0x1;
2032 const int timeout = 10000;
2035 /* make sure there isn't already a write in progress */
2036 for (i = 0; i < timeout; i++) {
2037 if ((labpc_eeprom_read_status(dev) & write_in_progress_bit) ==
2042 comedi_error(dev, "eeprom write timed out");
2045 /* update software copy of eeprom */
2046 devpriv->eeprom_data[address] = value;
2048 /* enable read/write to eeprom */
2049 devpriv->command5_bits &= ~EEPROM_EN_BIT;
2051 devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2052 devpriv->command5_bits |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT;
2054 devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2056 /* send write_enable instruction */
2057 labpc_serial_out(dev, write_enable_instruction, write_length);
2058 devpriv->command5_bits &= ~EEPROM_EN_BIT;
2060 devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2062 /* send write instruction */
2063 devpriv->command5_bits |= EEPROM_EN_BIT;
2065 devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2066 labpc_serial_out(dev, write_instruction, write_length);
2067 /* send 8 bit address to write to */
2068 labpc_serial_out(dev, address, write_length);
2070 labpc_serial_out(dev, value, write_length);
2071 devpriv->command5_bits &= ~EEPROM_EN_BIT;
2073 devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2075 /* disable read/write to eeprom */
2076 devpriv->command5_bits &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
2078 devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2083 static unsigned int labpc_eeprom_read_status(struct comedi_device *dev)
2086 const int read_status_instruction = 0x5;
2087 const int write_length = 8; /* 8 bit write lengths to eeprom */
2089 /* enable read/write to eeprom */
2090 devpriv->command5_bits &= ~EEPROM_EN_BIT;
2092 devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2093 devpriv->command5_bits |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT;
2095 devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2097 /* send read status instruction */
2098 labpc_serial_out(dev, read_status_instruction, write_length);
2100 value = labpc_serial_in(dev);
2102 /* disable read/write to eeprom */
2103 devpriv->command5_bits &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
2105 devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2110 /* writes to 8 bit calibration dacs */
2111 static void write_caldac(struct comedi_device *dev, unsigned int channel,
2114 if (value == devpriv->caldac[channel])
2116 devpriv->caldac[channel] = value;
2118 /* clear caldac load bit and make sure we don't write to eeprom */
2119 devpriv->command5_bits &=
2120 ~CALDAC_LOAD_BIT & ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
2122 devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2124 /* write 4 bit channel */
2125 labpc_serial_out(dev, channel, 4);
2126 /* write 8 bit caldac value */
2127 labpc_serial_out(dev, value, 8);
2129 /* set and clear caldac bit to load caldac value */
2130 devpriv->command5_bits |= CALDAC_LOAD_BIT;
2132 devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2133 devpriv->command5_bits &= ~CALDAC_LOAD_BIT;
2135 devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2138 #ifdef CONFIG_COMEDI_PCI
2139 static int __devinit driver_labpc_pci_probe(struct pci_dev *dev,
2140 const struct pci_device_id *ent)
2142 return comedi_pci_auto_config(dev, driver_labpc.driver_name);
2145 static void __devexit driver_labpc_pci_remove(struct pci_dev *dev)
2147 comedi_pci_auto_unconfig(dev);
2150 static struct pci_driver driver_labpc_pci_driver = {
2151 .id_table = labpc_pci_table,
2152 .probe = &driver_labpc_pci_probe,
2153 .remove = __devexit_p(&driver_labpc_pci_remove)
2156 static int __init driver_labpc_init_module(void)
2160 retval = comedi_driver_register(&driver_labpc);
2164 driver_labpc_pci_driver.name = (char *)driver_labpc.driver_name;
2165 return pci_register_driver(&driver_labpc_pci_driver);
2168 static void __exit driver_labpc_cleanup_module(void)
2170 pci_unregister_driver(&driver_labpc_pci_driver);
2171 comedi_driver_unregister(&driver_labpc);
2174 module_init(driver_labpc_init_module);
2175 module_exit(driver_labpc_cleanup_module);
2177 static int __init driver_labpc_init_module(void)
2179 return comedi_driver_register(&driver_labpc);
2182 static void __exit driver_labpc_cleanup_module(void)
2184 comedi_driver_unregister(&driver_labpc);
2187 module_init(driver_labpc_init_module);
2188 module_exit(driver_labpc_cleanup_module);
2192 MODULE_AUTHOR("Comedi http://www.comedi.org");
2193 MODULE_DESCRIPTION("Comedi low-level driver");
2194 MODULE_LICENSE("GPL");