2 comedi/drivers/me4000.c
3 Source code for the Meilhaus ME-4000 board family.
5 COMEDI - Linux Control and Measurement Device Interface
6 Copyright (C) 2000 David A. Schleef <ds@schleef.org>
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 Description: Meilhaus ME-4000 series boards
26 Devices: [Meilhaus] ME-4650 (me4000), ME-4670i, ME-4680, ME-4680i, ME-4680is
27 Author: gg (Guenter Gebhardt <g.gebhardt@meilhaus.com>)
28 Updated: Mon, 18 Mar 2002 15:34:01 -0800
29 Status: broken (no support for loading firmware)
38 Configuration Options:
40 [0] - PCI bus number (optional)
41 [1] - PCI slot number (optional)
43 If bus/slot is not specified, the first available PCI
46 The firmware required by these boards is available in the
47 comedi_nonfree_firmware tarball available from
48 http://www.comedi.org. However, the driver's support for
49 loading the firmware through comedi_config is currently
54 #include <linux/interrupt.h>
55 #include "../comedidev.h"
57 #include <linux/delay.h>
58 #include <linux/list.h>
59 #include <linux/spinlock.h>
63 /* file removed due to GPL incompatibility */
64 #include "me4000_fw.h"
67 static const struct me4000_board me4000_boards[] = {
202 /*-----------------------------------------------------------------------------
203 Meilhaus function prototypes
204 ---------------------------------------------------------------------------*/
205 static int get_registers(struct comedi_device *dev, struct pci_dev *pci_dev_p);
206 static int init_board_info(struct comedi_device *dev,
207 struct pci_dev *pci_dev_p);
208 static int init_ao_context(struct comedi_device *dev);
209 static int init_ai_context(struct comedi_device *dev);
210 static int init_dio_context(struct comedi_device *dev);
211 static int init_cnt_context(struct comedi_device *dev);
212 static int xilinx_download(struct comedi_device *dev);
213 static int reset_board(struct comedi_device *dev);
215 static int ai_write_chanlist(struct comedi_device *dev,
216 struct comedi_subdevice *s,
217 struct comedi_cmd *cmd);
219 static const struct comedi_lrange me4000_ai_range = {
229 static const struct comedi_lrange me4000_ao_range = {
236 static int me4000_probe(struct comedi_device *dev, struct comedi_devconfig *it)
238 struct pci_dev *pci_device = NULL;
240 struct me4000_board *board;
242 /* Allocate private memory */
243 if (alloc_private(dev, sizeof(struct me4000_info)) < 0)
247 * Probe the device to determine what device in the series it is.
249 for_each_pci_dev(pci_device) {
250 if (pci_device->vendor == PCI_VENDOR_ID_MEILHAUS) {
251 for (i = 0; i < ARRAY_SIZE(me4000_boards); i++) {
252 if (me4000_boards[i].device_id ==
253 pci_device->device) {
256 * bus/slot requested?
258 if ((it->options[0] != 0)
259 || (it->options[1] != 0)) {
261 * Are we on the wrong
264 if (pci_device->bus->number !=
267 PCI_SLOT(pci_device->devfn)
272 dev->board_ptr = me4000_boards + i;
274 (struct me4000_board *)
276 info->pci_dev_p = pci_device;
284 "comedi%d: me4000: me4000_probe(): "
285 "No supported board found (req. bus/slot : %d/%d)\n",
286 dev->minor, it->options[0], it->options[1]);
292 "comedi%d: me4000: me4000_probe(): "
293 "Found %s at PCI bus %d, slot %d\n",
294 dev->minor, me4000_boards[i].name, pci_device->bus->number,
295 PCI_SLOT(pci_device->devfn));
297 /* Set data in device structure */
298 dev->board_name = board->name;
300 /* Enable PCI device and request regions */
301 result = comedi_pci_enable(pci_device, dev->board_name);
304 "comedi%d: me4000: me4000_probe(): Cannot enable PCI "
305 "device and request I/O regions\n", dev->minor);
309 /* Get the PCI base registers */
310 result = get_registers(dev, pci_device);
313 "comedi%d: me4000: me4000_probe(): "
314 "Cannot get registers\n", dev->minor);
317 /* Initialize board info */
318 result = init_board_info(dev, pci_device);
321 "comedi%d: me4000: me4000_probe(): "
322 "Cannot init baord info\n", dev->minor);
326 /* Init analog output context */
327 result = init_ao_context(dev);
330 "comedi%d: me4000: me4000_probe(): "
331 "Cannot init ao context\n", dev->minor);
335 /* Init analog input context */
336 result = init_ai_context(dev);
339 "comedi%d: me4000: me4000_probe(): "
340 "Cannot init ai context\n", dev->minor);
344 /* Init digital I/O context */
345 result = init_dio_context(dev);
348 "comedi%d: me4000: me4000_probe(): "
349 "Cannot init dio context\n", dev->minor);
353 /* Init counter context */
354 result = init_cnt_context(dev);
357 "comedi%d: me4000: me4000_probe(): "
358 "Cannot init cnt context\n", dev->minor);
362 /* Download the xilinx firmware */
363 result = xilinx_download(dev);
366 "comedi%d: me4000: me4000_probe(): "
367 "Can't download firmware\n", dev->minor);
371 /* Make a hardware reset */
372 result = reset_board(dev);
375 "comedi%d: me4000: me4000_probe(): Can't reset board\n",
383 static int get_registers(struct comedi_device *dev, struct pci_dev *pci_dev_p)
385 /*--------------------------- plx regbase -------------------------------*/
387 info->plx_regbase = pci_resource_start(pci_dev_p, 1);
388 if (info->plx_regbase == 0) {
390 "comedi%d: me4000: get_registers(): "
391 "PCI base address 1 is not available\n", dev->minor);
394 info->plx_regbase_size = pci_resource_len(pci_dev_p, 1);
396 /*--------------------------- me4000 regbase ----------------------------*/
398 info->me4000_regbase = pci_resource_start(pci_dev_p, 2);
399 if (info->me4000_regbase == 0) {
401 "comedi%d: me4000: get_registers(): "
402 "PCI base address 2 is not available\n", dev->minor);
405 info->me4000_regbase_size = pci_resource_len(pci_dev_p, 2);
407 /*--------------------------- timer regbase ------------------------------*/
409 info->timer_regbase = pci_resource_start(pci_dev_p, 3);
410 if (info->timer_regbase == 0) {
412 "comedi%d: me4000: get_registers(): "
413 "PCI base address 3 is not available\n", dev->minor);
416 info->timer_regbase_size = pci_resource_len(pci_dev_p, 3);
418 /*--------------------------- program regbase ----------------------------*/
420 info->program_regbase = pci_resource_start(pci_dev_p, 5);
421 if (info->program_regbase == 0) {
423 "comedi%d: me4000: get_registers(): "
424 "PCI base address 5 is not available\n", dev->minor);
427 info->program_regbase_size = pci_resource_len(pci_dev_p, 5);
432 static int init_board_info(struct comedi_device *dev, struct pci_dev *pci_dev_p)
436 /* Init spin locks */
437 /* spin_lock_init(&info->preload_lock); */
438 /* spin_lock_init(&info->ai_ctrl_lock); */
440 /* Get the serial number */
441 result = pci_read_config_dword(pci_dev_p, 0x2C, &info->serial_no);
442 if (result != PCIBIOS_SUCCESSFUL)
445 /* Get the hardware revision */
446 result = pci_read_config_byte(pci_dev_p, 0x08, &info->hw_revision);
447 if (result != PCIBIOS_SUCCESSFUL)
450 /* Get the vendor id */
451 info->vendor_id = pci_dev_p->vendor;
453 /* Get the device id */
454 info->device_id = pci_dev_p->device;
456 /* Get the irq assigned to the board */
457 info->irq = pci_dev_p->irq;
462 static int init_ao_context(struct comedi_device *dev)
466 for (i = 0; i < thisboard->ao.count; i++) {
467 /* spin_lock_init(&info->ao_context[i].use_lock); */
468 info->ao_context[i].irq = info->irq;
472 info->ao_context[i].ctrl_reg =
473 info->me4000_regbase + ME4000_AO_00_CTRL_REG;
474 info->ao_context[i].status_reg =
475 info->me4000_regbase + ME4000_AO_00_STATUS_REG;
476 info->ao_context[i].fifo_reg =
477 info->me4000_regbase + ME4000_AO_00_FIFO_REG;
478 info->ao_context[i].single_reg =
479 info->me4000_regbase + ME4000_AO_00_SINGLE_REG;
480 info->ao_context[i].timer_reg =
481 info->me4000_regbase + ME4000_AO_00_TIMER_REG;
482 info->ao_context[i].irq_status_reg =
483 info->me4000_regbase + ME4000_IRQ_STATUS_REG;
484 info->ao_context[i].preload_reg =
485 info->me4000_regbase + ME4000_AO_LOADSETREG_XX;
488 info->ao_context[i].ctrl_reg =
489 info->me4000_regbase + ME4000_AO_01_CTRL_REG;
490 info->ao_context[i].status_reg =
491 info->me4000_regbase + ME4000_AO_01_STATUS_REG;
492 info->ao_context[i].fifo_reg =
493 info->me4000_regbase + ME4000_AO_01_FIFO_REG;
494 info->ao_context[i].single_reg =
495 info->me4000_regbase + ME4000_AO_01_SINGLE_REG;
496 info->ao_context[i].timer_reg =
497 info->me4000_regbase + ME4000_AO_01_TIMER_REG;
498 info->ao_context[i].irq_status_reg =
499 info->me4000_regbase + ME4000_IRQ_STATUS_REG;
500 info->ao_context[i].preload_reg =
501 info->me4000_regbase + ME4000_AO_LOADSETREG_XX;
504 info->ao_context[i].ctrl_reg =
505 info->me4000_regbase + ME4000_AO_02_CTRL_REG;
506 info->ao_context[i].status_reg =
507 info->me4000_regbase + ME4000_AO_02_STATUS_REG;
508 info->ao_context[i].fifo_reg =
509 info->me4000_regbase + ME4000_AO_02_FIFO_REG;
510 info->ao_context[i].single_reg =
511 info->me4000_regbase + ME4000_AO_02_SINGLE_REG;
512 info->ao_context[i].timer_reg =
513 info->me4000_regbase + ME4000_AO_02_TIMER_REG;
514 info->ao_context[i].irq_status_reg =
515 info->me4000_regbase + ME4000_IRQ_STATUS_REG;
516 info->ao_context[i].preload_reg =
517 info->me4000_regbase + ME4000_AO_LOADSETREG_XX;
520 info->ao_context[i].ctrl_reg =
521 info->me4000_regbase + ME4000_AO_03_CTRL_REG;
522 info->ao_context[i].status_reg =
523 info->me4000_regbase + ME4000_AO_03_STATUS_REG;
524 info->ao_context[i].fifo_reg =
525 info->me4000_regbase + ME4000_AO_03_FIFO_REG;
526 info->ao_context[i].single_reg =
527 info->me4000_regbase + ME4000_AO_03_SINGLE_REG;
528 info->ao_context[i].timer_reg =
529 info->me4000_regbase + ME4000_AO_03_TIMER_REG;
530 info->ao_context[i].irq_status_reg =
531 info->me4000_regbase + ME4000_IRQ_STATUS_REG;
532 info->ao_context[i].preload_reg =
533 info->me4000_regbase + ME4000_AO_LOADSETREG_XX;
543 static int init_ai_context(struct comedi_device *dev)
545 info->ai_context.irq = info->irq;
547 info->ai_context.ctrl_reg = info->me4000_regbase + ME4000_AI_CTRL_REG;
548 info->ai_context.status_reg =
549 info->me4000_regbase + ME4000_AI_STATUS_REG;
550 info->ai_context.channel_list_reg =
551 info->me4000_regbase + ME4000_AI_CHANNEL_LIST_REG;
552 info->ai_context.data_reg = info->me4000_regbase + ME4000_AI_DATA_REG;
553 info->ai_context.chan_timer_reg =
554 info->me4000_regbase + ME4000_AI_CHAN_TIMER_REG;
555 info->ai_context.chan_pre_timer_reg =
556 info->me4000_regbase + ME4000_AI_CHAN_PRE_TIMER_REG;
557 info->ai_context.scan_timer_low_reg =
558 info->me4000_regbase + ME4000_AI_SCAN_TIMER_LOW_REG;
559 info->ai_context.scan_timer_high_reg =
560 info->me4000_regbase + ME4000_AI_SCAN_TIMER_HIGH_REG;
561 info->ai_context.scan_pre_timer_low_reg =
562 info->me4000_regbase + ME4000_AI_SCAN_PRE_TIMER_LOW_REG;
563 info->ai_context.scan_pre_timer_high_reg =
564 info->me4000_regbase + ME4000_AI_SCAN_PRE_TIMER_HIGH_REG;
565 info->ai_context.start_reg = info->me4000_regbase + ME4000_AI_START_REG;
566 info->ai_context.irq_status_reg =
567 info->me4000_regbase + ME4000_IRQ_STATUS_REG;
568 info->ai_context.sample_counter_reg =
569 info->me4000_regbase + ME4000_AI_SAMPLE_COUNTER_REG;
574 static int init_dio_context(struct comedi_device *dev)
576 info->dio_context.dir_reg = info->me4000_regbase + ME4000_DIO_DIR_REG;
577 info->dio_context.ctrl_reg = info->me4000_regbase + ME4000_DIO_CTRL_REG;
578 info->dio_context.port_0_reg =
579 info->me4000_regbase + ME4000_DIO_PORT_0_REG;
580 info->dio_context.port_1_reg =
581 info->me4000_regbase + ME4000_DIO_PORT_1_REG;
582 info->dio_context.port_2_reg =
583 info->me4000_regbase + ME4000_DIO_PORT_2_REG;
584 info->dio_context.port_3_reg =
585 info->me4000_regbase + ME4000_DIO_PORT_3_REG;
590 static int init_cnt_context(struct comedi_device *dev)
592 info->cnt_context.ctrl_reg = info->timer_regbase + ME4000_CNT_CTRL_REG;
593 info->cnt_context.counter_0_reg =
594 info->timer_regbase + ME4000_CNT_COUNTER_0_REG;
595 info->cnt_context.counter_1_reg =
596 info->timer_regbase + ME4000_CNT_COUNTER_1_REG;
597 info->cnt_context.counter_2_reg =
598 info->timer_regbase + ME4000_CNT_COUNTER_2_REG;
603 #define FIRMWARE_NOT_AVAILABLE 1
604 #if FIRMWARE_NOT_AVAILABLE
605 extern unsigned char *xilinx_firm;
608 static int xilinx_download(struct comedi_device *dev)
611 wait_queue_head_t queue;
615 init_waitqueue_head(&queue);
618 * Set PLX local interrupt 2 polarity to high.
619 * Interrupt is thrown by init pin of xilinx.
621 outl(0x10, info->plx_regbase + PLX_INTCSR);
623 /* Set /CS and /WRITE of the Xilinx */
624 value = inl(info->plx_regbase + PLX_ICR);
626 outl(value, info->plx_regbase + PLX_ICR);
628 /* Init Xilinx with CS1 */
629 inb(info->program_regbase + 0xC8);
631 /* Wait until /INIT pin is set */
633 if (!(inl(info->plx_regbase + PLX_INTCSR) & 0x20)) {
635 "comedi%d: me4000: xilinx_download(): "
636 "Can't init Xilinx\n", dev->minor);
640 /* Reset /CS and /WRITE of the Xilinx */
641 value = inl(info->plx_regbase + PLX_ICR);
643 outl(value, info->plx_regbase + PLX_ICR);
644 if (FIRMWARE_NOT_AVAILABLE) {
645 comedi_error(dev, "xilinx firmware unavailable "
646 "due to licensing, aborting");
649 /* Download Xilinx firmware */
650 size = (xilinx_firm[0] << 24) + (xilinx_firm[1] << 16) +
651 (xilinx_firm[2] << 8) + xilinx_firm[3];
654 for (idx = 0; idx < size; idx++) {
655 outb(xilinx_firm[16 + idx], info->program_regbase);
658 /* Check if BUSY flag is low */
659 if (inl(info->plx_regbase + PLX_ICR) & 0x20) {
661 "comedi%d: me4000: xilinx_download(): "
662 "Xilinx is still busy (idx = %d)\n",
669 /* If done flag is high download was successful */
670 if (inl(info->plx_regbase + PLX_ICR) & 0x4) {
673 "comedi%d: me4000: xilinx_download(): "
674 "DONE flag is not set\n", dev->minor);
676 "comedi%d: me4000: xilinx_download(): "
677 "Download not successful\n", dev->minor);
681 /* Set /CS and /WRITE */
682 value = inl(info->plx_regbase + PLX_ICR);
684 outl(value, info->plx_regbase + PLX_ICR);
689 static int reset_board(struct comedi_device *dev)
693 /* Make a hardware reset */
694 icr = inl(info->plx_regbase + PLX_ICR);
696 outl(icr, info->plx_regbase + PLX_ICR);
698 outl(icr, info->plx_regbase + PLX_ICR);
700 /* 0x8000 to the DACs means an output voltage of 0V */
701 outl(0x8000, info->me4000_regbase + ME4000_AO_00_SINGLE_REG);
702 outl(0x8000, info->me4000_regbase + ME4000_AO_01_SINGLE_REG);
703 outl(0x8000, info->me4000_regbase + ME4000_AO_02_SINGLE_REG);
704 outl(0x8000, info->me4000_regbase + ME4000_AO_03_SINGLE_REG);
706 /* Set both stop bits in the analog input control register */
707 outl(ME4000_AI_CTRL_BIT_IMMEDIATE_STOP | ME4000_AI_CTRL_BIT_STOP,
708 info->me4000_regbase + ME4000_AI_CTRL_REG);
710 /* Set both stop bits in the analog output control register */
711 outl(ME4000_AO_CTRL_BIT_IMMEDIATE_STOP | ME4000_AO_CTRL_BIT_STOP,
712 info->me4000_regbase + ME4000_AO_00_CTRL_REG);
713 outl(ME4000_AO_CTRL_BIT_IMMEDIATE_STOP | ME4000_AO_CTRL_BIT_STOP,
714 info->me4000_regbase + ME4000_AO_01_CTRL_REG);
715 outl(ME4000_AO_CTRL_BIT_IMMEDIATE_STOP | ME4000_AO_CTRL_BIT_STOP,
716 info->me4000_regbase + ME4000_AO_02_CTRL_REG);
717 outl(ME4000_AO_CTRL_BIT_IMMEDIATE_STOP | ME4000_AO_CTRL_BIT_STOP,
718 info->me4000_regbase + ME4000_AO_03_CTRL_REG);
720 /* Enable interrupts on the PLX */
721 outl(0x43, info->plx_regbase + PLX_INTCSR);
723 /* Set the adustment register for AO demux */
724 outl(ME4000_AO_DEMUX_ADJUST_VALUE,
725 info->me4000_regbase + ME4000_AO_DEMUX_ADJUST_REG);
728 * Set digital I/O direction for port 0
729 * to output on isolated versions
731 if (!(inl(info->me4000_regbase + ME4000_DIO_DIR_REG) & 0x1))
732 outl(0x1, info->me4000_regbase + ME4000_DIO_CTRL_REG);
737 /*=============================================================================
739 ===========================================================================*/
741 static int me4000_ai_insn_read(struct comedi_device *dev,
742 struct comedi_subdevice *subdevice,
743 struct comedi_insn *insn, unsigned int *data)
746 int chan = CR_CHAN(insn->chanspec);
747 int rang = CR_RANGE(insn->chanspec);
748 int aref = CR_AREF(insn->chanspec);
750 unsigned long entry = 0;
756 } else if (insn->n > 1) {
758 "comedi%d: me4000: me4000_ai_insn_read(): "
759 "Invalid instruction length %d\n", dev->minor, insn->n);
765 entry |= ME4000_AI_LIST_RANGE_UNIPOLAR_2_5;
768 entry |= ME4000_AI_LIST_RANGE_UNIPOLAR_10;
771 entry |= ME4000_AI_LIST_RANGE_BIPOLAR_2_5;
774 entry |= ME4000_AI_LIST_RANGE_BIPOLAR_10;
778 "comedi%d: me4000: me4000_ai_insn_read(): "
779 "Invalid range specified\n", dev->minor);
786 if (chan >= thisboard->ai_nchan) {
788 "comedi%d: me4000: me4000_ai_insn_read(): "
789 "Analog input is not available\n", dev->minor);
792 entry |= ME4000_AI_LIST_INPUT_SINGLE_ENDED | chan;
796 if (rang == 0 || rang == 1) {
798 "comedi%d: me4000: me4000_ai_insn_read(): "
799 "Range must be bipolar when aref = diff\n",
804 if (chan >= thisboard->ai_diff_nchan) {
806 "comedi%d: me4000: me4000_ai_insn_read(): "
807 "Analog input is not available\n", dev->minor);
810 entry |= ME4000_AI_LIST_INPUT_DIFFERENTIAL | chan;
814 "comedi%d: me4000: me4000_ai_insn_read(): "
815 "Invalid aref specified\n", dev->minor);
819 entry |= ME4000_AI_LIST_LAST_ENTRY;
821 /* Clear channel list, data fifo and both stop bits */
822 tmp = inl(info->ai_context.ctrl_reg);
823 tmp &= ~(ME4000_AI_CTRL_BIT_CHANNEL_FIFO |
824 ME4000_AI_CTRL_BIT_DATA_FIFO |
825 ME4000_AI_CTRL_BIT_STOP | ME4000_AI_CTRL_BIT_IMMEDIATE_STOP);
826 outl(tmp, info->ai_context.ctrl_reg);
828 /* Set the acquisition mode to single */
829 tmp &= ~(ME4000_AI_CTRL_BIT_MODE_0 | ME4000_AI_CTRL_BIT_MODE_1 |
830 ME4000_AI_CTRL_BIT_MODE_2);
831 outl(tmp, info->ai_context.ctrl_reg);
833 /* Enable channel list and data fifo */
834 tmp |= ME4000_AI_CTRL_BIT_CHANNEL_FIFO | ME4000_AI_CTRL_BIT_DATA_FIFO;
835 outl(tmp, info->ai_context.ctrl_reg);
837 /* Generate channel list entry */
838 outl(entry, info->ai_context.channel_list_reg);
840 /* Set the timer to maximum sample rate */
841 outl(ME4000_AI_MIN_TICKS, info->ai_context.chan_timer_reg);
842 outl(ME4000_AI_MIN_TICKS, info->ai_context.chan_pre_timer_reg);
844 /* Start conversion by dummy read */
845 inl(info->ai_context.start_reg);
847 /* Wait until ready */
849 if (!(inl(info->ai_context.status_reg) &
850 ME4000_AI_STATUS_BIT_EF_DATA)) {
852 "comedi%d: me4000: me4000_ai_insn_read(): "
853 "Value not available after wait\n", dev->minor);
857 /* Read value from data fifo */
858 lval = inl(info->ai_context.data_reg) & 0xFFFF;
859 data[0] = lval ^ 0x8000;
864 static int me4000_ai_cancel(struct comedi_device *dev,
865 struct comedi_subdevice *s)
869 /* Stop any running conversion */
870 tmp = inl(info->ai_context.ctrl_reg);
871 tmp &= ~(ME4000_AI_CTRL_BIT_STOP | ME4000_AI_CTRL_BIT_IMMEDIATE_STOP);
872 outl(tmp, info->ai_context.ctrl_reg);
874 /* Clear the control register */
875 outl(0x0, info->ai_context.ctrl_reg);
880 static int ai_check_chanlist(struct comedi_device *dev,
881 struct comedi_subdevice *s, struct comedi_cmd *cmd)
886 /* Check whether a channel list is available */
887 if (!cmd->chanlist_len) {
889 "comedi%d: me4000: ai_check_chanlist(): "
890 "No channel list available\n", dev->minor);
894 /* Check the channel list size */
895 if (cmd->chanlist_len > ME4000_AI_CHANNEL_LIST_COUNT) {
897 "comedi%d: me4000: ai_check_chanlist(): "
898 "Channel list is to large\n", dev->minor);
902 /* Check the pointer */
903 if (!cmd->chanlist) {
905 "comedi%d: me4000: ai_check_chanlist(): "
906 "NULL pointer to channel list\n", dev->minor);
910 /* Check whether aref is equal for all entries */
911 aref = CR_AREF(cmd->chanlist[0]);
912 for (i = 0; i < cmd->chanlist_len; i++) {
913 if (CR_AREF(cmd->chanlist[i]) != aref) {
915 "comedi%d: me4000: ai_check_chanlist(): "
916 "Mode is not equal for all entries\n",
922 /* Check whether channels are available for this ending */
923 if (aref == SDF_DIFF) {
924 for (i = 0; i < cmd->chanlist_len; i++) {
925 if (CR_CHAN(cmd->chanlist[i]) >=
926 thisboard->ai_diff_nchan) {
928 "comedi%d: me4000: ai_check_chanlist():"
929 " Channel number to high\n", dev->minor);
934 for (i = 0; i < cmd->chanlist_len; i++) {
935 if (CR_CHAN(cmd->chanlist[i]) >= thisboard->ai_nchan) {
937 "comedi%d: me4000: ai_check_chanlist(): "
938 "Channel number to high\n", dev->minor);
944 /* Check if bipolar is set for all entries when in differential mode */
945 if (aref == SDF_DIFF) {
946 for (i = 0; i < cmd->chanlist_len; i++) {
947 if (CR_RANGE(cmd->chanlist[i]) != 1 &&
948 CR_RANGE(cmd->chanlist[i]) != 2) {
950 "comedi%d: me4000: ai_check_chanlist(): "
951 "Bipolar is not selected in "
952 "differential mode\n",
962 static int ai_round_cmd_args(struct comedi_device *dev,
963 struct comedi_subdevice *s,
964 struct comedi_cmd *cmd,
965 unsigned int *init_ticks,
966 unsigned int *scan_ticks, unsigned int *chan_ticks)
975 if (cmd->start_arg) {
976 *init_ticks = (cmd->start_arg * 33) / 1000;
977 rest = (cmd->start_arg * 33) % 1000;
979 if ((cmd->flags & TRIG_ROUND_MASK) == TRIG_ROUND_NEAREST) {
982 } else if ((cmd->flags & TRIG_ROUND_MASK) == TRIG_ROUND_UP) {
988 if (cmd->scan_begin_arg) {
989 *scan_ticks = (cmd->scan_begin_arg * 33) / 1000;
990 rest = (cmd->scan_begin_arg * 33) % 1000;
992 if ((cmd->flags & TRIG_ROUND_MASK) == TRIG_ROUND_NEAREST) {
995 } else if ((cmd->flags & TRIG_ROUND_MASK) == TRIG_ROUND_UP) {
1001 if (cmd->convert_arg) {
1002 *chan_ticks = (cmd->convert_arg * 33) / 1000;
1003 rest = (cmd->convert_arg * 33) % 1000;
1005 if ((cmd->flags & TRIG_ROUND_MASK) == TRIG_ROUND_NEAREST) {
1008 } else if ((cmd->flags & TRIG_ROUND_MASK) == TRIG_ROUND_UP) {
1017 static void ai_write_timer(struct comedi_device *dev,
1018 unsigned int init_ticks,
1019 unsigned int scan_ticks, unsigned int chan_ticks)
1021 outl(init_ticks - 1, info->ai_context.scan_pre_timer_low_reg);
1022 outl(0x0, info->ai_context.scan_pre_timer_high_reg);
1025 outl(scan_ticks - 1, info->ai_context.scan_timer_low_reg);
1026 outl(0x0, info->ai_context.scan_timer_high_reg);
1029 outl(chan_ticks - 1, info->ai_context.chan_pre_timer_reg);
1030 outl(chan_ticks - 1, info->ai_context.chan_timer_reg);
1033 static int ai_prepare(struct comedi_device *dev,
1034 struct comedi_subdevice *s,
1035 struct comedi_cmd *cmd,
1036 unsigned int init_ticks,
1037 unsigned int scan_ticks, unsigned int chan_ticks)
1040 unsigned long tmp = 0;
1042 /* Write timer arguments */
1043 ai_write_timer(dev, init_ticks, scan_ticks, chan_ticks);
1045 /* Reset control register */
1046 outl(tmp, info->ai_context.ctrl_reg);
1049 if ((cmd->start_src == TRIG_EXT &&
1050 cmd->scan_begin_src == TRIG_TIMER &&
1051 cmd->convert_src == TRIG_TIMER) ||
1052 (cmd->start_src == TRIG_EXT &&
1053 cmd->scan_begin_src == TRIG_FOLLOW &&
1054 cmd->convert_src == TRIG_TIMER)) {
1055 tmp = ME4000_AI_CTRL_BIT_MODE_1 |
1056 ME4000_AI_CTRL_BIT_CHANNEL_FIFO |
1057 ME4000_AI_CTRL_BIT_DATA_FIFO;
1058 } else if (cmd->start_src == TRIG_EXT &&
1059 cmd->scan_begin_src == TRIG_EXT &&
1060 cmd->convert_src == TRIG_TIMER) {
1061 tmp = ME4000_AI_CTRL_BIT_MODE_2 |
1062 ME4000_AI_CTRL_BIT_CHANNEL_FIFO |
1063 ME4000_AI_CTRL_BIT_DATA_FIFO;
1064 } else if (cmd->start_src == TRIG_EXT &&
1065 cmd->scan_begin_src == TRIG_EXT &&
1066 cmd->convert_src == TRIG_EXT) {
1067 tmp = ME4000_AI_CTRL_BIT_MODE_0 |
1068 ME4000_AI_CTRL_BIT_MODE_1 |
1069 ME4000_AI_CTRL_BIT_CHANNEL_FIFO |
1070 ME4000_AI_CTRL_BIT_DATA_FIFO;
1072 tmp = ME4000_AI_CTRL_BIT_MODE_0 |
1073 ME4000_AI_CTRL_BIT_CHANNEL_FIFO |
1074 ME4000_AI_CTRL_BIT_DATA_FIFO;
1078 if (cmd->stop_src == TRIG_COUNT) {
1079 outl(cmd->chanlist_len * cmd->stop_arg,
1080 info->ai_context.sample_counter_reg);
1081 tmp |= ME4000_AI_CTRL_BIT_HF_IRQ | ME4000_AI_CTRL_BIT_SC_IRQ;
1082 } else if (cmd->stop_src == TRIG_NONE &&
1083 cmd->scan_end_src == TRIG_COUNT) {
1084 outl(cmd->scan_end_arg,
1085 info->ai_context.sample_counter_reg);
1086 tmp |= ME4000_AI_CTRL_BIT_HF_IRQ | ME4000_AI_CTRL_BIT_SC_IRQ;
1088 tmp |= ME4000_AI_CTRL_BIT_HF_IRQ;
1091 /* Write the setup to the control register */
1092 outl(tmp, info->ai_context.ctrl_reg);
1094 /* Write the channel list */
1095 ai_write_chanlist(dev, s, cmd);
1100 static int ai_write_chanlist(struct comedi_device *dev,
1101 struct comedi_subdevice *s, struct comedi_cmd *cmd)
1109 for (i = 0; i < cmd->chanlist_len; i++) {
1110 chan = CR_CHAN(cmd->chanlist[i]);
1111 rang = CR_RANGE(cmd->chanlist[i]);
1112 aref = CR_AREF(cmd->chanlist[i]);
1117 entry |= ME4000_AI_LIST_RANGE_UNIPOLAR_2_5;
1119 entry |= ME4000_AI_LIST_RANGE_UNIPOLAR_10;
1121 entry |= ME4000_AI_LIST_RANGE_BIPOLAR_2_5;
1123 entry |= ME4000_AI_LIST_RANGE_BIPOLAR_10;
1125 if (aref == SDF_DIFF)
1126 entry |= ME4000_AI_LIST_INPUT_DIFFERENTIAL;
1128 entry |= ME4000_AI_LIST_INPUT_SINGLE_ENDED;
1130 outl(entry, info->ai_context.channel_list_reg);
1136 static int me4000_ai_do_cmd(struct comedi_device *dev,
1137 struct comedi_subdevice *s)
1140 unsigned int init_ticks = 0;
1141 unsigned int scan_ticks = 0;
1142 unsigned int chan_ticks = 0;
1143 struct comedi_cmd *cmd = &s->async->cmd;
1145 /* Reset the analog input */
1146 err = me4000_ai_cancel(dev, s);
1150 /* Round the timer arguments */
1151 err = ai_round_cmd_args(dev,
1152 s, cmd, &init_ticks, &scan_ticks, &chan_ticks);
1156 /* Prepare the AI for acquisition */
1157 err = ai_prepare(dev, s, cmd, init_ticks, scan_ticks, chan_ticks);
1161 /* Start acquistion by dummy read */
1162 inl(info->ai_context.start_reg);
1168 * me4000_ai_do_cmd_test():
1170 * The demo cmd.c in ./comedilib/demo specifies 6 return values:
1174 * - invalid argument
1175 * - argument conflict
1176 * - invalid chanlist
1177 * So I tried to adopt this scheme.
1179 static int me4000_ai_do_cmd_test(struct comedi_device *dev,
1180 struct comedi_subdevice *s,
1181 struct comedi_cmd *cmd)
1184 unsigned int init_ticks;
1185 unsigned int chan_ticks;
1186 unsigned int scan_ticks;
1189 /* Only rounding flags are implemented */
1190 cmd->flags &= TRIG_ROUND_NEAREST | TRIG_ROUND_UP | TRIG_ROUND_DOWN;
1192 /* Round the timer arguments */
1193 ai_round_cmd_args(dev, s, cmd, &init_ticks, &scan_ticks, &chan_ticks);
1196 * Stage 1. Check if the trigger sources are generally valid.
1198 switch (cmd->start_src) {
1203 cmd->start_src &= TRIG_NOW | TRIG_EXT;
1208 "comedi%d: me4000: me4000_ai_do_cmd_test(): "
1209 "Invalid start source\n", dev->minor);
1210 cmd->start_src = TRIG_NOW;
1213 switch (cmd->scan_begin_src) {
1219 cmd->scan_begin_src &= TRIG_FOLLOW | TRIG_TIMER | TRIG_EXT;
1224 "comedi%d: me4000: me4000_ai_do_cmd_test(): "
1225 "Invalid scan begin source\n", dev->minor);
1226 cmd->scan_begin_src = TRIG_FOLLOW;
1229 switch (cmd->convert_src) {
1234 cmd->convert_src &= TRIG_TIMER | TRIG_EXT;
1239 "comedi%d: me4000: me4000_ai_do_cmd_test(): "
1240 "Invalid convert source\n", dev->minor);
1241 cmd->convert_src = TRIG_TIMER;
1244 switch (cmd->scan_end_src) {
1249 cmd->scan_end_src &= TRIG_NONE | TRIG_COUNT;
1254 "comedi%d: me4000: me4000_ai_do_cmd_test(): "
1255 "Invalid scan end source\n", dev->minor);
1256 cmd->scan_end_src = TRIG_NONE;
1259 switch (cmd->stop_src) {
1264 cmd->stop_src &= TRIG_NONE | TRIG_COUNT;
1269 "comedi%d: me4000: me4000_ai_do_cmd_test(): "
1270 "Invalid stop source\n", dev->minor);
1271 cmd->stop_src = TRIG_NONE;
1278 * Stage 2. Check for trigger source conflicts.
1280 if (cmd->start_src == TRIG_NOW &&
1281 cmd->scan_begin_src == TRIG_TIMER &&
1282 cmd->convert_src == TRIG_TIMER) {
1283 } else if (cmd->start_src == TRIG_NOW &&
1284 cmd->scan_begin_src == TRIG_FOLLOW &&
1285 cmd->convert_src == TRIG_TIMER) {
1286 } else if (cmd->start_src == TRIG_EXT &&
1287 cmd->scan_begin_src == TRIG_TIMER &&
1288 cmd->convert_src == TRIG_TIMER) {
1289 } else if (cmd->start_src == TRIG_EXT &&
1290 cmd->scan_begin_src == TRIG_FOLLOW &&
1291 cmd->convert_src == TRIG_TIMER) {
1292 } else if (cmd->start_src == TRIG_EXT &&
1293 cmd->scan_begin_src == TRIG_EXT &&
1294 cmd->convert_src == TRIG_TIMER) {
1295 } else if (cmd->start_src == TRIG_EXT &&
1296 cmd->scan_begin_src == TRIG_EXT &&
1297 cmd->convert_src == TRIG_EXT) {
1300 "comedi%d: me4000: me4000_ai_do_cmd_test(): "
1301 "Invalid start trigger combination\n", dev->minor);
1302 cmd->start_src = TRIG_NOW;
1303 cmd->scan_begin_src = TRIG_FOLLOW;
1304 cmd->convert_src = TRIG_TIMER;
1308 if (cmd->stop_src == TRIG_NONE && cmd->scan_end_src == TRIG_NONE) {
1309 } else if (cmd->stop_src == TRIG_COUNT &&
1310 cmd->scan_end_src == TRIG_NONE) {
1311 } else if (cmd->stop_src == TRIG_NONE &&
1312 cmd->scan_end_src == TRIG_COUNT) {
1313 } else if (cmd->stop_src == TRIG_COUNT &&
1314 cmd->scan_end_src == TRIG_COUNT) {
1317 "comedi%d: me4000: me4000_ai_do_cmd_test(): "
1318 "Invalid stop trigger combination\n", dev->minor);
1319 cmd->stop_src = TRIG_NONE;
1320 cmd->scan_end_src = TRIG_NONE;
1327 * Stage 3. Check if arguments are generally valid.
1329 if (cmd->chanlist_len < 1) {
1331 "comedi%d: me4000: me4000_ai_do_cmd_test(): "
1332 "No channel list\n", dev->minor);
1333 cmd->chanlist_len = 1;
1336 if (init_ticks < 66) {
1338 "comedi%d: me4000: me4000_ai_do_cmd_test(): "
1339 "Start arg to low\n", dev->minor);
1340 cmd->start_arg = 2000;
1343 if (scan_ticks && scan_ticks < 67) {
1345 "comedi%d: me4000: me4000_ai_do_cmd_test(): "
1346 "Scan begin arg to low\n", dev->minor);
1347 cmd->scan_begin_arg = 2031;
1350 if (chan_ticks < 66) {
1352 "comedi%d: me4000: me4000_ai_do_cmd_test(): "
1353 "Convert arg to low\n", dev->minor);
1354 cmd->convert_arg = 2000;
1362 * Stage 4. Check for argument conflicts.
1364 if (cmd->start_src == TRIG_NOW &&
1365 cmd->scan_begin_src == TRIG_TIMER &&
1366 cmd->convert_src == TRIG_TIMER) {
1368 /* Check timer arguments */
1369 if (init_ticks < ME4000_AI_MIN_TICKS) {
1371 "comedi%d: me4000: me4000_ai_do_cmd_test(): "
1372 "Invalid start arg\n", dev->minor);
1373 cmd->start_arg = 2000; /* 66 ticks at least */
1376 if (chan_ticks < ME4000_AI_MIN_TICKS) {
1378 "comedi%d: me4000: me4000_ai_do_cmd_test(): "
1379 "Invalid convert arg\n", dev->minor);
1380 cmd->convert_arg = 2000; /* 66 ticks at least */
1383 if (scan_ticks <= cmd->chanlist_len * chan_ticks) {
1385 "comedi%d: me4000: me4000_ai_do_cmd_test(): "
1386 "Invalid scan end arg\n", dev->minor);
1388 /* At least one tick more */
1389 cmd->scan_end_arg = 2000 * cmd->chanlist_len + 31;
1392 } else if (cmd->start_src == TRIG_NOW &&
1393 cmd->scan_begin_src == TRIG_FOLLOW &&
1394 cmd->convert_src == TRIG_TIMER) {
1396 /* Check timer arguments */
1397 if (init_ticks < ME4000_AI_MIN_TICKS) {
1399 "comedi%d: me4000: me4000_ai_do_cmd_test(): "
1400 "Invalid start arg\n", dev->minor);
1401 cmd->start_arg = 2000; /* 66 ticks at least */
1404 if (chan_ticks < ME4000_AI_MIN_TICKS) {
1406 "comedi%d: me4000: me4000_ai_do_cmd_test(): "
1407 "Invalid convert arg\n", dev->minor);
1408 cmd->convert_arg = 2000; /* 66 ticks at least */
1411 } else if (cmd->start_src == TRIG_EXT &&
1412 cmd->scan_begin_src == TRIG_TIMER &&
1413 cmd->convert_src == TRIG_TIMER) {
1415 /* Check timer arguments */
1416 if (init_ticks < ME4000_AI_MIN_TICKS) {
1418 "comedi%d: me4000: me4000_ai_do_cmd_test(): "
1419 "Invalid start arg\n", dev->minor);
1420 cmd->start_arg = 2000; /* 66 ticks at least */
1423 if (chan_ticks < ME4000_AI_MIN_TICKS) {
1425 "comedi%d: me4000: me4000_ai_do_cmd_test(): "
1426 "Invalid convert arg\n", dev->minor);
1427 cmd->convert_arg = 2000; /* 66 ticks at least */
1430 if (scan_ticks <= cmd->chanlist_len * chan_ticks) {
1432 "comedi%d: me4000: me4000_ai_do_cmd_test(): "
1433 "Invalid scan end arg\n", dev->minor);
1435 /* At least one tick more */
1436 cmd->scan_end_arg = 2000 * cmd->chanlist_len + 31;
1439 } else if (cmd->start_src == TRIG_EXT &&
1440 cmd->scan_begin_src == TRIG_FOLLOW &&
1441 cmd->convert_src == TRIG_TIMER) {
1443 /* Check timer arguments */
1444 if (init_ticks < ME4000_AI_MIN_TICKS) {
1446 "comedi%d: me4000: me4000_ai_do_cmd_test(): "
1447 "Invalid start arg\n", dev->minor);
1448 cmd->start_arg = 2000; /* 66 ticks at least */
1451 if (chan_ticks < ME4000_AI_MIN_TICKS) {
1453 "comedi%d: me4000: me4000_ai_do_cmd_test(): "
1454 "Invalid convert arg\n", dev->minor);
1455 cmd->convert_arg = 2000; /* 66 ticks at least */
1458 } else if (cmd->start_src == TRIG_EXT &&
1459 cmd->scan_begin_src == TRIG_EXT &&
1460 cmd->convert_src == TRIG_TIMER) {
1462 /* Check timer arguments */
1463 if (init_ticks < ME4000_AI_MIN_TICKS) {
1465 "comedi%d: me4000: me4000_ai_do_cmd_test(): "
1466 "Invalid start arg\n", dev->minor);
1467 cmd->start_arg = 2000; /* 66 ticks at least */
1470 if (chan_ticks < ME4000_AI_MIN_TICKS) {
1472 "comedi%d: me4000: me4000_ai_do_cmd_test(): "
1473 "Invalid convert arg\n", dev->minor);
1474 cmd->convert_arg = 2000; /* 66 ticks at least */
1477 } else if (cmd->start_src == TRIG_EXT &&
1478 cmd->scan_begin_src == TRIG_EXT &&
1479 cmd->convert_src == TRIG_EXT) {
1481 /* Check timer arguments */
1482 if (init_ticks < ME4000_AI_MIN_TICKS) {
1484 "comedi%d: me4000: me4000_ai_do_cmd_test(): "
1485 "Invalid start arg\n", dev->minor);
1486 cmd->start_arg = 2000; /* 66 ticks at least */
1490 if (cmd->stop_src == TRIG_COUNT) {
1491 if (cmd->stop_arg == 0) {
1493 "comedi%d: me4000: me4000_ai_do_cmd_test(): "
1494 "Invalid stop arg\n", dev->minor);
1499 if (cmd->scan_end_src == TRIG_COUNT) {
1500 if (cmd->scan_end_arg == 0) {
1502 "comedi%d: me4000: me4000_ai_do_cmd_test(): "
1503 "Invalid scan end arg\n", dev->minor);
1504 cmd->scan_end_arg = 1;
1513 * Stage 5. Check the channel list.
1515 if (ai_check_chanlist(dev, s, cmd))
1521 static irqreturn_t me4000_ai_isr(int irq, void *dev_id)
1524 struct comedi_device *dev = dev_id;
1525 struct comedi_subdevice *s = &dev->subdevices[0];
1526 struct me4000_ai_context *ai_context = &info->ai_context;
1534 /* Reset all events */
1535 s->async->events = 0;
1537 /* Check if irq number is right */
1538 if (irq != ai_context->irq) {
1540 "comedi%d: me4000: me4000_ai_isr(): "
1541 "Incorrect interrupt num: %d\n", dev->minor, irq);
1545 if (inl(ai_context->irq_status_reg) &
1546 ME4000_IRQ_STATUS_BIT_AI_HF) {
1547 /* Read status register to find out what happened */
1548 tmp = inl(ai_context->ctrl_reg);
1550 if (!(tmp & ME4000_AI_STATUS_BIT_FF_DATA) &&
1551 !(tmp & ME4000_AI_STATUS_BIT_HF_DATA) &&
1552 (tmp & ME4000_AI_STATUS_BIT_EF_DATA)) {
1553 c = ME4000_AI_FIFO_COUNT;
1556 * FIFO overflow, so stop conversion
1557 * and disable all interrupts
1559 tmp |= ME4000_AI_CTRL_BIT_IMMEDIATE_STOP;
1560 tmp &= ~(ME4000_AI_CTRL_BIT_HF_IRQ |
1561 ME4000_AI_CTRL_BIT_SC_IRQ);
1562 outl(tmp, ai_context->ctrl_reg);
1564 s->async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1567 "comedi%d: me4000: me4000_ai_isr(): "
1568 "FIFO overflow\n", dev->minor);
1569 } else if ((tmp & ME4000_AI_STATUS_BIT_FF_DATA)
1570 && !(tmp & ME4000_AI_STATUS_BIT_HF_DATA)
1571 && (tmp & ME4000_AI_STATUS_BIT_EF_DATA)) {
1572 s->async->events |= COMEDI_CB_BLOCK;
1574 c = ME4000_AI_FIFO_COUNT / 2;
1577 "comedi%d: me4000: me4000_ai_isr(): "
1578 "Can't determine state of fifo\n", dev->minor);
1582 * Undefined state, so stop conversion
1583 * and disable all interrupts
1585 tmp |= ME4000_AI_CTRL_BIT_IMMEDIATE_STOP;
1586 tmp &= ~(ME4000_AI_CTRL_BIT_HF_IRQ |
1587 ME4000_AI_CTRL_BIT_SC_IRQ);
1588 outl(tmp, ai_context->ctrl_reg);
1590 s->async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1593 "comedi%d: me4000: me4000_ai_isr(): "
1594 "Undefined FIFO state\n", dev->minor);
1597 for (i = 0; i < c; i++) {
1598 /* Read value from data fifo */
1599 lval = inl(ai_context->data_reg) & 0xFFFF;
1602 if (!comedi_buf_put(s->async, lval)) {
1604 * Buffer overflow, so stop conversion
1605 * and disable all interrupts
1607 tmp |= ME4000_AI_CTRL_BIT_IMMEDIATE_STOP;
1608 tmp &= ~(ME4000_AI_CTRL_BIT_HF_IRQ |
1609 ME4000_AI_CTRL_BIT_SC_IRQ);
1610 outl(tmp, ai_context->ctrl_reg);
1612 s->async->events |= COMEDI_CB_OVERFLOW;
1615 "comedi%d: me4000: me4000_ai_isr(): "
1616 "Buffer overflow\n", dev->minor);
1622 /* Work is done, so reset the interrupt */
1623 tmp |= ME4000_AI_CTRL_BIT_HF_IRQ_RESET;
1624 outl(tmp, ai_context->ctrl_reg);
1625 tmp &= ~ME4000_AI_CTRL_BIT_HF_IRQ_RESET;
1626 outl(tmp, ai_context->ctrl_reg);
1629 if (inl(ai_context->irq_status_reg) & ME4000_IRQ_STATUS_BIT_SC) {
1630 s->async->events |= COMEDI_CB_BLOCK | COMEDI_CB_EOA;
1633 * Acquisition is complete, so stop
1634 * conversion and disable all interrupts
1636 tmp = inl(ai_context->ctrl_reg);
1637 tmp |= ME4000_AI_CTRL_BIT_IMMEDIATE_STOP;
1638 tmp &= ~(ME4000_AI_CTRL_BIT_HF_IRQ | ME4000_AI_CTRL_BIT_SC_IRQ);
1639 outl(tmp, ai_context->ctrl_reg);
1641 /* Poll data until fifo empty */
1642 while (inl(ai_context->ctrl_reg) & ME4000_AI_STATUS_BIT_EF_DATA) {
1643 /* Read value from data fifo */
1644 lval = inl(ai_context->data_reg) & 0xFFFF;
1647 if (!comedi_buf_put(s->async, lval)) {
1649 "comedi%d: me4000: me4000_ai_isr(): "
1650 "Buffer overflow\n", dev->minor);
1651 s->async->events |= COMEDI_CB_OVERFLOW;
1656 /* Work is done, so reset the interrupt */
1657 tmp |= ME4000_AI_CTRL_BIT_SC_IRQ_RESET;
1658 outl(tmp, ai_context->ctrl_reg);
1659 tmp &= ~ME4000_AI_CTRL_BIT_SC_IRQ_RESET;
1660 outl(tmp, ai_context->ctrl_reg);
1663 if (s->async->events)
1664 comedi_event(dev, s);
1669 /*=============================================================================
1670 Analog output section
1671 ===========================================================================*/
1673 static int me4000_ao_insn_write(struct comedi_device *dev,
1674 struct comedi_subdevice *s,
1675 struct comedi_insn *insn, unsigned int *data)
1678 int chan = CR_CHAN(insn->chanspec);
1679 int rang = CR_RANGE(insn->chanspec);
1680 int aref = CR_AREF(insn->chanspec);
1685 } else if (insn->n > 1) {
1687 "comedi%d: me4000: me4000_ao_insn_write(): "
1688 "Invalid instruction length %d\n", dev->minor, insn->n);
1692 if (chan >= thisboard->ao.count) {
1694 "comedi%d: me4000: me4000_ao_insn_write(): "
1695 "Invalid channel %d\n", dev->minor, insn->n);
1701 "comedi%d: me4000: me4000_ao_insn_write(): "
1702 "Invalid range %d\n", dev->minor, insn->n);
1706 if (aref != AREF_GROUND && aref != AREF_COMMON) {
1708 "comedi%d: me4000: me4000_ao_insn_write(): "
1709 "Invalid aref %d\n", dev->minor, insn->n);
1713 /* Stop any running conversion */
1714 tmp = inl(info->ao_context[chan].ctrl_reg);
1715 tmp |= ME4000_AO_CTRL_BIT_IMMEDIATE_STOP;
1716 outl(tmp, info->ao_context[chan].ctrl_reg);
1718 /* Clear control register and set to single mode */
1719 outl(0x0, info->ao_context[chan].ctrl_reg);
1721 /* Write data value */
1722 outl(data[0], info->ao_context[chan].single_reg);
1724 /* Store in the mirror */
1725 info->ao_context[chan].mirror = data[0];
1730 static int me4000_ao_insn_read(struct comedi_device *dev,
1731 struct comedi_subdevice *s,
1732 struct comedi_insn *insn, unsigned int *data)
1734 int chan = CR_CHAN(insn->chanspec);
1738 } else if (insn->n > 1) {
1740 ("comedi%d: me4000: me4000_ao_insn_read(): "
1741 "Invalid instruction length\n", dev->minor);
1745 data[0] = info->ao_context[chan].mirror;
1750 /*=============================================================================
1752 ===========================================================================*/
1754 static int me4000_dio_insn_bits(struct comedi_device *dev,
1755 struct comedi_subdevice *s,
1756 struct comedi_insn *insn, unsigned int *data)
1759 * The insn data consists of a mask in data[0] and the new data
1760 * in data[1]. The mask defines which bits we are concerning about.
1761 * The new data must be anded with the mask.
1762 * Each channel corresponds to a bit.
1765 /* Check if requested ports are configured for output */
1766 if ((s->io_bits & data[0]) != data[0])
1769 s->state &= ~data[0];
1770 s->state |= data[0] & data[1];
1772 /* Write out the new digital output lines */
1773 outl((s->state >> 0) & 0xFF,
1774 info->dio_context.port_0_reg);
1775 outl((s->state >> 8) & 0xFF,
1776 info->dio_context.port_1_reg);
1777 outl((s->state >> 16) & 0xFF,
1778 info->dio_context.port_2_reg);
1779 outl((s->state >> 24) & 0xFF,
1780 info->dio_context.port_3_reg);
1783 /* On return, data[1] contains the value of
1784 the digital input and output lines. */
1785 data[1] = ((inl(info->dio_context.port_0_reg) & 0xFF) << 0) |
1786 ((inl(info->dio_context.port_1_reg) & 0xFF) << 8) |
1787 ((inl(info->dio_context.port_2_reg) & 0xFF) << 16) |
1788 ((inl(info->dio_context.port_3_reg) & 0xFF) << 24);
1793 static int me4000_dio_insn_config(struct comedi_device *dev,
1794 struct comedi_subdevice *s,
1795 struct comedi_insn *insn, unsigned int *data)
1798 int chan = CR_CHAN(insn->chanspec);
1803 case INSN_CONFIG_DIO_QUERY:
1805 (s->io_bits & (1 << chan)) ? COMEDI_OUTPUT : COMEDI_INPUT;
1807 case INSN_CONFIG_DIO_INPUT:
1808 case INSN_CONFIG_DIO_OUTPUT:
1813 * The input or output configuration of each digital line is
1814 * configured by a special insn_config instruction. chanspec
1815 * contains the channel to be changed, and data[0] contains the
1816 * value INSN_CONFIG_DIO_INPUT or INSN_CONFIG_DIO_OUTPUT.
1817 * On the ME-4000 it is only possible to switch port wise (8 bit)
1820 tmp = inl(info->dio_context.ctrl_reg);
1822 if (data[0] == INSN_CONFIG_DIO_OUTPUT) {
1825 tmp &= ~(ME4000_DIO_CTRL_BIT_MODE_0 |
1826 ME4000_DIO_CTRL_BIT_MODE_1);
1827 tmp |= ME4000_DIO_CTRL_BIT_MODE_0;
1828 } else if (chan < 16) {
1830 * Chech for optoisolated ME-4000 version.
1831 * If one the first port is a fixed output
1832 * port and the second is a fixed input port.
1834 if (!inl(info->dio_context.dir_reg))
1837 s->io_bits |= 0xFF00;
1838 tmp &= ~(ME4000_DIO_CTRL_BIT_MODE_2 |
1839 ME4000_DIO_CTRL_BIT_MODE_3);
1840 tmp |= ME4000_DIO_CTRL_BIT_MODE_2;
1841 } else if (chan < 24) {
1842 s->io_bits |= 0xFF0000;
1843 tmp &= ~(ME4000_DIO_CTRL_BIT_MODE_4 |
1844 ME4000_DIO_CTRL_BIT_MODE_5);
1845 tmp |= ME4000_DIO_CTRL_BIT_MODE_4;
1846 } else if (chan < 32) {
1847 s->io_bits |= 0xFF000000;
1848 tmp &= ~(ME4000_DIO_CTRL_BIT_MODE_6 |
1849 ME4000_DIO_CTRL_BIT_MODE_7);
1850 tmp |= ME4000_DIO_CTRL_BIT_MODE_6;
1857 * Chech for optoisolated ME-4000 version.
1858 * If one the first port is a fixed output
1859 * port and the second is a fixed input port.
1861 if (!inl(info->dio_context.dir_reg))
1864 s->io_bits &= ~0xFF;
1865 tmp &= ~(ME4000_DIO_CTRL_BIT_MODE_0 |
1866 ME4000_DIO_CTRL_BIT_MODE_1);
1867 } else if (chan < 16) {
1868 s->io_bits &= ~0xFF00;
1869 tmp &= ~(ME4000_DIO_CTRL_BIT_MODE_2 |
1870 ME4000_DIO_CTRL_BIT_MODE_3);
1871 } else if (chan < 24) {
1872 s->io_bits &= ~0xFF0000;
1873 tmp &= ~(ME4000_DIO_CTRL_BIT_MODE_4 |
1874 ME4000_DIO_CTRL_BIT_MODE_5);
1875 } else if (chan < 32) {
1876 s->io_bits &= ~0xFF000000;
1877 tmp &= ~(ME4000_DIO_CTRL_BIT_MODE_6 |
1878 ME4000_DIO_CTRL_BIT_MODE_7);
1884 outl(tmp, info->dio_context.ctrl_reg);
1889 /*=============================================================================
1891 ===========================================================================*/
1893 static int cnt_reset(struct comedi_device *dev, unsigned int channel)
1897 outb(0x30, info->cnt_context.ctrl_reg);
1898 outb(0x00, info->cnt_context.counter_0_reg);
1899 outb(0x00, info->cnt_context.counter_0_reg);
1902 outb(0x70, info->cnt_context.ctrl_reg);
1903 outb(0x00, info->cnt_context.counter_1_reg);
1904 outb(0x00, info->cnt_context.counter_1_reg);
1907 outb(0xB0, info->cnt_context.ctrl_reg);
1908 outb(0x00, info->cnt_context.counter_2_reg);
1909 outb(0x00, info->cnt_context.counter_2_reg);
1913 "comedi%d: me4000: cnt_reset(): Invalid channel\n",
1921 static int cnt_config(struct comedi_device *dev, unsigned int channel,
1928 tmp |= ME4000_CNT_COUNTER_0;
1931 tmp |= ME4000_CNT_COUNTER_1;
1934 tmp |= ME4000_CNT_COUNTER_2;
1938 "comedi%d: me4000: cnt_config(): Invalid channel\n",
1945 tmp |= ME4000_CNT_MODE_0;
1948 tmp |= ME4000_CNT_MODE_1;
1951 tmp |= ME4000_CNT_MODE_2;
1954 tmp |= ME4000_CNT_MODE_3;
1957 tmp |= ME4000_CNT_MODE_4;
1960 tmp |= ME4000_CNT_MODE_5;
1964 "comedi%d: me4000: cnt_config(): Invalid counter mode\n",
1969 /* Write the control word */
1971 outb(tmp, info->cnt_context.ctrl_reg);
1976 static int me4000_cnt_insn_config(struct comedi_device *dev,
1977 struct comedi_subdevice *s,
1978 struct comedi_insn *insn, unsigned int *data)
1987 "comedi%d: me4000: me4000_cnt_insn_config(): "
1988 "Invalid instruction length%d\n",
1989 dev->minor, insn->n);
1993 err = cnt_reset(dev, insn->chanspec);
1997 case GPCT_SET_OPERATION:
2000 "comedi%d: me4000: me4000_cnt_insn_config(): "
2001 "Invalid instruction length%d\n",
2002 dev->minor, insn->n);
2006 err = cnt_config(dev, insn->chanspec, data[1]);
2012 "comedi%d: me4000: me4000_cnt_insn_config(): "
2013 "Invalid instruction\n", dev->minor);
2020 static int me4000_cnt_insn_read(struct comedi_device *dev,
2021 struct comedi_subdevice *s,
2022 struct comedi_insn *insn, unsigned int *data)
2032 "comedi%d: me4000: me4000_cnt_insn_read(): "
2033 "Invalid instruction length %d\n",
2034 dev->minor, insn->n);
2038 switch (insn->chanspec) {
2040 tmp = inb(info->cnt_context.counter_0_reg);
2042 tmp = inb(info->cnt_context.counter_0_reg);
2043 data[0] |= tmp << 8;
2046 tmp = inb(info->cnt_context.counter_1_reg);
2048 tmp = inb(info->cnt_context.counter_1_reg);
2049 data[0] |= tmp << 8;
2052 tmp = inb(info->cnt_context.counter_2_reg);
2054 tmp = inb(info->cnt_context.counter_2_reg);
2055 data[0] |= tmp << 8;
2059 "comedi%d: me4000: me4000_cnt_insn_read(): "
2060 "Invalid channel %d\n",
2061 dev->minor, insn->chanspec);
2068 static int me4000_cnt_insn_write(struct comedi_device *dev,
2069 struct comedi_subdevice *s,
2070 struct comedi_insn *insn, unsigned int *data)
2077 } else if (insn->n > 1) {
2079 "comedi%d: me4000: me4000_cnt_insn_write(): "
2080 "Invalid instruction length %d\n",
2081 dev->minor, insn->n);
2085 switch (insn->chanspec) {
2087 tmp = data[0] & 0xFF;
2088 outb(tmp, info->cnt_context.counter_0_reg);
2089 tmp = (data[0] >> 8) & 0xFF;
2090 outb(tmp, info->cnt_context.counter_0_reg);
2093 tmp = data[0] & 0xFF;
2094 outb(tmp, info->cnt_context.counter_1_reg);
2095 tmp = (data[0] >> 8) & 0xFF;
2096 outb(tmp, info->cnt_context.counter_1_reg);
2099 tmp = data[0] & 0xFF;
2100 outb(tmp, info->cnt_context.counter_2_reg);
2101 tmp = (data[0] >> 8) & 0xFF;
2102 outb(tmp, info->cnt_context.counter_2_reg);
2106 "comedi%d: me4000: me4000_cnt_insn_write(): "
2107 "Invalid channel %d\n",
2108 dev->minor, insn->chanspec);
2115 static int me4000_attach(struct comedi_device *dev, struct comedi_devconfig *it)
2117 struct comedi_subdevice *s;
2120 result = me4000_probe(dev, it);
2124 result = comedi_alloc_subdevices(dev, 4);
2128 /*=========================================================================
2129 Analog input subdevice
2130 ========================================================================*/
2132 s = &dev->subdevices[0];
2134 if (thisboard->ai_nchan) {
2135 s->type = COMEDI_SUBD_AI;
2137 SDF_READABLE | SDF_COMMON | SDF_GROUND | SDF_DIFF;
2138 s->n_chan = thisboard->ai_nchan;
2139 s->maxdata = 0xFFFF; /* 16 bit ADC */
2140 s->len_chanlist = ME4000_AI_CHANNEL_LIST_COUNT;
2141 s->range_table = &me4000_ai_range;
2142 s->insn_read = me4000_ai_insn_read;
2144 if (info->irq > 0) {
2145 if (request_irq(info->irq, me4000_ai_isr,
2146 IRQF_SHARED, "ME-4000", dev)) {
2148 ("comedi%d: me4000: me4000_attach(): "
2149 "Unable to allocate irq\n", dev->minor);
2151 dev->read_subdev = s;
2152 s->subdev_flags |= SDF_CMD_READ;
2153 s->cancel = me4000_ai_cancel;
2154 s->do_cmdtest = me4000_ai_do_cmd_test;
2155 s->do_cmd = me4000_ai_do_cmd;
2159 "comedi%d: me4000: me4000_attach(): "
2160 "No interrupt available\n", dev->minor);
2163 s->type = COMEDI_SUBD_UNUSED;
2166 /*=========================================================================
2167 Analog output subdevice
2168 ========================================================================*/
2170 s = &dev->subdevices[1];
2172 if (thisboard->ao.count) {
2173 s->type = COMEDI_SUBD_AO;
2174 s->subdev_flags = SDF_WRITEABLE | SDF_COMMON | SDF_GROUND;
2175 s->n_chan = thisboard->ao.count;
2176 s->maxdata = 0xFFFF; /* 16 bit DAC */
2177 s->range_table = &me4000_ao_range;
2178 s->insn_write = me4000_ao_insn_write;
2179 s->insn_read = me4000_ao_insn_read;
2181 s->type = COMEDI_SUBD_UNUSED;
2184 /*=========================================================================
2185 Digital I/O subdevice
2186 ========================================================================*/
2188 s = &dev->subdevices[2];
2190 if (thisboard->dio_nchan) {
2191 s->type = COMEDI_SUBD_DIO;
2192 s->subdev_flags = SDF_READABLE | SDF_WRITABLE;
2193 s->n_chan = thisboard->dio_nchan;
2195 s->range_table = &range_digital;
2196 s->insn_bits = me4000_dio_insn_bits;
2197 s->insn_config = me4000_dio_insn_config;
2199 s->type = COMEDI_SUBD_UNUSED;
2203 * Check for optoisolated ME-4000 version. If one the first
2204 * port is a fixed output port and the second is a fixed input port.
2206 if (!inl(info->dio_context.dir_reg)) {
2208 outl(ME4000_DIO_CTRL_BIT_MODE_0, info->dio_context.dir_reg);
2211 /*=========================================================================
2213 ========================================================================*/
2215 s = &dev->subdevices[3];
2217 if (thisboard->has_counter) {
2218 s->type = COMEDI_SUBD_COUNTER;
2219 s->subdev_flags = SDF_READABLE | SDF_WRITABLE;
2221 s->maxdata = 0xFFFF; /* 16 bit counters */
2222 s->insn_read = me4000_cnt_insn_read;
2223 s->insn_write = me4000_cnt_insn_write;
2224 s->insn_config = me4000_cnt_insn_config;
2226 s->type = COMEDI_SUBD_UNUSED;
2232 static void me4000_detach(struct comedi_device *dev)
2235 if (info->pci_dev_p) {
2237 if (info->plx_regbase)
2238 comedi_pci_disable(info->pci_dev_p);
2239 pci_dev_put(info->pci_dev_p);
2244 static struct comedi_driver me4000_driver = {
2245 .driver_name = "me4000",
2246 .module = THIS_MODULE,
2247 .attach = me4000_attach,
2248 .detach = me4000_detach,
2251 static int __devinit me4000_pci_probe(struct pci_dev *dev,
2252 const struct pci_device_id *ent)
2254 return comedi_pci_auto_config(dev, &me4000_driver);
2257 static void __devexit me4000_pci_remove(struct pci_dev *dev)
2259 comedi_pci_auto_unconfig(dev);
2262 static DEFINE_PCI_DEVICE_TABLE(me4000_pci_table) = {
2263 { PCI_DEVICE(PCI_VENDOR_ID_MEILHAUS, 0x4650) },
2264 { PCI_DEVICE(PCI_VENDOR_ID_MEILHAUS, 0x4660) },
2265 { PCI_DEVICE(PCI_VENDOR_ID_MEILHAUS, 0x4661) },
2266 { PCI_DEVICE(PCI_VENDOR_ID_MEILHAUS, 0x4662) },
2267 { PCI_DEVICE(PCI_VENDOR_ID_MEILHAUS, 0x4663) },
2268 { PCI_DEVICE(PCI_VENDOR_ID_MEILHAUS, 0x4670) },
2269 { PCI_DEVICE(PCI_VENDOR_ID_MEILHAUS, 0x4671) },
2270 { PCI_DEVICE(PCI_VENDOR_ID_MEILHAUS, 0x4672) },
2271 { PCI_DEVICE(PCI_VENDOR_ID_MEILHAUS, 0x4673) },
2272 { PCI_DEVICE(PCI_VENDOR_ID_MEILHAUS, 0x4680) },
2273 { PCI_DEVICE(PCI_VENDOR_ID_MEILHAUS, 0x4681) },
2274 { PCI_DEVICE(PCI_VENDOR_ID_MEILHAUS, 0x4682) },
2275 { PCI_DEVICE(PCI_VENDOR_ID_MEILHAUS, 0x4683) },
2278 MODULE_DEVICE_TABLE(pci, me4000_pci_table);
2280 static struct pci_driver me4000_pci_driver = {
2282 .id_table = me4000_pci_table,
2283 .probe = me4000_pci_probe,
2284 .remove = __devexit_p(me4000_pci_remove),
2286 module_comedi_pci_driver(me4000_driver, me4000_pci_driver);
2288 MODULE_AUTHOR("Comedi http://www.comedi.org");
2289 MODULE_DESCRIPTION("Comedi low-level driver");
2290 MODULE_LICENSE("GPL");