drivers/staging/comedi/drivers/gsc_hpdi.c

   1 /*
   2     comedi/drivers/gsc_hpdi.c
   3     This is a driver for the General Standards Corporation High
   4     Speed Parallel Digital Interface rs485 boards.
   5
   6     Author:  Frank Mori Hess <fmhess@users.sourceforge.net>
   7     Copyright (C) 2003 Coherent Imaging Systems
   8
   9     COMEDI - Linux Control and Measurement Device Interface
  10     Copyright (C) 1997-8 David A. Schleef <ds@schleef.org>
  11
  12     This program is free software; you can redistribute it and/or modify
  13     it under the terms of the GNU General Public License as published by
  14     the Free Software Foundation; either version 2 of the License, or
  15     (at your option) any later version.
  16
  17     This program is distributed in the hope that it will be useful,
  18     but WITHOUT ANY WARRANTY; without even the implied warranty of
  19     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  20     GNU General Public License for more details.
  21
  22     You should have received a copy of the GNU General Public License
  23     along with this program; if not, write to the Free Software
  24     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  25
  26 ************************************************************************/
  27
  28 /*
  29
  30 Driver: gsc_hpdi
  31 Description: General Standards Corporation High
  32     Speed Parallel Digital Interface rs485 boards
  33 Author: Frank Mori Hess <fmhess@users.sourceforge.net>
  34 Status: only receive mode works, transmit not supported
  35 Updated: 2003-02-20
  36 Devices: [General Standards Corporation] PCI-HPDI32 (gsc_hpdi),
  37   PMC-HPDI32
  38
  39 Configuration options:
  40    [0] - PCI bus of device (optional)
  41    [1] - PCI slot of device (optional)
  42
  43 There are some additional hpdi models available from GSC for which
  44 support could be added to this driver.
  45
  46 */
  47
  48 #include <linux/interrupt.h>
  49 #include "../comedidev.h"
  50 #include <linux/delay.h>
  51
  52 #include "comedi_pci.h"
  53 #include "plx9080.h"
  54 #include "comedi_fc.h"
  55
  56 static int hpdi_attach(struct comedi_device *dev, struct comedi_devconfig *it);
  57 static int hpdi_detach(struct comedi_device *dev);
  58 static void abort_dma(struct comedi_device *dev, unsigned int channel);
  59 static int hpdi_cmd(struct comedi_device *dev, struct comedi_subdevice *s);
  60 static int hpdi_cmd_test(struct comedi_device *dev, struct comedi_subdevice *s,
  61                          struct comedi_cmd *cmd);
  62 static int hpdi_cancel(struct comedi_device *dev, struct comedi_subdevice *s);
  63 static irqreturn_t handle_interrupt(int irq, void *d);
  64 static int dio_config_block_size(struct comedi_device *dev, unsigned int *data);
  65
  66 #undef HPDI_DEBUG               /*  disable debugging messages */
  67 /* #define HPDI_DEBUG      enable debugging code */
  68
  69 #ifdef HPDI_DEBUG
  70 #define DEBUG_PRINT(format, args...)  printk(format , ## args)
  71 #else
  72 #define DEBUG_PRINT(format, args...)
  73 #endif
  74
  75 #define TIMER_BASE 50           /*  20MHz master clock */
  76 #define DMA_BUFFER_SIZE 0x10000
  77 #define NUM_DMA_BUFFERS 4
  78 #define NUM_DMA_DESCRIPTORS 256
  79
  80 /* indices of base address regions */
  81 enum base_address_regions {
  82         PLX9080_BADDRINDEX = 0,
  83         HPDI_BADDRINDEX = 2,
  84 };
  85
  86 enum hpdi_registers {
  87         FIRMWARE_REV_REG = 0x0,
  88         BOARD_CONTROL_REG = 0x4,
  89         BOARD_STATUS_REG = 0x8,
  90         TX_PROG_ALMOST_REG = 0xc,
  91         RX_PROG_ALMOST_REG = 0x10,
  92         FEATURES_REG = 0x14,
  93         FIFO_REG = 0x18,
  94         TX_STATUS_COUNT_REG = 0x1c,
  95         TX_LINE_VALID_COUNT_REG = 0x20,
  96         TX_LINE_INVALID_COUNT_REG = 0x24,
  97         RX_STATUS_COUNT_REG = 0x28,
  98         RX_LINE_COUNT_REG = 0x2c,
  99         INTERRUPT_CONTROL_REG = 0x30,
 100         INTERRUPT_STATUS_REG = 0x34,
 101         TX_CLOCK_DIVIDER_REG = 0x38,
 102         TX_FIFO_SIZE_REG = 0x40,
 103         RX_FIFO_SIZE_REG = 0x44,
 104         TX_FIFO_WORDS_REG = 0x48,
 105         RX_FIFO_WORDS_REG = 0x4c,
 106         INTERRUPT_EDGE_LEVEL_REG = 0x50,
 107         INTERRUPT_POLARITY_REG = 0x54,
 108 };
 109
 110 int command_channel_valid(unsigned int channel)
 111 {
 112         if (channel == 0 || channel > 6) {
 113                 printk(KERN_WARNING
 114                        "gsc_hpdi: bug! invalid cable command channel\n");
 115                 return 0;
 116         }
 117         return 1;
 118 }
 119
 120 /* bit definitions */
 121
 122 enum firmware_revision_bits {
 123         FEATURES_REG_PRESENT_BIT = 0x8000,
 124 };
 125 int firmware_revision(uint32_t fwr_bits)
 126 {
 127         return fwr_bits & 0xff;
 128 }
 129
 130 int pcb_revision(uint32_t fwr_bits)
 131 {
 132         return (fwr_bits >> 8) & 0xff;
 133 }
 134
 135 int hpdi_subid(uint32_t fwr_bits)
 136 {
 137         return (fwr_bits >> 16) & 0xff;
 138 }
 139
 140 enum board_control_bits {
 141         BOARD_RESET_BIT = 0x1,  /* wait 10usec before accessing fifos */
 142         TX_FIFO_RESET_BIT = 0x2,
 143         RX_FIFO_RESET_BIT = 0x4,
 144         TX_ENABLE_BIT = 0x10,
 145         RX_ENABLE_BIT = 0x20,
 146         DEMAND_DMA_DIRECTION_TX_BIT = 0x40,
 147                 /* for ch 0, ch 1 can only transmit (when present) */
 148         LINE_VALID_ON_STATUS_VALID_BIT = 0x80,
 149         START_TX_BIT = 0x10,
 150         CABLE_THROTTLE_ENABLE_BIT = 0x20,
 151         TEST_MODE_ENABLE_BIT = 0x80000000,
 152 };
 153 uint32_t command_discrete_output_bits(unsigned int channel, int output,
 154                                       int output_value)
 155 {
 156         uint32_t bits = 0;
 157
 158         if (command_channel_valid(channel) == 0)
 159                 return 0;
 160         if (output) {
 161                 bits |= 0x1 << (16 + channel);
 162                 if (output_value)
 163                         bits |= 0x1 << (24 + channel);
 164         } else
 165                 bits |= 0x1 << (24 + channel);
 166
 167         return bits;
 168 }
 169
 170 enum board_status_bits {
 171         COMMAND_LINE_STATUS_MASK = 0x7f,
 172         TX_IN_PROGRESS_BIT = 0x80,
 173         TX_NOT_EMPTY_BIT = 0x100,
 174         TX_NOT_ALMOST_EMPTY_BIT = 0x200,
 175         TX_NOT_ALMOST_FULL_BIT = 0x400,
 176         TX_NOT_FULL_BIT = 0x800,
 177         RX_NOT_EMPTY_BIT = 0x1000,
 178         RX_NOT_ALMOST_EMPTY_BIT = 0x2000,
 179         RX_NOT_ALMOST_FULL_BIT = 0x4000,
 180         RX_NOT_FULL_BIT = 0x8000,
 181         BOARD_JUMPER0_INSTALLED_BIT = 0x10000,
 182         BOARD_JUMPER1_INSTALLED_BIT = 0x20000,
 183         TX_OVERRUN_BIT = 0x200000,
 184         RX_UNDERRUN_BIT = 0x400000,
 185         RX_OVERRUN_BIT = 0x800000,
 186 };
 187
 188 uint32_t almost_full_bits(unsigned int num_words)
 189 {
 190 /* XXX need to add or subtract one? */
 191         return (num_words << 16) & 0xff0000;
 192 }
 193
 194 uint32_t almost_empty_bits(unsigned int num_words)
 195 {
 196         return num_words & 0xffff;
 197 }
 198
 199 unsigned int almost_full_num_words(uint32_t bits)
 200 {
 201 /* XXX need to add or subtract one? */
 202         return (bits >> 16) & 0xffff;
 203 }
 204
 205 unsigned int almost_empty_num_words(uint32_t bits)
 206 {
 207         return bits & 0xffff;
 208 }
 209
 210 enum features_bits {
 211         FIFO_SIZE_PRESENT_BIT = 0x1,
 212         FIFO_WORDS_PRESENT_BIT = 0x2,
 213         LEVEL_EDGE_INTERRUPTS_PRESENT_BIT = 0x4,
 214         GPIO_SUPPORTED_BIT = 0x8,
 215         PLX_DMA_CH1_SUPPORTED_BIT = 0x10,
 216         OVERRUN_UNDERRUN_SUPPORTED_BIT = 0x20,
 217 };
 218
 219 enum interrupt_sources {
 220         FRAME_VALID_START_INTR = 0,
 221         FRAME_VALID_END_INTR = 1,
 222         TX_FIFO_EMPTY_INTR = 8,
 223         TX_FIFO_ALMOST_EMPTY_INTR = 9,
 224         TX_FIFO_ALMOST_FULL_INTR = 10,
 225         TX_FIFO_FULL_INTR = 11,
 226         RX_EMPTY_INTR = 12,
 227         RX_ALMOST_EMPTY_INTR = 13,
 228         RX_ALMOST_FULL_INTR = 14,
 229         RX_FULL_INTR = 15,
 230 };
 231 int command_intr_source(unsigned int channel)
 232 {
 233         if (command_channel_valid(channel) == 0)
 234                 channel = 1;
 235         return channel + 1;
 236 }
 237
 238 uint32_t intr_bit(int interrupt_source)
 239 {
 240         return 0x1 << interrupt_source;
 241 }
 242
 243 uint32_t tx_clock_divisor_bits(unsigned int divisor)
 244 {
 245         return divisor & 0xff;
 246 }
 247
 248 unsigned int fifo_size(uint32_t fifo_size_bits)
 249 {
 250         return fifo_size_bits & 0xfffff;
 251 }
 252
 253 unsigned int fifo_words(uint32_t fifo_words_bits)
 254 {
 255         return fifo_words_bits & 0xfffff;
 256 }
 257
 258 uint32_t intr_edge_bit(int interrupt_source)
 259 {
 260         return 0x1 << interrupt_source;
 261 }
 262
 263 uint32_t intr_active_high_bit(int interrupt_source)
 264 {
 265         return 0x1 << interrupt_source;
 266 }
 267
 268 struct hpdi_board {
 269
 270         char *name;
 271         int device_id;          /*  pci device id */
 272         int subdevice_id;       /*  pci subdevice id */
 273 };
 274
 275 static const struct hpdi_board hpdi_boards[] = {
 276         {
 277          .name = "pci-hpdi32",
 278          .device_id = PCI_DEVICE_ID_PLX_9080,
 279          .subdevice_id = 0x2400,
 280          },
 281 #if 0
 282         {
 283          .name = "pxi-hpdi32",
 284          .device_id = 0x9656,
 285          .subdevice_id = 0x2705,
 286          },
 287 #endif
 288 };
 289
 290 static DEFINE_PCI_DEVICE_TABLE(hpdi_pci_table) = {
 291         {
 292         PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9080, PCI_VENDOR_ID_PLX,
 293                     0x2400, 0, 0, 0}, {
 294         0}
 295 };
 296
 297 MODULE_DEVICE_TABLE(pci, hpdi_pci_table);
 298
 299 static inline struct hpdi_board *board(const struct comedi_device *dev)
 300 {
 301         return (struct hpdi_board *)dev->board_ptr;
 302 }
 303
 304 struct hpdi_private {
 305
 306         struct pci_dev *hw_dev; /*  pointer to board's pci_dev struct */
 307         /*  base addresses (physical) */
 308         resource_size_t plx9080_phys_iobase;
 309         resource_size_t hpdi_phys_iobase;
 310         /*  base addresses (ioremapped) */
 311         void *plx9080_iobase;
 312         void *hpdi_iobase;
 313         uint32_t *dio_buffer[NUM_DMA_BUFFERS];  /*  dma buffers */
 314         /* physical addresses of dma buffers */
 315         dma_addr_t dio_buffer_phys_addr[NUM_DMA_BUFFERS];
 316         /* array of dma descriptors read by plx9080, allocated to get proper
 317          * alignment */
 318         struct plx_dma_desc *dma_desc;
 319         /* physical address of dma descriptor array */
 320         dma_addr_t dma_desc_phys_addr;
 321         unsigned int num_dma_descriptors;
 322         /* pointer to start of buffers indexed by descriptor */
 323         uint32_t *desc_dio_buffer[NUM_DMA_DESCRIPTORS];
 324         /* index of the dma descriptor that is currently being used */
 325         volatile unsigned int dma_desc_index;
 326         unsigned int tx_fifo_size;
 327         unsigned int rx_fifo_size;
 328         volatile unsigned long dio_count;
 329         /* software copies of values written to hpdi registers */
 330         volatile uint32_t bits[24];
 331         /* number of bytes at which to generate COMEDI_CB_BLOCK events */
 332         volatile unsigned int block_size;
 333         unsigned dio_config_output:1;
 334 };
 335
 336 static inline struct hpdi_private *priv(struct comedi_device *dev)
 337 {
 338         return dev->private;
 339 }
 340
 341 static struct comedi_driver driver_hpdi = {
 342         .driver_name = "gsc_hpdi",
 343         .module = THIS_MODULE,
 344         .attach = hpdi_attach,
 345         .detach = hpdi_detach,
 346 };
 347
 348 COMEDI_PCI_INITCLEANUP(driver_hpdi, hpdi_pci_table);
 349
 350 static int dio_config_insn(struct comedi_device *dev,
 351                            struct comedi_subdevice *s, struct comedi_insn *insn,
 352                            unsigned int *data)
 353 {
 354         switch (data[0]) {
 355         case INSN_CONFIG_DIO_OUTPUT:
 356                 priv(dev)->dio_config_output = 1;
 357                 return insn->n;
 358                 break;
 359         case INSN_CONFIG_DIO_INPUT:
 360                 priv(dev)->dio_config_output = 0;
 361                 return insn->n;
 362                 break;
 363         case INSN_CONFIG_DIO_QUERY:
 364                 data[1] =
 365                     priv(dev)->dio_config_output ? COMEDI_OUTPUT : COMEDI_INPUT;
 366                 return insn->n;
 367                 break;
 368         case INSN_CONFIG_BLOCK_SIZE:
 369                 return dio_config_block_size(dev, data);
 370                 break;
 371         default:
 372                 break;
 373         }
 374
 375         return -EINVAL;
 376 }
 377
 378 static void disable_plx_interrupts(struct comedi_device *dev)
 379 {
 380         writel(0, priv(dev)->plx9080_iobase + PLX_INTRCS_REG);
 381 }
 382
 383 /* initialize plx9080 chip */
 384 static void init_plx9080(struct comedi_device *dev)
 385 {
 386         uint32_t bits;
 387         void *plx_iobase = priv(dev)->plx9080_iobase;
 388
 389         /*  plx9080 dump */
 390         DEBUG_PRINT(" plx interrupt status 0x%x\n",
 391                     readl(plx_iobase + PLX_INTRCS_REG));
 392         DEBUG_PRINT(" plx id bits 0x%x\n", readl(plx_iobase + PLX_ID_REG));
 393         DEBUG_PRINT(" plx control reg 0x%x\n",
 394                     readl(priv(dev)->plx9080_iobase + PLX_CONTROL_REG));
 395
 396         DEBUG_PRINT(" plx revision 0x%x\n",
 397                     readl(plx_iobase + PLX_REVISION_REG));
 398         DEBUG_PRINT(" plx dma channel 0 mode 0x%x\n",
 399                     readl(plx_iobase + PLX_DMA0_MODE_REG));
 400         DEBUG_PRINT(" plx dma channel 1 mode 0x%x\n",
 401                     readl(plx_iobase + PLX_DMA1_MODE_REG));
 402         DEBUG_PRINT(" plx dma channel 0 pci address 0x%x\n",
 403                     readl(plx_iobase + PLX_DMA0_PCI_ADDRESS_REG));
 404         DEBUG_PRINT(" plx dma channel 0 local address 0x%x\n",
 405                     readl(plx_iobase + PLX_DMA0_LOCAL_ADDRESS_REG));
 406         DEBUG_PRINT(" plx dma channel 0 transfer size 0x%x\n",
 407                     readl(plx_iobase + PLX_DMA0_TRANSFER_SIZE_REG));
 408         DEBUG_PRINT(" plx dma channel 0 descriptor 0x%x\n",
 409                     readl(plx_iobase + PLX_DMA0_DESCRIPTOR_REG));
 410         DEBUG_PRINT(" plx dma channel 0 command status 0x%x\n",
 411                     readb(plx_iobase + PLX_DMA0_CS_REG));
 412         DEBUG_PRINT(" plx dma channel 0 threshold 0x%x\n",
 413                     readl(plx_iobase + PLX_DMA0_THRESHOLD_REG));
 414         DEBUG_PRINT(" plx bigend 0x%x\n", readl(plx_iobase + PLX_BIGEND_REG));
 415 #ifdef __BIG_ENDIAN
 416         bits = BIGEND_DMA0 | BIGEND_DMA1;
 417 #else
 418         bits = 0;
 419 #endif
 420         writel(bits, priv(dev)->plx9080_iobase + PLX_BIGEND_REG);
 421
 422         disable_plx_interrupts(dev);
 423
 424         abort_dma(dev, 0);
 425         abort_dma(dev, 1);
 426
 427         /*  configure dma0 mode */
 428         bits = 0;
 429         /*  enable ready input */
 430         bits |= PLX_DMA_EN_READYIN_BIT;
 431         /*  enable dma chaining */
 432         bits |= PLX_EN_CHAIN_BIT;
 433         /*  enable interrupt on dma done
 434          *  (probably don't need this, since chain never finishes) */
 435         bits |= PLX_EN_DMA_DONE_INTR_BIT;
 436         /*  don't increment local address during transfers
 437          *  (we are transferring from a fixed fifo register) */
 438         bits |= PLX_LOCAL_ADDR_CONST_BIT;
 439         /*  route dma interrupt to pci bus */
 440         bits |= PLX_DMA_INTR_PCI_BIT;
 441         /*  enable demand mode */
 442         bits |= PLX_DEMAND_MODE_BIT;
 443         /*  enable local burst mode */
 444         bits |= PLX_DMA_LOCAL_BURST_EN_BIT;
 445         bits |= PLX_LOCAL_BUS_32_WIDE_BITS;
 446         writel(bits, plx_iobase + PLX_DMA0_MODE_REG);
 447 }
 448
 449 /* Allocate and initialize the subdevice structures.
 450  */
 451 static int setup_subdevices(struct comedi_device *dev)
 452 {
 453         struct comedi_subdevice *s;
 454
 455         if (alloc_subdevices(dev, 1) < 0)
 456                 return -ENOMEM;
 457
 458         s = dev->subdevices + 0;
 459         /* analog input subdevice */
 460         dev->read_subdev = s;
 461 /*      dev->write_subdev = s; */
 462         s->type = COMEDI_SUBD_DIO;
 463         s->subdev_flags =
 464             SDF_READABLE | SDF_WRITEABLE | SDF_LSAMPL | SDF_CMD_READ;
 465         s->n_chan = 32;
 466         s->len_chanlist = 32;
 467         s->maxdata = 1;
 468         s->range_table = &range_digital;
 469         s->insn_config = dio_config_insn;
 470         s->do_cmd = hpdi_cmd;
 471         s->do_cmdtest = hpdi_cmd_test;
 472         s->cancel = hpdi_cancel;
 473
 474         return 0;
 475 }
 476
 477 static int init_hpdi(struct comedi_device *dev)
 478 {
 479         uint32_t plx_intcsr_bits;
 480
 481         writel(BOARD_RESET_BIT, priv(dev)->hpdi_iobase + BOARD_CONTROL_REG);
 482         udelay(10);
 483
 484         writel(almost_empty_bits(32) | almost_full_bits(32),
 485                priv(dev)->hpdi_iobase + RX_PROG_ALMOST_REG);
 486         writel(almost_empty_bits(32) | almost_full_bits(32),
 487                priv(dev)->hpdi_iobase + TX_PROG_ALMOST_REG);
 488
 489         priv(dev)->tx_fifo_size = fifo_size(readl(priv(dev)->hpdi_iobase +
 490                                                   TX_FIFO_SIZE_REG));
 491         priv(dev)->rx_fifo_size = fifo_size(readl(priv(dev)->hpdi_iobase +
 492                                                   RX_FIFO_SIZE_REG));
 493
 494         writel(0, priv(dev)->hpdi_iobase + INTERRUPT_CONTROL_REG);
 495
 496         /*  enable interrupts */
 497         plx_intcsr_bits =
 498             ICS_AERR | ICS_PERR | ICS_PIE | ICS_PLIE | ICS_PAIE | ICS_LIE |
 499             ICS_DMA0_E;
 500         writel(plx_intcsr_bits, priv(dev)->plx9080_iobase + PLX_INTRCS_REG);
 501
 502         return 0;
 503 }
 504
 505 /* setup dma descriptors so a link completes every 'transfer_size' bytes */
 506 static int setup_dma_descriptors(struct comedi_device *dev,
 507                                  unsigned int transfer_size)
 508 {
 509         unsigned int buffer_index, buffer_offset;
 510         uint32_t next_bits = PLX_DESC_IN_PCI_BIT | PLX_INTR_TERM_COUNT |
 511             PLX_XFER_LOCAL_TO_PCI;
 512         unsigned int i;
 513
 514         if (transfer_size > DMA_BUFFER_SIZE)
 515                 transfer_size = DMA_BUFFER_SIZE;
 516         transfer_size -= transfer_size % sizeof(uint32_t);
 517         if (transfer_size == 0)
 518                 return -1;
 519
 520         DEBUG_PRINT(" transfer_size %i\n", transfer_size);
 521         DEBUG_PRINT(" descriptors at 0x%lx\n",
 522                     (unsigned long)priv(dev)->dma_desc_phys_addr);
 523
 524         buffer_offset = 0;
 525         buffer_index = 0;
 526         for (i = 0; i < NUM_DMA_DESCRIPTORS &&
 527              buffer_index < NUM_DMA_BUFFERS; i++) {
 528                 priv(dev)->dma_desc[i].pci_start_addr =
 529                     cpu_to_le32(priv(dev)->dio_buffer_phys_addr[buffer_index] +
 530                                 buffer_offset);
 531                 priv(dev)->dma_desc[i].local_start_addr = cpu_to_le32(FIFO_REG);
 532                 priv(dev)->dma_desc[i].transfer_size =
 533                     cpu_to_le32(transfer_size);
 534                 priv(dev)->dma_desc[i].next =
 535                     cpu_to_le32((priv(dev)->dma_desc_phys_addr + (i +
 536                                                                   1) *
 537                                  sizeof(priv(dev)->dma_desc[0])) | next_bits);
 538
 539                 priv(dev)->desc_dio_buffer[i] =
 540                     priv(dev)->dio_buffer[buffer_index] +
 541                     (buffer_offset / sizeof(uint32_t));
 542
 543                 buffer_offset += transfer_size;
 544                 if (transfer_size + buffer_offset > DMA_BUFFER_SIZE) {
 545                         buffer_offset = 0;
 546                         buffer_index++;
 547                 }
 548
 549                 DEBUG_PRINT(" desc %i\n", i);
 550                 DEBUG_PRINT(" start addr virt 0x%p, phys 0x%lx\n",
 551                             priv(dev)->desc_dio_buffer[i],
 552                             (unsigned long)priv(dev)->dma_desc[i].
 553                             pci_start_addr);
 554                 DEBUG_PRINT(" next 0x%lx\n",
 555                             (unsigned long)priv(dev)->dma_desc[i].next);
 556         }
 557         priv(dev)->num_dma_descriptors = i;
 558         /*  fix last descriptor to point back to first */
 559         priv(dev)->dma_desc[i - 1].next =
 560             cpu_to_le32(priv(dev)->dma_desc_phys_addr | next_bits);
 561         DEBUG_PRINT(" desc %i next fixup 0x%lx\n", i - 1,
 562                     (unsigned long)priv(dev)->dma_desc[i - 1].next);
 563
 564         priv(dev)->block_size = transfer_size;
 565
 566         return transfer_size;
 567 }
 568
 569 static int hpdi_attach(struct comedi_device *dev, struct comedi_devconfig *it)
 570 {
 571         struct pci_dev *pcidev;
 572         int i;
 573         int retval;
 574
 575         printk(KERN_WARNING "comedi%d: gsc_hpdi\n", dev->minor);
 576
 577         if (alloc_private(dev, sizeof(struct hpdi_private)) < 0)
 578                 return -ENOMEM;
 579
 580         pcidev = NULL;
 581         for (i = 0; i < ARRAY_SIZE(hpdi_boards) &&
 582                     dev->board_ptr == NULL; i++) {
 583                 do {
 584                         pcidev = pci_get_subsys(PCI_VENDOR_ID_PLX,
 585                                                 hpdi_boards[i].device_id,
 586                                                 PCI_VENDOR_ID_PLX,
 587                                                 hpdi_boards[i].subdevice_id,
 588                                                 pcidev);
 589                         /*  was a particular bus/slot requested? */
 590                         if (it->options[0] || it->options[1]) {
 591                                 /*  are we on the wrong bus/slot? */
 592                                 if (pcidev->bus->number != it->options[0] ||
 593                                     PCI_SLOT(pcidev->devfn) != it->options[1])
 594                                         continue;
 595                         }
 596                         if (pcidev) {
 597                                 priv(dev)->hw_dev = pcidev;
 598                                 dev->board_ptr = hpdi_boards + i;
 599                                 break;
 600                         }
 601                 } while (pcidev != NULL);
 602         }
 603         if (dev->board_ptr == NULL) {
 604                 printk(KERN_WARNING "gsc_hpdi: no hpdi card found\n");
 605                 return -EIO;
 606         }
 607
 608         printk(KERN_WARNING
 609                "gsc_hpdi: found %s on bus %i, slot %i\n", board(dev)->name,
 610                pcidev->bus->number, PCI_SLOT(pcidev->devfn));
 611
 612         if (comedi_pci_enable(pcidev, driver_hpdi.driver_name)) {
 613                 printk(KERN_WARNING
 614                        " failed enable PCI device and request regions\n");
 615                 return -EIO;
 616         }
 617         pci_set_master(pcidev);
 618
 619         /* Initialize dev->board_name */
 620         dev->board_name = board(dev)->name;
 621
 622         priv(dev)->plx9080_phys_iobase =
 623             pci_resource_start(pcidev, PLX9080_BADDRINDEX);
 624         priv(dev)->hpdi_phys_iobase =
 625             pci_resource_start(pcidev, HPDI_BADDRINDEX);
 626
 627         /*  remap, won't work with 2.0 kernels but who cares */
 628         priv(dev)->plx9080_iobase = ioremap(priv(dev)->plx9080_phys_iobase,
 629                                             pci_resource_len(pcidev,
 630                                             PLX9080_BADDRINDEX));
 631         priv(dev)->hpdi_iobase =
 632             ioremap(priv(dev)->hpdi_phys_iobase,
 633                     pci_resource_len(pcidev, HPDI_BADDRINDEX));
 634         if (!priv(dev)->plx9080_iobase || !priv(dev)->hpdi_iobase) {
 635                 printk(KERN_WARNING " failed to remap io memory\n");
 636                 return -ENOMEM;
 637         }
 638
 639         DEBUG_PRINT(" plx9080 remapped to 0x%p\n", priv(dev)->plx9080_iobase);
 640         DEBUG_PRINT(" hpdi remapped to 0x%p\n", priv(dev)->hpdi_iobase);
 641
 642         init_plx9080(dev);
 643
 644         /*  get irq */
 645         if (request_irq(pcidev->irq, handle_interrupt, IRQF_SHARED,
 646                         driver_hpdi.driver_name, dev)) {
 647                 printk(KERN_WARNING
 648                        " unable to allocate irq %u\n", pcidev->irq);
 649                 return -EINVAL;
 650         }
 651         dev->irq = pcidev->irq;
 652
 653         printk(KERN_WARNING " irq %u\n", dev->irq);
 654
 655         /*  alocate pci dma buffers */
 656         for (i = 0; i < NUM_DMA_BUFFERS; i++) {
 657                 priv(dev)->dio_buffer[i] =
 658                     pci_alloc_consistent(priv(dev)->hw_dev, DMA_BUFFER_SIZE,
 659                                          &priv(dev)->dio_buffer_phys_addr[i]);
 660                 DEBUG_PRINT("dio_buffer at virt 0x%p, phys 0x%lx\n",
 661                             priv(dev)->dio_buffer[i],
 662                             (unsigned long)priv(dev)->dio_buffer_phys_addr[i]);
 663         }
 664         /*  allocate dma descriptors */
 665         priv(dev)->dma_desc = pci_alloc_consistent(priv(dev)->hw_dev,
 666                                                    sizeof(struct plx_dma_desc) *
 667                                                    NUM_DMA_DESCRIPTORS,
 668                                                    &priv(dev)->
 669                                                    dma_desc_phys_addr);
 670         if (priv(dev)->dma_desc_phys_addr & 0xf) {
 671                 printk(KERN_WARNING
 672                        " dma descriptors not quad-word aligned (bug)\n");
 673                 return -EIO;
 674         }
 675
 676         retval = setup_dma_descriptors(dev, 0x1000);
 677         if (retval < 0)
 678                 return retval;
 679
 680         retval = setup_subdevices(dev);
 681         if (retval < 0)
 682                 return retval;
 683
 684         return init_hpdi(dev);
 685 }
 686
 687 static int hpdi_detach(struct comedi_device *dev)
 688 {
 689         unsigned int i;
 690
 691         printk(KERN_WARNING "comedi%d: gsc_hpdi: remove\n", dev->minor);
 692
 693         if (dev->irq)
 694                 free_irq(dev->irq, dev);
 695         if ((priv(dev)) && (priv(dev)->hw_dev)) {
 696                 if (priv(dev)->plx9080_iobase) {
 697                         disable_plx_interrupts(dev);
 698                         iounmap((void *)priv(dev)->plx9080_iobase);
 699                 }
 700                 if (priv(dev)->hpdi_iobase)
 701                         iounmap((void *)priv(dev)->hpdi_iobase);
 702                 /*  free pci dma buffers */
 703                 for (i = 0; i < NUM_DMA_BUFFERS; i++) {
 704                         if (priv(dev)->dio_buffer[i])
 705                                 pci_free_consistent(priv(dev)->hw_dev,
 706                                                     DMA_BUFFER_SIZE,
 707                                                     priv(dev)->
 708                                                     dio_buffer[i],
 709                                                     priv
 710                                                     (dev)->dio_buffer_phys_addr
 711                                                     [i]);
 712                 }
 713                 /*  free dma descriptors */
 714                 if (priv(dev)->dma_desc)
 715                         pci_free_consistent(priv(dev)->hw_dev,
 716                                             sizeof(struct plx_dma_desc)
 717                                             * NUM_DMA_DESCRIPTORS,
 718                                             priv(dev)->dma_desc,
 719                                             priv(dev)->
 720                                             dma_desc_phys_addr);
 721                 if (priv(dev)->hpdi_phys_iobase)
 722                         comedi_pci_disable(priv(dev)->hw_dev);
 723                 pci_dev_put(priv(dev)->hw_dev);
 724         }
 725         return 0;
 726 }
 727
 728 static int dio_config_block_size(struct comedi_device *dev, unsigned int *data)
 729 {
 730         unsigned int requested_block_size;
 731         int retval;
 732
 733         requested_block_size = data[1];
 734
 735         retval = setup_dma_descriptors(dev, requested_block_size);
 736         if (retval < 0)
 737                 return retval;
 738
 739         data[1] = retval;
 740
 741         return 2;
 742 }
 743
 744 static int di_cmd_test(struct comedi_device *dev, struct comedi_subdevice *s,
 745                        struct comedi_cmd *cmd)
 746 {
 747         int err = 0;
 748         int tmp;
 749         int i;
 750
 751         /* step 1: make sure trigger sources are trivially valid */
 752
 753         tmp = cmd->start_src;
 754         cmd->start_src &= TRIG_NOW;
 755         if (!cmd->start_src || tmp != cmd->start_src)
 756                 err++;
 757
 758         tmp = cmd->scan_begin_src;
 759         cmd->scan_begin_src &= TRIG_EXT;
 760         if (!cmd->scan_begin_src || tmp != cmd->scan_begin_src)
 761                 err++;
 762
 763         tmp = cmd->convert_src;
 764         cmd->convert_src &= TRIG_NOW;
 765         if (!cmd->convert_src || tmp != cmd->convert_src)
 766                 err++;
 767
 768         tmp = cmd->scan_end_src;
 769         cmd->scan_end_src &= TRIG_COUNT;
 770         if (!cmd->scan_end_src || tmp != cmd->scan_end_src)
 771                 err++;
 772
 773         tmp = cmd->stop_src;
 774         cmd->stop_src &= TRIG_COUNT | TRIG_NONE;
 775         if (!cmd->stop_src || tmp != cmd->stop_src)
 776                 err++;
 777
 778         if (err)
 779                 return 1;
 780
 781         /* step 2: make sure trigger sources are unique and mutually
 782          * compatible */
 783
 784         /*  uniqueness check */
 785         if (cmd->stop_src != TRIG_COUNT && cmd->stop_src != TRIG_NONE)
 786                 err++;
 787
 788         if (err)
 789                 return 2;
 790
 791         /* step 3: make sure arguments are trivially compatible */
 792
 793         if (!cmd->chanlist_len) {
 794                 cmd->chanlist_len = 32;
 795                 err++;
 796         }
 797         if (cmd->scan_end_arg != cmd->chanlist_len) {
 798                 cmd->scan_end_arg = cmd->chanlist_len;
 799                 err++;
 800         }
 801
 802         switch (cmd->stop_src) {
 803         case TRIG_COUNT:
 804                 if (!cmd->stop_arg) {
 805                         cmd->stop_arg = 1;
 806                         err++;
 807                 }
 808                 break;
 809         case TRIG_NONE:
 810                 if (cmd->stop_arg != 0) {
 811                         cmd->stop_arg = 0;
 812                         err++;
 813                 }
 814                 break;
 815         default:
 816                 break;
 817         }
 818
 819         if (err)
 820                 return 3;
 821
 822         /* step 4: fix up any arguments */
 823
 824         if (err)
 825                 return 4;
 826
 827         if (!cmd->chanlist)
 828                 return 0;
 829
 830         for (i = 1; i < cmd->chanlist_len; i++) {
 831                 if (CR_CHAN(cmd->chanlist[i]) != i) {
 832                         /*  XXX could support 8 or 16 channels */
 833                         comedi_error(dev,
 834                                      "chanlist must be ch 0 to 31 in order");
 835                         err++;
 836                         break;
 837                 }
 838         }
 839
 840         if (err)
 841                 return 5;
 842
 843         return 0;
 844 }
 845
 846 static int hpdi_cmd_test(struct comedi_device *dev, struct comedi_subdevice *s,
 847                          struct comedi_cmd *cmd)
 848 {
 849         if (priv(dev)->dio_config_output)
 850                 return -EINVAL;
 851         else
 852                 return di_cmd_test(dev, s, cmd);
 853 }
 854
 855 static inline void hpdi_writel(struct comedi_device *dev, uint32_t bits,
 856                                unsigned int offset)
 857 {
 858         writel(bits | priv(dev)->bits[offset / sizeof(uint32_t)],
 859                priv(dev)->hpdi_iobase + offset);
 860 }
 861
 862 static int di_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
 863 {
 864         uint32_t bits;
 865         unsigned long flags;
 866         struct comedi_async *async = s->async;
 867         struct comedi_cmd *cmd = &async->cmd;
 868
 869         hpdi_writel(dev, RX_FIFO_RESET_BIT, BOARD_CONTROL_REG);
 870
 871         DEBUG_PRINT("hpdi: in di_cmd\n");
 872
 873         abort_dma(dev, 0);
 874
 875         priv(dev)->dma_desc_index = 0;
 876
 877         /* These register are supposedly unused during chained dma,
 878          * but I have found that left over values from last operation
 879          * occasionally cause problems with transfer of first dma
 880          * block.  Initializing them to zero seems to fix the problem. */
 881         writel(0, priv(dev)->plx9080_iobase + PLX_DMA0_TRANSFER_SIZE_REG);
 882         writel(0, priv(dev)->plx9080_iobase + PLX_DMA0_PCI_ADDRESS_REG);
 883         writel(0, priv(dev)->plx9080_iobase + PLX_DMA0_LOCAL_ADDRESS_REG);
 884         /*  give location of first dma descriptor */
 885         bits =
 886             priv(dev)->dma_desc_phys_addr | PLX_DESC_IN_PCI_BIT |
 887             PLX_INTR_TERM_COUNT | PLX_XFER_LOCAL_TO_PCI;
 888         writel(bits, priv(dev)->plx9080_iobase + PLX_DMA0_DESCRIPTOR_REG);
 889
 890         /*  spinlock for plx dma control/status reg */
 891         spin_lock_irqsave(&dev->spinlock, flags);
 892         /*  enable dma transfer */
 893         writeb(PLX_DMA_EN_BIT | PLX_DMA_START_BIT | PLX_CLEAR_DMA_INTR_BIT,
 894                priv(dev)->plx9080_iobase + PLX_DMA0_CS_REG);
 895         spin_unlock_irqrestore(&dev->spinlock, flags);
 896
 897         if (cmd->stop_src == TRIG_COUNT)
 898                 priv(dev)->dio_count = cmd->stop_arg;
 899         else
 900                 priv(dev)->dio_count = 1;
 901
 902         /*  clear over/under run status flags */
 903         writel(RX_UNDERRUN_BIT | RX_OVERRUN_BIT,
 904                priv(dev)->hpdi_iobase + BOARD_STATUS_REG);
 905         /*  enable interrupts */
 906         writel(intr_bit(RX_FULL_INTR),
 907                priv(dev)->hpdi_iobase + INTERRUPT_CONTROL_REG);
 908
 909         DEBUG_PRINT("hpdi: starting rx\n");
 910         hpdi_writel(dev, RX_ENABLE_BIT, BOARD_CONTROL_REG);
 911
 912         return 0;
 913 }
 914
 915 static int hpdi_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
 916 {
 917         if (priv(dev)->dio_config_output)
 918                 return -EINVAL;
 919         else
 920                 return di_cmd(dev, s);
 921 }
 922
 923 static void drain_dma_buffers(struct comedi_device *dev, unsigned int channel)
 924 {
 925         struct comedi_async *async = dev->read_subdev->async;
 926         uint32_t next_transfer_addr;
 927         int j;
 928         int num_samples = 0;
 929         void *pci_addr_reg;
 930
 931         if (channel)
 932                 pci_addr_reg =
 933                     priv(dev)->plx9080_iobase + PLX_DMA1_PCI_ADDRESS_REG;
 934         else
 935                 pci_addr_reg =
 936                     priv(dev)->plx9080_iobase + PLX_DMA0_PCI_ADDRESS_REG;
 937
 938         /*  loop until we have read all the full buffers */
 939         j = 0;
 940         for (next_transfer_addr = readl(pci_addr_reg);
 941              (next_transfer_addr <
 942               le32_to_cpu(priv(dev)->dma_desc[priv(dev)->dma_desc_index].
 943                           pci_start_addr)
 944               || next_transfer_addr >=
 945               le32_to_cpu(priv(dev)->dma_desc[priv(dev)->dma_desc_index].
 946                           pci_start_addr) + priv(dev)->block_size)
 947              && j < priv(dev)->num_dma_descriptors; j++) {
 948                 /*  transfer data from dma buffer to comedi buffer */
 949                 num_samples = priv(dev)->block_size / sizeof(uint32_t);
 950                 if (async->cmd.stop_src == TRIG_COUNT) {
 951                         if (num_samples > priv(dev)->dio_count)
 952                                 num_samples = priv(dev)->dio_count;
 953                         priv(dev)->dio_count -= num_samples;
 954                 }
 955                 cfc_write_array_to_buffer(dev->read_subdev,
 956                                           priv(dev)->desc_dio_buffer[priv(dev)->
 957                                                                      dma_desc_index],
 958                                           num_samples * sizeof(uint32_t));
 959                 priv(dev)->dma_desc_index++;
 960                 priv(dev)->dma_desc_index %= priv(dev)->num_dma_descriptors;
 961
 962                 DEBUG_PRINT("next desc addr 0x%lx\n", (unsigned long)
 963                             priv(dev)->dma_desc[priv(dev)->dma_desc_index].
 964                             next);
 965                 DEBUG_PRINT("pci addr reg 0x%x\n", next_transfer_addr);
 966         }
 967         /*  XXX check for buffer overrun somehow */
 968 }
 969
 970 static irqreturn_t handle_interrupt(int irq, void *d)
 971 {
 972         struct comedi_device *dev = d;
 973         struct comedi_subdevice *s = dev->read_subdev;
 974         struct comedi_async *async = s->async;
 975         uint32_t hpdi_intr_status, hpdi_board_status;
 976         uint32_t plx_status;
 977         uint32_t plx_bits;
 978         uint8_t dma0_status, dma1_status;
 979         unsigned long flags;
 980
 981         if (!dev->attached)
 982                 return IRQ_NONE;
 983
 984         plx_status = readl(priv(dev)->plx9080_iobase + PLX_INTRCS_REG);
 985         if ((plx_status & (ICS_DMA0_A | ICS_DMA1_A | ICS_LIA)) == 0)
 986                 return IRQ_NONE;
 987
 988         hpdi_intr_status = readl(priv(dev)->hpdi_iobase + INTERRUPT_STATUS_REG);
 989         hpdi_board_status = readl(priv(dev)->hpdi_iobase + BOARD_STATUS_REG);
 990
 991         async->events = 0;
 992
 993         if (hpdi_intr_status) {
 994                 DEBUG_PRINT("hpdi: intr status 0x%x, ", hpdi_intr_status);
 995                 writel(hpdi_intr_status,
 996                        priv(dev)->hpdi_iobase + INTERRUPT_STATUS_REG);
 997         }
 998         /*  spin lock makes sure noone else changes plx dma control reg */
 999         spin_lock_irqsave(&dev->spinlock, flags);
1000         dma0_status = readb(priv(dev)->plx9080_iobase + PLX_DMA0_CS_REG);
1001         if (plx_status & ICS_DMA0_A) {  /*  dma chan 0 interrupt */
1002                 writeb((dma0_status & PLX_DMA_EN_BIT) | PLX_CLEAR_DMA_INTR_BIT,
1003                        priv(dev)->plx9080_iobase + PLX_DMA0_CS_REG);
1004
1005                 DEBUG_PRINT("dma0 status 0x%x\n", dma0_status);
1006                 if (dma0_status & PLX_DMA_EN_BIT)
1007                         drain_dma_buffers(dev, 0);
1008                 DEBUG_PRINT(" cleared dma ch0 interrupt\n");
1009         }
1010         spin_unlock_irqrestore(&dev->spinlock, flags);
1011
1012         /*  spin lock makes sure noone else changes plx dma control reg */
1013         spin_lock_irqsave(&dev->spinlock, flags);
1014         dma1_status = readb(priv(dev)->plx9080_iobase + PLX_DMA1_CS_REG);
1015         if (plx_status & ICS_DMA1_A) {  /*  XXX *//*  dma chan 1 interrupt */
1016                 writeb((dma1_status & PLX_DMA_EN_BIT) | PLX_CLEAR_DMA_INTR_BIT,
1017                        priv(dev)->plx9080_iobase + PLX_DMA1_CS_REG);
1018                 DEBUG_PRINT("dma1 status 0x%x\n", dma1_status);
1019
1020                 DEBUG_PRINT(" cleared dma ch1 interrupt\n");
1021         }
1022         spin_unlock_irqrestore(&dev->spinlock, flags);
1023
1024         /*  clear possible plx9080 interrupt sources */
1025         if (plx_status & ICS_LDIA) {    /*  clear local doorbell interrupt */
1026                 plx_bits = readl(priv(dev)->plx9080_iobase + PLX_DBR_OUT_REG);
1027                 writel(plx_bits, priv(dev)->plx9080_iobase + PLX_DBR_OUT_REG);
1028                 DEBUG_PRINT(" cleared local doorbell bits 0x%x\n", plx_bits);
1029         }
1030
1031         if (hpdi_board_status & RX_OVERRUN_BIT) {
1032                 comedi_error(dev, "rx fifo overrun");
1033                 async->events |= COMEDI_CB_EOA | COMEDI_CB_ERROR;
1034                 DEBUG_PRINT("dma0_status 0x%x\n",
1035                             (int)readb(priv(dev)->plx9080_iobase +
1036                                        PLX_DMA0_CS_REG));
1037         }
1038
1039         if (hpdi_board_status & RX_UNDERRUN_BIT) {
1040                 comedi_error(dev, "rx fifo underrun");
1041                 async->events |= COMEDI_CB_EOA | COMEDI_CB_ERROR;
1042         }
1043
1044         if (priv(dev)->dio_count == 0)
1045                 async->events |= COMEDI_CB_EOA;
1046
1047         DEBUG_PRINT("board status 0x%x, ", hpdi_board_status);
1048         DEBUG_PRINT("plx status 0x%x\n", plx_status);
1049         if (async->events)
1050                 DEBUG_PRINT(" events 0x%x\n", async->events);
1051
1052         cfc_handle_events(dev, s);
1053
1054         return IRQ_HANDLED;
1055 }
1056
1057 static void abort_dma(struct comedi_device *dev, unsigned int channel)
1058 {
1059         unsigned long flags;
1060
1061         /*  spinlock for plx dma control/status reg */
1062         spin_lock_irqsave(&dev->spinlock, flags);
1063
1064         plx9080_abort_dma(priv(dev)->plx9080_iobase, channel);
1065
1066         spin_unlock_irqrestore(&dev->spinlock, flags);
1067 }
1068
1069 static int hpdi_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
1070 {
1071         hpdi_writel(dev, 0, BOARD_CONTROL_REG);
1072
1073         writel(0, priv(dev)->hpdi_iobase + INTERRUPT_CONTROL_REG);
1074
1075         abort_dma(dev, 0);
1076
1077         return 0;
1078 }
1079
1080 MODULE_AUTHOR("Comedi http://www.comedi.org");
1081 MODULE_DESCRIPTION("Comedi low-level driver");
1082 MODULE_LICENSE("GPL");