4 #define DT9812_DIAGS_BOARD_INFO_ADDR 0xFBFF
5 #define DT9812_MAX_WRITE_CMD_PIPE_SIZE 32
6 #define DT9812_MAX_READ_CMD_PIPE_SIZE 32
9 * See Silican Laboratories C8051F020/1/2/3 manual
11 #define F020_SFR_P4 0x84
12 #define F020_SFR_P1 0x90
13 #define F020_SFR_P2 0xa0
14 #define F020_SFR_P3 0xb0
15 #define F020_SFR_AMX0CF 0xba
16 #define F020_SFR_AMX0SL 0xbb
17 #define F020_SFR_ADC0CF 0xbc
18 #define F020_SFR_ADC0L 0xbe
19 #define F020_SFR_ADC0H 0xbf
20 #define F020_SFR_DAC0L 0xd2
21 #define F020_SFR_DAC0H 0xd3
22 #define F020_SFR_DAC0CN 0xd4
23 #define F020_SFR_DAC1L 0xd5
24 #define F020_SFR_DAC1H 0xd6
25 #define F020_SFR_DAC1CN 0xd7
26 #define F020_SFR_ADC0CN 0xe8
28 #define F020_MASK_ADC0CF_AMP0GN0 0x01
29 #define F020_MASK_ADC0CF_AMP0GN1 0x02
30 #define F020_MASK_ADC0CF_AMP0GN2 0x04
32 #define F020_MASK_ADC0CN_AD0EN 0x80
33 #define F020_MASK_ADC0CN_AD0INT 0x20
34 #define F020_MASK_ADC0CN_AD0BUSY 0x10
36 #define F020_MASK_DACxCN_DACxEN 0x80
39 /* A/D D/A DI DO CT */
40 DT9812_DEVID_DT9812_10, /* 8 2 8 8 1 +/- 10V */
41 DT9812_DEVID_DT9812_2PT5,/* 8 2 8 8 1 0-2.44V */
43 DT9812_DEVID_DT9813, /* 16 2 4 4 1 +/- 10V */
44 DT9812_DEVID_DT9814 /* 24 2 0 0 1 +/- 10V */
49 DT9812_GAIN_0PT25 = 1,
59 DT9812_LEAST_USB_FIRMWARE_CMD_CODE = 0,
60 /* Write Flash memory */
61 DT9812_W_FLASH_DATA = 0,
62 /* Read Flash memory misc config info */
63 DT9812_R_FLASH_DATA = 1,
66 * Register read/write commands for processor
69 /* Read a single byte of USB memory */
70 DT9812_R_SINGLE_BYTE_REG = 2,
71 /* Write a single byte of USB memory */
72 DT9812_W_SINGLE_BYTE_REG = 3,
73 /* Multiple Reads of USB memory */
74 DT9812_R_MULTI_BYTE_REG = 4,
75 /* Multiple Writes of USB memory */
76 DT9812_W_MULTI_BYTE_REG = 5,
77 /* Read, (AND) with mask, OR value, then write (single) */
78 DT9812_RMW_SINGLE_BYTE_REG = 6,
79 /* Read, (AND) with mask, OR value, then write (multiple) */
80 DT9812_RMW_MULTI_BYTE_REG = 7,
83 * Register read/write commands for SMBus
86 /* Read a single byte of SMBus */
87 DT9812_R_SINGLE_BYTE_SMBUS = 8,
88 /* Write a single byte of SMBus */
89 DT9812_W_SINGLE_BYTE_SMBUS = 9,
90 /* Multiple Reads of SMBus */
91 DT9812_R_MULTI_BYTE_SMBUS = 10,
92 /* Multiple Writes of SMBus */
93 DT9812_W_MULTI_BYTE_SMBUS = 11,
96 * Register read/write commands for a device
99 /* Read a single byte of a device */
100 DT9812_R_SINGLE_BYTE_DEV = 12,
101 /* Write a single byte of a device */
102 DT9812_W_SINGLE_BYTE_DEV = 13,
103 /* Multiple Reads of a device */
104 DT9812_R_MULTI_BYTE_DEV = 14,
105 /* Multiple Writes of a device */
106 DT9812_W_MULTI_BYTE_DEV = 15,
108 /* Not sure if we'll need this */
109 DT9812_W_DAC_THRESHOLD = 16,
111 /* Set interrupt on change mask */
112 DT9812_W_INT_ON_CHANGE_MASK = 17,
114 /* Write (or Clear) the CGL for the ADC */
116 /* Multiple Reads of USB memory */
117 DT9812_R_MULTI_BYTE_USBMEM = 19,
118 /* Multiple Writes to USB memory */
119 DT9812_W_MULTI_BYTE_USBMEM = 20,
121 /* Issue a start command to a given subsystem */
122 DT9812_START_SUBSYSTEM = 21,
123 /* Issue a stop command to a given subsystem */
124 DT9812_STOP_SUBSYSTEM = 22,
126 /* calibrate the board using CAL_POT_CMD */
127 DT9812_CALIBRATE_POT = 23,
128 /* set the DAC FIFO size */
129 DT9812_W_DAC_FIFO_SIZE = 24,
130 /* Write or Clear the CGL for the DAC */
131 DT9812_W_CGL_DAC = 25,
132 /* Read a single value from a subsystem */
133 DT9812_R_SINGLE_VALUE_CMD = 26,
134 /* Write a single value to a subsystem */
135 DT9812_W_SINGLE_VALUE_CMD = 27,
136 /* Valid DT9812_USB_FIRMWARE_CMD_CODE's will be less than this number */
137 DT9812_MAX_USB_FIRMWARE_CMD_CODE,
138 } dt9812_usb_firmware_cmd_t;
143 } dt9812_flash_data_t;
145 #define DT9812_MAX_NUM_MULTI_BYTE_RDS \
146 ((DT9812_MAX_WRITE_CMD_PIPE_SIZE - 4 - 1) / sizeof(u8))
150 u8 address[DT9812_MAX_NUM_MULTI_BYTE_RDS];
151 } dt9812_read_multi_t;
156 } dt9812_write_byte_t;
158 #define DT9812_MAX_NUM_MULTI_BYTE_WRTS \
159 ((DT9812_MAX_WRITE_CMD_PIPE_SIZE - 4 - 1) / sizeof(dt9812_write_byte_t))
163 dt9812_write_byte_t write[DT9812_MAX_NUM_MULTI_BYTE_WRTS];
164 } dt9812_write_multi_t;
172 #define DT9812_MAX_NUM_MULTI_BYTE_RMWS \
173 ((DT9812_MAX_WRITE_CMD_PIPE_SIZE - 4 - 1) / sizeof(dt9812_rmw_byte_t))
177 dt9812_rmw_byte_t rmw[DT9812_MAX_NUM_MULTI_BYTE_RMWS];
178 } dt9812_rmw_multi_t;
180 typedef struct dt9812_usb_cmd {
184 dt9812_flash_data_t flash_data_info;
185 dt9812_read_multi_t read_multi_info;
186 dt9812_write_multi_t write_multi_info;
187 dt9812_rmw_multi_t rmw_multi_info;
190 WRITE_BYTE_INFO WriteByteInfo;
191 READ_BYTE_INFO ReadByteInfo;
192 WRITE_MULTI_INFO WriteMultiInfo;
193 READ_MULTI_INFO ReadMultiInfo;
194 RMW_BYTE_INFO RMWByteInfo;
195 RMW_MULTI_INFO RMWMultiInfo;
196 DAC_THRESHOLD_INFO DacThresholdInfo;
197 INT_ON_CHANGE_MASK_INFO IntOnChangeMaskInfo;
199 SUBSYSTEM_INFO SubsystemInfo;
200 CAL_POT_CMD CalPotCmd;
201 WRITE_DEV_BYTE_INFO WriteDevByteInfo;
202 READ_DEV_BYTE_INFO ReadDevByteInfo;
203 WRITE_DEV_MULTI_INFO WriteDevMultiInfo;
204 READ_DEV_MULTI_INFO ReadDevMultiInfo;
205 READ_SINGLE_VALUE_INFO ReadSingleValueInfo;
206 WRITE_SINGLE_VALUE_INFO WriteSingleValueInfo;