drivers/staging/comedi/drivers/adl_pci9111.c

   1 /*
   2
   3 comedi/drivers/adl_pci9111.c
   4
   5 Hardware driver for PCI9111 ADLink cards:
   6
   7 PCI-9111HR
   8
   9 Copyright (C) 2002-2005 Emmanuel Pacaud <emmanuel.pacaud@univ-poitiers.fr>
  10
  11 This program is free software; you can redistribute it and/or modify
  12 it under the terms of the GNU General Public License as published by
  13 the Free Software Foundation; either version 2 of the License, or
  14 (at your option) any later version.
  15
  16 This program is distributed in the hope that it will be useful,
  17 but WITHOUT ANY WARRANTY; without even the implied warranty of
  18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19 GNU General Public License for more details.
  20
  21 You should have received a copy of the GNU General Public License
  22 along with this program; if not, write to the Free Software
  23 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  24 */
  25
  26 /*
  27 Driver: adl_pci9111
  28 Description: Adlink PCI-9111HR
  29 Author: Emmanuel Pacaud <emmanuel.pacaud@univ-poitiers.fr>
  30 Devices: [ADLink] PCI-9111HR (adl_pci9111)
  31 Status: experimental
  32
  33 Supports:
  34
  35         - ai_insn read
  36         - ao_insn read/write
  37         - di_insn read
  38         - do_insn read/write
  39         - ai_do_cmd mode with the following sources:
  40
  41         - start_src             TRIG_NOW
  42         - scan_begin_src        TRIG_FOLLOW     TRIG_TIMER      TRIG_EXT
  43         - convert_src                           TRIG_TIMER      TRIG_EXT
  44         - scan_end_src          TRIG_COUNT
  45         - stop_src              TRIG_COUNT      TRIG_NONE
  46
  47 The scanned channels must be consecutive and start from 0. They must
  48 all have the same range and aref.
  49
  50 Configuration options:
  51
  52         [0] - PCI bus number (optional)
  53         [1] - PCI slot number (optional)
  54
  55 If bus/slot is not specified, the first available PCI
  56 device will be used.
  57
  58 */
  59
  60 /*
  61 CHANGELOG:
  62
  63 2005/02/17 Extend AI streaming capabilities. Now, scan_begin_arg can be
  64 a multiple of chanlist_len*convert_arg.
  65 2002/02/19 Fixed the two's complement conversion in pci9111_(hr_)ai_get_data.
  66 2002/02/18 Added external trigger support for analog input.
  67
  68 TODO:
  69
  70         - Really test implemented functionality.
  71         - Add support for the PCI-9111DG with a probe routine to identify
  72           the card type (perhaps with the help of the channel number readback
  73           of the A/D Data register).
  74         - Add external multiplexer support.
  75
  76 */
  77
  78 #include "../comedidev.h"
  79
  80 #include <linux/delay.h>
  81 #include <linux/interrupt.h>
  82
  83 #include "8253.h"
  84 #include "comedi_fc.h"
  85
  86 #define PCI9111_DRIVER_NAME     "adl_pci9111"
  87 #define PCI9111_HR_DEVICE_ID    0x9111
  88
  89 /*  TODO: Add other pci9111 board id */
  90
  91 #define PCI9111_IO_RANGE        0x0100
  92
  93 #define PCI9111_FIFO_HALF_SIZE  512
  94
  95 #define PCI9111_AI_CHANNEL_NBR                  16
  96
  97 #define PCI9111_AI_RESOLUTION                   12
  98 #define PCI9111_AI_RESOLUTION_MASK              0x0FFF
  99 #define PCI9111_AI_RESOLUTION_2_CMP_BIT         0x0800
 100
 101 #define PCI9111_HR_AI_RESOLUTION                16
 102 #define PCI9111_HR_AI_RESOLUTION_MASK           0xFFFF
 103 #define PCI9111_HR_AI_RESOLUTION_2_CMP_BIT      0x8000
 104
 105 #define PCI9111_AI_ACQUISITION_PERIOD_MIN_NS    10000
 106 #define PCI9111_AO_CHANNEL_NBR                  1
 107 #define PCI9111_AO_RESOLUTION                   12
 108 #define PCI9111_AO_RESOLUTION_MASK              0x0FFF
 109 #define PCI9111_DI_CHANNEL_NBR                  16
 110 #define PCI9111_DO_CHANNEL_NBR                  16
 111 #define PCI9111_DO_MASK                         0xFFFF
 112
 113 #define PCI9111_RANGE_SETTING_DELAY             10
 114 #define PCI9111_AI_INSTANT_READ_UDELAY_US       2
 115 #define PCI9111_AI_INSTANT_READ_TIMEOUT         100
 116
 117 #define PCI9111_8254_CLOCK_PERIOD_NS            500
 118
 119 #define PCI9111_8254_COUNTER_0                  0x00
 120 #define PCI9111_8254_COUNTER_1                  0x40
 121 #define PCI9111_8254_COUNTER_2                  0x80
 122 #define PCI9111_8254_COUNTER_LATCH              0x00
 123 #define PCI9111_8254_READ_LOAD_LSB_ONLY         0x10
 124 #define PCI9111_8254_READ_LOAD_MSB_ONLY         0x20
 125 #define PCI9111_8254_READ_LOAD_LSB_MSB          0x30
 126 #define PCI9111_8254_MODE_0                     0x00
 127 #define PCI9111_8254_MODE_1                     0x02
 128 #define PCI9111_8254_MODE_2                     0x04
 129 #define PCI9111_8254_MODE_3                     0x06
 130 #define PCI9111_8254_MODE_4                     0x08
 131 #define PCI9111_8254_MODE_5                     0x0A
 132 #define PCI9111_8254_BINARY_COUNTER             0x00
 133 #define PCI9111_8254_BCD_COUNTER                0x01
 134
 135 /* IO address map */
 136
 137 #define PCI9111_REGISTER_AD_FIFO_VALUE                  0x00 /* AD Data stored
 138                                                                 in FIFO */
 139 #define PCI9111_REGISTER_DA_OUTPUT                      0x00
 140 #define PCI9111_REGISTER_DIGITAL_IO                     0x02
 141 #define PCI9111_REGISTER_EXTENDED_IO_PORTS              0x04
 142 #define PCI9111_REGISTER_AD_CHANNEL_CONTROL             0x06 /* Channel
 143                                                                 selection */
 144 #define PCI9111_REGISTER_AD_CHANNEL_READBACK            0x06
 145 #define PCI9111_REGISTER_INPUT_SIGNAL_RANGE             0x08
 146 #define PCI9111_REGISTER_RANGE_STATUS_READBACK          0x08
 147 #define PCI9111_REGISTER_TRIGGER_MODE_CONTROL           0x0A
 148 #define PCI9111_REGISTER_AD_MODE_INTERRUPT_READBACK     0x0A
 149 #define PCI9111_REGISTER_SOFTWARE_TRIGGER               0x0E
 150 #define PCI9111_REGISTER_INTERRUPT_CONTROL              0x0C
 151 #define PCI9111_REGISTER_8254_COUNTER_0                 0x40
 152 #define PCI9111_REGISTER_8254_COUNTER_1                 0x42
 153 #define PCI9111_REGISTER_8254_COUNTER_2                 0X44
 154 #define PCI9111_REGISTER_8254_CONTROL                   0x46
 155 #define PCI9111_REGISTER_INTERRUPT_CLEAR                0x48
 156
 157 #define PCI9111_TRIGGER_MASK                            0x0F
 158 #define PCI9111_PTRG_OFF                                (0 << 3)
 159 #define PCI9111_PTRG_ON                                 (1 << 3)
 160 #define PCI9111_EITS_EXTERNAL                           (1 << 2)
 161 #define PCI9111_EITS_INTERNAL                           (0 << 2)
 162 #define PCI9111_TPST_SOFTWARE_TRIGGER                   (0 << 1)
 163 #define PCI9111_TPST_TIMER_PACER                        (1 << 1)
 164 #define PCI9111_ASCAN_ON                                (1 << 0)
 165 #define PCI9111_ASCAN_OFF                               (0 << 0)
 166
 167 #define PCI9111_ISC0_SET_IRQ_ON_ENDING_OF_AD_CONVERSION (0 << 0)
 168 #define PCI9111_ISC0_SET_IRQ_ON_FIFO_HALF_FULL          (1 << 0)
 169 #define PCI9111_ISC1_SET_IRQ_ON_TIMER_TICK              (0 << 1)
 170 #define PCI9111_ISC1_SET_IRQ_ON_EXT_TRG                 (1 << 1)
 171 #define PCI9111_FFEN_SET_FIFO_ENABLE                    (0 << 2)
 172 #define PCI9111_FFEN_SET_FIFO_DISABLE                   (1 << 2)
 173
 174 #define PCI9111_CHANNEL_MASK                            0x0F
 175
 176 #define PCI9111_RANGE_MASK                              0x07
 177 #define PCI9111_FIFO_EMPTY_MASK                         0x10
 178 #define PCI9111_FIFO_HALF_FULL_MASK                     0x20
 179 #define PCI9111_FIFO_FULL_MASK                          0x40
 180 #define PCI9111_AD_BUSY_MASK                            0x80
 181
 182 #define PCI9111_IO_BASE (dev->iobase)
 183
 184 /*
 185  * Define inlined function
 186  */
 187
 188 #define pci9111_trigger_and_autoscan_get() \
 189         (inb(PCI9111_IO_BASE+PCI9111_REGISTER_AD_MODE_INTERRUPT_READBACK)&0x0F)
 190
 191 #define pci9111_trigger_and_autoscan_set(flags) \
 192         outb(flags, PCI9111_IO_BASE+PCI9111_REGISTER_TRIGGER_MODE_CONTROL)
 193
 194 #define pci9111_interrupt_and_fifo_get() \
 195         ((inb(PCI9111_IO_BASE+PCI9111_REGISTER_AD_MODE_INTERRUPT_READBACK) \
 196                 >> 4) & 0x03)
 197
 198 #define pci9111_interrupt_and_fifo_set(flags) \
 199         outb(flags, PCI9111_IO_BASE+PCI9111_REGISTER_INTERRUPT_CONTROL)
 200
 201 #define pci9111_interrupt_clear() \
 202         outb(0, PCI9111_IO_BASE+PCI9111_REGISTER_INTERRUPT_CLEAR)
 203
 204 #define pci9111_software_trigger() \
 205         outb(0, PCI9111_IO_BASE+PCI9111_REGISTER_SOFTWARE_TRIGGER)
 206
 207 #define pci9111_fifo_reset() do { \
 208         outb(PCI9111_FFEN_SET_FIFO_ENABLE, \
 209                 PCI9111_IO_BASE+PCI9111_REGISTER_INTERRUPT_CONTROL); \
 210         outb(PCI9111_FFEN_SET_FIFO_DISABLE, \
 211                 PCI9111_IO_BASE+PCI9111_REGISTER_INTERRUPT_CONTROL); \
 212         outb(PCI9111_FFEN_SET_FIFO_ENABLE, \
 213                 PCI9111_IO_BASE+PCI9111_REGISTER_INTERRUPT_CONTROL); \
 214         } while (0)
 215
 216 #define pci9111_is_fifo_full() \
 217         ((inb(PCI9111_IO_BASE+PCI9111_REGISTER_RANGE_STATUS_READBACK)& \
 218                 PCI9111_FIFO_FULL_MASK) == 0)
 219
 220 #define pci9111_is_fifo_half_full() \
 221         ((inb(PCI9111_IO_BASE+PCI9111_REGISTER_RANGE_STATUS_READBACK)& \
 222                 PCI9111_FIFO_HALF_FULL_MASK) == 0)
 223
 224 #define pci9111_is_fifo_empty() \
 225         ((inb(PCI9111_IO_BASE+PCI9111_REGISTER_RANGE_STATUS_READBACK)& \
 226                 PCI9111_FIFO_EMPTY_MASK) == 0)
 227
 228 #define pci9111_ai_channel_set(channel) \
 229         outb((channel)&PCI9111_CHANNEL_MASK, \
 230                 PCI9111_IO_BASE+PCI9111_REGISTER_AD_CHANNEL_CONTROL)
 231
 232 #define pci9111_ai_channel_get() \
 233         (inb(PCI9111_IO_BASE+PCI9111_REGISTER_AD_CHANNEL_READBACK) \
 234                 &PCI9111_CHANNEL_MASK)
 235
 236 #define pci9111_ai_range_set(range) \
 237         outb((range)&PCI9111_RANGE_MASK, \
 238                 PCI9111_IO_BASE+PCI9111_REGISTER_INPUT_SIGNAL_RANGE)
 239
 240 #define pci9111_ai_range_get() \
 241         (inb(PCI9111_IO_BASE+PCI9111_REGISTER_RANGE_STATUS_READBACK) \
 242                 &PCI9111_RANGE_MASK)
 243
 244 #define pci9111_ai_get_data() \
 245         (((inw(PCI9111_IO_BASE+PCI9111_REGISTER_AD_FIFO_VALUE)>>4) \
 246                 &PCI9111_AI_RESOLUTION_MASK) \
 247                         ^ PCI9111_AI_RESOLUTION_2_CMP_BIT)
 248
 249 #define pci9111_hr_ai_get_data() \
 250         ((inw(PCI9111_IO_BASE+PCI9111_REGISTER_AD_FIFO_VALUE) \
 251                 &PCI9111_HR_AI_RESOLUTION_MASK) \
 252                         ^ PCI9111_HR_AI_RESOLUTION_2_CMP_BIT)
 253
 254 #define pci9111_ao_set_data(data) \
 255         outw(data&PCI9111_AO_RESOLUTION_MASK, \
 256                 PCI9111_IO_BASE+PCI9111_REGISTER_DA_OUTPUT)
 257
 258 #define pci9111_di_get_bits() \
 259         inw(PCI9111_IO_BASE+PCI9111_REGISTER_DIGITAL_IO)
 260
 261 #define pci9111_do_set_bits(bits) \
 262         outw(bits, PCI9111_IO_BASE+PCI9111_REGISTER_DIGITAL_IO)
 263
 264 #define pci9111_8254_control_set(flags) \
 265         outb(flags, PCI9111_IO_BASE+PCI9111_REGISTER_8254_CONTROL)
 266
 267 #define pci9111_8254_counter_0_set(data) \
 268         do { \
 269                 outb(data & 0xFF, \
 270                         PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_0); \
 271                 outb((data >> 8) & 0xFF, \
 272                         PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_0); \
 273         } while (0)
 274
 275 #define pci9111_8254_counter_1_set(data) \
 276         do { \
 277                 outb(data & 0xFF, \
 278                         PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_1); \
 279                 outb((data >> 8) & 0xFF, \
 280                         PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_1); \
 281         } while (0)
 282
 283 #define pci9111_8254_counter_2_set(data) \
 284         do { \
 285                 outb(data & 0xFF, \
 286                         PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_2); \
 287                 outb((data >> 8) & 0xFF, \
 288                         PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_2); \
 289         } while (0)
 290
 291 static const struct comedi_lrange pci9111_hr_ai_range = {
 292         5,
 293         {
 294          BIP_RANGE(10),
 295          BIP_RANGE(5),
 296          BIP_RANGE(2.5),
 297          BIP_RANGE(1.25),
 298          BIP_RANGE(0.625)
 299          }
 300 };
 301
 302 /*  */
 303 /*  Board specification structure */
 304 /*  */
 305
 306 struct pci9111_board {
 307         const char *name;       /*  driver name */
 308         int device_id;
 309         int ai_channel_nbr;     /*  num of A/D chans */
 310         int ao_channel_nbr;     /*  num of D/A chans */
 311         int ai_resolution;      /*  resolution of A/D */
 312         int ai_resolution_mask;
 313         int ao_resolution;      /*  resolution of D/A */
 314         int ao_resolution_mask;
 315         const struct comedi_lrange *ai_range_list;      /*  rangelist for A/D */
 316         const struct comedi_lrange *ao_range_list;      /*  rangelist for D/A */
 317         unsigned int ai_acquisition_period_min_ns;
 318 };
 319
 320 static const struct pci9111_board pci9111_boards[] = {
 321         {
 322          .name = "pci9111_hr",
 323          .device_id = PCI9111_HR_DEVICE_ID,
 324          .ai_channel_nbr = PCI9111_AI_CHANNEL_NBR,
 325          .ao_channel_nbr = PCI9111_AO_CHANNEL_NBR,
 326          .ai_resolution = PCI9111_HR_AI_RESOLUTION,
 327          .ai_resolution_mask = PCI9111_HR_AI_RESOLUTION_MASK,
 328          .ao_resolution = PCI9111_AO_RESOLUTION,
 329          .ao_resolution_mask = PCI9111_AO_RESOLUTION_MASK,
 330          .ai_range_list = &pci9111_hr_ai_range,
 331          .ao_range_list = &range_bipolar10,
 332          .ai_acquisition_period_min_ns = PCI9111_AI_ACQUISITION_PERIOD_MIN_NS}
 333 };
 334
 335 #define pci9111_board_nbr \
 336         (sizeof(pci9111_boards)/sizeof(struct pci9111_board))
 337
 338 /*  Private data structure */
 339
 340 struct pci9111_private_data {
 341         unsigned long io_range; /*  PCI6503 io range */
 342
 343         unsigned long lcr_io_base; /* Local configuration register base
 344                                     * address */
 345         unsigned long lcr_io_range;
 346
 347         int stop_counter;
 348         int stop_is_none;
 349
 350         unsigned int scan_delay;
 351         unsigned int chanlist_len;
 352         unsigned int chunk_counter;
 353         unsigned int chunk_num_samples;
 354
 355         int ao_readback;        /*  Last written analog output data */
 356
 357         unsigned int timer_divisor_1; /* Divisor values for the 8254 timer
 358                                        * pacer */
 359         unsigned int timer_divisor_2;
 360
 361         int is_valid;           /*  Is device valid */
 362
 363         short ai_bounce_buffer[2 * PCI9111_FIFO_HALF_SIZE];
 364 };
 365
 366 #define dev_private     ((struct pci9111_private_data *)dev->private)
 367
 368 /*  ------------------------------------------------------------------ */
 369 /*  PLX9050 SECTION */
 370 /*  ------------------------------------------------------------------ */
 371
 372 #define PLX9050_REGISTER_INTERRUPT_CONTROL 0x4c
 373
 374 #define PLX9050_LINTI1_ENABLE           (1 << 0)
 375 #define PLX9050_LINTI1_ACTIVE_HIGH      (1 << 1)
 376 #define PLX9050_LINTI1_STATUS           (1 << 2)
 377 #define PLX9050_LINTI2_ENABLE           (1 << 3)
 378 #define PLX9050_LINTI2_ACTIVE_HIGH      (1 << 4)
 379 #define PLX9050_LINTI2_STATUS           (1 << 5)
 380 #define PLX9050_PCI_INTERRUPT_ENABLE    (1 << 6)
 381 #define PLX9050_SOFTWARE_INTERRUPT      (1 << 7)
 382
 383 static void plx9050_interrupt_control(unsigned long io_base,
 384                                       bool LINTi1_enable,
 385                                       bool LINTi1_active_high,
 386                                       bool LINTi2_enable,
 387                                       bool LINTi2_active_high,
 388                                       bool interrupt_enable)
 389 {
 390         int flags = 0;
 391
 392         if (LINTi1_enable)
 393                 flags |= PLX9050_LINTI1_ENABLE;
 394         if (LINTi1_active_high)
 395                 flags |= PLX9050_LINTI1_ACTIVE_HIGH;
 396         if (LINTi2_enable)
 397                 flags |= PLX9050_LINTI2_ENABLE;
 398         if (LINTi2_active_high)
 399                 flags |= PLX9050_LINTI2_ACTIVE_HIGH;
 400
 401         if (interrupt_enable)
 402                 flags |= PLX9050_PCI_INTERRUPT_ENABLE;
 403
 404         outb(flags, io_base + PLX9050_REGISTER_INTERRUPT_CONTROL);
 405 }
 406
 407 /*  ------------------------------------------------------------------ */
 408 /*  MISCELLANEOUS SECTION */
 409 /*  ------------------------------------------------------------------ */
 410
 411 /*  8254 timer */
 412
 413 static void pci9111_timer_set(struct comedi_device *dev)
 414 {
 415         pci9111_8254_control_set(PCI9111_8254_COUNTER_0 |
 416                                  PCI9111_8254_READ_LOAD_LSB_MSB |
 417                                  PCI9111_8254_MODE_0 |
 418                                  PCI9111_8254_BINARY_COUNTER);
 419
 420         pci9111_8254_control_set(PCI9111_8254_COUNTER_1 |
 421                                  PCI9111_8254_READ_LOAD_LSB_MSB |
 422                                  PCI9111_8254_MODE_2 |
 423                                  PCI9111_8254_BINARY_COUNTER);
 424
 425         pci9111_8254_control_set(PCI9111_8254_COUNTER_2 |
 426                                  PCI9111_8254_READ_LOAD_LSB_MSB |
 427                                  PCI9111_8254_MODE_2 |
 428                                  PCI9111_8254_BINARY_COUNTER);
 429
 430         udelay(1);
 431
 432         pci9111_8254_counter_2_set(dev_private->timer_divisor_2);
 433         pci9111_8254_counter_1_set(dev_private->timer_divisor_1);
 434 }
 435
 436 enum pci9111_trigger_sources {
 437         software,
 438         timer_pacer,
 439         external
 440 };
 441
 442 static void pci9111_trigger_source_set(struct comedi_device *dev,
 443                                        enum pci9111_trigger_sources source)
 444 {
 445         int flags;
 446
 447         flags = pci9111_trigger_and_autoscan_get() & 0x09;
 448
 449         switch (source) {
 450         case software:
 451                 flags |= PCI9111_EITS_INTERNAL | PCI9111_TPST_SOFTWARE_TRIGGER;
 452                 break;
 453
 454         case timer_pacer:
 455                 flags |= PCI9111_EITS_INTERNAL | PCI9111_TPST_TIMER_PACER;
 456                 break;
 457
 458         case external:
 459                 flags |= PCI9111_EITS_EXTERNAL;
 460                 break;
 461         }
 462
 463         pci9111_trigger_and_autoscan_set(flags);
 464 }
 465
 466 static void pci9111_pretrigger_set(struct comedi_device *dev, bool pretrigger)
 467 {
 468         int flags;
 469
 470         flags = pci9111_trigger_and_autoscan_get() & 0x07;
 471
 472         if (pretrigger)
 473                 flags |= PCI9111_PTRG_ON;
 474
 475         pci9111_trigger_and_autoscan_set(flags);
 476 }
 477
 478 static void pci9111_autoscan_set(struct comedi_device *dev, bool autoscan)
 479 {
 480         int flags;
 481
 482         flags = pci9111_trigger_and_autoscan_get() & 0x0e;
 483
 484         if (autoscan)
 485                 flags |= PCI9111_ASCAN_ON;
 486
 487         pci9111_trigger_and_autoscan_set(flags);
 488 }
 489
 490 enum pci9111_ISC0_sources {
 491         irq_on_eoc,
 492         irq_on_fifo_half_full
 493 };
 494
 495 enum pci9111_ISC1_sources {
 496         irq_on_timer_tick,
 497         irq_on_external_trigger
 498 };
 499
 500 static void pci9111_interrupt_source_set(struct comedi_device *dev,
 501                                          enum pci9111_ISC0_sources irq_0_source,
 502                                          enum pci9111_ISC1_sources irq_1_source)
 503 {
 504         int flags;
 505
 506         flags = pci9111_interrupt_and_fifo_get() & 0x04;
 507
 508         if (irq_0_source == irq_on_fifo_half_full)
 509                 flags |= PCI9111_ISC0_SET_IRQ_ON_FIFO_HALF_FULL;
 510
 511         if (irq_1_source == irq_on_external_trigger)
 512                 flags |= PCI9111_ISC1_SET_IRQ_ON_EXT_TRG;
 513
 514         pci9111_interrupt_and_fifo_set(flags);
 515 }
 516
 517 /*  ------------------------------------------------------------------ */
 518 /*  HARDWARE TRIGGERED ANALOG INPUT SECTION */
 519 /*  ------------------------------------------------------------------ */
 520
 521 /*  Cancel analog input autoscan */
 522
 523 #undef AI_DO_CMD_DEBUG
 524
 525 static int pci9111_ai_cancel(struct comedi_device *dev,
 526                              struct comedi_subdevice *s)
 527 {
 528         /*  Disable interrupts */
 529
 530         plx9050_interrupt_control(dev_private->lcr_io_base, true, true, true,
 531                                   true, false);
 532
 533         pci9111_trigger_source_set(dev, software);
 534
 535         pci9111_autoscan_set(dev, false);
 536
 537         pci9111_fifo_reset();
 538
 539 #ifdef AI_DO_CMD_DEBUG
 540         printk(PCI9111_DRIVER_NAME ": ai_cancel\n");
 541 #endif
 542
 543         return 0;
 544 }
 545
 546 /*  Test analog input command */
 547
 548 #define pci9111_check_trigger_src(src, flags)   do {                    \
 549                 tmp = src;                                              \
 550                 src &= flags;                                           \
 551                 if (!src || tmp != src)                                 \
 552                         error++;                                        \
 553         } while (false);
 554
 555 static int
 556 pci9111_ai_do_cmd_test(struct comedi_device *dev,
 557                        struct comedi_subdevice *s, struct comedi_cmd *cmd)
 558 {
 559         int tmp;
 560         int error = 0;
 561         int range, reference;
 562         int i;
 563         struct pci9111_board *board = (struct pci9111_board *)dev->board_ptr;
 564
 565         /*  Step 1 : check if trigger are trivialy valid */
 566
 567         pci9111_check_trigger_src(cmd->start_src, TRIG_NOW);
 568         pci9111_check_trigger_src(cmd->scan_begin_src,
 569                                   TRIG_TIMER | TRIG_FOLLOW | TRIG_EXT);
 570         pci9111_check_trigger_src(cmd->convert_src, TRIG_TIMER | TRIG_EXT);
 571         pci9111_check_trigger_src(cmd->scan_end_src, TRIG_COUNT);
 572         pci9111_check_trigger_src(cmd->stop_src, TRIG_COUNT | TRIG_NONE);
 573
 574         if (error)
 575                 return 1;
 576
 577         /*  step 2 : make sure trigger sources are unique and mutually
 578          *  compatible */
 579
 580         if (cmd->start_src != TRIG_NOW)
 581                 error++;
 582
 583         if ((cmd->scan_begin_src != TRIG_TIMER) &&
 584             (cmd->scan_begin_src != TRIG_FOLLOW) &&
 585             (cmd->scan_begin_src != TRIG_EXT))
 586                 error++;
 587
 588         if ((cmd->convert_src != TRIG_TIMER) && (cmd->convert_src != TRIG_EXT))
 589                 error++;
 590         if ((cmd->convert_src == TRIG_TIMER) &&
 591             !((cmd->scan_begin_src == TRIG_TIMER) ||
 592               (cmd->scan_begin_src == TRIG_FOLLOW)))
 593                 error++;
 594         if ((cmd->convert_src == TRIG_EXT) &&
 595             !((cmd->scan_begin_src == TRIG_EXT) ||
 596               (cmd->scan_begin_src == TRIG_FOLLOW)))
 597                 error++;
 598
 599
 600         if (cmd->scan_end_src != TRIG_COUNT)
 601                 error++;
 602         if ((cmd->stop_src != TRIG_COUNT) && (cmd->stop_src != TRIG_NONE))
 603                 error++;
 604
 605         if (error)
 606                 return 2;
 607
 608         /*  Step 3 : make sure arguments are trivialy compatible */
 609
 610         if (cmd->chanlist_len < 1) {
 611                 cmd->chanlist_len = 1;
 612                 error++;
 613         }
 614
 615         if (cmd->chanlist_len > board->ai_channel_nbr) {
 616                 cmd->chanlist_len = board->ai_channel_nbr;
 617                 error++;
 618         }
 619
 620         if ((cmd->start_src == TRIG_NOW) && (cmd->start_arg != 0)) {
 621                 cmd->start_arg = 0;
 622                 error++;
 623         }
 624
 625         if ((cmd->convert_src == TRIG_TIMER) &&
 626             (cmd->convert_arg < board->ai_acquisition_period_min_ns)) {
 627                 cmd->convert_arg = board->ai_acquisition_period_min_ns;
 628                 error++;
 629         }
 630         if ((cmd->convert_src == TRIG_EXT) && (cmd->convert_arg != 0)) {
 631                 cmd->convert_arg = 0;
 632                 error++;
 633         }
 634
 635         if ((cmd->scan_begin_src == TRIG_TIMER) &&
 636             (cmd->scan_begin_arg < board->ai_acquisition_period_min_ns)) {
 637                 cmd->scan_begin_arg = board->ai_acquisition_period_min_ns;
 638                 error++;
 639         }
 640         if ((cmd->scan_begin_src == TRIG_FOLLOW)
 641             && (cmd->scan_begin_arg != 0)) {
 642                 cmd->scan_begin_arg = 0;
 643                 error++;
 644         }
 645         if ((cmd->scan_begin_src == TRIG_EXT) && (cmd->scan_begin_arg != 0)) {
 646                 cmd->scan_begin_arg = 0;
 647                 error++;
 648         }
 649
 650         if ((cmd->scan_end_src == TRIG_COUNT) &&
 651             (cmd->scan_end_arg != cmd->chanlist_len)) {
 652                 cmd->scan_end_arg = cmd->chanlist_len;
 653                 error++;
 654         }
 655
 656         if ((cmd->stop_src == TRIG_COUNT) && (cmd->stop_arg < 1)) {
 657                 cmd->stop_arg = 1;
 658                 error++;
 659         }
 660         if ((cmd->stop_src == TRIG_NONE) && (cmd->stop_arg != 0)) {
 661                 cmd->stop_arg = 0;
 662                 error++;
 663         }
 664
 665         if (error)
 666                 return 3;
 667
 668         /*  Step 4 : fix up any arguments */
 669
 670         if (cmd->convert_src == TRIG_TIMER) {
 671                 tmp = cmd->convert_arg;
 672                 i8253_cascade_ns_to_timer_2div(PCI9111_8254_CLOCK_PERIOD_NS,
 673                                                &(dev_private->timer_divisor_1),
 674                                                &(dev_private->timer_divisor_2),
 675                                                &(cmd->convert_arg),
 676                                                cmd->flags & TRIG_ROUND_MASK);
 677                 if (tmp != cmd->convert_arg)
 678                         error++;
 679         }
 680         /*  There's only one timer on this card, so the scan_begin timer must */
 681         /*  be a multiple of chanlist_len*convert_arg */
 682
 683         if (cmd->scan_begin_src == TRIG_TIMER) {
 684
 685                 unsigned int scan_begin_min;
 686                 unsigned int scan_begin_arg;
 687                 unsigned int scan_factor;
 688
 689                 scan_begin_min = cmd->chanlist_len * cmd->convert_arg;
 690
 691                 if (cmd->scan_begin_arg != scan_begin_min) {
 692                         if (scan_begin_min < cmd->scan_begin_arg) {
 693                                 scan_factor =
 694                                     cmd->scan_begin_arg / scan_begin_min;
 695                                 scan_begin_arg = scan_factor * scan_begin_min;
 696                                 if (cmd->scan_begin_arg != scan_begin_arg) {
 697                                         cmd->scan_begin_arg = scan_begin_arg;
 698                                         error++;
 699                                 }
 700                         } else {
 701                                 cmd->scan_begin_arg = scan_begin_min;
 702                                 error++;
 703                         }
 704                 }
 705         }
 706
 707         if (error)
 708                 return 4;
 709
 710         /*  Step 5 : check channel list */
 711
 712         if (cmd->chanlist) {
 713
 714                 range = CR_RANGE(cmd->chanlist[0]);
 715                 reference = CR_AREF(cmd->chanlist[0]);
 716
 717                 if (cmd->chanlist_len > 1) {
 718                         for (i = 0; i < cmd->chanlist_len; i++) {
 719                                 if (CR_CHAN(cmd->chanlist[i]) != i) {
 720                                         comedi_error(dev,
 721                                                      "entries in chanlist must be consecutive "
 722                                                      "channels,counting upwards from 0\n");
 723                                         error++;
 724                                 }
 725                                 if (CR_RANGE(cmd->chanlist[i]) != range) {
 726                                         comedi_error(dev,
 727                                                      "entries in chanlist must all have the same gain\n");
 728                                         error++;
 729                                 }
 730                                 if (CR_AREF(cmd->chanlist[i]) != reference) {
 731                                         comedi_error(dev,
 732                                                      "entries in chanlist must all have the same reference\n");
 733                                         error++;
 734                                 }
 735                         }
 736                 } else {
 737                         if ((CR_CHAN(cmd->chanlist[0]) >
 738                              (board->ai_channel_nbr - 1))
 739                             || (CR_CHAN(cmd->chanlist[0]) < 0)) {
 740                                 comedi_error(dev,
 741                                              "channel number is out of limits\n");
 742                                 error++;
 743                         }
 744                 }
 745         }
 746
 747         if (error)
 748                 return 5;
 749
 750         return 0;
 751
 752 }
 753
 754 /*  Analog input command */
 755
 756 static int pci9111_ai_do_cmd(struct comedi_device *dev,
 757                              struct comedi_subdevice *subdevice)
 758 {
 759         struct comedi_cmd *async_cmd = &subdevice->async->cmd;
 760
 761         if (!dev->irq) {
 762                 comedi_error(dev,
 763                              "no irq assigned for PCI9111, cannot do hardware conversion");
 764                 return -1;
 765         }
 766         /*  Set channel scan limit */
 767         /*  PCI9111 allows only scanning from channel 0 to channel n */
 768         /*  TODO: handle the case of an external multiplexer */
 769
 770         if (async_cmd->chanlist_len > 1) {
 771                 pci9111_ai_channel_set((async_cmd->chanlist_len) - 1);
 772                 pci9111_autoscan_set(dev, true);
 773         } else {
 774                 pci9111_ai_channel_set(CR_CHAN(async_cmd->chanlist[0]));
 775                 pci9111_autoscan_set(dev, false);
 776         }
 777
 778         /*  Set gain */
 779         /*  This is the same gain on every channel */
 780
 781         pci9111_ai_range_set(CR_RANGE(async_cmd->chanlist[0]));
 782
 783         /* Set counter */
 784
 785         switch (async_cmd->stop_src) {
 786         case TRIG_COUNT:
 787                 dev_private->stop_counter =
 788                     async_cmd->stop_arg * async_cmd->chanlist_len;
 789                 dev_private->stop_is_none = 0;
 790                 break;
 791
 792         case TRIG_NONE:
 793                 dev_private->stop_counter = 0;
 794                 dev_private->stop_is_none = 1;
 795                 break;
 796
 797         default:
 798                 comedi_error(dev, "Invalid stop trigger");
 799                 return -1;
 800         }
 801
 802         /*  Set timer pacer */
 803
 804         dev_private->scan_delay = 0;
 805         switch (async_cmd->convert_src) {
 806         case TRIG_TIMER:
 807                 i8253_cascade_ns_to_timer_2div(PCI9111_8254_CLOCK_PERIOD_NS,
 808                                                &(dev_private->timer_divisor_1),
 809                                                &(dev_private->timer_divisor_2),
 810                                                &(async_cmd->convert_arg),
 811                                                async_cmd->
 812                                                flags & TRIG_ROUND_MASK);
 813 #ifdef AI_DO_CMD_DEBUG
 814                 printk(PCI9111_DRIVER_NAME ": divisors = %d, %d\n",
 815                        dev_private->timer_divisor_1,
 816                        dev_private->timer_divisor_2);
 817 #endif
 818
 819                 pci9111_trigger_source_set(dev, software);
 820                 pci9111_timer_set(dev);
 821                 pci9111_fifo_reset();
 822                 pci9111_interrupt_source_set(dev, irq_on_fifo_half_full,
 823                                              irq_on_timer_tick);
 824                 pci9111_trigger_source_set(dev, timer_pacer);
 825                 plx9050_interrupt_control(dev_private->lcr_io_base, true, true,
 826                                           false, true, true);
 827
 828                 if (async_cmd->scan_begin_src == TRIG_TIMER) {
 829                         dev_private->scan_delay =
 830                                 (async_cmd->scan_begin_arg /
 831                                  (async_cmd->convert_arg *
 832                                   async_cmd->chanlist_len)) - 1;
 833                 }
 834
 835                 break;
 836
 837         case TRIG_EXT:
 838
 839                 pci9111_trigger_source_set(dev, external);
 840                 pci9111_fifo_reset();
 841                 pci9111_interrupt_source_set(dev, irq_on_fifo_half_full,
 842                                              irq_on_timer_tick);
 843                 plx9050_interrupt_control(dev_private->lcr_io_base, true, true,
 844                                           false, true, true);
 845
 846                 break;
 847
 848         default:
 849                 comedi_error(dev, "Invalid convert trigger");
 850                 return -1;
 851         }
 852
 853         dev_private->stop_counter *= (1 + dev_private->scan_delay);
 854         dev_private->chanlist_len = async_cmd->chanlist_len;
 855         dev_private->chunk_counter = 0;
 856         dev_private->chunk_num_samples =
 857             dev_private->chanlist_len * (1 + dev_private->scan_delay);
 858
 859 #ifdef AI_DO_CMD_DEBUG
 860         printk(PCI9111_DRIVER_NAME ": start interruptions!\n");
 861         printk(PCI9111_DRIVER_NAME ": trigger source = %2x\n",
 862                pci9111_trigger_and_autoscan_get());
 863         printk(PCI9111_DRIVER_NAME ": irq source     = %2x\n",
 864                pci9111_interrupt_and_fifo_get());
 865         printk(PCI9111_DRIVER_NAME ": ai_do_cmd\n");
 866         printk(PCI9111_DRIVER_NAME ": stop counter   = %d\n",
 867                dev_private->stop_counter);
 868         printk(PCI9111_DRIVER_NAME ": scan delay     = %d\n",
 869                dev_private->scan_delay);
 870         printk(PCI9111_DRIVER_NAME ": chanlist_len   = %d\n",
 871                dev_private->chanlist_len);
 872         printk(PCI9111_DRIVER_NAME ": chunk num samples = %d\n",
 873                dev_private->chunk_num_samples);
 874 #endif
 875
 876         return 0;
 877 }
 878
 879 static void pci9111_ai_munge(struct comedi_device *dev,
 880                              struct comedi_subdevice *s, void *data,
 881                              unsigned int num_bytes,
 882                              unsigned int start_chan_index)
 883 {
 884         unsigned int i, num_samples = num_bytes / sizeof(short);
 885         short *array = data;
 886         int resolution =
 887             ((struct pci9111_board *)dev->board_ptr)->ai_resolution;
 888
 889         for (i = 0; i < num_samples; i++) {
 890                 if (resolution == PCI9111_HR_AI_RESOLUTION)
 891                         array[i] =
 892                             (array[i] & PCI9111_HR_AI_RESOLUTION_MASK) ^
 893                             PCI9111_HR_AI_RESOLUTION_2_CMP_BIT;
 894                 else
 895                         array[i] =
 896                             ((array[i] >> 4) & PCI9111_AI_RESOLUTION_MASK) ^
 897                             PCI9111_AI_RESOLUTION_2_CMP_BIT;
 898         }
 899 }
 900
 901 /*  ------------------------------------------------------------------ */
 902 /*  INTERRUPT SECTION */
 903 /*  ------------------------------------------------------------------ */
 904
 905 #undef INTERRUPT_DEBUG
 906
 907 static irqreturn_t pci9111_interrupt(int irq, void *p_device)
 908 {
 909         struct comedi_device *dev = p_device;
 910         struct comedi_subdevice *subdevice = dev->read_subdev;
 911         struct comedi_async *async;
 912         unsigned long irq_flags;
 913         unsigned char intcsr;
 914
 915         if (!dev->attached) {
 916                 /*  Ignore interrupt before device fully attached. */
 917                 /*  Might not even have allocated subdevices yet! */
 918                 return IRQ_NONE;
 919         }
 920
 921         async = subdevice->async;
 922
 923         spin_lock_irqsave(&dev->spinlock, irq_flags);
 924
 925         /*  Check if we are source of interrupt */
 926         intcsr = inb(dev_private->lcr_io_base +
 927                      PLX9050_REGISTER_INTERRUPT_CONTROL);
 928         if (!(((intcsr & PLX9050_PCI_INTERRUPT_ENABLE) != 0)
 929               && (((intcsr & (PLX9050_LINTI1_ENABLE | PLX9050_LINTI1_STATUS))
 930                    == (PLX9050_LINTI1_ENABLE | PLX9050_LINTI1_STATUS))
 931                   || ((intcsr & (PLX9050_LINTI2_ENABLE | PLX9050_LINTI2_STATUS))
 932                       == (PLX9050_LINTI2_ENABLE | PLX9050_LINTI2_STATUS))))) {
 933                 /*  Not the source of the interrupt. */
 934                 /*  (N.B. not using PLX9050_SOFTWARE_INTERRUPT) */
 935                 spin_unlock_irqrestore(&dev->spinlock, irq_flags);
 936                 return IRQ_NONE;
 937         }
 938
 939         if ((intcsr & (PLX9050_LINTI1_ENABLE | PLX9050_LINTI1_STATUS)) ==
 940             (PLX9050_LINTI1_ENABLE | PLX9050_LINTI1_STATUS)) {
 941                 /*  Interrupt comes from fifo_half-full signal */
 942
 943                 if (pci9111_is_fifo_full()) {
 944                         spin_unlock_irqrestore(&dev->spinlock, irq_flags);
 945                         comedi_error(dev, PCI9111_DRIVER_NAME " fifo overflow");
 946                         pci9111_interrupt_clear();
 947                         pci9111_ai_cancel(dev, subdevice);
 948                         async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
 949                         comedi_event(dev, subdevice);
 950
 951                         return IRQ_HANDLED;
 952                 }
 953
 954                 if (pci9111_is_fifo_half_full()) {
 955                         unsigned int num_samples;
 956                         unsigned int bytes_written = 0;
 957
 958 #ifdef INTERRUPT_DEBUG
 959                         printk(PCI9111_DRIVER_NAME ": fifo is half full\n");
 960 #endif
 961
 962                         num_samples =
 963                             PCI9111_FIFO_HALF_SIZE >
 964                             dev_private->stop_counter
 965                             && !dev_private->
 966                             stop_is_none ? dev_private->stop_counter :
 967                             PCI9111_FIFO_HALF_SIZE;
 968                         insw(PCI9111_IO_BASE + PCI9111_REGISTER_AD_FIFO_VALUE,
 969                              dev_private->ai_bounce_buffer, num_samples);
 970
 971                         if (dev_private->scan_delay < 1) {
 972                                 bytes_written =
 973                                     cfc_write_array_to_buffer(subdevice,
 974                                                               dev_private->
 975                                                               ai_bounce_buffer,
 976                                                               num_samples *
 977                                                               sizeof(short));
 978                         } else {
 979                                 int position = 0;
 980                                 int to_read;
 981
 982                                 while (position < num_samples) {
 983                                         if (dev_private->chunk_counter <
 984                                             dev_private->chanlist_len) {
 985                                                 to_read =
 986                                                     dev_private->chanlist_len -
 987                                                     dev_private->chunk_counter;
 988
 989                                                 if (to_read >
 990                                                     num_samples - position)
 991                                                         to_read =
 992                                                             num_samples -
 993                                                             position;
 994
 995                                                 bytes_written +=
 996                                                     cfc_write_array_to_buffer
 997                                                     (subdevice,
 998                                                      dev_private->ai_bounce_buffer
 999                                                      + position,
1000                                                      to_read * sizeof(short));
1001                                         } else {
1002                                                 to_read =
1003                                                     dev_private->chunk_num_samples
1004                                                     -
1005                                                     dev_private->chunk_counter;
1006                                                 if (to_read >
1007                                                     num_samples - position)
1008                                                         to_read =
1009                                                             num_samples -
1010                                                             position;
1011
1012                                                 bytes_written +=
1013                                                     sizeof(short) * to_read;
1014                                         }
1015
1016                                         position += to_read;
1017                                         dev_private->chunk_counter += to_read;
1018
1019                                         if (dev_private->chunk_counter >=
1020                                             dev_private->chunk_num_samples)
1021                                                 dev_private->chunk_counter = 0;
1022                                 }
1023                         }
1024
1025                         dev_private->stop_counter -=
1026                             bytes_written / sizeof(short);
1027                 }
1028         }
1029
1030         if ((dev_private->stop_counter == 0) && (!dev_private->stop_is_none)) {
1031                 async->events |= COMEDI_CB_EOA;
1032                 pci9111_ai_cancel(dev, subdevice);
1033         }
1034
1035         /* Very important, otherwise another interrupt request will be inserted
1036          * and will cause driver hangs on processing interrupt event. */
1037
1038         pci9111_interrupt_clear();
1039
1040         spin_unlock_irqrestore(&dev->spinlock, irq_flags);
1041
1042         comedi_event(dev, subdevice);
1043
1044         return IRQ_HANDLED;
1045 }
1046
1047 /*  ------------------------------------------------------------------ */
1048 /*  INSTANT ANALOG INPUT OUTPUT SECTION */
1049 /*  ------------------------------------------------------------------ */
1050
1051 /*  analog instant input */
1052
1053 #undef AI_INSN_DEBUG
1054
1055 static int pci9111_ai_insn_read(struct comedi_device *dev,
1056                                 struct comedi_subdevice *subdevice,
1057                                 struct comedi_insn *insn, unsigned int *data)
1058 {
1059         int resolution =
1060             ((struct pci9111_board *)dev->board_ptr)->ai_resolution;
1061
1062         int timeout, i;
1063
1064 #ifdef AI_INSN_DEBUG
1065         printk(PCI9111_DRIVER_NAME ": ai_insn set c/r/n = %2x/%2x/%2x\n",
1066                CR_CHAN((&insn->chanspec)[0]),
1067                CR_RANGE((&insn->chanspec)[0]), insn->n);
1068 #endif
1069
1070         pci9111_ai_channel_set(CR_CHAN((&insn->chanspec)[0]));
1071
1072         if ((pci9111_ai_range_get()) != CR_RANGE((&insn->chanspec)[0]))
1073                 pci9111_ai_range_set(CR_RANGE((&insn->chanspec)[0]));
1074
1075         pci9111_fifo_reset();
1076
1077         for (i = 0; i < insn->n; i++) {
1078                 pci9111_software_trigger();
1079
1080                 timeout = PCI9111_AI_INSTANT_READ_TIMEOUT;
1081
1082                 while (timeout--) {
1083                         if (!pci9111_is_fifo_empty())
1084                                 goto conversion_done;
1085                 }
1086
1087                 comedi_error(dev, "A/D read timeout");
1088                 data[i] = 0;
1089                 pci9111_fifo_reset();
1090                 return -ETIME;
1091
1092 conversion_done:
1093
1094                 if (resolution == PCI9111_HR_AI_RESOLUTION)
1095                         data[i] = pci9111_hr_ai_get_data();
1096                 else
1097                         data[i] = pci9111_ai_get_data();
1098         }
1099
1100 #ifdef AI_INSN_DEBUG
1101         printk(PCI9111_DRIVER_NAME ": ai_insn get c/r/t = %2x/%2x/%2x\n",
1102                pci9111_ai_channel_get(),
1103                pci9111_ai_range_get(), pci9111_trigger_and_autoscan_get());
1104 #endif
1105
1106         return i;
1107 }
1108
1109 /*  Analog instant output */
1110
1111 static int
1112 pci9111_ao_insn_write(struct comedi_device *dev,
1113                       struct comedi_subdevice *s, struct comedi_insn *insn,
1114                       unsigned int *data)
1115 {
1116         int i;
1117
1118         for (i = 0; i < insn->n; i++) {
1119                 pci9111_ao_set_data(data[i]);
1120                 dev_private->ao_readback = data[i];
1121         }
1122
1123         return i;
1124 }
1125
1126 /*  Analog output readback */
1127
1128 static int pci9111_ao_insn_read(struct comedi_device *dev,
1129                                 struct comedi_subdevice *s,
1130                                 struct comedi_insn *insn, unsigned int *data)
1131 {
1132         int i;
1133
1134         for (i = 0; i < insn->n; i++)
1135                 data[i] = dev_private->ao_readback & PCI9111_AO_RESOLUTION_MASK;
1136
1137         return i;
1138 }
1139
1140 /*  ------------------------------------------------------------------ */
1141 /*  DIGITAL INPUT OUTPUT SECTION */
1142 /*  ------------------------------------------------------------------ */
1143
1144 /*  Digital inputs */
1145
1146 static int pci9111_di_insn_bits(struct comedi_device *dev,
1147                                 struct comedi_subdevice *subdevice,
1148                                 struct comedi_insn *insn, unsigned int *data)
1149 {
1150         unsigned int bits;
1151
1152         bits = pci9111_di_get_bits();
1153         data[1] = bits;
1154
1155         return insn->n;
1156 }
1157
1158 /*  Digital outputs */
1159
1160 static int pci9111_do_insn_bits(struct comedi_device *dev,
1161                                 struct comedi_subdevice *subdevice,
1162                                 struct comedi_insn *insn, unsigned int *data)
1163 {
1164         unsigned int bits;
1165
1166         /*  Only set bits that have been masked */
1167         /*  data[0] = mask */
1168         /*  data[1] = bit state */
1169
1170         data[0] &= PCI9111_DO_MASK;
1171
1172         bits = subdevice->state;
1173         bits &= ~data[0];
1174         bits |= data[0] & data[1];
1175         subdevice->state = bits;
1176
1177         pci9111_do_set_bits(bits);
1178
1179         data[1] = bits;
1180
1181         return insn->n;
1182 }
1183
1184 /*  ------------------------------------------------------------------ */
1185 /*  INITIALISATION SECTION */
1186 /*  ------------------------------------------------------------------ */
1187
1188 /*  Reset device */
1189
1190 static int pci9111_reset(struct comedi_device *dev)
1191 {
1192         /*  Set trigger source to software */
1193
1194         plx9050_interrupt_control(dev_private->lcr_io_base, true, true, true,
1195                                   true, false);
1196
1197         pci9111_trigger_source_set(dev, software);
1198         pci9111_pretrigger_set(dev, false);
1199         pci9111_autoscan_set(dev, false);
1200
1201         /*  Reset 8254 chip */
1202
1203         dev_private->timer_divisor_1 = 0;
1204         dev_private->timer_divisor_2 = 0;
1205
1206         pci9111_timer_set(dev);
1207
1208         return 0;
1209 }
1210
1211 static struct pci_dev *pci9111_find_pci(struct comedi_device *dev,
1212                                         struct comedi_devconfig *it)
1213 {
1214         struct pci_dev *pcidev = NULL;
1215         int bus = it->options[0];
1216         int slot = it->options[1];
1217         int i;
1218
1219         for_each_pci_dev(pcidev) {
1220                 if (pcidev->vendor != PCI_VENDOR_ID_ADLINK)
1221                         continue;
1222                 for (i = 0; i < pci9111_board_nbr; i++) {
1223                         if (pcidev->device != pci9111_boards[i].device_id)
1224                                 continue;
1225                         if (bus || slot) {
1226                                 /* requested particular bus/slot */
1227                                 if (pcidev->bus->number != bus ||
1228                                     PCI_SLOT(pcidev->devfn) != slot)
1229                                         continue;
1230                         }
1231                         dev->board_ptr = pci9111_boards + i;
1232                         printk(KERN_ERR
1233                                 "comedi%d: found %s (b:s:f=%d:%d:%d), irq=%d\n",
1234                                 dev->minor, pci9111_boards[i].name,
1235                                 pcidev->bus->number, PCI_SLOT(pcidev->devfn),
1236                                 PCI_FUNC(pcidev->devfn), pcidev->irq);
1237                         return pcidev;
1238                 }
1239         }
1240         printk(KERN_ERR
1241                 "comedi%d: no supported board found! (req. bus/slot : %d/%d)\n",
1242                 dev->minor, bus, slot);
1243         return NULL;
1244 }
1245
1246 static int pci9111_attach(struct comedi_device *dev,
1247                           struct comedi_devconfig *it)
1248 {
1249         struct pci_dev *pcidev;
1250         struct comedi_subdevice *subdevice;
1251         unsigned long io_base, io_range, lcr_io_base, lcr_io_range;
1252         int error;
1253         const struct pci9111_board *board;
1254
1255         if (alloc_private(dev, sizeof(struct pci9111_private_data)) < 0)
1256                 return -ENOMEM;
1257         /*  Probe the device to determine what device in the series it is. */
1258
1259         printk(KERN_ERR "comedi%d: " PCI9111_DRIVER_NAME " driver\n",
1260                                                                 dev->minor);
1261
1262         pcidev = pci9111_find_pci(dev, it);
1263         if (!pcidev)
1264                 return -EIO;
1265         comedi_set_hw_dev(dev, &pcidev->dev);
1266         board = (struct pci9111_board *)dev->board_ptr;
1267
1268         /*  TODO: Warn about non-tested boards. */
1269
1270         /*  Read local configuration register base address
1271          *  [PCI_BASE_ADDRESS #1]. */
1272
1273         lcr_io_base = pci_resource_start(pcidev, 1);
1274         lcr_io_range = pci_resource_len(pcidev, 1);
1275
1276         printk
1277             ("comedi%d: local configuration registers at address 0x%4lx [0x%4lx]\n",
1278              dev->minor, lcr_io_base, lcr_io_range);
1279
1280         /*  Enable PCI device and request regions */
1281         if (comedi_pci_enable(pcidev, PCI9111_DRIVER_NAME) < 0) {
1282                 printk
1283                     ("comedi%d: Failed to enable PCI device and request regions\n",
1284                      dev->minor);
1285                 return -EIO;
1286         }
1287         /*  Read PCI6308 register base address [PCI_BASE_ADDRESS #2]. */
1288
1289         io_base = pci_resource_start(pcidev, 2);
1290         io_range = pci_resource_len(pcidev, 2);
1291
1292         printk(KERN_ERR "comedi%d: 6503 registers at address 0x%4lx [0x%4lx]\n",
1293                dev->minor, io_base, io_range);
1294
1295         dev->iobase = io_base;
1296         dev->board_name = board->name;
1297         dev_private->io_range = io_range;
1298         dev_private->is_valid = 0;
1299         dev_private->lcr_io_base = lcr_io_base;
1300         dev_private->lcr_io_range = lcr_io_range;
1301
1302         pci9111_reset(dev);
1303
1304         /*  Irq setup */
1305
1306         dev->irq = 0;
1307         if (pcidev->irq > 0) {
1308                 dev->irq = pcidev->irq;
1309
1310                 if (request_irq(dev->irq, pci9111_interrupt,
1311                                 IRQF_SHARED, PCI9111_DRIVER_NAME, dev) != 0) {
1312                         printk(KERN_ERR
1313                                 "comedi%d: unable to allocate irq  %u\n",
1314                                         dev->minor, dev->irq);
1315                         return -EINVAL;
1316                 }
1317         }
1318
1319         /*  TODO: Add external multiplexer setup (according to option[2]). */
1320
1321         error = comedi_alloc_subdevices(dev, 4);
1322         if (error)
1323                 return error;
1324
1325         subdevice = dev->subdevices + 0;
1326         dev->read_subdev = subdevice;
1327
1328         subdevice->type = COMEDI_SUBD_AI;
1329         subdevice->subdev_flags = SDF_READABLE | SDF_COMMON | SDF_CMD_READ;
1330
1331         /*  TODO: Add external multiplexer data */
1332         /*     if (devpriv->usemux) { subdevice->n_chan = devpriv->usemux; } */
1333         /*     else { subdevice->n_chan = this_board->n_aichan; } */
1334
1335         subdevice->n_chan = board->ai_channel_nbr;
1336         subdevice->maxdata = board->ai_resolution_mask;
1337         subdevice->len_chanlist = board->ai_channel_nbr;
1338         subdevice->range_table = board->ai_range_list;
1339         subdevice->cancel = pci9111_ai_cancel;
1340         subdevice->insn_read = pci9111_ai_insn_read;
1341         subdevice->do_cmdtest = pci9111_ai_do_cmd_test;
1342         subdevice->do_cmd = pci9111_ai_do_cmd;
1343         subdevice->munge = pci9111_ai_munge;
1344
1345         subdevice = dev->subdevices + 1;
1346         subdevice->type = COMEDI_SUBD_AO;
1347         subdevice->subdev_flags = SDF_WRITABLE | SDF_COMMON;
1348         subdevice->n_chan = board->ao_channel_nbr;
1349         subdevice->maxdata = board->ao_resolution_mask;
1350         subdevice->len_chanlist = board->ao_channel_nbr;
1351         subdevice->range_table = board->ao_range_list;
1352         subdevice->insn_write = pci9111_ao_insn_write;
1353         subdevice->insn_read = pci9111_ao_insn_read;
1354
1355         subdevice = dev->subdevices + 2;
1356         subdevice->type = COMEDI_SUBD_DI;
1357         subdevice->subdev_flags = SDF_READABLE;
1358         subdevice->n_chan = PCI9111_DI_CHANNEL_NBR;
1359         subdevice->maxdata = 1;
1360         subdevice->range_table = &range_digital;
1361         subdevice->insn_bits = pci9111_di_insn_bits;
1362
1363         subdevice = dev->subdevices + 3;
1364         subdevice->type = COMEDI_SUBD_DO;
1365         subdevice->subdev_flags = SDF_READABLE | SDF_WRITABLE;
1366         subdevice->n_chan = PCI9111_DO_CHANNEL_NBR;
1367         subdevice->maxdata = 1;
1368         subdevice->range_table = &range_digital;
1369         subdevice->insn_bits = pci9111_do_insn_bits;
1370
1371         dev_private->is_valid = 1;
1372
1373         return 0;
1374 }
1375
1376 static void pci9111_detach(struct comedi_device *dev)
1377 {
1378         struct pci_dev *pcidev = comedi_to_pci_dev(dev);
1379
1380         if (dev->private != NULL) {
1381                 if (dev_private->is_valid)
1382                         pci9111_reset(dev);
1383         }
1384         if (dev->irq != 0)
1385                 free_irq(dev->irq, dev);
1386         if (pcidev) {
1387                 if (dev->iobase)
1388                         comedi_pci_disable(pcidev);
1389                 pci_dev_put(pcidev);
1390         }
1391 }
1392
1393 static struct comedi_driver adl_pci9111_driver = {
1394         .driver_name    = "adl_pci9111",
1395         .module         = THIS_MODULE,
1396         .attach         = pci9111_attach,
1397         .detach         = pci9111_detach,
1398 };
1399
1400 static int __devinit pci9111_pci_probe(struct pci_dev *dev,
1401                                        const struct pci_device_id *ent)
1402 {
1403         return comedi_pci_auto_config(dev, &adl_pci9111_driver);
1404 }
1405
1406 static void __devexit pci9111_pci_remove(struct pci_dev *dev)
1407 {
1408         comedi_pci_auto_unconfig(dev);
1409 }
1410
1411 static DEFINE_PCI_DEVICE_TABLE(pci9111_pci_table) = {
1412         { PCI_DEVICE(PCI_VENDOR_ID_ADLINK, PCI9111_HR_DEVICE_ID) },
1413         /* { PCI_DEVICE(PCI_VENDOR_ID_ADLINK, PCI9111_HG_DEVICE_ID) }, */
1414         { 0 }
1415 };
1416 MODULE_DEVICE_TABLE(pci, pci9111_pci_table);
1417
1418 static struct pci_driver adl_pci9111_pci_driver = {
1419         .name           = "adl_pci9111",
1420         .id_table       = pci9111_pci_table,
1421         .probe          = pci9111_pci_probe,
1422         .remove         = __devexit_p(pci9111_pci_remove),
1423 };
1424 module_comedi_pci_driver(adl_pci9111_driver, adl_pci9111_pci_driver);
1425
1426 MODULE_AUTHOR("Comedi http://www.comedi.org");
1427 MODULE_DESCRIPTION("Comedi low-level driver");
1428 MODULE_LICENSE("GPL");