3 comedi/drivers/adl_pci9111.c
5 Hardware driver for PCI9111 ADLink cards:
9 Copyright (C) 2002-2005 Emmanuel Pacaud <emmanuel.pacaud@univ-poitiers.fr>
11 This program is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 2 of the License, or
14 (at your option) any later version.
16 This program is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 GNU General Public License for more details.
21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software
23 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
28 Description: Adlink PCI-9111HR
29 Author: Emmanuel Pacaud <emmanuel.pacaud@univ-poitiers.fr>
30 Devices: [ADLink] PCI-9111HR (adl_pci9111)
39 - ai_do_cmd mode with the following sources:
42 - scan_begin_src TRIG_FOLLOW TRIG_TIMER TRIG_EXT
43 - convert_src TRIG_TIMER TRIG_EXT
44 - scan_end_src TRIG_COUNT
45 - stop_src TRIG_COUNT TRIG_NONE
47 The scanned channels must be consecutive and start from 0. They must
48 all have the same range and aref.
50 Configuration options: not applicable, uses PCI auto config
56 2005/02/17 Extend AI streaming capabilities. Now, scan_begin_arg can be
57 a multiple of chanlist_len*convert_arg.
58 2002/02/19 Fixed the two's complement conversion in pci9111_(hr_)ai_get_data.
59 2002/02/18 Added external trigger support for analog input.
63 - Really test implemented functionality.
64 - Add support for the PCI-9111DG with a probe routine to identify
65 the card type (perhaps with the help of the channel number readback
66 of the A/D Data register).
67 - Add external multiplexer support.
71 #include "../comedidev.h"
73 #include <linux/delay.h>
74 #include <linux/interrupt.h>
77 #include "comedi_fc.h"
79 #define PCI9111_DRIVER_NAME "adl_pci9111"
80 #define PCI9111_HR_DEVICE_ID 0x9111
82 #define PCI9111_FIFO_HALF_SIZE 512
84 #define PCI9111_AI_ACQUISITION_PERIOD_MIN_NS 10000
86 #define PCI9111_RANGE_SETTING_DELAY 10
87 #define PCI9111_AI_INSTANT_READ_UDELAY_US 2
88 #define PCI9111_AI_INSTANT_READ_TIMEOUT 100
90 #define PCI9111_8254_CLOCK_PERIOD_NS 500
94 #define PCI9111_AI_FIFO_REG 0x00
95 #define PCI9111_AO_REG 0x00
96 #define PCI9111_DIO_REG 0x02
97 #define PCI9111_REGISTER_EXTENDED_IO_PORTS 0x04
98 #define PCI9111_REGISTER_AD_CHANNEL_CONTROL 0x06 /* Channel
100 #define PCI9111_REGISTER_AD_CHANNEL_READBACK 0x06
101 #define PCI9111_REGISTER_INPUT_SIGNAL_RANGE 0x08
102 #define PCI9111_REGISTER_RANGE_STATUS_READBACK 0x08
103 #define PCI9111_REGISTER_TRIGGER_MODE_CONTROL 0x0A
104 #define PCI9111_REGISTER_AD_MODE_INTERRUPT_READBACK 0x0A
105 #define PCI9111_REGISTER_SOFTWARE_TRIGGER 0x0E
106 #define PCI9111_REGISTER_INTERRUPT_CONTROL 0x0C
107 #define PCI9111_8254_BASE_REG 0x40
108 #define PCI9111_REGISTER_INTERRUPT_CLEAR 0x48
110 #define PCI9111_TRIGGER_MASK 0x0F
111 #define PCI9111_PTRG_OFF (0 << 3)
112 #define PCI9111_PTRG_ON (1 << 3)
113 #define PCI9111_EITS_EXTERNAL (1 << 2)
114 #define PCI9111_EITS_INTERNAL (0 << 2)
115 #define PCI9111_TPST_SOFTWARE_TRIGGER (0 << 1)
116 #define PCI9111_TPST_TIMER_PACER (1 << 1)
117 #define PCI9111_ASCAN_ON (1 << 0)
118 #define PCI9111_ASCAN_OFF (0 << 0)
120 #define PCI9111_ISC0_SET_IRQ_ON_ENDING_OF_AD_CONVERSION (0 << 0)
121 #define PCI9111_ISC0_SET_IRQ_ON_FIFO_HALF_FULL (1 << 0)
122 #define PCI9111_ISC1_SET_IRQ_ON_TIMER_TICK (0 << 1)
123 #define PCI9111_ISC1_SET_IRQ_ON_EXT_TRG (1 << 1)
124 #define PCI9111_FFEN_SET_FIFO_ENABLE (0 << 2)
125 #define PCI9111_FFEN_SET_FIFO_DISABLE (1 << 2)
127 #define PCI9111_CHANNEL_MASK 0x0F
129 #define PCI9111_RANGE_MASK 0x07
130 #define PCI9111_FIFO_EMPTY_MASK 0x10
131 #define PCI9111_FIFO_HALF_FULL_MASK 0x20
132 #define PCI9111_FIFO_FULL_MASK 0x40
133 #define PCI9111_AD_BUSY_MASK 0x80
136 * Define inlined function
139 #define pci9111_trigger_and_autoscan_get() \
140 (inb(dev->iobase + PCI9111_REGISTER_AD_MODE_INTERRUPT_READBACK)&0x0F)
142 #define pci9111_trigger_and_autoscan_set(flags) \
143 outb(flags, dev->iobase + PCI9111_REGISTER_TRIGGER_MODE_CONTROL)
145 #define pci9111_interrupt_and_fifo_get() \
146 ((inb(dev->iobase + PCI9111_REGISTER_AD_MODE_INTERRUPT_READBACK) \
149 #define pci9111_interrupt_and_fifo_set(flags) \
150 outb(flags, dev->iobase + PCI9111_REGISTER_INTERRUPT_CONTROL)
152 #define pci9111_interrupt_clear() \
153 outb(0, dev->iobase + PCI9111_REGISTER_INTERRUPT_CLEAR)
155 #define pci9111_software_trigger() \
156 outb(0, dev->iobase + PCI9111_REGISTER_SOFTWARE_TRIGGER)
158 #define pci9111_fifo_reset() do { \
159 outb(PCI9111_FFEN_SET_FIFO_ENABLE, \
160 dev->iobase + PCI9111_REGISTER_INTERRUPT_CONTROL); \
161 outb(PCI9111_FFEN_SET_FIFO_DISABLE, \
162 dev->iobase + PCI9111_REGISTER_INTERRUPT_CONTROL); \
163 outb(PCI9111_FFEN_SET_FIFO_ENABLE, \
164 dev->iobase + PCI9111_REGISTER_INTERRUPT_CONTROL); \
167 #define pci9111_is_fifo_full() \
168 ((inb(dev->iobase + PCI9111_REGISTER_RANGE_STATUS_READBACK)& \
169 PCI9111_FIFO_FULL_MASK) == 0)
171 #define pci9111_is_fifo_half_full() \
172 ((inb(dev->iobase + PCI9111_REGISTER_RANGE_STATUS_READBACK)& \
173 PCI9111_FIFO_HALF_FULL_MASK) == 0)
175 #define pci9111_is_fifo_empty() \
176 ((inb(dev->iobase + PCI9111_REGISTER_RANGE_STATUS_READBACK)& \
177 PCI9111_FIFO_EMPTY_MASK) == 0)
179 #define pci9111_ai_channel_set(channel) \
180 outb((channel)&PCI9111_CHANNEL_MASK, \
181 dev->iobase + PCI9111_REGISTER_AD_CHANNEL_CONTROL)
183 #define pci9111_ai_channel_get() \
184 (inb(dev->iobase + PCI9111_REGISTER_AD_CHANNEL_READBACK) \
185 &PCI9111_CHANNEL_MASK)
187 #define pci9111_ai_range_set(range) \
188 outb((range)&PCI9111_RANGE_MASK, \
189 dev->iobase + PCI9111_REGISTER_INPUT_SIGNAL_RANGE)
191 #define pci9111_ai_range_get() \
192 (inb(dev->iobase + PCI9111_REGISTER_RANGE_STATUS_READBACK) \
195 static const struct comedi_lrange pci9111_hr_ai_range = {
206 /* Private data structure */
208 struct pci9111_private_data {
209 unsigned long lcr_io_base; /* Local configuration register base
215 unsigned int scan_delay;
216 unsigned int chanlist_len;
217 unsigned int chunk_counter;
218 unsigned int chunk_num_samples;
220 int ao_readback; /* Last written analog output data */
222 unsigned int timer_divisor_1; /* Divisor values for the 8254 timer
224 unsigned int timer_divisor_2;
226 int is_valid; /* Is device valid */
228 short ai_bounce_buffer[2 * PCI9111_FIFO_HALF_SIZE];
231 /* ------------------------------------------------------------------ */
232 /* PLX9050 SECTION */
233 /* ------------------------------------------------------------------ */
235 #define PLX9050_REGISTER_INTERRUPT_CONTROL 0x4c
237 #define PLX9050_LINTI1_ENABLE (1 << 0)
238 #define PLX9050_LINTI1_ACTIVE_HIGH (1 << 1)
239 #define PLX9050_LINTI1_STATUS (1 << 2)
240 #define PLX9050_LINTI2_ENABLE (1 << 3)
241 #define PLX9050_LINTI2_ACTIVE_HIGH (1 << 4)
242 #define PLX9050_LINTI2_STATUS (1 << 5)
243 #define PLX9050_PCI_INTERRUPT_ENABLE (1 << 6)
244 #define PLX9050_SOFTWARE_INTERRUPT (1 << 7)
246 static void plx9050_interrupt_control(unsigned long io_base,
248 bool LINTi1_active_high,
250 bool LINTi2_active_high,
251 bool interrupt_enable)
256 flags |= PLX9050_LINTI1_ENABLE;
257 if (LINTi1_active_high)
258 flags |= PLX9050_LINTI1_ACTIVE_HIGH;
260 flags |= PLX9050_LINTI2_ENABLE;
261 if (LINTi2_active_high)
262 flags |= PLX9050_LINTI2_ACTIVE_HIGH;
264 if (interrupt_enable)
265 flags |= PLX9050_PCI_INTERRUPT_ENABLE;
267 outb(flags, io_base + PLX9050_REGISTER_INTERRUPT_CONTROL);
270 /* ------------------------------------------------------------------ */
271 /* MISCELLANEOUS SECTION */
272 /* ------------------------------------------------------------------ */
276 static void pci9111_timer_set(struct comedi_device *dev)
278 struct pci9111_private_data *dev_private = dev->private;
279 unsigned long timer_base = dev->iobase + PCI9111_8254_BASE_REG;
281 i8254_set_mode(timer_base, 1, 0, I8254_MODE0 | I8254_BINARY);
282 i8254_set_mode(timer_base, 1, 1, I8254_MODE2 | I8254_BINARY);
283 i8254_set_mode(timer_base, 1, 2, I8254_MODE2 | I8254_BINARY);
287 i8254_write(timer_base, 1, 2, dev_private->timer_divisor_2);
288 i8254_write(timer_base, 1, 1, dev_private->timer_divisor_1);
291 enum pci9111_trigger_sources {
297 static void pci9111_trigger_source_set(struct comedi_device *dev,
298 enum pci9111_trigger_sources source)
302 flags = pci9111_trigger_and_autoscan_get() & 0x09;
306 flags |= PCI9111_EITS_INTERNAL | PCI9111_TPST_SOFTWARE_TRIGGER;
310 flags |= PCI9111_EITS_INTERNAL | PCI9111_TPST_TIMER_PACER;
314 flags |= PCI9111_EITS_EXTERNAL;
318 pci9111_trigger_and_autoscan_set(flags);
321 static void pci9111_pretrigger_set(struct comedi_device *dev, bool pretrigger)
325 flags = pci9111_trigger_and_autoscan_get() & 0x07;
328 flags |= PCI9111_PTRG_ON;
330 pci9111_trigger_and_autoscan_set(flags);
333 static void pci9111_autoscan_set(struct comedi_device *dev, bool autoscan)
337 flags = pci9111_trigger_and_autoscan_get() & 0x0e;
340 flags |= PCI9111_ASCAN_ON;
342 pci9111_trigger_and_autoscan_set(flags);
345 enum pci9111_ISC0_sources {
347 irq_on_fifo_half_full
350 enum pci9111_ISC1_sources {
352 irq_on_external_trigger
355 static void pci9111_interrupt_source_set(struct comedi_device *dev,
356 enum pci9111_ISC0_sources irq_0_source,
357 enum pci9111_ISC1_sources irq_1_source)
361 flags = pci9111_interrupt_and_fifo_get() & 0x04;
363 if (irq_0_source == irq_on_fifo_half_full)
364 flags |= PCI9111_ISC0_SET_IRQ_ON_FIFO_HALF_FULL;
366 if (irq_1_source == irq_on_external_trigger)
367 flags |= PCI9111_ISC1_SET_IRQ_ON_EXT_TRG;
369 pci9111_interrupt_and_fifo_set(flags);
372 /* ------------------------------------------------------------------ */
373 /* HARDWARE TRIGGERED ANALOG INPUT SECTION */
374 /* ------------------------------------------------------------------ */
376 /* Cancel analog input autoscan */
378 static int pci9111_ai_cancel(struct comedi_device *dev,
379 struct comedi_subdevice *s)
381 struct pci9111_private_data *dev_private = dev->private;
383 /* Disable interrupts */
385 plx9050_interrupt_control(dev_private->lcr_io_base, true, true, true,
388 pci9111_trigger_source_set(dev, software);
390 pci9111_autoscan_set(dev, false);
392 pci9111_fifo_reset();
397 /* Test analog input command */
399 #define pci9111_check_trigger_src(src, flags) do { \
402 if (!src || tmp != src) \
407 pci9111_ai_do_cmd_test(struct comedi_device *dev,
408 struct comedi_subdevice *s, struct comedi_cmd *cmd)
410 struct pci9111_private_data *dev_private = dev->private;
413 int range, reference;
416 /* Step 1 : check if trigger are trivialy valid */
418 pci9111_check_trigger_src(cmd->start_src, TRIG_NOW);
419 pci9111_check_trigger_src(cmd->scan_begin_src,
420 TRIG_TIMER | TRIG_FOLLOW | TRIG_EXT);
421 pci9111_check_trigger_src(cmd->convert_src, TRIG_TIMER | TRIG_EXT);
422 pci9111_check_trigger_src(cmd->scan_end_src, TRIG_COUNT);
423 pci9111_check_trigger_src(cmd->stop_src, TRIG_COUNT | TRIG_NONE);
428 /* step 2 : make sure trigger sources are unique and mutually
431 if (cmd->start_src != TRIG_NOW)
434 if ((cmd->scan_begin_src != TRIG_TIMER) &&
435 (cmd->scan_begin_src != TRIG_FOLLOW) &&
436 (cmd->scan_begin_src != TRIG_EXT))
439 if ((cmd->convert_src != TRIG_TIMER) && (cmd->convert_src != TRIG_EXT))
441 if ((cmd->convert_src == TRIG_TIMER) &&
442 !((cmd->scan_begin_src == TRIG_TIMER) ||
443 (cmd->scan_begin_src == TRIG_FOLLOW)))
445 if ((cmd->convert_src == TRIG_EXT) &&
446 !((cmd->scan_begin_src == TRIG_EXT) ||
447 (cmd->scan_begin_src == TRIG_FOLLOW)))
451 if (cmd->scan_end_src != TRIG_COUNT)
453 if ((cmd->stop_src != TRIG_COUNT) && (cmd->stop_src != TRIG_NONE))
459 /* Step 3 : make sure arguments are trivialy compatible */
461 if ((cmd->start_src == TRIG_NOW) && (cmd->start_arg != 0)) {
466 if ((cmd->convert_src == TRIG_TIMER) &&
467 (cmd->convert_arg < PCI9111_AI_ACQUISITION_PERIOD_MIN_NS)) {
468 cmd->convert_arg = PCI9111_AI_ACQUISITION_PERIOD_MIN_NS;
471 if ((cmd->convert_src == TRIG_EXT) && (cmd->convert_arg != 0)) {
472 cmd->convert_arg = 0;
476 if ((cmd->scan_begin_src == TRIG_TIMER) &&
477 (cmd->scan_begin_arg < PCI9111_AI_ACQUISITION_PERIOD_MIN_NS)) {
478 cmd->scan_begin_arg = PCI9111_AI_ACQUISITION_PERIOD_MIN_NS;
481 if ((cmd->scan_begin_src == TRIG_FOLLOW)
482 && (cmd->scan_begin_arg != 0)) {
483 cmd->scan_begin_arg = 0;
486 if ((cmd->scan_begin_src == TRIG_EXT) && (cmd->scan_begin_arg != 0)) {
487 cmd->scan_begin_arg = 0;
491 if ((cmd->scan_end_src == TRIG_COUNT) &&
492 (cmd->scan_end_arg != cmd->chanlist_len)) {
493 cmd->scan_end_arg = cmd->chanlist_len;
497 if ((cmd->stop_src == TRIG_COUNT) && (cmd->stop_arg < 1)) {
501 if ((cmd->stop_src == TRIG_NONE) && (cmd->stop_arg != 0)) {
509 /* Step 4 : fix up any arguments */
511 if (cmd->convert_src == TRIG_TIMER) {
512 tmp = cmd->convert_arg;
513 i8253_cascade_ns_to_timer_2div(PCI9111_8254_CLOCK_PERIOD_NS,
514 &(dev_private->timer_divisor_1),
515 &(dev_private->timer_divisor_2),
517 cmd->flags & TRIG_ROUND_MASK);
518 if (tmp != cmd->convert_arg)
521 /* There's only one timer on this card, so the scan_begin timer must */
522 /* be a multiple of chanlist_len*convert_arg */
524 if (cmd->scan_begin_src == TRIG_TIMER) {
526 unsigned int scan_begin_min;
527 unsigned int scan_begin_arg;
528 unsigned int scan_factor;
530 scan_begin_min = cmd->chanlist_len * cmd->convert_arg;
532 if (cmd->scan_begin_arg != scan_begin_min) {
533 if (scan_begin_min < cmd->scan_begin_arg) {
535 cmd->scan_begin_arg / scan_begin_min;
536 scan_begin_arg = scan_factor * scan_begin_min;
537 if (cmd->scan_begin_arg != scan_begin_arg) {
538 cmd->scan_begin_arg = scan_begin_arg;
542 cmd->scan_begin_arg = scan_begin_min;
551 /* Step 5 : check channel list */
555 range = CR_RANGE(cmd->chanlist[0]);
556 reference = CR_AREF(cmd->chanlist[0]);
558 if (cmd->chanlist_len > 1) {
559 for (i = 0; i < cmd->chanlist_len; i++) {
560 if (CR_CHAN(cmd->chanlist[i]) != i) {
562 "entries in chanlist must be consecutive "
563 "channels,counting upwards from 0\n");
566 if (CR_RANGE(cmd->chanlist[i]) != range) {
568 "entries in chanlist must all have the same gain\n");
571 if (CR_AREF(cmd->chanlist[i]) != reference) {
573 "entries in chanlist must all have the same reference\n");
587 /* Analog input command */
589 static int pci9111_ai_do_cmd(struct comedi_device *dev,
590 struct comedi_subdevice *s)
592 struct pci9111_private_data *dev_private = dev->private;
593 struct comedi_cmd *async_cmd = &s->async->cmd;
597 "no irq assigned for PCI9111, cannot do hardware conversion");
600 /* Set channel scan limit */
601 /* PCI9111 allows only scanning from channel 0 to channel n */
602 /* TODO: handle the case of an external multiplexer */
604 if (async_cmd->chanlist_len > 1) {
605 pci9111_ai_channel_set((async_cmd->chanlist_len) - 1);
606 pci9111_autoscan_set(dev, true);
608 pci9111_ai_channel_set(CR_CHAN(async_cmd->chanlist[0]));
609 pci9111_autoscan_set(dev, false);
613 /* This is the same gain on every channel */
615 pci9111_ai_range_set(CR_RANGE(async_cmd->chanlist[0]));
619 switch (async_cmd->stop_src) {
621 dev_private->stop_counter =
622 async_cmd->stop_arg * async_cmd->chanlist_len;
623 dev_private->stop_is_none = 0;
627 dev_private->stop_counter = 0;
628 dev_private->stop_is_none = 1;
632 comedi_error(dev, "Invalid stop trigger");
636 /* Set timer pacer */
638 dev_private->scan_delay = 0;
639 switch (async_cmd->convert_src) {
641 i8253_cascade_ns_to_timer_2div(PCI9111_8254_CLOCK_PERIOD_NS,
642 &(dev_private->timer_divisor_1),
643 &(dev_private->timer_divisor_2),
644 &(async_cmd->convert_arg),
646 flags & TRIG_ROUND_MASK);
648 pci9111_trigger_source_set(dev, software);
649 pci9111_timer_set(dev);
650 pci9111_fifo_reset();
651 pci9111_interrupt_source_set(dev, irq_on_fifo_half_full,
653 pci9111_trigger_source_set(dev, timer_pacer);
654 plx9050_interrupt_control(dev_private->lcr_io_base, true, true,
657 if (async_cmd->scan_begin_src == TRIG_TIMER) {
658 dev_private->scan_delay =
659 (async_cmd->scan_begin_arg /
660 (async_cmd->convert_arg *
661 async_cmd->chanlist_len)) - 1;
668 pci9111_trigger_source_set(dev, external);
669 pci9111_fifo_reset();
670 pci9111_interrupt_source_set(dev, irq_on_fifo_half_full,
672 plx9050_interrupt_control(dev_private->lcr_io_base, true, true,
678 comedi_error(dev, "Invalid convert trigger");
682 dev_private->stop_counter *= (1 + dev_private->scan_delay);
683 dev_private->chanlist_len = async_cmd->chanlist_len;
684 dev_private->chunk_counter = 0;
685 dev_private->chunk_num_samples =
686 dev_private->chanlist_len * (1 + dev_private->scan_delay);
691 static void pci9111_ai_munge(struct comedi_device *dev,
692 struct comedi_subdevice *s, void *data,
693 unsigned int num_bytes,
694 unsigned int start_chan_index)
697 unsigned int maxdata = s->maxdata;
698 unsigned int invert = (maxdata + 1) >> 1;
699 unsigned int shift = (maxdata == 0xffff) ? 0 : 4;
700 unsigned int num_samples = num_bytes / sizeof(short);
703 for (i = 0; i < num_samples; i++)
704 array[i] = ((array[i] >> shift) & maxdata) ^ invert;
707 /* ------------------------------------------------------------------ */
708 /* INTERRUPT SECTION */
709 /* ------------------------------------------------------------------ */
711 static irqreturn_t pci9111_interrupt(int irq, void *p_device)
713 struct comedi_device *dev = p_device;
714 struct pci9111_private_data *dev_private = dev->private;
715 struct comedi_subdevice *s = dev->read_subdev;
716 struct comedi_async *async;
717 unsigned long irq_flags;
718 unsigned char intcsr;
720 if (!dev->attached) {
721 /* Ignore interrupt before device fully attached. */
722 /* Might not even have allocated subdevices yet! */
728 spin_lock_irqsave(&dev->spinlock, irq_flags);
730 /* Check if we are source of interrupt */
731 intcsr = inb(dev_private->lcr_io_base +
732 PLX9050_REGISTER_INTERRUPT_CONTROL);
733 if (!(((intcsr & PLX9050_PCI_INTERRUPT_ENABLE) != 0)
734 && (((intcsr & (PLX9050_LINTI1_ENABLE | PLX9050_LINTI1_STATUS))
735 == (PLX9050_LINTI1_ENABLE | PLX9050_LINTI1_STATUS))
736 || ((intcsr & (PLX9050_LINTI2_ENABLE | PLX9050_LINTI2_STATUS))
737 == (PLX9050_LINTI2_ENABLE | PLX9050_LINTI2_STATUS))))) {
738 /* Not the source of the interrupt. */
739 /* (N.B. not using PLX9050_SOFTWARE_INTERRUPT) */
740 spin_unlock_irqrestore(&dev->spinlock, irq_flags);
744 if ((intcsr & (PLX9050_LINTI1_ENABLE | PLX9050_LINTI1_STATUS)) ==
745 (PLX9050_LINTI1_ENABLE | PLX9050_LINTI1_STATUS)) {
746 /* Interrupt comes from fifo_half-full signal */
748 if (pci9111_is_fifo_full()) {
749 spin_unlock_irqrestore(&dev->spinlock, irq_flags);
750 comedi_error(dev, PCI9111_DRIVER_NAME " fifo overflow");
751 pci9111_interrupt_clear();
752 pci9111_ai_cancel(dev, s);
753 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
754 comedi_event(dev, s);
759 if (pci9111_is_fifo_half_full()) {
760 unsigned int num_samples;
761 unsigned int bytes_written = 0;
764 PCI9111_FIFO_HALF_SIZE >
765 dev_private->stop_counter
767 stop_is_none ? dev_private->stop_counter :
768 PCI9111_FIFO_HALF_SIZE;
769 insw(dev->iobase + PCI9111_AI_FIFO_REG,
770 dev_private->ai_bounce_buffer, num_samples);
772 if (dev_private->scan_delay < 1) {
774 cfc_write_array_to_buffer(s,
783 while (position < num_samples) {
784 if (dev_private->chunk_counter <
785 dev_private->chanlist_len) {
787 dev_private->chanlist_len -
788 dev_private->chunk_counter;
791 num_samples - position)
797 cfc_write_array_to_buffer
799 dev_private->ai_bounce_buffer
801 to_read * sizeof(short));
804 dev_private->chunk_num_samples
806 dev_private->chunk_counter;
808 num_samples - position)
814 sizeof(short) * to_read;
818 dev_private->chunk_counter += to_read;
820 if (dev_private->chunk_counter >=
821 dev_private->chunk_num_samples)
822 dev_private->chunk_counter = 0;
826 dev_private->stop_counter -=
827 bytes_written / sizeof(short);
831 if ((dev_private->stop_counter == 0) && (!dev_private->stop_is_none)) {
832 async->events |= COMEDI_CB_EOA;
833 pci9111_ai_cancel(dev, s);
836 /* Very important, otherwise another interrupt request will be inserted
837 * and will cause driver hangs on processing interrupt event. */
839 pci9111_interrupt_clear();
841 spin_unlock_irqrestore(&dev->spinlock, irq_flags);
843 comedi_event(dev, s);
848 /* ------------------------------------------------------------------ */
849 /* INSTANT ANALOG INPUT OUTPUT SECTION */
850 /* ------------------------------------------------------------------ */
852 /* analog instant input */
854 static int pci9111_ai_insn_read(struct comedi_device *dev,
855 struct comedi_subdevice *s,
856 struct comedi_insn *insn, unsigned int *data)
858 unsigned int chan = CR_CHAN(insn->chanspec);
859 unsigned int range = CR_RANGE(insn->chanspec);
860 unsigned int maxdata = s->maxdata;
861 unsigned int invert = (maxdata + 1) >> 1;
862 unsigned int shift = (maxdata == 0xffff) ? 0 : 4;
866 pci9111_ai_channel_set(chan);
868 if ((pci9111_ai_range_get()) != range)
869 pci9111_ai_range_set(range);
871 pci9111_fifo_reset();
873 for (i = 0; i < insn->n; i++) {
874 pci9111_software_trigger();
876 timeout = PCI9111_AI_INSTANT_READ_TIMEOUT;
879 if (!pci9111_is_fifo_empty())
880 goto conversion_done;
883 comedi_error(dev, "A/D read timeout");
885 pci9111_fifo_reset();
890 data[i] = inw(dev->iobase + PCI9111_AI_FIFO_REG);
891 data[i] = ((data[i] >> shift) & maxdata) ^ invert;
897 static int pci9111_ao_insn_write(struct comedi_device *dev,
898 struct comedi_subdevice *s,
899 struct comedi_insn *insn,
902 struct pci9111_private_data *dev_private = dev->private;
903 unsigned int val = 0;
906 for (i = 0; i < insn->n; i++) {
908 outw(val, dev->iobase + PCI9111_AO_REG);
910 dev_private->ao_readback = val;
915 static int pci9111_ao_insn_read(struct comedi_device *dev,
916 struct comedi_subdevice *s,
917 struct comedi_insn *insn,
920 struct pci9111_private_data *dev_private = dev->private;
923 for (i = 0; i < insn->n; i++)
924 data[i] = dev_private->ao_readback;
929 static int pci9111_di_insn_bits(struct comedi_device *dev,
930 struct comedi_subdevice *s,
931 struct comedi_insn *insn,
934 data[1] = inw(dev->iobase + PCI9111_DIO_REG);
939 static int pci9111_do_insn_bits(struct comedi_device *dev,
940 struct comedi_subdevice *s,
941 struct comedi_insn *insn,
944 unsigned int mask = data[0];
945 unsigned int bits = data[1];
949 s->state |= (bits & mask);
951 outw(s->state, dev->iobase + PCI9111_DIO_REG);
959 /* ------------------------------------------------------------------ */
960 /* INITIALISATION SECTION */
961 /* ------------------------------------------------------------------ */
965 static int pci9111_reset(struct comedi_device *dev)
967 struct pci9111_private_data *dev_private = dev->private;
969 /* Set trigger source to software */
971 plx9050_interrupt_control(dev_private->lcr_io_base, true, true, true,
974 pci9111_trigger_source_set(dev, software);
975 pci9111_pretrigger_set(dev, false);
976 pci9111_autoscan_set(dev, false);
978 /* Reset 8254 chip */
980 dev_private->timer_divisor_1 = 0;
981 dev_private->timer_divisor_2 = 0;
983 pci9111_timer_set(dev);
988 static int pci9111_attach_pci(struct comedi_device *dev,
989 struct pci_dev *pcidev)
991 struct pci9111_private_data *dev_private;
992 struct comedi_subdevice *s;
995 comedi_set_hw_dev(dev, &pcidev->dev);
996 dev->board_name = dev->driver->driver_name;
998 ret = alloc_private(dev, sizeof(*dev_private));
1001 dev_private = dev->private;
1003 ret = comedi_pci_enable(pcidev, dev->board_name);
1006 dev_private->lcr_io_base = pci_resource_start(pcidev, 1);
1007 dev->iobase = pci_resource_start(pcidev, 2);
1011 if (pcidev->irq > 0) {
1012 ret = request_irq(dev->irq, pci9111_interrupt,
1013 IRQF_SHARED, dev->board_name, dev);
1016 dev->irq = pcidev->irq;
1019 ret = comedi_alloc_subdevices(dev, 4);
1023 s = &dev->subdevices[0];
1024 dev->read_subdev = s;
1025 s->type = COMEDI_SUBD_AI;
1026 s->subdev_flags = SDF_READABLE | SDF_COMMON | SDF_CMD_READ;
1028 s->maxdata = 0xffff;
1029 s->len_chanlist = 16;
1030 s->range_table = &pci9111_hr_ai_range;
1031 s->cancel = pci9111_ai_cancel;
1032 s->insn_read = pci9111_ai_insn_read;
1033 s->do_cmdtest = pci9111_ai_do_cmd_test;
1034 s->do_cmd = pci9111_ai_do_cmd;
1035 s->munge = pci9111_ai_munge;
1037 s = &dev->subdevices[1];
1038 s->type = COMEDI_SUBD_AO;
1039 s->subdev_flags = SDF_WRITABLE | SDF_COMMON;
1041 s->maxdata = 0x0fff;
1042 s->len_chanlist = 1;
1043 s->range_table = &range_bipolar10;
1044 s->insn_write = pci9111_ao_insn_write;
1045 s->insn_read = pci9111_ao_insn_read;
1047 s = &dev->subdevices[2];
1048 s->type = COMEDI_SUBD_DI;
1049 s->subdev_flags = SDF_READABLE;
1052 s->range_table = &range_digital;
1053 s->insn_bits = pci9111_di_insn_bits;
1055 s = &dev->subdevices[3];
1056 s->type = COMEDI_SUBD_DO;
1057 s->subdev_flags = SDF_READABLE | SDF_WRITABLE;
1060 s->range_table = &range_digital;
1061 s->insn_bits = pci9111_do_insn_bits;
1063 dev_private->is_valid = 1;
1065 dev_info(dev->class_dev, "%s attached\n", dev->board_name);
1070 static void pci9111_detach(struct comedi_device *dev)
1072 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
1073 struct pci9111_private_data *dev_private = dev->private;
1076 if (dev_private->is_valid)
1080 free_irq(dev->irq, dev);
1083 comedi_pci_disable(pcidev);
1084 pci_dev_put(pcidev);
1088 static struct comedi_driver adl_pci9111_driver = {
1089 .driver_name = "adl_pci9111",
1090 .module = THIS_MODULE,
1091 .attach_pci = pci9111_attach_pci,
1092 .detach = pci9111_detach,
1095 static int __devinit pci9111_pci_probe(struct pci_dev *dev,
1096 const struct pci_device_id *ent)
1098 return comedi_pci_auto_config(dev, &adl_pci9111_driver);
1101 static void __devexit pci9111_pci_remove(struct pci_dev *dev)
1103 comedi_pci_auto_unconfig(dev);
1106 static DEFINE_PCI_DEVICE_TABLE(pci9111_pci_table) = {
1107 { PCI_DEVICE(PCI_VENDOR_ID_ADLINK, PCI9111_HR_DEVICE_ID) },
1108 /* { PCI_DEVICE(PCI_VENDOR_ID_ADLINK, PCI9111_HG_DEVICE_ID) }, */
1111 MODULE_DEVICE_TABLE(pci, pci9111_pci_table);
1113 static struct pci_driver adl_pci9111_pci_driver = {
1114 .name = "adl_pci9111",
1115 .id_table = pci9111_pci_table,
1116 .probe = pci9111_pci_probe,
1117 .remove = __devexit_p(pci9111_pci_remove),
1119 module_comedi_pci_driver(adl_pci9111_driver, adl_pci9111_pci_driver);
1121 MODULE_AUTHOR("Comedi http://www.comedi.org");
1122 MODULE_DESCRIPTION("Comedi low-level driver");
1123 MODULE_LICENSE("GPL");