drivers/staging/comedi/drivers/adl_pci9111.c

   1 /*
   2
   3 comedi/drivers/adl_pci9111.c
   4
   5 Hardware driver for PCI9111 ADLink cards:
   6
   7 PCI-9111HR
   8
   9 Copyright (C) 2002-2005 Emmanuel Pacaud <emmanuel.pacaud@univ-poitiers.fr>
  10
  11 This program is free software; you can redistribute it and/or modify
  12 it under the terms of the GNU General Public License as published by
  13 the Free Software Foundation; either version 2 of the License, or
  14 (at your option) any later version.
  15
  16 This program is distributed in the hope that it will be useful,
  17 but WITHOUT ANY WARRANTY; without even the implied warranty of
  18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19 GNU General Public License for more details.
  20
  21 You should have received a copy of the GNU General Public License
  22 along with this program; if not, write to the Free Software
  23 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  24 */
  25
  26 /*
  27 Driver: adl_pci9111
  28 Description: Adlink PCI-9111HR
  29 Author: Emmanuel Pacaud <emmanuel.pacaud@univ-poitiers.fr>
  30 Devices: [ADLink] PCI-9111HR (adl_pci9111)
  31 Status: experimental
  32
  33 Supports:
  34
  35         - ai_insn read
  36         - ao_insn read/write
  37         - di_insn read
  38         - do_insn read/write
  39         - ai_do_cmd mode with the following sources:
  40
  41         - start_src             TRIG_NOW
  42         - scan_begin_src        TRIG_FOLLOW     TRIG_TIMER      TRIG_EXT
  43         - convert_src                           TRIG_TIMER      TRIG_EXT
  44         - scan_end_src          TRIG_COUNT
  45         - stop_src              TRIG_COUNT      TRIG_NONE
  46
  47 The scanned channels must be consecutive and start from 0. They must
  48 all have the same range and aref.
  49
  50 Configuration options: not applicable, uses PCI auto config
  51 */
  52
  53 /*
  54 CHANGELOG:
  55
  56 2005/02/17 Extend AI streaming capabilities. Now, scan_begin_arg can be
  57 a multiple of chanlist_len*convert_arg.
  58 2002/02/19 Fixed the two's complement conversion in pci9111_(hr_)ai_get_data.
  59 2002/02/18 Added external trigger support for analog input.
  60
  61 TODO:
  62
  63         - Really test implemented functionality.
  64         - Add support for the PCI-9111DG with a probe routine to identify
  65           the card type (perhaps with the help of the channel number readback
  66           of the A/D Data register).
  67         - Add external multiplexer support.
  68
  69 */
  70
  71 #include "../comedidev.h"
  72
  73 #include <linux/delay.h>
  74 #include <linux/interrupt.h>
  75
  76 #include "8253.h"
  77 #include "comedi_fc.h"
  78
  79 #define PCI9111_DRIVER_NAME     "adl_pci9111"
  80 #define PCI9111_HR_DEVICE_ID    0x9111
  81
  82 #define PCI9111_FIFO_HALF_SIZE  512
  83
  84 #define PCI9111_AI_ACQUISITION_PERIOD_MIN_NS    10000
  85
  86 #define PCI9111_RANGE_SETTING_DELAY             10
  87 #define PCI9111_AI_INSTANT_READ_UDELAY_US       2
  88 #define PCI9111_AI_INSTANT_READ_TIMEOUT         100
  89
  90 #define PCI9111_8254_CLOCK_PERIOD_NS            500
  91
  92 /*
  93  * IO address map and bit defines
  94  */
  95 #define PCI9111_AI_FIFO_REG             0x00
  96 #define PCI9111_AO_REG                  0x00
  97 #define PCI9111_DIO_REG                 0x02
  98 #define PCI9111_EDIO_REG                0x04
  99 #define PCI9111_AI_CHANNEL_REG          0x06
 100 #define PCI9111_AI_RANGE_STAT_REG       0x08
 101 #define PCI9111_AI_STAT_AD_BUSY         (1 << 7)
 102 #define PCI9111_AI_STAT_FF_FF           (1 << 6)
 103 #define PCI9111_AI_STAT_FF_HF           (1 << 5)
 104 #define PCI9111_AI_STAT_FF_EF           (1 << 4)
 105 #define PCI9111_AI_RANGE_MASK           (7 << 0)
 106 #define PCI9111_AI_TRIG_CTRL_REG        0x0a
 107 #define PCI9111_AI_TRIG_CTRL_TRGEVENT   (1 << 5)
 108 #define PCI9111_AI_TRIG_CTRL_POTRG      (1 << 4)
 109 #define PCI9111_AI_TRIG_CTRL_PTRG       (1 << 3)
 110 #define PCI9111_AI_TRIG_CTRL_ETIS       (1 << 2)
 111 #define PCI9111_AI_TRIG_CTRL_TPST       (1 << 1)
 112 #define PCI9111_AI_TRIG_CTRL_ASCAN      (1 << 0)
 113 #define PCI9111_INT_CTRL_REG            0x0c
 114 #define PCI9111_INT_CTRL_ISC2           (1 << 3)
 115 #define PCI9111_INT_CTRL_FFEN           (1 << 2)
 116 #define PCI9111_INT_CTRL_ISC1           (1 << 1)
 117 #define PCI9111_INT_CTRL_ISC0           (1 << 0)
 118 #define PCI9111_SOFT_TRIG_REG           0x0e
 119 #define PCI9111_8254_BASE_REG           0x40
 120 #define PCI9111_INT_CLR_REG             0x48
 121
 122 static const struct comedi_lrange pci9111_ai_range = {
 123         5,
 124         {
 125                 BIP_RANGE(10),
 126                 BIP_RANGE(5),
 127                 BIP_RANGE(2.5),
 128                 BIP_RANGE(1.25),
 129                 BIP_RANGE(0.625)
 130         }
 131 };
 132
 133 /*  Private data structure */
 134
 135 struct pci9111_private_data {
 136         unsigned long lcr_io_base; /* Local configuration register base
 137                                     * address */
 138
 139         int stop_counter;
 140         int stop_is_none;
 141
 142         unsigned int scan_delay;
 143         unsigned int chanlist_len;
 144         unsigned int chunk_counter;
 145         unsigned int chunk_num_samples;
 146
 147         int ao_readback;        /*  Last written analog output data */
 148
 149         unsigned int div1;
 150         unsigned int div2;
 151
 152         short ai_bounce_buffer[2 * PCI9111_FIFO_HALF_SIZE];
 153 };
 154
 155 /*  ------------------------------------------------------------------ */
 156 /*  PLX9050 SECTION */
 157 /*  ------------------------------------------------------------------ */
 158
 159 #define PLX9050_REGISTER_INTERRUPT_CONTROL 0x4c
 160
 161 #define PLX9050_LINTI1_ENABLE           (1 << 0)
 162 #define PLX9050_LINTI1_ACTIVE_HIGH      (1 << 1)
 163 #define PLX9050_LINTI1_STATUS           (1 << 2)
 164 #define PLX9050_LINTI2_ENABLE           (1 << 3)
 165 #define PLX9050_LINTI2_ACTIVE_HIGH      (1 << 4)
 166 #define PLX9050_LINTI2_STATUS           (1 << 5)
 167 #define PLX9050_PCI_INTERRUPT_ENABLE    (1 << 6)
 168 #define PLX9050_SOFTWARE_INTERRUPT      (1 << 7)
 169
 170 static void plx9050_interrupt_control(unsigned long io_base,
 171                                       bool LINTi1_enable,
 172                                       bool LINTi1_active_high,
 173                                       bool LINTi2_enable,
 174                                       bool LINTi2_active_high,
 175                                       bool interrupt_enable)
 176 {
 177         int flags = 0;
 178
 179         if (LINTi1_enable)
 180                 flags |= PLX9050_LINTI1_ENABLE;
 181         if (LINTi1_active_high)
 182                 flags |= PLX9050_LINTI1_ACTIVE_HIGH;
 183         if (LINTi2_enable)
 184                 flags |= PLX9050_LINTI2_ENABLE;
 185         if (LINTi2_active_high)
 186                 flags |= PLX9050_LINTI2_ACTIVE_HIGH;
 187
 188         if (interrupt_enable)
 189                 flags |= PLX9050_PCI_INTERRUPT_ENABLE;
 190
 191         outb(flags, io_base + PLX9050_REGISTER_INTERRUPT_CONTROL);
 192 }
 193
 194 /*  ------------------------------------------------------------------ */
 195 /*  MISCELLANEOUS SECTION */
 196 /*  ------------------------------------------------------------------ */
 197
 198 /*  8254 timer */
 199
 200 static void pci9111_timer_set(struct comedi_device *dev)
 201 {
 202         struct pci9111_private_data *dev_private = dev->private;
 203         unsigned long timer_base = dev->iobase + PCI9111_8254_BASE_REG;
 204
 205         i8254_set_mode(timer_base, 1, 0, I8254_MODE0 | I8254_BINARY);
 206         i8254_set_mode(timer_base, 1, 1, I8254_MODE2 | I8254_BINARY);
 207         i8254_set_mode(timer_base, 1, 2, I8254_MODE2 | I8254_BINARY);
 208
 209         udelay(1);
 210
 211         i8254_write(timer_base, 1, 2, dev_private->div2);
 212         i8254_write(timer_base, 1, 1, dev_private->div1);
 213 }
 214
 215 enum pci9111_trigger_sources {
 216         software,
 217         timer_pacer,
 218         external
 219 };
 220
 221 static void pci9111_trigger_source_set(struct comedi_device *dev,
 222                                        enum pci9111_trigger_sources source)
 223 {
 224         int flags;
 225
 226         /* Read the current trigger mode control bits */
 227         flags = inb(dev->iobase + PCI9111_AI_TRIG_CTRL_REG);
 228         /* Mask off the EITS and TPST bits */
 229         flags &= 0x9;
 230
 231         switch (source) {
 232         case software:
 233                 break;
 234
 235         case timer_pacer:
 236                 flags |= PCI9111_AI_TRIG_CTRL_TPST;
 237                 break;
 238
 239         case external:
 240                 flags |= PCI9111_AI_TRIG_CTRL_ETIS;
 241                 break;
 242         }
 243
 244         outb(flags, dev->iobase + PCI9111_AI_TRIG_CTRL_REG);
 245 }
 246
 247 static void pci9111_pretrigger_set(struct comedi_device *dev, bool pretrigger)
 248 {
 249         int flags;
 250
 251         /* Read the current trigger mode control bits */
 252         flags = inb(dev->iobase + PCI9111_AI_TRIG_CTRL_REG);
 253         /* Mask off the PTRG bit */
 254         flags &= 0x7;
 255
 256         if (pretrigger)
 257                 flags |= PCI9111_AI_TRIG_CTRL_PTRG;
 258
 259         outb(flags, dev->iobase + PCI9111_AI_TRIG_CTRL_REG);
 260 }
 261
 262 static void pci9111_autoscan_set(struct comedi_device *dev, bool autoscan)
 263 {
 264         int flags;
 265
 266         /* Read the current trigger mode control bits */
 267         flags = inb(dev->iobase + PCI9111_AI_TRIG_CTRL_REG);
 268         /* Mask off the ASCAN bit */
 269         flags &= 0xe;
 270
 271         if (autoscan)
 272                 flags |= PCI9111_AI_TRIG_CTRL_ASCAN;
 273
 274         outb(flags, dev->iobase + PCI9111_AI_TRIG_CTRL_REG);
 275 }
 276
 277 enum pci9111_ISC0_sources {
 278         irq_on_eoc,
 279         irq_on_fifo_half_full
 280 };
 281
 282 enum pci9111_ISC1_sources {
 283         irq_on_timer_tick,
 284         irq_on_external_trigger
 285 };
 286
 287 static void pci9111_interrupt_source_set(struct comedi_device *dev,
 288                                          enum pci9111_ISC0_sources irq_0_source,
 289                                          enum pci9111_ISC1_sources irq_1_source)
 290 {
 291         int flags;
 292
 293         /* Read the current interrupt control bits */
 294         flags = inb(dev->iobase + PCI9111_AI_TRIG_CTRL_REG);
 295         /* Shift the bits so they are compatible with the write register */
 296         flags >>= 4;
 297         /* Mask off the ISCx bits */
 298         flags &= 0xc0;
 299
 300         /* Now set the new ISCx bits */
 301         if (irq_0_source == irq_on_fifo_half_full)
 302                 flags |= PCI9111_INT_CTRL_ISC0;
 303
 304         if (irq_1_source == irq_on_external_trigger)
 305                 flags |= PCI9111_INT_CTRL_ISC1;
 306
 307         outb(flags, dev->iobase + PCI9111_INT_CTRL_REG);
 308 }
 309
 310 static void pci9111_fifo_reset(struct comedi_device *dev)
 311 {
 312         unsigned long int_ctrl_reg = dev->iobase + PCI9111_INT_CTRL_REG;
 313
 314         /* To reset the FIFO, set FFEN sequence as 0 -> 1 -> 0 */
 315         outb(0, int_ctrl_reg);
 316         outb(PCI9111_INT_CTRL_FFEN, int_ctrl_reg);
 317         outb(0, int_ctrl_reg);
 318 }
 319
 320 /*  ------------------------------------------------------------------ */
 321 /*  HARDWARE TRIGGERED ANALOG INPUT SECTION */
 322 /*  ------------------------------------------------------------------ */
 323
 324 /*  Cancel analog input autoscan */
 325
 326 static int pci9111_ai_cancel(struct comedi_device *dev,
 327                              struct comedi_subdevice *s)
 328 {
 329         struct pci9111_private_data *dev_private = dev->private;
 330
 331         /*  Disable interrupts */
 332
 333         plx9050_interrupt_control(dev_private->lcr_io_base, true, true, true,
 334                                   true, false);
 335
 336         pci9111_trigger_source_set(dev, software);
 337
 338         pci9111_autoscan_set(dev, false);
 339
 340         pci9111_fifo_reset(dev);
 341
 342         return 0;
 343 }
 344
 345 static int pci9111_ai_do_cmd_test(struct comedi_device *dev,
 346                                   struct comedi_subdevice *s,
 347                                   struct comedi_cmd *cmd)
 348 {
 349         struct pci9111_private_data *dev_private = dev->private;
 350         int tmp;
 351         int error = 0;
 352         int range, reference;
 353         int i;
 354
 355         /* Step 1 : check if trigger are trivialy valid */
 356
 357         error |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW);
 358         error |= cfc_check_trigger_src(&cmd->scan_begin_src,
 359                                         TRIG_TIMER | TRIG_FOLLOW | TRIG_EXT);
 360         error |= cfc_check_trigger_src(&cmd->convert_src,
 361                                         TRIG_TIMER | TRIG_EXT);
 362         error |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
 363         error |= cfc_check_trigger_src(&cmd->stop_src,
 364                                         TRIG_COUNT | TRIG_NONE);
 365
 366         if (error)
 367                 return 1;
 368
 369         /* Step 2a : make sure trigger sources are unique */
 370
 371         error |= cfc_check_trigger_is_unique(cmd->scan_begin_src);
 372         error |= cfc_check_trigger_is_unique(cmd->convert_src);
 373         error |= cfc_check_trigger_is_unique(cmd->stop_src);
 374
 375         /* Step 2b : and mutually compatible */
 376
 377         if ((cmd->convert_src == TRIG_TIMER) &&
 378             !((cmd->scan_begin_src == TRIG_TIMER) ||
 379               (cmd->scan_begin_src == TRIG_FOLLOW)))
 380                 error |= -EINVAL;
 381         if ((cmd->convert_src == TRIG_EXT) &&
 382             !((cmd->scan_begin_src == TRIG_EXT) ||
 383               (cmd->scan_begin_src == TRIG_FOLLOW)))
 384                 error |= -EINVAL;
 385
 386         if (error)
 387                 return 2;
 388
 389         /*  Step 3 : make sure arguments are trivialy compatible */
 390
 391         if ((cmd->start_src == TRIG_NOW) && (cmd->start_arg != 0)) {
 392                 cmd->start_arg = 0;
 393                 error++;
 394         }
 395
 396         if ((cmd->convert_src == TRIG_TIMER) &&
 397             (cmd->convert_arg < PCI9111_AI_ACQUISITION_PERIOD_MIN_NS)) {
 398                 cmd->convert_arg = PCI9111_AI_ACQUISITION_PERIOD_MIN_NS;
 399                 error++;
 400         }
 401         if ((cmd->convert_src == TRIG_EXT) && (cmd->convert_arg != 0)) {
 402                 cmd->convert_arg = 0;
 403                 error++;
 404         }
 405
 406         if ((cmd->scan_begin_src == TRIG_TIMER) &&
 407             (cmd->scan_begin_arg < PCI9111_AI_ACQUISITION_PERIOD_MIN_NS)) {
 408                 cmd->scan_begin_arg = PCI9111_AI_ACQUISITION_PERIOD_MIN_NS;
 409                 error++;
 410         }
 411         if ((cmd->scan_begin_src == TRIG_FOLLOW)
 412             && (cmd->scan_begin_arg != 0)) {
 413                 cmd->scan_begin_arg = 0;
 414                 error++;
 415         }
 416         if ((cmd->scan_begin_src == TRIG_EXT) && (cmd->scan_begin_arg != 0)) {
 417                 cmd->scan_begin_arg = 0;
 418                 error++;
 419         }
 420
 421         if ((cmd->scan_end_src == TRIG_COUNT) &&
 422             (cmd->scan_end_arg != cmd->chanlist_len)) {
 423                 cmd->scan_end_arg = cmd->chanlist_len;
 424                 error++;
 425         }
 426
 427         if ((cmd->stop_src == TRIG_COUNT) && (cmd->stop_arg < 1)) {
 428                 cmd->stop_arg = 1;
 429                 error++;
 430         }
 431         if ((cmd->stop_src == TRIG_NONE) && (cmd->stop_arg != 0)) {
 432                 cmd->stop_arg = 0;
 433                 error++;
 434         }
 435
 436         if (error)
 437                 return 3;
 438
 439         /*  Step 4 : fix up any arguments */
 440
 441         if (cmd->convert_src == TRIG_TIMER) {
 442                 tmp = cmd->convert_arg;
 443                 i8253_cascade_ns_to_timer_2div(PCI9111_8254_CLOCK_PERIOD_NS,
 444                                                &dev_private->div1,
 445                                                &dev_private->div2,
 446                                                &cmd->convert_arg,
 447                                                cmd->flags & TRIG_ROUND_MASK);
 448                 if (tmp != cmd->convert_arg)
 449                         error++;
 450         }
 451         /*  There's only one timer on this card, so the scan_begin timer must */
 452         /*  be a multiple of chanlist_len*convert_arg */
 453
 454         if (cmd->scan_begin_src == TRIG_TIMER) {
 455
 456                 unsigned int scan_begin_min;
 457                 unsigned int scan_begin_arg;
 458                 unsigned int scan_factor;
 459
 460                 scan_begin_min = cmd->chanlist_len * cmd->convert_arg;
 461
 462                 if (cmd->scan_begin_arg != scan_begin_min) {
 463                         if (scan_begin_min < cmd->scan_begin_arg) {
 464                                 scan_factor =
 465                                     cmd->scan_begin_arg / scan_begin_min;
 466                                 scan_begin_arg = scan_factor * scan_begin_min;
 467                                 if (cmd->scan_begin_arg != scan_begin_arg) {
 468                                         cmd->scan_begin_arg = scan_begin_arg;
 469                                         error++;
 470                                 }
 471                         } else {
 472                                 cmd->scan_begin_arg = scan_begin_min;
 473                                 error++;
 474                         }
 475                 }
 476         }
 477
 478         if (error)
 479                 return 4;
 480
 481         /*  Step 5 : check channel list */
 482
 483         if (cmd->chanlist) {
 484
 485                 range = CR_RANGE(cmd->chanlist[0]);
 486                 reference = CR_AREF(cmd->chanlist[0]);
 487
 488                 if (cmd->chanlist_len > 1) {
 489                         for (i = 0; i < cmd->chanlist_len; i++) {
 490                                 if (CR_CHAN(cmd->chanlist[i]) != i) {
 491                                         comedi_error(dev,
 492                                                      "entries in chanlist must be consecutive "
 493                                                      "channels,counting upwards from 0\n");
 494                                         error++;
 495                                 }
 496                                 if (CR_RANGE(cmd->chanlist[i]) != range) {
 497                                         comedi_error(dev,
 498                                                      "entries in chanlist must all have the same gain\n");
 499                                         error++;
 500                                 }
 501                                 if (CR_AREF(cmd->chanlist[i]) != reference) {
 502                                         comedi_error(dev,
 503                                                      "entries in chanlist must all have the same reference\n");
 504                                         error++;
 505                                 }
 506                         }
 507                 }
 508         }
 509
 510         if (error)
 511                 return 5;
 512
 513         return 0;
 514
 515 }
 516
 517 /*  Analog input command */
 518
 519 static int pci9111_ai_do_cmd(struct comedi_device *dev,
 520                              struct comedi_subdevice *s)
 521 {
 522         struct pci9111_private_data *dev_private = dev->private;
 523         struct comedi_cmd *async_cmd = &s->async->cmd;
 524
 525         if (!dev->irq) {
 526                 comedi_error(dev,
 527                              "no irq assigned for PCI9111, cannot do hardware conversion");
 528                 return -1;
 529         }
 530         /*  Set channel scan limit */
 531         /*  PCI9111 allows only scanning from channel 0 to channel n */
 532         /*  TODO: handle the case of an external multiplexer */
 533
 534         if (async_cmd->chanlist_len > 1) {
 535                 outb(async_cmd->chanlist_len - 1,
 536                         dev->iobase + PCI9111_AI_CHANNEL_REG);
 537                 pci9111_autoscan_set(dev, true);
 538         } else {
 539                 outb(CR_CHAN(async_cmd->chanlist[0]),
 540                         dev->iobase + PCI9111_AI_CHANNEL_REG);
 541                 pci9111_autoscan_set(dev, false);
 542         }
 543
 544         /*  Set gain */
 545         /*  This is the same gain on every channel */
 546
 547         outb(CR_RANGE(async_cmd->chanlist[0]) & PCI9111_AI_RANGE_MASK,
 548                 dev->iobase + PCI9111_AI_RANGE_STAT_REG);
 549
 550         /* Set counter */
 551
 552         switch (async_cmd->stop_src) {
 553         case TRIG_COUNT:
 554                 dev_private->stop_counter =
 555                     async_cmd->stop_arg * async_cmd->chanlist_len;
 556                 dev_private->stop_is_none = 0;
 557                 break;
 558
 559         case TRIG_NONE:
 560                 dev_private->stop_counter = 0;
 561                 dev_private->stop_is_none = 1;
 562                 break;
 563
 564         default:
 565                 comedi_error(dev, "Invalid stop trigger");
 566                 return -1;
 567         }
 568
 569         /*  Set timer pacer */
 570
 571         dev_private->scan_delay = 0;
 572         switch (async_cmd->convert_src) {
 573         case TRIG_TIMER:
 574                 pci9111_trigger_source_set(dev, software);
 575                 pci9111_timer_set(dev);
 576                 pci9111_fifo_reset(dev);
 577                 pci9111_interrupt_source_set(dev, irq_on_fifo_half_full,
 578                                              irq_on_timer_tick);
 579                 pci9111_trigger_source_set(dev, timer_pacer);
 580                 plx9050_interrupt_control(dev_private->lcr_io_base, true, true,
 581                                           false, true, true);
 582
 583                 if (async_cmd->scan_begin_src == TRIG_TIMER) {
 584                         dev_private->scan_delay =
 585                                 (async_cmd->scan_begin_arg /
 586                                  (async_cmd->convert_arg *
 587                                   async_cmd->chanlist_len)) - 1;
 588                 }
 589
 590                 break;
 591
 592         case TRIG_EXT:
 593
 594                 pci9111_trigger_source_set(dev, external);
 595                 pci9111_fifo_reset(dev);
 596                 pci9111_interrupt_source_set(dev, irq_on_fifo_half_full,
 597                                              irq_on_timer_tick);
 598                 plx9050_interrupt_control(dev_private->lcr_io_base, true, true,
 599                                           false, true, true);
 600
 601                 break;
 602
 603         default:
 604                 comedi_error(dev, "Invalid convert trigger");
 605                 return -1;
 606         }
 607
 608         dev_private->stop_counter *= (1 + dev_private->scan_delay);
 609         dev_private->chanlist_len = async_cmd->chanlist_len;
 610         dev_private->chunk_counter = 0;
 611         dev_private->chunk_num_samples =
 612             dev_private->chanlist_len * (1 + dev_private->scan_delay);
 613
 614         return 0;
 615 }
 616
 617 static void pci9111_ai_munge(struct comedi_device *dev,
 618                              struct comedi_subdevice *s, void *data,
 619                              unsigned int num_bytes,
 620                              unsigned int start_chan_index)
 621 {
 622         short *array = data;
 623         unsigned int maxdata = s->maxdata;
 624         unsigned int invert = (maxdata + 1) >> 1;
 625         unsigned int shift = (maxdata == 0xffff) ? 0 : 4;
 626         unsigned int num_samples = num_bytes / sizeof(short);
 627         unsigned int i;
 628
 629         for (i = 0; i < num_samples; i++)
 630                 array[i] = ((array[i] >> shift) & maxdata) ^ invert;
 631 }
 632
 633 /*  ------------------------------------------------------------------ */
 634 /*  INTERRUPT SECTION */
 635 /*  ------------------------------------------------------------------ */
 636
 637 static irqreturn_t pci9111_interrupt(int irq, void *p_device)
 638 {
 639         struct comedi_device *dev = p_device;
 640         struct pci9111_private_data *dev_private = dev->private;
 641         struct comedi_subdevice *s = dev->read_subdev;
 642         struct comedi_async *async;
 643         unsigned int status;
 644         unsigned long irq_flags;
 645         unsigned char intcsr;
 646
 647         if (!dev->attached) {
 648                 /*  Ignore interrupt before device fully attached. */
 649                 /*  Might not even have allocated subdevices yet! */
 650                 return IRQ_NONE;
 651         }
 652
 653         async = s->async;
 654
 655         spin_lock_irqsave(&dev->spinlock, irq_flags);
 656
 657         /*  Check if we are source of interrupt */
 658         intcsr = inb(dev_private->lcr_io_base +
 659                      PLX9050_REGISTER_INTERRUPT_CONTROL);
 660         if (!(((intcsr & PLX9050_PCI_INTERRUPT_ENABLE) != 0)
 661               && (((intcsr & (PLX9050_LINTI1_ENABLE | PLX9050_LINTI1_STATUS))
 662                    == (PLX9050_LINTI1_ENABLE | PLX9050_LINTI1_STATUS))
 663                   || ((intcsr & (PLX9050_LINTI2_ENABLE | PLX9050_LINTI2_STATUS))
 664                       == (PLX9050_LINTI2_ENABLE | PLX9050_LINTI2_STATUS))))) {
 665                 /*  Not the source of the interrupt. */
 666                 /*  (N.B. not using PLX9050_SOFTWARE_INTERRUPT) */
 667                 spin_unlock_irqrestore(&dev->spinlock, irq_flags);
 668                 return IRQ_NONE;
 669         }
 670
 671         if ((intcsr & (PLX9050_LINTI1_ENABLE | PLX9050_LINTI1_STATUS)) ==
 672             (PLX9050_LINTI1_ENABLE | PLX9050_LINTI1_STATUS)) {
 673                 /*  Interrupt comes from fifo_half-full signal */
 674
 675                 status = inb(dev->iobase + PCI9111_AI_RANGE_STAT_REG);
 676
 677                 /* '0' means FIFO is full, data may have been lost */
 678                 if (!(status & PCI9111_AI_STAT_FF_FF)) {
 679                         spin_unlock_irqrestore(&dev->spinlock, irq_flags);
 680                         comedi_error(dev, PCI9111_DRIVER_NAME " fifo overflow");
 681                         outb(0, dev->iobase + PCI9111_INT_CLR_REG);
 682                         pci9111_ai_cancel(dev, s);
 683                         async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
 684                         comedi_event(dev, s);
 685
 686                         return IRQ_HANDLED;
 687                 }
 688
 689                 /* '0' means FIFO is half-full */
 690                 if (!(status & PCI9111_AI_STAT_FF_HF)) {
 691                         unsigned int num_samples;
 692                         unsigned int bytes_written = 0;
 693
 694                         num_samples =
 695                             PCI9111_FIFO_HALF_SIZE >
 696                             dev_private->stop_counter
 697                             && !dev_private->
 698                             stop_is_none ? dev_private->stop_counter :
 699                             PCI9111_FIFO_HALF_SIZE;
 700                         insw(dev->iobase + PCI9111_AI_FIFO_REG,
 701                              dev_private->ai_bounce_buffer, num_samples);
 702
 703                         if (dev_private->scan_delay < 1) {
 704                                 bytes_written =
 705                                     cfc_write_array_to_buffer(s,
 706                                                               dev_private->
 707                                                               ai_bounce_buffer,
 708                                                               num_samples *
 709                                                               sizeof(short));
 710                         } else {
 711                                 int position = 0;
 712                                 int to_read;
 713
 714                                 while (position < num_samples) {
 715                                         if (dev_private->chunk_counter <
 716                                             dev_private->chanlist_len) {
 717                                                 to_read =
 718                                                     dev_private->chanlist_len -
 719                                                     dev_private->chunk_counter;
 720
 721                                                 if (to_read >
 722                                                     num_samples - position)
 723                                                         to_read =
 724                                                             num_samples -
 725                                                             position;
 726
 727                                                 bytes_written +=
 728                                                     cfc_write_array_to_buffer
 729                                                     (s,
 730                                                      dev_private->ai_bounce_buffer
 731                                                      + position,
 732                                                      to_read * sizeof(short));
 733                                         } else {
 734                                                 to_read =
 735                                                     dev_private->chunk_num_samples
 736                                                     -
 737                                                     dev_private->chunk_counter;
 738                                                 if (to_read >
 739                                                     num_samples - position)
 740                                                         to_read =
 741                                                             num_samples -
 742                                                             position;
 743
 744                                                 bytes_written +=
 745                                                     sizeof(short) * to_read;
 746                                         }
 747
 748                                         position += to_read;
 749                                         dev_private->chunk_counter += to_read;
 750
 751                                         if (dev_private->chunk_counter >=
 752                                             dev_private->chunk_num_samples)
 753                                                 dev_private->chunk_counter = 0;
 754                                 }
 755                         }
 756
 757                         dev_private->stop_counter -=
 758                             bytes_written / sizeof(short);
 759                 }
 760         }
 761
 762         if ((dev_private->stop_counter == 0) && (!dev_private->stop_is_none)) {
 763                 async->events |= COMEDI_CB_EOA;
 764                 pci9111_ai_cancel(dev, s);
 765         }
 766
 767         outb(0, dev->iobase + PCI9111_INT_CLR_REG);
 768
 769         spin_unlock_irqrestore(&dev->spinlock, irq_flags);
 770
 771         comedi_event(dev, s);
 772
 773         return IRQ_HANDLED;
 774 }
 775
 776 /*  ------------------------------------------------------------------ */
 777 /*  INSTANT ANALOG INPUT OUTPUT SECTION */
 778 /*  ------------------------------------------------------------------ */
 779
 780 /*  analog instant input */
 781
 782 static int pci9111_ai_insn_read(struct comedi_device *dev,
 783                                 struct comedi_subdevice *s,
 784                                 struct comedi_insn *insn, unsigned int *data)
 785 {
 786         unsigned int chan = CR_CHAN(insn->chanspec);
 787         unsigned int range = CR_RANGE(insn->chanspec);
 788         unsigned int maxdata = s->maxdata;
 789         unsigned int invert = (maxdata + 1) >> 1;
 790         unsigned int shift = (maxdata == 0xffff) ? 0 : 4;
 791         unsigned int status;
 792         int timeout;
 793         int i;
 794
 795         outb(chan, dev->iobase + PCI9111_AI_CHANNEL_REG);
 796
 797         status = inb(dev->iobase + PCI9111_AI_RANGE_STAT_REG);
 798         if ((status & PCI9111_AI_RANGE_MASK) != range) {
 799                 outb(range & PCI9111_AI_RANGE_MASK,
 800                         dev->iobase + PCI9111_AI_RANGE_STAT_REG);
 801         }
 802
 803         pci9111_fifo_reset(dev);
 804
 805         for (i = 0; i < insn->n; i++) {
 806                 /* Generate a software trigger */
 807                 outb(0, dev->iobase + PCI9111_SOFT_TRIG_REG);
 808
 809                 timeout = PCI9111_AI_INSTANT_READ_TIMEOUT;
 810
 811                 while (timeout--) {
 812                         status = inb(dev->iobase + PCI9111_AI_RANGE_STAT_REG);
 813                         /* '1' means FIFO is not empty */
 814                         if (status & PCI9111_AI_STAT_FF_EF)
 815                                 goto conversion_done;
 816                 }
 817
 818                 comedi_error(dev, "A/D read timeout");
 819                 data[i] = 0;
 820                 pci9111_fifo_reset(dev);
 821                 return -ETIME;
 822
 823 conversion_done:
 824
 825                 data[i] = inw(dev->iobase + PCI9111_AI_FIFO_REG);
 826                 data[i] = ((data[i] >> shift) & maxdata) ^ invert;
 827         }
 828
 829         return i;
 830 }
 831
 832 static int pci9111_ao_insn_write(struct comedi_device *dev,
 833                                  struct comedi_subdevice *s,
 834                                  struct comedi_insn *insn,
 835                                  unsigned int *data)
 836 {
 837         struct pci9111_private_data *dev_private = dev->private;
 838         unsigned int val = 0;
 839         int i;
 840
 841         for (i = 0; i < insn->n; i++) {
 842                 val = data[i];
 843                 outw(val, dev->iobase + PCI9111_AO_REG);
 844         }
 845         dev_private->ao_readback = val;
 846
 847         return insn->n;
 848 }
 849
 850 static int pci9111_ao_insn_read(struct comedi_device *dev,
 851                                 struct comedi_subdevice *s,
 852                                 struct comedi_insn *insn,
 853                                 unsigned int *data)
 854 {
 855         struct pci9111_private_data *dev_private = dev->private;
 856         int i;
 857
 858         for (i = 0; i < insn->n; i++)
 859                 data[i] = dev_private->ao_readback;
 860
 861         return insn->n;
 862 }
 863
 864 static int pci9111_di_insn_bits(struct comedi_device *dev,
 865                                 struct comedi_subdevice *s,
 866                                 struct comedi_insn *insn,
 867                                 unsigned int *data)
 868 {
 869         data[1] = inw(dev->iobase + PCI9111_DIO_REG);
 870
 871         return insn->n;
 872 }
 873
 874 static int pci9111_do_insn_bits(struct comedi_device *dev,
 875                                 struct comedi_subdevice *s,
 876                                 struct comedi_insn *insn,
 877                                 unsigned int *data)
 878 {
 879         unsigned int mask = data[0];
 880         unsigned int bits = data[1];
 881
 882         if (mask) {
 883                 s->state &= ~mask;
 884                 s->state |= (bits & mask);
 885
 886                 outw(s->state, dev->iobase + PCI9111_DIO_REG);
 887         }
 888
 889         data[1] = s->state;
 890
 891         return insn->n;
 892 }
 893
 894 /*  ------------------------------------------------------------------ */
 895 /*  INITIALISATION SECTION */
 896 /*  ------------------------------------------------------------------ */
 897
 898 /*  Reset device */
 899
 900 static int pci9111_reset(struct comedi_device *dev)
 901 {
 902         struct pci9111_private_data *dev_private = dev->private;
 903
 904         /*  Set trigger source to software */
 905
 906         plx9050_interrupt_control(dev_private->lcr_io_base, true, true, true,
 907                                   true, false);
 908
 909         pci9111_trigger_source_set(dev, software);
 910         pci9111_pretrigger_set(dev, false);
 911         pci9111_autoscan_set(dev, false);
 912
 913         /* Reset 8254 chip */
 914         dev_private->div1 = 0;
 915         dev_private->div2 = 0;
 916         pci9111_timer_set(dev);
 917
 918         return 0;
 919 }
 920
 921 static int pci9111_attach_pci(struct comedi_device *dev,
 922                               struct pci_dev *pcidev)
 923 {
 924         struct pci9111_private_data *dev_private;
 925         struct comedi_subdevice *s;
 926         int ret;
 927
 928         comedi_set_hw_dev(dev, &pcidev->dev);
 929         dev->board_name = dev->driver->driver_name;
 930
 931         ret = alloc_private(dev, sizeof(*dev_private));
 932         if (ret)
 933                 return ret;
 934         dev_private = dev->private;
 935
 936         ret = comedi_pci_enable(pcidev, dev->board_name);
 937         if (ret)
 938                 return ret;
 939         dev_private->lcr_io_base = pci_resource_start(pcidev, 1);
 940         dev->iobase = pci_resource_start(pcidev, 2);
 941
 942         pci9111_reset(dev);
 943
 944         if (pcidev->irq > 0) {
 945                 ret = request_irq(dev->irq, pci9111_interrupt,
 946                                   IRQF_SHARED, dev->board_name, dev);
 947                 if (ret)
 948                         return ret;
 949                 dev->irq = pcidev->irq;
 950         }
 951
 952         ret = comedi_alloc_subdevices(dev, 4);
 953         if (ret)
 954                 return ret;
 955
 956         s = &dev->subdevices[0];
 957         dev->read_subdev = s;
 958         s->type         = COMEDI_SUBD_AI;
 959         s->subdev_flags = SDF_READABLE | SDF_COMMON | SDF_CMD_READ;
 960         s->n_chan       = 16;
 961         s->maxdata      = 0xffff;
 962         s->len_chanlist = 16;
 963         s->range_table  = &pci9111_ai_range;
 964         s->cancel       = pci9111_ai_cancel;
 965         s->insn_read    = pci9111_ai_insn_read;
 966         s->do_cmdtest   = pci9111_ai_do_cmd_test;
 967         s->do_cmd       = pci9111_ai_do_cmd;
 968         s->munge        = pci9111_ai_munge;
 969
 970         s = &dev->subdevices[1];
 971         s->type         = COMEDI_SUBD_AO;
 972         s->subdev_flags = SDF_WRITABLE | SDF_COMMON;
 973         s->n_chan       = 1;
 974         s->maxdata      = 0x0fff;
 975         s->len_chanlist = 1;
 976         s->range_table  = &range_bipolar10;
 977         s->insn_write   = pci9111_ao_insn_write;
 978         s->insn_read    = pci9111_ao_insn_read;
 979
 980         s = &dev->subdevices[2];
 981         s->type         = COMEDI_SUBD_DI;
 982         s->subdev_flags = SDF_READABLE;
 983         s->n_chan       = 16;
 984         s->maxdata      = 1;
 985         s->range_table  = &range_digital;
 986         s->insn_bits    = pci9111_di_insn_bits;
 987
 988         s = &dev->subdevices[3];
 989         s->type         = COMEDI_SUBD_DO;
 990         s->subdev_flags = SDF_READABLE | SDF_WRITABLE;
 991         s->n_chan       = 16;
 992         s->maxdata      = 1;
 993         s->range_table  = &range_digital;
 994         s->insn_bits    = pci9111_do_insn_bits;
 995
 996         dev_info(dev->class_dev, "%s attached\n", dev->board_name);
 997
 998         return 0;
 999 }
1000
1001 static void pci9111_detach(struct comedi_device *dev)
1002 {
1003         struct pci_dev *pcidev = comedi_to_pci_dev(dev);
1004
1005         if (dev->iobase)
1006                 pci9111_reset(dev);
1007         if (dev->irq != 0)
1008                 free_irq(dev->irq, dev);
1009         if (pcidev) {
1010                 if (dev->iobase)
1011                         comedi_pci_disable(pcidev);
1012                 pci_dev_put(pcidev);
1013         }
1014 }
1015
1016 static struct comedi_driver adl_pci9111_driver = {
1017         .driver_name    = "adl_pci9111",
1018         .module         = THIS_MODULE,
1019         .attach_pci     = pci9111_attach_pci,
1020         .detach         = pci9111_detach,
1021 };
1022
1023 static int __devinit pci9111_pci_probe(struct pci_dev *dev,
1024                                        const struct pci_device_id *ent)
1025 {
1026         return comedi_pci_auto_config(dev, &adl_pci9111_driver);
1027 }
1028
1029 static void __devexit pci9111_pci_remove(struct pci_dev *dev)
1030 {
1031         comedi_pci_auto_unconfig(dev);
1032 }
1033
1034 static DEFINE_PCI_DEVICE_TABLE(pci9111_pci_table) = {
1035         { PCI_DEVICE(PCI_VENDOR_ID_ADLINK, PCI9111_HR_DEVICE_ID) },
1036         /* { PCI_DEVICE(PCI_VENDOR_ID_ADLINK, PCI9111_HG_DEVICE_ID) }, */
1037         { 0 }
1038 };
1039 MODULE_DEVICE_TABLE(pci, pci9111_pci_table);
1040
1041 static struct pci_driver adl_pci9111_pci_driver = {
1042         .name           = "adl_pci9111",
1043         .id_table       = pci9111_pci_table,
1044         .probe          = pci9111_pci_probe,
1045         .remove         = __devexit_p(pci9111_pci_remove),
1046 };
1047 module_comedi_pci_driver(adl_pci9111_driver, adl_pci9111_pci_driver);
1048
1049 MODULE_AUTHOR("Comedi http://www.comedi.org");
1050 MODULE_DESCRIPTION("Comedi low-level driver");
1051 MODULE_LICENSE("GPL");