3 comedi/drivers/adl_pci9111.c
5 Hardware driver for PCI9111 ADLink cards:
9 Copyright (C) 2002-2005 Emmanuel Pacaud <emmanuel.pacaud@univ-poitiers.fr>
11 This program is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 2 of the License, or
14 (at your option) any later version.
16 This program is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 GNU General Public License for more details.
21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software
23 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
28 Description: Adlink PCI-9111HR
29 Author: Emmanuel Pacaud <emmanuel.pacaud@univ-poitiers.fr>
30 Devices: [ADLink] PCI-9111HR (adl_pci9111)
39 - ai_do_cmd mode with the following sources:
42 - scan_begin_src TRIG_FOLLOW TRIG_TIMER TRIG_EXT
43 - convert_src TRIG_TIMER TRIG_EXT
44 - scan_end_src TRIG_COUNT
45 - stop_src TRIG_COUNT TRIG_NONE
47 The scanned channels must be consecutive and start from 0. They must
48 all have the same range and aref.
50 Configuration options:
52 [0] - PCI bus number (optional)
53 [1] - PCI slot number (optional)
55 If bus/slot is not specified, the first available PCI
63 2005/02/17 Extend AI streaming capabilities. Now, scan_begin_arg can be
64 a multiple of chanlist_len*convert_arg.
65 2002/02/19 Fixed the two's complement conversion in pci9111_(hr_)ai_get_data.
66 2002/02/18 Added external trigger support for analog input.
70 - Really test implemented functionality.
71 - Add support for the PCI-9111DG with a probe routine to identify
72 the card type (perhaps with the help of the channel number readback
73 of the A/D Data register).
74 - Add external multiplexer support.
78 #include "../comedidev.h"
80 #include <linux/delay.h>
81 #include <linux/interrupt.h>
84 #include "comedi_fc.h"
86 #define PCI9111_DRIVER_NAME "adl_pci9111"
87 #define PCI9111_HR_DEVICE_ID 0x9111
89 /* TODO: Add other pci9111 board id */
91 #define PCI9111_IO_RANGE 0x0100
93 #define PCI9111_FIFO_HALF_SIZE 512
95 #define PCI9111_AI_CHANNEL_NBR 16
97 #define PCI9111_AI_RESOLUTION 12
98 #define PCI9111_AI_RESOLUTION_MASK 0x0FFF
99 #define PCI9111_AI_RESOLUTION_2_CMP_BIT 0x0800
101 #define PCI9111_HR_AI_RESOLUTION 16
102 #define PCI9111_HR_AI_RESOLUTION_MASK 0xFFFF
103 #define PCI9111_HR_AI_RESOLUTION_2_CMP_BIT 0x8000
105 #define PCI9111_AI_ACQUISITION_PERIOD_MIN_NS 10000
106 #define PCI9111_AO_CHANNEL_NBR 1
107 #define PCI9111_AO_RESOLUTION 12
108 #define PCI9111_AO_RESOLUTION_MASK 0x0FFF
109 #define PCI9111_DI_CHANNEL_NBR 16
110 #define PCI9111_DO_CHANNEL_NBR 16
111 #define PCI9111_DO_MASK 0xFFFF
113 #define PCI9111_RANGE_SETTING_DELAY 10
114 #define PCI9111_AI_INSTANT_READ_UDELAY_US 2
115 #define PCI9111_AI_INSTANT_READ_TIMEOUT 100
117 #define PCI9111_8254_CLOCK_PERIOD_NS 500
119 #define PCI9111_8254_COUNTER_0 0x00
120 #define PCI9111_8254_COUNTER_1 0x40
121 #define PCI9111_8254_COUNTER_2 0x80
122 #define PCI9111_8254_COUNTER_LATCH 0x00
123 #define PCI9111_8254_READ_LOAD_LSB_ONLY 0x10
124 #define PCI9111_8254_READ_LOAD_MSB_ONLY 0x20
125 #define PCI9111_8254_READ_LOAD_LSB_MSB 0x30
126 #define PCI9111_8254_MODE_0 0x00
127 #define PCI9111_8254_MODE_1 0x02
128 #define PCI9111_8254_MODE_2 0x04
129 #define PCI9111_8254_MODE_3 0x06
130 #define PCI9111_8254_MODE_4 0x08
131 #define PCI9111_8254_MODE_5 0x0A
132 #define PCI9111_8254_BINARY_COUNTER 0x00
133 #define PCI9111_8254_BCD_COUNTER 0x01
137 #define PCI9111_REGISTER_AD_FIFO_VALUE 0x00 /* AD Data stored
139 #define PCI9111_REGISTER_DA_OUTPUT 0x00
140 #define PCI9111_REGISTER_DIGITAL_IO 0x02
141 #define PCI9111_REGISTER_EXTENDED_IO_PORTS 0x04
142 #define PCI9111_REGISTER_AD_CHANNEL_CONTROL 0x06 /* Channel
144 #define PCI9111_REGISTER_AD_CHANNEL_READBACK 0x06
145 #define PCI9111_REGISTER_INPUT_SIGNAL_RANGE 0x08
146 #define PCI9111_REGISTER_RANGE_STATUS_READBACK 0x08
147 #define PCI9111_REGISTER_TRIGGER_MODE_CONTROL 0x0A
148 #define PCI9111_REGISTER_AD_MODE_INTERRUPT_READBACK 0x0A
149 #define PCI9111_REGISTER_SOFTWARE_TRIGGER 0x0E
150 #define PCI9111_REGISTER_INTERRUPT_CONTROL 0x0C
151 #define PCI9111_REGISTER_8254_COUNTER_0 0x40
152 #define PCI9111_REGISTER_8254_COUNTER_1 0x42
153 #define PCI9111_REGISTER_8254_COUNTER_2 0X44
154 #define PCI9111_REGISTER_8254_CONTROL 0x46
155 #define PCI9111_REGISTER_INTERRUPT_CLEAR 0x48
157 #define PCI9111_TRIGGER_MASK 0x0F
158 #define PCI9111_PTRG_OFF (0 << 3)
159 #define PCI9111_PTRG_ON (1 << 3)
160 #define PCI9111_EITS_EXTERNAL (1 << 2)
161 #define PCI9111_EITS_INTERNAL (0 << 2)
162 #define PCI9111_TPST_SOFTWARE_TRIGGER (0 << 1)
163 #define PCI9111_TPST_TIMER_PACER (1 << 1)
164 #define PCI9111_ASCAN_ON (1 << 0)
165 #define PCI9111_ASCAN_OFF (0 << 0)
167 #define PCI9111_ISC0_SET_IRQ_ON_ENDING_OF_AD_CONVERSION (0 << 0)
168 #define PCI9111_ISC0_SET_IRQ_ON_FIFO_HALF_FULL (1 << 0)
169 #define PCI9111_ISC1_SET_IRQ_ON_TIMER_TICK (0 << 1)
170 #define PCI9111_ISC1_SET_IRQ_ON_EXT_TRG (1 << 1)
171 #define PCI9111_FFEN_SET_FIFO_ENABLE (0 << 2)
172 #define PCI9111_FFEN_SET_FIFO_DISABLE (1 << 2)
174 #define PCI9111_CHANNEL_MASK 0x0F
176 #define PCI9111_RANGE_MASK 0x07
177 #define PCI9111_FIFO_EMPTY_MASK 0x10
178 #define PCI9111_FIFO_HALF_FULL_MASK 0x20
179 #define PCI9111_FIFO_FULL_MASK 0x40
180 #define PCI9111_AD_BUSY_MASK 0x80
182 #define PCI9111_IO_BASE (dev->iobase)
185 * Define inlined function
188 #define pci9111_trigger_and_autoscan_get() \
189 (inb(PCI9111_IO_BASE+PCI9111_REGISTER_AD_MODE_INTERRUPT_READBACK)&0x0F)
191 #define pci9111_trigger_and_autoscan_set(flags) \
192 outb(flags, PCI9111_IO_BASE+PCI9111_REGISTER_TRIGGER_MODE_CONTROL)
194 #define pci9111_interrupt_and_fifo_get() \
195 ((inb(PCI9111_IO_BASE+PCI9111_REGISTER_AD_MODE_INTERRUPT_READBACK) \
198 #define pci9111_interrupt_and_fifo_set(flags) \
199 outb(flags, PCI9111_IO_BASE+PCI9111_REGISTER_INTERRUPT_CONTROL)
201 #define pci9111_interrupt_clear() \
202 outb(0, PCI9111_IO_BASE+PCI9111_REGISTER_INTERRUPT_CLEAR)
204 #define pci9111_software_trigger() \
205 outb(0, PCI9111_IO_BASE+PCI9111_REGISTER_SOFTWARE_TRIGGER)
207 #define pci9111_fifo_reset() do { \
208 outb(PCI9111_FFEN_SET_FIFO_ENABLE, \
209 PCI9111_IO_BASE+PCI9111_REGISTER_INTERRUPT_CONTROL); \
210 outb(PCI9111_FFEN_SET_FIFO_DISABLE, \
211 PCI9111_IO_BASE+PCI9111_REGISTER_INTERRUPT_CONTROL); \
212 outb(PCI9111_FFEN_SET_FIFO_ENABLE, \
213 PCI9111_IO_BASE+PCI9111_REGISTER_INTERRUPT_CONTROL); \
216 #define pci9111_is_fifo_full() \
217 ((inb(PCI9111_IO_BASE+PCI9111_REGISTER_RANGE_STATUS_READBACK)& \
218 PCI9111_FIFO_FULL_MASK) == 0)
220 #define pci9111_is_fifo_half_full() \
221 ((inb(PCI9111_IO_BASE+PCI9111_REGISTER_RANGE_STATUS_READBACK)& \
222 PCI9111_FIFO_HALF_FULL_MASK) == 0)
224 #define pci9111_is_fifo_empty() \
225 ((inb(PCI9111_IO_BASE+PCI9111_REGISTER_RANGE_STATUS_READBACK)& \
226 PCI9111_FIFO_EMPTY_MASK) == 0)
228 #define pci9111_ai_channel_set(channel) \
229 outb((channel)&PCI9111_CHANNEL_MASK, \
230 PCI9111_IO_BASE+PCI9111_REGISTER_AD_CHANNEL_CONTROL)
232 #define pci9111_ai_channel_get() \
233 (inb(PCI9111_IO_BASE+PCI9111_REGISTER_AD_CHANNEL_READBACK) \
234 &PCI9111_CHANNEL_MASK)
236 #define pci9111_ai_range_set(range) \
237 outb((range)&PCI9111_RANGE_MASK, \
238 PCI9111_IO_BASE+PCI9111_REGISTER_INPUT_SIGNAL_RANGE)
240 #define pci9111_ai_range_get() \
241 (inb(PCI9111_IO_BASE+PCI9111_REGISTER_RANGE_STATUS_READBACK) \
244 #define pci9111_ai_get_data() \
245 (((inw(PCI9111_IO_BASE+PCI9111_REGISTER_AD_FIFO_VALUE)>>4) \
246 &PCI9111_AI_RESOLUTION_MASK) \
247 ^ PCI9111_AI_RESOLUTION_2_CMP_BIT)
249 #define pci9111_hr_ai_get_data() \
250 ((inw(PCI9111_IO_BASE+PCI9111_REGISTER_AD_FIFO_VALUE) \
251 &PCI9111_HR_AI_RESOLUTION_MASK) \
252 ^ PCI9111_HR_AI_RESOLUTION_2_CMP_BIT)
254 #define pci9111_ao_set_data(data) \
255 outw(data&PCI9111_AO_RESOLUTION_MASK, \
256 PCI9111_IO_BASE+PCI9111_REGISTER_DA_OUTPUT)
258 #define pci9111_di_get_bits() \
259 inw(PCI9111_IO_BASE+PCI9111_REGISTER_DIGITAL_IO)
261 #define pci9111_do_set_bits(bits) \
262 outw(bits, PCI9111_IO_BASE+PCI9111_REGISTER_DIGITAL_IO)
264 #define pci9111_8254_control_set(flags) \
265 outb(flags, PCI9111_IO_BASE+PCI9111_REGISTER_8254_CONTROL)
267 #define pci9111_8254_counter_0_set(data) \
270 PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_0); \
271 outb((data >> 8) & 0xFF, \
272 PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_0); \
275 #define pci9111_8254_counter_1_set(data) \
278 PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_1); \
279 outb((data >> 8) & 0xFF, \
280 PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_1); \
283 #define pci9111_8254_counter_2_set(data) \
286 PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_2); \
287 outb((data >> 8) & 0xFF, \
288 PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_2); \
291 static const struct comedi_lrange pci9111_hr_ai_range = {
303 /* Board specification structure */
306 struct pci9111_board {
307 const char *name; /* driver name */
309 int ai_channel_nbr; /* num of A/D chans */
310 int ao_channel_nbr; /* num of D/A chans */
311 int ai_resolution; /* resolution of A/D */
312 int ai_resolution_mask;
313 int ao_resolution; /* resolution of D/A */
314 int ao_resolution_mask;
315 const struct comedi_lrange *ai_range_list; /* rangelist for A/D */
316 const struct comedi_lrange *ao_range_list; /* rangelist for D/A */
317 unsigned int ai_acquisition_period_min_ns;
320 static const struct pci9111_board pci9111_boards[] = {
322 .name = "pci9111_hr",
323 .device_id = PCI9111_HR_DEVICE_ID,
324 .ai_channel_nbr = PCI9111_AI_CHANNEL_NBR,
325 .ao_channel_nbr = PCI9111_AO_CHANNEL_NBR,
326 .ai_resolution = PCI9111_HR_AI_RESOLUTION,
327 .ai_resolution_mask = PCI9111_HR_AI_RESOLUTION_MASK,
328 .ao_resolution = PCI9111_AO_RESOLUTION,
329 .ao_resolution_mask = PCI9111_AO_RESOLUTION_MASK,
330 .ai_range_list = &pci9111_hr_ai_range,
331 .ao_range_list = &range_bipolar10,
332 .ai_acquisition_period_min_ns = PCI9111_AI_ACQUISITION_PERIOD_MIN_NS}
335 /* Private data structure */
337 struct pci9111_private_data {
338 unsigned long io_range; /* PCI6503 io range */
340 unsigned long lcr_io_base; /* Local configuration register base
342 unsigned long lcr_io_range;
347 unsigned int scan_delay;
348 unsigned int chanlist_len;
349 unsigned int chunk_counter;
350 unsigned int chunk_num_samples;
352 int ao_readback; /* Last written analog output data */
354 unsigned int timer_divisor_1; /* Divisor values for the 8254 timer
356 unsigned int timer_divisor_2;
358 int is_valid; /* Is device valid */
360 short ai_bounce_buffer[2 * PCI9111_FIFO_HALF_SIZE];
363 /* ------------------------------------------------------------------ */
364 /* PLX9050 SECTION */
365 /* ------------------------------------------------------------------ */
367 #define PLX9050_REGISTER_INTERRUPT_CONTROL 0x4c
369 #define PLX9050_LINTI1_ENABLE (1 << 0)
370 #define PLX9050_LINTI1_ACTIVE_HIGH (1 << 1)
371 #define PLX9050_LINTI1_STATUS (1 << 2)
372 #define PLX9050_LINTI2_ENABLE (1 << 3)
373 #define PLX9050_LINTI2_ACTIVE_HIGH (1 << 4)
374 #define PLX9050_LINTI2_STATUS (1 << 5)
375 #define PLX9050_PCI_INTERRUPT_ENABLE (1 << 6)
376 #define PLX9050_SOFTWARE_INTERRUPT (1 << 7)
378 static void plx9050_interrupt_control(unsigned long io_base,
380 bool LINTi1_active_high,
382 bool LINTi2_active_high,
383 bool interrupt_enable)
388 flags |= PLX9050_LINTI1_ENABLE;
389 if (LINTi1_active_high)
390 flags |= PLX9050_LINTI1_ACTIVE_HIGH;
392 flags |= PLX9050_LINTI2_ENABLE;
393 if (LINTi2_active_high)
394 flags |= PLX9050_LINTI2_ACTIVE_HIGH;
396 if (interrupt_enable)
397 flags |= PLX9050_PCI_INTERRUPT_ENABLE;
399 outb(flags, io_base + PLX9050_REGISTER_INTERRUPT_CONTROL);
402 /* ------------------------------------------------------------------ */
403 /* MISCELLANEOUS SECTION */
404 /* ------------------------------------------------------------------ */
408 static void pci9111_timer_set(struct comedi_device *dev)
410 struct pci9111_private_data *dev_private = dev->private;
412 pci9111_8254_control_set(PCI9111_8254_COUNTER_0 |
413 PCI9111_8254_READ_LOAD_LSB_MSB |
414 PCI9111_8254_MODE_0 |
415 PCI9111_8254_BINARY_COUNTER);
417 pci9111_8254_control_set(PCI9111_8254_COUNTER_1 |
418 PCI9111_8254_READ_LOAD_LSB_MSB |
419 PCI9111_8254_MODE_2 |
420 PCI9111_8254_BINARY_COUNTER);
422 pci9111_8254_control_set(PCI9111_8254_COUNTER_2 |
423 PCI9111_8254_READ_LOAD_LSB_MSB |
424 PCI9111_8254_MODE_2 |
425 PCI9111_8254_BINARY_COUNTER);
429 pci9111_8254_counter_2_set(dev_private->timer_divisor_2);
430 pci9111_8254_counter_1_set(dev_private->timer_divisor_1);
433 enum pci9111_trigger_sources {
439 static void pci9111_trigger_source_set(struct comedi_device *dev,
440 enum pci9111_trigger_sources source)
444 flags = pci9111_trigger_and_autoscan_get() & 0x09;
448 flags |= PCI9111_EITS_INTERNAL | PCI9111_TPST_SOFTWARE_TRIGGER;
452 flags |= PCI9111_EITS_INTERNAL | PCI9111_TPST_TIMER_PACER;
456 flags |= PCI9111_EITS_EXTERNAL;
460 pci9111_trigger_and_autoscan_set(flags);
463 static void pci9111_pretrigger_set(struct comedi_device *dev, bool pretrigger)
467 flags = pci9111_trigger_and_autoscan_get() & 0x07;
470 flags |= PCI9111_PTRG_ON;
472 pci9111_trigger_and_autoscan_set(flags);
475 static void pci9111_autoscan_set(struct comedi_device *dev, bool autoscan)
479 flags = pci9111_trigger_and_autoscan_get() & 0x0e;
482 flags |= PCI9111_ASCAN_ON;
484 pci9111_trigger_and_autoscan_set(flags);
487 enum pci9111_ISC0_sources {
489 irq_on_fifo_half_full
492 enum pci9111_ISC1_sources {
494 irq_on_external_trigger
497 static void pci9111_interrupt_source_set(struct comedi_device *dev,
498 enum pci9111_ISC0_sources irq_0_source,
499 enum pci9111_ISC1_sources irq_1_source)
503 flags = pci9111_interrupt_and_fifo_get() & 0x04;
505 if (irq_0_source == irq_on_fifo_half_full)
506 flags |= PCI9111_ISC0_SET_IRQ_ON_FIFO_HALF_FULL;
508 if (irq_1_source == irq_on_external_trigger)
509 flags |= PCI9111_ISC1_SET_IRQ_ON_EXT_TRG;
511 pci9111_interrupt_and_fifo_set(flags);
514 /* ------------------------------------------------------------------ */
515 /* HARDWARE TRIGGERED ANALOG INPUT SECTION */
516 /* ------------------------------------------------------------------ */
518 /* Cancel analog input autoscan */
520 #undef AI_DO_CMD_DEBUG
522 static int pci9111_ai_cancel(struct comedi_device *dev,
523 struct comedi_subdevice *s)
525 struct pci9111_private_data *dev_private = dev->private;
527 /* Disable interrupts */
529 plx9050_interrupt_control(dev_private->lcr_io_base, true, true, true,
532 pci9111_trigger_source_set(dev, software);
534 pci9111_autoscan_set(dev, false);
536 pci9111_fifo_reset();
538 #ifdef AI_DO_CMD_DEBUG
539 printk(PCI9111_DRIVER_NAME ": ai_cancel\n");
545 /* Test analog input command */
547 #define pci9111_check_trigger_src(src, flags) do { \
550 if (!src || tmp != src) \
555 pci9111_ai_do_cmd_test(struct comedi_device *dev,
556 struct comedi_subdevice *s, struct comedi_cmd *cmd)
558 struct pci9111_private_data *dev_private = dev->private;
561 int range, reference;
563 struct pci9111_board *board = (struct pci9111_board *)dev->board_ptr;
565 /* Step 1 : check if trigger are trivialy valid */
567 pci9111_check_trigger_src(cmd->start_src, TRIG_NOW);
568 pci9111_check_trigger_src(cmd->scan_begin_src,
569 TRIG_TIMER | TRIG_FOLLOW | TRIG_EXT);
570 pci9111_check_trigger_src(cmd->convert_src, TRIG_TIMER | TRIG_EXT);
571 pci9111_check_trigger_src(cmd->scan_end_src, TRIG_COUNT);
572 pci9111_check_trigger_src(cmd->stop_src, TRIG_COUNT | TRIG_NONE);
577 /* step 2 : make sure trigger sources are unique and mutually
580 if (cmd->start_src != TRIG_NOW)
583 if ((cmd->scan_begin_src != TRIG_TIMER) &&
584 (cmd->scan_begin_src != TRIG_FOLLOW) &&
585 (cmd->scan_begin_src != TRIG_EXT))
588 if ((cmd->convert_src != TRIG_TIMER) && (cmd->convert_src != TRIG_EXT))
590 if ((cmd->convert_src == TRIG_TIMER) &&
591 !((cmd->scan_begin_src == TRIG_TIMER) ||
592 (cmd->scan_begin_src == TRIG_FOLLOW)))
594 if ((cmd->convert_src == TRIG_EXT) &&
595 !((cmd->scan_begin_src == TRIG_EXT) ||
596 (cmd->scan_begin_src == TRIG_FOLLOW)))
600 if (cmd->scan_end_src != TRIG_COUNT)
602 if ((cmd->stop_src != TRIG_COUNT) && (cmd->stop_src != TRIG_NONE))
608 /* Step 3 : make sure arguments are trivialy compatible */
610 if (cmd->chanlist_len < 1) {
611 cmd->chanlist_len = 1;
615 if (cmd->chanlist_len > board->ai_channel_nbr) {
616 cmd->chanlist_len = board->ai_channel_nbr;
620 if ((cmd->start_src == TRIG_NOW) && (cmd->start_arg != 0)) {
625 if ((cmd->convert_src == TRIG_TIMER) &&
626 (cmd->convert_arg < board->ai_acquisition_period_min_ns)) {
627 cmd->convert_arg = board->ai_acquisition_period_min_ns;
630 if ((cmd->convert_src == TRIG_EXT) && (cmd->convert_arg != 0)) {
631 cmd->convert_arg = 0;
635 if ((cmd->scan_begin_src == TRIG_TIMER) &&
636 (cmd->scan_begin_arg < board->ai_acquisition_period_min_ns)) {
637 cmd->scan_begin_arg = board->ai_acquisition_period_min_ns;
640 if ((cmd->scan_begin_src == TRIG_FOLLOW)
641 && (cmd->scan_begin_arg != 0)) {
642 cmd->scan_begin_arg = 0;
645 if ((cmd->scan_begin_src == TRIG_EXT) && (cmd->scan_begin_arg != 0)) {
646 cmd->scan_begin_arg = 0;
650 if ((cmd->scan_end_src == TRIG_COUNT) &&
651 (cmd->scan_end_arg != cmd->chanlist_len)) {
652 cmd->scan_end_arg = cmd->chanlist_len;
656 if ((cmd->stop_src == TRIG_COUNT) && (cmd->stop_arg < 1)) {
660 if ((cmd->stop_src == TRIG_NONE) && (cmd->stop_arg != 0)) {
668 /* Step 4 : fix up any arguments */
670 if (cmd->convert_src == TRIG_TIMER) {
671 tmp = cmd->convert_arg;
672 i8253_cascade_ns_to_timer_2div(PCI9111_8254_CLOCK_PERIOD_NS,
673 &(dev_private->timer_divisor_1),
674 &(dev_private->timer_divisor_2),
676 cmd->flags & TRIG_ROUND_MASK);
677 if (tmp != cmd->convert_arg)
680 /* There's only one timer on this card, so the scan_begin timer must */
681 /* be a multiple of chanlist_len*convert_arg */
683 if (cmd->scan_begin_src == TRIG_TIMER) {
685 unsigned int scan_begin_min;
686 unsigned int scan_begin_arg;
687 unsigned int scan_factor;
689 scan_begin_min = cmd->chanlist_len * cmd->convert_arg;
691 if (cmd->scan_begin_arg != scan_begin_min) {
692 if (scan_begin_min < cmd->scan_begin_arg) {
694 cmd->scan_begin_arg / scan_begin_min;
695 scan_begin_arg = scan_factor * scan_begin_min;
696 if (cmd->scan_begin_arg != scan_begin_arg) {
697 cmd->scan_begin_arg = scan_begin_arg;
701 cmd->scan_begin_arg = scan_begin_min;
710 /* Step 5 : check channel list */
714 range = CR_RANGE(cmd->chanlist[0]);
715 reference = CR_AREF(cmd->chanlist[0]);
717 if (cmd->chanlist_len > 1) {
718 for (i = 0; i < cmd->chanlist_len; i++) {
719 if (CR_CHAN(cmd->chanlist[i]) != i) {
721 "entries in chanlist must be consecutive "
722 "channels,counting upwards from 0\n");
725 if (CR_RANGE(cmd->chanlist[i]) != range) {
727 "entries in chanlist must all have the same gain\n");
730 if (CR_AREF(cmd->chanlist[i]) != reference) {
732 "entries in chanlist must all have the same reference\n");
737 if ((CR_CHAN(cmd->chanlist[0]) >
738 (board->ai_channel_nbr - 1))
739 || (CR_CHAN(cmd->chanlist[0]) < 0)) {
741 "channel number is out of limits\n");
754 /* Analog input command */
756 static int pci9111_ai_do_cmd(struct comedi_device *dev,
757 struct comedi_subdevice *s)
759 struct pci9111_private_data *dev_private = dev->private;
760 struct comedi_cmd *async_cmd = &s->async->cmd;
764 "no irq assigned for PCI9111, cannot do hardware conversion");
767 /* Set channel scan limit */
768 /* PCI9111 allows only scanning from channel 0 to channel n */
769 /* TODO: handle the case of an external multiplexer */
771 if (async_cmd->chanlist_len > 1) {
772 pci9111_ai_channel_set((async_cmd->chanlist_len) - 1);
773 pci9111_autoscan_set(dev, true);
775 pci9111_ai_channel_set(CR_CHAN(async_cmd->chanlist[0]));
776 pci9111_autoscan_set(dev, false);
780 /* This is the same gain on every channel */
782 pci9111_ai_range_set(CR_RANGE(async_cmd->chanlist[0]));
786 switch (async_cmd->stop_src) {
788 dev_private->stop_counter =
789 async_cmd->stop_arg * async_cmd->chanlist_len;
790 dev_private->stop_is_none = 0;
794 dev_private->stop_counter = 0;
795 dev_private->stop_is_none = 1;
799 comedi_error(dev, "Invalid stop trigger");
803 /* Set timer pacer */
805 dev_private->scan_delay = 0;
806 switch (async_cmd->convert_src) {
808 i8253_cascade_ns_to_timer_2div(PCI9111_8254_CLOCK_PERIOD_NS,
809 &(dev_private->timer_divisor_1),
810 &(dev_private->timer_divisor_2),
811 &(async_cmd->convert_arg),
813 flags & TRIG_ROUND_MASK);
814 #ifdef AI_DO_CMD_DEBUG
815 printk(PCI9111_DRIVER_NAME ": divisors = %d, %d\n",
816 dev_private->timer_divisor_1,
817 dev_private->timer_divisor_2);
820 pci9111_trigger_source_set(dev, software);
821 pci9111_timer_set(dev);
822 pci9111_fifo_reset();
823 pci9111_interrupt_source_set(dev, irq_on_fifo_half_full,
825 pci9111_trigger_source_set(dev, timer_pacer);
826 plx9050_interrupt_control(dev_private->lcr_io_base, true, true,
829 if (async_cmd->scan_begin_src == TRIG_TIMER) {
830 dev_private->scan_delay =
831 (async_cmd->scan_begin_arg /
832 (async_cmd->convert_arg *
833 async_cmd->chanlist_len)) - 1;
840 pci9111_trigger_source_set(dev, external);
841 pci9111_fifo_reset();
842 pci9111_interrupt_source_set(dev, irq_on_fifo_half_full,
844 plx9050_interrupt_control(dev_private->lcr_io_base, true, true,
850 comedi_error(dev, "Invalid convert trigger");
854 dev_private->stop_counter *= (1 + dev_private->scan_delay);
855 dev_private->chanlist_len = async_cmd->chanlist_len;
856 dev_private->chunk_counter = 0;
857 dev_private->chunk_num_samples =
858 dev_private->chanlist_len * (1 + dev_private->scan_delay);
860 #ifdef AI_DO_CMD_DEBUG
861 printk(PCI9111_DRIVER_NAME ": start interruptions!\n");
862 printk(PCI9111_DRIVER_NAME ": trigger source = %2x\n",
863 pci9111_trigger_and_autoscan_get());
864 printk(PCI9111_DRIVER_NAME ": irq source = %2x\n",
865 pci9111_interrupt_and_fifo_get());
866 printk(PCI9111_DRIVER_NAME ": ai_do_cmd\n");
867 printk(PCI9111_DRIVER_NAME ": stop counter = %d\n",
868 dev_private->stop_counter);
869 printk(PCI9111_DRIVER_NAME ": scan delay = %d\n",
870 dev_private->scan_delay);
871 printk(PCI9111_DRIVER_NAME ": chanlist_len = %d\n",
872 dev_private->chanlist_len);
873 printk(PCI9111_DRIVER_NAME ": chunk num samples = %d\n",
874 dev_private->chunk_num_samples);
880 static void pci9111_ai_munge(struct comedi_device *dev,
881 struct comedi_subdevice *s, void *data,
882 unsigned int num_bytes,
883 unsigned int start_chan_index)
885 unsigned int i, num_samples = num_bytes / sizeof(short);
888 ((struct pci9111_board *)dev->board_ptr)->ai_resolution;
890 for (i = 0; i < num_samples; i++) {
891 if (resolution == PCI9111_HR_AI_RESOLUTION)
893 (array[i] & PCI9111_HR_AI_RESOLUTION_MASK) ^
894 PCI9111_HR_AI_RESOLUTION_2_CMP_BIT;
897 ((array[i] >> 4) & PCI9111_AI_RESOLUTION_MASK) ^
898 PCI9111_AI_RESOLUTION_2_CMP_BIT;
902 /* ------------------------------------------------------------------ */
903 /* INTERRUPT SECTION */
904 /* ------------------------------------------------------------------ */
906 #undef INTERRUPT_DEBUG
908 static irqreturn_t pci9111_interrupt(int irq, void *p_device)
910 struct comedi_device *dev = p_device;
911 struct pci9111_private_data *dev_private = dev->private;
912 struct comedi_subdevice *s = dev->read_subdev;
913 struct comedi_async *async;
914 unsigned long irq_flags;
915 unsigned char intcsr;
917 if (!dev->attached) {
918 /* Ignore interrupt before device fully attached. */
919 /* Might not even have allocated subdevices yet! */
925 spin_lock_irqsave(&dev->spinlock, irq_flags);
927 /* Check if we are source of interrupt */
928 intcsr = inb(dev_private->lcr_io_base +
929 PLX9050_REGISTER_INTERRUPT_CONTROL);
930 if (!(((intcsr & PLX9050_PCI_INTERRUPT_ENABLE) != 0)
931 && (((intcsr & (PLX9050_LINTI1_ENABLE | PLX9050_LINTI1_STATUS))
932 == (PLX9050_LINTI1_ENABLE | PLX9050_LINTI1_STATUS))
933 || ((intcsr & (PLX9050_LINTI2_ENABLE | PLX9050_LINTI2_STATUS))
934 == (PLX9050_LINTI2_ENABLE | PLX9050_LINTI2_STATUS))))) {
935 /* Not the source of the interrupt. */
936 /* (N.B. not using PLX9050_SOFTWARE_INTERRUPT) */
937 spin_unlock_irqrestore(&dev->spinlock, irq_flags);
941 if ((intcsr & (PLX9050_LINTI1_ENABLE | PLX9050_LINTI1_STATUS)) ==
942 (PLX9050_LINTI1_ENABLE | PLX9050_LINTI1_STATUS)) {
943 /* Interrupt comes from fifo_half-full signal */
945 if (pci9111_is_fifo_full()) {
946 spin_unlock_irqrestore(&dev->spinlock, irq_flags);
947 comedi_error(dev, PCI9111_DRIVER_NAME " fifo overflow");
948 pci9111_interrupt_clear();
949 pci9111_ai_cancel(dev, s);
950 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
951 comedi_event(dev, s);
956 if (pci9111_is_fifo_half_full()) {
957 unsigned int num_samples;
958 unsigned int bytes_written = 0;
960 #ifdef INTERRUPT_DEBUG
961 printk(PCI9111_DRIVER_NAME ": fifo is half full\n");
965 PCI9111_FIFO_HALF_SIZE >
966 dev_private->stop_counter
968 stop_is_none ? dev_private->stop_counter :
969 PCI9111_FIFO_HALF_SIZE;
970 insw(PCI9111_IO_BASE + PCI9111_REGISTER_AD_FIFO_VALUE,
971 dev_private->ai_bounce_buffer, num_samples);
973 if (dev_private->scan_delay < 1) {
975 cfc_write_array_to_buffer(s,
984 while (position < num_samples) {
985 if (dev_private->chunk_counter <
986 dev_private->chanlist_len) {
988 dev_private->chanlist_len -
989 dev_private->chunk_counter;
992 num_samples - position)
998 cfc_write_array_to_buffer
1000 dev_private->ai_bounce_buffer
1002 to_read * sizeof(short));
1005 dev_private->chunk_num_samples
1007 dev_private->chunk_counter;
1009 num_samples - position)
1015 sizeof(short) * to_read;
1018 position += to_read;
1019 dev_private->chunk_counter += to_read;
1021 if (dev_private->chunk_counter >=
1022 dev_private->chunk_num_samples)
1023 dev_private->chunk_counter = 0;
1027 dev_private->stop_counter -=
1028 bytes_written / sizeof(short);
1032 if ((dev_private->stop_counter == 0) && (!dev_private->stop_is_none)) {
1033 async->events |= COMEDI_CB_EOA;
1034 pci9111_ai_cancel(dev, s);
1037 /* Very important, otherwise another interrupt request will be inserted
1038 * and will cause driver hangs on processing interrupt event. */
1040 pci9111_interrupt_clear();
1042 spin_unlock_irqrestore(&dev->spinlock, irq_flags);
1044 comedi_event(dev, s);
1049 /* ------------------------------------------------------------------ */
1050 /* INSTANT ANALOG INPUT OUTPUT SECTION */
1051 /* ------------------------------------------------------------------ */
1053 /* analog instant input */
1055 #undef AI_INSN_DEBUG
1057 static int pci9111_ai_insn_read(struct comedi_device *dev,
1058 struct comedi_subdevice *s,
1059 struct comedi_insn *insn, unsigned int *data)
1062 ((struct pci9111_board *)dev->board_ptr)->ai_resolution;
1066 #ifdef AI_INSN_DEBUG
1067 printk(PCI9111_DRIVER_NAME ": ai_insn set c/r/n = %2x/%2x/%2x\n",
1068 CR_CHAN((&insn->chanspec)[0]),
1069 CR_RANGE((&insn->chanspec)[0]), insn->n);
1072 pci9111_ai_channel_set(CR_CHAN((&insn->chanspec)[0]));
1074 if ((pci9111_ai_range_get()) != CR_RANGE((&insn->chanspec)[0]))
1075 pci9111_ai_range_set(CR_RANGE((&insn->chanspec)[0]));
1077 pci9111_fifo_reset();
1079 for (i = 0; i < insn->n; i++) {
1080 pci9111_software_trigger();
1082 timeout = PCI9111_AI_INSTANT_READ_TIMEOUT;
1085 if (!pci9111_is_fifo_empty())
1086 goto conversion_done;
1089 comedi_error(dev, "A/D read timeout");
1091 pci9111_fifo_reset();
1096 if (resolution == PCI9111_HR_AI_RESOLUTION)
1097 data[i] = pci9111_hr_ai_get_data();
1099 data[i] = pci9111_ai_get_data();
1102 #ifdef AI_INSN_DEBUG
1103 printk(PCI9111_DRIVER_NAME ": ai_insn get c/r/t = %2x/%2x/%2x\n",
1104 pci9111_ai_channel_get(),
1105 pci9111_ai_range_get(), pci9111_trigger_and_autoscan_get());
1111 /* Analog instant output */
1114 pci9111_ao_insn_write(struct comedi_device *dev,
1115 struct comedi_subdevice *s, struct comedi_insn *insn,
1118 struct pci9111_private_data *dev_private = dev->private;
1121 for (i = 0; i < insn->n; i++) {
1122 pci9111_ao_set_data(data[i]);
1123 dev_private->ao_readback = data[i];
1129 /* Analog output readback */
1131 static int pci9111_ao_insn_read(struct comedi_device *dev,
1132 struct comedi_subdevice *s,
1133 struct comedi_insn *insn, unsigned int *data)
1135 struct pci9111_private_data *dev_private = dev->private;
1138 for (i = 0; i < insn->n; i++)
1139 data[i] = dev_private->ao_readback & PCI9111_AO_RESOLUTION_MASK;
1144 /* ------------------------------------------------------------------ */
1145 /* DIGITAL INPUT OUTPUT SECTION */
1146 /* ------------------------------------------------------------------ */
1148 /* Digital inputs */
1150 static int pci9111_di_insn_bits(struct comedi_device *dev,
1151 struct comedi_subdevice *s,
1152 struct comedi_insn *insn, unsigned int *data)
1156 bits = pci9111_di_get_bits();
1162 /* Digital outputs */
1164 static int pci9111_do_insn_bits(struct comedi_device *dev,
1165 struct comedi_subdevice *s,
1166 struct comedi_insn *insn, unsigned int *data)
1170 /* Only set bits that have been masked */
1171 /* data[0] = mask */
1172 /* data[1] = bit state */
1174 data[0] &= PCI9111_DO_MASK;
1178 bits |= data[0] & data[1];
1181 pci9111_do_set_bits(bits);
1188 /* ------------------------------------------------------------------ */
1189 /* INITIALISATION SECTION */
1190 /* ------------------------------------------------------------------ */
1194 static int pci9111_reset(struct comedi_device *dev)
1196 struct pci9111_private_data *dev_private = dev->private;
1198 /* Set trigger source to software */
1200 plx9050_interrupt_control(dev_private->lcr_io_base, true, true, true,
1203 pci9111_trigger_source_set(dev, software);
1204 pci9111_pretrigger_set(dev, false);
1205 pci9111_autoscan_set(dev, false);
1207 /* Reset 8254 chip */
1209 dev_private->timer_divisor_1 = 0;
1210 dev_private->timer_divisor_2 = 0;
1212 pci9111_timer_set(dev);
1217 static struct pci_dev *pci9111_find_pci(struct comedi_device *dev,
1218 struct comedi_devconfig *it)
1220 struct pci_dev *pcidev = NULL;
1221 int bus = it->options[0];
1222 int slot = it->options[1];
1225 for_each_pci_dev(pcidev) {
1226 if (pcidev->vendor != PCI_VENDOR_ID_ADLINK)
1228 for (i = 0; i < ARRAY_SIZE(pci9111_boards); i++) {
1229 if (pcidev->device != pci9111_boards[i].device_id)
1232 /* requested particular bus/slot */
1233 if (pcidev->bus->number != bus ||
1234 PCI_SLOT(pcidev->devfn) != slot)
1237 dev->board_ptr = pci9111_boards + i;
1239 "comedi%d: found %s (b:s:f=%d:%d:%d), irq=%d\n",
1240 dev->minor, pci9111_boards[i].name,
1241 pcidev->bus->number, PCI_SLOT(pcidev->devfn),
1242 PCI_FUNC(pcidev->devfn), pcidev->irq);
1247 "comedi%d: no supported board found! (req. bus/slot : %d/%d)\n",
1248 dev->minor, bus, slot);
1252 static int pci9111_attach(struct comedi_device *dev,
1253 struct comedi_devconfig *it)
1255 struct pci9111_private_data *dev_private;
1256 struct pci_dev *pcidev;
1257 struct comedi_subdevice *s;
1258 unsigned long io_base, io_range, lcr_io_base, lcr_io_range;
1260 const struct pci9111_board *board;
1262 ret = alloc_private(dev, sizeof(*dev_private));
1265 dev_private = dev->private;
1267 /* Probe the device to determine what device in the series it is. */
1269 printk(KERN_ERR "comedi%d: " PCI9111_DRIVER_NAME " driver\n",
1272 pcidev = pci9111_find_pci(dev, it);
1275 comedi_set_hw_dev(dev, &pcidev->dev);
1276 board = (struct pci9111_board *)dev->board_ptr;
1278 /* TODO: Warn about non-tested boards. */
1280 /* Read local configuration register base address
1281 * [PCI_BASE_ADDRESS #1]. */
1283 lcr_io_base = pci_resource_start(pcidev, 1);
1284 lcr_io_range = pci_resource_len(pcidev, 1);
1287 ("comedi%d: local configuration registers at address 0x%4lx [0x%4lx]\n",
1288 dev->minor, lcr_io_base, lcr_io_range);
1290 /* Enable PCI device and request regions */
1291 if (comedi_pci_enable(pcidev, PCI9111_DRIVER_NAME) < 0) {
1293 ("comedi%d: Failed to enable PCI device and request regions\n",
1297 /* Read PCI6308 register base address [PCI_BASE_ADDRESS #2]. */
1299 io_base = pci_resource_start(pcidev, 2);
1300 io_range = pci_resource_len(pcidev, 2);
1302 printk(KERN_ERR "comedi%d: 6503 registers at address 0x%4lx [0x%4lx]\n",
1303 dev->minor, io_base, io_range);
1305 dev->iobase = io_base;
1306 dev->board_name = board->name;
1307 dev_private->io_range = io_range;
1308 dev_private->is_valid = 0;
1309 dev_private->lcr_io_base = lcr_io_base;
1310 dev_private->lcr_io_range = lcr_io_range;
1317 if (pcidev->irq > 0) {
1318 dev->irq = pcidev->irq;
1320 if (request_irq(dev->irq, pci9111_interrupt,
1321 IRQF_SHARED, PCI9111_DRIVER_NAME, dev) != 0) {
1323 "comedi%d: unable to allocate irq %u\n",
1324 dev->minor, dev->irq);
1329 /* TODO: Add external multiplexer setup (according to option[2]). */
1331 ret = comedi_alloc_subdevices(dev, 4);
1335 s = &dev->subdevices[0];
1336 dev->read_subdev = s;
1338 s->type = COMEDI_SUBD_AI;
1339 s->subdev_flags = SDF_READABLE | SDF_COMMON | SDF_CMD_READ;
1341 /* TODO: Add external multiplexer data */
1342 /* if (devpriv->usemux) { s->n_chan = devpriv->usemux; } */
1343 /* else { s->n_chan = this_board->n_aichan; } */
1345 s->n_chan = board->ai_channel_nbr;
1346 s->maxdata = board->ai_resolution_mask;
1347 s->len_chanlist = board->ai_channel_nbr;
1348 s->range_table = board->ai_range_list;
1349 s->cancel = pci9111_ai_cancel;
1350 s->insn_read = pci9111_ai_insn_read;
1351 s->do_cmdtest = pci9111_ai_do_cmd_test;
1352 s->do_cmd = pci9111_ai_do_cmd;
1353 s->munge = pci9111_ai_munge;
1355 s = &dev->subdevices[1];
1356 s->type = COMEDI_SUBD_AO;
1357 s->subdev_flags = SDF_WRITABLE | SDF_COMMON;
1358 s->n_chan = board->ao_channel_nbr;
1359 s->maxdata = board->ao_resolution_mask;
1360 s->len_chanlist = board->ao_channel_nbr;
1361 s->range_table = board->ao_range_list;
1362 s->insn_write = pci9111_ao_insn_write;
1363 s->insn_read = pci9111_ao_insn_read;
1365 s = &dev->subdevices[2];
1366 s->type = COMEDI_SUBD_DI;
1367 s->subdev_flags = SDF_READABLE;
1368 s->n_chan = PCI9111_DI_CHANNEL_NBR;
1370 s->range_table = &range_digital;
1371 s->insn_bits = pci9111_di_insn_bits;
1373 s = &dev->subdevices[3];
1374 s->type = COMEDI_SUBD_DO;
1375 s->subdev_flags = SDF_READABLE | SDF_WRITABLE;
1376 s->n_chan = PCI9111_DO_CHANNEL_NBR;
1378 s->range_table = &range_digital;
1379 s->insn_bits = pci9111_do_insn_bits;
1381 dev_private->is_valid = 1;
1386 static void pci9111_detach(struct comedi_device *dev)
1388 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
1389 struct pci9111_private_data *dev_private = dev->private;
1392 if (dev_private->is_valid)
1396 free_irq(dev->irq, dev);
1399 comedi_pci_disable(pcidev);
1400 pci_dev_put(pcidev);
1404 static struct comedi_driver adl_pci9111_driver = {
1405 .driver_name = "adl_pci9111",
1406 .module = THIS_MODULE,
1407 .attach = pci9111_attach,
1408 .detach = pci9111_detach,
1411 static int __devinit pci9111_pci_probe(struct pci_dev *dev,
1412 const struct pci_device_id *ent)
1414 return comedi_pci_auto_config(dev, &adl_pci9111_driver);
1417 static void __devexit pci9111_pci_remove(struct pci_dev *dev)
1419 comedi_pci_auto_unconfig(dev);
1422 static DEFINE_PCI_DEVICE_TABLE(pci9111_pci_table) = {
1423 { PCI_DEVICE(PCI_VENDOR_ID_ADLINK, PCI9111_HR_DEVICE_ID) },
1424 /* { PCI_DEVICE(PCI_VENDOR_ID_ADLINK, PCI9111_HG_DEVICE_ID) }, */
1427 MODULE_DEVICE_TABLE(pci, pci9111_pci_table);
1429 static struct pci_driver adl_pci9111_pci_driver = {
1430 .name = "adl_pci9111",
1431 .id_table = pci9111_pci_table,
1432 .probe = pci9111_pci_probe,
1433 .remove = __devexit_p(pci9111_pci_remove),
1435 module_comedi_pci_driver(adl_pci9111_driver, adl_pci9111_pci_driver);
1437 MODULE_AUTHOR("Comedi http://www.comedi.org");
1438 MODULE_DESCRIPTION("Comedi low-level driver");
1439 MODULE_LICENSE("GPL");