drivers/staging/comedi/drivers/adl_pci9111.c

   1 /*
   2
   3 comedi/drivers/adl_pci9111.c
   4
   5 Hardware driver for PCI9111 ADLink cards:
   6
   7 PCI-9111HR
   8
   9 Copyright (C) 2002-2005 Emmanuel Pacaud <emmanuel.pacaud@univ-poitiers.fr>
  10
  11 This program is free software; you can redistribute it and/or modify
  12 it under the terms of the GNU General Public License as published by
  13 the Free Software Foundation; either version 2 of the License, or
  14 (at your option) any later version.
  15
  16 This program is distributed in the hope that it will be useful,
  17 but WITHOUT ANY WARRANTY; without even the implied warranty of
  18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19 GNU General Public License for more details.
  20
  21 You should have received a copy of the GNU General Public License
  22 along with this program; if not, write to the Free Software
  23 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  24 */
  25
  26 /*
  27 Driver: adl_pci9111
  28 Description: Adlink PCI-9111HR
  29 Author: Emmanuel Pacaud <emmanuel.pacaud@univ-poitiers.fr>
  30 Devices: [ADLink] PCI-9111HR (adl_pci9111)
  31 Status: experimental
  32
  33 Supports:
  34
  35         - ai_insn read
  36         - ao_insn read/write
  37         - di_insn read
  38         - do_insn read/write
  39         - ai_do_cmd mode with the following sources:
  40
  41         - start_src             TRIG_NOW
  42         - scan_begin_src        TRIG_FOLLOW     TRIG_TIMER      TRIG_EXT
  43         - convert_src                           TRIG_TIMER      TRIG_EXT
  44         - scan_end_src          TRIG_COUNT
  45         - stop_src              TRIG_COUNT      TRIG_NONE
  46
  47 The scanned channels must be consecutive and start from 0. They must
  48 all have the same range and aref.
  49
  50 Configuration options: not applicable, uses PCI auto config
  51 */
  52
  53 /*
  54 CHANGELOG:
  55
  56 2005/02/17 Extend AI streaming capabilities. Now, scan_begin_arg can be
  57 a multiple of chanlist_len*convert_arg.
  58 2002/02/19 Fixed the two's complement conversion in pci9111_(hr_)ai_get_data.
  59 2002/02/18 Added external trigger support for analog input.
  60
  61 TODO:
  62
  63         - Really test implemented functionality.
  64         - Add support for the PCI-9111DG with a probe routine to identify
  65           the card type (perhaps with the help of the channel number readback
  66           of the A/D Data register).
  67         - Add external multiplexer support.
  68
  69 */
  70
  71 #include "../comedidev.h"
  72
  73 #include <linux/delay.h>
  74 #include <linux/interrupt.h>
  75
  76 #include "8253.h"
  77 #include "comedi_fc.h"
  78
  79 #define PCI9111_DRIVER_NAME     "adl_pci9111"
  80 #define PCI9111_HR_DEVICE_ID    0x9111
  81
  82 #define PCI9111_FIFO_HALF_SIZE  512
  83
  84 #define PCI9111_AI_ACQUISITION_PERIOD_MIN_NS    10000
  85
  86 #define PCI9111_RANGE_SETTING_DELAY             10
  87 #define PCI9111_AI_INSTANT_READ_UDELAY_US       2
  88 #define PCI9111_AI_INSTANT_READ_TIMEOUT         100
  89
  90 #define PCI9111_8254_CLOCK_PERIOD_NS            500
  91
  92 /* IO address map */
  93
  94 #define PCI9111_AI_FIFO_REG                             0x00
  95 #define PCI9111_AO_REG                                  0x00
  96 #define PCI9111_DIO_REG                                 0x02
  97 #define PCI9111_REGISTER_EXTENDED_IO_PORTS              0x04
  98 #define PCI9111_REGISTER_AD_CHANNEL_CONTROL             0x06 /* Channel
  99                                                                 selection */
 100 #define PCI9111_REGISTER_AD_CHANNEL_READBACK            0x06
 101 #define PCI9111_REGISTER_INPUT_SIGNAL_RANGE             0x08
 102 #define PCI9111_REGISTER_RANGE_STATUS_READBACK          0x08
 103 #define PCI9111_REGISTER_TRIGGER_MODE_CONTROL           0x0A
 104 #define PCI9111_REGISTER_AD_MODE_INTERRUPT_READBACK     0x0A
 105 #define PCI9111_REGISTER_SOFTWARE_TRIGGER               0x0E
 106 #define PCI9111_REGISTER_INTERRUPT_CONTROL              0x0C
 107 #define PCI9111_8254_BASE_REG                           0x40
 108 #define PCI9111_REGISTER_INTERRUPT_CLEAR                0x48
 109
 110 #define PCI9111_TRIGGER_MASK                            0x0F
 111 #define PCI9111_PTRG_OFF                                (0 << 3)
 112 #define PCI9111_PTRG_ON                                 (1 << 3)
 113 #define PCI9111_EITS_EXTERNAL                           (1 << 2)
 114 #define PCI9111_EITS_INTERNAL                           (0 << 2)
 115 #define PCI9111_TPST_SOFTWARE_TRIGGER                   (0 << 1)
 116 #define PCI9111_TPST_TIMER_PACER                        (1 << 1)
 117 #define PCI9111_ASCAN_ON                                (1 << 0)
 118 #define PCI9111_ASCAN_OFF                               (0 << 0)
 119
 120 #define PCI9111_ISC0_SET_IRQ_ON_ENDING_OF_AD_CONVERSION (0 << 0)
 121 #define PCI9111_ISC0_SET_IRQ_ON_FIFO_HALF_FULL          (1 << 0)
 122 #define PCI9111_ISC1_SET_IRQ_ON_TIMER_TICK              (0 << 1)
 123 #define PCI9111_ISC1_SET_IRQ_ON_EXT_TRG                 (1 << 1)
 124 #define PCI9111_FFEN_SET_FIFO_ENABLE                    (0 << 2)
 125 #define PCI9111_FFEN_SET_FIFO_DISABLE                   (1 << 2)
 126
 127 #define PCI9111_CHANNEL_MASK                            0x0F
 128
 129 #define PCI9111_RANGE_MASK                              0x07
 130 #define PCI9111_FIFO_EMPTY_MASK                         0x10
 131 #define PCI9111_FIFO_HALF_FULL_MASK                     0x20
 132 #define PCI9111_FIFO_FULL_MASK                          0x40
 133 #define PCI9111_AD_BUSY_MASK                            0x80
 134
 135 /*
 136  * Define inlined function
 137  */
 138
 139 #define pci9111_trigger_and_autoscan_get() \
 140         (inb(dev->iobase + PCI9111_REGISTER_AD_MODE_INTERRUPT_READBACK)&0x0F)
 141
 142 #define pci9111_trigger_and_autoscan_set(flags) \
 143         outb(flags, dev->iobase + PCI9111_REGISTER_TRIGGER_MODE_CONTROL)
 144
 145 #define pci9111_interrupt_and_fifo_get() \
 146         ((inb(dev->iobase + PCI9111_REGISTER_AD_MODE_INTERRUPT_READBACK) \
 147                 >> 4) & 0x03)
 148
 149 #define pci9111_interrupt_and_fifo_set(flags) \
 150         outb(flags, dev->iobase + PCI9111_REGISTER_INTERRUPT_CONTROL)
 151
 152 #define pci9111_interrupt_clear() \
 153         outb(0, dev->iobase + PCI9111_REGISTER_INTERRUPT_CLEAR)
 154
 155 #define pci9111_software_trigger() \
 156         outb(0, dev->iobase + PCI9111_REGISTER_SOFTWARE_TRIGGER)
 157
 158 #define pci9111_fifo_reset() do { \
 159         outb(PCI9111_FFEN_SET_FIFO_ENABLE, \
 160                 dev->iobase + PCI9111_REGISTER_INTERRUPT_CONTROL); \
 161         outb(PCI9111_FFEN_SET_FIFO_DISABLE, \
 162                 dev->iobase + PCI9111_REGISTER_INTERRUPT_CONTROL); \
 163         outb(PCI9111_FFEN_SET_FIFO_ENABLE, \
 164                 dev->iobase + PCI9111_REGISTER_INTERRUPT_CONTROL); \
 165         } while (0)
 166
 167 #define pci9111_is_fifo_full() \
 168         ((inb(dev->iobase + PCI9111_REGISTER_RANGE_STATUS_READBACK)& \
 169                 PCI9111_FIFO_FULL_MASK) == 0)
 170
 171 #define pci9111_is_fifo_half_full() \
 172         ((inb(dev->iobase + PCI9111_REGISTER_RANGE_STATUS_READBACK)& \
 173                 PCI9111_FIFO_HALF_FULL_MASK) == 0)
 174
 175 #define pci9111_is_fifo_empty() \
 176         ((inb(dev->iobase + PCI9111_REGISTER_RANGE_STATUS_READBACK)& \
 177                 PCI9111_FIFO_EMPTY_MASK) == 0)
 178
 179 #define pci9111_ai_channel_set(channel) \
 180         outb((channel)&PCI9111_CHANNEL_MASK, \
 181                 dev->iobase + PCI9111_REGISTER_AD_CHANNEL_CONTROL)
 182
 183 #define pci9111_ai_channel_get() \
 184         (inb(dev->iobase + PCI9111_REGISTER_AD_CHANNEL_READBACK) \
 185                 &PCI9111_CHANNEL_MASK)
 186
 187 #define pci9111_ai_range_set(range) \
 188         outb((range)&PCI9111_RANGE_MASK, \
 189                 dev->iobase + PCI9111_REGISTER_INPUT_SIGNAL_RANGE)
 190
 191 #define pci9111_ai_range_get() \
 192         (inb(dev->iobase + PCI9111_REGISTER_RANGE_STATUS_READBACK) \
 193                 &PCI9111_RANGE_MASK)
 194
 195 static const struct comedi_lrange pci9111_hr_ai_range = {
 196         5,
 197         {
 198          BIP_RANGE(10),
 199          BIP_RANGE(5),
 200          BIP_RANGE(2.5),
 201          BIP_RANGE(1.25),
 202          BIP_RANGE(0.625)
 203          }
 204 };
 205
 206 /*  Private data structure */
 207
 208 struct pci9111_private_data {
 209         unsigned long lcr_io_base; /* Local configuration register base
 210                                     * address */
 211
 212         int stop_counter;
 213         int stop_is_none;
 214
 215         unsigned int scan_delay;
 216         unsigned int chanlist_len;
 217         unsigned int chunk_counter;
 218         unsigned int chunk_num_samples;
 219
 220         int ao_readback;        /*  Last written analog output data */
 221
 222         unsigned int timer_divisor_1; /* Divisor values for the 8254 timer
 223                                        * pacer */
 224         unsigned int timer_divisor_2;
 225
 226         int is_valid;           /*  Is device valid */
 227
 228         short ai_bounce_buffer[2 * PCI9111_FIFO_HALF_SIZE];
 229 };
 230
 231 /*  ------------------------------------------------------------------ */
 232 /*  PLX9050 SECTION */
 233 /*  ------------------------------------------------------------------ */
 234
 235 #define PLX9050_REGISTER_INTERRUPT_CONTROL 0x4c
 236
 237 #define PLX9050_LINTI1_ENABLE           (1 << 0)
 238 #define PLX9050_LINTI1_ACTIVE_HIGH      (1 << 1)
 239 #define PLX9050_LINTI1_STATUS           (1 << 2)
 240 #define PLX9050_LINTI2_ENABLE           (1 << 3)
 241 #define PLX9050_LINTI2_ACTIVE_HIGH      (1 << 4)
 242 #define PLX9050_LINTI2_STATUS           (1 << 5)
 243 #define PLX9050_PCI_INTERRUPT_ENABLE    (1 << 6)
 244 #define PLX9050_SOFTWARE_INTERRUPT      (1 << 7)
 245
 246 static void plx9050_interrupt_control(unsigned long io_base,
 247                                       bool LINTi1_enable,
 248                                       bool LINTi1_active_high,
 249                                       bool LINTi2_enable,
 250                                       bool LINTi2_active_high,
 251                                       bool interrupt_enable)
 252 {
 253         int flags = 0;
 254
 255         if (LINTi1_enable)
 256                 flags |= PLX9050_LINTI1_ENABLE;
 257         if (LINTi1_active_high)
 258                 flags |= PLX9050_LINTI1_ACTIVE_HIGH;
 259         if (LINTi2_enable)
 260                 flags |= PLX9050_LINTI2_ENABLE;
 261         if (LINTi2_active_high)
 262                 flags |= PLX9050_LINTI2_ACTIVE_HIGH;
 263
 264         if (interrupt_enable)
 265                 flags |= PLX9050_PCI_INTERRUPT_ENABLE;
 266
 267         outb(flags, io_base + PLX9050_REGISTER_INTERRUPT_CONTROL);
 268 }
 269
 270 /*  ------------------------------------------------------------------ */
 271 /*  MISCELLANEOUS SECTION */
 272 /*  ------------------------------------------------------------------ */
 273
 274 /*  8254 timer */
 275
 276 static void pci9111_timer_set(struct comedi_device *dev)
 277 {
 278         struct pci9111_private_data *dev_private = dev->private;
 279         unsigned long timer_base = dev->iobase + PCI9111_8254_BASE_REG;
 280
 281         i8254_set_mode(timer_base, 1, 0, I8254_MODE0 | I8254_BINARY);
 282         i8254_set_mode(timer_base, 1, 1, I8254_MODE2 | I8254_BINARY);
 283         i8254_set_mode(timer_base, 1, 2, I8254_MODE2 | I8254_BINARY);
 284
 285         udelay(1);
 286
 287         i8254_write(timer_base, 1, 2, dev_private->timer_divisor_2);
 288         i8254_write(timer_base, 1, 1, dev_private->timer_divisor_1);
 289 }
 290
 291 enum pci9111_trigger_sources {
 292         software,
 293         timer_pacer,
 294         external
 295 };
 296
 297 static void pci9111_trigger_source_set(struct comedi_device *dev,
 298                                        enum pci9111_trigger_sources source)
 299 {
 300         int flags;
 301
 302         flags = pci9111_trigger_and_autoscan_get() & 0x09;
 303
 304         switch (source) {
 305         case software:
 306                 flags |= PCI9111_EITS_INTERNAL | PCI9111_TPST_SOFTWARE_TRIGGER;
 307                 break;
 308
 309         case timer_pacer:
 310                 flags |= PCI9111_EITS_INTERNAL | PCI9111_TPST_TIMER_PACER;
 311                 break;
 312
 313         case external:
 314                 flags |= PCI9111_EITS_EXTERNAL;
 315                 break;
 316         }
 317
 318         pci9111_trigger_and_autoscan_set(flags);
 319 }
 320
 321 static void pci9111_pretrigger_set(struct comedi_device *dev, bool pretrigger)
 322 {
 323         int flags;
 324
 325         flags = pci9111_trigger_and_autoscan_get() & 0x07;
 326
 327         if (pretrigger)
 328                 flags |= PCI9111_PTRG_ON;
 329
 330         pci9111_trigger_and_autoscan_set(flags);
 331 }
 332
 333 static void pci9111_autoscan_set(struct comedi_device *dev, bool autoscan)
 334 {
 335         int flags;
 336
 337         flags = pci9111_trigger_and_autoscan_get() & 0x0e;
 338
 339         if (autoscan)
 340                 flags |= PCI9111_ASCAN_ON;
 341
 342         pci9111_trigger_and_autoscan_set(flags);
 343 }
 344
 345 enum pci9111_ISC0_sources {
 346         irq_on_eoc,
 347         irq_on_fifo_half_full
 348 };
 349
 350 enum pci9111_ISC1_sources {
 351         irq_on_timer_tick,
 352         irq_on_external_trigger
 353 };
 354
 355 static void pci9111_interrupt_source_set(struct comedi_device *dev,
 356                                          enum pci9111_ISC0_sources irq_0_source,
 357                                          enum pci9111_ISC1_sources irq_1_source)
 358 {
 359         int flags;
 360
 361         flags = pci9111_interrupt_and_fifo_get() & 0x04;
 362
 363         if (irq_0_source == irq_on_fifo_half_full)
 364                 flags |= PCI9111_ISC0_SET_IRQ_ON_FIFO_HALF_FULL;
 365
 366         if (irq_1_source == irq_on_external_trigger)
 367                 flags |= PCI9111_ISC1_SET_IRQ_ON_EXT_TRG;
 368
 369         pci9111_interrupt_and_fifo_set(flags);
 370 }
 371
 372 /*  ------------------------------------------------------------------ */
 373 /*  HARDWARE TRIGGERED ANALOG INPUT SECTION */
 374 /*  ------------------------------------------------------------------ */
 375
 376 /*  Cancel analog input autoscan */
 377
 378 #undef AI_DO_CMD_DEBUG
 379
 380 static int pci9111_ai_cancel(struct comedi_device *dev,
 381                              struct comedi_subdevice *s)
 382 {
 383         struct pci9111_private_data *dev_private = dev->private;
 384
 385         /*  Disable interrupts */
 386
 387         plx9050_interrupt_control(dev_private->lcr_io_base, true, true, true,
 388                                   true, false);
 389
 390         pci9111_trigger_source_set(dev, software);
 391
 392         pci9111_autoscan_set(dev, false);
 393
 394         pci9111_fifo_reset();
 395
 396 #ifdef AI_DO_CMD_DEBUG
 397         printk(PCI9111_DRIVER_NAME ": ai_cancel\n");
 398 #endif
 399
 400         return 0;
 401 }
 402
 403 /*  Test analog input command */
 404
 405 #define pci9111_check_trigger_src(src, flags)   do {                    \
 406                 tmp = src;                                              \
 407                 src &= flags;                                           \
 408                 if (!src || tmp != src)                                 \
 409                         error++;                                        \
 410         } while (false);
 411
 412 static int
 413 pci9111_ai_do_cmd_test(struct comedi_device *dev,
 414                        struct comedi_subdevice *s, struct comedi_cmd *cmd)
 415 {
 416         struct pci9111_private_data *dev_private = dev->private;
 417         int tmp;
 418         int error = 0;
 419         int range, reference;
 420         int i;
 421
 422         /*  Step 1 : check if trigger are trivialy valid */
 423
 424         pci9111_check_trigger_src(cmd->start_src, TRIG_NOW);
 425         pci9111_check_trigger_src(cmd->scan_begin_src,
 426                                   TRIG_TIMER | TRIG_FOLLOW | TRIG_EXT);
 427         pci9111_check_trigger_src(cmd->convert_src, TRIG_TIMER | TRIG_EXT);
 428         pci9111_check_trigger_src(cmd->scan_end_src, TRIG_COUNT);
 429         pci9111_check_trigger_src(cmd->stop_src, TRIG_COUNT | TRIG_NONE);
 430
 431         if (error)
 432                 return 1;
 433
 434         /*  step 2 : make sure trigger sources are unique and mutually
 435          *  compatible */
 436
 437         if (cmd->start_src != TRIG_NOW)
 438                 error++;
 439
 440         if ((cmd->scan_begin_src != TRIG_TIMER) &&
 441             (cmd->scan_begin_src != TRIG_FOLLOW) &&
 442             (cmd->scan_begin_src != TRIG_EXT))
 443                 error++;
 444
 445         if ((cmd->convert_src != TRIG_TIMER) && (cmd->convert_src != TRIG_EXT))
 446                 error++;
 447         if ((cmd->convert_src == TRIG_TIMER) &&
 448             !((cmd->scan_begin_src == TRIG_TIMER) ||
 449               (cmd->scan_begin_src == TRIG_FOLLOW)))
 450                 error++;
 451         if ((cmd->convert_src == TRIG_EXT) &&
 452             !((cmd->scan_begin_src == TRIG_EXT) ||
 453               (cmd->scan_begin_src == TRIG_FOLLOW)))
 454                 error++;
 455
 456
 457         if (cmd->scan_end_src != TRIG_COUNT)
 458                 error++;
 459         if ((cmd->stop_src != TRIG_COUNT) && (cmd->stop_src != TRIG_NONE))
 460                 error++;
 461
 462         if (error)
 463                 return 2;
 464
 465         /*  Step 3 : make sure arguments are trivialy compatible */
 466
 467         if ((cmd->start_src == TRIG_NOW) && (cmd->start_arg != 0)) {
 468                 cmd->start_arg = 0;
 469                 error++;
 470         }
 471
 472         if ((cmd->convert_src == TRIG_TIMER) &&
 473             (cmd->convert_arg < PCI9111_AI_ACQUISITION_PERIOD_MIN_NS)) {
 474                 cmd->convert_arg = PCI9111_AI_ACQUISITION_PERIOD_MIN_NS;
 475                 error++;
 476         }
 477         if ((cmd->convert_src == TRIG_EXT) && (cmd->convert_arg != 0)) {
 478                 cmd->convert_arg = 0;
 479                 error++;
 480         }
 481
 482         if ((cmd->scan_begin_src == TRIG_TIMER) &&
 483             (cmd->scan_begin_arg < PCI9111_AI_ACQUISITION_PERIOD_MIN_NS)) {
 484                 cmd->scan_begin_arg = PCI9111_AI_ACQUISITION_PERIOD_MIN_NS;
 485                 error++;
 486         }
 487         if ((cmd->scan_begin_src == TRIG_FOLLOW)
 488             && (cmd->scan_begin_arg != 0)) {
 489                 cmd->scan_begin_arg = 0;
 490                 error++;
 491         }
 492         if ((cmd->scan_begin_src == TRIG_EXT) && (cmd->scan_begin_arg != 0)) {
 493                 cmd->scan_begin_arg = 0;
 494                 error++;
 495         }
 496
 497         if ((cmd->scan_end_src == TRIG_COUNT) &&
 498             (cmd->scan_end_arg != cmd->chanlist_len)) {
 499                 cmd->scan_end_arg = cmd->chanlist_len;
 500                 error++;
 501         }
 502
 503         if ((cmd->stop_src == TRIG_COUNT) && (cmd->stop_arg < 1)) {
 504                 cmd->stop_arg = 1;
 505                 error++;
 506         }
 507         if ((cmd->stop_src == TRIG_NONE) && (cmd->stop_arg != 0)) {
 508                 cmd->stop_arg = 0;
 509                 error++;
 510         }
 511
 512         if (error)
 513                 return 3;
 514
 515         /*  Step 4 : fix up any arguments */
 516
 517         if (cmd->convert_src == TRIG_TIMER) {
 518                 tmp = cmd->convert_arg;
 519                 i8253_cascade_ns_to_timer_2div(PCI9111_8254_CLOCK_PERIOD_NS,
 520                                                &(dev_private->timer_divisor_1),
 521                                                &(dev_private->timer_divisor_2),
 522                                                &(cmd->convert_arg),
 523                                                cmd->flags & TRIG_ROUND_MASK);
 524                 if (tmp != cmd->convert_arg)
 525                         error++;
 526         }
 527         /*  There's only one timer on this card, so the scan_begin timer must */
 528         /*  be a multiple of chanlist_len*convert_arg */
 529
 530         if (cmd->scan_begin_src == TRIG_TIMER) {
 531
 532                 unsigned int scan_begin_min;
 533                 unsigned int scan_begin_arg;
 534                 unsigned int scan_factor;
 535
 536                 scan_begin_min = cmd->chanlist_len * cmd->convert_arg;
 537
 538                 if (cmd->scan_begin_arg != scan_begin_min) {
 539                         if (scan_begin_min < cmd->scan_begin_arg) {
 540                                 scan_factor =
 541                                     cmd->scan_begin_arg / scan_begin_min;
 542                                 scan_begin_arg = scan_factor * scan_begin_min;
 543                                 if (cmd->scan_begin_arg != scan_begin_arg) {
 544                                         cmd->scan_begin_arg = scan_begin_arg;
 545                                         error++;
 546                                 }
 547                         } else {
 548                                 cmd->scan_begin_arg = scan_begin_min;
 549                                 error++;
 550                         }
 551                 }
 552         }
 553
 554         if (error)
 555                 return 4;
 556
 557         /*  Step 5 : check channel list */
 558
 559         if (cmd->chanlist) {
 560
 561                 range = CR_RANGE(cmd->chanlist[0]);
 562                 reference = CR_AREF(cmd->chanlist[0]);
 563
 564                 if (cmd->chanlist_len > 1) {
 565                         for (i = 0; i < cmd->chanlist_len; i++) {
 566                                 if (CR_CHAN(cmd->chanlist[i]) != i) {
 567                                         comedi_error(dev,
 568                                                      "entries in chanlist must be consecutive "
 569                                                      "channels,counting upwards from 0\n");
 570                                         error++;
 571                                 }
 572                                 if (CR_RANGE(cmd->chanlist[i]) != range) {
 573                                         comedi_error(dev,
 574                                                      "entries in chanlist must all have the same gain\n");
 575                                         error++;
 576                                 }
 577                                 if (CR_AREF(cmd->chanlist[i]) != reference) {
 578                                         comedi_error(dev,
 579                                                      "entries in chanlist must all have the same reference\n");
 580                                         error++;
 581                                 }
 582                         }
 583                 }
 584         }
 585
 586         if (error)
 587                 return 5;
 588
 589         return 0;
 590
 591 }
 592
 593 /*  Analog input command */
 594
 595 static int pci9111_ai_do_cmd(struct comedi_device *dev,
 596                              struct comedi_subdevice *s)
 597 {
 598         struct pci9111_private_data *dev_private = dev->private;
 599         struct comedi_cmd *async_cmd = &s->async->cmd;
 600
 601         if (!dev->irq) {
 602                 comedi_error(dev,
 603                              "no irq assigned for PCI9111, cannot do hardware conversion");
 604                 return -1;
 605         }
 606         /*  Set channel scan limit */
 607         /*  PCI9111 allows only scanning from channel 0 to channel n */
 608         /*  TODO: handle the case of an external multiplexer */
 609
 610         if (async_cmd->chanlist_len > 1) {
 611                 pci9111_ai_channel_set((async_cmd->chanlist_len) - 1);
 612                 pci9111_autoscan_set(dev, true);
 613         } else {
 614                 pci9111_ai_channel_set(CR_CHAN(async_cmd->chanlist[0]));
 615                 pci9111_autoscan_set(dev, false);
 616         }
 617
 618         /*  Set gain */
 619         /*  This is the same gain on every channel */
 620
 621         pci9111_ai_range_set(CR_RANGE(async_cmd->chanlist[0]));
 622
 623         /* Set counter */
 624
 625         switch (async_cmd->stop_src) {
 626         case TRIG_COUNT:
 627                 dev_private->stop_counter =
 628                     async_cmd->stop_arg * async_cmd->chanlist_len;
 629                 dev_private->stop_is_none = 0;
 630                 break;
 631
 632         case TRIG_NONE:
 633                 dev_private->stop_counter = 0;
 634                 dev_private->stop_is_none = 1;
 635                 break;
 636
 637         default:
 638                 comedi_error(dev, "Invalid stop trigger");
 639                 return -1;
 640         }
 641
 642         /*  Set timer pacer */
 643
 644         dev_private->scan_delay = 0;
 645         switch (async_cmd->convert_src) {
 646         case TRIG_TIMER:
 647                 i8253_cascade_ns_to_timer_2div(PCI9111_8254_CLOCK_PERIOD_NS,
 648                                                &(dev_private->timer_divisor_1),
 649                                                &(dev_private->timer_divisor_2),
 650                                                &(async_cmd->convert_arg),
 651                                                async_cmd->
 652                                                flags & TRIG_ROUND_MASK);
 653 #ifdef AI_DO_CMD_DEBUG
 654                 printk(PCI9111_DRIVER_NAME ": divisors = %d, %d\n",
 655                        dev_private->timer_divisor_1,
 656                        dev_private->timer_divisor_2);
 657 #endif
 658
 659                 pci9111_trigger_source_set(dev, software);
 660                 pci9111_timer_set(dev);
 661                 pci9111_fifo_reset();
 662                 pci9111_interrupt_source_set(dev, irq_on_fifo_half_full,
 663                                              irq_on_timer_tick);
 664                 pci9111_trigger_source_set(dev, timer_pacer);
 665                 plx9050_interrupt_control(dev_private->lcr_io_base, true, true,
 666                                           false, true, true);
 667
 668                 if (async_cmd->scan_begin_src == TRIG_TIMER) {
 669                         dev_private->scan_delay =
 670                                 (async_cmd->scan_begin_arg /
 671                                  (async_cmd->convert_arg *
 672                                   async_cmd->chanlist_len)) - 1;
 673                 }
 674
 675                 break;
 676
 677         case TRIG_EXT:
 678
 679                 pci9111_trigger_source_set(dev, external);
 680                 pci9111_fifo_reset();
 681                 pci9111_interrupt_source_set(dev, irq_on_fifo_half_full,
 682                                              irq_on_timer_tick);
 683                 plx9050_interrupt_control(dev_private->lcr_io_base, true, true,
 684                                           false, true, true);
 685
 686                 break;
 687
 688         default:
 689                 comedi_error(dev, "Invalid convert trigger");
 690                 return -1;
 691         }
 692
 693         dev_private->stop_counter *= (1 + dev_private->scan_delay);
 694         dev_private->chanlist_len = async_cmd->chanlist_len;
 695         dev_private->chunk_counter = 0;
 696         dev_private->chunk_num_samples =
 697             dev_private->chanlist_len * (1 + dev_private->scan_delay);
 698
 699 #ifdef AI_DO_CMD_DEBUG
 700         printk(PCI9111_DRIVER_NAME ": start interruptions!\n");
 701         printk(PCI9111_DRIVER_NAME ": trigger source = %2x\n",
 702                pci9111_trigger_and_autoscan_get());
 703         printk(PCI9111_DRIVER_NAME ": irq source     = %2x\n",
 704                pci9111_interrupt_and_fifo_get());
 705         printk(PCI9111_DRIVER_NAME ": ai_do_cmd\n");
 706         printk(PCI9111_DRIVER_NAME ": stop counter   = %d\n",
 707                dev_private->stop_counter);
 708         printk(PCI9111_DRIVER_NAME ": scan delay     = %d\n",
 709                dev_private->scan_delay);
 710         printk(PCI9111_DRIVER_NAME ": chanlist_len   = %d\n",
 711                dev_private->chanlist_len);
 712         printk(PCI9111_DRIVER_NAME ": chunk num samples = %d\n",
 713                dev_private->chunk_num_samples);
 714 #endif
 715
 716         return 0;
 717 }
 718
 719 static void pci9111_ai_munge(struct comedi_device *dev,
 720                              struct comedi_subdevice *s, void *data,
 721                              unsigned int num_bytes,
 722                              unsigned int start_chan_index)
 723 {
 724         short *array = data;
 725         unsigned int maxdata = s->maxdata;
 726         unsigned int invert = (maxdata + 1) >> 1;
 727         unsigned int shift = (maxdata == 0xffff) ? 0 : 4;
 728         unsigned int num_samples = num_bytes / sizeof(short);
 729         unsigned int i;
 730
 731         for (i = 0; i < num_samples; i++)
 732                 array[i] = ((array[i] >> shift) & maxdata) ^ invert;
 733 }
 734
 735 /*  ------------------------------------------------------------------ */
 736 /*  INTERRUPT SECTION */
 737 /*  ------------------------------------------------------------------ */
 738
 739 #undef INTERRUPT_DEBUG
 740
 741 static irqreturn_t pci9111_interrupt(int irq, void *p_device)
 742 {
 743         struct comedi_device *dev = p_device;
 744         struct pci9111_private_data *dev_private = dev->private;
 745         struct comedi_subdevice *s = dev->read_subdev;
 746         struct comedi_async *async;
 747         unsigned long irq_flags;
 748         unsigned char intcsr;
 749
 750         if (!dev->attached) {
 751                 /*  Ignore interrupt before device fully attached. */
 752                 /*  Might not even have allocated subdevices yet! */
 753                 return IRQ_NONE;
 754         }
 755
 756         async = s->async;
 757
 758         spin_lock_irqsave(&dev->spinlock, irq_flags);
 759
 760         /*  Check if we are source of interrupt */
 761         intcsr = inb(dev_private->lcr_io_base +
 762                      PLX9050_REGISTER_INTERRUPT_CONTROL);
 763         if (!(((intcsr & PLX9050_PCI_INTERRUPT_ENABLE) != 0)
 764               && (((intcsr & (PLX9050_LINTI1_ENABLE | PLX9050_LINTI1_STATUS))
 765                    == (PLX9050_LINTI1_ENABLE | PLX9050_LINTI1_STATUS))
 766                   || ((intcsr & (PLX9050_LINTI2_ENABLE | PLX9050_LINTI2_STATUS))
 767                       == (PLX9050_LINTI2_ENABLE | PLX9050_LINTI2_STATUS))))) {
 768                 /*  Not the source of the interrupt. */
 769                 /*  (N.B. not using PLX9050_SOFTWARE_INTERRUPT) */
 770                 spin_unlock_irqrestore(&dev->spinlock, irq_flags);
 771                 return IRQ_NONE;
 772         }
 773
 774         if ((intcsr & (PLX9050_LINTI1_ENABLE | PLX9050_LINTI1_STATUS)) ==
 775             (PLX9050_LINTI1_ENABLE | PLX9050_LINTI1_STATUS)) {
 776                 /*  Interrupt comes from fifo_half-full signal */
 777
 778                 if (pci9111_is_fifo_full()) {
 779                         spin_unlock_irqrestore(&dev->spinlock, irq_flags);
 780                         comedi_error(dev, PCI9111_DRIVER_NAME " fifo overflow");
 781                         pci9111_interrupt_clear();
 782                         pci9111_ai_cancel(dev, s);
 783                         async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
 784                         comedi_event(dev, s);
 785
 786                         return IRQ_HANDLED;
 787                 }
 788
 789                 if (pci9111_is_fifo_half_full()) {
 790                         unsigned int num_samples;
 791                         unsigned int bytes_written = 0;
 792
 793 #ifdef INTERRUPT_DEBUG
 794                         printk(PCI9111_DRIVER_NAME ": fifo is half full\n");
 795 #endif
 796
 797                         num_samples =
 798                             PCI9111_FIFO_HALF_SIZE >
 799                             dev_private->stop_counter
 800                             && !dev_private->
 801                             stop_is_none ? dev_private->stop_counter :
 802                             PCI9111_FIFO_HALF_SIZE;
 803                         insw(dev->iobase + PCI9111_AI_FIFO_REG,
 804                              dev_private->ai_bounce_buffer, num_samples);
 805
 806                         if (dev_private->scan_delay < 1) {
 807                                 bytes_written =
 808                                     cfc_write_array_to_buffer(s,
 809                                                               dev_private->
 810                                                               ai_bounce_buffer,
 811                                                               num_samples *
 812                                                               sizeof(short));
 813                         } else {
 814                                 int position = 0;
 815                                 int to_read;
 816
 817                                 while (position < num_samples) {
 818                                         if (dev_private->chunk_counter <
 819                                             dev_private->chanlist_len) {
 820                                                 to_read =
 821                                                     dev_private->chanlist_len -
 822                                                     dev_private->chunk_counter;
 823
 824                                                 if (to_read >
 825                                                     num_samples - position)
 826                                                         to_read =
 827                                                             num_samples -
 828                                                             position;
 829
 830                                                 bytes_written +=
 831                                                     cfc_write_array_to_buffer
 832                                                     (s,
 833                                                      dev_private->ai_bounce_buffer
 834                                                      + position,
 835                                                      to_read * sizeof(short));
 836                                         } else {
 837                                                 to_read =
 838                                                     dev_private->chunk_num_samples
 839                                                     -
 840                                                     dev_private->chunk_counter;
 841                                                 if (to_read >
 842                                                     num_samples - position)
 843                                                         to_read =
 844                                                             num_samples -
 845                                                             position;
 846
 847                                                 bytes_written +=
 848                                                     sizeof(short) * to_read;
 849                                         }
 850
 851                                         position += to_read;
 852                                         dev_private->chunk_counter += to_read;
 853
 854                                         if (dev_private->chunk_counter >=
 855                                             dev_private->chunk_num_samples)
 856                                                 dev_private->chunk_counter = 0;
 857                                 }
 858                         }
 859
 860                         dev_private->stop_counter -=
 861                             bytes_written / sizeof(short);
 862                 }
 863         }
 864
 865         if ((dev_private->stop_counter == 0) && (!dev_private->stop_is_none)) {
 866                 async->events |= COMEDI_CB_EOA;
 867                 pci9111_ai_cancel(dev, s);
 868         }
 869
 870         /* Very important, otherwise another interrupt request will be inserted
 871          * and will cause driver hangs on processing interrupt event. */
 872
 873         pci9111_interrupt_clear();
 874
 875         spin_unlock_irqrestore(&dev->spinlock, irq_flags);
 876
 877         comedi_event(dev, s);
 878
 879         return IRQ_HANDLED;
 880 }
 881
 882 /*  ------------------------------------------------------------------ */
 883 /*  INSTANT ANALOG INPUT OUTPUT SECTION */
 884 /*  ------------------------------------------------------------------ */
 885
 886 /*  analog instant input */
 887
 888 static int pci9111_ai_insn_read(struct comedi_device *dev,
 889                                 struct comedi_subdevice *s,
 890                                 struct comedi_insn *insn, unsigned int *data)
 891 {
 892         unsigned int maxdata = s->maxdata;
 893         unsigned int invert = (maxdata + 1) >> 1;
 894         unsigned int shift = (maxdata == 0xffff) ? 0 : 4;
 895         int timeout;
 896         int i;
 897
 898         pci9111_ai_channel_set(CR_CHAN((&insn->chanspec)[0]));
 899
 900         if ((pci9111_ai_range_get()) != CR_RANGE((&insn->chanspec)[0]))
 901                 pci9111_ai_range_set(CR_RANGE((&insn->chanspec)[0]));
 902
 903         pci9111_fifo_reset();
 904
 905         for (i = 0; i < insn->n; i++) {
 906                 pci9111_software_trigger();
 907
 908                 timeout = PCI9111_AI_INSTANT_READ_TIMEOUT;
 909
 910                 while (timeout--) {
 911                         if (!pci9111_is_fifo_empty())
 912                                 goto conversion_done;
 913                 }
 914
 915                 comedi_error(dev, "A/D read timeout");
 916                 data[i] = 0;
 917                 pci9111_fifo_reset();
 918                 return -ETIME;
 919
 920 conversion_done:
 921
 922                 data[i] = inw(dev->iobase + PCI9111_AI_FIFO_REG);
 923                 data[i] = ((data[i] >> shift) & maxdata) ^ invert;
 924         }
 925
 926         return i;
 927 }
 928
 929 static int pci9111_ao_insn_write(struct comedi_device *dev,
 930                                  struct comedi_subdevice *s,
 931                                  struct comedi_insn *insn,
 932                                  unsigned int *data)
 933 {
 934         struct pci9111_private_data *dev_private = dev->private;
 935         unsigned int val = 0;
 936         int i;
 937
 938         for (i = 0; i < insn->n; i++) {
 939                 val = data[i];
 940                 outw(val, dev->iobase + PCI9111_AO_REG);
 941         }
 942         dev_private->ao_readback = val;
 943
 944         return insn->n;
 945 }
 946
 947 static int pci9111_ao_insn_read(struct comedi_device *dev,
 948                                 struct comedi_subdevice *s,
 949                                 struct comedi_insn *insn,
 950                                 unsigned int *data)
 951 {
 952         struct pci9111_private_data *dev_private = dev->private;
 953         int i;
 954
 955         for (i = 0; i < insn->n; i++)
 956                 data[i] = dev_private->ao_readback;
 957
 958         return insn->n;
 959 }
 960
 961 static int pci9111_di_insn_bits(struct comedi_device *dev,
 962                                 struct comedi_subdevice *s,
 963                                 struct comedi_insn *insn,
 964                                 unsigned int *data)
 965 {
 966         data[1] = inw(dev->iobase + PCI9111_DIO_REG);
 967
 968         return insn->n;
 969 }
 970
 971 static int pci9111_do_insn_bits(struct comedi_device *dev,
 972                                 struct comedi_subdevice *s,
 973                                 struct comedi_insn *insn,
 974                                 unsigned int *data)
 975 {
 976         unsigned int mask = data[0];
 977         unsigned int bits = data[1];
 978
 979         if (mask) {
 980                 s->state &= ~mask;
 981                 s->state |= (bits & mask);
 982
 983                 outw(s->state, dev->iobase + PCI9111_DIO_REG);
 984         }
 985
 986         data[1] = s->state;
 987
 988         return insn->n;
 989 }
 990
 991 /*  ------------------------------------------------------------------ */
 992 /*  INITIALISATION SECTION */
 993 /*  ------------------------------------------------------------------ */
 994
 995 /*  Reset device */
 996
 997 static int pci9111_reset(struct comedi_device *dev)
 998 {
 999         struct pci9111_private_data *dev_private = dev->private;
1000
1001         /*  Set trigger source to software */
1002
1003         plx9050_interrupt_control(dev_private->lcr_io_base, true, true, true,
1004                                   true, false);
1005
1006         pci9111_trigger_source_set(dev, software);
1007         pci9111_pretrigger_set(dev, false);
1008         pci9111_autoscan_set(dev, false);
1009
1010         /*  Reset 8254 chip */
1011
1012         dev_private->timer_divisor_1 = 0;
1013         dev_private->timer_divisor_2 = 0;
1014
1015         pci9111_timer_set(dev);
1016
1017         return 0;
1018 }
1019
1020 static int pci9111_attach_pci(struct comedi_device *dev,
1021                               struct pci_dev *pcidev)
1022 {
1023         struct pci9111_private_data *dev_private;
1024         struct comedi_subdevice *s;
1025         int ret;
1026
1027         comedi_set_hw_dev(dev, &pcidev->dev);
1028         dev->board_name = dev->driver->driver_name;
1029
1030         ret = alloc_private(dev, sizeof(*dev_private));
1031         if (ret)
1032                 return ret;
1033         dev_private = dev->private;
1034
1035         ret = comedi_pci_enable(pcidev, dev->board_name);
1036         if (ret)
1037                 return ret;
1038         dev_private->lcr_io_base = pci_resource_start(pcidev, 1);
1039         dev->iobase = pci_resource_start(pcidev, 2);
1040
1041         pci9111_reset(dev);
1042
1043         if (pcidev->irq > 0) {
1044                 ret = request_irq(dev->irq, pci9111_interrupt,
1045                                   IRQF_SHARED, dev->board_name, dev);
1046                 if (ret)
1047                         return ret;
1048                 dev->irq = pcidev->irq;
1049         }
1050
1051         ret = comedi_alloc_subdevices(dev, 4);
1052         if (ret)
1053                 return ret;
1054
1055         s = &dev->subdevices[0];
1056         dev->read_subdev = s;
1057         s->type         = COMEDI_SUBD_AI;
1058         s->subdev_flags = SDF_READABLE | SDF_COMMON | SDF_CMD_READ;
1059         s->n_chan       = 16;
1060         s->maxdata      = 0xffff;
1061         s->len_chanlist = 16;
1062         s->range_table  = &pci9111_hr_ai_range;
1063         s->cancel       = pci9111_ai_cancel;
1064         s->insn_read    = pci9111_ai_insn_read;
1065         s->do_cmdtest   = pci9111_ai_do_cmd_test;
1066         s->do_cmd       = pci9111_ai_do_cmd;
1067         s->munge        = pci9111_ai_munge;
1068
1069         s = &dev->subdevices[1];
1070         s->type         = COMEDI_SUBD_AO;
1071         s->subdev_flags = SDF_WRITABLE | SDF_COMMON;
1072         s->n_chan       = 1;
1073         s->maxdata      = 0x0fff;
1074         s->len_chanlist = 1;
1075         s->range_table  = &range_bipolar10;
1076         s->insn_write   = pci9111_ao_insn_write;
1077         s->insn_read    = pci9111_ao_insn_read;
1078
1079         s = &dev->subdevices[2];
1080         s->type         = COMEDI_SUBD_DI;
1081         s->subdev_flags = SDF_READABLE;
1082         s->n_chan       = 16;
1083         s->maxdata      = 1;
1084         s->range_table  = &range_digital;
1085         s->insn_bits    = pci9111_di_insn_bits;
1086
1087         s = &dev->subdevices[3];
1088         s->type         = COMEDI_SUBD_DO;
1089         s->subdev_flags = SDF_READABLE | SDF_WRITABLE;
1090         s->n_chan       = 16;
1091         s->maxdata      = 1;
1092         s->range_table  = &range_digital;
1093         s->insn_bits    = pci9111_do_insn_bits;
1094
1095         dev_private->is_valid = 1;
1096
1097         dev_info(dev->class_dev, "%s attached\n", dev->board_name);
1098
1099         return 0;
1100 }
1101
1102 static void pci9111_detach(struct comedi_device *dev)
1103 {
1104         struct pci_dev *pcidev = comedi_to_pci_dev(dev);
1105         struct pci9111_private_data *dev_private = dev->private;
1106
1107         if (dev_private) {
1108                 if (dev_private->is_valid)
1109                         pci9111_reset(dev);
1110         }
1111         if (dev->irq != 0)
1112                 free_irq(dev->irq, dev);
1113         if (pcidev) {
1114                 if (dev->iobase)
1115                         comedi_pci_disable(pcidev);
1116                 pci_dev_put(pcidev);
1117         }
1118 }
1119
1120 static struct comedi_driver adl_pci9111_driver = {
1121         .driver_name    = "adl_pci9111",
1122         .module         = THIS_MODULE,
1123         .attach_pci     = pci9111_attach_pci,
1124         .detach         = pci9111_detach,
1125 };
1126
1127 static int __devinit pci9111_pci_probe(struct pci_dev *dev,
1128                                        const struct pci_device_id *ent)
1129 {
1130         return comedi_pci_auto_config(dev, &adl_pci9111_driver);
1131 }
1132
1133 static void __devexit pci9111_pci_remove(struct pci_dev *dev)
1134 {
1135         comedi_pci_auto_unconfig(dev);
1136 }
1137
1138 static DEFINE_PCI_DEVICE_TABLE(pci9111_pci_table) = {
1139         { PCI_DEVICE(PCI_VENDOR_ID_ADLINK, PCI9111_HR_DEVICE_ID) },
1140         /* { PCI_DEVICE(PCI_VENDOR_ID_ADLINK, PCI9111_HG_DEVICE_ID) }, */
1141         { 0 }
1142 };
1143 MODULE_DEVICE_TABLE(pci, pci9111_pci_table);
1144
1145 static struct pci_driver adl_pci9111_pci_driver = {
1146         .name           = "adl_pci9111",
1147         .id_table       = pci9111_pci_table,
1148         .probe          = pci9111_pci_probe,
1149         .remove         = __devexit_p(pci9111_pci_remove),
1150 };
1151 module_comedi_pci_driver(adl_pci9111_driver, adl_pci9111_pci_driver);
1152
1153 MODULE_AUTHOR("Comedi http://www.comedi.org");
1154 MODULE_DESCRIPTION("Comedi low-level driver");
1155 MODULE_LICENSE("GPL");