drivers/staging/brcm80211/brcmfmac/dhd_sdio.c

   1 /*
   2  * Copyright (c) 2010 Broadcom Corporation
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
  11  * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
  13  * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
  14  * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/types.h>
  18 #include <linux/kernel.h>
  19 #include <linux/printk.h>
  20 #include <linux/pci_ids.h>
  21 #include <linux/netdevice.h>
  22 #include <linux/sched.h>
  23 #include <linux/mmc/sdio.h>
  24 #include <asm/unaligned.h>
  25 #include <defs.h>
  26 #include <brcmu_wifi.h>
  27 #include <brcmu_utils.h>
  28 #include <brcm_hw_ids.h>
  29 #include <soc.h>
  30 #include "sdio_host.h"
  31
  32 /* register access macros */
  33 #ifndef __BIG_ENDIAN
  34 #ifndef __mips__
  35 #define R_REG(r) \
  36         brcmf_sdcard_reg_read(NULL, (unsigned long)(r), sizeof(*(r)))
  37 #else                           /* __mips__ */
  38 #define R_REG(r) \
  39         ({ \
  40                 __typeof(*(r)) __osl_v; \
  41                 __asm__ __volatile__("sync"); \
  42                 __osl_v = brcmf_sdcard_reg_read(NULL, (unsigned long)(r),\
  43                                           sizeof(*(r))); \
  44                 __asm__ __volatile__("sync"); \
  45                 __osl_v; \
  46         })
  47 #endif                          /* __mips__ */
  48
  49 #define W_REG(r, v) do { \
  50                 brcmf_sdcard_reg_write(NULL, (unsigned long)(r), sizeof(*(r)), \
  51                                        (v)); \
  52         } while (0)
  53 #else                           /* __BIG_ENDIAN */
  54 #define R_REG(r) \
  55         brcmf_sdcard_reg_read(NULL, (unsigned long)(r), sizeof(*(r)))
  56 #define W_REG(r, v) do { \
  57                 brcmf_sdcard_reg_write(NULL, (unsigned long)(r), sizeof(*(r)), \
  58                                        (v)); \
  59         } while (0)
  60 #endif                          /* __BIG_ENDIAN */
  61
  62 #define AND_REG(r, v)   W_REG((r), R_REG(r) & (v))
  63 #define OR_REG(r, v)    W_REG((r), R_REG(r) | (v))
  64
  65 #define SET_REG(r, mask, val) \
  66                 W_REG((r), ((R_REG(r) & ~(mask)) | (val)))
  67
  68 #ifdef BCMDBG
  69
  70 /* ARM trap handling */
  71
  72 /* Trap types defined by ARM (see arminc.h) */
  73
  74 /* Trap locations in lo memory */
  75 #define TRAP_STRIDE     4
  76 #define FIRST_TRAP      TR_RST
  77 #define LAST_TRAP       (TR_FIQ * TRAP_STRIDE)
  78
  79 #if defined(__ARM_ARCH_4T__)
  80 #define MAX_TRAP_TYPE   (TR_FIQ + 1)
  81 #elif defined(__ARM_ARCH_7M__)
  82 #define MAX_TRAP_TYPE   (TR_ISR + ARMCM3_NUMINTS)
  83 #endif                          /* __ARM_ARCH_7M__ */
  84
  85 /* The trap structure is defined here as offsets for assembly */
  86 #define TR_TYPE         0x00
  87 #define TR_EPC          0x04
  88 #define TR_CPSR         0x08
  89 #define TR_SPSR         0x0c
  90 #define TR_REGS         0x10
  91 #define TR_REG(n)       (TR_REGS + (n) * 4)
  92 #define TR_SP           TR_REG(13)
  93 #define TR_LR           TR_REG(14)
  94 #define TR_PC           TR_REG(15)
  95
  96 #define TRAP_T_SIZE     80
  97
  98 struct brcmf_trap {
  99         u32 type;
 100         u32 epc;
 101         u32 cpsr;
 102         u32 spsr;
 103         u32 r0;
 104         u32 r1;
 105         u32 r2;
 106         u32 r3;
 107         u32 r4;
 108         u32 r5;
 109         u32 r6;
 110         u32 r7;
 111         u32 r8;
 112         u32 r9;
 113         u32 r10;
 114         u32 r11;
 115         u32 r12;
 116         u32 r13;
 117         u32 r14;
 118         u32 pc;
 119 };
 120
 121 #define CBUF_LEN        (128)
 122
 123 #define LOG_BUF_LEN     1024
 124
 125 struct rte_log {
 126         u32 buf;                /* Can't be pointer on (64-bit) hosts */
 127         uint buf_size;
 128         uint idx;
 129         char *_buf_compat;      /* Redundant pointer for backward compat. */
 130 };
 131
 132 struct rte_console {
 133         /* Virtual UART
 134          * When there is no UART (e.g. Quickturn),
 135          * the host should write a complete
 136          * input line directly into cbuf and then write
 137          * the length into vcons_in.
 138          * This may also be used when there is a real UART
 139          * (at risk of conflicting with
 140          * the real UART).  vcons_out is currently unused.
 141          */
 142         volatile uint vcons_in;
 143         volatile uint vcons_out;
 144
 145         /* Output (logging) buffer
 146          * Console output is written to a ring buffer log_buf at index log_idx.
 147          * The host may read the output when it sees log_idx advance.
 148          * Output will be lost if the output wraps around faster than the host
 149          * polls.
 150          */
 151         struct rte_log log;
 152
 153         /* Console input line buffer
 154          * Characters are read one at a time into cbuf
 155          * until <CR> is received, then
 156          * the buffer is processed as a command line.
 157          * Also used for virtual UART.
 158          */
 159         uint cbuf_idx;
 160         char cbuf[CBUF_LEN];
 161 };
 162
 163 #endif                          /* BCMDBG */
 164 #include <chipcommon.h>
 165
 166 #include "sbsdio.h"
 167
 168 #include "dngl_stats.h"
 169 #include "dhd.h"
 170 #include "dhd_bus.h"
 171 #include "dhd_proto.h"
 172 #include "dhd_dbg.h"
 173 #include <sdiovar.h>
 174 #include <bcmchip.h>
 175
 176 #ifndef DHDSDIO_MEM_DUMP_FNAME
 177 #define DHDSDIO_MEM_DUMP_FNAME         "mem_dump"
 178 #endif
 179
 180 #define TXQLEN          2048    /* bulk tx queue length */
 181 #define TXHI            (TXQLEN - 256)  /* turn on flow control above TXHI */
 182 #define TXLOW           (TXHI - 256)    /* turn off flow control below TXLOW */
 183 #define PRIOMASK        7
 184
 185 #define TXRETRIES       2       /* # of retries for tx frames */
 186
 187 #if defined(CONFIG_MACH_SANDGATE2G)
 188 #define DHD_RXBOUND     250     /* Default for max rx frames in
 189                                  one scheduling */
 190 #else
 191 #define DHD_RXBOUND     50      /* Default for max rx frames in
 192                                  one scheduling */
 193 #endif                          /* defined(CONFIG_MACH_SANDGATE2G) */
 194
 195 #define DHD_TXBOUND     20      /* Default for max tx frames in
 196                                  one scheduling */
 197
 198 #define DHD_TXMINMAX    1       /* Max tx frames if rx still pending */
 199
 200 #define MEMBLOCK        2048    /* Block size used for downloading
 201                                  of dongle image */
 202 #define MAX_DATA_BUF    (32 * 1024)     /* Must be large enough to hold
 203                                  biggest possible glom */
 204
 205 #ifndef BRCMF_FIRSTREAD
 206 #define BRCMF_FIRSTREAD 32
 207 #endif
 208 #if !ISPOWEROF2(BRCMF_FIRSTREAD)
 209 #error BRCMF_FIRSTREAD is not a power of 2!
 210 #endif
 211
 212 /* Total length of frame header for dongle protocol */
 213 #define SDPCM_HDRLEN    (SDPCM_FRAMETAG_LEN + SDPCM_SWHEADER_LEN)
 214 #ifdef SDTEST
 215 #define SDPCM_RESERVE   (SDPCM_HDRLEN + SDPCM_TEST_HDRLEN + BRCMF_SDALIGN)
 216 #else
 217 #define SDPCM_RESERVE   (SDPCM_HDRLEN + BRCMF_SDALIGN)
 218 #endif
 219
 220 /*
 221  * Software allocation of To SB Mailbox resources
 222  */
 223
 224 /* tosbmailbox bits corresponding to intstatus bits */
 225 #define SMB_NAK         (1 << 0)        /* Frame NAK */
 226 #define SMB_INT_ACK     (1 << 1)        /* Host Interrupt ACK */
 227 #define SMB_USE_OOB     (1 << 2)        /* Use OOB Wakeup */
 228 #define SMB_DEV_INT     (1 << 3)        /* Miscellaneous Interrupt */
 229
 230 /* tosbmailboxdata */
 231 #define SMB_DATA_VERSION_SHIFT  16      /* host protocol version */
 232
 233 /*
 234  * Software allocation of To Host Mailbox resources
 235  */
 236
 237 /* intstatus bits */
 238 #define I_HMB_FC_STATE  I_HMB_SW0       /* Flow Control State */
 239 #define I_HMB_FC_CHANGE I_HMB_SW1       /* Flow Control State Changed */
 240 #define I_HMB_FRAME_IND I_HMB_SW2       /* Frame Indication */
 241 #define I_HMB_HOST_INT  I_HMB_SW3       /* Miscellaneous Interrupt */
 242
 243 /* tohostmailboxdata */
 244 #define HMB_DATA_NAKHANDLED     1       /* retransmit NAK'd frame */
 245 #define HMB_DATA_DEVREADY       2       /* talk to host after enable */
 246 #define HMB_DATA_FC             4       /* per prio flowcontrol update flag */
 247 #define HMB_DATA_FWREADY        8       /* fw ready for protocol activity */
 248
 249 #define HMB_DATA_FCDATA_MASK    0xff000000
 250 #define HMB_DATA_FCDATA_SHIFT   24
 251
 252 #define HMB_DATA_VERSION_MASK   0x00ff0000
 253 #define HMB_DATA_VERSION_SHIFT  16
 254
 255 /*
 256  * Software-defined protocol header
 257  */
 258
 259 /* Current protocol version */
 260 #define SDPCM_PROT_VERSION      4
 261
 262 /* SW frame header */
 263 #define SDPCM_PACKET_SEQUENCE(p)        (((u8 *)p)[0] & 0xff)
 264
 265 #define SDPCM_CHANNEL_MASK              0x00000f00
 266 #define SDPCM_CHANNEL_SHIFT             8
 267 #define SDPCM_PACKET_CHANNEL(p)         (((u8 *)p)[1] & 0x0f)
 268
 269 #define SDPCM_NEXTLEN_OFFSET            2
 270
 271 /* Data Offset from SOF (HW Tag, SW Tag, Pad) */
 272 #define SDPCM_DOFFSET_OFFSET            3       /* Data Offset */
 273 #define SDPCM_DOFFSET_VALUE(p)          (((u8 *)p)[SDPCM_DOFFSET_OFFSET] & 0xff)
 274 #define SDPCM_DOFFSET_MASK              0xff000000
 275 #define SDPCM_DOFFSET_SHIFT             24
 276 #define SDPCM_FCMASK_OFFSET             4       /* Flow control */
 277 #define SDPCM_FCMASK_VALUE(p)           (((u8 *)p)[SDPCM_FCMASK_OFFSET] & 0xff)
 278 #define SDPCM_WINDOW_OFFSET             5       /* Credit based fc */
 279 #define SDPCM_WINDOW_VALUE(p)           (((u8 *)p)[SDPCM_WINDOW_OFFSET] & 0xff)
 280
 281 #define SDPCM_SWHEADER_LEN      8       /* SW header is 64 bits */
 282
 283 /* logical channel numbers */
 284 #define SDPCM_CONTROL_CHANNEL   0       /* Control channel Id */
 285 #define SDPCM_EVENT_CHANNEL     1       /* Asyc Event Indication Channel Id */
 286 #define SDPCM_DATA_CHANNEL      2       /* Data Xmit/Recv Channel Id */
 287 #define SDPCM_GLOM_CHANNEL      3       /* For coalesced packets */
 288 #define SDPCM_TEST_CHANNEL      15      /* Reserved for test/debug packets */
 289
 290 #define SDPCM_SEQUENCE_WRAP     256     /* wrap-around val for 8bit frame seq */
 291
 292 #define SDPCM_GLOMDESC(p)       (((u8 *)p)[1] & 0x80)
 293
 294 /* For TEST_CHANNEL packets, define another 4-byte header */
 295 #define SDPCM_TEST_HDRLEN       4       /*
 296                                          * Generally: Cmd(1), Ext(1), Len(2);
 297                                          * Semantics of Ext byte depend on
 298                                          * command. Len is current or requested
 299                                          * frame length, not including test
 300                                          * header; sent little-endian.
 301                                          */
 302 #define SDPCM_TEST_DISCARD      0x01    /* Receiver discards. Ext:pattern id. */
 303 #define SDPCM_TEST_ECHOREQ      0x02    /* Echo request. Ext:pattern id. */
 304 #define SDPCM_TEST_ECHORSP      0x03    /* Echo response. Ext:pattern id. */
 305 #define SDPCM_TEST_BURST        0x04    /*
 306                                          * Receiver to send a burst.
 307                                          * Ext is a frame count
 308                                          */
 309 #define SDPCM_TEST_SEND         0x05    /*
 310                                          * Receiver sets send mode.
 311                                          * Ext is boolean on/off
 312                                          */
 313
 314 /* Handy macro for filling in datagen packets with a pattern */
 315 #define SDPCM_TEST_FILL(byteno, id)     ((u8)(id + byteno))
 316
 317 /*
 318  * Shared structure between dongle and the host.
 319  * The structure contains pointers to trap or assert information.
 320  */
 321 #define SDPCM_SHARED_VERSION       0x0002
 322 #define SDPCM_SHARED_VERSION_MASK  0x00FF
 323 #define SDPCM_SHARED_ASSERT_BUILT  0x0100
 324 #define SDPCM_SHARED_ASSERT        0x0200
 325 #define SDPCM_SHARED_TRAP          0x0400
 326
 327
 328 /* Space for header read, limit for data packets */
 329 #ifndef MAX_HDR_READ
 330 #define MAX_HDR_READ    32
 331 #endif
 332 #if !ISPOWEROF2(MAX_HDR_READ)
 333 #error MAX_HDR_READ is not a power of 2!
 334 #endif
 335
 336 #define MAX_RX_DATASZ   2048
 337
 338 /* Maximum milliseconds to wait for F2 to come up */
 339 #define DHD_WAIT_F2RDY  3000
 340
 341 /* Bump up limit on waiting for HT to account for first startup;
 342  * if the image is doing a CRC calculation before programming the PMU
 343  * for HT availability, it could take a couple hundred ms more, so
 344  * max out at a 1 second (1000000us).
 345  */
 346 #if (PMU_MAX_TRANSITION_DLY <= 1000000)
 347 #undef PMU_MAX_TRANSITION_DLY
 348 #define PMU_MAX_TRANSITION_DLY 1000000
 349 #endif
 350
 351 /* Value for ChipClockCSR during initial setup */
 352 #define DHD_INIT_CLKCTL1        (SBSDIO_FORCE_HW_CLKREQ_OFF |   \
 353                                         SBSDIO_ALP_AVAIL_REQ)
 354 #define DHD_INIT_CLKCTL2        (SBSDIO_FORCE_HW_CLKREQ_OFF | SBSDIO_FORCE_ALP)
 355
 356 /* Flags for SDH calls */
 357 #define F2SYNC  (SDIO_REQ_4BYTE | SDIO_REQ_FIXED)
 358
 359 /* sbimstate */
 360 #define SBIM_IBE                0x20000 /* inbanderror */
 361 #define SBIM_TO                 0x40000 /* timeout */
 362 #define SBIM_BY                 0x01800000      /* busy (sonics >= 2.3) */
 363 #define SBIM_RJ                 0x02000000      /* reject (sonics >= 2.3) */
 364
 365 /* sbtmstatelow */
 366 #define SBTML_RESET             0x0001  /* reset */
 367 #define SBTML_REJ_MASK          0x0006  /* reject field */
 368 #define SBTML_REJ               0x0002  /* reject */
 369 #define SBTML_TMPREJ            0x0004  /* temporary reject, for error recovery */
 370
 371 #define SBTML_SICF_SHIFT        16      /* Shift to locate the SI control flags in sbtml */
 372
 373 /* sbtmstatehigh */
 374 #define SBTMH_SERR              0x0001  /* serror */
 375 #define SBTMH_INT               0x0002  /* interrupt */
 376 #define SBTMH_BUSY              0x0004  /* busy */
 377 #define SBTMH_TO                0x0020  /* timeout (sonics >= 2.3) */
 378
 379 #define SBTMH_SISF_SHIFT        16      /* Shift to locate the SI status flags in sbtmh */
 380
 381 /* sbidlow */
 382 #define SBIDL_INIT              0x80    /* initiator */
 383
 384 /* sbidhigh */
 385 #define SBIDH_RC_MASK           0x000f  /* revision code */
 386 #define SBIDH_RCE_MASK          0x7000  /* revision code extension field */
 387 #define SBIDH_RCE_SHIFT         8
 388 #define SBCOREREV(sbidh) \
 389         ((((sbidh) & SBIDH_RCE_MASK) >> SBIDH_RCE_SHIFT) | ((sbidh) & SBIDH_RC_MASK))
 390 #define SBIDH_CC_MASK           0x8ff0  /* core code */
 391 #define SBIDH_CC_SHIFT          4
 392 #define SBIDH_VC_MASK           0xffff0000      /* vendor code */
 393 #define SBIDH_VC_SHIFT          16
 394
 395 /*
 396  * Conversion of 802.1D priority to precedence level
 397  */
 398 #define PRIO2PREC(prio) \
 399         (((prio) == PRIO_8021D_NONE || (prio) == PRIO_8021D_BE) ? \
 400         ((prio^2)) : (prio))
 401
 402 DHD_SPINWAIT_SLEEP_INIT(sdioh_spinwait_sleep);
 403
 404 /* Core reg address translation */
 405 #define CORE_CC_REG(base, field)        (base + offsetof(chipcregs_t, field))
 406 #define CORE_BUS_REG(base, field) \
 407                 (base + offsetof(struct sdpcmd_regs, field))
 408 #define CORE_SB(base, field) \
 409                 (base + SBCONFIGOFF + offsetof(sbconfig_t, field))
 410
 411 #ifdef BCMDBG
 412 /* Device console log buffer state */
 413 struct dhd_console {
 414         uint count;             /* Poll interval msec counter */
 415         uint log_addr;          /* Log struct address (fixed) */
 416         struct rte_log log;     /* Log struct (host copy) */
 417         uint bufsize;           /* Size of log buffer */
 418         u8 *buf;                /* Log buffer (host copy) */
 419         uint last;              /* Last buffer read index */
 420 };
 421 #endif                          /* BCMDBG */
 422
 423 struct sdpcm_shared {
 424         u32 flags;
 425         u32 trap_addr;
 426         u32 assert_exp_addr;
 427         u32 assert_file_addr;
 428         u32 assert_line;
 429         u32 console_addr;       /* Address of struct rte_console */
 430         u32 msgtrace_addr;
 431         u8 tag[32];
 432 };
 433
 434
 435 /* misc chip info needed by some of the routines */
 436 struct chip_info {
 437         u32 chip;
 438         u32 chiprev;
 439         u32 cccorebase;
 440         u32 ccrev;
 441         u32 cccaps;
 442         u32 buscorebase;
 443         u32 buscorerev;
 444         u32 buscoretype;
 445         u32 ramcorebase;
 446         u32 armcorebase;
 447         u32 pmurev;
 448         u32 ramsize;
 449 };
 450
 451 /* Private data for SDIO bus interaction */
 452 typedef struct dhd_bus {
 453         dhd_pub_t *dhd;
 454
 455         struct brcmf_sdio *sdh; /* Handle for BCMSDH calls */
 456         struct chip_info *ci;   /* Chip info struct */
 457         char *vars;             /* Variables (from CIS and/or other) */
 458         uint varsz;             /* Size of variables buffer */
 459         u32 sbaddr;             /* Current SB window pointer (-1, invalid) */
 460
 461         struct sdpcmd_regs *regs;       /* SDIO core */
 462         uint sdpcmrev;          /* SDIO core revision */
 463         uint armrev;            /* CPU core revision */
 464         uint ramrev;            /* SOCRAM core revision */
 465         u32 ramsize;            /* Size of RAM in SOCRAM (bytes) */
 466         u32 orig_ramsize;       /* Size of RAM in SOCRAM (bytes) */
 467
 468         u32 bus;                /* gSPI or SDIO bus */
 469         u32 hostintmask;        /* Copy of Host Interrupt Mask */
 470         u32 intstatus;  /* Intstatus bits (events) pending */
 471         bool dpc_sched;         /* Indicates DPC schedule (intrpt rcvd) */
 472         bool fcstate;           /* State of dongle flow-control */
 473
 474         u16 cl_devid;   /* cached devid for brcmf_sdio_probe_attach() */
 475         char *fw_path;          /* module_param: path to firmware image */
 476         char *nv_path;          /* module_param: path to nvram vars file */
 477         const char *nvram_params;       /* user specified nvram params. */
 478
 479         uint blocksize;         /* Block size of SDIO transfers */
 480         uint roundup;           /* Max roundup limit */
 481
 482         struct pktq txq;        /* Queue length used for flow-control */
 483         u8 flowcontrol; /* per prio flow control bitmask */
 484         u8 tx_seq;              /* Transmit sequence number (next) */
 485         u8 tx_max;              /* Maximum transmit sequence allowed */
 486
 487         u8 hdrbuf[MAX_HDR_READ + BRCMF_SDALIGN];
 488         u8 *rxhdr;              /* Header of current rx frame (in hdrbuf) */
 489         u16 nextlen;            /* Next Read Len from last header */
 490         u8 rx_seq;              /* Receive sequence number (expected) */
 491         bool rxskip;            /* Skip receive (awaiting NAK ACK) */
 492
 493         struct sk_buff *glomd;  /* Packet containing glomming descriptor */
 494         struct sk_buff *glom;   /* Packet chain for glommed superframe */
 495         uint glomerr;           /* Glom packet read errors */
 496
 497         u8 *rxbuf;              /* Buffer for receiving control packets */
 498         uint rxblen;            /* Allocated length of rxbuf */
 499         u8 *rxctl;              /* Aligned pointer into rxbuf */
 500         u8 *databuf;            /* Buffer for receiving big glom packet */
 501         u8 *dataptr;            /* Aligned pointer into databuf */
 502         uint rxlen;             /* Length of valid data in buffer */
 503
 504         u8 sdpcm_ver;   /* Bus protocol reported by dongle */
 505
 506         bool intr;              /* Use interrupts */
 507         bool poll;              /* Use polling */
 508         bool ipend;             /* Device interrupt is pending */
 509         bool intdis;            /* Interrupts disabled by isr */
 510         uint intrcount;         /* Count of device interrupt callbacks */
 511         uint lastintrs;         /* Count as of last watchdog timer */
 512         uint spurious;          /* Count of spurious interrupts */
 513         uint pollrate;          /* Ticks between device polls */
 514         uint polltick;          /* Tick counter */
 515         uint pollcnt;           /* Count of active polls */
 516
 517 #ifdef BCMDBG
 518         struct dhd_console console;     /* Console output polling support */
 519         uint console_addr;      /* Console address from shared struct */
 520 #endif                          /* BCMDBG */
 521
 522         uint regfails;          /* Count of R_REG/W_REG failures */
 523
 524         uint clkstate;          /* State of sd and backplane clock(s) */
 525         bool activity;          /* Activity flag for clock down */
 526         s32 idletime;           /* Control for activity timeout */
 527         s32 idlecount;  /* Activity timeout counter */
 528         s32 idleclock;  /* How to set bus driver when idle */
 529         s32 sd_rxchain; /* If bcmsdh api accepts PKT chains */
 530         bool use_rxchain;       /* If dhd should use PKT chains */
 531         bool sleeping;          /* Is SDIO bus sleeping? */
 532         bool rxflow_mode;       /* Rx flow control mode */
 533         bool rxflow;            /* Is rx flow control on */
 534         uint prev_rxlim_hit;    /* Is prev rx limit exceeded
 535                                          (per dpc schedule) */
 536         bool alp_only;          /* Don't use HT clock (ALP only) */
 537 /* Field to decide if rx of control frames happen in rxbuf or lb-pool */
 538         bool usebufpool;
 539
 540 #ifdef SDTEST
 541         /* external loopback */
 542         bool ext_loop;
 543         u8 loopid;
 544
 545         /* pktgen configuration */
 546         uint pktgen_freq;       /* Ticks between bursts */
 547         uint pktgen_count;      /* Packets to send each burst */
 548         uint pktgen_print;      /* Bursts between count displays */
 549         uint pktgen_total;      /* Stop after this many */
 550         uint pktgen_minlen;     /* Minimum packet data len */
 551         uint pktgen_maxlen;     /* Maximum packet data len */
 552         uint pktgen_mode;       /* Configured mode: tx, rx, or echo */
 553         uint pktgen_stop;       /* Number of tx failures causing stop */
 554
 555         /* active pktgen fields */
 556         uint pktgen_tick;       /* Tick counter for bursts */
 557         uint pktgen_ptick;      /* Burst counter for printing */
 558         uint pktgen_sent;       /* Number of test packets generated */
 559         uint pktgen_rcvd;       /* Number of test packets received */
 560         uint pktgen_fail;       /* Number of failed send attempts */
 561         u16 pktgen_len; /* Length of next packet to send */
 562 #endif                          /* SDTEST */
 563
 564         /* Some additional counters */
 565         uint tx_sderrs;         /* Count of tx attempts with sd errors */
 566         uint fcqueued;          /* Tx packets that got queued */
 567         uint rxrtx;             /* Count of rtx requests (NAK to dongle) */
 568         uint rx_toolong;        /* Receive frames too long to receive */
 569         uint rxc_errors;        /* SDIO errors when reading control frames */
 570         uint rx_hdrfail;        /* SDIO errors on header reads */
 571         uint rx_badhdr;         /* Bad received headers (roosync?) */
 572         uint rx_badseq;         /* Mismatched rx sequence number */
 573         uint fc_rcvd;           /* Number of flow-control events received */
 574         uint fc_xoff;           /* Number which turned on flow-control */
 575         uint fc_xon;            /* Number which turned off flow-control */
 576         uint rxglomfail;        /* Failed deglom attempts */
 577         uint rxglomframes;      /* Number of glom frames (superframes) */
 578         uint rxglompkts;        /* Number of packets from glom frames */
 579         uint f2rxhdrs;          /* Number of header reads */
 580         uint f2rxdata;          /* Number of frame data reads */
 581         uint f2txdata;          /* Number of f2 frame writes */
 582         uint f1regdata;         /* Number of f1 register accesses */
 583
 584         u8 *ctrl_frame_buf;
 585         u32 ctrl_frame_len;
 586         bool ctrl_frame_stat;
 587
 588         spinlock_t txqlock;
 589         wait_queue_head_t ctrl_wait;
 590 } dhd_bus_t;
 591
 592 typedef volatile struct _sbconfig {
 593         u32 PAD[2];
 594         u32 sbipsflag;  /* initiator port ocp slave flag */
 595         u32 PAD[3];
 596         u32 sbtpsflag;  /* target port ocp slave flag */
 597         u32 PAD[11];
 598         u32 sbtmerrloga;        /* (sonics >= 2.3) */
 599         u32 PAD;
 600         u32 sbtmerrlog; /* (sonics >= 2.3) */
 601         u32 PAD[3];
 602         u32 sbadmatch3; /* address match3 */
 603         u32 PAD;
 604         u32 sbadmatch2; /* address match2 */
 605         u32 PAD;
 606         u32 sbadmatch1; /* address match1 */
 607         u32 PAD[7];
 608         u32 sbimstate;  /* initiator agent state */
 609         u32 sbintvec;   /* interrupt mask */
 610         u32 sbtmstatelow;       /* target state */
 611         u32 sbtmstatehigh;      /* target state */
 612         u32 sbbwa0;             /* bandwidth allocation table0 */
 613         u32 PAD;
 614         u32 sbimconfiglow;      /* initiator configuration */
 615         u32 sbimconfighigh;     /* initiator configuration */
 616         u32 sbadmatch0; /* address match0 */
 617         u32 PAD;
 618         u32 sbtmconfiglow;      /* target configuration */
 619         u32 sbtmconfighigh;     /* target configuration */
 620         u32 sbbconfig;  /* broadcast configuration */
 621         u32 PAD;
 622         u32 sbbstate;   /* broadcast state */
 623         u32 PAD[3];
 624         u32 sbactcnfg;  /* activate configuration */
 625         u32 PAD[3];
 626         u32 sbflagst;   /* current sbflags */
 627         u32 PAD[3];
 628         u32 sbidlow;            /* identification */
 629         u32 sbidhigh;   /* identification */
 630 } sbconfig_t;
 631
 632 /* clkstate */
 633 #define CLK_NONE        0
 634 #define CLK_SDONLY      1
 635 #define CLK_PENDING     2       /* Not used yet */
 636 #define CLK_AVAIL       3
 637
 638 #define DHD_NOPMU(dhd)  (false)
 639
 640 #ifdef BCMDBG
 641 static int qcount[NUMPRIO];
 642 static int tx_packets[NUMPRIO];
 643 #endif                          /* BCMDBG */
 644
 645 /* Deferred transmit */
 646 const uint brcmf_deferred_tx = 1;
 647
 648 /* Tx/Rx bounds */
 649 uint brcmf_txbound;
 650 uint brcmf_rxbound;
 651 uint dhd_txminmax;
 652
 653 /* override the RAM size if possible */
 654 #define DONGLE_MIN_MEMSIZE (128 * 1024)
 655 int brcmf_dongle_memsize;
 656
 657 static bool dhd_alignctl;
 658
 659 static bool sd1idle;
 660
 661 static bool retrydata;
 662 #define RETRYCHAN(chan) (((chan) == SDPCM_EVENT_CHANNEL) || retrydata)
 663
 664 static const uint watermark = 8;
 665 static const uint firstread = BRCMF_FIRSTREAD;
 666
 667 #define HDATLEN (firstread - (SDPCM_HDRLEN))
 668
 669 /* Retry count for register access failures */
 670 static const uint retry_limit = 2;
 671
 672 /* Force even SD lengths (some host controllers mess up on odd bytes) */
 673 static bool forcealign;
 674
 675 #define ALIGNMENT  4
 676
 677 #define PKTALIGN(_p, _len, _align)                              \
 678         do {                                                            \
 679                 uint datalign;                                          \
 680                 datalign = (unsigned long)((_p)->data);                 \
 681                 datalign = roundup(datalign, (_align)) - datalign;      \
 682                 ASSERT(datalign < (_align));                            \
 683                 ASSERT((_p)->len >= ((_len) + datalign));               \
 684                 if (datalign)                                           \
 685                         skb_pull((_p), datalign);                       \
 686                 __skb_trim((_p), (_len));                               \
 687         } while (0)
 688
 689 /* Limit on rounding up frames */
 690 static const uint max_roundup = 512;
 691
 692 /* Try doing readahead */
 693 static bool dhd_readahead;
 694
 695 /* To check if there's window offered */
 696 #define DATAOK(bus) \
 697         (((u8)(bus->tx_max - bus->tx_seq) != 0) && \
 698         (((u8)(bus->tx_max - bus->tx_seq) & 0x80) == 0))
 699
 700 /* Macros to get register read/write status */
 701 /* NOTE: these assume a local dhdsdio_bus_t *bus! */
 702 #define R_SDREG(regvar, regaddr, retryvar) \
 703 do { \
 704         retryvar = 0; \
 705         do { \
 706                 regvar = R_REG(regaddr); \
 707         } while (brcmf_sdcard_regfail(bus->sdh) && \
 708                  (++retryvar <= retry_limit)); \
 709         if (retryvar) { \
 710                 bus->regfails += (retryvar-1); \
 711                 if (retryvar > retry_limit) { \
 712                         DHD_ERROR(("%s: FAILED" #regvar "READ, LINE %d\n", \
 713                         __func__, __LINE__)); \
 714                         regvar = 0; \
 715                 } \
 716         } \
 717 } while (0)
 718
 719 #define W_SDREG(regval, regaddr, retryvar) \
 720 do { \
 721         retryvar = 0; \
 722         do { \
 723                 W_REG(regaddr, regval); \
 724         } while (brcmf_sdcard_regfail(bus->sdh) && \
 725                  (++retryvar <= retry_limit)); \
 726         if (retryvar) { \
 727                 bus->regfails += (retryvar-1); \
 728                 if (retryvar > retry_limit) \
 729                         DHD_ERROR(("%s: FAILED REGISTER WRITE, LINE %d\n", \
 730                         __func__, __LINE__)); \
 731         } \
 732 } while (0)
 733
 734 #define DHD_BUS                 SDIO_BUS
 735
 736 #define PKT_AVAILABLE()         (intstatus & I_HMB_FRAME_IND)
 737
 738 #define HOSTINTMASK             (I_HMB_SW_MASK | I_CHIPACTIVE)
 739
 740 #ifdef SDTEST
 741 static void brcmf_sdbrcm_checkdied(dhd_bus_t *bus, void *pkt, uint seq);
 742 static void brcmf_sdbrcm_sdtest_set(dhd_bus_t *bus, bool start);
 743 #endif
 744
 745 #ifdef BCMDBG
 746 static int brcmf_sdbrcm_checkdied(dhd_bus_t *bus, u8 *data, uint size);
 747 static int brcmf_sdbrcm_mem_dump(dhd_bus_t *bus);
 748 #endif                          /* BCMDBG  */
 749 static int brcmf_sdbrcm_download_state(dhd_bus_t *bus, bool enter);
 750
 751 static void brcmf_sdbrcm_release(dhd_bus_t *bus);
 752 static void brcmf_sdbrcm_release_malloc(dhd_bus_t *bus);
 753 static void brcmf_sdbrcm_disconnect(void *ptr);
 754 static bool brcmf_sdbrcm_chipmatch(u16 chipid);
 755 static bool brcmf_sdbrcm_probe_attach(dhd_bus_t *bus, void *sdh,
 756                                  void *regsva, u16 devid);
 757 static bool brcmf_sdbrcm_probe_malloc(dhd_bus_t *bus, void *sdh);
 758 static bool brcmf_sdbrcm_probe_init(dhd_bus_t *bus, void *sdh);
 759 static void brcmf_sdbrcm_release_dongle(dhd_bus_t *bus);
 760
 761 static uint brcmf_process_nvram_vars(char *varbuf, uint len);
 762
 763 static void brcmf_sdbrcm_setmemsize(struct dhd_bus *bus, int mem_size);
 764 static int brcmf_sdbrcm_send_buf(dhd_bus_t *bus, u32 addr, uint fn,
 765                                uint flags, u8 *buf, uint nbytes,
 766                                struct sk_buff *pkt, bcmsdh_cmplt_fn_t complete,
 767                                void *handle);
 768
 769 static bool brcmf_sdbrcm_download_firmware(struct dhd_bus *bus, void *sdh);
 770 static int  _brcmf_sdbrcm_download_firmware(struct dhd_bus *bus);
 771
 772 static int
 773 brcmf_sdbrcm_download_code_file(struct dhd_bus *bus, char *image_path);
 774 static int brcmf_sdbrcm_download_nvram(struct dhd_bus *bus);
 775 static void brcmf_sdbrcm_chip_disablecore(struct brcmf_sdio *sdh, u32 corebase);
 776 static int brcmf_sdbrcm_chip_attach(struct dhd_bus *bus, void *regs);
 777 static void brcmf_sdbrcm_chip_resetcore(struct brcmf_sdio *sdh, u32 corebase);
 778 static void brcmf_sdbrcm_sdiod_drive_strength_init(struct dhd_bus *bus,
 779                                         u32 drivestrength);
 780 static void brcmf_sdbrcm_chip_detach(struct dhd_bus *bus);
 781 static void brcmf_sdbrcm_wait_for_event(dhd_pub_t *dhd, bool *lockvar);
 782 static void brcmf_sdbrcm_wait_event_wakeup(dhd_bus_t *bus);
 783
 784 /* Packet free applicable unconditionally for sdio and sdspi.
 785  * Conditional if bufpool was present for gspi bus.
 786  */
 787 static void brcmf_sdbrcm_pktfree2(dhd_bus_t *bus, struct sk_buff *pkt)
 788 {
 789         if ((bus->bus != SPI_BUS) || bus->usebufpool)
 790                 brcmu_pkt_buf_free_skb(pkt);
 791 }
 792
 793 static void brcmf_sdbrcm_setmemsize(struct dhd_bus *bus, int mem_size)
 794 {
 795         s32 min_size = DONGLE_MIN_MEMSIZE;
 796         /* Restrict the memsize to user specified limit */
 797         DHD_ERROR(("user: Restrict the dongle ram size to %d, min %d\n",
 798                 brcmf_dongle_memsize, min_size));
 799         if ((brcmf_dongle_memsize > min_size) &&
 800             (brcmf_dongle_memsize < (s32) bus->orig_ramsize))
 801                 bus->ramsize = brcmf_dongle_memsize;
 802 }
 803
 804 static int brcmf_sdbrcm_set_siaddr_window(dhd_bus_t *bus, u32 address)
 805 {
 806         int err = 0;
 807         brcmf_sdcard_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_SBADDRLOW,
 808                          (address >> 8) & SBSDIO_SBADDRLOW_MASK, &err);
 809         if (!err)
 810                 brcmf_sdcard_cfg_write(bus->sdh, SDIO_FUNC_1,
 811                                  SBSDIO_FUNC1_SBADDRMID,
 812                                  (address >> 16) & SBSDIO_SBADDRMID_MASK, &err);
 813         if (!err)
 814                 brcmf_sdcard_cfg_write(bus->sdh, SDIO_FUNC_1,
 815                                        SBSDIO_FUNC1_SBADDRHIGH,
 816                                        (address >> 24) & SBSDIO_SBADDRHIGH_MASK,
 817                                        &err);
 818         return err;
 819 }
 820
 821 /* Turn backplane clock on or off */
 822 static int brcmf_sdbrcm_htclk(dhd_bus_t *bus, bool on, bool pendok)
 823 {
 824         int err;
 825         u8 clkctl, clkreq, devctl;
 826         struct brcmf_sdio *sdh;
 827
 828         DHD_TRACE(("%s: Enter\n", __func__));
 829
 830         clkctl = 0;
 831         sdh = bus->sdh;
 832
 833         if (on) {
 834                 /* Request HT Avail */
 835                 clkreq =
 836                     bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ;
 837
 838                 if ((bus->ci->chip == BCM4329_CHIP_ID)
 839                     && (bus->ci->chiprev == 0))
 840                         clkreq |= SBSDIO_FORCE_ALP;
 841
 842                 brcmf_sdcard_cfg_write(sdh, SDIO_FUNC_1,
 843                                        SBSDIO_FUNC1_CHIPCLKCSR, clkreq, &err);
 844                 if (err) {
 845                         DHD_ERROR(("%s: HT Avail request error: %d\n",
 846                                    __func__, err));
 847                         return -EBADE;
 848                 }
 849
 850                 if (pendok && ((bus->ci->buscoretype == PCMCIA_CORE_ID)
 851                                && (bus->ci->buscorerev == 9))) {
 852                         u32 dummy, retries;
 853                         R_SDREG(dummy, &bus->regs->clockctlstatus, retries);
 854                 }
 855
 856                 /* Check current status */
 857                 clkctl = brcmf_sdcard_cfg_read(sdh, SDIO_FUNC_1,
 858                                                SBSDIO_FUNC1_CHIPCLKCSR, &err);
 859                 if (err) {
 860                         DHD_ERROR(("%s: HT Avail read error: %d\n",
 861                                    __func__, err));
 862                         return -EBADE;
 863                 }
 864
 865                 /* Go to pending and await interrupt if appropriate */
 866                 if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) {
 867                         /* Allow only clock-available interrupt */
 868                         devctl = brcmf_sdcard_cfg_read(sdh, SDIO_FUNC_1,
 869                                         SBSDIO_DEVICE_CTL, &err);
 870                         if (err) {
 871                                 DHD_ERROR(("%s: Devctl error setting CA: %d\n",
 872                                         __func__, err));
 873                                 return -EBADE;
 874                         }
 875
 876                         devctl |= SBSDIO_DEVCTL_CA_INT_ONLY;
 877                         brcmf_sdcard_cfg_write(sdh, SDIO_FUNC_1,
 878                                                SBSDIO_DEVICE_CTL, devctl, &err);
 879                         DHD_INFO(("CLKCTL: set PENDING\n"));
 880                         bus->clkstate = CLK_PENDING;
 881
 882                         return 0;
 883                 } else if (bus->clkstate == CLK_PENDING) {
 884                         /* Cancel CA-only interrupt filter */
 885                         devctl =
 886                             brcmf_sdcard_cfg_read(sdh, SDIO_FUNC_1,
 887                                                   SBSDIO_DEVICE_CTL, &err);
 888                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
 889                         brcmf_sdcard_cfg_write(sdh, SDIO_FUNC_1,
 890                                 SBSDIO_DEVICE_CTL, devctl, &err);
 891                 }
 892
 893                 /* Otherwise, wait here (polling) for HT Avail */
 894                 if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
 895                         SPINWAIT_SLEEP(sdioh_spinwait_sleep,
 896                                        ((clkctl =
 897                                          brcmf_sdcard_cfg_read(sdh, SDIO_FUNC_1,
 898                                                  SBSDIO_FUNC1_CHIPCLKCSR,
 899                                                          &err)),
 900                                         !SBSDIO_CLKAV(clkctl, bus->alp_only)),
 901                                        PMU_MAX_TRANSITION_DLY);
 902                 }
 903                 if (err) {
 904                         DHD_ERROR(("%s: HT Avail request error: %d\n",
 905                                    __func__, err));
 906                         return -EBADE;
 907                 }
 908                 if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
 909                         DHD_ERROR(("%s: HT Avail timeout (%d): clkctl 0x%02x\n",
 910                                    __func__, PMU_MAX_TRANSITION_DLY, clkctl));
 911                         return -EBADE;
 912                 }
 913
 914                 /* Mark clock available */
 915                 bus->clkstate = CLK_AVAIL;
 916                 DHD_INFO(("CLKCTL: turned ON\n"));
 917
 918 #if defined(BCMDBG)
 919                 if (bus->alp_only != true) {
 920                         if (SBSDIO_ALPONLY(clkctl)) {
 921                                 DHD_ERROR(("%s: HT Clock should be on.\n",
 922                                            __func__));
 923                         }
 924                 }
 925 #endif                          /* defined (BCMDBG) */
 926
 927                 bus->activity = true;
 928         } else {
 929                 clkreq = 0;
 930
 931                 if (bus->clkstate == CLK_PENDING) {
 932                         /* Cancel CA-only interrupt filter */
 933                         devctl = brcmf_sdcard_cfg_read(sdh, SDIO_FUNC_1,
 934                                         SBSDIO_DEVICE_CTL, &err);
 935                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
 936                         brcmf_sdcard_cfg_write(sdh, SDIO_FUNC_1,
 937                                 SBSDIO_DEVICE_CTL, devctl, &err);
 938                 }
 939
 940                 bus->clkstate = CLK_SDONLY;
 941                 brcmf_sdcard_cfg_write(sdh, SDIO_FUNC_1,
 942                         SBSDIO_FUNC1_CHIPCLKCSR, clkreq, &err);
 943                 DHD_INFO(("CLKCTL: turned OFF\n"));
 944                 if (err) {
 945                         DHD_ERROR(("%s: Failed access turning clock off: %d\n",
 946                                    __func__, err));
 947                         return -EBADE;
 948                 }
 949         }
 950         return 0;
 951 }
 952
 953 /* Change idle/active SD state */
 954 static int brcmf_sdbrcm_sdclk(dhd_bus_t *bus, bool on)
 955 {
 956         DHD_TRACE(("%s: Enter\n", __func__));
 957
 958         if (on)
 959                 bus->clkstate = CLK_SDONLY;
 960         else
 961                 bus->clkstate = CLK_NONE;
 962
 963         return 0;
 964 }
 965
 966 /* Transition SD and backplane clock readiness */
 967 static int brcmf_sdbrcm_clkctl(dhd_bus_t *bus, uint target, bool pendok)
 968 {
 969 #ifdef BCMDBG
 970         uint oldstate = bus->clkstate;
 971 #endif                          /* BCMDBG */
 972
 973         DHD_TRACE(("%s: Enter\n", __func__));
 974
 975         /* Early exit if we're already there */
 976         if (bus->clkstate == target) {
 977                 if (target == CLK_AVAIL) {
 978                         brcmf_os_wd_timer(bus->dhd, brcmf_watchdog_ms);
 979                         bus->activity = true;
 980                 }
 981                 return 0;
 982         }
 983
 984         switch (target) {
 985         case CLK_AVAIL:
 986                 /* Make sure SD clock is available */
 987                 if (bus->clkstate == CLK_NONE)
 988                         brcmf_sdbrcm_sdclk(bus, true);
 989                 /* Now request HT Avail on the backplane */
 990                 brcmf_sdbrcm_htclk(bus, true, pendok);
 991                 brcmf_os_wd_timer(bus->dhd, brcmf_watchdog_ms);
 992                 bus->activity = true;
 993                 break;
 994
 995         case CLK_SDONLY:
 996                 /* Remove HT request, or bring up SD clock */
 997                 if (bus->clkstate == CLK_NONE)
 998                         brcmf_sdbrcm_sdclk(bus, true);
 999                 else if (bus->clkstate == CLK_AVAIL)
1000                         brcmf_sdbrcm_htclk(bus, false, false);
1001                 else
1002                         DHD_ERROR(("brcmf_sdbrcm_clkctl: request for %d -> %d"
1003                                    "\n", bus->clkstate, target));
1004                 brcmf_os_wd_timer(bus->dhd, brcmf_watchdog_ms);
1005                 break;
1006
1007         case CLK_NONE:
1008                 /* Make sure to remove HT request */
1009                 if (bus->clkstate == CLK_AVAIL)
1010                         brcmf_sdbrcm_htclk(bus, false, false);
1011                 /* Now remove the SD clock */
1012                 brcmf_sdbrcm_sdclk(bus, false);
1013                 brcmf_os_wd_timer(bus->dhd, 0);
1014                 break;
1015         }
1016 #ifdef BCMDBG
1017         DHD_INFO(("brcmf_sdbrcm_clkctl: %d -> %d\n", oldstate, bus->clkstate));
1018 #endif                          /* BCMDBG */
1019
1020         return 0;
1021 }
1022
1023 int brcmf_sdbrcm_bussleep(dhd_bus_t *bus, bool sleep)
1024 {
1025         struct brcmf_sdio *sdh = bus->sdh;
1026         struct sdpcmd_regs *regs = bus->regs;
1027         uint retries = 0;
1028
1029         DHD_INFO(("brcmf_sdbrcm_bussleep: request %s (currently %s)\n",
1030                   (sleep ? "SLEEP" : "WAKE"),
1031                   (bus->sleeping ? "SLEEP" : "WAKE")));
1032
1033         /* Done if we're already in the requested state */
1034         if (sleep == bus->sleeping)
1035                 return 0;
1036
1037         /* Going to sleep: set the alarm and turn off the lights... */
1038         if (sleep) {
1039                 /* Don't sleep if something is pending */
1040                 if (bus->dpc_sched || bus->rxskip || pktq_len(&bus->txq))
1041                         return -EBUSY;
1042
1043                 /* Disable SDIO interrupts (no longer interested) */
1044                 brcmf_sdcard_intr_disable(bus->sdh);
1045
1046                 /* Make sure the controller has the bus up */
1047                 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
1048
1049                 /* Tell device to start using OOB wakeup */
1050                 W_SDREG(SMB_USE_OOB, &regs->tosbmailbox, retries);
1051                 if (retries > retry_limit)
1052                         DHD_ERROR(("CANNOT SIGNAL CHIP, WILL NOT WAKE UP!!\n"));
1053
1054                 /* Turn off our contribution to the HT clock request */
1055                 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
1056
1057                 brcmf_sdcard_cfg_write(sdh, SDIO_FUNC_1,
1058                         SBSDIO_FUNC1_CHIPCLKCSR,
1059                         SBSDIO_FORCE_HW_CLKREQ_OFF, NULL);
1060
1061                 /* Isolate the bus */
1062                 if (bus->ci->chip != BCM4329_CHIP_ID
1063                     && bus->ci->chip != BCM4319_CHIP_ID) {
1064                         brcmf_sdcard_cfg_write(sdh, SDIO_FUNC_1,
1065                                 SBSDIO_DEVICE_CTL,
1066                                 SBSDIO_DEVCTL_PADS_ISO, NULL);
1067                 }
1068
1069                 /* Change state */
1070                 bus->sleeping = true;
1071
1072         } else {
1073                 /* Waking up: bus power up is ok, set local state */
1074
1075                 brcmf_sdcard_cfg_write(sdh, SDIO_FUNC_1,
1076                         SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
1077
1078                 /* Force pad isolation off if possible
1079                          (in case power never toggled) */
1080                 if ((bus->ci->buscoretype == PCMCIA_CORE_ID)
1081                     && (bus->ci->buscorerev >= 10))
1082                         brcmf_sdcard_cfg_write(sdh, SDIO_FUNC_1,
1083                                 SBSDIO_DEVICE_CTL, 0, NULL);
1084
1085                 /* Make sure the controller has the bus up */
1086                 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
1087
1088                 /* Send misc interrupt to indicate OOB not needed */
1089                 W_SDREG(0, &regs->tosbmailboxdata, retries);
1090                 if (retries <= retry_limit)
1091                         W_SDREG(SMB_DEV_INT, &regs->tosbmailbox, retries);
1092
1093                 if (retries > retry_limit)
1094                         DHD_ERROR(("CANNOT SIGNAL CHIP TO CLEAR OOB!!\n"));
1095
1096                 /* Make sure we have SD bus access */
1097                 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
1098
1099                 /* Change state */
1100                 bus->sleeping = false;
1101
1102                 /* Enable interrupts again */
1103                 if (bus->intr && (bus->dhd->busstate == DHD_BUS_DATA)) {
1104                         bus->intdis = false;
1105                         brcmf_sdcard_intr_enable(bus->sdh);
1106                 }
1107         }
1108
1109         return 0;
1110 }
1111
1112 #define BUS_WAKE(bus) \
1113         do { \
1114                 if ((bus)->sleeping) \
1115                         brcmf_sdbrcm_bussleep((bus), false); \
1116         } while (0);
1117
1118 /* Writes a HW/SW header into the packet and sends it. */
1119 /* Assumes: (a) header space already there, (b) caller holds lock */
1120 static int brcmf_sdbrcm_txpkt(dhd_bus_t *bus, struct sk_buff *pkt, uint chan,
1121                          bool free_pkt)
1122 {
1123         int ret;
1124         u8 *frame;
1125         u16 len, pad = 0;
1126         u32 swheader;
1127         uint retries = 0;
1128         struct brcmf_sdio *sdh;
1129         struct sk_buff *new;
1130         int i;
1131
1132         DHD_TRACE(("%s: Enter\n", __func__));
1133
1134         sdh = bus->sdh;
1135
1136         if (bus->dhd->dongle_reset) {
1137                 ret = -EPERM;
1138                 goto done;
1139         }
1140
1141         frame = (u8 *) (pkt->data);
1142
1143         /* Add alignment padding, allocate new packet if needed */
1144         pad = ((unsigned long)frame % BRCMF_SDALIGN);
1145         if (pad) {
1146                 if (skb_headroom(pkt) < pad) {
1147                         DHD_INFO(("%s: insufficient headroom %d for %d pad\n",
1148                                   __func__, skb_headroom(pkt), pad));
1149                         bus->dhd->tx_realloc++;
1150                         new = brcmu_pkt_buf_get_skb(pkt->len + BRCMF_SDALIGN);
1151                         if (!new) {
1152                                 DHD_ERROR(("%s: couldn't allocate new %d-byte "
1153                                         "packet\n",
1154                                         __func__, pkt->len + BRCMF_SDALIGN));
1155                                 ret = -ENOMEM;
1156                                 goto done;
1157                         }
1158
1159                         PKTALIGN(new, pkt->len, BRCMF_SDALIGN);
1160                         memcpy(new->data, pkt->data, pkt->len);
1161                         if (free_pkt)
1162                                 brcmu_pkt_buf_free_skb(pkt);
1163                         /* free the pkt if canned one is not used */
1164                         free_pkt = true;
1165                         pkt = new;
1166                         frame = (u8 *) (pkt->data);
1167                         ASSERT(((unsigned long)frame % BRCMF_SDALIGN) == 0);
1168                         pad = 0;
1169                 } else {
1170                         skb_push(pkt, pad);
1171                         frame = (u8 *) (pkt->data);
1172
1173                         ASSERT((pad + SDPCM_HDRLEN) <= (int)(pkt->len));
1174                         memset(frame, 0, pad + SDPCM_HDRLEN);
1175                 }
1176         }
1177         ASSERT(pad < BRCMF_SDALIGN);
1178
1179         /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */
1180         len = (u16) (pkt->len);
1181         *(u16 *) frame = cpu_to_le16(len);
1182         *(((u16 *) frame) + 1) = cpu_to_le16(~len);
1183
1184         /* Software tag: channel, sequence number, data offset */
1185         swheader =
1186             ((chan << SDPCM_CHANNEL_SHIFT) & SDPCM_CHANNEL_MASK) | bus->tx_seq |
1187             (((pad +
1188                SDPCM_HDRLEN) << SDPCM_DOFFSET_SHIFT) & SDPCM_DOFFSET_MASK);
1189
1190         put_unaligned_le32(swheader, frame + SDPCM_FRAMETAG_LEN);
1191         put_unaligned_le32(0, frame + SDPCM_FRAMETAG_LEN + sizeof(swheader));
1192
1193 #ifdef BCMDBG
1194         tx_packets[pkt->priority]++;
1195         if (DHD_BYTES_ON() &&
1196             (((DHD_CTL_ON() && (chan == SDPCM_CONTROL_CHANNEL)) ||
1197               (DHD_DATA_ON() && (chan != SDPCM_CONTROL_CHANNEL))))) {
1198                 printk(KERN_DEBUG "Tx Frame:\n");
1199                 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, frame, len);
1200         } else if (DHD_HDRS_ON()) {
1201                 printk(KERN_DEBUG "TxHdr:\n");
1202                 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
1203                                      frame, min_t(u16, len, 16));
1204         }
1205 #endif
1206
1207         /* Raise len to next SDIO block to eliminate tail command */
1208         if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
1209                 u16 pad = bus->blocksize - (len % bus->blocksize);
1210                 if ((pad <= bus->roundup) && (pad < bus->blocksize))
1211                                 len += pad;
1212         } else if (len % BRCMF_SDALIGN) {
1213                 len += BRCMF_SDALIGN - (len % BRCMF_SDALIGN);
1214         }
1215
1216         /* Some controllers have trouble with odd bytes -- round to even */
1217         if (forcealign && (len & (ALIGNMENT - 1))) {
1218                         len = roundup(len, ALIGNMENT);
1219         }
1220
1221         do {
1222                 ret = brcmf_sdbrcm_send_buf(bus, brcmf_sdcard_cur_sbwad(sdh),
1223                         SDIO_FUNC_2, F2SYNC, frame, len, pkt, NULL, NULL);
1224                 bus->f2txdata++;
1225                 ASSERT(ret != -BCME_PENDING);
1226
1227                 if (ret < 0) {
1228                         /* On failure, abort the command
1229                          and terminate the frame */
1230                         DHD_INFO(("%s: sdio error %d, abort command and "
1231                                 "terminate frame.\n", __func__, ret));
1232                         bus->tx_sderrs++;
1233
1234                         brcmf_sdcard_abort(sdh, SDIO_FUNC_2);
1235                         brcmf_sdcard_cfg_write(sdh, SDIO_FUNC_1,
1236                                          SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM,
1237                                          NULL);
1238                         bus->f1regdata++;
1239
1240                         for (i = 0; i < 3; i++) {
1241                                 u8 hi, lo;
1242                                 hi = brcmf_sdcard_cfg_read(sdh, SDIO_FUNC_1,
1243                                                      SBSDIO_FUNC1_WFRAMEBCHI,
1244                                                      NULL);
1245                                 lo = brcmf_sdcard_cfg_read(sdh, SDIO_FUNC_1,
1246                                                      SBSDIO_FUNC1_WFRAMEBCLO,
1247                                                      NULL);
1248                                 bus->f1regdata += 2;
1249                                 if ((hi == 0) && (lo == 0))
1250                                         break;
1251                         }
1252
1253                 }
1254                 if (ret == 0)
1255                         bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
1256
1257         } while ((ret < 0) && retrydata && retries++ < TXRETRIES);
1258
1259 done:
1260         /* restore pkt buffer pointer before calling tx complete routine */
1261         skb_pull(pkt, SDPCM_HDRLEN + pad);
1262         brcmf_os_sdunlock(bus->dhd);
1263         brcmf_txcomplete(bus->dhd, pkt, ret != 0);
1264         brcmf_os_sdlock(bus->dhd);
1265
1266         if (free_pkt)
1267                 brcmu_pkt_buf_free_skb(pkt);
1268
1269         return ret;
1270 }
1271
1272 int brcmf_sdbrcm_bus_txdata(struct dhd_bus *bus, struct sk_buff *pkt)
1273 {
1274         int ret = -EBADE;
1275         uint datalen, prec;
1276
1277         DHD_TRACE(("%s: Enter\n", __func__));
1278
1279         datalen = pkt->len;
1280
1281 #ifdef SDTEST
1282         /* Push the test header if doing loopback */
1283         if (bus->ext_loop) {
1284                 u8 *data;
1285                 skb_push(pkt, SDPCM_TEST_HDRLEN);
1286                 data = pkt->data;
1287                 *data++ = SDPCM_TEST_ECHOREQ;
1288                 *data++ = (u8) bus->loopid++;
1289                 *data++ = (datalen >> 0);
1290                 *data++ = (datalen >> 8);
1291                 datalen += SDPCM_TEST_HDRLEN;
1292         }
1293 #endif                          /* SDTEST */
1294
1295         /* Add space for the header */
1296         skb_push(pkt, SDPCM_HDRLEN);
1297         ASSERT(IS_ALIGNED((unsigned long)(pkt->data), 2));
1298
1299         prec = PRIO2PREC((pkt->priority & PRIOMASK));
1300
1301         /* Check for existing queue, current flow-control,
1302                          pending event, or pending clock */
1303         if (brcmf_deferred_tx || bus->fcstate || pktq_len(&bus->txq)
1304             || bus->dpc_sched || (!DATAOK(bus))
1305             || (bus->flowcontrol & NBITVAL(prec))
1306             || (bus->clkstate != CLK_AVAIL)) {
1307                 DHD_TRACE(("%s: deferring pktq len %d\n", __func__,
1308                            pktq_len(&bus->txq)));
1309                 bus->fcqueued++;
1310
1311                 /* Priority based enq */
1312                 spin_lock_bh(&bus->txqlock);
1313                 if (brcmf_c_prec_enq(bus->dhd, &bus->txq, pkt, prec) == false) {
1314                         skb_pull(pkt, SDPCM_HDRLEN);
1315                         brcmf_txcomplete(bus->dhd, pkt, false);
1316                         brcmu_pkt_buf_free_skb(pkt);
1317                         DHD_ERROR(("%s: out of bus->txq !!!\n", __func__));
1318                         ret = -ENOSR;
1319                 } else {
1320                         ret = 0;
1321                 }
1322                 spin_unlock_bh(&bus->txqlock);
1323
1324                 if (pktq_len(&bus->txq) >= TXHI)
1325                         brcmf_txflowcontrol(bus->dhd, 0, ON);
1326
1327 #ifdef BCMDBG
1328                 if (pktq_plen(&bus->txq, prec) > qcount[prec])
1329                         qcount[prec] = pktq_plen(&bus->txq, prec);
1330 #endif
1331                 /* Schedule DPC if needed to send queued packet(s) */
1332                 if (brcmf_deferred_tx && !bus->dpc_sched) {
1333                         bus->dpc_sched = true;
1334                         brcmf_sched_dpc(bus->dhd);
1335                 }
1336         } else {
1337                 /* Lock: we're about to use shared data/code (and SDIO) */
1338                 brcmf_os_sdlock(bus->dhd);
1339
1340                 /* Otherwise, send it now */
1341                 BUS_WAKE(bus);
1342                 /* Make sure back plane ht clk is on, no pending allowed */
1343                 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, true);
1344
1345 #ifndef SDTEST
1346                 DHD_TRACE(("%s: calling txpkt\n", __func__));
1347                 ret = brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_DATA_CHANNEL, true);
1348 #else
1349                 ret = brcmf_sdbrcm_txpkt(bus, pkt,
1350                                     (bus->ext_loop ? SDPCM_TEST_CHANNEL :
1351                                      SDPCM_DATA_CHANNEL), true);
1352 #endif
1353                 if (ret)
1354                         bus->dhd->tx_errors++;
1355                 else
1356                         bus->dhd->dstats.tx_bytes += datalen;
1357
1358                 if ((bus->idletime == DHD_IDLE_IMMEDIATE) && !bus->dpc_sched) {
1359                         bus->activity = false;
1360                         brcmf_sdbrcm_clkctl(bus, CLK_NONE, true);
1361                 }
1362
1363                 brcmf_os_sdunlock(bus->dhd);
1364         }
1365
1366         return ret;
1367 }
1368
1369 static uint brcmf_sdbrcm_sendfromq(dhd_bus_t *bus, uint maxframes)
1370 {
1371         struct sk_buff *pkt;
1372         u32 intstatus = 0;
1373         uint retries = 0;
1374         int ret = 0, prec_out;
1375         uint cnt = 0;
1376         uint datalen;
1377         u8 tx_prec_map;
1378
1379         dhd_pub_t *dhd = bus->dhd;
1380         struct sdpcmd_regs *regs = bus->regs;
1381
1382         DHD_TRACE(("%s: Enter\n", __func__));
1383
1384         tx_prec_map = ~bus->flowcontrol;
1385
1386         /* Send frames until the limit or some other event */
1387         for (cnt = 0; (cnt < maxframes) && DATAOK(bus); cnt++) {
1388                 spin_lock_bh(&bus->txqlock);
1389                 pkt = brcmu_pktq_mdeq(&bus->txq, tx_prec_map, &prec_out);
1390                 if (pkt == NULL) {
1391                         spin_unlock_bh(&bus->txqlock);
1392                         break;
1393                 }
1394                 spin_unlock_bh(&bus->txqlock);
1395                 datalen = pkt->len - SDPCM_HDRLEN;
1396
1397 #ifndef SDTEST
1398                 ret = brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_DATA_CHANNEL, true);
1399 #else
1400                 ret = brcmf_sdbrcm_txpkt(bus, pkt,
1401                                     (bus->ext_loop ? SDPCM_TEST_CHANNEL :
1402                                      SDPCM_DATA_CHANNEL), true);
1403 #endif
1404                 if (ret)
1405                         bus->dhd->tx_errors++;
1406                 else
1407                         bus->dhd->dstats.tx_bytes += datalen;
1408
1409                 /* In poll mode, need to check for other events */
1410                 if (!bus->intr && cnt) {
1411                         /* Check device status, signal pending interrupt */
1412                         R_SDREG(intstatus, &regs->intstatus, retries);
1413                         bus->f2txdata++;
1414                         if (brcmf_sdcard_regfail(bus->sdh))
1415                                 break;
1416                         if (intstatus & bus->hostintmask)
1417                                 bus->ipend = true;
1418                 }
1419         }
1420
1421         /* Deflow-control stack if needed */
1422         if (dhd->up && (dhd->busstate == DHD_BUS_DATA) &&
1423             dhd->txoff && (pktq_len(&bus->txq) < TXLOW))
1424                 brcmf_txflowcontrol(dhd, 0, OFF);
1425
1426         return cnt;
1427 }
1428
1429 int
1430 brcmf_sdbrcm_bus_txctl(struct dhd_bus *bus, unsigned char *msg, uint msglen)
1431 {
1432         u8 *frame;
1433         u16 len;
1434         u32 swheader;
1435         uint retries = 0;
1436         struct brcmf_sdio *sdh = bus->sdh;
1437         u8 doff = 0;
1438         int ret = -1;
1439         int i;
1440
1441         DHD_TRACE(("%s: Enter\n", __func__));
1442
1443         if (bus->dhd->dongle_reset)
1444                 return -EIO;
1445
1446         /* Back the pointer to make a room for bus header */
1447         frame = msg - SDPCM_HDRLEN;
1448         len = (msglen += SDPCM_HDRLEN);
1449
1450         /* Add alignment padding (optional for ctl frames) */
1451         if (dhd_alignctl) {
1452                 doff = ((unsigned long)frame % BRCMF_SDALIGN);
1453                 if (doff) {
1454                         frame -= doff;
1455                         len += doff;
1456                         msglen += doff;
1457                         memset(frame, 0, doff + SDPCM_HDRLEN);
1458                 }
1459                 ASSERT(doff < BRCMF_SDALIGN);
1460         }
1461         doff += SDPCM_HDRLEN;
1462
1463         /* Round send length to next SDIO block */
1464         if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
1465                 u16 pad = bus->blocksize - (len % bus->blocksize);
1466                 if ((pad <= bus->roundup) && (pad < bus->blocksize))
1467                         len += pad;
1468         } else if (len % BRCMF_SDALIGN) {
1469                 len += BRCMF_SDALIGN - (len % BRCMF_SDALIGN);
1470         }
1471
1472         /* Satisfy length-alignment requirements */
1473         if (forcealign && (len & (ALIGNMENT - 1)))
1474                 len = roundup(len, ALIGNMENT);
1475
1476         ASSERT(IS_ALIGNED((unsigned long)frame, 2));
1477
1478         /* Need to lock here to protect txseq and SDIO tx calls */
1479         brcmf_os_sdlock(bus->dhd);
1480
1481         BUS_WAKE(bus);
1482
1483         /* Make sure backplane clock is on */
1484         brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
1485
1486         /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */
1487         *(u16 *) frame = cpu_to_le16((u16) msglen);
1488         *(((u16 *) frame) + 1) = cpu_to_le16(~msglen);
1489
1490         /* Software tag: channel, sequence number, data offset */
1491         swheader =
1492             ((SDPCM_CONTROL_CHANNEL << SDPCM_CHANNEL_SHIFT) &
1493              SDPCM_CHANNEL_MASK)
1494             | bus->tx_seq | ((doff << SDPCM_DOFFSET_SHIFT) &
1495                              SDPCM_DOFFSET_MASK);
1496         put_unaligned_le32(swheader, frame + SDPCM_FRAMETAG_LEN);
1497         put_unaligned_le32(0, frame + SDPCM_FRAMETAG_LEN + sizeof(swheader));
1498
1499         if (!DATAOK(bus)) {
1500                 DHD_INFO(("%s: No bus credit bus->tx_max %d, bus->tx_seq %d\n",
1501                           __func__, bus->tx_max, bus->tx_seq));
1502                 bus->ctrl_frame_stat = true;
1503                 /* Send from dpc */
1504                 bus->ctrl_frame_buf = frame;
1505                 bus->ctrl_frame_len = len;
1506
1507                 brcmf_sdbrcm_wait_for_event(bus->dhd, &bus->ctrl_frame_stat);
1508
1509                 if (bus->ctrl_frame_stat == false) {
1510                         DHD_INFO(("%s: ctrl_frame_stat == false\n", __func__));
1511                         ret = 0;
1512                 } else {
1513                         DHD_INFO(("%s: ctrl_frame_stat == true\n", __func__));
1514                         ret = -1;
1515                 }
1516         }
1517
1518         if (ret == -1) {
1519 #ifdef BCMDBG
1520                 if (DHD_BYTES_ON() && DHD_CTL_ON()) {
1521                         printk(KERN_DEBUG "Tx Frame:\n");
1522                         print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
1523                                              frame, len);
1524                 } else if (DHD_HDRS_ON()) {
1525                         printk(KERN_DEBUG "TxHdr:\n");
1526                         print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
1527                                              frame, min_t(u16, len, 16));
1528                 }
1529 #endif
1530
1531                 do {
1532                         bus->ctrl_frame_stat = false;
1533                         ret = brcmf_sdbrcm_send_buf(bus,
1534                                 brcmf_sdcard_cur_sbwad(sdh), SDIO_FUNC_2,
1535                                 F2SYNC, frame, len, NULL, NULL, NULL);
1536
1537                         ASSERT(ret != -BCME_PENDING);
1538
1539                         if (ret < 0) {
1540                                 /* On failure, abort the command and
1541                                  terminate the frame */
1542                                 DHD_INFO(("%s: sdio error %d, abort command and terminate frame.\n",
1543                                         __func__, ret));
1544                                 bus->tx_sderrs++;
1545
1546                                 brcmf_sdcard_abort(sdh, SDIO_FUNC_2);
1547
1548                                 brcmf_sdcard_cfg_write(sdh, SDIO_FUNC_1,
1549                                                  SBSDIO_FUNC1_FRAMECTRL,
1550                                                  SFC_WF_TERM, NULL);
1551                                 bus->f1regdata++;
1552
1553                                 for (i = 0; i < 3; i++) {
1554                                         u8 hi, lo;
1555                                         hi = brcmf_sdcard_cfg_read(sdh,
1556                                              SDIO_FUNC_1,
1557                                              SBSDIO_FUNC1_WFRAMEBCHI,
1558                                              NULL);
1559                                         lo = brcmf_sdcard_cfg_read(sdh,
1560                                              SDIO_FUNC_1,
1561                                              SBSDIO_FUNC1_WFRAMEBCLO,
1562                                              NULL);
1563                                         bus->f1regdata += 2;
1564                                         if ((hi == 0) && (lo == 0))
1565                                                 break;
1566                                 }
1567
1568                         }
1569                         if (ret == 0) {
1570                                 bus->tx_seq =
1571                                     (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
1572                         }
1573                 } while ((ret < 0) && retries++ < TXRETRIES);
1574         }
1575
1576         if ((bus->idletime == DHD_IDLE_IMMEDIATE) && !bus->dpc_sched) {
1577                 bus->activity = false;
1578                 brcmf_sdbrcm_clkctl(bus, CLK_NONE, true);
1579         }
1580
1581         brcmf_os_sdunlock(bus->dhd);
1582
1583         if (ret)
1584                 bus->dhd->tx_ctlerrs++;
1585         else
1586                 bus->dhd->tx_ctlpkts++;
1587
1588         return ret ? -EIO : 0;
1589 }
1590
1591 int brcmf_sdbrcm_bus_rxctl(struct dhd_bus *bus, unsigned char *msg, uint msglen)
1592 {
1593         int timeleft;
1594         uint rxlen = 0;
1595         bool pending;
1596
1597         DHD_TRACE(("%s: Enter\n", __func__));
1598
1599         if (bus->dhd->dongle_reset)
1600                 return -EIO;
1601
1602         /* Wait until control frame is available */
1603         timeleft = brcmf_os_ioctl_resp_wait(bus->dhd, &bus->rxlen, &pending);
1604
1605         brcmf_os_sdlock(bus->dhd);
1606         rxlen = bus->rxlen;
1607         memcpy(msg, bus->rxctl, min(msglen, rxlen));
1608         bus->rxlen = 0;
1609         brcmf_os_sdunlock(bus->dhd);
1610
1611         if (rxlen) {
1612                 DHD_CTL(("%s: resumed on rxctl frame, got %d expected %d\n",
1613                          __func__, rxlen, msglen));
1614         } else if (timeleft == 0) {
1615                 DHD_ERROR(("%s: resumed on timeout\n", __func__));
1616 #ifdef BCMDBG
1617                 brcmf_os_sdlock(bus->dhd);
1618                 brcmf_sdbrcm_checkdied(bus, NULL, 0);
1619                 brcmf_os_sdunlock(bus->dhd);
1620 #endif                          /* BCMDBG */
1621         } else if (pending == true) {
1622                 DHD_CTL(("%s: cancelled\n", __func__));
1623                 return -ERESTARTSYS;
1624         } else {
1625                 DHD_CTL(("%s: resumed for unknown reason?\n", __func__));
1626 #ifdef BCMDBG
1627                 brcmf_os_sdlock(bus->dhd);
1628                 brcmf_sdbrcm_checkdied(bus, NULL, 0);
1629                 brcmf_os_sdunlock(bus->dhd);
1630 #endif                          /* BCMDBG */
1631         }
1632
1633         if (rxlen)
1634                 bus->dhd->rx_ctlpkts++;
1635         else
1636                 bus->dhd->rx_ctlerrs++;
1637
1638         return rxlen ? (int)rxlen : -ETIMEDOUT;
1639 }
1640
1641 /* IOVar table */
1642 enum {
1643         IOV_INTR = 1,
1644         IOV_POLLRATE,
1645         IOV_SDREG,
1646         IOV_SBREG,
1647         IOV_SDCIS,
1648         IOV_MEMBYTES,
1649         IOV_MEMSIZE,
1650 #ifdef BCMDBG
1651         IOV_CHECKDIED,
1652 #endif
1653         IOV_DOWNLOAD,
1654         IOV_FORCEEVEN,
1655         IOV_SDIOD_DRIVE,
1656         IOV_READAHEAD,
1657         IOV_SDRXCHAIN,
1658         IOV_ALIGNCTL,
1659         IOV_SDALIGN,
1660         IOV_DEVRESET,
1661         IOV_CPU,
1662 #ifdef SDTEST
1663         IOV_PKTGEN,
1664         IOV_EXTLOOP,
1665 #endif                          /* SDTEST */
1666         IOV_SPROM,
1667         IOV_TXBOUND,
1668         IOV_RXBOUND,
1669         IOV_TXMINMAX,
1670         IOV_IDLETIME,
1671         IOV_IDLECLOCK,
1672         IOV_SD1IDLE,
1673         IOV_SLEEP,
1674         IOV_VARS
1675 };
1676
1677 const struct brcmu_iovar dhdsdio_iovars[] = {
1678         {"intr", IOV_INTR, 0, IOVT_BOOL, 0},
1679         {"sleep", IOV_SLEEP, 0, IOVT_BOOL, 0},
1680         {"pollrate", IOV_POLLRATE, 0, IOVT_UINT32, 0},
1681         {"idletime", IOV_IDLETIME, 0, IOVT_INT32, 0},
1682         {"idleclock", IOV_IDLECLOCK, 0, IOVT_INT32, 0},
1683         {"sd1idle", IOV_SD1IDLE, 0, IOVT_BOOL, 0},
1684         {"membytes", IOV_MEMBYTES, 0, IOVT_BUFFER, 2 * sizeof(int)},
1685         {"memsize", IOV_MEMSIZE, 0, IOVT_UINT32, 0},
1686         {"download", IOV_DOWNLOAD, 0, IOVT_BOOL, 0},
1687         {"vars", IOV_VARS, 0, IOVT_BUFFER, 0},
1688         {"sdiod_drive", IOV_SDIOD_DRIVE, 0, IOVT_UINT32, 0},
1689         {"readahead", IOV_READAHEAD, 0, IOVT_BOOL, 0},
1690         {"sdrxchain", IOV_SDRXCHAIN, 0, IOVT_BOOL, 0},
1691         {"alignctl", IOV_ALIGNCTL, 0, IOVT_BOOL, 0},
1692         {"sdalign", IOV_SDALIGN, 0, IOVT_BOOL, 0},
1693         {"devreset", IOV_DEVRESET, 0, IOVT_BOOL, 0},
1694 #ifdef BCMDBG
1695         {"sdreg", IOV_SDREG, 0, IOVT_BUFFER, sizeof(struct brcmf_sdreg)}
1696         ,
1697         {"sbreg", IOV_SBREG, 0, IOVT_BUFFER, sizeof(struct brcmf_sdreg)}
1698         ,
1699         {"sd_cis", IOV_SDCIS, 0, IOVT_BUFFER, DHD_IOCTL_MAXLEN}
1700         ,
1701         {"forcealign", IOV_FORCEEVEN, 0, IOVT_BOOL, 0}
1702         ,
1703         {"txbound", IOV_TXBOUND, 0, IOVT_UINT32, 0}
1704         ,
1705         {"rxbound", IOV_RXBOUND, 0, IOVT_UINT32, 0}
1706         ,
1707         {"txminmax", IOV_TXMINMAX, 0, IOVT_UINT32, 0}
1708         ,
1709         {"cpu", IOV_CPU, 0, IOVT_BOOL, 0}
1710         ,
1711         {"checkdied", IOV_CHECKDIED, 0, IOVT_BUFFER, 0}
1712         ,
1713 #endif                          /* BCMDBG */
1714 #ifdef SDTEST
1715         {"extloop", IOV_EXTLOOP, 0, IOVT_BOOL, 0}
1716         ,
1717         {"pktgen", IOV_PKTGEN, 0, IOVT_BUFFER, sizeof(brcmf_pktgen_t)}
1718         ,
1719 #endif                          /* SDTEST */
1720
1721         {NULL, 0, 0, 0, 0}
1722 };
1723
1724 static void
1725 dhd_dump_pct(struct brcmu_strbuf *strbuf, char *desc, uint num, uint div)
1726 {
1727         uint q1, q2;
1728
1729         if (!div) {
1730                 brcmu_bprintf(strbuf, "%s N/A", desc);
1731         } else {
1732                 q1 = num / div;
1733                 q2 = (100 * (num - (q1 * div))) / div;
1734                 brcmu_bprintf(strbuf, "%s %d.%02d", desc, q1, q2);
1735         }
1736 }
1737
1738 void brcmf_sdbrcm_bus_dump(dhd_pub_t *dhdp, struct brcmu_strbuf *strbuf)
1739 {
1740         dhd_bus_t *bus = dhdp->bus;
1741
1742         brcmu_bprintf(strbuf, "Bus SDIO structure:\n");
1743         brcmu_bprintf(strbuf,
1744                     "hostintmask 0x%08x intstatus 0x%08x sdpcm_ver %d\n",
1745                     bus->hostintmask, bus->intstatus, bus->sdpcm_ver);
1746         brcmu_bprintf(strbuf,
1747                     "fcstate %d qlen %d tx_seq %d, max %d, rxskip %d rxlen %d rx_seq %d\n",
1748                     bus->fcstate, pktq_len(&bus->txq), bus->tx_seq, bus->tx_max,
1749                     bus->rxskip, bus->rxlen, bus->rx_seq);
1750         brcmu_bprintf(strbuf, "intr %d intrcount %d lastintrs %d spurious %d\n",
1751                     bus->intr, bus->intrcount, bus->lastintrs, bus->spurious);
1752         brcmu_bprintf(strbuf, "pollrate %d pollcnt %d regfails %d\n",
1753                     bus->pollrate, bus->pollcnt, bus->regfails);
1754
1755         brcmu_bprintf(strbuf, "\nAdditional counters:\n");
1756         brcmu_bprintf(strbuf,
1757                     "tx_sderrs %d fcqueued %d rxrtx %d rx_toolong %d rxc_errors %d\n",
1758                     bus->tx_sderrs, bus->fcqueued, bus->rxrtx, bus->rx_toolong,
1759                     bus->rxc_errors);
1760         brcmu_bprintf(strbuf, "rx_hdrfail %d badhdr %d badseq %d\n",
1761                     bus->rx_hdrfail, bus->rx_badhdr, bus->rx_badseq);
1762         brcmu_bprintf(strbuf, "fc_rcvd %d, fc_xoff %d, fc_xon %d\n",
1763                       bus->fc_rcvd, bus->fc_xoff, bus->fc_xon);
1764         brcmu_bprintf(strbuf, "rxglomfail %d, rxglomframes %d, rxglompkts %d\n",
1765                     bus->rxglomfail, bus->rxglomframes, bus->rxglompkts);
1766         brcmu_bprintf(strbuf, "f2rx (hdrs/data) %d (%d/%d), f2tx %d f1regs"
1767                       " %d\n",
1768                       (bus->f2rxhdrs + bus->f2rxdata), bus->f2rxhdrs,
1769                       bus->f2rxdata, bus->f2txdata, bus->f1regdata);
1770         {
1771                 dhd_dump_pct(strbuf, "\nRx: pkts/f2rd", bus->dhd->rx_packets,
1772                              (bus->f2rxhdrs + bus->f2rxdata));
1773                 dhd_dump_pct(strbuf, ", pkts/f1sd", bus->dhd->rx_packets,
1774                              bus->f1regdata);
1775                 dhd_dump_pct(strbuf, ", pkts/sd", bus->dhd->rx_packets,
1776                              (bus->f2rxhdrs + bus->f2rxdata + bus->f1regdata));
1777                 dhd_dump_pct(strbuf, ", pkts/int", bus->dhd->rx_packets,
1778                              bus->intrcount);
1779                 brcmu_bprintf(strbuf, "\n");
1780
1781                 dhd_dump_pct(strbuf, "Rx: glom pct", (100 * bus->rxglompkts),
1782                              bus->dhd->rx_packets);
1783                 dhd_dump_pct(strbuf, ", pkts/glom", bus->rxglompkts,
1784                              bus->rxglomframes);
1785                 brcmu_bprintf(strbuf, "\n");
1786
1787                 dhd_dump_pct(strbuf, "Tx: pkts/f2wr", bus->dhd->tx_packets,
1788                              bus->f2txdata);
1789                 dhd_dump_pct(strbuf, ", pkts/f1sd", bus->dhd->tx_packets,
1790                              bus->f1regdata);
1791                 dhd_dump_pct(strbuf, ", pkts/sd", bus->dhd->tx_packets,
1792                              (bus->f2txdata + bus->f1regdata));
1793                 dhd_dump_pct(strbuf, ", pkts/int", bus->dhd->tx_packets,
1794                              bus->intrcount);
1795                 brcmu_bprintf(strbuf, "\n");
1796
1797                 dhd_dump_pct(strbuf, "Total: pkts/f2rw",
1798                              (bus->dhd->tx_packets + bus->dhd->rx_packets),
1799                              (bus->f2txdata + bus->f2rxhdrs + bus->f2rxdata));
1800                 dhd_dump_pct(strbuf, ", pkts/f1sd",
1801                              (bus->dhd->tx_packets + bus->dhd->rx_packets),
1802                              bus->f1regdata);
1803                 dhd_dump_pct(strbuf, ", pkts/sd",
1804                              (bus->dhd->tx_packets + bus->dhd->rx_packets),
1805                              (bus->f2txdata + bus->f2rxhdrs + bus->f2rxdata +
1806                               bus->f1regdata));
1807                 dhd_dump_pct(strbuf, ", pkts/int",
1808                              (bus->dhd->tx_packets + bus->dhd->rx_packets),
1809                              bus->intrcount);
1810                 brcmu_bprintf(strbuf, "\n\n");
1811         }
1812
1813 #ifdef SDTEST
1814         if (bus->pktgen_count) {
1815                 brcmu_bprintf(strbuf, "pktgen config and count:\n");
1816                 brcmu_bprintf(strbuf,
1817                             "freq %d count %d print %d total %d min %d len %d\n",
1818                             bus->pktgen_freq, bus->pktgen_count,
1819                             bus->pktgen_print, bus->pktgen_total,
1820                             bus->pktgen_minlen, bus->pktgen_maxlen);
1821                 brcmu_bprintf(strbuf, "send attempts %d rcvd %d fail %d\n",
1822                             bus->pktgen_sent, bus->pktgen_rcvd,
1823                             bus->pktgen_fail);
1824         }
1825 #endif                          /* SDTEST */
1826 #ifdef BCMDBG
1827         brcmu_bprintf(strbuf, "dpc_sched %d host interrupt%spending\n",
1828                     bus->dpc_sched,
1829                     (brcmf_sdcard_intr_pending(bus->sdh) ? " " : " not "));
1830         brcmu_bprintf(strbuf, "blocksize %d roundup %d\n", bus->blocksize,
1831                     bus->roundup);
1832 #endif                          /* BCMDBG */
1833         brcmu_bprintf(strbuf,
1834                     "clkstate %d activity %d idletime %d idlecount %d sleeping %d\n",
1835                     bus->clkstate, bus->activity, bus->idletime, bus->idlecount,
1836                     bus->sleeping);
1837 }
1838
1839 void dhd_bus_clearcounts(dhd_pub_t *dhdp)
1840 {
1841         dhd_bus_t *bus = (dhd_bus_t *) dhdp->bus;
1842
1843         bus->intrcount = bus->lastintrs = bus->spurious = bus->regfails = 0;
1844         bus->rxrtx = bus->rx_toolong = bus->rxc_errors = 0;
1845         bus->rx_hdrfail = bus->rx_badhdr = bus->rx_badseq = 0;
1846         bus->tx_sderrs = bus->fc_rcvd = bus->fc_xoff = bus->fc_xon = 0;
1847         bus->rxglomfail = bus->rxglomframes = bus->rxglompkts = 0;
1848         bus->f2rxhdrs = bus->f2rxdata = bus->f2txdata = bus->f1regdata = 0;
1849 }
1850
1851 #ifdef SDTEST
1852 static int brcmf_sdbrcm_pktgen_get(dhd_bus_t *bus, u8 *arg)
1853 {
1854         brcmf_pktgen_t pktgen;
1855
1856         pktgen.version = DHD_PKTGEN_VERSION;
1857         pktgen.freq = bus->pktgen_freq;
1858         pktgen.count = bus->pktgen_count;
1859         pktgen.print = bus->pktgen_print;
1860         pktgen.total = bus->pktgen_total;
1861         pktgen.minlen = bus->pktgen_minlen;
1862         pktgen.maxlen = bus->pktgen_maxlen;
1863         pktgen.numsent = bus->pktgen_sent;
1864         pktgen.numrcvd = bus->pktgen_rcvd;
1865         pktgen.numfail = bus->pktgen_fail;
1866         pktgen.mode = bus->pktgen_mode;
1867         pktgen.stop = bus->pktgen_stop;
1868
1869         memcpy(arg, &pktgen, sizeof(pktgen));
1870
1871         return 0;
1872 }
1873
1874 static int brcmf_sdbrcm_pktgen_set(dhd_bus_t *bus, u8 *arg)
1875 {
1876         brcmf_pktgen_t pktgen;
1877         uint oldcnt, oldmode;
1878
1879         memcpy(&pktgen, arg, sizeof(pktgen));
1880         if (pktgen.version != DHD_PKTGEN_VERSION)
1881                 return -EINVAL;
1882
1883         oldcnt = bus->pktgen_count;
1884         oldmode = bus->pktgen_mode;
1885
1886         bus->pktgen_freq = pktgen.freq;
1887         bus->pktgen_count = pktgen.count;
1888         bus->pktgen_print = pktgen.print;
1889         bus->pktgen_total = pktgen.total;
1890         bus->pktgen_minlen = pktgen.minlen;
1891         bus->pktgen_maxlen = pktgen.maxlen;
1892         bus->pktgen_mode = pktgen.mode;
1893         bus->pktgen_stop = pktgen.stop;
1894
1895         bus->pktgen_tick = bus->pktgen_ptick = 0;
1896         bus->pktgen_len = max(bus->pktgen_len, bus->pktgen_minlen);
1897         bus->pktgen_len = min(bus->pktgen_len, bus->pktgen_maxlen);
1898
1899         /* Clear counts for a new pktgen (mode change, or was stopped) */
1900         if (bus->pktgen_count && (!oldcnt || oldmode != bus->pktgen_mode))
1901                 bus->pktgen_sent = bus->pktgen_rcvd = bus->pktgen_fail = 0;
1902
1903         return 0;
1904 }
1905 #endif                          /* SDTEST */
1906
1907 static int
1908 brcmf_sdbrcm_membytes(dhd_bus_t *bus, bool write, u32 address, u8 *data,
1909                  uint size)
1910 {
1911         int bcmerror = 0;
1912         u32 sdaddr;
1913         uint dsize;
1914
1915         /* Determine initial transfer parameters */
1916         sdaddr = address & SBSDIO_SB_OFT_ADDR_MASK;
1917         if ((sdaddr + size) & SBSDIO_SBWINDOW_MASK)
1918                 dsize = (SBSDIO_SB_OFT_ADDR_LIMIT - sdaddr);
1919         else
1920                 dsize = size;
1921
1922         /* Set the backplane window to include the start address */
1923         bcmerror = brcmf_sdbrcm_set_siaddr_window(bus, address);
1924         if (bcmerror) {
1925                 DHD_ERROR(("%s: window change failed\n", __func__));
1926                 goto xfer_done;
1927         }
1928
1929         /* Do the transfer(s) */
1930         while (size) {
1931                 DHD_INFO(("%s: %s %d bytes at offset 0x%08x in window 0x%08x\n",
1932                           __func__, (write ? "write" : "read"), dsize,
1933                           sdaddr, (address & SBSDIO_SBWINDOW_MASK)));
1934                 bcmerror =
1935                      brcmf_sdcard_rwdata(bus->sdh, write, sdaddr, data, dsize);
1936                 if (bcmerror) {
1937                         DHD_ERROR(("%s: membytes transfer failed\n", __func__));
1938                         break;
1939                 }
1940
1941                 /* Adjust for next transfer (if any) */
1942                 size -= dsize;
1943                 if (size) {
1944                         data += dsize;
1945                         address += dsize;
1946                         bcmerror = brcmf_sdbrcm_set_siaddr_window(bus, address);
1947                         if (bcmerror) {
1948                                 DHD_ERROR(("%s: window change failed\n",
1949                                            __func__));
1950                                 break;
1951                         }
1952                         sdaddr = 0;
1953                         dsize = min_t(uint, SBSDIO_SB_OFT_ADDR_LIMIT, size);
1954                 }
1955         }
1956
1957 xfer_done:
1958         /* Return the window to backplane enumeration space for core access */
1959         if (brcmf_sdbrcm_set_siaddr_window(bus,
1960                                            brcmf_sdcard_cur_sbwad(bus->sdh))) {
1961                 DHD_ERROR(("%s: FAILED to set window back to 0x%x\n",
1962                            __func__, brcmf_sdcard_cur_sbwad(bus->sdh)));
1963         }
1964
1965         return bcmerror;
1966 }
1967
1968 #ifdef BCMDBG
1969 static int brcmf_sdbrcm_readshared(dhd_bus_t *bus, struct sdpcm_shared *sh)
1970 {
1971         u32 addr;
1972         int rv;
1973
1974         /* Read last word in memory to determine address of
1975                          sdpcm_shared structure */
1976         rv = brcmf_sdbrcm_membytes(bus, false, bus->ramsize - 4, (u8 *)&addr,
1977                                    4);
1978         if (rv < 0)
1979                 return rv;
1980
1981         addr = le32_to_cpu(addr);
1982
1983         DHD_INFO(("sdpcm_shared address 0x%08X\n", addr));
1984
1985         /*
1986          * Check if addr is valid.
1987          * NVRAM length at the end of memory should have been overwritten.
1988          */
1989         if (addr == 0 || ((~addr >> 16) & 0xffff) == (addr & 0xffff)) {
1990                 DHD_ERROR(("%s: address (0x%08x) of sdpcm_shared invalid\n",
1991                            __func__, addr));
1992                 return -EBADE;
1993         }
1994
1995         /* Read rte_shared structure */
1996         rv = brcmf_sdbrcm_membytes(bus, false, addr, (u8 *) sh,
1997                               sizeof(struct sdpcm_shared));
1998         if (rv < 0)
1999                 return rv;
2000
2001         /* Endianness */
2002         sh->flags = le32_to_cpu(sh->flags);
2003         sh->trap_addr = le32_to_cpu(sh->trap_addr);
2004         sh->assert_exp_addr = le32_to_cpu(sh->assert_exp_addr);
2005         sh->assert_file_addr = le32_to_cpu(sh->assert_file_addr);
2006         sh->assert_line = le32_to_cpu(sh->assert_line);
2007         sh->console_addr = le32_to_cpu(sh->console_addr);
2008         sh->msgtrace_addr = le32_to_cpu(sh->msgtrace_addr);
2009
2010         if ((sh->flags & SDPCM_SHARED_VERSION_MASK) != SDPCM_SHARED_VERSION) {
2011                 DHD_ERROR(("%s: sdpcm_shared version %d in dhd "
2012                            "is different than sdpcm_shared version %d in dongle\n",
2013                            __func__, SDPCM_SHARED_VERSION,
2014                            sh->flags & SDPCM_SHARED_VERSION_MASK));
2015                 return -EBADE;
2016         }
2017
2018         return 0;
2019 }
2020
2021 static int brcmf_sdbrcm_checkdied(dhd_bus_t *bus, u8 *data, uint size)
2022 {
2023         int bcmerror = 0;
2024         uint msize = 512;
2025         char *mbuffer = NULL;
2026         uint maxstrlen = 256;
2027         char *str = NULL;
2028         struct brcmf_trap tr;
2029         struct sdpcm_shared sdpcm_shared;
2030         struct brcmu_strbuf strbuf;
2031
2032         DHD_TRACE(("%s: Enter\n", __func__));
2033
2034         if (data == NULL) {
2035                 /*
2036                  * Called after a rx ctrl timeout. "data" is NULL.
2037                  * allocate memory to trace the trap or assert.
2038                  */
2039                 size = msize;
2040                 mbuffer = data = kmalloc(msize, GFP_ATOMIC);
2041                 if (mbuffer == NULL) {
2042                         DHD_ERROR(("%s: kmalloc(%d) failed\n", __func__,
2043                                    msize));
2044                         bcmerror = -ENOMEM;
2045                         goto done;
2046                 }
2047         }
2048
2049         str = kmalloc(maxstrlen, GFP_ATOMIC);
2050         if (str == NULL) {
2051                 DHD_ERROR(("%s: kmalloc(%d) failed\n", __func__, maxstrlen));
2052                 bcmerror = -ENOMEM;
2053                 goto done;
2054         }
2055
2056         bcmerror = brcmf_sdbrcm_readshared(bus, &sdpcm_shared);
2057         if (bcmerror < 0)
2058                 goto done;
2059
2060         brcmu_binit(&strbuf, data, size);
2061
2062         brcmu_bprintf(&strbuf,
2063                     "msgtrace address : 0x%08X\nconsole address  : 0x%08X\n",
2064                     sdpcm_shared.msgtrace_addr, sdpcm_shared.console_addr);
2065
2066         if ((sdpcm_shared.flags & SDPCM_SHARED_ASSERT_BUILT) == 0) {
2067                 /* NOTE: Misspelled assert is intentional - DO NOT FIX.
2068                  * (Avoids conflict with real asserts for programmatic
2069                  * parsing of output.)
2070                  */
2071                 brcmu_bprintf(&strbuf, "Assrt not built in dongle\n");
2072         }
2073
2074         if ((sdpcm_shared.flags & (SDPCM_SHARED_ASSERT | SDPCM_SHARED_TRAP)) ==
2075             0) {
2076                 /* NOTE: Misspelled assert is intentional - DO NOT FIX.
2077                  * (Avoids conflict with real asserts for programmatic
2078                  * parsing of output.)
2079                  */
2080                 brcmu_bprintf(&strbuf, "No trap%s in dongle",
2081                             (sdpcm_shared.flags & SDPCM_SHARED_ASSERT_BUILT)
2082                             ? "/assrt" : "");
2083         } else {
2084                 if (sdpcm_shared.flags & SDPCM_SHARED_ASSERT) {
2085                         /* Download assert */
2086                         brcmu_bprintf(&strbuf, "Dongle assert");
2087                         if (sdpcm_shared.assert_exp_addr != 0) {
2088                                 str[0] = '\0';
2089                                 bcmerror = brcmf_sdbrcm_membytes(bus, false,
2090                                                 sdpcm_shared.assert_exp_addr,
2091                                                 (u8 *) str, maxstrlen);
2092                                 if (bcmerror < 0)
2093                                         goto done;
2094
2095                                 str[maxstrlen - 1] = '\0';
2096                                 brcmu_bprintf(&strbuf, " expr \"%s\"", str);
2097                         }
2098
2099                         if (sdpcm_shared.assert_file_addr != 0) {
2100                                 str[0] = '\0';
2101                                 bcmerror = brcmf_sdbrcm_membytes(bus, false,
2102                                                 sdpcm_shared.assert_file_addr,
2103                                                 (u8 *) str, maxstrlen);
2104                                 if (bcmerror < 0)
2105                                         goto done;
2106
2107                                 str[maxstrlen - 1] = '\0';
2108                                 brcmu_bprintf(&strbuf, " file \"%s\"", str);
2109                         }
2110
2111                         brcmu_bprintf(&strbuf, " line %d ",
2112                                     sdpcm_shared.assert_line);
2113                 }
2114
2115                 if (sdpcm_shared.flags & SDPCM_SHARED_TRAP) {
2116                         bcmerror = brcmf_sdbrcm_membytes(bus, false,
2117                                         sdpcm_shared.trap_addr, (u8 *)&tr,
2118                                         sizeof(struct brcmf_trap));
2119                         if (bcmerror < 0)
2120                                 goto done;
2121
2122                         brcmu_bprintf(&strbuf,
2123                                     "Dongle trap type 0x%x @ epc 0x%x, cpsr 0x%x, spsr 0x%x, sp 0x%x,"
2124                                     "lp 0x%x, rpc 0x%x Trap offset 0x%x, "
2125                                     "r0 0x%x, r1 0x%x, r2 0x%x, r3 0x%x, r4 0x%x, r5 0x%x, r6 0x%x, r7 0x%x\n",
2126                                     tr.type, tr.epc, tr.cpsr, tr.spsr, tr.r13,
2127                                     tr.r14, tr.pc, sdpcm_shared.trap_addr,
2128                                     tr.r0, tr.r1, tr.r2, tr.r3, tr.r4, tr.r5,
2129                                     tr.r6, tr.r7);
2130                 }
2131         }
2132
2133         if (sdpcm_shared.flags & (SDPCM_SHARED_ASSERT | SDPCM_SHARED_TRAP))
2134                 DHD_ERROR(("%s: %s\n", __func__, strbuf.origbuf));
2135
2136 #ifdef BCMDBG
2137         if (sdpcm_shared.flags & SDPCM_SHARED_TRAP) {
2138                 /* Mem dump to a file on device */
2139                 brcmf_sdbrcm_mem_dump(bus);
2140         }
2141 #endif                          /* BCMDBG */
2142
2143 done:
2144         kfree(mbuffer);
2145         kfree(str);
2146
2147         return bcmerror;
2148 }
2149
2150 static int brcmf_sdbrcm_mem_dump(dhd_bus_t *bus)
2151 {
2152         int ret = 0;
2153         int size;               /* Full mem size */
2154         int start = 0;          /* Start address */
2155         int read_size = 0;      /* Read size of each iteration */
2156         u8 *buf = NULL, *databuf = NULL;
2157
2158         /* Get full mem size */
2159         size = bus->ramsize;
2160         buf = kmalloc(size, GFP_ATOMIC);
2161         if (!buf) {
2162                 DHD_ERROR(("%s: Out of memory (%d bytes)\n", __func__, size));
2163                 return -1;
2164         }
2165
2166         /* Read mem content */
2167         printk(KERN_DEBUG "Dump dongle memory");
2168         databuf = buf;
2169         while (size) {
2170                 read_size = min(MEMBLOCK, size);
2171                 ret = brcmf_sdbrcm_membytes(bus, false, start, databuf,
2172                                           read_size);
2173                 if (ret) {
2174                         DHD_ERROR(("%s: Error membytes %d\n", __func__, ret));
2175                         kfree(buf);
2176                         return -1;
2177                 }
2178                 printk(".");
2179
2180                 /* Decrement size and increment start address */
2181                 size -= read_size;
2182                 start += read_size;
2183                 databuf += read_size;
2184         }
2185         printk(KERN_DEBUG "Done\n");
2186
2187         /* free buf before return !!! */
2188         if (brcmf_write_to_file(bus->dhd, buf, bus->ramsize)) {
2189                 DHD_ERROR(("%s: Error writing to files\n", __func__));
2190                 return -1;
2191         }
2192
2193         /* buf free handled in brcmf_write_to_file, not here */
2194         return 0;
2195 }
2196
2197 #define CONSOLE_LINE_MAX        192
2198
2199 static int brcmf_sdbrcm_readconsole(dhd_bus_t *bus)
2200 {
2201         struct dhd_console *c = &bus->console;
2202         u8 line[CONSOLE_LINE_MAX], ch;
2203         u32 n, idx, addr;
2204         int rv;
2205
2206         /* Don't do anything until FWREADY updates console address */
2207         if (bus->console_addr == 0)
2208                 return 0;
2209
2210         /* Read console log struct */
2211         addr = bus->console_addr + offsetof(struct rte_console, log);
2212         rv = brcmf_sdbrcm_membytes(bus, false, addr, (u8 *)&c->log,
2213                                 sizeof(c->log));
2214         if (rv < 0)
2215                 return rv;
2216
2217         /* Allocate console buffer (one time only) */
2218         if (c->buf == NULL) {
2219                 c->bufsize = le32_to_cpu(c->log.buf_size);
2220                 c->buf = kmalloc(c->bufsize, GFP_ATOMIC);
2221                 if (c->buf == NULL)
2222                         return -ENOMEM;
2223         }
2224
2225         idx = le32_to_cpu(c->log.idx);
2226
2227         /* Protect against corrupt value */
2228         if (idx > c->bufsize)
2229                 return -EBADE;
2230
2231         /* Skip reading the console buffer if the index pointer
2232          has not moved */
2233         if (idx == c->last)
2234                 return 0;
2235
2236         /* Read the console buffer */
2237         addr = le32_to_cpu(c->log.buf);
2238         rv = brcmf_sdbrcm_membytes(bus, false, addr, c->buf, c->bufsize);
2239         if (rv < 0)
2240                 return rv;
2241
2242         while (c->last != idx) {
2243                 for (n = 0; n < CONSOLE_LINE_MAX - 2; n++) {
2244                         if (c->last == idx) {
2245                                 /* This would output a partial line.
2246                                  * Instead, back up
2247                                  * the buffer pointer and output this
2248                                  * line next time around.
2249                                  */
2250                                 if (c->last >= n)
2251                                         c->last -= n;
2252                                 else
2253                                         c->last = c->bufsize - n;
2254                                 goto break2;
2255                         }
2256                         ch = c->buf[c->last];
2257                         c->last = (c->last + 1) % c->bufsize;
2258                         if (ch == '\n')
2259                                 break;
2260                         line[n] = ch;
2261                 }
2262
2263                 if (n > 0) {
2264                         if (line[n - 1] == '\r')
2265                                 n--;
2266                         line[n] = 0;
2267                         printk(KERN_DEBUG "CONSOLE: %s\n", line);
2268                 }
2269         }
2270 break2:
2271
2272         return 0;
2273 }
2274 #endif                          /* BCMDBG */
2275
2276 int brcmf_sdbrcm_downloadvars(dhd_bus_t *bus, void *arg, int len)
2277 {
2278         int bcmerror = 0;
2279
2280         DHD_TRACE(("%s: Enter\n", __func__));
2281
2282         /* Basic sanity checks */
2283         if (bus->dhd->up) {
2284                 bcmerror = -EISCONN;
2285                 goto err;
2286         }
2287         if (!len) {
2288                 bcmerror = -EOVERFLOW;
2289                 goto err;
2290         }
2291
2292         /* Free the old ones and replace with passed variables */
2293         kfree(bus->vars);
2294
2295         bus->vars = kmalloc(len, GFP_ATOMIC);
2296         bus->varsz = bus->vars ? len : 0;
2297         if (bus->vars == NULL) {
2298                 bcmerror = -ENOMEM;
2299                 goto err;
2300         }
2301
2302         /* Copy the passed variables, which should include the
2303                  terminating double-null */
2304         memcpy(bus->vars, arg, bus->varsz);
2305 err:
2306         return bcmerror;
2307 }
2308
2309 static int
2310 brcmf_sdbrcm_doiovar(dhd_bus_t *bus, const struct brcmu_iovar *vi, u32 actionid,
2311                 const char *name, void *params, int plen, void *arg, int len,
2312                 int val_size)
2313 {
2314         int bcmerror = 0;
2315         s32 int_val = 0;
2316         bool bool_val = 0;
2317
2318         DHD_TRACE(("%s: Enter, action %d name %s params %p plen %d arg %p "
2319                 "len %d val_size %d\n",
2320                 __func__, actionid, name, params, plen, arg, len, val_size));
2321
2322         bcmerror = brcmu_iovar_lencheck(vi, arg, len, IOV_ISSET(actionid));
2323         if (bcmerror != 0)
2324                 goto exit;
2325
2326         if (plen >= (int)sizeof(int_val))
2327                 memcpy(&int_val, params, sizeof(int_val));
2328
2329         bool_val = (int_val != 0) ? true : false;
2330
2331         /* Some ioctls use the bus */
2332         brcmf_os_sdlock(bus->dhd);
2333
2334         /* Check if dongle is in reset. If so, only allow DEVRESET iovars */
2335         if (bus->dhd->dongle_reset && !(actionid == IOV_SVAL(IOV_DEVRESET) ||
2336                                         actionid == IOV_GVAL(IOV_DEVRESET))) {
2337                 bcmerror = -EPERM;
2338                 goto exit;
2339         }
2340
2341         /* Handle sleep stuff before any clock mucking */
2342         if (vi->varid == IOV_SLEEP) {
2343                 if (IOV_ISSET(actionid)) {
2344                         bcmerror = brcmf_sdbrcm_bussleep(bus, bool_val);
2345                 } else {
2346                         int_val = (s32) bus->sleeping;
2347                         memcpy(arg, &int_val, val_size);
2348                 }
2349                 goto exit;
2350         }
2351
2352         /* Request clock to allow SDIO accesses */
2353         if (!bus->dhd->dongle_reset) {
2354                 BUS_WAKE(bus);
2355                 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
2356         }
2357
2358         switch (actionid) {
2359         case IOV_GVAL(IOV_INTR):
2360                 int_val = (s32) bus->intr;
2361                 memcpy(arg, &int_val, val_size);
2362                 break;
2363
2364         case IOV_SVAL(IOV_INTR):
2365                 bus->intr = bool_val;
2366                 bus->intdis = false;
2367                 if (bus->dhd->up) {
2368                         if (bus->intr) {
2369                                 DHD_INTR(("%s: enable SDIO device interrupts\n",
2370                                           __func__));
2371                                 brcmf_sdcard_intr_enable(bus->sdh);
2372                         } else {
2373                                 DHD_INTR(("%s: disable SDIO interrupts\n",
2374                                           __func__));
2375                                 brcmf_sdcard_intr_disable(bus->sdh);
2376                         }
2377                 }
2378                 break;
2379
2380         case IOV_GVAL(IOV_POLLRATE):
2381                 int_val = (s32) bus->pollrate;
2382                 memcpy(arg, &int_val, val_size);
2383                 break;
2384
2385         case IOV_SVAL(IOV_POLLRATE):
2386                 bus->pollrate = (uint) int_val;
2387                 bus->poll = (bus->pollrate != 0);
2388                 break;
2389
2390         case IOV_GVAL(IOV_IDLETIME):
2391                 int_val = bus->idletime;
2392                 memcpy(arg, &int_val, val_size);
2393                 break;
2394
2395         case IOV_SVAL(IOV_IDLETIME):
2396                 if ((int_val < 0) && (int_val != DHD_IDLE_IMMEDIATE))
2397                         bcmerror = -EINVAL;
2398                 else
2399                         bus->idletime = int_val;
2400                 break;
2401
2402         case IOV_GVAL(IOV_IDLECLOCK):
2403                 int_val = (s32) bus->idleclock;
2404                 memcpy(arg, &int_val, val_size);
2405                 break;
2406
2407         case IOV_SVAL(IOV_IDLECLOCK):
2408                 bus->idleclock = int_val;
2409                 break;
2410
2411         case IOV_GVAL(IOV_SD1IDLE):
2412                 int_val = (s32) sd1idle;
2413                 memcpy(arg, &int_val, val_size);
2414                 break;
2415
2416         case IOV_SVAL(IOV_SD1IDLE):
2417                 sd1idle = bool_val;
2418                 break;
2419
2420         case IOV_SVAL(IOV_MEMBYTES):
2421         case IOV_GVAL(IOV_MEMBYTES):
2422                 {
2423                         u32 address;
2424                         uint size, dsize;
2425                         u8 *data;
2426
2427                         bool set = (actionid == IOV_SVAL(IOV_MEMBYTES));
2428
2429                         ASSERT(plen >= 2 * sizeof(int));
2430
2431                         address = (u32) int_val;
2432                         memcpy(&int_val, (char *)params + sizeof(int_val),
2433                                sizeof(int_val));
2434                         size = (uint) int_val;
2435
2436                         /* Do some validation */
2437                         dsize = set ? plen - (2 * sizeof(int)) : len;
2438                         if (dsize < size) {
2439                                 DHD_ERROR(("%s: error on %s membytes, addr "
2440                                 "0x%08x size %d dsize %d\n",
2441                                 __func__, (set ? "set" : "get"),
2442                                 address, size, dsize));
2443                                 bcmerror = -EINVAL;
2444                                 break;
2445                         }
2446
2447                         DHD_INFO(("%s: Request to %s %d bytes at address "
2448                         "0x%08x\n",
2449                         __func__, (set ? "write" : "read"), size, address));
2450
2451                         /* If we know about SOCRAM, check for a fit */
2452                         if ((bus->orig_ramsize) &&
2453                             ((address > bus->orig_ramsize)
2454                              || (address + size > bus->orig_ramsize))) {
2455                                 DHD_ERROR(("%s: ramsize 0x%08x doesn't have %d "
2456                                 "bytes at 0x%08x\n",
2457                                 __func__, bus->orig_ramsize, size, address));
2458                                 bcmerror = -EINVAL;
2459                                 break;
2460                         }
2461
2462                         /* Generate the actual data pointer */
2463                         data =
2464                             set ? (u8 *) params +
2465                             2 * sizeof(int) : (u8 *) arg;
2466
2467                         /* Call to do the transfer */
2468                         bcmerror = brcmf_sdbrcm_membytes(bus, set, address,
2469                                                          data, size);
2470
2471                         break;
2472                 }
2473
2474         case IOV_GVAL(IOV_MEMSIZE):
2475                 int_val = (s32) bus->ramsize;
2476                 memcpy(arg, &int_val, val_size);
2477                 break;
2478
2479         case IOV_GVAL(IOV_SDIOD_DRIVE):
2480                 int_val = (s32) brcmf_sdiod_drive_strength;
2481                 memcpy(arg, &int_val, val_size);
2482                 break;
2483
2484         case IOV_SVAL(IOV_SDIOD_DRIVE):
2485                 brcmf_sdiod_drive_strength = int_val;
2486                 brcmf_sdbrcm_sdiod_drive_strength_init(bus,
2487                                              brcmf_sdiod_drive_strength);
2488                 break;
2489
2490         case IOV_SVAL(IOV_DOWNLOAD):
2491                 bcmerror = brcmf_sdbrcm_download_state(bus, bool_val);
2492                 break;
2493
2494         case IOV_SVAL(IOV_VARS):
2495                 bcmerror = brcmf_sdbrcm_downloadvars(bus, arg, len);
2496                 break;
2497
2498         case IOV_GVAL(IOV_READAHEAD):
2499                 int_val = (s32) dhd_readahead;
2500                 memcpy(arg, &int_val, val_size);
2501                 break;
2502
2503         case IOV_SVAL(IOV_READAHEAD):
2504                 if (bool_val && !dhd_readahead)
2505                         bus->nextlen = 0;
2506                 dhd_readahead = bool_val;
2507                 break;
2508
2509         case IOV_GVAL(IOV_SDRXCHAIN):
2510                 int_val = (s32) bus->use_rxchain;
2511                 memcpy(arg, &int_val, val_size);
2512                 break;
2513
2514         case IOV_SVAL(IOV_SDRXCHAIN):
2515                 if (bool_val && !bus->sd_rxchain)
2516                         bcmerror = -ENOTSUPP;
2517                 else
2518                         bus->use_rxchain = bool_val;
2519                 break;
2520         case IOV_GVAL(IOV_ALIGNCTL):
2521                 int_val = (s32) dhd_alignctl;
2522                 memcpy(arg, &int_val, val_size);
2523                 break;
2524
2525         case IOV_SVAL(IOV_ALIGNCTL):
2526                 dhd_alignctl = bool_val;
2527                 break;
2528
2529         case IOV_GVAL(IOV_SDALIGN):
2530                 int_val = BRCMF_SDALIGN;
2531                 memcpy(arg, &int_val, val_size);
2532                 break;
2533
2534 #ifdef BCMDBG
2535         case IOV_GVAL(IOV_VARS):
2536                 if (bus->varsz < (uint) len)
2537                         memcpy(arg, bus->vars, bus->varsz);
2538                 else
2539                         bcmerror = -EOVERFLOW;
2540                 break;
2541 #endif                          /* BCMDBG */
2542
2543 #ifdef BCMDBG
2544         case IOV_GVAL(IOV_SDREG):
2545                 {
2546                         struct brcmf_sdreg *sd_ptr;
2547                         u32 addr, size;
2548
2549                         sd_ptr = (struct brcmf_sdreg *) params;
2550
2551                         addr = (unsigned long)bus->regs + sd_ptr->offset;
2552                         size = sd_ptr->func;
2553                         int_val = (s32) brcmf_sdcard_reg_read(bus->sdh, addr,
2554                                                               size);
2555                         if (brcmf_sdcard_regfail(bus->sdh))
2556                                 bcmerror = -EIO;
2557                         memcpy(arg, &int_val, sizeof(s32));
2558                         break;
2559                 }
2560
2561         case IOV_SVAL(IOV_SDREG):
2562                 {
2563                         struct brcmf_sdreg *sd_ptr;
2564                         u32 addr, size;
2565
2566                         sd_ptr = (struct brcmf_sdreg *) params;
2567
2568                         addr = (unsigned long)bus->regs + sd_ptr->offset;
2569                         size = sd_ptr->func;
2570                         brcmf_sdcard_reg_write(bus->sdh, addr, size,
2571                                                sd_ptr->value);
2572                         if (brcmf_sdcard_regfail(bus->sdh))
2573                                 bcmerror = -EIO;
2574                         break;
2575                 }
2576
2577                 /* Same as above, but offset is not backplane
2578                  (not SDIO core) */
2579         case IOV_GVAL(IOV_SBREG):
2580                 {
2581                         struct brcmf_sdreg sdreg;
2582                         u32 addr, size;
2583
2584                         memcpy(&sdreg, params, sizeof(sdreg));
2585
2586                         addr = SI_ENUM_BASE + sdreg.offset;
2587                         size = sdreg.func;
2588                         int_val = (s32) brcmf_sdcard_reg_read(bus->sdh, addr,
2589                                                               size);
2590                         if (brcmf_sdcard_regfail(bus->sdh))
2591                                 bcmerror = -EIO;
2592                         memcpy(arg, &int_val, sizeof(s32));
2593                         break;
2594                 }
2595
2596         case IOV_SVAL(IOV_SBREG):
2597                 {
2598                         struct brcmf_sdreg sdreg;
2599                         u32 addr, size;
2600
2601                         memcpy(&sdreg, params, sizeof(sdreg));
2602
2603                         addr = SI_ENUM_BASE + sdreg.offset;
2604                         size = sdreg.func;
2605                         brcmf_sdcard_reg_write(bus->sdh, addr, size,
2606                                                sdreg.value);
2607                         if (brcmf_sdcard_regfail(bus->sdh))
2608                                 bcmerror = -EIO;
2609                         break;
2610                 }
2611
2612         case IOV_GVAL(IOV_SDCIS):
2613                 {
2614                         *(char *)arg = 0;
2615
2616                         strcat(arg, "\nFunc 0\n");
2617                         brcmf_sdcard_cis_read(bus->sdh, 0x10,
2618                                         (u8 *) arg + strlen(arg),
2619                                         SBSDIO_CIS_SIZE_LIMIT);
2620                         strcat(arg, "\nFunc 1\n");
2621                         brcmf_sdcard_cis_read(bus->sdh, 0x11,
2622                                         (u8 *) arg + strlen(arg),
2623                                         SBSDIO_CIS_SIZE_LIMIT);
2624                         strcat(arg, "\nFunc 2\n");
2625                         brcmf_sdcard_cis_read(bus->sdh, 0x12,
2626                                         (u8 *) arg + strlen(arg),
2627                                         SBSDIO_CIS_SIZE_LIMIT);
2628                         break;
2629                 }
2630
2631         case IOV_GVAL(IOV_FORCEEVEN):
2632                 int_val = (s32) forcealign;
2633                 memcpy(arg, &int_val, val_size);
2634                 break;
2635
2636         case IOV_SVAL(IOV_FORCEEVEN):
2637                 forcealign = bool_val;
2638                 break;
2639
2640         case IOV_GVAL(IOV_TXBOUND):
2641                 int_val = (s32) brcmf_txbound;
2642                 memcpy(arg, &int_val, val_size);
2643                 break;
2644
2645         case IOV_SVAL(IOV_TXBOUND):
2646                 brcmf_txbound = (uint) int_val;
2647                 break;
2648
2649         case IOV_GVAL(IOV_RXBOUND):
2650                 int_val = (s32) brcmf_rxbound;
2651                 memcpy(arg, &int_val, val_size);
2652                 break;
2653
2654         case IOV_SVAL(IOV_RXBOUND):
2655                 brcmf_rxbound = (uint) int_val;
2656                 break;
2657
2658         case IOV_GVAL(IOV_TXMINMAX):
2659                 int_val = (s32) dhd_txminmax;
2660                 memcpy(arg, &int_val, val_size);
2661                 break;
2662
2663         case IOV_SVAL(IOV_TXMINMAX):
2664                 dhd_txminmax = (uint) int_val;
2665                 break;
2666 #endif                          /* BCMDBG */
2667
2668 #ifdef SDTEST
2669         case IOV_GVAL(IOV_EXTLOOP):
2670                 int_val = (s32) bus->ext_loop;
2671                 memcpy(arg, &int_val, val_size);
2672                 break;
2673
2674         case IOV_SVAL(IOV_EXTLOOP):
2675                 bus->ext_loop = bool_val;
2676                 break;
2677
2678         case IOV_GVAL(IOV_PKTGEN):
2679                 bcmerror = brcmf_sdbrcm_pktgen_get(bus, arg);
2680                 break;
2681
2682         case IOV_SVAL(IOV_PKTGEN):
2683                 bcmerror = brcmf_sdbrcm_pktgen_set(bus, arg);
2684                 break;
2685 #endif                          /* SDTEST */
2686
2687         case IOV_SVAL(IOV_DEVRESET):
2688                 DHD_TRACE(("%s: Called set IOV_DEVRESET=%d dongle_reset=%d "
2689                         "busstate=%d\n",
2690                         __func__, bool_val, bus->dhd->dongle_reset,
2691                         bus->dhd->busstate));
2692
2693                 brcmf_bus_devreset(bus->dhd, (u8) bool_val);
2694
2695                 break;
2696
2697         case IOV_GVAL(IOV_DEVRESET):
2698                 DHD_TRACE(("%s: Called get IOV_DEVRESET\n", __func__));
2699
2700                 /* Get its status */
2701                 int_val = (bool) bus->dhd->dongle_reset;
2702                 memcpy(arg, &int_val, val_size);
2703
2704                 break;
2705
2706         default:
2707                 bcmerror = -ENOTSUPP;
2708                 break;
2709         }
2710
2711 exit:
2712         if ((bus->idletime == DHD_IDLE_IMMEDIATE) && !bus->dpc_sched) {
2713                 bus->activity = false;
2714                 brcmf_sdbrcm_clkctl(bus, CLK_NONE, true);
2715         }
2716
2717         brcmf_os_sdunlock(bus->dhd);
2718
2719         if (actionid == IOV_SVAL(IOV_DEVRESET) && bool_val == false)
2720                 brcmf_c_preinit_ioctls((dhd_pub_t *) bus->dhd);
2721
2722         return bcmerror;
2723 }
2724
2725 static int brcmf_sdbrcm_write_vars(dhd_bus_t *bus)
2726 {
2727         int bcmerror = 0;
2728         u32 varsize;
2729         u32 varaddr;
2730         u8 *vbuffer;
2731         u32 varsizew;
2732 #ifdef BCMDBG
2733         char *nvram_ularray;
2734 #endif                          /* BCMDBG */
2735
2736         /* Even if there are no vars are to be written, we still
2737                  need to set the ramsize. */
2738         varsize = bus->varsz ? roundup(bus->varsz, 4) : 0;
2739         varaddr = (bus->ramsize - 4) - varsize;
2740
2741         if (bus->vars) {
2742                 vbuffer = kzalloc(varsize, GFP_ATOMIC);
2743                 if (!vbuffer)
2744                         return -ENOMEM;
2745
2746                 memcpy(vbuffer, bus->vars, bus->varsz);
2747
2748                 /* Write the vars list */
2749                 bcmerror =
2750                     brcmf_sdbrcm_membytes(bus, true, varaddr, vbuffer, varsize);
2751 #ifdef BCMDBG
2752                 /* Verify NVRAM bytes */
2753                 DHD_INFO(("Compare NVRAM dl & ul; varsize=%d\n", varsize));
2754                 nvram_ularray = kmalloc(varsize, GFP_ATOMIC);
2755                 if (!nvram_ularray)
2756                         return -ENOMEM;
2757
2758                 /* Upload image to verify downloaded contents. */
2759                 memset(nvram_ularray, 0xaa, varsize);
2760
2761                 /* Read the vars list to temp buffer for comparison */
2762                 bcmerror =
2763                     brcmf_sdbrcm_membytes(bus, false, varaddr, nvram_ularray,
2764                                      varsize);
2765                 if (bcmerror) {
2766                         DHD_ERROR(("%s: error %d on reading %d nvram bytes at "
2767                         "0x%08x\n", __func__, bcmerror, varsize, varaddr));
2768                 }
2769                 /* Compare the org NVRAM with the one read from RAM */
2770                 if (memcmp(vbuffer, nvram_ularray, varsize)) {
2771                         DHD_ERROR(("%s: Downloaded NVRAM image is corrupted.\n",
2772                                    __func__));
2773                 } else
2774                         DHD_ERROR(("%s: Download/Upload/Compare of NVRAM ok.\n",
2775                                 __func__));
2776
2777                 kfree(nvram_ularray);
2778 #endif                          /* BCMDBG */
2779
2780                 kfree(vbuffer);
2781         }
2782
2783         /* adjust to the user specified RAM */
2784         DHD_INFO(("Physical memory size: %d, usable memory size: %d\n",
2785                   bus->orig_ramsize, bus->ramsize));
2786         DHD_INFO(("Vars are at %d, orig varsize is %d\n", varaddr, varsize));
2787         varsize = ((bus->orig_ramsize - 4) - varaddr);
2788
2789         /*
2790          * Determine the length token:
2791          * Varsize, converted to words, in lower 16-bits, checksum
2792          * in upper 16-bits.
2793          */
2794         if (bcmerror) {
2795                 varsizew = 0;
2796         } else {
2797                 varsizew = varsize / 4;
2798                 varsizew = (~varsizew << 16) | (varsizew & 0x0000FFFF);
2799                 varsizew = cpu_to_le32(varsizew);
2800         }
2801
2802         DHD_INFO(("New varsize is %d, length token=0x%08x\n", varsize,
2803                   varsizew));
2804
2805         /* Write the length token to the last word */
2806         bcmerror = brcmf_sdbrcm_membytes(bus, true, (bus->orig_ramsize - 4),
2807                                     (u8 *)&varsizew, 4);
2808
2809         return bcmerror;
2810 }
2811
2812 static int brcmf_sdbrcm_download_state(dhd_bus_t *bus, bool enter)
2813 {
2814         uint retries;
2815         u32 regdata;
2816         int bcmerror = 0;
2817
2818         /* To enter download state, disable ARM and reset SOCRAM.
2819          * To exit download state, simply reset ARM (default is RAM boot).
2820          */
2821         if (enter) {
2822                 bus->alp_only = true;
2823
2824                 brcmf_sdbrcm_chip_disablecore(bus->sdh, bus->ci->armcorebase);
2825
2826                 brcmf_sdbrcm_chip_resetcore(bus->sdh, bus->ci->ramcorebase);
2827
2828                 /* Clear the top bit of memory */
2829                 if (bus->ramsize) {
2830                         u32 zeros = 0;
2831                         brcmf_sdbrcm_membytes(bus, true, bus->ramsize - 4,
2832                                          (u8 *)&zeros, 4);
2833                 }
2834         } else {
2835                 regdata = brcmf_sdcard_reg_read(bus->sdh,
2836                         CORE_SB(bus->ci->ramcorebase, sbtmstatelow), 4);
2837                 regdata &= (SBTML_RESET | SBTML_REJ_MASK |
2838                         (SICF_CLOCK_EN << SBTML_SICF_SHIFT));
2839                 if ((SICF_CLOCK_EN << SBTML_SICF_SHIFT) != regdata) {
2840                         DHD_ERROR(("%s: SOCRAM core is down after reset?\n",
2841                                    __func__));
2842                         bcmerror = -EBADE;
2843                         goto fail;
2844                 }
2845
2846                 bcmerror = brcmf_sdbrcm_write_vars(bus);
2847                 if (bcmerror) {
2848                         DHD_ERROR(("%s: no vars written to RAM\n", __func__));
2849                         bcmerror = 0;
2850                 }
2851
2852                 W_SDREG(0xFFFFFFFF, &bus->regs->intstatus, retries);
2853
2854                 brcmf_sdbrcm_chip_resetcore(bus->sdh, bus->ci->armcorebase);
2855
2856                 /* Allow HT Clock now that the ARM is running. */
2857                 bus->alp_only = false;
2858
2859                 bus->dhd->busstate = DHD_BUS_LOAD;
2860         }
2861 fail:
2862         return bcmerror;
2863 }
2864
2865 int
2866 brcmf_sdbrcm_bus_iovar_op(dhd_pub_t *dhdp, const char *name,
2867                           void *params, int plen, void *arg, int len, bool set)
2868 {
2869         dhd_bus_t *bus = dhdp->bus;
2870         const struct brcmu_iovar *vi = NULL;
2871         int bcmerror = 0;
2872         int val_size;
2873         u32 actionid;
2874
2875         DHD_TRACE(("%s: Enter\n", __func__));
2876
2877         ASSERT(name);
2878         ASSERT(len >= 0);
2879
2880         /* Get MUST have return space */
2881         ASSERT(set || (arg && len));
2882
2883         /* Set does NOT take qualifiers */
2884         ASSERT(!set || (!params && !plen));
2885
2886         /* Look up var locally; if not found pass to host driver */
2887         vi = brcmu_iovar_lookup(dhdsdio_iovars, name);
2888         if (vi == NULL) {
2889                 brcmf_os_sdlock(bus->dhd);
2890
2891                 BUS_WAKE(bus);
2892
2893                 /* Turn on clock in case SD command needs backplane */
2894                 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
2895
2896                 bcmerror = brcmf_sdcard_iovar_op(bus->sdh, name, params, plen,
2897                                                  arg, len, set);
2898
2899                 /* Similar check for blocksize change */
2900                 if (set && strcmp(name, "sd_blocksize") == 0) {
2901                         s32 fnum = 2;
2902                         if (brcmf_sdcard_iovar_op
2903                             (bus->sdh, "sd_blocksize", &fnum, sizeof(s32),
2904                              &bus->blocksize, sizeof(s32),
2905                              false) != 0) {
2906                                 bus->blocksize = 0;
2907                                 DHD_ERROR(("%s: fail on %s get\n", __func__,
2908                                            "sd_blocksize"));
2909                         } else {
2910                                 DHD_INFO(("%s: noted %s update, value now %d\n",
2911                                           __func__, "sd_blocksize",
2912                                           bus->blocksize));
2913                         }
2914                 }
2915                 bus->roundup = min(max_roundup, bus->blocksize);
2916
2917                 if ((bus->idletime == DHD_IDLE_IMMEDIATE) && !bus->dpc_sched) {
2918                         bus->activity = false;
2919                         brcmf_sdbrcm_clkctl(bus, CLK_NONE, true);
2920                 }
2921
2922                 brcmf_os_sdunlock(bus->dhd);
2923                 goto exit;
2924         }
2925
2926         DHD_CTL(("%s: %s %s, len %d plen %d\n", __func__,
2927                  name, (set ? "set" : "get"), len, plen));
2928
2929         /* set up 'params' pointer in case this is a set command so that
2930          * the convenience int and bool code can be common to set and get
2931          */
2932         if (params == NULL) {
2933                 params = arg;
2934                 plen = len;
2935         }
2936
2937         if (vi->type == IOVT_VOID)
2938                 val_size = 0;
2939         else if (vi->type == IOVT_BUFFER)
2940                 val_size = len;
2941         else
2942                 /* all other types are integer sized */
2943                 val_size = sizeof(int);
2944
2945         actionid = set ? IOV_SVAL(vi->varid) : IOV_GVAL(vi->varid);
2946         bcmerror = brcmf_sdbrcm_doiovar(bus, vi, actionid, name, params, plen,
2947                                         arg, len, val_size);
2948
2949 exit:
2950         return bcmerror;
2951 }
2952
2953 void brcmf_sdbrcm_bus_stop(struct dhd_bus *bus, bool enforce_mutex)
2954 {
2955         u32 local_hostintmask;
2956         u8 saveclk;
2957         uint retries;
2958         int err;
2959
2960         DHD_TRACE(("%s: Enter\n", __func__));
2961
2962         if (enforce_mutex)
2963                 brcmf_os_sdlock(bus->dhd);
2964
2965         BUS_WAKE(bus);
2966
2967         /* Enable clock for device interrupts */
2968         brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
2969
2970         /* Disable and clear interrupts at the chip level also */
2971         W_SDREG(0, &bus->regs->hostintmask, retries);
2972         local_hostintmask = bus->hostintmask;
2973         bus->hostintmask = 0;
2974
2975         /* Change our idea of bus state */
2976         bus->dhd->busstate = DHD_BUS_DOWN;
2977
2978         /* Force clocks on backplane to be sure F2 interrupt propagates */
2979         saveclk = brcmf_sdcard_cfg_read(bus->sdh, SDIO_FUNC_1,
2980                                         SBSDIO_FUNC1_CHIPCLKCSR, &err);
2981         if (!err) {
2982                 brcmf_sdcard_cfg_write(bus->sdh, SDIO_FUNC_1,
2983                                        SBSDIO_FUNC1_CHIPCLKCSR,
2984                                        (saveclk | SBSDIO_FORCE_HT), &err);
2985         }
2986         if (err) {
2987                 DHD_ERROR(("%s: Failed to force clock for F2: err %d\n",
2988                            __func__, err));
2989         }
2990
2991         /* Turn off the bus (F2), free any pending packets */
2992         DHD_INTR(("%s: disable SDIO interrupts\n", __func__));
2993         brcmf_sdcard_intr_disable(bus->sdh);
2994         brcmf_sdcard_cfg_write(bus->sdh, SDIO_FUNC_0, SDIO_CCCR_IOEx,
2995                          SDIO_FUNC_ENABLE_1, NULL);
2996
2997         /* Clear any pending interrupts now that F2 is disabled */
2998         W_SDREG(local_hostintmask, &bus->regs->intstatus, retries);
2999
3000         /* Turn off the backplane clock (only) */
3001         brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
3002
3003         /* Clear the data packet queues */
3004         brcmu_pktq_flush(&bus->txq, true, NULL, NULL);
3005
3006         /* Clear any held glomming stuff */
3007         if (bus->glomd)
3008                 brcmu_pkt_buf_free_skb(bus->glomd);
3009
3010         if (bus->glom)
3011                 brcmu_pkt_buf_free_skb(bus->glom);
3012
3013         bus->glom = bus->glomd = NULL;
3014
3015         /* Clear rx control and wake any waiters */
3016         bus->rxlen = 0;
3017         brcmf_os_ioctl_resp_wake(bus->dhd);
3018
3019         /* Reset some F2 state stuff */
3020         bus->rxskip = false;
3021         bus->tx_seq = bus->rx_seq = 0;
3022
3023         if (enforce_mutex)
3024                 brcmf_os_sdunlock(bus->dhd);
3025 }
3026
3027 int brcmf_sdbrcm_bus_init(dhd_pub_t *dhdp, bool enforce_mutex)
3028 {
3029         dhd_bus_t *bus = dhdp->bus;
3030         dhd_timeout_t tmo;
3031         uint retries = 0;
3032         u8 ready, enable;
3033         int err, ret = 0;
3034         u8 saveclk;
3035
3036         DHD_TRACE(("%s: Enter\n", __func__));
3037
3038         ASSERT(bus->dhd);
3039         if (!bus->dhd)
3040                 return 0;
3041
3042         if (enforce_mutex)
3043                 brcmf_os_sdlock(bus->dhd);
3044
3045         /* Make sure backplane clock is on, needed to generate F2 interrupt */
3046         brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3047         if (bus->clkstate != CLK_AVAIL)
3048                 goto exit;
3049
3050         /* Force clocks on backplane to be sure F2 interrupt propagates */
3051         saveclk =
3052             brcmf_sdcard_cfg_read(bus->sdh, SDIO_FUNC_1,
3053                                   SBSDIO_FUNC1_CHIPCLKCSR, &err);
3054         if (!err) {
3055                 brcmf_sdcard_cfg_write(bus->sdh, SDIO_FUNC_1,
3056                                        SBSDIO_FUNC1_CHIPCLKCSR,
3057                                        (saveclk | SBSDIO_FORCE_HT), &err);
3058         }
3059         if (err) {
3060                 DHD_ERROR(("%s: Failed to force clock for F2: err %d\n",
3061                            __func__, err));
3062                 goto exit;
3063         }
3064
3065         /* Enable function 2 (frame transfers) */
3066         W_SDREG((SDPCM_PROT_VERSION << SMB_DATA_VERSION_SHIFT),
3067                 &bus->regs->tosbmailboxdata, retries);
3068         enable = (SDIO_FUNC_ENABLE_1 | SDIO_FUNC_ENABLE_2);
3069
3070         brcmf_sdcard_cfg_write(bus->sdh, SDIO_FUNC_0, SDIO_CCCR_IOEx, enable,
3071                                NULL);
3072
3073         /* Give the dongle some time to do its thing and set IOR2 */
3074         brcmf_timeout_start(&tmo, DHD_WAIT_F2RDY * 1000);
3075
3076         ready = 0;
3077         while (ready != enable && !brcmf_timeout_expired(&tmo))
3078                 ready =
3079                     brcmf_sdcard_cfg_read(bus->sdh, SDIO_FUNC_0, SDIO_CCCR_IORx,
3080                                     NULL);
3081
3082         DHD_INFO(("%s: enable 0x%02x, ready 0x%02x (waited %uus)\n",
3083                   __func__, enable, ready, tmo.elapsed));
3084
3085         /* If F2 successfully enabled, set core and enable interrupts */
3086         if (ready == enable) {
3087                 /* Set up the interrupt mask and enable interrupts */
3088                 bus->hostintmask = HOSTINTMASK;
3089                 W_SDREG(bus->hostintmask,
3090                         (unsigned int *)CORE_BUS_REG(bus->ci->buscorebase,
3091                         hostintmask), retries);
3092
3093                 brcmf_sdcard_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_WATERMARK,
3094                                  (u8) watermark, &err);
3095
3096                 /* Set bus state according to enable result */
3097                 dhdp->busstate = DHD_BUS_DATA;
3098
3099                 /* bcmsdh_intr_unmask(bus->sdh); */
3100
3101                 bus->intdis = false;
3102                 if (bus->intr) {
3103                         DHD_INTR(("%s: enable SDIO device interrupts\n",
3104                                   __func__));
3105                         brcmf_sdcard_intr_enable(bus->sdh);
3106                 } else {
3107                         DHD_INTR(("%s: disable SDIO interrupts\n", __func__));
3108                         brcmf_sdcard_intr_disable(bus->sdh);
3109                 }
3110
3111         }
3112
3113         else {
3114                 /* Disable F2 again */
3115                 enable = SDIO_FUNC_ENABLE_1;
3116                 brcmf_sdcard_cfg_write(bus->sdh, SDIO_FUNC_0, SDIO_CCCR_IOEx,
3117                                        enable, NULL);
3118         }
3119
3120         /* Restore previous clock setting */
3121         brcmf_sdcard_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR,
3122                          saveclk, &err);
3123
3124         /* If we didn't come up, turn off backplane clock */
3125         if (dhdp->busstate != DHD_BUS_DATA)
3126                 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3127
3128 exit:
3129         if (enforce_mutex)
3130                 brcmf_os_sdunlock(bus->dhd);
3131
3132         return ret;
3133 }
3134
3135 static void brcmf_sdbrcm_rxfail(dhd_bus_t *bus, bool abort, bool rtx)
3136 {
3137         struct brcmf_sdio *sdh = bus->sdh;
3138         struct sdpcmd_regs *regs = bus->regs;
3139         uint retries = 0;
3140         u16 lastrbc;
3141         u8 hi, lo;
3142         int err;
3143
3144         DHD_ERROR(("%s: %sterminate frame%s\n", __func__,
3145                    (abort ? "abort command, " : ""),
3146                    (rtx ? ", send NAK" : "")));
3147
3148         if (abort)
3149                 brcmf_sdcard_abort(sdh, SDIO_FUNC_2);
3150
3151         brcmf_sdcard_cfg_write(sdh, SDIO_FUNC_1, SBSDIO_FUNC1_FRAMECTRL,
3152                                SFC_RF_TERM, &err);
3153         bus->f1regdata++;
3154
3155         /* Wait until the packet has been flushed (device/FIFO stable) */
3156         for (lastrbc = retries = 0xffff; retries > 0; retries--) {
3157                 hi = brcmf_sdcard_cfg_read(sdh, SDIO_FUNC_1,
3158                                            SBSDIO_FUNC1_RFRAMEBCHI, NULL);
3159                 lo = brcmf_sdcard_cfg_read(sdh, SDIO_FUNC_1,
3160                                            SBSDIO_FUNC1_RFRAMEBCLO, NULL);
3161                 bus->f1regdata += 2;
3162
3163                 if ((hi == 0) && (lo == 0))
3164                         break;
3165
3166                 if ((hi > (lastrbc >> 8)) && (lo > (lastrbc & 0x00ff))) {
3167                         DHD_ERROR(("%s: count growing: last 0x%04x now "
3168                                 "0x%04x\n",
3169                                 __func__, lastrbc, ((hi << 8) + lo)));
3170                 }
3171                 lastrbc = (hi << 8) + lo;
3172         }
3173
3174         if (!retries) {
3175                 DHD_ERROR(("%s: count never zeroed: last 0x%04x\n",
3176                            __func__, lastrbc));
3177         } else {
3178                 DHD_INFO(("%s: flush took %d iterations\n", __func__,
3179                           (0xffff - retries)));
3180         }
3181
3182         if (rtx) {
3183                 bus->rxrtx++;
3184                 W_SDREG(SMB_NAK, &regs->tosbmailbox, retries);
3185                 bus->f1regdata++;
3186                 if (retries <= retry_limit)
3187                         bus->rxskip = true;
3188         }
3189
3190         /* Clear partial in any case */
3191         bus->nextlen = 0;
3192
3193         /* If we can't reach the device, signal failure */
3194         if (err || brcmf_sdcard_regfail(sdh))
3195                 bus->dhd->busstate = DHD_BUS_DOWN;
3196 }
3197
3198 static void
3199 brcmf_sdbrcm_read_control(dhd_bus_t *bus, u8 *hdr, uint len, uint doff)
3200 {
3201         struct brcmf_sdio *sdh = bus->sdh;
3202         uint rdlen, pad;
3203
3204         int sdret;
3205
3206         DHD_TRACE(("%s: Enter\n", __func__));
3207
3208         /* Control data already received in aligned rxctl */
3209         if ((bus->bus == SPI_BUS) && (!bus->usebufpool))
3210                 goto gotpkt;
3211
3212         ASSERT(bus->rxbuf);
3213         /* Set rxctl for frame (w/optional alignment) */
3214         bus->rxctl = bus->rxbuf;
3215         if (dhd_alignctl) {
3216                 bus->rxctl += firstread;
3217                 pad = ((unsigned long)bus->rxctl % BRCMF_SDALIGN);
3218                 if (pad)
3219                         bus->rxctl += (BRCMF_SDALIGN - pad);
3220                 bus->rxctl -= firstread;
3221         }
3222         ASSERT(bus->rxctl >= bus->rxbuf);
3223
3224         /* Copy the already-read portion over */
3225         memcpy(bus->rxctl, hdr, firstread);
3226         if (len <= firstread)
3227                 goto gotpkt;
3228
3229         /* Copy the full data pkt in gSPI case and process ioctl. */
3230         if (bus->bus == SPI_BUS) {
3231                 memcpy(bus->rxctl, hdr, len);
3232                 goto gotpkt;
3233         }
3234
3235         /* Raise rdlen to next SDIO block to avoid tail command */
3236         rdlen = len - firstread;
3237         if (bus->roundup && bus->blocksize && (rdlen > bus->blocksize)) {
3238                 pad = bus->blocksize - (rdlen % bus->blocksize);
3239                 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
3240                     ((len + pad) < bus->dhd->maxctl))
3241                         rdlen += pad;
3242         } else if (rdlen % BRCMF_SDALIGN) {
3243                 rdlen += BRCMF_SDALIGN - (rdlen % BRCMF_SDALIGN);
3244         }
3245
3246         /* Satisfy length-alignment requirements */
3247         if (forcealign && (rdlen & (ALIGNMENT - 1)))
3248                 rdlen = roundup(rdlen, ALIGNMENT);
3249
3250         /* Drop if the read is too big or it exceeds our maximum */
3251         if ((rdlen + firstread) > bus->dhd->maxctl) {
3252                 DHD_ERROR(("%s: %d-byte control read exceeds %d-byte buffer\n",
3253                            __func__, rdlen, bus->dhd->maxctl));
3254                 bus->dhd->rx_errors++;
3255                 brcmf_sdbrcm_rxfail(bus, false, false);
3256                 goto done;
3257         }
3258
3259         if ((len - doff) > bus->dhd->maxctl) {
3260                 DHD_ERROR(("%s: %d-byte ctl frame (%d-byte ctl data) exceeds "
3261                         "%d-byte limit\n",
3262                         __func__, len, (len - doff), bus->dhd->maxctl));
3263                 bus->dhd->rx_errors++;
3264                 bus->rx_toolong++;
3265                 brcmf_sdbrcm_rxfail(bus, false, false);
3266                 goto done;
3267         }
3268
3269         /* Read remainder of frame body into the rxctl buffer */
3270         sdret = brcmf_sdcard_recv_buf(sdh, brcmf_sdcard_cur_sbwad(sdh),
3271                                 SDIO_FUNC_2,
3272                                 F2SYNC, (bus->rxctl + firstread), rdlen,
3273                                 NULL, NULL, NULL);
3274         bus->f2rxdata++;
3275         ASSERT(sdret != -BCME_PENDING);
3276
3277         /* Control frame failures need retransmission */
3278         if (sdret < 0) {
3279                 DHD_ERROR(("%s: read %d control bytes failed: %d\n",
3280                            __func__, rdlen, sdret));
3281                 bus->rxc_errors++;      /* dhd.rx_ctlerrs is higher level */
3282                 brcmf_sdbrcm_rxfail(bus, true, true);
3283                 goto done;
3284         }
3285
3286 gotpkt:
3287
3288 #ifdef BCMDBG
3289         if (DHD_BYTES_ON() && DHD_CTL_ON()) {
3290                 printk(KERN_DEBUG "RxCtrl:\n");
3291                 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, bus->rxctl, len);
3292         }
3293 #endif
3294
3295         /* Point to valid data and indicate its length */
3296         bus->rxctl += doff;
3297         bus->rxlen = len - doff;
3298
3299 done:
3300         /* Awake any waiters */
3301         brcmf_os_ioctl_resp_wake(bus->dhd);
3302 }
3303
3304 static u8 brcmf_sdbrcm_rxglom(dhd_bus_t *bus, u8 rxseq)
3305 {
3306         u16 dlen, totlen;
3307         u8 *dptr, num = 0;
3308
3309         u16 sublen, check;
3310         struct sk_buff *pfirst, *plast, *pnext, *save_pfirst;
3311
3312         int errcode;
3313         u8 chan, seq, doff, sfdoff;
3314         u8 txmax;
3315
3316         int ifidx = 0;
3317         bool usechain = bus->use_rxchain;
3318
3319         /* If packets, issue read(s) and send up packet chain */
3320         /* Return sequence numbers consumed? */
3321
3322         DHD_TRACE(("brcmf_sdbrcm_rxglom: start: glomd %p glom %p\n", bus->glomd,
3323                    bus->glom));
3324
3325         /* If there's a descriptor, generate the packet chain */
3326         if (bus->glomd) {
3327                 pfirst = plast = pnext = NULL;
3328                 dlen = (u16) (bus->glomd->len);
3329                 dptr = bus->glomd->data;
3330                 if (!dlen || (dlen & 1)) {
3331                         DHD_ERROR(("%s: bad glomd len(%d), ignore descriptor\n",
3332                         __func__, dlen));
3333                         dlen = 0;
3334                 }
3335
3336                 for (totlen = num = 0; dlen; num++) {
3337                         /* Get (and move past) next length */
3338                         sublen = get_unaligned_le16(dptr);
3339                         dlen -= sizeof(u16);
3340                         dptr += sizeof(u16);
3341                         if ((sublen < SDPCM_HDRLEN) ||
3342                             ((num == 0) && (sublen < (2 * SDPCM_HDRLEN)))) {
3343                                 DHD_ERROR(("%s: descriptor len %d bad: %d\n",
3344                                            __func__, num, sublen));
3345                                 pnext = NULL;
3346                                 break;
3347                         }
3348                         if (sublen % BRCMF_SDALIGN) {
3349                                 DHD_ERROR(("%s: sublen %d not multiple of %d\n",
3350                                 __func__, sublen, BRCMF_SDALIGN));
3351                                 usechain = false;
3352                         }
3353                         totlen += sublen;
3354
3355                         /* For last frame, adjust read len so total
3356                                  is a block multiple */
3357                         if (!dlen) {
3358                                 sublen +=
3359                                     (roundup(totlen, bus->blocksize) - totlen);
3360                                 totlen = roundup(totlen, bus->blocksize);
3361                         }
3362
3363                         /* Allocate/chain packet for next subframe */
3364                         pnext = brcmu_pkt_buf_get_skb(sublen + BRCMF_SDALIGN);
3365                         if (pnext == NULL) {
3366                                 DHD_ERROR(("%s: bcm_pkt_buf_get_skb failed, "
3367                                         "num %d len %d\n", __func__,
3368                                         num, sublen));
3369                                 break;
3370                         }
3371                         ASSERT(!(pnext->prev));
3372                         if (!pfirst) {
3373                                 ASSERT(!plast);
3374                                 pfirst = plast = pnext;
3375                         } else {
3376                                 ASSERT(plast);
3377                                 plast->next = pnext;
3378                                 plast = pnext;
3379                         }
3380
3381                         /* Adhere to start alignment requirements */
3382                         PKTALIGN(pnext, sublen, BRCMF_SDALIGN);
3383                 }
3384
3385                 /* If all allocations succeeded, save packet chain
3386                          in bus structure */
3387                 if (pnext) {
3388                         DHD_GLOM(("%s: allocated %d-byte packet chain for %d "
3389                                 "subframes\n", __func__, totlen, num));
3390                         if (DHD_GLOM_ON() && bus->nextlen) {
3391                                 if (totlen != bus->nextlen) {
3392                                         DHD_GLOM(("%s: glomdesc mismatch: nextlen %d glomdesc %d " "rxseq %d\n",
3393                                                 __func__, bus->nextlen,
3394                                                 totlen, rxseq));
3395                                 }
3396                         }
3397                         bus->glom = pfirst;
3398                         pfirst = pnext = NULL;
3399                 } else {
3400                         if (pfirst)
3401                                 brcmu_pkt_buf_free_skb(pfirst);
3402                         bus->glom = NULL;
3403                         num = 0;
3404                 }
3405
3406                 /* Done with descriptor packet */
3407                 brcmu_pkt_buf_free_skb(bus->glomd);
3408                 bus->glomd = NULL;
3409                 bus->nextlen = 0;
3410         }
3411
3412         /* Ok -- either we just generated a packet chain,
3413                  or had one from before */
3414         if (bus->glom) {
3415                 if (DHD_GLOM_ON()) {
3416                         DHD_GLOM(("%s: try superframe read, packet chain:\n",
3417                                 __func__));
3418                         for (pnext = bus->glom; pnext; pnext = pnext->next) {
3419                                 DHD_GLOM(("    %p: %p len 0x%04x (%d)\n",
3420                                           pnext, (u8 *) (pnext->data),
3421                                           pnext->len, pnext->len));
3422                         }
3423                 }
3424
3425                 pfirst = bus->glom;
3426                 dlen = (u16) brcmu_pkttotlen(pfirst);
3427
3428                 /* Do an SDIO read for the superframe.  Configurable iovar to
3429                  * read directly into the chained packet, or allocate a large
3430                  * packet and and copy into the chain.
3431                  */
3432                 if (usechain) {
3433                         errcode = brcmf_sdcard_recv_buf(bus->sdh,
3434                                         brcmf_sdcard_cur_sbwad(bus->sdh),
3435                                         SDIO_FUNC_2,
3436                                         F2SYNC, (u8 *) pfirst->data, dlen,
3437                                         pfirst, NULL, NULL);
3438                 } else if (bus->dataptr) {
3439                         errcode = brcmf_sdcard_recv_buf(bus->sdh,
3440                                         brcmf_sdcard_cur_sbwad(bus->sdh),
3441                                         SDIO_FUNC_2,
3442                                         F2SYNC, bus->dataptr, dlen,
3443                                         NULL, NULL, NULL);
3444                         sublen = (u16) brcmu_pktfrombuf(pfirst, 0, dlen,
3445                                                 bus->dataptr);
3446                         if (sublen != dlen) {
3447                                 DHD_ERROR(("%s: FAILED TO COPY, dlen %d sublen %d\n",
3448                                         __func__, dlen, sublen));
3449                                 errcode = -1;
3450                         }
3451                         pnext = NULL;
3452                 } else {
3453                         DHD_ERROR(("COULDN'T ALLOC %d-BYTE GLOM, FORCE FAILURE\n",
3454                                 dlen));
3455                         errcode = -1;
3456                 }
3457                 bus->f2rxdata++;
3458                 ASSERT(errcode != -BCME_PENDING);
3459
3460                 /* On failure, kill the superframe, allow a couple retries */
3461                 if (errcode < 0) {
3462                         DHD_ERROR(("%s: glom read of %d bytes failed: %d\n",
3463                                    __func__, dlen, errcode));
3464                         bus->dhd->rx_errors++;
3465
3466                         if (bus->glomerr++ < 3) {
3467                                 brcmf_sdbrcm_rxfail(bus, true, true);
3468                         } else {
3469                                 bus->glomerr = 0;
3470                                 brcmf_sdbrcm_rxfail(bus, true, false);
3471                                 brcmu_pkt_buf_free_skb(bus->glom);
3472                                 bus->rxglomfail++;
3473                                 bus->glom = NULL;
3474                         }
3475                         return 0;
3476                 }
3477 #ifdef BCMDBG
3478                 if (DHD_GLOM_ON()) {
3479                         printk(KERN_DEBUG "SUPERFRAME:\n");
3480                         print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
3481                                 pfirst->data, min_t(int, pfirst->len, 48));
3482                 }
3483 #endif
3484
3485                 /* Validate the superframe header */
3486                 dptr = (u8 *) (pfirst->data);
3487                 sublen = get_unaligned_le16(dptr);
3488                 check = get_unaligned_le16(dptr + sizeof(u16));
3489
3490                 chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]);
3491                 seq = SDPCM_PACKET_SEQUENCE(&dptr[SDPCM_FRAMETAG_LEN]);
3492                 bus->nextlen = dptr[SDPCM_FRAMETAG_LEN + SDPCM_NEXTLEN_OFFSET];
3493                 if ((bus->nextlen << 4) > MAX_RX_DATASZ) {
3494                         DHD_INFO(("%s: nextlen too large (%d) seq %d\n",
3495                                 __func__, bus->nextlen, seq));
3496                         bus->nextlen = 0;
3497                 }
3498                 doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
3499                 txmax = SDPCM_WINDOW_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
3500
3501                 errcode = 0;
3502                 if ((u16)~(sublen ^ check)) {
3503                         DHD_ERROR(("%s (superframe): HW hdr error: len/check "
3504                                 "0x%04x/0x%04x\n", __func__, sublen, check));
3505                         errcode = -1;
3506                 } else if (roundup(sublen, bus->blocksize) != dlen) {
3507                         DHD_ERROR(("%s (superframe): len 0x%04x, rounded "
3508                                 "0x%04x, expect 0x%04x\n",
3509                                 __func__, sublen,
3510                                 roundup(sublen, bus->blocksize), dlen));
3511                         errcode = -1;
3512                 } else if (SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]) !=
3513                            SDPCM_GLOM_CHANNEL) {
3514                         DHD_ERROR(("%s (superframe): bad channel %d\n",
3515                                    __func__,
3516                                    SDPCM_PACKET_CHANNEL(&dptr
3517                                                         [SDPCM_FRAMETAG_LEN])));
3518                         errcode = -1;
3519                 } else if (SDPCM_GLOMDESC(&dptr[SDPCM_FRAMETAG_LEN])) {
3520                         DHD_ERROR(("%s (superframe): got second descriptor?\n",
3521                                    __func__));
3522                         errcode = -1;
3523                 } else if ((doff < SDPCM_HDRLEN) ||
3524                            (doff > (pfirst->len - SDPCM_HDRLEN))) {
3525                         DHD_ERROR(("%s (superframe): Bad data offset %d: HW %d "
3526                                 "pkt %d min %d\n",
3527                                 __func__, doff, sublen,
3528                                 pfirst->len, SDPCM_HDRLEN));
3529                         errcode = -1;
3530                 }
3531
3532                 /* Check sequence number of superframe SW header */
3533                 if (rxseq != seq) {
3534                         DHD_INFO(("%s: (superframe) rx_seq %d, expected %d\n",
3535                                   __func__, seq, rxseq));
3536                         bus->rx_badseq++;
3537                         rxseq = seq;
3538                 }
3539
3540                 /* Check window for sanity */
3541                 if ((u8) (txmax - bus->tx_seq) > 0x40) {
3542                         DHD_ERROR(("%s: unlikely tx max %d with tx_seq %d\n",
3543                                 __func__, txmax, bus->tx_seq));
3544                         txmax = bus->tx_seq + 2;
3545                 }
3546                 bus->tx_max = txmax;
3547
3548                 /* Remove superframe header, remember offset */
3549                 skb_pull(pfirst, doff);
3550                 sfdoff = doff;
3551
3552                 /* Validate all the subframe headers */
3553                 for (num = 0, pnext = pfirst; pnext && !errcode;
3554                      num++, pnext = pnext->next) {
3555                         dptr = (u8 *) (pnext->data);
3556                         dlen = (u16) (pnext->len);
3557                         sublen = get_unaligned_le16(dptr);
3558                         check = get_unaligned_le16(dptr + sizeof(u16));
3559                         chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]);
3560                         doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
3561 #ifdef BCMDBG
3562                         if (DHD_GLOM_ON()) {
3563                                 printk(KERN_DEBUG "subframe:\n");
3564                                 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
3565                                                      dptr, 32);
3566                         }
3567 #endif
3568
3569                         if ((u16)~(sublen ^ check)) {
3570                                 DHD_ERROR(("%s (subframe %d): HW hdr error: "
3571                                            "len/check 0x%04x/0x%04x\n",
3572                                            __func__, num, sublen, check));
3573                                 errcode = -1;
3574                         } else if ((sublen > dlen) || (sublen < SDPCM_HDRLEN)) {
3575                                 DHD_ERROR(("%s (subframe %d): length mismatch: "
3576                                            "len 0x%04x, expect 0x%04x\n",
3577                                            __func__, num, sublen, dlen));
3578                                 errcode = -1;
3579                         } else if ((chan != SDPCM_DATA_CHANNEL) &&
3580                                    (chan != SDPCM_EVENT_CHANNEL)) {
3581                                 DHD_ERROR(("%s (subframe %d): bad channel %d\n",
3582                                            __func__, num, chan));
3583                                 errcode = -1;
3584                         } else if ((doff < SDPCM_HDRLEN) || (doff > sublen)) {
3585                                 DHD_ERROR(("%s (subframe %d): Bad data offset %d: HW %d min %d\n",
3586                                         __func__, num, doff, sublen,
3587                                         SDPCM_HDRLEN));
3588                                 errcode = -1;
3589                         }
3590                 }
3591
3592                 if (errcode) {
3593                         /* Terminate frame on error, request
3594                                  a couple retries */
3595                         if (bus->glomerr++ < 3) {
3596                                 /* Restore superframe header space */
3597                                 skb_push(pfirst, sfdoff);
3598                                 brcmf_sdbrcm_rxfail(bus, true, true);
3599                         } else {
3600                                 bus->glomerr = 0;
3601                                 brcmf_sdbrcm_rxfail(bus, true, false);
3602                                 brcmu_pkt_buf_free_skb(bus->glom);
3603                                 bus->rxglomfail++;
3604                                 bus->glom = NULL;
3605                         }
3606                         bus->nextlen = 0;
3607                         return 0;
3608                 }
3609
3610                 /* Basic SD framing looks ok - process each packet (header) */
3611                 save_pfirst = pfirst;
3612                 bus->glom = NULL;
3613                 plast = NULL;
3614
3615                 for (num = 0; pfirst; rxseq++, pfirst = pnext) {
3616                         pnext = pfirst->next;
3617                         pfirst->next = NULL;
3618
3619                         dptr = (u8 *) (pfirst->data);
3620                         sublen = get_unaligned_le16(dptr);
3621                         chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]);
3622                         seq = SDPCM_PACKET_SEQUENCE(&dptr[SDPCM_FRAMETAG_LEN]);
3623                         doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
3624
3625                         DHD_GLOM(("%s: Get subframe %d, %p(%p/%d), sublen %d "
3626                                 "chan %d seq %d\n",
3627                                 __func__, num, pfirst, pfirst->data,
3628                                 pfirst->len, sublen, chan, seq));
3629
3630                         ASSERT((chan == SDPCM_DATA_CHANNEL)
3631                                || (chan == SDPCM_EVENT_CHANNEL));
3632
3633                         if (rxseq != seq) {
3634                                 DHD_GLOM(("%s: rx_seq %d, expected %d\n",
3635                                           __func__, seq, rxseq));
3636                                 bus->rx_badseq++;
3637                                 rxseq = seq;
3638                         }
3639 #ifdef BCMDBG
3640                         if (DHD_BYTES_ON() && DHD_DATA_ON()) {
3641                                 printk(KERN_DEBUG "Rx Subframe Data:\n");
3642                                 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
3643                                                      dptr, dlen);
3644                         }
3645 #endif
3646
3647                         __skb_trim(pfirst, sublen);
3648                         skb_pull(pfirst, doff);
3649
3650                         if (pfirst->len == 0) {
3651                                 brcmu_pkt_buf_free_skb(pfirst);
3652                                 if (plast) {
3653                                         plast->next = pnext;
3654                                 } else {
3655                                         ASSERT(save_pfirst == pfirst);
3656                                         save_pfirst = pnext;
3657                                 }
3658                                 continue;
3659                         } else if (brcmf_proto_hdrpull(bus->dhd, &ifidx, pfirst)
3660                                         != 0) {
3661                                 DHD_ERROR(("%s: rx protocol error\n",
3662                                            __func__));
3663                                 bus->dhd->rx_errors++;
3664                                 brcmu_pkt_buf_free_skb(pfirst);
3665                                 if (plast) {
3666                                         plast->next = pnext;
3667                                 } else {
3668                                         ASSERT(save_pfirst == pfirst);
3669                                         save_pfirst = pnext;
3670                                 }
3671                                 continue;
3672                         }
3673
3674                         /* this packet will go up, link back into
3675                                  chain and count it */
3676                         pfirst->next = pnext;
3677                         plast = pfirst;
3678                         num++;
3679
3680 #ifdef BCMDBG
3681                         if (DHD_GLOM_ON()) {
3682                                 DHD_GLOM(("%s subframe %d to stack, %p(%p/%d) "
3683                                 "nxt/lnk %p/%p\n",
3684                                 __func__, num, pfirst, pfirst->data,
3685                                 pfirst->len, pfirst->next,
3686                                 pfirst->prev));
3687                                 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
3688                                                 pfirst->data,
3689                                                 min_t(int, pfirst->len, 32));
3690                         }
3691 #endif                          /* BCMDBG */
3692                 }
3693                 if (num) {
3694                         brcmf_os_sdunlock(bus->dhd);
3695                         brcmf_rx_frame(bus->dhd, ifidx, save_pfirst, num);
3696                         brcmf_os_sdlock(bus->dhd);
3697                 }
3698
3699                 bus->rxglomframes++;
3700                 bus->rxglompkts += num;
3701         }
3702         return num;
3703 }
3704
3705 /* Return true if there may be more frames to read */
3706 static uint
3707 brcmf_sdbrcm_readframes(dhd_bus_t *bus, uint maxframes, bool *finished)
3708 {
3709         struct brcmf_sdio *sdh = bus->sdh;
3710
3711         u16 len, check; /* Extracted hardware header fields */
3712         u8 chan, seq, doff;     /* Extracted software header fields */
3713         u8 fcbits;              /* Extracted fcbits from software header */
3714
3715         struct sk_buff *pkt;            /* Packet for event or data frames */
3716         u16 pad;                /* Number of pad bytes to read */
3717         u16 rdlen;              /* Total number of bytes to read */
3718         u8 rxseq;               /* Next sequence number to expect */
3719         uint rxleft = 0;        /* Remaining number of frames allowed */
3720         int sdret;              /* Return code from bcmsdh calls */
3721         u8 txmax;               /* Maximum tx sequence offered */
3722         bool len_consistent;    /* Result of comparing readahead len and
3723                                          len from hw-hdr */
3724         u8 *rxbuf;
3725         int ifidx = 0;
3726         uint rxcount = 0;       /* Total frames read */
3727
3728 #if defined(BCMDBG) || defined(SDTEST)
3729         bool sdtest = false;    /* To limit message spew from test mode */
3730 #endif
3731
3732         DHD_TRACE(("%s: Enter\n", __func__));
3733
3734         ASSERT(maxframes);
3735
3736 #ifdef SDTEST
3737         /* Allow pktgen to override maxframes */
3738         if (bus->pktgen_count && (bus->pktgen_mode == DHD_PKTGEN_RECV)) {
3739                 maxframes = bus->pktgen_count;
3740                 sdtest = true;
3741         }
3742 #endif
3743
3744         /* Not finished unless we encounter no more frames indication */
3745         *finished = false;
3746
3747         for (rxseq = bus->rx_seq, rxleft = maxframes;
3748              !bus->rxskip && rxleft && bus->dhd->busstate != DHD_BUS_DOWN;
3749              rxseq++, rxleft--) {
3750
3751                 /* Handle glomming separately */
3752                 if (bus->glom || bus->glomd) {
3753                         u8 cnt;
3754                         DHD_GLOM(("%s: calling rxglom: glomd %p, glom %p\n",
3755                                   __func__, bus->glomd, bus->glom));
3756                         cnt = brcmf_sdbrcm_rxglom(bus, rxseq);
3757                         DHD_GLOM(("%s: rxglom returned %d\n", __func__, cnt));
3758                         rxseq += cnt - 1;
3759                         rxleft = (rxleft > cnt) ? (rxleft - cnt) : 1;
3760                         continue;
3761                 }
3762
3763                 /* Try doing single read if we can */
3764                 if (dhd_readahead && bus->nextlen) {
3765                         u16 nextlen = bus->nextlen;
3766                         bus->nextlen = 0;
3767
3768                         if (bus->bus == SPI_BUS) {
3769                                 rdlen = len = nextlen;
3770                         } else {
3771                                 rdlen = len = nextlen << 4;
3772
3773                                 /* Pad read to blocksize for efficiency */
3774                                 if (bus->roundup && bus->blocksize
3775                                     && (rdlen > bus->blocksize)) {
3776                                         pad =
3777                                             bus->blocksize -
3778                                             (rdlen % bus->blocksize);
3779                                         if ((pad <= bus->roundup)
3780                                             && (pad < bus->blocksize)
3781                                             && ((rdlen + pad + firstread) <
3782                                                 MAX_RX_DATASZ))
3783                                                 rdlen += pad;
3784                                 } else if (rdlen % BRCMF_SDALIGN) {
3785                                         rdlen +=
3786                                             BRCMF_SDALIGN - (rdlen % BRCMF_SDALIGN);
3787                                 }
3788                         }
3789
3790                         /* We use bus->rxctl buffer in WinXP for initial
3791                          * control pkt receives.
3792                          * Later we use buffer-poll for data as well
3793                          * as control packets.
3794                          * This is required because dhd receives full
3795                          * frame in gSPI unlike SDIO.
3796                          * After the frame is received we have to
3797                          * distinguish whether it is data
3798                          * or non-data frame.
3799                          */
3800                         /* Allocate a packet buffer */
3801                         pkt = brcmu_pkt_buf_get_skb(rdlen + BRCMF_SDALIGN);
3802                         if (!pkt) {
3803                                 if (bus->bus == SPI_BUS) {
3804                                         bus->usebufpool = false;
3805                                         bus->rxctl = bus->rxbuf;
3806                                         if (dhd_alignctl) {
3807                                                 bus->rxctl += firstread;
3808                                                 pad = ((unsigned long)bus->rxctl %
3809                                                       BRCMF_SDALIGN);
3810                                                 if (pad)
3811                                                         bus->rxctl +=
3812                                                             (BRCMF_SDALIGN - pad);
3813                                                 bus->rxctl -= firstread;
3814                                         }
3815                                         ASSERT(bus->rxctl >= bus->rxbuf);
3816                                         rxbuf = bus->rxctl;
3817                                         /* Read the entire frame */
3818                                         sdret = brcmf_sdcard_recv_buf(sdh,
3819                                                     brcmf_sdcard_cur_sbwad(sdh),
3820                                                     SDIO_FUNC_2, F2SYNC,
3821                                                     rxbuf, rdlen,
3822                                                     NULL, NULL, NULL);
3823                                         bus->f2rxdata++;
3824                                         ASSERT(sdret != -BCME_PENDING);
3825
3826                                         /* Control frame failures need
3827                                          retransmission */
3828                                         if (sdret < 0) {
3829                                                 DHD_ERROR(("%s: read %d control bytes failed: %d\n",
3830                                                         __func__,
3831                                                         rdlen, sdret));
3832                                                 /* dhd.rx_ctlerrs is higher */
3833                                                 bus->rxc_errors++;
3834                                                 brcmf_sdbrcm_rxfail(bus, true,
3835                                                        (bus->bus ==
3836                                                         SPI_BUS) ? false
3837                                                        : true);
3838                                                 continue;
3839                                         }
3840                                 } else {
3841                                         /* Give up on data,
3842                                         request rtx of events */
3843                                         DHD_ERROR(("%s (nextlen): "
3844                                                    "brcmu_pkt_buf_get_skb "
3845                                                    "failed:"
3846                                                    " len %d rdlen %d expected"
3847                                                    " rxseq %d\n", __func__,
3848                                                    len, rdlen, rxseq));
3849                                         continue;
3850                                 }
3851                         } else {
3852                                 if (bus->bus == SPI_BUS)
3853                                         bus->usebufpool = true;
3854
3855                                 ASSERT(!(pkt->prev));
3856                                 PKTALIGN(pkt, rdlen, BRCMF_SDALIGN);
3857                                 rxbuf = (u8 *) (pkt->data);
3858                                 /* Read the entire frame */
3859                                 sdret = brcmf_sdcard_recv_buf(sdh,
3860                                                 brcmf_sdcard_cur_sbwad(sdh),
3861                                                 SDIO_FUNC_2, F2SYNC,
3862                                                 rxbuf, rdlen,
3863                                                 pkt, NULL, NULL);
3864                                 bus->f2rxdata++;
3865                                 ASSERT(sdret != -BCME_PENDING);
3866
3867                                 if (sdret < 0) {
3868                                         DHD_ERROR(("%s (nextlen): read %d bytes failed: %d\n",
3869                                                 __func__, rdlen, sdret));
3870                                         brcmu_pkt_buf_free_skb(pkt);
3871                                         bus->dhd->rx_errors++;
3872                                         /* Force retry w/normal header read.
3873                                          * Don't attempt NAK for
3874                                          * gSPI
3875                                          */
3876                                         brcmf_sdbrcm_rxfail(bus, true,
3877                                                        (bus->bus ==
3878                                                         SPI_BUS) ? false :
3879                                                        true);
3880                                         continue;
3881                                 }
3882                         }
3883
3884                         /* Now check the header */
3885                         memcpy(bus->rxhdr, rxbuf, SDPCM_HDRLEN);
3886
3887                         /* Extract hardware header fields */
3888                         len = get_unaligned_le16(bus->rxhdr);
3889                         check = get_unaligned_le16(bus->rxhdr + sizeof(u16));
3890
3891                         /* All zeros means readahead info was bad */
3892                         if (!(len | check)) {
3893                                 DHD_INFO(("%s (nextlen): read zeros in HW "
3894                                         "header???\n", __func__));
3895                                 brcmf_sdbrcm_pktfree2(bus, pkt);
3896                                 continue;
3897                         }
3898
3899                         /* Validate check bytes */
3900                         if ((u16)~(len ^ check)) {
3901                                 DHD_ERROR(("%s (nextlen): HW hdr error:"
3902                                         " nextlen/len/check"
3903                                         " 0x%04x/0x%04x/0x%04x\n",
3904                                         __func__, nextlen, len, check));
3905                                 bus->rx_badhdr++;
3906                                 brcmf_sdbrcm_rxfail(bus, false, false);
3907                                 brcmf_sdbrcm_pktfree2(bus, pkt);
3908                                 continue;
3909                         }
3910
3911                         /* Validate frame length */
3912                         if (len < SDPCM_HDRLEN) {
3913                                 DHD_ERROR(("%s (nextlen): HW hdr length "
3914                                         "invalid: %d\n", __func__, len));
3915                                 brcmf_sdbrcm_pktfree2(bus, pkt);
3916                                 continue;
3917                         }
3918
3919                         /* Check for consistency withreadahead info */
3920                         len_consistent = (nextlen != (roundup(len, 16) >> 4));
3921                         if (len_consistent) {
3922                                 /* Mismatch, force retry w/normal
3923                                         header (may be >4K) */
3924                                 DHD_ERROR(("%s (nextlen): mismatch, "
3925                                         "nextlen %d len %d rnd %d; "
3926                                         "expected rxseq %d\n",
3927                                         __func__, nextlen,
3928                                         len, roundup(len, 16), rxseq));
3929                                 brcmf_sdbrcm_rxfail(bus, true,
3930                                                   bus->bus != SPI_BUS);
3931                                 brcmf_sdbrcm_pktfree2(bus, pkt);
3932                                 continue;
3933                         }
3934
3935                         /* Extract software header fields */
3936                         chan = SDPCM_PACKET_CHANNEL(
3937                                         &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
3938                         seq = SDPCM_PACKET_SEQUENCE(
3939                                         &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
3940                         doff = SDPCM_DOFFSET_VALUE(
3941                                         &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
3942                         txmax = SDPCM_WINDOW_VALUE(
3943                                         &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
3944
3945                         bus->nextlen =
3946                             bus->rxhdr[SDPCM_FRAMETAG_LEN +
3947                                        SDPCM_NEXTLEN_OFFSET];
3948                         if ((bus->nextlen << 4) > MAX_RX_DATASZ) {
3949                                 DHD_INFO(("%s (nextlen): got frame w/nextlen too large" " (%d), seq %d\n",
3950                                         __func__, bus->nextlen, seq));
3951                                 bus->nextlen = 0;
3952                         }
3953
3954                         bus->dhd->rx_readahead_cnt++;
3955
3956                         /* Handle Flow Control */
3957                         fcbits = SDPCM_FCMASK_VALUE(
3958                                         &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
3959
3960                         if (bus->flowcontrol != fcbits) {
3961                                 if (~bus->flowcontrol & fcbits)
3962                                         bus->fc_xoff++;
3963
3964                                 if (bus->flowcontrol & ~fcbits)
3965                                         bus->fc_xon++;
3966
3967                                 bus->fc_rcvd++;
3968                                 bus->flowcontrol = fcbits;
3969                         }
3970
3971                         /* Check and update sequence number */
3972                         if (rxseq != seq) {
3973                                 DHD_INFO(("%s (nextlen): rx_seq %d, expected "
3974                                         "%d\n", __func__, seq, rxseq));
3975                                 bus->rx_badseq++;
3976                                 rxseq = seq;
3977                         }
3978
3979                         /* Check window for sanity */
3980                         if ((u8) (txmax - bus->tx_seq) > 0x40) {
3981                                 DHD_ERROR(("%s: got unlikely tx max %d with "
3982                                         "tx_seq %d\n",
3983                                         __func__, txmax, bus->tx_seq));
3984                                 txmax = bus->tx_seq + 2;
3985                         }
3986                         bus->tx_max = txmax;
3987
3988 #ifdef BCMDBG
3989                         if (DHD_BYTES_ON() && DHD_DATA_ON()) {
3990                                 printk(KERN_DEBUG "Rx Data:\n");
3991                                 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
3992                                                      rxbuf, len);
3993                         } else if (DHD_HDRS_ON()) {
3994                                 printk(KERN_DEBUG "RxHdr:\n");
3995                                 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
3996                                                      bus->rxhdr, SDPCM_HDRLEN);
3997                         }
3998 #endif
3999
4000                         if (chan == SDPCM_CONTROL_CHANNEL) {
4001                                 if (bus->bus == SPI_BUS) {
4002                                         brcmf_sdbrcm_read_control(bus, rxbuf,
4003                                                                   len, doff);
4004                                 } else {
4005                                         DHD_ERROR(("%s (nextlen): readahead on control" " packet %d?\n",
4006                                                 __func__, seq));
4007                                         /* Force retry w/normal header read */
4008                                         bus->nextlen = 0;
4009                                         brcmf_sdbrcm_rxfail(bus, false, true);
4010                                 }
4011                                 brcmf_sdbrcm_pktfree2(bus, pkt);
4012                                 continue;
4013                         }
4014
4015                         if ((bus->bus == SPI_BUS) && !bus->usebufpool) {
4016                                 DHD_ERROR(("Received %d bytes on %d channel. Running out of " "rx pktbuf's or not yet malloced.\n",
4017                                         len, chan));
4018                                 continue;
4019                         }
4020
4021                         /* Validate data offset */
4022                         if ((doff < SDPCM_HDRLEN) || (doff > len)) {
4023                                 DHD_ERROR(("%s (nextlen): bad data offset %d: HW len %d min %d\n",
4024                                         __func__, doff, len, SDPCM_HDRLEN));
4025                                 brcmf_sdbrcm_rxfail(bus, false, false);
4026                                 brcmf_sdbrcm_pktfree2(bus, pkt);
4027                                 continue;
4028                         }
4029
4030                         /* All done with this one -- now deliver the packet */
4031                         goto deliver;
4032                 }
4033                 /* gSPI frames should not be handled in fractions */
4034                 if (bus->bus == SPI_BUS)
4035                         break;
4036
4037                 /* Read frame header (hardware and software) */
4038                 sdret = brcmf_sdcard_recv_buf(sdh, brcmf_sdcard_cur_sbwad(sdh),
4039                                 SDIO_FUNC_2, F2SYNC, bus->rxhdr, firstread,
4040                                 NULL, NULL, NULL);
4041                 bus->f2rxhdrs++;
4042                 ASSERT(sdret != -BCME_PENDING);
4043
4044                 if (sdret < 0) {
4045                         DHD_ERROR(("%s: RXHEADER FAILED: %d\n", __func__,
4046                                    sdret));
4047                         bus->rx_hdrfail++;
4048                         brcmf_sdbrcm_rxfail(bus, true, true);
4049                         continue;
4050                 }
4051 #ifdef BCMDBG
4052                 if (DHD_BYTES_ON() || DHD_HDRS_ON()) {
4053                         printk(KERN_DEBUG "RxHdr:\n");
4054                         print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
4055                                              bus->rxhdr, SDPCM_HDRLEN);
4056                 }
4057 #endif
4058
4059                 /* Extract hardware header fields */
4060                 len = get_unaligned_le16(bus->rxhdr);
4061                 check = get_unaligned_le16(bus->rxhdr + sizeof(u16));
4062
4063                 /* All zeros means no more frames */
4064                 if (!(len | check)) {
4065                         *finished = true;
4066                         break;
4067                 }
4068
4069                 /* Validate check bytes */
4070                 if ((u16) ~(len ^ check)) {
4071                         DHD_ERROR(("%s: HW hdr err: len/check 0x%04x/0x%04x\n",
4072                                 __func__, len, check));
4073                         bus->rx_badhdr++;
4074                         brcmf_sdbrcm_rxfail(bus, false, false);
4075                         continue;
4076                 }
4077
4078                 /* Validate frame length */
4079                 if (len < SDPCM_HDRLEN) {
4080                         DHD_ERROR(("%s: HW hdr length invalid: %d\n",
4081                                    __func__, len));
4082                         continue;
4083                 }
4084
4085                 /* Extract software header fields */
4086                 chan = SDPCM_PACKET_CHANNEL(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
4087                 seq = SDPCM_PACKET_SEQUENCE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
4088                 doff = SDPCM_DOFFSET_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
4089                 txmax = SDPCM_WINDOW_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
4090
4091                 /* Validate data offset */
4092                 if ((doff < SDPCM_HDRLEN) || (doff > len)) {
4093                         DHD_ERROR(("%s: Bad data offset %d: HW len %d, min %d "
4094                                 "seq %d\n",
4095                                 __func__, doff, len, SDPCM_HDRLEN, seq));
4096                         bus->rx_badhdr++;
4097                         ASSERT(0);
4098                         brcmf_sdbrcm_rxfail(bus, false, false);
4099                         continue;
4100                 }
4101
4102                 /* Save the readahead length if there is one */
4103                 bus->nextlen =
4104                     bus->rxhdr[SDPCM_FRAMETAG_LEN + SDPCM_NEXTLEN_OFFSET];
4105                 if ((bus->nextlen << 4) > MAX_RX_DATASZ) {
4106                         DHD_INFO(("%s (nextlen): got frame w/nextlen too large "
4107                                 "(%d), seq %d\n",
4108                                 __func__, bus->nextlen, seq));
4109                         bus->nextlen = 0;
4110                 }
4111
4112                 /* Handle Flow Control */
4113                 fcbits = SDPCM_FCMASK_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
4114
4115                 if (bus->flowcontrol != fcbits) {
4116                         if (~bus->flowcontrol & fcbits)
4117                                 bus->fc_xoff++;
4118
4119                         if (bus->flowcontrol & ~fcbits)
4120                                 bus->fc_xon++;
4121
4122                         bus->fc_rcvd++;
4123                         bus->flowcontrol = fcbits;
4124                 }
4125
4126                 /* Check and update sequence number */
4127                 if (rxseq != seq) {
4128                         DHD_INFO(("%s: rx_seq %d, expected %d\n", __func__,
4129                                   seq, rxseq));
4130                         bus->rx_badseq++;
4131                         rxseq = seq;
4132                 }
4133
4134                 /* Check window for sanity */
4135                 if ((u8) (txmax - bus->tx_seq) > 0x40) {
4136                         DHD_ERROR(("%s: unlikely tx max %d with tx_seq %d\n",
4137                                 __func__, txmax, bus->tx_seq));
4138                         txmax = bus->tx_seq + 2;
4139                 }
4140                 bus->tx_max = txmax;
4141
4142                 /* Call a separate function for control frames */
4143                 if (chan == SDPCM_CONTROL_CHANNEL) {
4144                         brcmf_sdbrcm_read_control(bus, bus->rxhdr, len, doff);
4145                         continue;
4146                 }
4147
4148                 ASSERT((chan == SDPCM_DATA_CHANNEL)
4149                        || (chan == SDPCM_EVENT_CHANNEL)
4150                        || (chan == SDPCM_TEST_CHANNEL)
4151                        || (chan == SDPCM_GLOM_CHANNEL));
4152
4153                 /* Length to read */
4154                 rdlen = (len > firstread) ? (len - firstread) : 0;
4155
4156                 /* May pad read to blocksize for efficiency */
4157                 if (bus->roundup && bus->blocksize &&
4158                         (rdlen > bus->blocksize)) {
4159                         pad = bus->blocksize - (rdlen % bus->blocksize);
4160                         if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
4161                             ((rdlen + pad + firstread) < MAX_RX_DATASZ))
4162                                 rdlen += pad;
4163                 } else if (rdlen % BRCMF_SDALIGN) {
4164                         rdlen += BRCMF_SDALIGN - (rdlen % BRCMF_SDALIGN);
4165                 }
4166
4167                 /* Satisfy length-alignment requirements */
4168                 if (forcealign && (rdlen & (ALIGNMENT - 1)))
4169                         rdlen = roundup(rdlen, ALIGNMENT);
4170
4171                 if ((rdlen + firstread) > MAX_RX_DATASZ) {
4172                         /* Too long -- skip this frame */
4173                         DHD_ERROR(("%s: too long: len %d rdlen %d\n",
4174                                    __func__, len, rdlen));
4175                         bus->dhd->rx_errors++;
4176                         bus->rx_toolong++;
4177                         brcmf_sdbrcm_rxfail(bus, false, false);
4178                         continue;
4179                 }
4180
4181                 pkt = brcmu_pkt_buf_get_skb(rdlen + firstread + BRCMF_SDALIGN);
4182                 if (!pkt) {
4183                         /* Give up on data, request rtx of events */
4184                         DHD_ERROR(("%s: brcmu_pkt_buf_get_skb failed: rdlen %d"
4185                                    " chan %d\n", __func__, rdlen, chan));
4186                         bus->dhd->rx_dropped++;
4187                         brcmf_sdbrcm_rxfail(bus, false, RETRYCHAN(chan));
4188                         continue;
4189                 }
4190
4191                 ASSERT(!(pkt->prev));
4192
4193                 /* Leave room for what we already read, and align remainder */
4194                 ASSERT(firstread < pkt->len);
4195                 skb_pull(pkt, firstread);
4196                 PKTALIGN(pkt, rdlen, BRCMF_SDALIGN);
4197
4198                 /* Read the remaining frame data */
4199                 sdret = brcmf_sdcard_recv_buf(sdh, brcmf_sdcard_cur_sbwad(sdh),
4200                                 SDIO_FUNC_2, F2SYNC, ((u8 *) (pkt->data)),
4201                                 rdlen, pkt, NULL, NULL);
4202                 bus->f2rxdata++;
4203                 ASSERT(sdret != -BCME_PENDING);
4204
4205                 if (sdret < 0) {
4206                         DHD_ERROR(("%s: read %d %s bytes failed: %d\n",
4207                                    __func__, rdlen,
4208                                    ((chan ==
4209                                      SDPCM_EVENT_CHANNEL) ? "event" : ((chan ==
4210                                         SDPCM_DATA_CHANNEL)
4211                                        ? "data" : "test")),
4212                                    sdret));
4213                         brcmu_pkt_buf_free_skb(pkt);
4214                         bus->dhd->rx_errors++;
4215                         brcmf_sdbrcm_rxfail(bus, true, RETRYCHAN(chan));
4216                         continue;
4217                 }
4218
4219                 /* Copy the already-read portion */
4220                 skb_push(pkt, firstread);
4221                 memcpy(pkt->data, bus->rxhdr, firstread);
4222
4223 #ifdef BCMDBG
4224                 if (DHD_BYTES_ON() && DHD_DATA_ON()) {
4225                         printk(KERN_DEBUG "Rx Data:\n");
4226                         print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
4227                                              pkt->data, len);
4228                 }
4229 #endif
4230
4231 deliver:
4232                 /* Save superframe descriptor and allocate packet frame */
4233                 if (chan == SDPCM_GLOM_CHANNEL) {
4234                         if (SDPCM_GLOMDESC(&bus->rxhdr[SDPCM_FRAMETAG_LEN])) {
4235                                 DHD_GLOM(("%s: glom descriptor, %d bytes:\n",
4236                                         __func__, len));
4237 #ifdef BCMDBG
4238                                 if (DHD_GLOM_ON()) {
4239                                         printk(KERN_DEBUG "Glom Data:\n");
4240                                         print_hex_dump_bytes("",
4241                                                              DUMP_PREFIX_OFFSET,
4242                                                              pkt->data, len);
4243                                 }
4244 #endif
4245                                 __skb_trim(pkt, len);
4246                                 ASSERT(doff == SDPCM_HDRLEN);
4247                                 skb_pull(pkt, SDPCM_HDRLEN);
4248                                 bus->glomd = pkt;
4249                         } else {
4250                                 DHD_ERROR(("%s: glom superframe w/o "
4251                                         "descriptor!\n", __func__));
4252                                 brcmf_sdbrcm_rxfail(bus, false, false);
4253                         }
4254                         continue;
4255                 }
4256
4257                 /* Fill in packet len and prio, deliver upward */
4258                 __skb_trim(pkt, len);
4259                 skb_pull(pkt, doff);
4260
4261 #ifdef SDTEST
4262                 /* Test channel packets are processed separately */
4263                 if (chan == SDPCM_TEST_CHANNEL) {
4264                         brcmf_sdbrcm_checkdied(bus, pkt, seq);
4265                         continue;
4266                 }
4267 #endif                          /* SDTEST */
4268
4269                 if (pkt->len == 0) {
4270                         brcmu_pkt_buf_free_skb(pkt);
4271                         continue;
4272                 } else if (brcmf_proto_hdrpull(bus->dhd, &ifidx, pkt) != 0) {
4273                         DHD_ERROR(("%s: rx protocol error\n", __func__));
4274                         brcmu_pkt_buf_free_skb(pkt);
4275                         bus->dhd->rx_errors++;
4276                         continue;
4277                 }
4278
4279                 /* Unlock during rx call */
4280                 brcmf_os_sdunlock(bus->dhd);
4281                 brcmf_rx_frame(bus->dhd, ifidx, pkt, 1);
4282                 brcmf_os_sdlock(bus->dhd);
4283         }
4284         rxcount = maxframes - rxleft;
4285 #ifdef BCMDBG
4286         /* Message if we hit the limit */
4287         if (!rxleft && !sdtest)
4288                 DHD_DATA(("%s: hit rx limit of %d frames\n", __func__,
4289                           maxframes));
4290         else
4291 #endif                          /* BCMDBG */
4292                 DHD_DATA(("%s: processed %d frames\n", __func__, rxcount));
4293         /* Back off rxseq if awaiting rtx, update rx_seq */
4294         if (bus->rxskip)
4295                 rxseq--;
4296         bus->rx_seq = rxseq;
4297
4298         return rxcount;
4299 }
4300
4301 static u32 brcmf_sdbrcm_hostmail(dhd_bus_t *bus)
4302 {
4303         struct sdpcmd_regs *regs = bus->regs;
4304         u32 intstatus = 0;
4305         u32 hmb_data;
4306         u8 fcbits;
4307         uint retries = 0;
4308
4309         DHD_TRACE(("%s: Enter\n", __func__));
4310
4311         /* Read mailbox data and ack that we did so */
4312         R_SDREG(hmb_data, &regs->tohostmailboxdata, retries);
4313         if (retries <= retry_limit)
4314                 W_SDREG(SMB_INT_ACK, &regs->tosbmailbox, retries);
4315         bus->f1regdata += 2;
4316
4317         /* Dongle recomposed rx frames, accept them again */
4318         if (hmb_data & HMB_DATA_NAKHANDLED) {
4319                 DHD_INFO(("Dongle reports NAK handled, expect rtx of %d\n",
4320                           bus->rx_seq));
4321                 if (!bus->rxskip)
4322                         DHD_ERROR(("%s: unexpected NAKHANDLED!\n", __func__));
4323
4324                 bus->rxskip = false;
4325                 intstatus |= I_HMB_FRAME_IND;
4326         }
4327
4328         /*
4329          * DEVREADY does not occur with gSPI.
4330          */
4331         if (hmb_data & (HMB_DATA_DEVREADY | HMB_DATA_FWREADY)) {
4332                 bus->sdpcm_ver =
4333                     (hmb_data & HMB_DATA_VERSION_MASK) >>
4334                     HMB_DATA_VERSION_SHIFT;
4335                 if (bus->sdpcm_ver != SDPCM_PROT_VERSION)
4336                         DHD_ERROR(("Version mismatch, dongle reports %d, "
4337                                 "expecting %d\n",
4338                                 bus->sdpcm_ver, SDPCM_PROT_VERSION));
4339                 else
4340                         DHD_INFO(("Dongle ready, protocol version %d\n",
4341                                   bus->sdpcm_ver));
4342         }
4343
4344         /*
4345          * Flow Control has been moved into the RX headers and this out of band
4346          * method isn't used any more.
4347          * remaining backward compatible with older dongles.
4348          */
4349         if (hmb_data & HMB_DATA_FC) {
4350                 fcbits = (hmb_data & HMB_DATA_FCDATA_MASK) >>
4351                                                         HMB_DATA_FCDATA_SHIFT;
4352
4353                 if (fcbits & ~bus->flowcontrol)
4354                         bus->fc_xoff++;
4355
4356                 if (bus->flowcontrol & ~fcbits)
4357                         bus->fc_xon++;
4358
4359                 bus->fc_rcvd++;
4360                 bus->flowcontrol = fcbits;
4361         }
4362
4363         /* Shouldn't be any others */
4364         if (hmb_data & ~(HMB_DATA_DEVREADY |
4365                          HMB_DATA_NAKHANDLED |
4366                          HMB_DATA_FC |
4367                          HMB_DATA_FWREADY |
4368                          HMB_DATA_FCDATA_MASK | HMB_DATA_VERSION_MASK)) {
4369                 DHD_ERROR(("Unknown mailbox data content: 0x%02x\n", hmb_data));
4370         }
4371
4372         return intstatus;
4373 }
4374
4375 bool brcmf_sdbrcm_dpc(dhd_bus_t *bus)
4376 {
4377         struct brcmf_sdio *sdh = bus->sdh;
4378         struct sdpcmd_regs *regs = bus->regs;
4379         u32 intstatus, newstatus = 0;
4380         uint retries = 0;
4381         uint rxlimit = brcmf_rxbound;   /* Rx frames to read before resched */
4382         uint txlimit = brcmf_txbound;   /* Tx frames to send before resched */
4383         uint framecnt = 0;      /* Temporary counter of tx/rx frames */
4384         bool rxdone = true;     /* Flag for no more read data */
4385         bool resched = false;   /* Flag indicating resched wanted */
4386
4387         DHD_TRACE(("%s: Enter\n", __func__));
4388
4389         /* Start with leftover status bits */
4390         intstatus = bus->intstatus;
4391
4392         brcmf_os_sdlock(bus->dhd);
4393
4394         /* If waiting for HTAVAIL, check status */
4395         if (bus->clkstate == CLK_PENDING) {
4396                 int err;
4397                 u8 clkctl, devctl = 0;
4398
4399 #ifdef BCMDBG
4400                 /* Check for inconsistent device control */
4401                 devctl = brcmf_sdcard_cfg_read(sdh, SDIO_FUNC_1,
4402                                                SBSDIO_DEVICE_CTL, &err);
4403                 if (err) {
4404                         DHD_ERROR(("%s: error reading DEVCTL: %d\n",
4405                                    __func__, err));
4406                         bus->dhd->busstate = DHD_BUS_DOWN;
4407                 } else {
4408                         ASSERT(devctl & SBSDIO_DEVCTL_CA_INT_ONLY);
4409                 }
4410 #endif                          /* BCMDBG */
4411
4412                 /* Read CSR, if clock on switch to AVAIL, else ignore */
4413                 clkctl = brcmf_sdcard_cfg_read(sdh, SDIO_FUNC_1,
4414                                                SBSDIO_FUNC1_CHIPCLKCSR, &err);
4415                 if (err) {
4416                         DHD_ERROR(("%s: error reading CSR: %d\n", __func__,
4417                                    err));
4418                         bus->dhd->busstate = DHD_BUS_DOWN;
4419                 }
4420
4421                 DHD_INFO(("DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n", devctl,
4422                           clkctl));
4423
4424                 if (SBSDIO_HTAV(clkctl)) {
4425                         devctl = brcmf_sdcard_cfg_read(sdh, SDIO_FUNC_1,
4426                                                        SBSDIO_DEVICE_CTL, &err);
4427                         if (err) {
4428                                 DHD_ERROR(("%s: error reading DEVCTL: %d\n",
4429                                            __func__, err));
4430                                 bus->dhd->busstate = DHD_BUS_DOWN;
4431                         }
4432                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
4433                         brcmf_sdcard_cfg_write(sdh, SDIO_FUNC_1,
4434                                 SBSDIO_DEVICE_CTL, devctl, &err);
4435                         if (err) {
4436                                 DHD_ERROR(("%s: error writing DEVCTL: %d\n",
4437                                            __func__, err));
4438                                 bus->dhd->busstate = DHD_BUS_DOWN;
4439                         }
4440                         bus->clkstate = CLK_AVAIL;
4441                 } else {
4442                         goto clkwait;
4443                 }
4444         }
4445
4446         BUS_WAKE(bus);
4447
4448         /* Make sure backplane clock is on */
4449         brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, true);
4450         if (bus->clkstate == CLK_PENDING)
4451                 goto clkwait;
4452
4453         /* Pending interrupt indicates new device status */
4454         if (bus->ipend) {
4455                 bus->ipend = false;
4456                 R_SDREG(newstatus, &regs->intstatus, retries);
4457                 bus->f1regdata++;
4458                 if (brcmf_sdcard_regfail(bus->sdh))
4459                         newstatus = 0;
4460                 newstatus &= bus->hostintmask;
4461                 bus->fcstate = !!(newstatus & I_HMB_FC_STATE);
4462                 if (newstatus) {
4463                         W_SDREG(newstatus, &regs->intstatus, retries);
4464                         bus->f1regdata++;
4465                 }
4466         }
4467
4468         /* Merge new bits with previous */
4469         intstatus |= newstatus;
4470         bus->intstatus = 0;
4471
4472         /* Handle flow-control change: read new state in case our ack
4473          * crossed another change interrupt.  If change still set, assume
4474          * FC ON for safety, let next loop through do the debounce.
4475          */
4476         if (intstatus & I_HMB_FC_CHANGE) {
4477                 intstatus &= ~I_HMB_FC_CHANGE;
4478                 W_SDREG(I_HMB_FC_CHANGE, &regs->intstatus, retries);
4479                 R_SDREG(newstatus, &regs->intstatus, retries);
4480                 bus->f1regdata += 2;
4481                 bus->fcstate =
4482                     !!(newstatus & (I_HMB_FC_STATE | I_HMB_FC_CHANGE));
4483                 intstatus |= (newstatus & bus->hostintmask);
4484         }
4485
4486         /* Handle host mailbox indication */
4487         if (intstatus & I_HMB_HOST_INT) {
4488                 intstatus &= ~I_HMB_HOST_INT;
4489                 intstatus |= brcmf_sdbrcm_hostmail(bus);
4490         }
4491
4492         /* Generally don't ask for these, can get CRC errors... */
4493         if (intstatus & I_WR_OOSYNC) {
4494                 DHD_ERROR(("Dongle reports WR_OOSYNC\n"));
4495                 intstatus &= ~I_WR_OOSYNC;
4496         }
4497
4498         if (intstatus & I_RD_OOSYNC) {
4499                 DHD_ERROR(("Dongle reports RD_OOSYNC\n"));
4500                 intstatus &= ~I_RD_OOSYNC;
4501         }
4502
4503         if (intstatus & I_SBINT) {
4504                 DHD_ERROR(("Dongle reports SBINT\n"));
4505                 intstatus &= ~I_SBINT;
4506         }
4507
4508         /* Would be active due to wake-wlan in gSPI */
4509         if (intstatus & I_CHIPACTIVE) {
4510                 DHD_INFO(("Dongle reports CHIPACTIVE\n"));
4511                 intstatus &= ~I_CHIPACTIVE;
4512         }
4513
4514         /* Ignore frame indications if rxskip is set */
4515         if (bus->rxskip)
4516                 intstatus &= ~I_HMB_FRAME_IND;
4517
4518         /* On frame indication, read available frames */
4519         if (PKT_AVAILABLE()) {
4520                 framecnt = brcmf_sdbrcm_readframes(bus, rxlimit, &rxdone);
4521                 if (rxdone || bus->rxskip)
4522                         intstatus &= ~I_HMB_FRAME_IND;
4523                 rxlimit -= min(framecnt, rxlimit);
4524         }
4525
4526         /* Keep still-pending events for next scheduling */
4527         bus->intstatus = intstatus;
4528
4529 clkwait:
4530         /* Re-enable interrupts to detect new device events (mailbox, rx frame)
4531          * or clock availability.  (Allows tx loop to check ipend if desired.)
4532          * (Unless register access seems hosed, as we may not be able to ACK...)
4533          */
4534         if (bus->intr && bus->intdis && !brcmf_sdcard_regfail(sdh)) {
4535                 DHD_INTR(("%s: enable SDIO interrupts, rxdone %d framecnt %d\n",
4536                           __func__, rxdone, framecnt));
4537                 bus->intdis = false;
4538                 brcmf_sdcard_intr_enable(sdh);
4539         }
4540
4541         if (DATAOK(bus) && bus->ctrl_frame_stat &&
4542                 (bus->clkstate == CLK_AVAIL)) {
4543                 int ret, i;
4544
4545                 ret = brcmf_sdbrcm_send_buf(bus, brcmf_sdcard_cur_sbwad(sdh),
4546                         SDIO_FUNC_2, F2SYNC, (u8 *) bus->ctrl_frame_buf,
4547                         (u32) bus->ctrl_frame_len, NULL, NULL, NULL);
4548                 ASSERT(ret != -BCME_PENDING);
4549
4550                 if (ret < 0) {
4551                         /* On failure, abort the command and
4552                                 terminate the frame */
4553                         DHD_INFO(("%s: sdio error %d, abort command and "
4554                                 "terminate frame.\n", __func__, ret));
4555                         bus->tx_sderrs++;
4556
4557                         brcmf_sdcard_abort(sdh, SDIO_FUNC_2);
4558
4559                         brcmf_sdcard_cfg_write(sdh, SDIO_FUNC_1,
4560                                          SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM,
4561                                          NULL);
4562                         bus->f1regdata++;
4563
4564                         for (i = 0; i < 3; i++) {
4565                                 u8 hi, lo;
4566                                 hi = brcmf_sdcard_cfg_read(sdh, SDIO_FUNC_1,
4567                                                      SBSDIO_FUNC1_WFRAMEBCHI,
4568                                                      NULL);
4569                                 lo = brcmf_sdcard_cfg_read(sdh, SDIO_FUNC_1,
4570                                                      SBSDIO_FUNC1_WFRAMEBCLO,
4571                                                      NULL);
4572                                 bus->f1regdata += 2;
4573                                 if ((hi == 0) && (lo == 0))
4574                                         break;
4575                         }
4576
4577                 }
4578                 if (ret == 0)
4579                         bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
4580
4581                 DHD_INFO(("Return_dpc value is : %d\n", ret));
4582                 bus->ctrl_frame_stat = false;
4583                 brcmf_sdbrcm_wait_event_wakeup(bus);
4584         }
4585         /* Send queued frames (limit 1 if rx may still be pending) */
4586         else if ((bus->clkstate == CLK_AVAIL) && !bus->fcstate &&
4587                  brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit
4588                  && DATAOK(bus)) {
4589                 framecnt = rxdone ? txlimit : min(txlimit, dhd_txminmax);
4590                 framecnt = brcmf_sdbrcm_sendfromq(bus, framecnt);
4591                 txlimit -= framecnt;
4592         }
4593
4594         /* Resched if events or tx frames are pending,
4595                  else await next interrupt */
4596         /* On failed register access, all bets are off:
4597                  no resched or interrupts */
4598         if ((bus->dhd->busstate == DHD_BUS_DOWN) || brcmf_sdcard_regfail(sdh)) {
4599                 DHD_ERROR(("%s: failed backplane access over SDIO, halting "
4600                         "operation %d\n", __func__, brcmf_sdcard_regfail(sdh)));
4601                 bus->dhd->busstate = DHD_BUS_DOWN;
4602                 bus->intstatus = 0;
4603         } else if (bus->clkstate == CLK_PENDING) {
4604                 DHD_INFO(("%s: rescheduled due to CLK_PENDING awaiting "
4605                         "I_CHIPACTIVE interrupt\n", __func__));
4606                 resched = true;
4607         } else if (bus->intstatus || bus->ipend ||
4608                 (!bus->fcstate && brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol)
4609                  && DATAOK(bus)) || PKT_AVAILABLE()) {
4610                 resched = true;
4611         }
4612
4613         bus->dpc_sched = resched;
4614
4615         /* If we're done for now, turn off clock request. */
4616         if ((bus->clkstate != CLK_PENDING)
4617             && bus->idletime == DHD_IDLE_IMMEDIATE) {
4618                 bus->activity = false;
4619                 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
4620         }
4621
4622         brcmf_os_sdunlock(bus->dhd);
4623
4624         return resched;
4625 }
4626
4627 bool dhd_bus_dpc(struct dhd_bus *bus)
4628 {
4629         bool resched;
4630
4631         /* Call the DPC directly. */
4632         DHD_TRACE(("Calling brcmf_sdbrcm_dpc() from %s\n", __func__));
4633         resched = brcmf_sdbrcm_dpc(bus);
4634
4635         return resched;
4636 }
4637
4638 void brcmf_sdbrcm_isr(void *arg)
4639 {
4640         dhd_bus_t *bus = (dhd_bus_t *) arg;
4641         struct brcmf_sdio *sdh;
4642
4643         DHD_TRACE(("%s: Enter\n", __func__));
4644
4645         if (!bus) {
4646                 DHD_ERROR(("%s : bus is null pointer , exit\n", __func__));
4647                 return;
4648         }
4649         sdh = bus->sdh;
4650
4651         if (bus->dhd->busstate == DHD_BUS_DOWN) {
4652                 DHD_ERROR(("%s : bus is down. we have nothing to do\n",
4653                            __func__));
4654                 return;
4655         }
4656         /* Count the interrupt call */
4657         bus->intrcount++;
4658         bus->ipend = true;
4659
4660         /* Shouldn't get this interrupt if we're sleeping? */
4661         if (bus->sleeping) {
4662                 DHD_ERROR(("INTERRUPT WHILE SLEEPING??\n"));
4663                 return;
4664         }
4665
4666         /* Disable additional interrupts (is this needed now)? */
4667         if (bus->intr)
4668                 DHD_INTR(("%s: disable SDIO interrupts\n", __func__));
4669         else
4670                 DHD_ERROR(("brcmf_sdbrcm_isr() w/o interrupt configured!\n"));
4671
4672         brcmf_sdcard_intr_disable(sdh);
4673         bus->intdis = true;
4674
4675 #if defined(SDIO_ISR_THREAD)
4676         DHD_TRACE(("Calling brcmf_sdbrcm_dpc() from %s\n", __func__));
4677         while (brcmf_sdbrcm_dpc(bus))
4678                 ;
4679 #else
4680         bus->dpc_sched = true;
4681         brcmf_sched_dpc(bus->dhd);
4682 #endif
4683
4684 }
4685
4686 #ifdef SDTEST
4687 static void brcmf_sdbrcm_pktgen_init(dhd_bus_t *bus)
4688 {
4689         /* Default to specified length, or full range */
4690         if (brcmf_pktgen_len) {
4691                 bus->pktgen_maxlen = min(brcmf_pktgen_len,
4692                                          BRCMF_MAX_PKTGEN_LEN);
4693                 bus->pktgen_minlen = bus->pktgen_maxlen;
4694         } else {
4695                 bus->pktgen_maxlen = BRCMF_MAX_PKTGEN_LEN;
4696                 bus->pktgen_minlen = 0;
4697         }
4698         bus->pktgen_len = (u16) bus->pktgen_minlen;
4699
4700         /* Default to per-watchdog burst with 10s print time */
4701         bus->pktgen_freq = 1;
4702         bus->pktgen_print = 10000 / brcmf_watchdog_ms;
4703         bus->pktgen_count = (brcmf_pktgen * brcmf_watchdog_ms + 999) / 1000;
4704
4705         /* Default to echo mode */
4706         bus->pktgen_mode = DHD_PKTGEN_ECHO;
4707         bus->pktgen_stop = 1;
4708 }
4709
4710 static void brcmf_sdbrcm_pktgen(dhd_bus_t *bus)
4711 {
4712         struct sk_buff *pkt;
4713         u8 *data;
4714         uint pktcount;
4715         uint fillbyte;
4716         u16 len;
4717
4718         /* Display current count if appropriate */
4719         if (bus->pktgen_print && (++bus->pktgen_ptick >= bus->pktgen_print)) {
4720                 bus->pktgen_ptick = 0;
4721                 printk(KERN_DEBUG "%s: send attempts %d rcvd %d\n",
4722                        __func__, bus->pktgen_sent, bus->pktgen_rcvd);
4723         }
4724
4725         /* For recv mode, just make sure dongle has started sending */
4726         if (bus->pktgen_mode == DHD_PKTGEN_RECV) {
4727                 if (!bus->pktgen_rcvd)
4728                         brcmf_sdbrcm_sdtest_set(bus, true);
4729                 return;
4730         }
4731
4732         /* Otherwise, generate or request the specified number of packets */
4733         for (pktcount = 0; pktcount < bus->pktgen_count; pktcount++) {
4734                 /* Stop if total has been reached */
4735                 if (bus->pktgen_total
4736                     && (bus->pktgen_sent >= bus->pktgen_total)) {
4737                         bus->pktgen_count = 0;
4738                         break;
4739                 }
4740
4741                 /* Allocate an appropriate-sized packet */
4742                 len = bus->pktgen_len;
4743                 pkt = brcmu_pkt_buf_get_skb(
4744                         (len + SDPCM_HDRLEN + SDPCM_TEST_HDRLEN + BRCMF_SDALIGN),
4745                         true);
4746                 if (!pkt) {
4747                         DHD_ERROR(("%s: brcmu_pkt_buf_get_skb failed!\n",
4748                                    __func__));
4749                         break;
4750                 }
4751                 PKTALIGN(pkt, (len + SDPCM_HDRLEN + SDPCM_TEST_HDRLEN),
4752                          BRCMF_SDALIGN);
4753                 data = (u8 *) (pkt->data) + SDPCM_HDRLEN;
4754
4755                 /* Write test header cmd and extra based on mode */
4756                 switch (bus->pktgen_mode) {
4757                 case DHD_PKTGEN_ECHO:
4758                         *data++ = SDPCM_TEST_ECHOREQ;
4759                         *data++ = (u8) bus->pktgen_sent;
4760                         break;
4761
4762                 case DHD_PKTGEN_SEND:
4763                         *data++ = SDPCM_TEST_DISCARD;
4764                         *data++ = (u8) bus->pktgen_sent;
4765                         break;
4766
4767                 case DHD_PKTGEN_RXBURST:
4768                         *data++ = SDPCM_TEST_BURST;
4769                         *data++ = (u8) bus->pktgen_count;
4770                         break;
4771
4772                 default:
4773                         DHD_ERROR(("Unrecognized pktgen mode %d\n",
4774                                    bus->pktgen_mode));
4775                         brcmu_pkt_buf_free_skb(pkt, true);
4776                         bus->pktgen_count = 0;
4777                         return;
4778                 }
4779
4780                 /* Write test header length field */
4781                 *data++ = (len >> 0);
4782                 *data++ = (len >> 8);
4783
4784                 /* Then fill in the remainder -- N/A for burst,
4785                          but who cares... */
4786                 for (fillbyte = 0; fillbyte < len; fillbyte++)
4787                         *data++ =
4788                             SDPCM_TEST_FILL(fillbyte, (u8) bus->pktgen_sent);
4789
4790 #ifdef BCMDBG
4791                 if (DHD_BYTES_ON() && DHD_DATA_ON()) {
4792                         data = (u8 *) (pkt->data) + SDPCM_HDRLEN;
4793                         printk(KERN_DEBUG "brcmf_sdbrcm_pktgen: Tx Data:\n");
4794                         print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, data,
4795                                              pkt->len - SDPCM_HDRLEN);
4796                 }
4797 #endif
4798
4799                 /* Send it */
4800                 if (brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_TEST_CHANNEL, true)) {
4801                         bus->pktgen_fail++;
4802                         if (bus->pktgen_stop
4803                             && bus->pktgen_stop == bus->pktgen_fail)
4804                                 bus->pktgen_count = 0;
4805                 }
4806                 bus->pktgen_sent++;
4807
4808                 /* Bump length if not fixed, wrap at max */
4809                 if (++bus->pktgen_len > bus->pktgen_maxlen)
4810                         bus->pktgen_len = (u16) bus->pktgen_minlen;
4811
4812                 /* Special case for burst mode: just send one request! */
4813                 if (bus->pktgen_mode == DHD_PKTGEN_RXBURST)
4814                         break;
4815         }
4816 }
4817
4818 static void brcmf_sdbrcm_sdtest_set(dhd_bus_t *bus, bool start)
4819 {
4820         struct sk_buff *pkt;
4821         u8 *data;
4822
4823         /* Allocate the packet */
4824         pkt = brcmu_pkt_buf_get_skb(SDPCM_HDRLEN + SDPCM_TEST_HDRLEN +
4825                 BRCMF_SDALIGN, true);
4826         if (!pkt) {
4827                 DHD_ERROR(("%s: brcmu_pkt_buf_get_skb failed!\n", __func__));
4828                 return;
4829         }
4830         PKTALIGN(pkt, (SDPCM_HDRLEN + SDPCM_TEST_HDRLEN), BRCMF_SDALIGN);
4831         data = (u8 *) (pkt->data) + SDPCM_HDRLEN;
4832
4833         /* Fill in the test header */
4834         *data++ = SDPCM_TEST_SEND;
4835         *data++ = start;
4836         *data++ = (bus->pktgen_maxlen >> 0);
4837         *data++ = (bus->pktgen_maxlen >> 8);
4838
4839         /* Send it */
4840         if (brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_TEST_CHANNEL, true))
4841                 bus->pktgen_fail++;
4842 }
4843
4844 static void
4845 brcmf_sdbrcm_checkdied(dhd_bus_t *bus, struct sk_buff *pkt, uint seq)
4846 {
4847         u8 *data;
4848         uint pktlen;
4849
4850         u8 cmd;
4851         u8 extra;
4852         u16 len;
4853         u16 offset;
4854
4855         /* Check for min length */
4856         pktlen = pkt->len;
4857         if (pktlen < SDPCM_TEST_HDRLEN) {
4858                 DHD_ERROR(("brcmf_sdbrcm_checkdied: toss runt frame, pktlen "
4859                            "%d\n", pktlen));
4860                 brcmu_pkt_buf_free_skb(pkt, false);
4861                 return;
4862         }
4863
4864         /* Extract header fields */
4865         data = pkt->data;
4866         cmd = *data++;
4867         extra = *data++;
4868         len = *data++;
4869         len += *data++ << 8;
4870
4871         /* Check length for relevant commands */
4872         if (cmd == SDPCM_TEST_DISCARD || cmd == SDPCM_TEST_ECHOREQ
4873             || cmd == SDPCM_TEST_ECHORSP) {
4874                 if (pktlen != len + SDPCM_TEST_HDRLEN) {
4875                         DHD_ERROR(("brcmf_sdbrcm_checkdied: frame length "
4876                                 "mismatch, pktlen %d seq %d" " cmd %d extra %d "
4877                                 "len %d\n",
4878                                 pktlen, seq, cmd, extra, len));
4879                         brcmu_pkt_buf_free_skb(pkt, false);
4880                         return;
4881                 }
4882         }
4883
4884         /* Process as per command */
4885         switch (cmd) {
4886         case SDPCM_TEST_ECHOREQ:
4887                 /* Rx->Tx turnaround ok (even on NDIS w/current
4888                          implementation) */
4889                 *(u8 *) (pkt->data) = SDPCM_TEST_ECHORSP;
4890                 if (brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_TEST_CHANNEL, true) == 0)
4891                         bus->pktgen_sent++;
4892                 else {
4893                         bus->pktgen_fail++;
4894                         brcmu_pkt_buf_free_skb(pkt, false);
4895                 }
4896                 bus->pktgen_rcvd++;
4897                 break;
4898
4899         case SDPCM_TEST_ECHORSP:
4900                 if (bus->ext_loop) {
4901                         brcmu_pkt_buf_free_skb(pkt, false);
4902                         bus->pktgen_rcvd++;
4903                         break;
4904                 }
4905
4906                 for (offset = 0; offset < len; offset++, data++) {
4907                         if (*data != SDPCM_TEST_FILL(offset, extra)) {
4908                                 DHD_ERROR(("brcmf_sdbrcm_checkdied: echo data "
4909                                            "mismatch: " "offset %d (len %d) "
4910                                            "expect 0x%02x rcvd 0x%02x\n",
4911                                            offset, len,
4912                                            SDPCM_TEST_FILL(offset, extra),
4913                                            *data));
4914                                 break;
4915                         }
4916                 }
4917                 brcmu_pkt_buf_free_skb(pkt, false);
4918                 bus->pktgen_rcvd++;
4919                 break;
4920
4921         case SDPCM_TEST_DISCARD:
4922                 brcmu_pkt_buf_free_skb(pkt, false);
4923                 bus->pktgen_rcvd++;
4924                 break;
4925
4926         case SDPCM_TEST_BURST:
4927         case SDPCM_TEST_SEND:
4928         default:
4929                 DHD_INFO(("brcmf_sdbrcm_checkdied: unsupported or unknown "
4930                         "command, pktlen %d seq %d" " cmd %d extra %d len %d\n",
4931                         pktlen, seq, cmd, extra, len));
4932                 brcmu_pkt_buf_free_skb(pkt, false);
4933                 break;
4934         }
4935
4936         /* For recv mode, stop at limie (and tell dongle to stop sending) */
4937         if (bus->pktgen_mode == DHD_PKTGEN_RECV) {
4938                 if (bus->pktgen_total
4939                     && (bus->pktgen_rcvd >= bus->pktgen_total)) {
4940                         bus->pktgen_count = 0;
4941                         brcmf_sdbrcm_sdtest_set(bus, false);
4942                 }
4943         }
4944 }
4945 #endif                          /* SDTEST */
4946
4947 extern bool brcmf_sdbrcm_bus_watchdog(dhd_pub_t *dhdp)
4948 {
4949         dhd_bus_t *bus;
4950
4951         DHD_TIMER(("%s: Enter\n", __func__));
4952
4953         bus = dhdp->bus;
4954
4955         if (bus->dhd->dongle_reset)
4956                 return false;
4957
4958         /* Ignore the timer if simulating bus down */
4959         if (bus->sleeping)
4960                 return false;
4961
4962         brcmf_os_sdlock(bus->dhd);
4963
4964         /* Poll period: check device if appropriate. */
4965         if (bus->poll && (++bus->polltick >= bus->pollrate)) {
4966                 u32 intstatus = 0;
4967
4968                 /* Reset poll tick */
4969                 bus->polltick = 0;
4970
4971                 /* Check device if no interrupts */
4972                 if (!bus->intr || (bus->intrcount == bus->lastintrs)) {
4973
4974                         if (!bus->dpc_sched) {
4975                                 u8 devpend;
4976                                 devpend = brcmf_sdcard_cfg_read(bus->sdh,
4977                                                 SDIO_FUNC_0, SDIO_CCCR_INTx,
4978                                                 NULL);
4979                                 intstatus =
4980                                     devpend & (INTR_STATUS_FUNC1 |
4981                                                INTR_STATUS_FUNC2);
4982                         }
4983
4984                         /* If there is something, make like the ISR and
4985                                  schedule the DPC */
4986                         if (intstatus) {
4987                                 bus->pollcnt++;
4988                                 bus->ipend = true;
4989                                 if (bus->intr)
4990                                         brcmf_sdcard_intr_disable(bus->sdh);
4991
4992                                 bus->dpc_sched = true;
4993                                 brcmf_sched_dpc(bus->dhd);
4994
4995                         }
4996                 }
4997
4998                 /* Update interrupt tracking */
4999                 bus->lastintrs = bus->intrcount;
5000         }
5001 #ifdef BCMDBG
5002         /* Poll for console output periodically */
5003         if (dhdp->busstate == DHD_BUS_DATA && brcmf_console_ms != 0) {
5004                 bus->console.count += brcmf_watchdog_ms;
5005                 if (bus->console.count >= brcmf_console_ms) {
5006                         bus->console.count -= brcmf_console_ms;
5007                         /* Make sure backplane clock is on */
5008                         brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
5009                         if (brcmf_sdbrcm_readconsole(bus) < 0)
5010                                 brcmf_console_ms = 0;   /* On error,
5011                                                          stop trying */
5012                 }
5013         }
5014 #endif                          /* BCMDBG */
5015
5016 #ifdef SDTEST
5017         /* Generate packets if configured */
5018         if (bus->pktgen_count && (++bus->pktgen_tick >= bus->pktgen_freq)) {
5019                 /* Make sure backplane clock is on */
5020                 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
5021                 bus->pktgen_tick = 0;
5022                 brcmf_sdbrcm_pktgen(bus);
5023         }
5024 #endif
5025
5026         /* On idle timeout clear activity flag and/or turn off clock */
5027         if ((bus->idletime > 0) && (bus->clkstate == CLK_AVAIL)) {
5028                 if (++bus->idlecount >= bus->idletime) {
5029                         bus->idlecount = 0;
5030                         if (bus->activity) {
5031                                 bus->activity = false;
5032                                 brcmf_os_wd_timer(bus->dhd, brcmf_watchdog_ms);
5033                         } else {
5034                                 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
5035                         }
5036                 }
5037         }
5038
5039         brcmf_os_sdunlock(bus->dhd);
5040
5041         return bus->ipend;
5042 }
5043
5044 #ifdef BCMDBG
5045 extern int brcmf_sdbrcm_bus_console_in(dhd_pub_t *dhdp, unsigned char *msg,
5046                                        uint msglen)
5047 {
5048         dhd_bus_t *bus = dhdp->bus;
5049         u32 addr, val;
5050         int rv;
5051         struct sk_buff *pkt;
5052
5053         /* Address could be zero if CONSOLE := 0 in dongle Makefile */
5054         if (bus->console_addr == 0)
5055                 return -ENOTSUPP;
5056
5057         /* Exclusive bus access */
5058         brcmf_os_sdlock(bus->dhd);
5059
5060         /* Don't allow input if dongle is in reset */
5061         if (bus->dhd->dongle_reset) {
5062                 brcmf_os_sdunlock(bus->dhd);
5063                 return -EPERM;
5064         }
5065
5066         /* Request clock to allow SDIO accesses */
5067         BUS_WAKE(bus);
5068         /* No pend allowed since txpkt is called later, ht clk has to be on */
5069         brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
5070
5071         /* Zero cbuf_index */
5072         addr = bus->console_addr + offsetof(struct rte_console, cbuf_idx);
5073         val = cpu_to_le32(0);
5074         rv = brcmf_sdbrcm_membytes(bus, true, addr, (u8 *)&val, sizeof(val));
5075         if (rv < 0)
5076                 goto done;
5077
5078         /* Write message into cbuf */
5079         addr = bus->console_addr + offsetof(struct rte_console, cbuf);
5080         rv = brcmf_sdbrcm_membytes(bus, true, addr, (u8 *)msg, msglen);
5081         if (rv < 0)
5082                 goto done;
5083
5084         /* Write length into vcons_in */
5085         addr = bus->console_addr + offsetof(struct rte_console, vcons_in);
5086         val = cpu_to_le32(msglen);
5087         rv = brcmf_sdbrcm_membytes(bus, true, addr, (u8 *)&val, sizeof(val));
5088         if (rv < 0)
5089                 goto done;
5090
5091         /* Bump dongle by sending an empty event pkt.
5092          * sdpcm_sendup (RX) checks for virtual console input.
5093          */
5094         pkt = brcmu_pkt_buf_get_skb(4 + SDPCM_RESERVE);
5095         if ((pkt != NULL) && bus->clkstate == CLK_AVAIL)
5096                 brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_EVENT_CHANNEL, true);
5097
5098 done:
5099         if ((bus->idletime == DHD_IDLE_IMMEDIATE) && !bus->dpc_sched) {
5100                 bus->activity = false;
5101                 brcmf_sdbrcm_clkctl(bus, CLK_NONE, true);
5102         }
5103
5104         brcmf_os_sdunlock(bus->dhd);
5105
5106         return rv;
5107 }
5108 #endif                          /* BCMDBG */
5109
5110 static bool brcmf_sdbrcm_chipmatch(u16 chipid)
5111 {
5112         if (chipid == BCM4325_CHIP_ID)
5113                 return true;
5114         if (chipid == BCM4329_CHIP_ID)
5115                 return true;
5116         if (chipid == BCM4319_CHIP_ID)
5117                 return true;
5118         return false;
5119 }
5120
5121 static void *brcmf_sdbrcm_probe(u16 venid, u16 devid, u16 bus_no,
5122                            u16 slot, u16 func, uint bustype, void *regsva,
5123                            void *sdh)
5124 {
5125         int ret;
5126         dhd_bus_t *bus;
5127
5128         /* Init global variables at run-time, not as part of the declaration.
5129          * This is required to support init/de-init of the driver.
5130          * Initialization
5131          * of globals as part of the declaration results in non-deterministic
5132          * behavior since the value of the globals may be different on the
5133          * first time that the driver is initialized vs subsequent
5134          * initializations.
5135          */
5136         brcmf_txbound = DHD_TXBOUND;
5137         brcmf_rxbound = DHD_RXBOUND;
5138         dhd_alignctl = true;
5139         sd1idle = true;
5140         dhd_readahead = true;
5141         retrydata = false;
5142         brcmf_dongle_memsize = 0;
5143         dhd_txminmax = DHD_TXMINMAX;
5144
5145         forcealign = true;
5146
5147         brcmf_c_init();
5148
5149         DHD_TRACE(("%s: Enter\n", __func__));
5150         DHD_INFO(("%s: venid 0x%04x devid 0x%04x\n", __func__, venid, devid));
5151
5152         /* We make assumptions about address window mappings */
5153         ASSERT((unsigned long)regsva == SI_ENUM_BASE);
5154
5155         /* BCMSDH passes venid and devid based on CIS parsing -- but
5156          * low-power start
5157          * means early parse could fail, so here we should get either an ID
5158          * we recognize OR (-1) indicating we must request power first.
5159          */
5160         /* Check the Vendor ID */
5161         switch (venid) {
5162         case 0x0000:
5163         case PCI_VENDOR_ID_BROADCOM:
5164                 break;
5165         default:
5166                 DHD_ERROR(("%s: unknown vendor: 0x%04x\n", __func__, venid));
5167                 return NULL;
5168         }
5169
5170         /* Check the Device ID and make sure it's one that we support */
5171         switch (devid) {
5172         case BCM4325_D11DUAL_ID:        /* 4325 802.11a/g id */
5173         case BCM4325_D11G_ID:   /* 4325 802.11g 2.4Ghz band id */
5174         case BCM4325_D11A_ID:   /* 4325 802.11a 5Ghz band id */
5175                 DHD_INFO(("%s: found 4325 Dongle\n", __func__));
5176                 break;
5177         case BCM4329_D11NDUAL_ID:       /* 4329 802.11n dualband device */
5178         case BCM4329_D11N2G_ID: /* 4329 802.11n 2.4G device */
5179         case BCM4329_D11N5G_ID: /* 4329 802.11n 5G device */
5180         case 0x4329:
5181                 DHD_INFO(("%s: found 4329 Dongle\n", __func__));
5182                 break;
5183         case BCM4319_D11N_ID:   /* 4319 802.11n id */
5184         case BCM4319_D11N2G_ID: /* 4319 802.11n2g id */
5185         case BCM4319_D11N5G_ID: /* 4319 802.11n5g id */
5186                 DHD_INFO(("%s: found 4319 Dongle\n", __func__));
5187                 break;
5188         case 0:
5189                 DHD_INFO(("%s: allow device id 0, will check chip internals\n",
5190                           __func__));
5191                 break;
5192
5193         default:
5194                 DHD_ERROR(("%s: skipping 0x%04x/0x%04x, not a dongle\n",
5195                            __func__, venid, devid));
5196                 return NULL;
5197         }
5198
5199         /* Allocate private bus interface state */
5200         bus = kzalloc(sizeof(dhd_bus_t), GFP_ATOMIC);
5201         if (!bus) {
5202                 DHD_ERROR(("%s: kmalloc of dhd_bus_t failed\n", __func__));
5203                 goto fail;
5204         }
5205         bus->sdh = sdh;
5206         bus->cl_devid = (u16) devid;
5207         bus->bus = DHD_BUS;
5208         bus->tx_seq = SDPCM_SEQUENCE_WRAP - 1;
5209         bus->usebufpool = false;        /* Use bufpool if allocated,
5210                                          else use locally malloced rxbuf */
5211
5212         /* attempt to attach to the dongle */
5213         if (!(brcmf_sdbrcm_probe_attach(bus, sdh, regsva, devid))) {
5214                 DHD_ERROR(("%s: brcmf_sdbrcm_probe_attach failed\n", __func__));
5215                 goto fail;
5216         }
5217
5218         spin_lock_init(&bus->txqlock);
5219         init_waitqueue_head(&bus->ctrl_wait);
5220
5221         /* Attach to the dhd/OS/network interface */
5222         bus->dhd = brcmf_attach(bus, SDPCM_RESERVE);
5223         if (!bus->dhd) {
5224                 DHD_ERROR(("%s: dhd_attach failed\n", __func__));
5225                 goto fail;
5226         }
5227
5228         /* Allocate buffers */
5229         if (!(brcmf_sdbrcm_probe_malloc(bus, sdh))) {
5230                 DHD_ERROR(("%s: brcmf_sdbrcm_probe_malloc failed\n", __func__));
5231                 goto fail;
5232         }
5233
5234         if (!(brcmf_sdbrcm_probe_init(bus, sdh))) {
5235                 DHD_ERROR(("%s: brcmf_sdbrcm_probe_init failed\n", __func__));
5236                 goto fail;
5237         }
5238
5239         /* Register interrupt callback, but mask it (not operational yet). */
5240         DHD_INTR(("%s: disable SDIO interrupts (not interested yet)\n",
5241                   __func__));
5242         brcmf_sdcard_intr_disable(sdh);
5243         ret = brcmf_sdcard_intr_reg(sdh, brcmf_sdbrcm_isr, bus);
5244         if (ret != 0) {
5245                 DHD_ERROR(("%s: FAILED: bcmsdh_intr_reg returned %d\n",
5246                            __func__, ret));
5247                 goto fail;
5248         }
5249         DHD_INTR(("%s: registered SDIO interrupt function ok\n", __func__));
5250
5251         DHD_INFO(("%s: completed!!\n", __func__));
5252
5253         /* if firmware path present try to download and bring up bus */
5254         ret = brcmf_bus_start(bus->dhd);
5255         if (ret != 0) {
5256                 if (ret == -ENOLINK) {
5257                         DHD_ERROR(("%s: dongle is not responding\n", __func__));
5258                         goto fail;
5259                 }
5260         }
5261         /* Ok, have the per-port tell the stack we're open for business */
5262         if (brcmf_net_attach(bus->dhd, 0) != 0) {
5263                 DHD_ERROR(("%s: Net attach failed!!\n", __func__));
5264                 goto fail;
5265         }
5266
5267         return bus;
5268
5269 fail:
5270         brcmf_sdbrcm_release(bus);
5271         return NULL;
5272 }
5273
5274 static bool
5275 brcmf_sdbrcm_probe_attach(struct dhd_bus *bus, void *sdh, void *regsva,
5276                           u16 devid)
5277 {
5278         u8 clkctl = 0;
5279         int err = 0;
5280
5281         bus->alp_only = true;
5282
5283         /* Return the window to backplane enumeration space for core access */
5284         if (brcmf_sdbrcm_set_siaddr_window(bus, SI_ENUM_BASE))
5285                 DHD_ERROR(("%s: FAILED to return to SI_ENUM_BASE\n", __func__));
5286
5287 #ifdef BCMDBG
5288         printk(KERN_DEBUG "F1 signature read @0x18000000=0x%4x\n",
5289                brcmf_sdcard_reg_read(bus->sdh, SI_ENUM_BASE, 4));
5290
5291 #endif                          /* BCMDBG */
5292
5293         /*
5294          * Force PLL off until brcmf_sdbrcm_chip_attach()
5295          * programs PLL control regs
5296          */
5297
5298         brcmf_sdcard_cfg_write(sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR,
5299                          DHD_INIT_CLKCTL1, &err);
5300         if (!err)
5301                 clkctl =
5302                     brcmf_sdcard_cfg_read(sdh, SDIO_FUNC_1,
5303                                           SBSDIO_FUNC1_CHIPCLKCSR, &err);
5304
5305         if (err || ((clkctl & ~SBSDIO_AVBITS) != DHD_INIT_CLKCTL1)) {
5306                 DHD_ERROR(("brcmf_sdbrcm_probe: ChipClkCSR access: err %d wrote"
5307                         " 0x%02x read 0x%02x\n",
5308                         err, DHD_INIT_CLKCTL1, clkctl));
5309                 goto fail;
5310         }
5311
5312         if (brcmf_sdbrcm_chip_attach(bus, regsva)) {
5313                 DHD_ERROR(("%s: brcmf_sdbrcm_chip_attach failed!\n", __func__));
5314                 goto fail;
5315         }
5316
5317         brcmf_sdcard_chipinfo(sdh, bus->ci->chip, bus->ci->chiprev);
5318
5319         if (!brcmf_sdbrcm_chipmatch((u16) bus->ci->chip)) {
5320                 DHD_ERROR(("%s: unsupported chip: 0x%04x\n",
5321                            __func__, bus->ci->chip));
5322                 goto fail;
5323         }
5324
5325         brcmf_sdbrcm_sdiod_drive_strength_init(bus, brcmf_sdiod_drive_strength);
5326
5327         /* Get info on the ARM and SOCRAM cores... */
5328         if (!DHD_NOPMU(bus)) {
5329                 bus->armrev = SBCOREREV(brcmf_sdcard_reg_read(bus->sdh,
5330                         CORE_SB(bus->ci->armcorebase, sbidhigh), 4));
5331                 bus->orig_ramsize = bus->ci->ramsize;
5332                 if (!(bus->orig_ramsize)) {
5333                         DHD_ERROR(("%s: failed to find SOCRAM memory!\n",
5334                                    __func__));
5335                         goto fail;
5336                 }
5337                 bus->ramsize = bus->orig_ramsize;
5338                 if (brcmf_dongle_memsize)
5339                         brcmf_sdbrcm_setmemsize(bus, brcmf_dongle_memsize);
5340
5341                 DHD_ERROR(("DHD: dongle ram size is set to %d(orig %d)\n",
5342                            bus->ramsize, bus->orig_ramsize));
5343         }
5344
5345         bus->regs = (void *)bus->ci->buscorebase;
5346
5347         /* Set core control so an SDIO reset does a backplane reset */
5348         OR_REG(&bus->regs->corecontrol, CC_BPRESEN);
5349
5350         brcmu_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN);
5351
5352         /* Locate an appropriately-aligned portion of hdrbuf */
5353         bus->rxhdr = (u8 *) roundup((unsigned long)&bus->hdrbuf[0], BRCMF_SDALIGN);
5354
5355         /* Set the poll and/or interrupt flags */
5356         bus->intr = (bool) brcmf_intr;
5357         bus->poll = (bool) brcmf_poll;
5358         if (bus->poll)
5359                 bus->pollrate = 1;
5360
5361         return true;
5362
5363 fail:
5364         return false;
5365 }
5366
5367 static bool brcmf_sdbrcm_probe_malloc(dhd_bus_t *bus, void *sdh)
5368 {
5369         DHD_TRACE(("%s: Enter\n", __func__));
5370
5371         if (bus->dhd->maxctl) {
5372                 bus->rxblen =
5373                     roundup((bus->dhd->maxctl + SDPCM_HDRLEN),
5374                             ALIGNMENT) + BRCMF_SDALIGN;
5375                 bus->rxbuf = kmalloc(bus->rxblen, GFP_ATOMIC);
5376                 if (!(bus->rxbuf)) {
5377                         DHD_ERROR(("%s: kmalloc of %d-byte rxbuf failed\n",
5378                                    __func__, bus->rxblen));
5379                         goto fail;
5380                 }
5381         }
5382
5383         /* Allocate buffer to receive glomed packet */
5384         bus->databuf = kmalloc(MAX_DATA_BUF, GFP_ATOMIC);
5385         if (!(bus->databuf)) {
5386                 DHD_ERROR(("%s: kmalloc of %d-byte databuf failed\n",
5387                            __func__, MAX_DATA_BUF));
5388                 /* release rxbuf which was already located as above */
5389                 if (!bus->rxblen)
5390                         kfree(bus->rxbuf);
5391                 goto fail;
5392         }
5393
5394         /* Align the buffer */
5395         if ((unsigned long)bus->databuf % BRCMF_SDALIGN)
5396                 bus->dataptr =
5397                     bus->databuf + (BRCMF_SDALIGN -
5398                                     ((unsigned long)bus->databuf % BRCMF_SDALIGN));
5399         else
5400                 bus->dataptr = bus->databuf;
5401
5402         return true;
5403
5404 fail:
5405         return false;
5406 }
5407
5408 static bool brcmf_sdbrcm_probe_init(dhd_bus_t *bus, void *sdh)
5409 {
5410         s32 fnum;
5411
5412         DHD_TRACE(("%s: Enter\n", __func__));
5413
5414 #ifdef SDTEST
5415         brcmf_sdbrcm_pktgen_init(bus);
5416 #endif                          /* SDTEST */
5417
5418         /* Disable F2 to clear any intermediate frame state on the dongle */
5419         brcmf_sdcard_cfg_write(sdh, SDIO_FUNC_0, SDIO_CCCR_IOEx,
5420                                SDIO_FUNC_ENABLE_1, NULL);
5421
5422         bus->dhd->busstate = DHD_BUS_DOWN;
5423         bus->sleeping = false;
5424         bus->rxflow = false;
5425         bus->prev_rxlim_hit = 0;
5426
5427         /* Done with backplane-dependent accesses, can drop clock... */
5428         brcmf_sdcard_cfg_write(sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR, 0,
5429                                NULL);
5430
5431         /* ...and initialize clock/power states */
5432         bus->clkstate = CLK_SDONLY;
5433         bus->idletime = (s32) brcmf_idletime;
5434         bus->idleclock = DHD_IDLE_ACTIVE;
5435
5436         /* Query the F2 block size, set roundup accordingly */
5437         fnum = 2;
5438         if (brcmf_sdcard_iovar_op(sdh, "sd_blocksize", &fnum, sizeof(s32),
5439                             &bus->blocksize, sizeof(s32), false) != 0) {
5440                 bus->blocksize = 0;
5441                 DHD_ERROR(("%s: fail on %s get\n", __func__, "sd_blocksize"));
5442         } else {
5443                 DHD_INFO(("%s: Initial value for %s is %d\n",
5444                           __func__, "sd_blocksize", bus->blocksize));
5445         }
5446         bus->roundup = min(max_roundup, bus->blocksize);
5447
5448         /* Query if bus module supports packet chaining,
5449                  default to use if supported */
5450         if (brcmf_sdcard_iovar_op(sdh, "sd_rxchain", NULL, 0,
5451                             &bus->sd_rxchain, sizeof(s32),
5452                             false) != 0) {
5453                 bus->sd_rxchain = false;
5454         } else {
5455                 DHD_INFO(("%s: bus module (through bcmsdh API) %s chaining\n",
5456                           __func__,
5457                           (bus->sd_rxchain ? "supports" : "does not support")));
5458         }
5459         bus->use_rxchain = (bool) bus->sd_rxchain;
5460
5461         return true;
5462 }
5463
5464 bool
5465 dhd_bus_download_firmware(struct dhd_bus *bus, char *fw_path, char *nv_path)
5466 {
5467         bool ret;
5468         bus->fw_path = fw_path;
5469         bus->nv_path = nv_path;
5470
5471         ret = brcmf_sdbrcm_download_firmware(bus, bus->sdh);
5472
5473         return ret;
5474 }
5475
5476 static bool
5477 brcmf_sdbrcm_download_firmware(struct dhd_bus *bus, void *sdh)
5478 {
5479         bool ret;
5480
5481         /* Download the firmware */
5482         brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
5483
5484         ret = _brcmf_sdbrcm_download_firmware(bus) == 0;
5485
5486         brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
5487
5488         return ret;
5489 }
5490
5491 /* Detach and free everything */
5492 static void brcmf_sdbrcm_release(dhd_bus_t *bus)
5493 {
5494         DHD_TRACE(("%s: Enter\n", __func__));
5495
5496         if (bus) {
5497                 /* De-register interrupt handler */
5498                 brcmf_sdcard_intr_disable(bus->sdh);
5499                 brcmf_sdcard_intr_dereg(bus->sdh);
5500
5501                 if (bus->dhd) {
5502                         brcmf_detach(bus->dhd);
5503                         brcmf_sdbrcm_release_dongle(bus);
5504                         bus->dhd = NULL;
5505                 }
5506
5507                 brcmf_sdbrcm_release_malloc(bus);
5508
5509                 kfree(bus);
5510         }
5511
5512         DHD_TRACE(("%s: Disconnected\n", __func__));
5513 }
5514
5515 static void brcmf_sdbrcm_release_malloc(dhd_bus_t *bus)
5516 {
5517         DHD_TRACE(("%s: Enter\n", __func__));
5518
5519         if (bus->dhd && bus->dhd->dongle_reset)
5520                 return;
5521
5522         kfree(bus->rxbuf);
5523         bus->rxctl = bus->rxbuf = NULL;
5524         bus->rxlen = 0;
5525
5526         kfree(bus->databuf);
5527         bus->databuf = NULL;
5528 }
5529
5530 static void brcmf_sdbrcm_release_dongle(dhd_bus_t *bus)
5531 {
5532         DHD_TRACE(("%s: Enter\n", __func__));
5533
5534         if (bus->dhd && bus->dhd->dongle_reset)
5535                 return;
5536
5537         if (bus->ci) {
5538                 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
5539                 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
5540                 brcmf_sdbrcm_chip_detach(bus);
5541                 if (bus->vars && bus->varsz)
5542                         kfree(bus->vars);
5543                 bus->vars = NULL;
5544         }
5545
5546         DHD_TRACE(("%s: Disconnected\n", __func__));
5547 }
5548
5549 static void brcmf_sdbrcm_disconnect(void *ptr)
5550 {
5551         dhd_bus_t *bus = (dhd_bus_t *)ptr;
5552
5553         DHD_TRACE(("%s: Enter\n", __func__));
5554
5555         if (bus) {
5556                 ASSERT(bus->dhd);
5557                 brcmf_sdbrcm_release(bus);
5558         }
5559
5560         DHD_TRACE(("%s: Disconnected\n", __func__));
5561 }
5562
5563 /* Register/Unregister functions are called by the main DHD entry
5564  * point (e.g. module insertion) to link with the bus driver, in
5565  * order to look for or await the device.
5566  */
5567
5568 static struct brcmf_sdioh_driver dhd_sdio = {
5569         brcmf_sdbrcm_probe,
5570         brcmf_sdbrcm_disconnect
5571 };
5572
5573 int dhd_bus_register(void)
5574 {
5575         DHD_TRACE(("%s: Enter\n", __func__));
5576
5577         return brcmf_sdio_register(&dhd_sdio);
5578 }
5579
5580 void dhd_bus_unregister(void)
5581 {
5582         DHD_TRACE(("%s: Enter\n", __func__));
5583
5584         brcmf_sdio_unregister();
5585 }
5586
5587 static int brcmf_sdbrcm_download_code_file(struct dhd_bus *bus, char *fw_path)
5588 {
5589         int bcmerror = -1;
5590         int offset = 0;
5591         uint len;
5592         void *image = NULL;
5593         u8 *memblock = NULL, *memptr;
5594
5595         DHD_INFO(("%s: download firmware %s\n", __func__, brcmf_fw_path));
5596
5597         image = brcmf_os_open_image(fw_path);
5598         if (image == NULL)
5599                 goto err;
5600
5601         memptr = memblock = kmalloc(MEMBLOCK + BRCMF_SDALIGN, GFP_ATOMIC);
5602         if (memblock == NULL) {
5603                 DHD_ERROR(("%s: Failed to allocate memory %d bytes\n",
5604                            __func__, MEMBLOCK));
5605                 goto err;
5606         }
5607         if ((u32)(unsigned long)memblock % BRCMF_SDALIGN)
5608                 memptr +=
5609                     (BRCMF_SDALIGN - ((u32)(unsigned long)memblock % BRCMF_SDALIGN));
5610
5611         /* Download image */
5612         while ((len =
5613                 brcmf_os_get_image_block((char *)memptr, MEMBLOCK, image))) {
5614                 bcmerror = brcmf_sdbrcm_membytes(bus, true, offset, memptr,
5615                                                  len);
5616                 if (bcmerror) {
5617                         DHD_ERROR(("%s: error %d on writing %d membytes at "
5618                         "0x%08x\n", __func__, bcmerror, MEMBLOCK, offset));
5619                         goto err;
5620                 }
5621
5622                 offset += MEMBLOCK;
5623         }
5624
5625 err:
5626         kfree(memblock);
5627
5628         if (image)
5629                 brcmf_os_close_image(image);
5630
5631         return bcmerror;
5632 }
5633
5634 /*
5635  * ProcessVars:Takes a buffer of "<var>=<value>\n" lines read from a file
5636  * and ending in a NUL.
5637  * Removes carriage returns, empty lines, comment lines, and converts
5638  * newlines to NULs.
5639  * Shortens buffer as needed and pads with NULs.  End of buffer is marked
5640  * by two NULs.
5641 */
5642
5643 static uint brcmf_process_nvram_vars(char *varbuf, uint len)
5644 {
5645         char *dp;
5646         bool findNewline;
5647         int column;
5648         uint buf_len, n;
5649
5650         dp = varbuf;
5651
5652         findNewline = false;
5653         column = 0;
5654
5655         for (n = 0; n < len; n++) {
5656                 if (varbuf[n] == 0)
5657                         break;
5658                 if (varbuf[n] == '\r')
5659                         continue;
5660                 if (findNewline && varbuf[n] != '\n')
5661                         continue;
5662                 findNewline = false;
5663                 if (varbuf[n] == '#') {
5664                         findNewline = true;
5665                         continue;
5666                 }
5667                 if (varbuf[n] == '\n') {
5668                         if (column == 0)
5669                                 continue;
5670                         *dp++ = 0;
5671                         column = 0;
5672                         continue;
5673                 }
5674                 *dp++ = varbuf[n];
5675                 column++;
5676         }
5677         buf_len = dp - varbuf;
5678
5679         while (dp < varbuf + n)
5680                 *dp++ = 0;
5681
5682         return buf_len;
5683 }
5684
5685 /*
5686         EXAMPLE: nvram_array
5687         nvram_arry format:
5688         name=value
5689         Use carriage return at the end of each assignment,
5690          and an empty string with
5691         carriage return at the end of array.
5692
5693         For example:
5694         unsigned char  nvram_array[] = {"name1=value1\n",
5695         "name2=value2\n", "\n"};
5696         Hex values start with 0x, and mac addr format: xx:xx:xx:xx:xx:xx.
5697
5698         Search "EXAMPLE: nvram_array" to see how the array is activated.
5699 */
5700
5701 void dhd_bus_set_nvram_params(struct dhd_bus *bus, const char *nvram_params)
5702 {
5703         bus->nvram_params = nvram_params;
5704 }
5705
5706 static int brcmf_sdbrcm_download_nvram(struct dhd_bus *bus)
5707 {
5708         int bcmerror = -1;
5709         uint len;
5710         void *image = NULL;
5711         char *memblock = NULL;
5712         char *bufp;
5713         char *nv_path;
5714         bool nvram_file_exists;
5715
5716         nv_path = bus->nv_path;
5717
5718         nvram_file_exists = ((nv_path != NULL) && (nv_path[0] != '\0'));
5719         if (!nvram_file_exists && (bus->nvram_params == NULL))
5720                 return 0;
5721
5722         if (nvram_file_exists) {
5723                 image = brcmf_os_open_image(nv_path);
5724                 if (image == NULL)
5725                         goto err;
5726         }
5727
5728         memblock = kmalloc(MEMBLOCK, GFP_ATOMIC);
5729         if (memblock == NULL) {
5730                 DHD_ERROR(("%s: Failed to allocate memory %d bytes\n",
5731                            __func__, MEMBLOCK));
5732                 goto err;
5733         }
5734
5735         /* Download variables */
5736         if (nvram_file_exists) {
5737                 len = brcmf_os_get_image_block(memblock, MEMBLOCK, image);
5738         } else {
5739                 len = strlen(bus->nvram_params);
5740                 ASSERT(len <= MEMBLOCK);
5741                 if (len > MEMBLOCK)
5742                         len = MEMBLOCK;
5743                 memcpy(memblock, bus->nvram_params, len);
5744         }
5745
5746         if (len > 0 && len < MEMBLOCK) {
5747                 bufp = (char *)memblock;
5748                 bufp[len] = 0;
5749                 len = brcmf_process_nvram_vars(bufp, len);
5750                 bufp += len;
5751                 *bufp++ = 0;
5752                 if (len)
5753                         bcmerror = brcmf_sdbrcm_downloadvars(bus, memblock,
5754                                                            len + 1);
5755                 if (bcmerror) {
5756                         DHD_ERROR(("%s: error downloading vars: %d\n",
5757                                    __func__, bcmerror));
5758                 }
5759         } else {
5760                 DHD_ERROR(("%s: error reading nvram file: %d\n",
5761                            __func__, len));
5762                 bcmerror = -EIO;
5763         }
5764
5765 err:
5766         kfree(memblock);
5767
5768         if (image)
5769                 brcmf_os_close_image(image);
5770
5771         return bcmerror;
5772 }
5773
5774 static int _brcmf_sdbrcm_download_firmware(struct dhd_bus *bus)
5775 {
5776         int bcmerror = -1;
5777
5778         bool embed = false;     /* download embedded firmware */
5779         bool dlok = false;      /* download firmware succeeded */
5780
5781         /* Out immediately if no image to download */
5782         if ((bus->fw_path == NULL) || (bus->fw_path[0] == '\0'))
5783                 return bcmerror;
5784
5785         /* Keep arm in reset */
5786         if (brcmf_sdbrcm_download_state(bus, true)) {
5787                 DHD_ERROR(("%s: error placing ARM core in reset\n", __func__));
5788                 goto err;
5789         }
5790
5791         /* External image takes precedence if specified */
5792         if ((bus->fw_path != NULL) && (bus->fw_path[0] != '\0')) {
5793                 if (brcmf_sdbrcm_download_code_file(bus, bus->fw_path)) {
5794                         DHD_ERROR(("%s: dongle image file download failed\n",
5795                                    __func__));
5796                         goto err;
5797                 } else {
5798                         embed = false;
5799                         dlok = true;
5800                 }
5801         }
5802         if (!dlok) {
5803                 DHD_ERROR(("%s: dongle image download failed\n", __func__));
5804                 goto err;
5805         }
5806
5807         /* EXAMPLE: nvram_array */
5808         /* If a valid nvram_arry is specified as above, it can be passed
5809                  down to dongle */
5810         /* dhd_bus_set_nvram_params(bus, (char *)&nvram_array); */
5811
5812         /* External nvram takes precedence if specified */
5813         if (brcmf_sdbrcm_download_nvram(bus)) {
5814                 DHD_ERROR(("%s: dongle nvram file download failed\n",
5815                            __func__));
5816         }
5817
5818         /* Take arm out of reset */
5819         if (brcmf_sdbrcm_download_state(bus, false)) {
5820                 DHD_ERROR(("%s: error getting out of ARM core reset\n",
5821                            __func__));
5822                 goto err;
5823         }
5824
5825         bcmerror = 0;
5826
5827 err:
5828         return bcmerror;
5829 }
5830
5831
5832 static int
5833 brcmf_sdbrcm_send_buf(dhd_bus_t *bus, u32 addr, uint fn, uint flags,
5834                     u8 *buf, uint nbytes, struct sk_buff *pkt,
5835                     bcmsdh_cmplt_fn_t complete, void *handle)
5836 {
5837         return brcmf_sdcard_send_buf
5838                 (bus->sdh, addr, fn, flags, buf, nbytes, pkt, complete,
5839                  handle);
5840 }
5841
5842 uint dhd_bus_chip(struct dhd_bus *bus)
5843 {
5844         ASSERT(bus->ci != NULL);
5845         return bus->ci->chip;
5846 }
5847
5848 void *dhd_bus_pub(struct dhd_bus *bus)
5849 {
5850         return bus->dhd;
5851 }
5852
5853 void *dhd_bus_txq(struct dhd_bus *bus)
5854 {
5855         return &bus->txq;
5856 }
5857
5858 uint dhd_bus_hdrlen(struct dhd_bus *bus)
5859 {
5860         return SDPCM_HDRLEN;
5861 }
5862
5863 int brcmf_bus_devreset(dhd_pub_t *dhdp, u8 flag)
5864 {
5865         int bcmerror = 0;
5866         dhd_bus_t *bus;
5867
5868         bus = dhdp->bus;
5869
5870         if (flag == true) {
5871                 if (!bus->dhd->dongle_reset) {
5872                         /* Expect app to have torn down any
5873                          connection before calling */
5874                         /* Stop the bus, disable F2 */
5875                         brcmf_sdbrcm_bus_stop(bus, false);
5876
5877                         /* Clean tx/rx buffer pointers,
5878                          detach from the dongle */
5879                         brcmf_sdbrcm_release_dongle(bus);
5880
5881                         bus->dhd->dongle_reset = true;
5882                         bus->dhd->up = false;
5883
5884                         DHD_TRACE(("%s:  WLAN OFF DONE\n", __func__));
5885                         /* App can now remove power from device */
5886                 } else
5887                         bcmerror = -EIO;
5888         } else {
5889                 /* App must have restored power to device before calling */
5890
5891                 DHD_TRACE(("\n\n%s: == WLAN ON ==\n", __func__));
5892
5893                 if (bus->dhd->dongle_reset) {
5894                         /* Turn on WLAN */
5895                         /* Reset SD client */
5896                         brcmf_sdcard_reset(bus->sdh);
5897
5898                         /* Attempt to re-attach & download */
5899                         if (brcmf_sdbrcm_probe_attach(bus, bus->sdh,
5900                                                  (u32 *) SI_ENUM_BASE,
5901                                                  bus->cl_devid)) {
5902                                 /* Attempt to download binary to the dongle */
5903                                 if (brcmf_sdbrcm_probe_init
5904                                     (bus, bus->sdh)
5905                                     && brcmf_sdbrcm_download_firmware(bus,
5906                                                                  bus->sdh)) {
5907
5908                                         /* Re-init bus, enable F2 transfer */
5909                                         brcmf_sdbrcm_bus_init(
5910                                                 (dhd_pub_t *) bus->dhd, false);
5911
5912                                         bus->dhd->dongle_reset = false;
5913                                         bus->dhd->up = true;
5914
5915                                         DHD_TRACE(("%s: WLAN ON DONE\n",
5916                                                    __func__));
5917                                 } else
5918                                         bcmerror = -EIO;
5919                         } else
5920                                 bcmerror = -EIO;
5921                 } else {
5922                         bcmerror = -EISCONN;
5923                         DHD_ERROR(("%s: Set DEVRESET=false invoked when device "
5924                                 "is on\n", __func__));
5925                         bcmerror = -EIO;
5926                 }
5927         }
5928         return bcmerror;
5929 }
5930
5931 static int
5932 brcmf_sdbrcm_chip_recognition(struct brcmf_sdio *sdh, struct chip_info *ci,
5933                             void *regs)
5934 {
5935         u32 regdata;
5936
5937         /*
5938          * Get CC core rev
5939          * Chipid is assume to be at offset 0 from regs arg
5940          * For different chiptypes or old sdio hosts w/o chipcommon,
5941          * other ways of recognition should be added here.
5942          */
5943         ci->cccorebase = (u32)regs;
5944         regdata = brcmf_sdcard_reg_read(sdh,
5945                                 CORE_CC_REG(ci->cccorebase, chipid), 4);
5946         ci->chip = regdata & CID_ID_MASK;
5947         ci->chiprev = (regdata & CID_REV_MASK) >> CID_REV_SHIFT;
5948
5949         DHD_INFO(("%s: chipid=0x%x chiprev=%d\n",
5950                 __func__, ci->chip, ci->chiprev));
5951
5952         /* Address of cores for new chips should be added here */
5953         switch (ci->chip) {
5954         case BCM4329_CHIP_ID:
5955                 ci->buscorebase = BCM4329_CORE_BUS_BASE;
5956                 ci->ramcorebase = BCM4329_CORE_SOCRAM_BASE;
5957                 ci->armcorebase = BCM4329_CORE_ARM_BASE;
5958                 ci->ramsize = BCM4329_RAMSIZE;
5959                 break;
5960         default:
5961                 DHD_ERROR(("%s: chipid 0x%x is not supported\n",
5962                         __func__, ci->chip));
5963                 return -ENODEV;
5964         }
5965
5966         regdata = brcmf_sdcard_reg_read(sdh,
5967                 CORE_SB(ci->cccorebase, sbidhigh), 4);
5968         ci->ccrev = SBCOREREV(regdata);
5969
5970         regdata = brcmf_sdcard_reg_read(sdh,
5971                 CORE_CC_REG(ci->cccorebase, pmucapabilities), 4);
5972         ci->pmurev = regdata & PCAP_REV_MASK;
5973
5974         regdata = brcmf_sdcard_reg_read(sdh,
5975                                         CORE_SB(ci->buscorebase, sbidhigh), 4);
5976         ci->buscorerev = SBCOREREV(regdata);
5977         ci->buscoretype = (regdata & SBIDH_CC_MASK) >> SBIDH_CC_SHIFT;
5978
5979         DHD_INFO(("%s: ccrev=%d, pmurev=%d, buscore rev/type=%d/0x%x\n",
5980                 __func__, ci->ccrev, ci->pmurev,
5981                 ci->buscorerev, ci->buscoretype));
5982
5983         /* get chipcommon capabilites */
5984         ci->cccaps = brcmf_sdcard_reg_read(sdh,
5985                 CORE_CC_REG(ci->cccorebase, capabilities), 4);
5986
5987         return 0;
5988 }
5989
5990 static void
5991 brcmf_sdbrcm_chip_disablecore(struct brcmf_sdio *sdh, u32 corebase)
5992 {
5993         u32 regdata;
5994
5995         regdata = brcmf_sdcard_reg_read(sdh,
5996                 CORE_SB(corebase, sbtmstatelow), 4);
5997         if (regdata & SBTML_RESET)
5998                 return;
5999
6000         regdata = brcmf_sdcard_reg_read(sdh,
6001                 CORE_SB(corebase, sbtmstatelow), 4);
6002         if ((regdata & (SICF_CLOCK_EN << SBTML_SICF_SHIFT)) != 0) {
6003                 /*
6004                  * set target reject and spin until busy is clear
6005                  * (preserve core-specific bits)
6006                  */
6007                 regdata = brcmf_sdcard_reg_read(sdh,
6008                         CORE_SB(corebase, sbtmstatelow), 4);
6009                 brcmf_sdcard_reg_write(sdh, CORE_SB(corebase, sbtmstatelow), 4,
6010                         regdata | SBTML_REJ);
6011
6012                 regdata = brcmf_sdcard_reg_read(sdh,
6013                         CORE_SB(corebase, sbtmstatelow), 4);
6014                 udelay(1);
6015                 SPINWAIT((brcmf_sdcard_reg_read(sdh,
6016                         CORE_SB(corebase, sbtmstatehigh), 4) &
6017                         SBTMH_BUSY), 100000);
6018
6019                 regdata = brcmf_sdcard_reg_read(sdh,
6020                         CORE_SB(corebase, sbtmstatehigh), 4);
6021                 if (regdata & SBTMH_BUSY)
6022                         DHD_ERROR(("%s: ARM core still busy\n", __func__));
6023
6024                 regdata = brcmf_sdcard_reg_read(sdh,
6025                         CORE_SB(corebase, sbidlow), 4);
6026                 if (regdata & SBIDL_INIT) {
6027                         regdata = brcmf_sdcard_reg_read(sdh,
6028                                 CORE_SB(corebase, sbimstate), 4) |
6029                                 SBIM_RJ;
6030                         brcmf_sdcard_reg_write(sdh,
6031                                 CORE_SB(corebase, sbimstate), 4,
6032                                 regdata);
6033                         regdata = brcmf_sdcard_reg_read(sdh,
6034                                 CORE_SB(corebase, sbimstate), 4);
6035                         udelay(1);
6036                         SPINWAIT((brcmf_sdcard_reg_read(sdh,
6037                                 CORE_SB(corebase, sbimstate), 4) &
6038                                 SBIM_BY), 100000);
6039                 }
6040
6041                 /* set reset and reject while enabling the clocks */
6042                 brcmf_sdcard_reg_write(sdh,
6043                         CORE_SB(corebase, sbtmstatelow), 4,
6044                         (((SICF_FGC | SICF_CLOCK_EN) << SBTML_SICF_SHIFT) |
6045                         SBTML_REJ | SBTML_RESET));
6046                 regdata = brcmf_sdcard_reg_read(sdh,
6047                         CORE_SB(corebase, sbtmstatelow), 4);
6048                 udelay(10);
6049
6050                 /* clear the initiator reject bit */
6051                 regdata = brcmf_sdcard_reg_read(sdh,
6052                         CORE_SB(corebase, sbidlow), 4);
6053                 if (regdata & SBIDL_INIT) {
6054                         regdata = brcmf_sdcard_reg_read(sdh,
6055                                 CORE_SB(corebase, sbimstate), 4) &
6056                                 ~SBIM_RJ;
6057                         brcmf_sdcard_reg_write(sdh,
6058                                 CORE_SB(corebase, sbimstate), 4,
6059                                 regdata);
6060                 }
6061         }
6062
6063         /* leave reset and reject asserted */
6064         brcmf_sdcard_reg_write(sdh, CORE_SB(corebase, sbtmstatelow), 4,
6065                 (SBTML_REJ | SBTML_RESET));
6066         udelay(1);
6067 }
6068
6069 static int
6070 brcmf_sdbrcm_chip_attach(struct dhd_bus *bus, void *regs)
6071 {
6072         struct chip_info *ci;
6073         int err;
6074         u8 clkval, clkset;
6075
6076         DHD_TRACE(("%s: Enter\n", __func__));
6077
6078         /* alloc chip_info_t */
6079         ci = kmalloc(sizeof(struct chip_info), GFP_ATOMIC);
6080         if (NULL == ci) {
6081                 DHD_ERROR(("%s: malloc failed!\n", __func__));
6082                 return -ENOMEM;
6083         }
6084
6085         memset((unsigned char *)ci, 0, sizeof(struct chip_info));
6086
6087         /* bus/core/clk setup for register access */
6088         /* Try forcing SDIO core to do ALPAvail request only */
6089         clkset = SBSDIO_FORCE_HW_CLKREQ_OFF | SBSDIO_ALP_AVAIL_REQ;
6090         brcmf_sdcard_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR,
6091                         clkset, &err);
6092         if (err) {
6093                 DHD_ERROR(("%s: error writing for HT off\n", __func__));
6094                 goto fail;
6095         }
6096
6097         /* If register supported, wait for ALPAvail and then force ALP */
6098         /* This may take up to 15 milliseconds */
6099         clkval = brcmf_sdcard_cfg_read(bus->sdh, SDIO_FUNC_1,
6100                         SBSDIO_FUNC1_CHIPCLKCSR, NULL);
6101         if ((clkval & ~SBSDIO_AVBITS) == clkset) {
6102                 SPINWAIT(((clkval =
6103                                 brcmf_sdcard_cfg_read(bus->sdh, SDIO_FUNC_1,
6104                                                 SBSDIO_FUNC1_CHIPCLKCSR,
6105                                                 NULL)),
6106                                 !SBSDIO_ALPAV(clkval)),
6107                                 PMU_MAX_TRANSITION_DLY);
6108                 if (!SBSDIO_ALPAV(clkval)) {
6109                         DHD_ERROR(("%s: timeout on ALPAV wait, clkval 0x%02x\n",
6110                                 __func__, clkval));
6111                         err = -EBUSY;
6112                         goto fail;
6113                 }
6114                 clkset = SBSDIO_FORCE_HW_CLKREQ_OFF |
6115                                 SBSDIO_FORCE_ALP;
6116                 brcmf_sdcard_cfg_write(bus->sdh, SDIO_FUNC_1,
6117                                 SBSDIO_FUNC1_CHIPCLKCSR,
6118                                 clkset, &err);
6119                 udelay(65);
6120         } else {
6121                 DHD_ERROR(("%s: ChipClkCSR access: wrote 0x%02x read 0x%02x\n",
6122                         __func__, clkset, clkval));
6123                 err = -EACCES;
6124                 goto fail;
6125         }
6126
6127         /* Also, disable the extra SDIO pull-ups */
6128         brcmf_sdcard_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_SDIOPULLUP,
6129                                0, NULL);
6130
6131         err = brcmf_sdbrcm_chip_recognition(bus->sdh, ci, regs);
6132         if (err)
6133                 goto fail;
6134
6135         /*
6136          * Make sure any on-chip ARM is off (in case strapping is wrong),
6137          * or downloaded code was already running.
6138          */
6139         brcmf_sdbrcm_chip_disablecore(bus->sdh, ci->armcorebase);
6140
6141         brcmf_sdcard_reg_write(bus->sdh,
6142                 CORE_CC_REG(ci->cccorebase, gpiopullup), 4, 0);
6143         brcmf_sdcard_reg_write(bus->sdh,
6144                 CORE_CC_REG(ci->cccorebase, gpiopulldown), 4, 0);
6145
6146         /* Disable F2 to clear any intermediate frame state on the dongle */
6147         brcmf_sdcard_cfg_write(bus->sdh, SDIO_FUNC_0, SDIO_CCCR_IOEx,
6148                 SDIO_FUNC_ENABLE_1, NULL);
6149
6150         /* WAR: cmd52 backplane read so core HW will drop ALPReq */
6151         clkval = brcmf_sdcard_cfg_read(bus->sdh, SDIO_FUNC_1,
6152                         0, NULL);
6153
6154         /* Done with backplane-dependent accesses, can drop clock... */
6155         brcmf_sdcard_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR,
6156                                0, NULL);
6157
6158         bus->ci = ci;
6159         return 0;
6160 fail:
6161         bus->ci = NULL;
6162         kfree(ci);
6163         return err;
6164 }
6165
6166 static void
6167 brcmf_sdbrcm_chip_resetcore(struct brcmf_sdio *sdh, u32 corebase)
6168 {
6169         u32 regdata;
6170
6171         /*
6172          * Must do the disable sequence first to work for
6173          * arbitrary current core state.
6174          */
6175         brcmf_sdbrcm_chip_disablecore(sdh, corebase);
6176
6177         /*
6178          * Now do the initialization sequence.
6179          * set reset while enabling the clock and
6180          * forcing them on throughout the core
6181          */
6182         brcmf_sdcard_reg_write(sdh, CORE_SB(corebase, sbtmstatelow), 4,
6183                 ((SICF_FGC | SICF_CLOCK_EN) << SBTML_SICF_SHIFT) |
6184                 SBTML_RESET);
6185         udelay(1);
6186
6187         regdata = brcmf_sdcard_reg_read(sdh, CORE_SB(corebase, sbtmstatehigh),
6188                                         4);
6189         if (regdata & SBTMH_SERR)
6190                 brcmf_sdcard_reg_write(sdh, CORE_SB(corebase, sbtmstatehigh),
6191                                        4, 0);
6192
6193         regdata = brcmf_sdcard_reg_read(sdh, CORE_SB(corebase, sbimstate), 4);
6194         if (regdata & (SBIM_IBE | SBIM_TO))
6195                 brcmf_sdcard_reg_write(sdh, CORE_SB(corebase, sbimstate), 4,
6196                         regdata & ~(SBIM_IBE | SBIM_TO));
6197
6198         /* clear reset and allow it to propagate throughout the core */
6199         brcmf_sdcard_reg_write(sdh, CORE_SB(corebase, sbtmstatelow), 4,
6200                 (SICF_FGC << SBTML_SICF_SHIFT) |
6201                 (SICF_CLOCK_EN << SBTML_SICF_SHIFT));
6202         udelay(1);
6203
6204         /* leave clock enabled */
6205         brcmf_sdcard_reg_write(sdh, CORE_SB(corebase, sbtmstatelow), 4,
6206                 (SICF_CLOCK_EN << SBTML_SICF_SHIFT));
6207         udelay(1);
6208 }
6209
6210 /* SDIO Pad drive strength to select value mappings */
6211 struct sdiod_drive_str {
6212         u8 strength;    /* Pad Drive Strength in mA */
6213         u8 sel;         /* Chip-specific select value */
6214 };
6215
6216 /* SDIO Drive Strength to sel value table for PMU Rev 1 */
6217 static const struct sdiod_drive_str sdiod_drive_strength_tab1[] = {
6218         {
6219         4, 0x2}, {
6220         2, 0x3}, {
6221         1, 0x0}, {
6222         0, 0x0}
6223         };
6224
6225 /* SDIO Drive Strength to sel value table for PMU Rev 2, 3 */
6226 static const struct sdiod_drive_str sdiod_drive_strength_tab2[] = {
6227         {
6228         12, 0x7}, {
6229         10, 0x6}, {
6230         8, 0x5}, {
6231         6, 0x4}, {
6232         4, 0x2}, {
6233         2, 0x1}, {
6234         0, 0x0}
6235         };
6236
6237 /* SDIO Drive Strength to sel value table for PMU Rev 8 (1.8V) */
6238 static const struct sdiod_drive_str sdiod_drive_strength_tab3[] = {
6239         {
6240         32, 0x7}, {
6241         26, 0x6}, {
6242         22, 0x5}, {
6243         16, 0x4}, {
6244         12, 0x3}, {
6245         8, 0x2}, {
6246         4, 0x1}, {
6247         0, 0x0}
6248         };
6249
6250 #define SDIOD_DRVSTR_KEY(chip, pmu)     (((chip) << 16) | (pmu))
6251
6252 static void
6253 brcmf_sdbrcm_sdiod_drive_strength_init(struct dhd_bus *bus, u32 drivestrength) {
6254         struct sdiod_drive_str *str_tab = NULL;
6255         u32 str_mask = 0;
6256         u32 str_shift = 0;
6257         char chn[8];
6258
6259         if (!(bus->ci->cccaps & CC_CAP_PMU))
6260                 return;
6261
6262         switch (SDIOD_DRVSTR_KEY(bus->ci->chip, bus->ci->pmurev)) {
6263         case SDIOD_DRVSTR_KEY(BCM4325_CHIP_ID, 1):
6264                 str_tab = (struct sdiod_drive_str *)&sdiod_drive_strength_tab1;
6265                 str_mask = 0x30000000;
6266                 str_shift = 28;
6267                 break;
6268         case SDIOD_DRVSTR_KEY(BCM4325_CHIP_ID, 2):
6269         case SDIOD_DRVSTR_KEY(BCM4325_CHIP_ID, 3):
6270                 str_tab = (struct sdiod_drive_str *)&sdiod_drive_strength_tab2;
6271                 str_mask = 0x00003800;
6272                 str_shift = 11;
6273                 break;
6274         case SDIOD_DRVSTR_KEY(BCM4336_CHIP_ID, 8):
6275                 str_tab = (struct sdiod_drive_str *)&sdiod_drive_strength_tab3;
6276                 str_mask = 0x00003800;
6277                 str_shift = 11;
6278                 break;
6279         default:
6280                 DHD_ERROR(("No SDIO Drive strength init"
6281                         "done for chip %s rev %d pmurev %d\n",
6282                         brcmu_chipname(bus->ci->chip, chn, 8),
6283                         bus->ci->chiprev, bus->ci->pmurev));
6284                 break;
6285         }
6286
6287         if (str_tab != NULL) {
6288                 u32 drivestrength_sel = 0;
6289                 u32 cc_data_temp;
6290                 int i;
6291
6292                 for (i = 0; str_tab[i].strength != 0; i++) {
6293                         if (drivestrength >= str_tab[i].strength) {
6294                                 drivestrength_sel = str_tab[i].sel;
6295                                 break;
6296                         }
6297                 }
6298
6299                 brcmf_sdcard_reg_write(bus->sdh,
6300                         CORE_CC_REG(bus->ci->cccorebase, chipcontrol_addr),
6301                         4, 1);
6302                 cc_data_temp = brcmf_sdcard_reg_read(bus->sdh,
6303                         CORE_CC_REG(bus->ci->cccorebase, chipcontrol_addr), 4);
6304                 cc_data_temp &= ~str_mask;
6305                 drivestrength_sel <<= str_shift;
6306                 cc_data_temp |= drivestrength_sel;
6307                 brcmf_sdcard_reg_write(bus->sdh,
6308                         CORE_CC_REG(bus->ci->cccorebase, chipcontrol_addr),
6309                         4, cc_data_temp);
6310
6311                 DHD_INFO(("SDIO: %dmA drive strength selected, set to 0x%08x\n",
6312                         drivestrength, cc_data_temp));
6313         }
6314 }
6315
6316 static void
6317 brcmf_sdbrcm_chip_detach(struct dhd_bus *bus)
6318 {
6319         DHD_TRACE(("%s: Enter\n", __func__));
6320
6321         kfree(bus->ci);
6322         bus->ci = NULL;
6323 }
6324
6325 static void
6326 brcmf_sdbrcm_wait_for_event(dhd_pub_t *dhd, bool *lockvar)
6327 {
6328         brcmf_os_sdunlock(dhd);
6329         wait_event_interruptible_timeout(dhd->bus->ctrl_wait,
6330                                          (*lockvar == false), HZ * 2);
6331         brcmf_os_sdlock(dhd);
6332         return;
6333 }
6334
6335 static void
6336 brcmf_sdbrcm_wait_event_wakeup(dhd_bus_t *bus)
6337 {
6338         if (waitqueue_active(&bus->ctrl_wait))
6339                 wake_up_interruptible(&bus->ctrl_wait);
6340         return;
6341 }