2 * Sonics Silicon Backplane
3 * PCMCIA-Hostbus related functions
5 * Copyright 2006 Johannes Berg <johannes@sipsolutions.net>
6 * Copyright 2007 Michael Buesch <mb@bu3sch.de>
8 * Licensed under the GNU/GPL. See COPYING for details.
11 #include <linux/ssb/ssb.h>
12 #include <linux/delay.h>
15 #include <pcmcia/cs_types.h>
16 #include <pcmcia/cs.h>
17 #include <pcmcia/cistpl.h>
18 #include <pcmcia/ciscode.h>
19 #include <pcmcia/ds.h>
20 #include <pcmcia/cisreg.h>
22 #include "ssb_private.h"
25 /* Define the following to 1 to enable a printk on each coreswitch. */
26 #define SSB_VERBOSE_PCMCIACORESWITCH_DEBUG 0
29 int ssb_pcmcia_switch_coreidx(struct ssb_bus *bus,
32 struct pcmcia_device *pdev = bus->host_pcmcia;
40 addr = (coreidx * SSB_CORE_SIZE) + SSB_ENUM_BASE;
42 reg.Action = CS_WRITE;
44 reg.Value = (addr & 0x0000F000) >> 12;
45 err = pcmcia_access_configuration_register(pdev, ®);
46 if (err != CS_SUCCESS)
49 reg.Value = (addr & 0x00FF0000) >> 16;
50 err = pcmcia_access_configuration_register(pdev, ®);
51 if (err != CS_SUCCESS)
54 reg.Value = (addr & 0xFF000000) >> 24;
55 err = pcmcia_access_configuration_register(pdev, ®);
56 if (err != CS_SUCCESS)
63 err = pcmcia_access_configuration_register(pdev, ®);
64 if (err != CS_SUCCESS)
66 read_addr |= ((u32)(reg.Value & 0x0F)) << 12;
68 err = pcmcia_access_configuration_register(pdev, ®);
69 if (err != CS_SUCCESS)
71 read_addr |= ((u32)reg.Value) << 16;
73 err = pcmcia_access_configuration_register(pdev, ®);
74 if (err != CS_SUCCESS)
76 read_addr |= ((u32)reg.Value) << 24;
78 cur_core = (read_addr - SSB_ENUM_BASE) / SSB_CORE_SIZE;
79 if (cur_core == coreidx)
82 if (attempts++ > SSB_BAR0_MAX_RETRIES)
89 ssb_printk(KERN_ERR PFX "Failed to switch to core %u\n", coreidx);
93 int ssb_pcmcia_switch_core(struct ssb_bus *bus,
94 struct ssb_device *dev)
98 #if SSB_VERBOSE_PCMCIACORESWITCH_DEBUG
99 ssb_printk(KERN_INFO PFX
100 "Switching to %s core, index %d\n",
101 ssb_core_name(dev->id.coreid),
105 err = ssb_pcmcia_switch_coreidx(bus, dev->core_index);
107 bus->mapped_device = dev;
112 int ssb_pcmcia_switch_segment(struct ssb_bus *bus, u8 seg)
118 SSB_WARN_ON((seg != 0) && (seg != 1));
122 reg.Action = CS_WRITE;
124 res = pcmcia_access_configuration_register(bus->host_pcmcia, ®);
125 if (unlikely(res != CS_SUCCESS))
128 reg.Action = CS_READ;
129 res = pcmcia_access_configuration_register(bus->host_pcmcia, ®);
130 if (unlikely(res != CS_SUCCESS))
133 if (reg.Value == seg)
136 if (unlikely(attempts++ > SSB_BAR0_MAX_RETRIES))
140 bus->mapped_pcmcia_seg = seg;
144 ssb_printk(KERN_ERR PFX "Failed to switch pcmcia segment\n");
148 static int select_core_and_segment(struct ssb_device *dev,
151 struct ssb_bus *bus = dev->bus;
155 if (*offset >= 0x800) {
161 if (unlikely(dev != bus->mapped_device)) {
162 err = ssb_pcmcia_switch_core(bus, dev);
166 if (unlikely(need_segment != bus->mapped_pcmcia_seg)) {
167 err = ssb_pcmcia_switch_segment(bus, need_segment);
175 static u8 ssb_pcmcia_read8(struct ssb_device *dev, u16 offset)
177 struct ssb_bus *bus = dev->bus;
182 spin_lock_irqsave(&bus->bar_lock, flags);
183 err = select_core_and_segment(dev, &offset);
185 value = readb(bus->mmio + offset);
186 spin_unlock_irqrestore(&bus->bar_lock, flags);
191 static u16 ssb_pcmcia_read16(struct ssb_device *dev, u16 offset)
193 struct ssb_bus *bus = dev->bus;
198 spin_lock_irqsave(&bus->bar_lock, flags);
199 err = select_core_and_segment(dev, &offset);
201 value = readw(bus->mmio + offset);
202 spin_unlock_irqrestore(&bus->bar_lock, flags);
207 static u32 ssb_pcmcia_read32(struct ssb_device *dev, u16 offset)
209 struct ssb_bus *bus = dev->bus;
212 u32 lo = 0xFFFFFFFF, hi = 0xFFFFFFFF;
214 spin_lock_irqsave(&bus->bar_lock, flags);
215 err = select_core_and_segment(dev, &offset);
217 lo = readw(bus->mmio + offset);
218 hi = readw(bus->mmio + offset + 2);
220 spin_unlock_irqrestore(&bus->bar_lock, flags);
222 return (lo | (hi << 16));
225 static void ssb_pcmcia_write8(struct ssb_device *dev, u16 offset, u8 value)
227 struct ssb_bus *bus = dev->bus;
231 spin_lock_irqsave(&bus->bar_lock, flags);
232 err = select_core_and_segment(dev, &offset);
234 writeb(value, bus->mmio + offset);
236 spin_unlock_irqrestore(&bus->bar_lock, flags);
239 static void ssb_pcmcia_write16(struct ssb_device *dev, u16 offset, u16 value)
241 struct ssb_bus *bus = dev->bus;
245 spin_lock_irqsave(&bus->bar_lock, flags);
246 err = select_core_and_segment(dev, &offset);
248 writew(value, bus->mmio + offset);
250 spin_unlock_irqrestore(&bus->bar_lock, flags);
253 static void ssb_pcmcia_write32(struct ssb_device *dev, u16 offset, u32 value)
255 struct ssb_bus *bus = dev->bus;
259 spin_lock_irqsave(&bus->bar_lock, flags);
260 err = select_core_and_segment(dev, &offset);
262 writew((value & 0x0000FFFF), bus->mmio + offset);
263 writew(((value & 0xFFFF0000) >> 16), bus->mmio + offset + 2);
266 spin_unlock_irqrestore(&bus->bar_lock, flags);
269 /* Not "static", as it's used in main.c */
270 const struct ssb_bus_ops ssb_pcmcia_ops = {
271 .read8 = ssb_pcmcia_read8,
272 .read16 = ssb_pcmcia_read16,
273 .read32 = ssb_pcmcia_read32,
274 .write8 = ssb_pcmcia_write8,
275 .write16 = ssb_pcmcia_write16,
276 .write32 = ssb_pcmcia_write32,
279 #include <linux/etherdevice.h>
280 int ssb_pcmcia_get_invariants(struct ssb_bus *bus,
281 struct ssb_init_invariants *iv)
284 random_ether_addr(iv->sprom.il0mac);
288 int ssb_pcmcia_init(struct ssb_bus *bus)
293 if (bus->bustype != SSB_BUSTYPE_PCMCIA)
296 /* Switch segment to a known state and sync
297 * bus->mapped_pcmcia_seg with hardware state. */
298 ssb_pcmcia_switch_segment(bus, 0);
300 /* Init IRQ routing */
301 reg.Action = CS_READ;
303 if (bus->chip_id == 0x4306)
307 err = pcmcia_access_configuration_register(bus->host_pcmcia, ®);
308 if (err != CS_SUCCESS)
310 reg.Action = CS_WRITE;
311 reg.Value |= 0x04 | 0x01;
312 err = pcmcia_access_configuration_register(bus->host_pcmcia, ®);
313 if (err != CS_SUCCESS)