drivers/spi/spi-clps711x.c

   1 /*
   2  *  CLPS711X SPI bus driver
   3  *
   4  *  Copyright (C) 2012-2014 Alexander Shiyan <shc_work@mail.ru>
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  */
  11
  12 #include <linux/io.h>
  13 #include <linux/clk.h>
  14 #include <linux/init.h>
  15 #include <linux/gpio.h>
  16 #include <linux/delay.h>
  17 #include <linux/module.h>
  18 #include <linux/interrupt.h>
  19 #include <linux/platform_device.h>
  20 #include <linux/regmap.h>
  21 #include <linux/mfd/syscon.h>
  22 #include <linux/mfd/syscon/clps711x.h>
  23 #include <linux/spi/spi.h>
  24 #include <linux/platform_data/spi-clps711x.h>
  25
  26 #define DRIVER_NAME     "spi-clps711x"
  27
  28 #define SYNCIO_FRMLEN(x)        ((x) << 8)
  29 #define SYNCIO_TXFRMEN          (1 << 14)
  30
  31 struct spi_clps711x_data {
  32         void __iomem            *syncio;
  33         struct regmap           *syscon;
  34         struct regmap           *syscon1;
  35         struct clk              *spi_clk;
  36
  37         u8                      *tx_buf;
  38         u8                      *rx_buf;
  39         unsigned int            bpw;
  40         int                     len;
  41 };
  42
  43 static int spi_clps711x_setup(struct spi_device *spi)
  44 {
  45         /* We are expect that SPI-device is not selected */
  46         gpio_direction_output(spi->cs_gpio, !(spi->mode & SPI_CS_HIGH));
  47
  48         return 0;
  49 }
  50
  51 static void spi_clps711x_setup_xfer(struct spi_device *spi,
  52                                     struct spi_transfer *xfer)
  53 {
  54         struct spi_master *master = spi->master;
  55         struct spi_clps711x_data *hw = spi_master_get_devdata(master);
  56
  57         /* Setup SPI frequency divider */
  58         if (xfer->speed_hz >= master->max_speed_hz)
  59                 regmap_update_bits(hw->syscon1, SYSCON_OFFSET,
  60                                    SYSCON1_ADCKSEL_MASK, SYSCON1_ADCKSEL(3));
  61         else if (xfer->speed_hz >= (master->max_speed_hz / 2))
  62                 regmap_update_bits(hw->syscon1, SYSCON_OFFSET,
  63                                    SYSCON1_ADCKSEL_MASK, SYSCON1_ADCKSEL(2));
  64         else if (xfer->speed_hz >= (master->max_speed_hz / 8))
  65                 regmap_update_bits(hw->syscon1, SYSCON_OFFSET,
  66                                    SYSCON1_ADCKSEL_MASK, SYSCON1_ADCKSEL(1));
  67         else
  68                 regmap_update_bits(hw->syscon1, SYSCON_OFFSET,
  69                                    SYSCON1_ADCKSEL_MASK, SYSCON1_ADCKSEL(0));
  70 }
  71
  72 static int spi_clps711x_prepare_message(struct spi_master *master,
  73                                         struct spi_message *msg)
  74 {
  75         struct spi_clps711x_data *hw = spi_master_get_devdata(master);
  76         struct spi_device *spi = msg->spi;
  77
  78         /* Setup mode for transfer */
  79         return regmap_update_bits(hw->syscon, SYSCON_OFFSET, SYSCON3_ADCCKNSEN,
  80                                   (spi->mode & SPI_CPHA) ?
  81                                   SYSCON3_ADCCKNSEN : 0);
  82 }
  83
  84 static int spi_clps711x_transfer_one(struct spi_master *master,
  85                                      struct spi_device *spi,
  86                                      struct spi_transfer *xfer)
  87 {
  88         struct spi_clps711x_data *hw = spi_master_get_devdata(master);
  89         u8 data;
  90
  91         spi_clps711x_setup_xfer(spi, xfer);
  92
  93         hw->len = xfer->len;
  94         hw->bpw = xfer->bits_per_word;
  95         hw->tx_buf = (u8 *)xfer->tx_buf;
  96         hw->rx_buf = (u8 *)xfer->rx_buf;
  97
  98         /* Initiate transfer */
  99         data = hw->tx_buf ? *hw->tx_buf++ : 0;
 100         writel(data | SYNCIO_FRMLEN(hw->bpw) | SYNCIO_TXFRMEN, hw->syncio);
 101
 102         return 1;
 103 }
 104
 105 static irqreturn_t spi_clps711x_isr(int irq, void *dev_id)
 106 {
 107         struct spi_master *master = dev_id;
 108         struct spi_clps711x_data *hw = spi_master_get_devdata(master);
 109         u8 data;
 110
 111         /* Handle RX */
 112         data = readb(hw->syncio);
 113         if (hw->rx_buf)
 114                 *hw->rx_buf++ = data;
 115
 116         /* Handle TX */
 117         if (--hw->len > 0) {
 118                 data = hw->tx_buf ? *hw->tx_buf++ : 0;
 119                 writel(data | SYNCIO_FRMLEN(hw->bpw) | SYNCIO_TXFRMEN,
 120                        hw->syncio);
 121         } else
 122                 spi_finalize_current_transfer(master);
 123
 124         return IRQ_HANDLED;
 125 }
 126
 127 static int spi_clps711x_probe(struct platform_device *pdev)
 128 {
 129         struct spi_clps711x_data *hw;
 130         struct spi_clps711x_pdata *pdata = dev_get_platdata(&pdev->dev);
 131         struct spi_master *master;
 132         struct resource *res;
 133         int i, irq, ret;
 134
 135         if (!pdata) {
 136                 dev_err(&pdev->dev, "No platform data supplied\n");
 137                 return -EINVAL;
 138         }
 139
 140         if (pdata->num_chipselect < 1) {
 141                 dev_err(&pdev->dev, "At least one CS must be defined\n");
 142                 return -EINVAL;
 143         }
 144
 145         irq = platform_get_irq(pdev, 0);
 146         if (irq < 0)
 147                 return irq;
 148
 149         master = spi_alloc_master(&pdev->dev, sizeof(*hw));
 150         if (!master)
 151                 return -ENOMEM;
 152
 153         master->cs_gpios = devm_kzalloc(&pdev->dev, sizeof(int) *
 154                                         pdata->num_chipselect, GFP_KERNEL);
 155         if (!master->cs_gpios) {
 156                 ret = -ENOMEM;
 157                 goto err_out;
 158         }
 159
 160         master->bus_num = pdev->id;
 161         master->mode_bits = SPI_CPHA | SPI_CS_HIGH;
 162         master->bits_per_word_mask =  SPI_BPW_RANGE_MASK(1, 8);
 163         master->num_chipselect = pdata->num_chipselect;
 164         master->setup = spi_clps711x_setup;
 165         master->prepare_message = spi_clps711x_prepare_message;
 166         master->transfer_one = spi_clps711x_transfer_one;
 167
 168         hw = spi_master_get_devdata(master);
 169
 170         for (i = 0; i < master->num_chipselect; i++) {
 171                 master->cs_gpios[i] = pdata->chipselect[i];
 172                 ret = devm_gpio_request(&pdev->dev, master->cs_gpios[i],
 173                                         DRIVER_NAME);
 174                 if (ret) {
 175                         dev_err(&pdev->dev, "Can't get CS GPIO %i\n", i);
 176                         goto err_out;
 177                 }
 178         }
 179
 180         hw->spi_clk = devm_clk_get(&pdev->dev, "spi");
 181         if (IS_ERR(hw->spi_clk)) {
 182                 dev_err(&pdev->dev, "Can't get clocks\n");
 183                 ret = PTR_ERR(hw->spi_clk);
 184                 goto err_out;
 185         }
 186         master->max_speed_hz = clk_get_rate(hw->spi_clk);
 187
 188         platform_set_drvdata(pdev, master);
 189
 190         hw->syscon = syscon_regmap_lookup_by_pdevname("syscon.3");
 191         if (IS_ERR(hw->syscon)) {
 192                 ret = PTR_ERR(hw->syscon);
 193                 goto err_out;
 194         }
 195
 196         hw->syscon1 = syscon_regmap_lookup_by_pdevname("syscon.1");
 197         if (IS_ERR(hw->syscon1)) {
 198                 ret = PTR_ERR(hw->syscon1);
 199                 goto err_out;
 200         }
 201
 202         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 203         hw->syncio = devm_ioremap_resource(&pdev->dev, res);
 204         if (IS_ERR(hw->syncio)) {
 205                 ret = PTR_ERR(hw->syncio);
 206                 goto err_out;
 207         }
 208
 209         /* Disable extended mode due hardware problems */
 210         regmap_update_bits(hw->syscon, SYSCON_OFFSET, SYSCON3_ADCCON, 0);
 211
 212         /* Clear possible pending interrupt */
 213         readl(hw->syncio);
 214
 215         ret = devm_request_irq(&pdev->dev, irq, spi_clps711x_isr, 0,
 216                                dev_name(&pdev->dev), master);
 217         if (ret)
 218                 goto err_out;
 219
 220         ret = devm_spi_register_master(&pdev->dev, master);
 221         if (!ret) {
 222                 dev_info(&pdev->dev,
 223                          "SPI bus driver initialized. Master clock %u Hz\n",
 224                          master->max_speed_hz);
 225                 return 0;
 226         }
 227
 228         dev_err(&pdev->dev, "Failed to register master\n");
 229
 230 err_out:
 231         spi_master_put(master);
 232
 233         return ret;
 234 }
 235
 236 static struct platform_driver clps711x_spi_driver = {
 237         .driver = {
 238                 .name   = DRIVER_NAME,
 239                 .owner  = THIS_MODULE,
 240         },
 241         .probe  = spi_clps711x_probe,
 242 };
 243 module_platform_driver(clps711x_spi_driver);
 244
 245 MODULE_LICENSE("GPL");
 246 MODULE_AUTHOR("Alexander Shiyan <shc_work@mail.ru>");
 247 MODULE_DESCRIPTION("CLPS711X SPI bus driver");
 248 MODULE_ALIAS("platform:" DRIVER_NAME);