USB: ftdi_sio: Add PID for accesio products
[pandora-kernel.git] / drivers / serial / uartlite.c
1 /*
2  * uartlite.c: Serial driver for Xilinx uartlite serial controller
3  *
4  * Copyright (C) 2006 Peter Korsgaard <jacmet@sunsite.dk>
5  * Copyright (C) 2007 Secret Lab Technologies Ltd.
6  *
7  * This file is licensed under the terms of the GNU General Public License
8  * version 2.  This program is licensed "as is" without any warranty of any
9  * kind, whether express or implied.
10  */
11
12 #include <linux/platform_device.h>
13 #include <linux/module.h>
14 #include <linux/console.h>
15 #include <linux/serial.h>
16 #include <linux/serial_core.h>
17 #include <linux/tty.h>
18 #include <linux/delay.h>
19 #include <linux/interrupt.h>
20 #include <linux/init.h>
21 #include <asm/io.h>
22 #if defined(CONFIG_OF) && (defined(CONFIG_PPC32) || defined(CONFIG_MICROBLAZE))
23 #include <linux/of.h>
24 #include <linux/of_address.h>
25 #include <linux/of_device.h>
26 #include <linux/of_platform.h>
27
28 /* Match table for of_platform binding */
29 static struct of_device_id ulite_of_match[] __devinitdata = {
30         { .compatible = "xlnx,opb-uartlite-1.00.b", },
31         { .compatible = "xlnx,xps-uartlite-1.00.a", },
32         {}
33 };
34 MODULE_DEVICE_TABLE(of, ulite_of_match);
35
36 #endif
37
38 #define ULITE_NAME              "ttyUL"
39 #define ULITE_MAJOR             204
40 #define ULITE_MINOR             187
41 #define ULITE_NR_UARTS          4
42
43 /* ---------------------------------------------------------------------
44  * Register definitions
45  *
46  * For register details see datasheet:
47  * http://www.xilinx.com/bvdocs/ipcenter/data_sheet/opb_uartlite.pdf
48  */
49
50 #define ULITE_RX                0x00
51 #define ULITE_TX                0x04
52 #define ULITE_STATUS            0x08
53 #define ULITE_CONTROL           0x0c
54
55 #define ULITE_REGION            16
56
57 #define ULITE_STATUS_RXVALID    0x01
58 #define ULITE_STATUS_RXFULL     0x02
59 #define ULITE_STATUS_TXEMPTY    0x04
60 #define ULITE_STATUS_TXFULL     0x08
61 #define ULITE_STATUS_IE         0x10
62 #define ULITE_STATUS_OVERRUN    0x20
63 #define ULITE_STATUS_FRAME      0x40
64 #define ULITE_STATUS_PARITY     0x80
65
66 #define ULITE_CONTROL_RST_TX    0x01
67 #define ULITE_CONTROL_RST_RX    0x02
68 #define ULITE_CONTROL_IE        0x10
69
70
71 static struct uart_port ulite_ports[ULITE_NR_UARTS];
72
73 /* ---------------------------------------------------------------------
74  * Core UART driver operations
75  */
76
77 static int ulite_receive(struct uart_port *port, int stat)
78 {
79         struct tty_struct *tty = port->state->port.tty;
80         unsigned char ch = 0;
81         char flag = TTY_NORMAL;
82
83         if ((stat & (ULITE_STATUS_RXVALID | ULITE_STATUS_OVERRUN
84                      | ULITE_STATUS_FRAME)) == 0)
85                 return 0;
86
87         /* stats */
88         if (stat & ULITE_STATUS_RXVALID) {
89                 port->icount.rx++;
90                 ch = ioread32be(port->membase + ULITE_RX);
91
92                 if (stat & ULITE_STATUS_PARITY)
93                         port->icount.parity++;
94         }
95
96         if (stat & ULITE_STATUS_OVERRUN)
97                 port->icount.overrun++;
98
99         if (stat & ULITE_STATUS_FRAME)
100                 port->icount.frame++;
101
102
103         /* drop byte with parity error if IGNPAR specificed */
104         if (stat & port->ignore_status_mask & ULITE_STATUS_PARITY)
105                 stat &= ~ULITE_STATUS_RXVALID;
106
107         stat &= port->read_status_mask;
108
109         if (stat & ULITE_STATUS_PARITY)
110                 flag = TTY_PARITY;
111
112
113         stat &= ~port->ignore_status_mask;
114
115         if (stat & ULITE_STATUS_RXVALID)
116                 tty_insert_flip_char(tty, ch, flag);
117
118         if (stat & ULITE_STATUS_FRAME)
119                 tty_insert_flip_char(tty, 0, TTY_FRAME);
120
121         if (stat & ULITE_STATUS_OVERRUN)
122                 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
123
124         return 1;
125 }
126
127 static int ulite_transmit(struct uart_port *port, int stat)
128 {
129         struct circ_buf *xmit  = &port->state->xmit;
130
131         if (stat & ULITE_STATUS_TXFULL)
132                 return 0;
133
134         if (port->x_char) {
135                 iowrite32be(port->x_char, port->membase + ULITE_TX);
136                 port->x_char = 0;
137                 port->icount.tx++;
138                 return 1;
139         }
140
141         if (uart_circ_empty(xmit) || uart_tx_stopped(port))
142                 return 0;
143
144         iowrite32be(xmit->buf[xmit->tail], port->membase + ULITE_TX);
145         xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE-1);
146         port->icount.tx++;
147
148         /* wake up */
149         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
150                 uart_write_wakeup(port);
151
152         return 1;
153 }
154
155 static irqreturn_t ulite_isr(int irq, void *dev_id)
156 {
157         struct uart_port *port = dev_id;
158         int busy, n = 0;
159
160         do {
161                 int stat = ioread32be(port->membase + ULITE_STATUS);
162                 busy  = ulite_receive(port, stat);
163                 busy |= ulite_transmit(port, stat);
164                 n++;
165         } while (busy);
166
167         /* work done? */
168         if (n > 1) {
169                 tty_flip_buffer_push(port->state->port.tty);
170                 return IRQ_HANDLED;
171         } else {
172                 return IRQ_NONE;
173         }
174 }
175
176 static unsigned int ulite_tx_empty(struct uart_port *port)
177 {
178         unsigned long flags;
179         unsigned int ret;
180
181         spin_lock_irqsave(&port->lock, flags);
182         ret = ioread32be(port->membase + ULITE_STATUS);
183         spin_unlock_irqrestore(&port->lock, flags);
184
185         return ret & ULITE_STATUS_TXEMPTY ? TIOCSER_TEMT : 0;
186 }
187
188 static unsigned int ulite_get_mctrl(struct uart_port *port)
189 {
190         return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
191 }
192
193 static void ulite_set_mctrl(struct uart_port *port, unsigned int mctrl)
194 {
195         /* N/A */
196 }
197
198 static void ulite_stop_tx(struct uart_port *port)
199 {
200         /* N/A */
201 }
202
203 static void ulite_start_tx(struct uart_port *port)
204 {
205         ulite_transmit(port, ioread32be(port->membase + ULITE_STATUS));
206 }
207
208 static void ulite_stop_rx(struct uart_port *port)
209 {
210         /* don't forward any more data (like !CREAD) */
211         port->ignore_status_mask = ULITE_STATUS_RXVALID | ULITE_STATUS_PARITY
212                 | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
213 }
214
215 static void ulite_enable_ms(struct uart_port *port)
216 {
217         /* N/A */
218 }
219
220 static void ulite_break_ctl(struct uart_port *port, int ctl)
221 {
222         /* N/A */
223 }
224
225 static int ulite_startup(struct uart_port *port)
226 {
227         int ret;
228
229         ret = request_irq(port->irq, ulite_isr,
230                           IRQF_SHARED | IRQF_SAMPLE_RANDOM, "uartlite", port);
231         if (ret)
232                 return ret;
233
234         iowrite32be(ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX,
235                port->membase + ULITE_CONTROL);
236         iowrite32be(ULITE_CONTROL_IE, port->membase + ULITE_CONTROL);
237
238         return 0;
239 }
240
241 static void ulite_shutdown(struct uart_port *port)
242 {
243         iowrite32be(0, port->membase + ULITE_CONTROL);
244         ioread32be(port->membase + ULITE_CONTROL); /* dummy */
245         free_irq(port->irq, port);
246 }
247
248 static void ulite_set_termios(struct uart_port *port, struct ktermios *termios,
249                               struct ktermios *old)
250 {
251         unsigned long flags;
252         unsigned int baud;
253
254         spin_lock_irqsave(&port->lock, flags);
255
256         port->read_status_mask = ULITE_STATUS_RXVALID | ULITE_STATUS_OVERRUN
257                 | ULITE_STATUS_TXFULL;
258
259         if (termios->c_iflag & INPCK)
260                 port->read_status_mask |=
261                         ULITE_STATUS_PARITY | ULITE_STATUS_FRAME;
262
263         port->ignore_status_mask = 0;
264         if (termios->c_iflag & IGNPAR)
265                 port->ignore_status_mask |= ULITE_STATUS_PARITY
266                         | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
267
268         /* ignore all characters if CREAD is not set */
269         if ((termios->c_cflag & CREAD) == 0)
270                 port->ignore_status_mask |=
271                         ULITE_STATUS_RXVALID | ULITE_STATUS_PARITY
272                         | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
273
274         /* update timeout */
275         baud = uart_get_baud_rate(port, termios, old, 0, 460800);
276         uart_update_timeout(port, termios->c_cflag, baud);
277
278         spin_unlock_irqrestore(&port->lock, flags);
279 }
280
281 static const char *ulite_type(struct uart_port *port)
282 {
283         return port->type == PORT_UARTLITE ? "uartlite" : NULL;
284 }
285
286 static void ulite_release_port(struct uart_port *port)
287 {
288         release_mem_region(port->mapbase, ULITE_REGION);
289         iounmap(port->membase);
290         port->membase = NULL;
291 }
292
293 static int ulite_request_port(struct uart_port *port)
294 {
295         pr_debug("ulite console: port=%p; port->mapbase=%llx\n",
296                  port, (unsigned long long) port->mapbase);
297
298         if (!request_mem_region(port->mapbase, ULITE_REGION, "uartlite")) {
299                 dev_err(port->dev, "Memory region busy\n");
300                 return -EBUSY;
301         }
302
303         port->membase = ioremap(port->mapbase, ULITE_REGION);
304         if (!port->membase) {
305                 dev_err(port->dev, "Unable to map registers\n");
306                 release_mem_region(port->mapbase, ULITE_REGION);
307                 return -EBUSY;
308         }
309
310         return 0;
311 }
312
313 static void ulite_config_port(struct uart_port *port, int flags)
314 {
315         if (!ulite_request_port(port))
316                 port->type = PORT_UARTLITE;
317 }
318
319 static int ulite_verify_port(struct uart_port *port, struct serial_struct *ser)
320 {
321         /* we don't want the core code to modify any port params */
322         return -EINVAL;
323 }
324
325 static struct uart_ops ulite_ops = {
326         .tx_empty       = ulite_tx_empty,
327         .set_mctrl      = ulite_set_mctrl,
328         .get_mctrl      = ulite_get_mctrl,
329         .stop_tx        = ulite_stop_tx,
330         .start_tx       = ulite_start_tx,
331         .stop_rx        = ulite_stop_rx,
332         .enable_ms      = ulite_enable_ms,
333         .break_ctl      = ulite_break_ctl,
334         .startup        = ulite_startup,
335         .shutdown       = ulite_shutdown,
336         .set_termios    = ulite_set_termios,
337         .type           = ulite_type,
338         .release_port   = ulite_release_port,
339         .request_port   = ulite_request_port,
340         .config_port    = ulite_config_port,
341         .verify_port    = ulite_verify_port
342 };
343
344 /* ---------------------------------------------------------------------
345  * Console driver operations
346  */
347
348 #ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
349 static void ulite_console_wait_tx(struct uart_port *port)
350 {
351         int i;
352         u8 val;
353
354         /* Spin waiting for TX fifo to have space available */
355         for (i = 0; i < 100000; i++) {
356                 val = ioread32be(port->membase + ULITE_STATUS);
357                 if ((val & ULITE_STATUS_TXFULL) == 0)
358                         break;
359                 cpu_relax();
360         }
361 }
362
363 static void ulite_console_putchar(struct uart_port *port, int ch)
364 {
365         ulite_console_wait_tx(port);
366         iowrite32be(ch, port->membase + ULITE_TX);
367 }
368
369 static void ulite_console_write(struct console *co, const char *s,
370                                 unsigned int count)
371 {
372         struct uart_port *port = &ulite_ports[co->index];
373         unsigned long flags;
374         unsigned int ier;
375         int locked = 1;
376
377         if (oops_in_progress) {
378                 locked = spin_trylock_irqsave(&port->lock, flags);
379         } else
380                 spin_lock_irqsave(&port->lock, flags);
381
382         /* save and disable interrupt */
383         ier = ioread32be(port->membase + ULITE_STATUS) & ULITE_STATUS_IE;
384         iowrite32be(0, port->membase + ULITE_CONTROL);
385
386         uart_console_write(port, s, count, ulite_console_putchar);
387
388         ulite_console_wait_tx(port);
389
390         /* restore interrupt state */
391         if (ier)
392                 iowrite32be(ULITE_CONTROL_IE, port->membase + ULITE_CONTROL);
393
394         if (locked)
395                 spin_unlock_irqrestore(&port->lock, flags);
396 }
397
398 static int __devinit ulite_console_setup(struct console *co, char *options)
399 {
400         struct uart_port *port;
401         int baud = 9600;
402         int bits = 8;
403         int parity = 'n';
404         int flow = 'n';
405
406         if (co->index < 0 || co->index >= ULITE_NR_UARTS)
407                 return -EINVAL;
408
409         port = &ulite_ports[co->index];
410
411         /* Has the device been initialized yet? */
412         if (!port->mapbase) {
413                 pr_debug("console on ttyUL%i not present\n", co->index);
414                 return -ENODEV;
415         }
416
417         /* not initialized yet? */
418         if (!port->membase) {
419                 if (ulite_request_port(port))
420                         return -ENODEV;
421         }
422
423         if (options)
424                 uart_parse_options(options, &baud, &parity, &bits, &flow);
425
426         return uart_set_options(port, co, baud, parity, bits, flow);
427 }
428
429 static struct uart_driver ulite_uart_driver;
430
431 static struct console ulite_console = {
432         .name   = ULITE_NAME,
433         .write  = ulite_console_write,
434         .device = uart_console_device,
435         .setup  = ulite_console_setup,
436         .flags  = CON_PRINTBUFFER,
437         .index  = -1, /* Specified on the cmdline (e.g. console=ttyUL0 ) */
438         .data   = &ulite_uart_driver,
439 };
440
441 static int __init ulite_console_init(void)
442 {
443         register_console(&ulite_console);
444         return 0;
445 }
446
447 console_initcall(ulite_console_init);
448
449 #endif /* CONFIG_SERIAL_UARTLITE_CONSOLE */
450
451 static struct uart_driver ulite_uart_driver = {
452         .owner          = THIS_MODULE,
453         .driver_name    = "uartlite",
454         .dev_name       = ULITE_NAME,
455         .major          = ULITE_MAJOR,
456         .minor          = ULITE_MINOR,
457         .nr             = ULITE_NR_UARTS,
458 #ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
459         .cons           = &ulite_console,
460 #endif
461 };
462
463 /* ---------------------------------------------------------------------
464  * Port assignment functions (mapping devices to uart_port structures)
465  */
466
467 /** ulite_assign: register a uartlite device with the driver
468  *
469  * @dev: pointer to device structure
470  * @id: requested id number.  Pass -1 for automatic port assignment
471  * @base: base address of uartlite registers
472  * @irq: irq number for uartlite
473  *
474  * Returns: 0 on success, <0 otherwise
475  */
476 static int __devinit ulite_assign(struct device *dev, int id, u32 base, int irq)
477 {
478         struct uart_port *port;
479         int rc;
480
481         /* if id = -1; then scan for a free id and use that */
482         if (id < 0) {
483                 for (id = 0; id < ULITE_NR_UARTS; id++)
484                         if (ulite_ports[id].mapbase == 0)
485                                 break;
486         }
487         if (id < 0 || id >= ULITE_NR_UARTS) {
488                 dev_err(dev, "%s%i too large\n", ULITE_NAME, id);
489                 return -EINVAL;
490         }
491
492         if ((ulite_ports[id].mapbase) && (ulite_ports[id].mapbase != base)) {
493                 dev_err(dev, "cannot assign to %s%i; it is already in use\n",
494                         ULITE_NAME, id);
495                 return -EBUSY;
496         }
497
498         port = &ulite_ports[id];
499
500         spin_lock_init(&port->lock);
501         port->fifosize = 16;
502         port->regshift = 2;
503         port->iotype = UPIO_MEM;
504         port->iobase = 1; /* mark port in use */
505         port->mapbase = base;
506         port->membase = NULL;
507         port->ops = &ulite_ops;
508         port->irq = irq;
509         port->flags = UPF_BOOT_AUTOCONF;
510         port->dev = dev;
511         port->type = PORT_UNKNOWN;
512         port->line = id;
513
514         dev_set_drvdata(dev, port);
515
516         /* Register the port */
517         rc = uart_add_one_port(&ulite_uart_driver, port);
518         if (rc) {
519                 dev_err(dev, "uart_add_one_port() failed; err=%i\n", rc);
520                 port->mapbase = 0;
521                 dev_set_drvdata(dev, NULL);
522                 return rc;
523         }
524
525         return 0;
526 }
527
528 /** ulite_release: register a uartlite device with the driver
529  *
530  * @dev: pointer to device structure
531  */
532 static int __devexit ulite_release(struct device *dev)
533 {
534         struct uart_port *port = dev_get_drvdata(dev);
535         int rc = 0;
536
537         if (port) {
538                 rc = uart_remove_one_port(&ulite_uart_driver, port);
539                 dev_set_drvdata(dev, NULL);
540                 port->mapbase = 0;
541         }
542
543         return rc;
544 }
545
546 /* ---------------------------------------------------------------------
547  * Platform bus binding
548  */
549
550 static int __devinit ulite_probe(struct platform_device *pdev)
551 {
552         struct resource *res, *res2;
553
554         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
555         if (!res)
556                 return -ENODEV;
557
558         res2 = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
559         if (!res2)
560                 return -ENODEV;
561
562         return ulite_assign(&pdev->dev, pdev->id, res->start, res2->start);
563 }
564
565 static int __devexit ulite_remove(struct platform_device *pdev)
566 {
567         return ulite_release(&pdev->dev);
568 }
569
570 /* work with hotplug and coldplug */
571 MODULE_ALIAS("platform:uartlite");
572
573 static struct platform_driver ulite_platform_driver = {
574         .probe  = ulite_probe,
575         .remove = __devexit_p(ulite_remove),
576         .driver = {
577                    .owner = THIS_MODULE,
578                    .name  = "uartlite",
579                    },
580 };
581
582 /* ---------------------------------------------------------------------
583  * OF bus bindings
584  */
585 #if defined(CONFIG_OF) && (defined(CONFIG_PPC32) || defined(CONFIG_MICROBLAZE))
586 static int __devinit
587 ulite_of_probe(struct platform_device *op, const struct of_device_id *match)
588 {
589         struct resource res;
590         const unsigned int *id;
591         int irq, rc;
592
593         dev_dbg(&op->dev, "%s(%p, %p)\n", __func__, op, match);
594
595         rc = of_address_to_resource(op->dev.of_node, 0, &res);
596         if (rc) {
597                 dev_err(&op->dev, "invalid address\n");
598                 return rc;
599         }
600
601         irq = irq_of_parse_and_map(op->dev.of_node, 0);
602
603         id = of_get_property(op->dev.of_node, "port-number", NULL);
604
605         return ulite_assign(&op->dev, id ? *id : -1, res.start, irq);
606 }
607
608 static int __devexit ulite_of_remove(struct platform_device *op)
609 {
610         return ulite_release(&op->dev);
611 }
612
613 static struct of_platform_driver ulite_of_driver = {
614         .probe = ulite_of_probe,
615         .remove = __devexit_p(ulite_of_remove),
616         .driver = {
617                 .name = "uartlite",
618                 .owner = THIS_MODULE,
619                 .of_match_table = ulite_of_match,
620         },
621 };
622
623 /* Registration helpers to keep the number of #ifdefs to a minimum */
624 static inline int __init ulite_of_register(void)
625 {
626         pr_debug("uartlite: calling of_register_platform_driver()\n");
627         return of_register_platform_driver(&ulite_of_driver);
628 }
629
630 static inline void __exit ulite_of_unregister(void)
631 {
632         of_unregister_platform_driver(&ulite_of_driver);
633 }
634 #else /* CONFIG_OF && (CONFIG_PPC32 || CONFIG_MICROBLAZE) */
635 /* Appropriate config not enabled; do nothing helpers */
636 static inline int __init ulite_of_register(void) { return 0; }
637 static inline void __exit ulite_of_unregister(void) { }
638 #endif /* CONFIG_OF && (CONFIG_PPC32 || CONFIG_MICROBLAZE) */
639
640 /* ---------------------------------------------------------------------
641  * Module setup/teardown
642  */
643
644 int __init ulite_init(void)
645 {
646         int ret;
647
648         pr_debug("uartlite: calling uart_register_driver()\n");
649         ret = uart_register_driver(&ulite_uart_driver);
650         if (ret)
651                 goto err_uart;
652
653         ret = ulite_of_register();
654         if (ret)
655                 goto err_of;
656
657         pr_debug("uartlite: calling platform_driver_register()\n");
658         ret = platform_driver_register(&ulite_platform_driver);
659         if (ret)
660                 goto err_plat;
661
662         return 0;
663
664 err_plat:
665         ulite_of_unregister();
666 err_of:
667         uart_unregister_driver(&ulite_uart_driver);
668 err_uart:
669         printk(KERN_ERR "registering uartlite driver failed: err=%i", ret);
670         return ret;
671 }
672
673 void __exit ulite_exit(void)
674 {
675         platform_driver_unregister(&ulite_platform_driver);
676         ulite_of_unregister();
677         uart_unregister_driver(&ulite_uart_driver);
678 }
679
680 module_init(ulite_init);
681 module_exit(ulite_exit);
682
683 MODULE_AUTHOR("Peter Korsgaard <jacmet@sunsite.dk>");
684 MODULE_DESCRIPTION("Xilinx uartlite serial driver");
685 MODULE_LICENSE("GPL");