drivers/serial/cpm_uart/cpm_uart_core.c

   1 /*
   2  *  linux/drivers/serial/cpm_uart.c
   3  *
   4  *  Driver for CPM (SCC/SMC) serial ports; core driver
   5  *
   6  *  Based on arch/ppc/cpm2_io/uart.c by Dan Malek
   7  *  Based on ppc8xx.c by Thomas Gleixner
   8  *  Based on drivers/serial/amba.c by Russell King
   9  *
  10  *  Maintainer: Kumar Gala (galak@kernel.crashing.org) (CPM2)
  11  *              Pantelis Antoniou (panto@intracom.gr) (CPM1)
  12  *
  13  *  Copyright (C) 2004 Freescale Semiconductor, Inc.
  14  *            (C) 2004 Intracom, S.A.
  15  *            (C) 2005 MontaVista Software, Inc. by Vitaly Bordug <vbordug@ru.mvista.com>
  16  *
  17  * This program is free software; you can redistribute it and/or modify
  18  * it under the terms of the GNU General Public License as published by
  19  * the Free Software Foundation; either version 2 of the License, or
  20  * (at your option) any later version.
  21  *
  22  * This program is distributed in the hope that it will be useful,
  23  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  25  * GNU General Public License for more details.
  26  *
  27  * You should have received a copy of the GNU General Public License
  28  * along with this program; if not, write to the Free Software
  29  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  30  *
  31  */
  32
  33 #include <linux/config.h>
  34 #include <linux/module.h>
  35 #include <linux/tty.h>
  36 #include <linux/ioport.h>
  37 #include <linux/init.h>
  38 #include <linux/serial.h>
  39 #include <linux/console.h>
  40 #include <linux/sysrq.h>
  41 #include <linux/device.h>
  42 #include <linux/bootmem.h>
  43 #include <linux/dma-mapping.h>
  44
  45 #include <asm/io.h>
  46 #include <asm/irq.h>
  47 #include <asm/delay.h>
  48
  49 #if defined(CONFIG_SERIAL_CPM_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  50 #define SUPPORT_SYSRQ
  51 #endif
  52
  53 #include <linux/serial_core.h>
  54 #include <linux/kernel.h>
  55
  56 #include "cpm_uart.h"
  57
  58 /***********************************************************************/
  59
  60 /* Track which ports are configured as uarts */
  61 int cpm_uart_port_map[UART_NR];
  62 /* How many ports did we config as uarts */
  63 int cpm_uart_nr;
  64
  65 /**************************************************************/
  66
  67 static int  cpm_uart_tx_pump(struct uart_port *port);
  68 static void cpm_uart_init_smc(struct uart_cpm_port *pinfo);
  69 static void cpm_uart_init_scc(struct uart_cpm_port *pinfo);
  70 static void cpm_uart_initbd(struct uart_cpm_port *pinfo);
  71
  72 /**************************************************************/
  73
  74 static inline unsigned long cpu2cpm_addr(void *addr)
  75 {
  76         if ((unsigned long)addr >= CPM_ADDR)
  77                 return (unsigned long)addr;
  78         return virt_to_bus(addr);
  79 }
  80
  81 static inline void *cpm2cpu_addr(unsigned long addr)
  82 {
  83         if (addr >= CPM_ADDR)
  84                 return (void *)addr;
  85         return bus_to_virt(addr);
  86 }
  87
  88 /*
  89  * Check, if transmit buffers are processed
  90 */
  91 static unsigned int cpm_uart_tx_empty(struct uart_port *port)
  92 {
  93         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
  94         volatile cbd_t *bdp = pinfo->tx_bd_base;
  95         int ret = 0;
  96
  97         while (1) {
  98                 if (bdp->cbd_sc & BD_SC_READY)
  99                         break;
 100
 101                 if (bdp->cbd_sc & BD_SC_WRAP) {
 102                         ret = TIOCSER_TEMT;
 103                         break;
 104                 }
 105                 bdp++;
 106         }
 107
 108         pr_debug("CPM uart[%d]:tx_empty: %d\n", port->line, ret);
 109
 110         return ret;
 111 }
 112
 113 static void cpm_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
 114 {
 115         /* Whee. Do nothing. */
 116 }
 117
 118 static unsigned int cpm_uart_get_mctrl(struct uart_port *port)
 119 {
 120         /* Whee. Do nothing. */
 121         return TIOCM_CAR | TIOCM_DSR | TIOCM_CTS;
 122 }
 123
 124 /*
 125  * Stop transmitter
 126  */
 127 static void cpm_uart_stop_tx(struct uart_port *port)
 128 {
 129         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 130         volatile smc_t *smcp = pinfo->smcp;
 131         volatile scc_t *sccp = pinfo->sccp;
 132
 133         pr_debug("CPM uart[%d]:stop tx\n", port->line);
 134
 135         if (IS_SMC(pinfo))
 136                 smcp->smc_smcm &= ~SMCM_TX;
 137         else
 138                 sccp->scc_sccm &= ~UART_SCCM_TX;
 139 }
 140
 141 /*
 142  * Start transmitter
 143  */
 144 static void cpm_uart_start_tx(struct uart_port *port)
 145 {
 146         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 147         volatile smc_t *smcp = pinfo->smcp;
 148         volatile scc_t *sccp = pinfo->sccp;
 149
 150         pr_debug("CPM uart[%d]:start tx\n", port->line);
 151
 152         if (IS_SMC(pinfo)) {
 153                 if (smcp->smc_smcm & SMCM_TX)
 154                         return;
 155         } else {
 156                 if (sccp->scc_sccm & UART_SCCM_TX)
 157                         return;
 158         }
 159
 160         if (cpm_uart_tx_pump(port) != 0) {
 161                 if (IS_SMC(pinfo)) {
 162                         smcp->smc_smcm |= SMCM_TX;
 163                         smcp->smc_smcmr |= SMCMR_TEN;
 164                 } else {
 165                         sccp->scc_sccm |= UART_SCCM_TX;
 166                         pinfo->sccp->scc_gsmrl |= SCC_GSMRL_ENT;
 167                 }
 168         }
 169 }
 170
 171 /*
 172  * Stop receiver
 173  */
 174 static void cpm_uart_stop_rx(struct uart_port *port)
 175 {
 176         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 177         volatile smc_t *smcp = pinfo->smcp;
 178         volatile scc_t *sccp = pinfo->sccp;
 179
 180         pr_debug("CPM uart[%d]:stop rx\n", port->line);
 181
 182         if (IS_SMC(pinfo))
 183                 smcp->smc_smcm &= ~SMCM_RX;
 184         else
 185                 sccp->scc_sccm &= ~UART_SCCM_RX;
 186 }
 187
 188 /*
 189  * Enable Modem status interrupts
 190  */
 191 static void cpm_uart_enable_ms(struct uart_port *port)
 192 {
 193         pr_debug("CPM uart[%d]:enable ms\n", port->line);
 194 }
 195
 196 /*
 197  * Generate a break.
 198  */
 199 static void cpm_uart_break_ctl(struct uart_port *port, int break_state)
 200 {
 201         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 202         int line = pinfo - cpm_uart_ports;
 203
 204         pr_debug("CPM uart[%d]:break ctrl, break_state: %d\n", port->line,
 205                 break_state);
 206
 207         if (break_state)
 208                 cpm_line_cr_cmd(line, CPM_CR_STOP_TX);
 209         else
 210                 cpm_line_cr_cmd(line, CPM_CR_RESTART_TX);
 211 }
 212
 213 /*
 214  * Transmit characters, refill buffer descriptor, if possible
 215  */
 216 static void cpm_uart_int_tx(struct uart_port *port, struct pt_regs *regs)
 217 {
 218         pr_debug("CPM uart[%d]:TX INT\n", port->line);
 219
 220         cpm_uart_tx_pump(port);
 221 }
 222
 223 /*
 224  * Receive characters
 225  */
 226 static void cpm_uart_int_rx(struct uart_port *port, struct pt_regs *regs)
 227 {
 228         int i;
 229         unsigned char ch, *cp;
 230         struct tty_struct *tty = port->info->tty;
 231         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 232         volatile cbd_t *bdp;
 233         u16 status;
 234         unsigned int flg;
 235
 236         pr_debug("CPM uart[%d]:RX INT\n", port->line);
 237
 238         /* Just loop through the closed BDs and copy the characters into
 239          * the buffer.
 240          */
 241         bdp = pinfo->rx_cur;
 242         for (;;) {
 243                 /* get status */
 244                 status = bdp->cbd_sc;
 245                 /* If this one is empty, return happy */
 246                 if (status & BD_SC_EMPTY)
 247                         break;
 248
 249                 /* get number of characters, and check spce in flip-buffer */
 250                 i = bdp->cbd_datlen;
 251
 252                 /* If we have not enough room in tty flip buffer, then we try
 253                  * later, which will be the next rx-interrupt or a timeout
 254                  */
 255                 if(tty_buffer_request_room(tty, i) < i) {
 256                         printk(KERN_WARNING "No room in flip buffer\n");
 257                         return;
 258                 }
 259
 260                 /* get pointer */
 261                 cp = cpm2cpu_addr(bdp->cbd_bufaddr);
 262
 263                 /* loop through the buffer */
 264                 while (i-- > 0) {
 265                         ch = *cp++;
 266                         port->icount.rx++;
 267                         flg = TTY_NORMAL;
 268
 269                         if (status &
 270                             (BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV))
 271                                 goto handle_error;
 272                         if (uart_handle_sysrq_char(port, ch, regs))
 273                                 continue;
 274
 275                       error_return:
 276                         tty_insert_flip_char(tty, ch, flg);
 277
 278                 }               /* End while (i--) */
 279
 280                 /* This BD is ready to be used again. Clear status. get next */
 281                 bdp->cbd_sc &= ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV | BD_SC_ID);
 282                 bdp->cbd_sc |= BD_SC_EMPTY;
 283
 284                 if (bdp->cbd_sc & BD_SC_WRAP)
 285                         bdp = pinfo->rx_bd_base;
 286                 else
 287                         bdp++;
 288
 289         } /* End for (;;) */
 290
 291         /* Write back buffer pointer */
 292         pinfo->rx_cur = (volatile cbd_t *) bdp;
 293
 294         /* activate BH processing */
 295         tty_flip_buffer_push(tty);
 296
 297         return;
 298
 299         /* Error processing */
 300
 301       handle_error:
 302         /* Statistics */
 303         if (status & BD_SC_BR)
 304                 port->icount.brk++;
 305         if (status & BD_SC_PR)
 306                 port->icount.parity++;
 307         if (status & BD_SC_FR)
 308                 port->icount.frame++;
 309         if (status & BD_SC_OV)
 310                 port->icount.overrun++;
 311
 312         /* Mask out ignored conditions */
 313         status &= port->read_status_mask;
 314
 315         /* Handle the remaining ones */
 316         if (status & BD_SC_BR)
 317                 flg = TTY_BREAK;
 318         else if (status & BD_SC_PR)
 319                 flg = TTY_PARITY;
 320         else if (status & BD_SC_FR)
 321                 flg = TTY_FRAME;
 322
 323         /* overrun does not affect the current character ! */
 324         if (status & BD_SC_OV) {
 325                 ch = 0;
 326                 flg = TTY_OVERRUN;
 327                 /* We skip this buffer */
 328                 /* CHECK: Is really nothing senseful there */
 329                 /* ASSUMPTION: it contains nothing valid */
 330                 i = 0;
 331         }
 332 #ifdef SUPPORT_SYSRQ
 333         port->sysrq = 0;
 334 #endif
 335         goto error_return;
 336 }
 337
 338 /*
 339  * Asynchron mode interrupt handler
 340  */
 341 static irqreturn_t cpm_uart_int(int irq, void *data, struct pt_regs *regs)
 342 {
 343         u8 events;
 344         struct uart_port *port = (struct uart_port *)data;
 345         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 346         volatile smc_t *smcp = pinfo->smcp;
 347         volatile scc_t *sccp = pinfo->sccp;
 348
 349         pr_debug("CPM uart[%d]:IRQ\n", port->line);
 350
 351         if (IS_SMC(pinfo)) {
 352                 events = smcp->smc_smce;
 353                 smcp->smc_smce = events;
 354                 if (events & SMCM_BRKE)
 355                         uart_handle_break(port);
 356                 if (events & SMCM_RX)
 357                         cpm_uart_int_rx(port, regs);
 358                 if (events & SMCM_TX)
 359                         cpm_uart_int_tx(port, regs);
 360         } else {
 361                 events = sccp->scc_scce;
 362                 sccp->scc_scce = events;
 363                 if (events & UART_SCCM_BRKE)
 364                         uart_handle_break(port);
 365                 if (events & UART_SCCM_RX)
 366                         cpm_uart_int_rx(port, regs);
 367                 if (events & UART_SCCM_TX)
 368                         cpm_uart_int_tx(port, regs);
 369         }
 370         return (events) ? IRQ_HANDLED : IRQ_NONE;
 371 }
 372
 373 static int cpm_uart_startup(struct uart_port *port)
 374 {
 375         int retval;
 376         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 377         int line = pinfo - cpm_uart_ports;
 378
 379         pr_debug("CPM uart[%d]:startup\n", port->line);
 380
 381         /* Install interrupt handler. */
 382         retval = request_irq(port->irq, cpm_uart_int, 0, "cpm_uart", port);
 383         if (retval)
 384                 return retval;
 385
 386         /* Startup rx-int */
 387         if (IS_SMC(pinfo)) {
 388                 pinfo->smcp->smc_smcm |= SMCM_RX;
 389                 pinfo->smcp->smc_smcmr |= SMCMR_REN;
 390         } else {
 391                 pinfo->sccp->scc_sccm |= UART_SCCM_RX;
 392         }
 393
 394         if (!(pinfo->flags & FLAG_CONSOLE))
 395                 cpm_line_cr_cmd(line,CPM_CR_INIT_TRX);
 396         return 0;
 397 }
 398
 399 inline void cpm_uart_wait_until_send(struct uart_cpm_port *pinfo)
 400 {
 401         set_current_state(TASK_UNINTERRUPTIBLE);
 402         schedule_timeout(pinfo->wait_closing);
 403 }
 404
 405 /*
 406  * Shutdown the uart
 407  */
 408 static void cpm_uart_shutdown(struct uart_port *port)
 409 {
 410         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 411         int line = pinfo - cpm_uart_ports;
 412
 413         pr_debug("CPM uart[%d]:shutdown\n", port->line);
 414
 415         /* free interrupt handler */
 416         free_irq(port->irq, port);
 417
 418         /* If the port is not the console, disable Rx and Tx. */
 419         if (!(pinfo->flags & FLAG_CONSOLE)) {
 420                 /* Wait for all the BDs marked sent */
 421                 while(!cpm_uart_tx_empty(port)) {
 422                         set_current_state(TASK_UNINTERRUPTIBLE);
 423                         schedule_timeout(2);
 424                 }
 425
 426                 if (pinfo->wait_closing)
 427                         cpm_uart_wait_until_send(pinfo);
 428
 429                 /* Stop uarts */
 430                 if (IS_SMC(pinfo)) {
 431                         volatile smc_t *smcp = pinfo->smcp;
 432                         smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
 433                         smcp->smc_smcm &= ~(SMCM_RX | SMCM_TX);
 434                 } else {
 435                         volatile scc_t *sccp = pinfo->sccp;
 436                         sccp->scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
 437                         sccp->scc_sccm &= ~(UART_SCCM_TX | UART_SCCM_RX);
 438                 }
 439
 440                 /* Shut them really down and reinit buffer descriptors */
 441                 cpm_line_cr_cmd(line, CPM_CR_STOP_TX);
 442                 cpm_uart_initbd(pinfo);
 443         }
 444 }
 445
 446 static void cpm_uart_set_termios(struct uart_port *port,
 447                                  struct termios *termios, struct termios *old)
 448 {
 449         int baud;
 450         unsigned long flags;
 451         u16 cval, scval, prev_mode;
 452         int bits, sbits;
 453         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 454         volatile smc_t *smcp = pinfo->smcp;
 455         volatile scc_t *sccp = pinfo->sccp;
 456
 457         pr_debug("CPM uart[%d]:set_termios\n", port->line);
 458
 459         baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
 460
 461         /* Character length programmed into the mode register is the
 462          * sum of: 1 start bit, number of data bits, 0 or 1 parity bit,
 463          * 1 or 2 stop bits, minus 1.
 464          * The value 'bits' counts this for us.
 465          */
 466         cval = 0;
 467         scval = 0;
 468
 469         /* byte size */
 470         switch (termios->c_cflag & CSIZE) {
 471         case CS5:
 472                 bits = 5;
 473                 break;
 474         case CS6:
 475                 bits = 6;
 476                 break;
 477         case CS7:
 478                 bits = 7;
 479                 break;
 480         case CS8:
 481                 bits = 8;
 482                 break;
 483                 /* Never happens, but GCC is too dumb to figure it out */
 484         default:
 485                 bits = 8;
 486                 break;
 487         }
 488         sbits = bits - 5;
 489
 490         if (termios->c_cflag & CSTOPB) {
 491                 cval |= SMCMR_SL;       /* Two stops */
 492                 scval |= SCU_PSMR_SL;
 493                 bits++;
 494         }
 495
 496         if (termios->c_cflag & PARENB) {
 497                 cval |= SMCMR_PEN;
 498                 scval |= SCU_PSMR_PEN;
 499                 bits++;
 500                 if (!(termios->c_cflag & PARODD)) {
 501                         cval |= SMCMR_PM_EVEN;
 502                         scval |= (SCU_PSMR_REVP | SCU_PSMR_TEVP);
 503                 }
 504         }
 505
 506         /*
 507          * Set up parity check flag
 508          */
 509 #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
 510
 511         port->read_status_mask = (BD_SC_EMPTY | BD_SC_OV);
 512         if (termios->c_iflag & INPCK)
 513                 port->read_status_mask |= BD_SC_FR | BD_SC_PR;
 514         if ((termios->c_iflag & BRKINT) || (termios->c_iflag & PARMRK))
 515                 port->read_status_mask |= BD_SC_BR;
 516
 517         /*
 518          * Characters to ignore
 519          */
 520         port->ignore_status_mask = 0;
 521         if (termios->c_iflag & IGNPAR)
 522                 port->ignore_status_mask |= BD_SC_PR | BD_SC_FR;
 523         if (termios->c_iflag & IGNBRK) {
 524                 port->ignore_status_mask |= BD_SC_BR;
 525                 /*
 526                  * If we're ignore parity and break indicators, ignore
 527                  * overruns too.  (For real raw support).
 528                  */
 529                 if (termios->c_iflag & IGNPAR)
 530                         port->ignore_status_mask |= BD_SC_OV;
 531         }
 532         /*
 533          * !!! ignore all characters if CREAD is not set
 534          */
 535         if ((termios->c_cflag & CREAD) == 0)
 536                 port->read_status_mask &= ~BD_SC_EMPTY;
 537
 538         spin_lock_irqsave(&port->lock, flags);
 539
 540         /* Start bit has not been added (so don't, because we would just
 541          * subtract it later), and we need to add one for the number of
 542          * stops bits (there is always at least one).
 543          */
 544         bits++;
 545         if (IS_SMC(pinfo)) {
 546                 /* Set the mode register.  We want to keep a copy of the
 547                  * enables, because we want to put them back if they were
 548                  * present.
 549                  */
 550                 prev_mode = smcp->smc_smcmr;
 551                 smcp->smc_smcmr = smcr_mk_clen(bits) | cval | SMCMR_SM_UART;
 552                 smcp->smc_smcmr |= (prev_mode & (SMCMR_REN | SMCMR_TEN));
 553         } else {
 554                 sccp->scc_psmr = (sbits << 12) | scval;
 555         }
 556
 557         cpm_set_brg(pinfo->brg - 1, baud);
 558         spin_unlock_irqrestore(&port->lock, flags);
 559
 560 }
 561
 562 static const char *cpm_uart_type(struct uart_port *port)
 563 {
 564         pr_debug("CPM uart[%d]:uart_type\n", port->line);
 565
 566         return port->type == PORT_CPM ? "CPM UART" : NULL;
 567 }
 568
 569 /*
 570  * verify the new serial_struct (for TIOCSSERIAL).
 571  */
 572 static int cpm_uart_verify_port(struct uart_port *port,
 573                                 struct serial_struct *ser)
 574 {
 575         int ret = 0;
 576
 577         pr_debug("CPM uart[%d]:verify_port\n", port->line);
 578
 579         if (ser->type != PORT_UNKNOWN && ser->type != PORT_CPM)
 580                 ret = -EINVAL;
 581         if (ser->irq < 0 || ser->irq >= NR_IRQS)
 582                 ret = -EINVAL;
 583         if (ser->baud_base < 9600)
 584                 ret = -EINVAL;
 585         return ret;
 586 }
 587
 588 /*
 589  * Transmit characters, refill buffer descriptor, if possible
 590  */
 591 static int cpm_uart_tx_pump(struct uart_port *port)
 592 {
 593         volatile cbd_t *bdp;
 594         unsigned char *p;
 595         int count;
 596         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 597         struct circ_buf *xmit = &port->info->xmit;
 598
 599         /* Handle xon/xoff */
 600         if (port->x_char) {
 601                 /* Pick next descriptor and fill from buffer */
 602                 bdp = pinfo->tx_cur;
 603
 604                 p = cpm2cpu_addr(bdp->cbd_bufaddr);
 605
 606                 *p++ = port->x_char;
 607                 bdp->cbd_datlen = 1;
 608                 bdp->cbd_sc |= BD_SC_READY;
 609                 /* Get next BD. */
 610                 if (bdp->cbd_sc & BD_SC_WRAP)
 611                         bdp = pinfo->tx_bd_base;
 612                 else
 613                         bdp++;
 614                 pinfo->tx_cur = bdp;
 615
 616                 port->icount.tx++;
 617                 port->x_char = 0;
 618                 return 1;
 619         }
 620
 621         if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
 622                 cpm_uart_stop_tx(port);
 623                 return 0;
 624         }
 625
 626         /* Pick next descriptor and fill from buffer */
 627         bdp = pinfo->tx_cur;
 628
 629         while (!(bdp->cbd_sc & BD_SC_READY) && (xmit->tail != xmit->head)) {
 630                 count = 0;
 631                 p = cpm2cpu_addr(bdp->cbd_bufaddr);
 632                 while (count < pinfo->tx_fifosize) {
 633                         *p++ = xmit->buf[xmit->tail];
 634                         xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 635                         port->icount.tx++;
 636                         count++;
 637                         if (xmit->head == xmit->tail)
 638                                 break;
 639                 }
 640                 bdp->cbd_datlen = count;
 641                 bdp->cbd_sc |= BD_SC_READY;
 642                 __asm__("eieio");
 643                 /* Get next BD. */
 644                 if (bdp->cbd_sc & BD_SC_WRAP)
 645                         bdp = pinfo->tx_bd_base;
 646                 else
 647                         bdp++;
 648         }
 649         pinfo->tx_cur = bdp;
 650
 651         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 652                 uart_write_wakeup(port);
 653
 654         if (uart_circ_empty(xmit)) {
 655                 cpm_uart_stop_tx(port);
 656                 return 0;
 657         }
 658
 659         return 1;
 660 }
 661
 662 /*
 663  * init buffer descriptors
 664  */
 665 static void cpm_uart_initbd(struct uart_cpm_port *pinfo)
 666 {
 667         int i;
 668         u8 *mem_addr;
 669         volatile cbd_t *bdp;
 670
 671         pr_debug("CPM uart[%d]:initbd\n", pinfo->port.line);
 672
 673         /* Set the physical address of the host memory
 674          * buffers in the buffer descriptors, and the
 675          * virtual address for us to work with.
 676          */
 677         mem_addr = pinfo->mem_addr;
 678         bdp = pinfo->rx_cur = pinfo->rx_bd_base;
 679         for (i = 0; i < (pinfo->rx_nrfifos - 1); i++, bdp++) {
 680                 bdp->cbd_bufaddr = cpu2cpm_addr(mem_addr);
 681                 bdp->cbd_sc = BD_SC_EMPTY | BD_SC_INTRPT;
 682                 mem_addr += pinfo->rx_fifosize;
 683         }
 684
 685         bdp->cbd_bufaddr = cpu2cpm_addr(mem_addr);
 686         bdp->cbd_sc = BD_SC_WRAP | BD_SC_EMPTY | BD_SC_INTRPT;
 687
 688         /* Set the physical address of the host memory
 689          * buffers in the buffer descriptors, and the
 690          * virtual address for us to work with.
 691          */
 692         mem_addr = pinfo->mem_addr + L1_CACHE_ALIGN(pinfo->rx_nrfifos * pinfo->rx_fifosize);
 693         bdp = pinfo->tx_cur = pinfo->tx_bd_base;
 694         for (i = 0; i < (pinfo->tx_nrfifos - 1); i++, bdp++) {
 695                 bdp->cbd_bufaddr = cpu2cpm_addr(mem_addr);
 696                 bdp->cbd_sc = BD_SC_INTRPT;
 697                 mem_addr += pinfo->tx_fifosize;
 698         }
 699
 700         bdp->cbd_bufaddr = cpu2cpm_addr(mem_addr);
 701         bdp->cbd_sc = BD_SC_WRAP | BD_SC_INTRPT;
 702 }
 703
 704 static void cpm_uart_init_scc(struct uart_cpm_port *pinfo)
 705 {
 706         int line = pinfo - cpm_uart_ports;
 707         volatile scc_t *scp;
 708         volatile scc_uart_t *sup;
 709
 710         pr_debug("CPM uart[%d]:init_scc\n", pinfo->port.line);
 711
 712         scp = pinfo->sccp;
 713         sup = pinfo->sccup;
 714
 715         /* Store address */
 716         pinfo->sccup->scc_genscc.scc_rbase = (unsigned char *)pinfo->rx_bd_base - DPRAM_BASE;
 717         pinfo->sccup->scc_genscc.scc_tbase = (unsigned char *)pinfo->tx_bd_base - DPRAM_BASE;
 718
 719         /* Set up the uart parameters in the
 720          * parameter ram.
 721          */
 722
 723         cpm_set_scc_fcr(sup);
 724
 725         sup->scc_genscc.scc_mrblr = pinfo->rx_fifosize;
 726         sup->scc_maxidl = pinfo->rx_fifosize;
 727         sup->scc_brkcr = 1;
 728         sup->scc_parec = 0;
 729         sup->scc_frmec = 0;
 730         sup->scc_nosec = 0;
 731         sup->scc_brkec = 0;
 732         sup->scc_uaddr1 = 0;
 733         sup->scc_uaddr2 = 0;
 734         sup->scc_toseq = 0;
 735         sup->scc_char1 = 0x8000;
 736         sup->scc_char2 = 0x8000;
 737         sup->scc_char3 = 0x8000;
 738         sup->scc_char4 = 0x8000;
 739         sup->scc_char5 = 0x8000;
 740         sup->scc_char6 = 0x8000;
 741         sup->scc_char7 = 0x8000;
 742         sup->scc_char8 = 0x8000;
 743         sup->scc_rccm = 0xc0ff;
 744
 745         /* Send the CPM an initialize command.
 746          */
 747         cpm_line_cr_cmd(line, CPM_CR_INIT_TRX);
 748
 749         /* Set UART mode, 8 bit, no parity, one stop.
 750          * Enable receive and transmit.
 751          */
 752         scp->scc_gsmrh = 0;
 753         scp->scc_gsmrl =
 754             (SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);
 755
 756         /* Enable rx interrupts  and clear all pending events.  */
 757         scp->scc_sccm = 0;
 758         scp->scc_scce = 0xffff;
 759         scp->scc_dsr = 0x7e7e;
 760         scp->scc_psmr = 0x3000;
 761
 762         scp->scc_gsmrl |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
 763 }
 764
 765 static void cpm_uart_init_smc(struct uart_cpm_port *pinfo)
 766 {
 767         int line = pinfo - cpm_uart_ports;
 768         volatile smc_t *sp;
 769         volatile smc_uart_t *up;
 770
 771         pr_debug("CPM uart[%d]:init_smc\n", pinfo->port.line);
 772
 773         sp = pinfo->smcp;
 774         up = pinfo->smcup;
 775
 776         /* Store address */
 777         pinfo->smcup->smc_rbase = (u_char *)pinfo->rx_bd_base - DPRAM_BASE;
 778         pinfo->smcup->smc_tbase = (u_char *)pinfo->tx_bd_base - DPRAM_BASE;
 779
 780 /*
 781  *  In case SMC1 is being relocated...
 782  */
 783 #if defined (CONFIG_I2C_SPI_SMC1_UCODE_PATCH)
 784         up->smc_rbptr = pinfo->smcup->smc_rbase;
 785         up->smc_tbptr = pinfo->smcup->smc_tbase;
 786         up->smc_rstate = 0;
 787         up->smc_tstate = 0;
 788         up->smc_brkcr = 1;              /* number of break chars */
 789         up->smc_brkec = 0;
 790 #endif
 791
 792         /* Set up the uart parameters in the
 793          * parameter ram.
 794          */
 795         cpm_set_smc_fcr(up);
 796
 797         /* Using idle charater time requires some additional tuning.  */
 798         up->smc_mrblr = pinfo->rx_fifosize;
 799         up->smc_maxidl = pinfo->rx_fifosize;
 800         up->smc_brklen = 0;
 801         up->smc_brkec = 0;
 802         up->smc_brkcr = 1;
 803
 804         cpm_line_cr_cmd(line, CPM_CR_INIT_TRX);
 805
 806         /* Set UART mode, 8 bit, no parity, one stop.
 807          * Enable receive and transmit.
 808          */
 809         sp->smc_smcmr = smcr_mk_clen(9) | SMCMR_SM_UART;
 810
 811         /* Enable only rx interrupts clear all pending events. */
 812         sp->smc_smcm = 0;
 813         sp->smc_smce = 0xff;
 814
 815         sp->smc_smcmr |= (SMCMR_REN | SMCMR_TEN);
 816 }
 817
 818 /*
 819  * Initialize port. This is called from early_console stuff
 820  * so we have to be careful here !
 821  */
 822 static int cpm_uart_request_port(struct uart_port *port)
 823 {
 824         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 825         int ret;
 826
 827         pr_debug("CPM uart[%d]:request port\n", port->line);
 828
 829         if (pinfo->flags & FLAG_CONSOLE)
 830                 return 0;
 831
 832         /*
 833          * Setup any port IO, connect any baud rate generators,
 834          * etc.  This is expected to be handled by board
 835          * dependant code
 836          */
 837         if (pinfo->set_lineif)
 838                 pinfo->set_lineif(pinfo);
 839
 840         if (IS_SMC(pinfo)) {
 841                 pinfo->smcp->smc_smcm &= ~(SMCM_RX | SMCM_TX);
 842                 pinfo->smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
 843         } else {
 844                 pinfo->sccp->scc_sccm &= ~(UART_SCCM_TX | UART_SCCM_RX);
 845                 pinfo->sccp->scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
 846         }
 847
 848         ret = cpm_uart_allocbuf(pinfo, 0);
 849
 850         if (ret)
 851                 return ret;
 852
 853         cpm_uart_initbd(pinfo);
 854         if (IS_SMC(pinfo))
 855                 cpm_uart_init_smc(pinfo);
 856         else
 857                 cpm_uart_init_scc(pinfo);
 858
 859         return 0;
 860 }
 861
 862 static void cpm_uart_release_port(struct uart_port *port)
 863 {
 864         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 865
 866         if (!(pinfo->flags & FLAG_CONSOLE))
 867                 cpm_uart_freebuf(pinfo);
 868 }
 869
 870 /*
 871  * Configure/autoconfigure the port.
 872  */
 873 static void cpm_uart_config_port(struct uart_port *port, int flags)
 874 {
 875         pr_debug("CPM uart[%d]:config_port\n", port->line);
 876
 877         if (flags & UART_CONFIG_TYPE) {
 878                 port->type = PORT_CPM;
 879                 cpm_uart_request_port(port);
 880         }
 881 }
 882 static struct uart_ops cpm_uart_pops = {
 883         .tx_empty       = cpm_uart_tx_empty,
 884         .set_mctrl      = cpm_uart_set_mctrl,
 885         .get_mctrl      = cpm_uart_get_mctrl,
 886         .stop_tx        = cpm_uart_stop_tx,
 887         .start_tx       = cpm_uart_start_tx,
 888         .stop_rx        = cpm_uart_stop_rx,
 889         .enable_ms      = cpm_uart_enable_ms,
 890         .break_ctl      = cpm_uart_break_ctl,
 891         .startup        = cpm_uart_startup,
 892         .shutdown       = cpm_uart_shutdown,
 893         .set_termios    = cpm_uart_set_termios,
 894         .type           = cpm_uart_type,
 895         .release_port   = cpm_uart_release_port,
 896         .request_port   = cpm_uart_request_port,
 897         .config_port    = cpm_uart_config_port,
 898         .verify_port    = cpm_uart_verify_port,
 899 };
 900
 901 struct uart_cpm_port cpm_uart_ports[UART_NR] = {
 902         [UART_SMC1] = {
 903                 .port = {
 904                         .irq            = SMC1_IRQ,
 905                         .ops            = &cpm_uart_pops,
 906                         .iotype         = UPIO_MEM,
 907                         .lock           = SPIN_LOCK_UNLOCKED,
 908                 },
 909                 .flags = FLAG_SMC,
 910                 .tx_nrfifos = TX_NUM_FIFO,
 911                 .tx_fifosize = TX_BUF_SIZE,
 912                 .rx_nrfifos = RX_NUM_FIFO,
 913                 .rx_fifosize = RX_BUF_SIZE,
 914                 .set_lineif = smc1_lineif,
 915         },
 916         [UART_SMC2] = {
 917                 .port = {
 918                         .irq            = SMC2_IRQ,
 919                         .ops            = &cpm_uart_pops,
 920                         .iotype         = UPIO_MEM,
 921                         .lock           = SPIN_LOCK_UNLOCKED,
 922                 },
 923                 .flags = FLAG_SMC,
 924                 .tx_nrfifos = TX_NUM_FIFO,
 925                 .tx_fifosize = TX_BUF_SIZE,
 926                 .rx_nrfifos = RX_NUM_FIFO,
 927                 .rx_fifosize = RX_BUF_SIZE,
 928                 .set_lineif = smc2_lineif,
 929 #ifdef CONFIG_SERIAL_CPM_ALT_SMC2
 930                 .is_portb = 1,
 931 #endif
 932         },
 933         [UART_SCC1] = {
 934                 .port = {
 935                         .irq            = SCC1_IRQ,
 936                         .ops            = &cpm_uart_pops,
 937                         .iotype         = UPIO_MEM,
 938                         .lock           = SPIN_LOCK_UNLOCKED,
 939                 },
 940                 .tx_nrfifos = TX_NUM_FIFO,
 941                 .tx_fifosize = TX_BUF_SIZE,
 942                 .rx_nrfifos = RX_NUM_FIFO,
 943                 .rx_fifosize = RX_BUF_SIZE,
 944                 .set_lineif = scc1_lineif,
 945                 .wait_closing = SCC_WAIT_CLOSING,
 946         },
 947         [UART_SCC2] = {
 948                 .port = {
 949                         .irq            = SCC2_IRQ,
 950                         .ops            = &cpm_uart_pops,
 951                         .iotype         = UPIO_MEM,
 952                         .lock           = SPIN_LOCK_UNLOCKED,
 953                 },
 954                 .tx_nrfifos = TX_NUM_FIFO,
 955                 .tx_fifosize = TX_BUF_SIZE,
 956                 .rx_nrfifos = RX_NUM_FIFO,
 957                 .rx_fifosize = RX_BUF_SIZE,
 958                 .set_lineif = scc2_lineif,
 959                 .wait_closing = SCC_WAIT_CLOSING,
 960         },
 961         [UART_SCC3] = {
 962                 .port = {
 963                         .irq            = SCC3_IRQ,
 964                         .ops            = &cpm_uart_pops,
 965                         .iotype         = UPIO_MEM,
 966                         .lock           = SPIN_LOCK_UNLOCKED,
 967                 },
 968                 .tx_nrfifos = TX_NUM_FIFO,
 969                 .tx_fifosize = TX_BUF_SIZE,
 970                 .rx_nrfifos = RX_NUM_FIFO,
 971                 .rx_fifosize = RX_BUF_SIZE,
 972                 .set_lineif = scc3_lineif,
 973                 .wait_closing = SCC_WAIT_CLOSING,
 974         },
 975         [UART_SCC4] = {
 976                 .port = {
 977                         .irq            = SCC4_IRQ,
 978                         .ops            = &cpm_uart_pops,
 979                         .iotype         = UPIO_MEM,
 980                         .lock           = SPIN_LOCK_UNLOCKED,
 981                 },
 982                 .tx_nrfifos = TX_NUM_FIFO,
 983                 .tx_fifosize = TX_BUF_SIZE,
 984                 .rx_nrfifos = RX_NUM_FIFO,
 985                 .rx_fifosize = RX_BUF_SIZE,
 986                 .set_lineif = scc4_lineif,
 987                 .wait_closing = SCC_WAIT_CLOSING,
 988         },
 989 };
 990
 991 #ifdef CONFIG_SERIAL_CPM_CONSOLE
 992 /*
 993  *      Print a string to the serial port trying not to disturb
 994  *      any possible real use of the port...
 995  *
 996  *      Note that this is called with interrupts already disabled
 997  */
 998 static void cpm_uart_console_write(struct console *co, const char *s,
 999                                    u_int count)
1000 {
1001         struct uart_cpm_port *pinfo =
1002             &cpm_uart_ports[cpm_uart_port_map[co->index]];
1003         unsigned int i;
1004         volatile cbd_t *bdp, *bdbase;
1005         volatile unsigned char *cp;
1006
1007         /* Get the address of the host memory buffer.
1008          */
1009         bdp = pinfo->tx_cur;
1010         bdbase = pinfo->tx_bd_base;
1011
1012         /*
1013          * Now, do each character.  This is not as bad as it looks
1014          * since this is a holding FIFO and not a transmitting FIFO.
1015          * We could add the complexity of filling the entire transmit
1016          * buffer, but we would just wait longer between accesses......
1017          */
1018         for (i = 0; i < count; i++, s++) {
1019                 /* Wait for transmitter fifo to empty.
1020                  * Ready indicates output is ready, and xmt is doing
1021                  * that, not that it is ready for us to send.
1022                  */
1023                 while ((bdp->cbd_sc & BD_SC_READY) != 0)
1024                         ;
1025
1026                 /* Send the character out.
1027                  * If the buffer address is in the CPM DPRAM, don't
1028                  * convert it.
1029                  */
1030                 cp = cpm2cpu_addr(bdp->cbd_bufaddr);
1031
1032                 *cp = *s;
1033
1034                 bdp->cbd_datlen = 1;
1035                 bdp->cbd_sc |= BD_SC_READY;
1036
1037                 if (bdp->cbd_sc & BD_SC_WRAP)
1038                         bdp = bdbase;
1039                 else
1040                         bdp++;
1041
1042                 /* if a LF, also do CR... */
1043                 if (*s == 10) {
1044                         while ((bdp->cbd_sc & BD_SC_READY) != 0)
1045                                 ;
1046
1047                         cp = cpm2cpu_addr(bdp->cbd_bufaddr);
1048
1049                         *cp = 13;
1050                         bdp->cbd_datlen = 1;
1051                         bdp->cbd_sc |= BD_SC_READY;
1052
1053                         if (bdp->cbd_sc & BD_SC_WRAP)
1054                                 bdp = bdbase;
1055                         else
1056                                 bdp++;
1057                 }
1058         }
1059
1060         /*
1061          * Finally, Wait for transmitter & holding register to empty
1062          *  and restore the IER
1063          */
1064         while ((bdp->cbd_sc & BD_SC_READY) != 0)
1065                 ;
1066
1067         pinfo->tx_cur = (volatile cbd_t *) bdp;
1068 }
1069
1070 /*
1071  * Setup console. Be careful is called early !
1072  */
1073 static int __init cpm_uart_console_setup(struct console *co, char *options)
1074 {
1075         struct uart_port *port;
1076         struct uart_cpm_port *pinfo;
1077         int baud = 38400;
1078         int bits = 8;
1079         int parity = 'n';
1080         int flow = 'n';
1081         int ret;
1082
1083         port =
1084             (struct uart_port *)&cpm_uart_ports[cpm_uart_port_map[co->index]];
1085         pinfo = (struct uart_cpm_port *)port;
1086
1087         pinfo->flags |= FLAG_CONSOLE;
1088
1089         if (options) {
1090                 uart_parse_options(options, &baud, &parity, &bits, &flow);
1091         } else {
1092                 bd_t *bd = (bd_t *) __res;
1093
1094                 if (bd->bi_baudrate)
1095                         baud = bd->bi_baudrate;
1096                 else
1097                         baud = 9600;
1098         }
1099
1100         /*
1101          * Setup any port IO, connect any baud rate generators,
1102          * etc.  This is expected to be handled by board
1103          * dependant code
1104          */
1105         if (pinfo->set_lineif)
1106                 pinfo->set_lineif(pinfo);
1107
1108         if (IS_SMC(pinfo)) {
1109                 pinfo->smcp->smc_smcm &= ~(SMCM_RX | SMCM_TX);
1110                 pinfo->smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
1111         } else {
1112                 pinfo->sccp->scc_sccm &= ~(UART_SCCM_TX | UART_SCCM_RX);
1113                 pinfo->sccp->scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
1114         }
1115
1116         ret = cpm_uart_allocbuf(pinfo, 1);
1117
1118         if (ret)
1119                 return ret;
1120
1121         cpm_uart_initbd(pinfo);
1122
1123         if (IS_SMC(pinfo))
1124                 cpm_uart_init_smc(pinfo);
1125         else
1126                 cpm_uart_init_scc(pinfo);
1127
1128         uart_set_options(port, co, baud, parity, bits, flow);
1129
1130         return 0;
1131 }
1132
1133 static struct uart_driver cpm_reg;
1134 static struct console cpm_scc_uart_console = {
1135         .name           = "ttyCPM",
1136         .write          = cpm_uart_console_write,
1137         .device         = uart_console_device,
1138         .setup          = cpm_uart_console_setup,
1139         .flags          = CON_PRINTBUFFER,
1140         .index          = -1,
1141         .data           = &cpm_reg,
1142 };
1143
1144 int __init cpm_uart_console_init(void)
1145 {
1146         int ret = cpm_uart_init_portdesc();
1147
1148         if (!ret)
1149                 register_console(&cpm_scc_uart_console);
1150         return ret;
1151 }
1152
1153 console_initcall(cpm_uart_console_init);
1154
1155 #define CPM_UART_CONSOLE        &cpm_scc_uart_console
1156 #else
1157 #define CPM_UART_CONSOLE        NULL
1158 #endif
1159
1160 static struct uart_driver cpm_reg = {
1161         .owner          = THIS_MODULE,
1162         .driver_name    = "ttyCPM",
1163         .dev_name       = "ttyCPM",
1164         .major          = SERIAL_CPM_MAJOR,
1165         .minor          = SERIAL_CPM_MINOR,
1166         .cons           = CPM_UART_CONSOLE,
1167 };
1168
1169 static int __init cpm_uart_init(void)
1170 {
1171         int ret, i;
1172
1173         printk(KERN_INFO "Serial: CPM driver $Revision: 0.01 $\n");
1174
1175 #ifndef CONFIG_SERIAL_CPM_CONSOLE
1176         ret = cpm_uart_init_portdesc();
1177         if (ret)
1178                 return ret;
1179 #endif
1180
1181         cpm_reg.nr = cpm_uart_nr;
1182         ret = uart_register_driver(&cpm_reg);
1183
1184         if (ret)
1185                 return ret;
1186
1187         for (i = 0; i < cpm_uart_nr; i++) {
1188                 int con = cpm_uart_port_map[i];
1189                 cpm_uart_ports[con].port.line = i;
1190                 cpm_uart_ports[con].port.flags = UPF_BOOT_AUTOCONF;
1191                 uart_add_one_port(&cpm_reg, &cpm_uart_ports[con].port);
1192         }
1193
1194         return ret;
1195 }
1196
1197 static void __exit cpm_uart_exit(void)
1198 {
1199         int i;
1200
1201         for (i = 0; i < cpm_uart_nr; i++) {
1202                 int con = cpm_uart_port_map[i];
1203                 uart_remove_one_port(&cpm_reg, &cpm_uart_ports[con].port);
1204         }
1205
1206         uart_unregister_driver(&cpm_reg);
1207 }
1208
1209 module_init(cpm_uart_init);
1210 module_exit(cpm_uart_exit);
1211
1212 MODULE_AUTHOR("Kumar Gala/Antoniou Pantelis");
1213 MODULE_DESCRIPTION("CPM SCC/SMC port driver $Revision: 0.01 $");
1214 MODULE_LICENSE("GPL");
1215 MODULE_ALIAS_CHARDEV(SERIAL_CPM_MAJOR, SERIAL_CPM_MINOR);