2 * linux/drivers/char/atmel_serial.c
4 * Driver for Atmel AT91 / AT32 Serial ports
5 * Copyright (C) 2003 Rick Bronson
7 * Based on drivers/char/serial_sa1100.c, by Deep Blue Solutions Ltd.
8 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
10 * DMA support added by Chip Coldwell.
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
27 #include <linux/module.h>
28 #include <linux/tty.h>
29 #include <linux/ioport.h>
30 #include <linux/slab.h>
31 #include <linux/init.h>
32 #include <linux/serial.h>
33 #include <linux/clk.h>
34 #include <linux/console.h>
35 #include <linux/sysrq.h>
36 #include <linux/tty_flip.h>
37 #include <linux/platform_device.h>
38 #include <linux/dma-mapping.h>
39 #include <linux/atmel_pdc.h>
40 #include <linux/atmel_serial.h>
41 #include <linux/uaccess.h>
45 #include <asm/mach/serial_at91.h>
46 #include <mach/board.h>
50 #include <mach/gpio.h>
53 #define PDC_BUFFER_SIZE 512
54 /* Revisit: We should calculate this based on the actual port settings */
55 #define PDC_RX_TIMEOUT (3 * 10) /* 3 bytes */
57 #if defined(CONFIG_SERIAL_ATMEL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
61 #include <linux/serial_core.h>
63 static void atmel_start_rx(struct uart_port *port);
64 static void atmel_stop_rx(struct uart_port *port);
66 #ifdef CONFIG_SERIAL_ATMEL_TTYAT
68 /* Use device name ttyAT, major 204 and minor 154-169. This is necessary if we
69 * should coexist with the 8250 driver, such as if we have an external 16C550
71 #define SERIAL_ATMEL_MAJOR 204
72 #define MINOR_START 154
73 #define ATMEL_DEVICENAME "ttyAT"
77 /* Use device name ttyS, major 4, minor 64-68. This is the usual serial port
78 * name, but it is legally reserved for the 8250 driver. */
79 #define SERIAL_ATMEL_MAJOR TTY_MAJOR
80 #define MINOR_START 64
81 #define ATMEL_DEVICENAME "ttyS"
85 #define ATMEL_ISR_PASS_LIMIT 256
87 /* UART registers. CR is write-only, hence no GET macro */
88 #define UART_PUT_CR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_CR)
89 #define UART_GET_MR(port) __raw_readl((port)->membase + ATMEL_US_MR)
90 #define UART_PUT_MR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_MR)
91 #define UART_PUT_IER(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IER)
92 #define UART_PUT_IDR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IDR)
93 #define UART_GET_IMR(port) __raw_readl((port)->membase + ATMEL_US_IMR)
94 #define UART_GET_CSR(port) __raw_readl((port)->membase + ATMEL_US_CSR)
95 #define UART_GET_CHAR(port) __raw_readl((port)->membase + ATMEL_US_RHR)
96 #define UART_PUT_CHAR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_THR)
97 #define UART_GET_BRGR(port) __raw_readl((port)->membase + ATMEL_US_BRGR)
98 #define UART_PUT_BRGR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_BRGR)
99 #define UART_PUT_RTOR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_RTOR)
100 #define UART_PUT_TTGR(port, v) __raw_writel(v, (port)->membase + ATMEL_US_TTGR)
103 #define UART_PUT_PTCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_PTCR)
104 #define UART_GET_PTSR(port) __raw_readl((port)->membase + ATMEL_PDC_PTSR)
106 #define UART_PUT_RPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RPR)
107 #define UART_GET_RPR(port) __raw_readl((port)->membase + ATMEL_PDC_RPR)
108 #define UART_PUT_RCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RCR)
109 #define UART_PUT_RNPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNPR)
110 #define UART_PUT_RNCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNCR)
112 #define UART_PUT_TPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TPR)
113 #define UART_PUT_TCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TCR)
114 #define UART_GET_TCR(port) __raw_readl((port)->membase + ATMEL_PDC_TCR)
116 static int (*atmel_open_hook)(struct uart_port *);
117 static void (*atmel_close_hook)(struct uart_port *);
119 struct atmel_dma_buffer {
122 unsigned int dma_size;
126 struct atmel_uart_char {
131 #define ATMEL_SERIAL_RINGSIZE 1024
134 * We wrap our port structure around the generic uart_port.
136 struct atmel_uart_port {
137 struct uart_port uart; /* uart */
138 struct clk *clk; /* uart clock */
139 int may_wakeup; /* cached value of device_may_wakeup for times we need to disable it */
140 u32 backup_imr; /* IMR saved during suspend */
141 int break_active; /* break being received */
143 short use_dma_rx; /* enable PDC receiver */
144 short pdc_rx_idx; /* current PDC RX buffer */
145 struct atmel_dma_buffer pdc_rx[2]; /* PDC receier */
147 short use_dma_tx; /* enable PDC transmitter */
148 struct atmel_dma_buffer pdc_tx; /* PDC transmitter */
150 struct tasklet_struct tasklet;
151 unsigned int irq_status;
152 unsigned int irq_status_prev;
154 struct circ_buf rx_ring;
156 struct serial_rs485 rs485; /* rs485 settings */
157 unsigned int tx_done_mask;
160 static struct atmel_uart_port atmel_ports[ATMEL_MAX_UART];
163 static struct console atmel_console;
166 static inline struct atmel_uart_port *
167 to_atmel_uart_port(struct uart_port *uart)
169 return container_of(uart, struct atmel_uart_port, uart);
172 #ifdef CONFIG_SERIAL_ATMEL_PDC
173 static bool atmel_use_dma_rx(struct uart_port *port)
175 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
177 return atmel_port->use_dma_rx;
180 static bool atmel_use_dma_tx(struct uart_port *port)
182 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
184 return atmel_port->use_dma_tx;
187 static bool atmel_use_dma_rx(struct uart_port *port)
192 static bool atmel_use_dma_tx(struct uart_port *port)
198 /* Enable or disable the rs485 support */
199 void atmel_config_rs485(struct uart_port *port, struct serial_rs485 *rs485conf)
201 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
204 spin_lock(&port->lock);
206 /* Disable interrupts */
207 UART_PUT_IDR(port, atmel_port->tx_done_mask);
209 mode = UART_GET_MR(port);
211 /* Resetting serial mode to RS232 (0x0) */
212 mode &= ~ATMEL_US_USMODE;
214 atmel_port->rs485 = *rs485conf;
216 if (rs485conf->flags & SER_RS485_ENABLED) {
217 dev_dbg(port->dev, "Setting UART to RS485\n");
218 atmel_port->tx_done_mask = ATMEL_US_TXEMPTY;
219 UART_PUT_TTGR(port, rs485conf->delay_rts_before_send);
220 mode |= ATMEL_US_USMODE_RS485;
222 dev_dbg(port->dev, "Setting UART to RS232\n");
223 if (atmel_use_dma_tx(port))
224 atmel_port->tx_done_mask = ATMEL_US_ENDTX |
227 atmel_port->tx_done_mask = ATMEL_US_TXRDY;
229 UART_PUT_MR(port, mode);
231 /* Enable interrupts */
232 UART_PUT_IER(port, atmel_port->tx_done_mask);
234 spin_unlock(&port->lock);
239 * Return TIOCSER_TEMT when transmitter FIFO and Shift register is empty.
241 static u_int atmel_tx_empty(struct uart_port *port)
243 return (UART_GET_CSR(port) & ATMEL_US_TXEMPTY) ? TIOCSER_TEMT : 0;
247 * Set state of the modem control output lines
249 static void atmel_set_mctrl(struct uart_port *port, u_int mctrl)
251 unsigned int control = 0;
253 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
255 #ifdef CONFIG_ARCH_AT91RM9200
256 if (cpu_is_at91rm9200()) {
258 * AT91RM9200 Errata #39: RTS0 is not internally connected
259 * to PA21. We need to drive the pin manually.
261 if (port->mapbase == AT91RM9200_BASE_US0) {
262 if (mctrl & TIOCM_RTS)
263 at91_set_gpio_value(AT91_PIN_PA21, 0);
265 at91_set_gpio_value(AT91_PIN_PA21, 1);
270 if (mctrl & TIOCM_RTS)
271 control |= ATMEL_US_RTSEN;
273 control |= ATMEL_US_RTSDIS;
275 if (mctrl & TIOCM_DTR)
276 control |= ATMEL_US_DTREN;
278 control |= ATMEL_US_DTRDIS;
280 UART_PUT_CR(port, control);
282 /* Local loopback mode? */
283 mode = UART_GET_MR(port) & ~ATMEL_US_CHMODE;
284 if (mctrl & TIOCM_LOOP)
285 mode |= ATMEL_US_CHMODE_LOC_LOOP;
287 mode |= ATMEL_US_CHMODE_NORMAL;
289 /* Resetting serial mode to RS232 (0x0) */
290 mode &= ~ATMEL_US_USMODE;
292 if (atmel_port->rs485.flags & SER_RS485_ENABLED) {
293 dev_dbg(port->dev, "Setting UART to RS485\n");
294 UART_PUT_TTGR(port, atmel_port->rs485.delay_rts_before_send);
295 mode |= ATMEL_US_USMODE_RS485;
297 dev_dbg(port->dev, "Setting UART to RS232\n");
299 UART_PUT_MR(port, mode);
303 * Get state of the modem control input lines
305 static u_int atmel_get_mctrl(struct uart_port *port)
307 unsigned int status, ret = 0;
309 status = UART_GET_CSR(port);
312 * The control signals are active low.
314 if (!(status & ATMEL_US_DCD))
316 if (!(status & ATMEL_US_CTS))
318 if (!(status & ATMEL_US_DSR))
320 if (!(status & ATMEL_US_RI))
329 static void atmel_stop_tx(struct uart_port *port)
331 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
333 if (atmel_use_dma_tx(port)) {
334 /* disable PDC transmit */
335 UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
337 /* Disable interrupts */
338 UART_PUT_IDR(port, atmel_port->tx_done_mask);
340 if (atmel_port->rs485.flags & SER_RS485_ENABLED)
341 atmel_start_rx(port);
345 * Start transmitting.
347 static void atmel_start_tx(struct uart_port *port)
349 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
351 if (atmel_use_dma_tx(port)) {
352 if (UART_GET_PTSR(port) & ATMEL_PDC_TXTEN)
353 /* The transmitter is already running. Yes, we
357 if (atmel_port->rs485.flags & SER_RS485_ENABLED)
360 /* re-enable PDC transmit */
361 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
363 /* Enable interrupts */
364 UART_PUT_IER(port, atmel_port->tx_done_mask);
368 * start receiving - port is in process of being opened.
370 static void atmel_start_rx(struct uart_port *port)
372 UART_PUT_CR(port, ATMEL_US_RSTSTA); /* reset status and receiver */
374 if (atmel_use_dma_rx(port)) {
375 /* enable PDC controller */
376 UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT |
377 port->read_status_mask);
378 UART_PUT_PTCR(port, ATMEL_PDC_RXTEN);
380 UART_PUT_IER(port, ATMEL_US_RXRDY);
385 * Stop receiving - port is in process of being closed.
387 static void atmel_stop_rx(struct uart_port *port)
389 if (atmel_use_dma_rx(port)) {
390 /* disable PDC receive */
391 UART_PUT_PTCR(port, ATMEL_PDC_RXTDIS);
392 UART_PUT_IDR(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT |
393 port->read_status_mask);
395 UART_PUT_IDR(port, ATMEL_US_RXRDY);
400 * Enable modem status interrupts
402 static void atmel_enable_ms(struct uart_port *port)
404 UART_PUT_IER(port, ATMEL_US_RIIC | ATMEL_US_DSRIC
405 | ATMEL_US_DCDIC | ATMEL_US_CTSIC);
409 * Control the transmission of a break signal
411 static void atmel_break_ctl(struct uart_port *port, int break_state)
413 if (break_state != 0)
414 UART_PUT_CR(port, ATMEL_US_STTBRK); /* start break */
416 UART_PUT_CR(port, ATMEL_US_STPBRK); /* stop break */
420 * Stores the incoming character in the ring buffer
423 atmel_buffer_rx_char(struct uart_port *port, unsigned int status,
426 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
427 struct circ_buf *ring = &atmel_port->rx_ring;
428 struct atmel_uart_char *c;
430 if (!CIRC_SPACE(ring->head, ring->tail, ATMEL_SERIAL_RINGSIZE))
431 /* Buffer overflow, ignore char */
434 c = &((struct atmel_uart_char *)ring->buf)[ring->head];
438 /* Make sure the character is stored before we update head. */
441 ring->head = (ring->head + 1) & (ATMEL_SERIAL_RINGSIZE - 1);
445 * Deal with parity, framing and overrun errors.
447 static void atmel_pdc_rxerr(struct uart_port *port, unsigned int status)
450 UART_PUT_CR(port, ATMEL_US_RSTSTA);
452 if (status & ATMEL_US_RXBRK) {
453 /* ignore side-effect */
454 status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);
457 if (status & ATMEL_US_PARE)
458 port->icount.parity++;
459 if (status & ATMEL_US_FRAME)
460 port->icount.frame++;
461 if (status & ATMEL_US_OVRE)
462 port->icount.overrun++;
466 * Characters received (called from interrupt handler)
468 static void atmel_rx_chars(struct uart_port *port)
470 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
471 unsigned int status, ch;
473 status = UART_GET_CSR(port);
474 while (status & ATMEL_US_RXRDY) {
475 ch = UART_GET_CHAR(port);
478 * note that the error handling code is
479 * out of the main execution path
481 if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
482 | ATMEL_US_OVRE | ATMEL_US_RXBRK)
483 || atmel_port->break_active)) {
486 UART_PUT_CR(port, ATMEL_US_RSTSTA);
488 if (status & ATMEL_US_RXBRK
489 && !atmel_port->break_active) {
490 atmel_port->break_active = 1;
491 UART_PUT_IER(port, ATMEL_US_RXBRK);
494 * This is either the end-of-break
495 * condition or we've received at
496 * least one character without RXBRK
497 * being set. In both cases, the next
498 * RXBRK will indicate start-of-break.
500 UART_PUT_IDR(port, ATMEL_US_RXBRK);
501 status &= ~ATMEL_US_RXBRK;
502 atmel_port->break_active = 0;
506 atmel_buffer_rx_char(port, status, ch);
507 status = UART_GET_CSR(port);
510 tasklet_schedule(&atmel_port->tasklet);
514 * Transmit characters (called from tasklet with TXRDY interrupt
517 static void atmel_tx_chars(struct uart_port *port)
519 struct circ_buf *xmit = &port->state->xmit;
520 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
522 if (port->x_char && UART_GET_CSR(port) & atmel_port->tx_done_mask) {
523 UART_PUT_CHAR(port, port->x_char);
527 if (uart_circ_empty(xmit) || uart_tx_stopped(port))
530 while (UART_GET_CSR(port) & atmel_port->tx_done_mask) {
531 UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
532 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
534 if (uart_circ_empty(xmit))
538 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
539 uart_write_wakeup(port);
541 if (!uart_circ_empty(xmit))
542 /* Enable interrupts */
543 UART_PUT_IER(port, atmel_port->tx_done_mask);
547 * receive interrupt handler.
550 atmel_handle_receive(struct uart_port *port, unsigned int pending)
552 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
554 if (atmel_use_dma_rx(port)) {
556 * PDC receive. Just schedule the tasklet and let it
557 * figure out the details.
559 * TODO: We're not handling error flags correctly at
562 if (pending & (ATMEL_US_ENDRX | ATMEL_US_TIMEOUT)) {
563 UART_PUT_IDR(port, (ATMEL_US_ENDRX
564 | ATMEL_US_TIMEOUT));
565 tasklet_schedule(&atmel_port->tasklet);
568 if (pending & (ATMEL_US_RXBRK | ATMEL_US_OVRE |
569 ATMEL_US_FRAME | ATMEL_US_PARE))
570 atmel_pdc_rxerr(port, pending);
573 /* Interrupt receive */
574 if (pending & ATMEL_US_RXRDY)
575 atmel_rx_chars(port);
576 else if (pending & ATMEL_US_RXBRK) {
578 * End of break detected. If it came along with a
579 * character, atmel_rx_chars will handle it.
581 UART_PUT_CR(port, ATMEL_US_RSTSTA);
582 UART_PUT_IDR(port, ATMEL_US_RXBRK);
583 atmel_port->break_active = 0;
588 * transmit interrupt handler. (Transmit is IRQF_NODELAY safe)
591 atmel_handle_transmit(struct uart_port *port, unsigned int pending)
593 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
595 if (pending & atmel_port->tx_done_mask) {
596 /* Either PDC or interrupt transmission */
597 UART_PUT_IDR(port, atmel_port->tx_done_mask);
598 tasklet_schedule(&atmel_port->tasklet);
603 * status flags interrupt handler.
606 atmel_handle_status(struct uart_port *port, unsigned int pending,
609 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
611 if (pending & (ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC
613 atmel_port->irq_status = status;
614 tasklet_schedule(&atmel_port->tasklet);
621 static irqreturn_t atmel_interrupt(int irq, void *dev_id)
623 struct uart_port *port = dev_id;
624 unsigned int status, pending, pass_counter = 0;
627 status = UART_GET_CSR(port);
628 pending = status & UART_GET_IMR(port);
632 atmel_handle_receive(port, pending);
633 atmel_handle_status(port, pending, status);
634 atmel_handle_transmit(port, pending);
635 } while (pass_counter++ < ATMEL_ISR_PASS_LIMIT);
637 return pass_counter ? IRQ_HANDLED : IRQ_NONE;
641 * Called from tasklet with ENDTX and TXBUFE interrupts disabled.
643 static void atmel_tx_dma(struct uart_port *port)
645 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
646 struct circ_buf *xmit = &port->state->xmit;
647 struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
650 /* nothing left to transmit? */
651 if (UART_GET_TCR(port))
654 xmit->tail += pdc->ofs;
655 xmit->tail &= UART_XMIT_SIZE - 1;
657 port->icount.tx += pdc->ofs;
660 /* more to transmit - setup next transfer */
662 /* disable PDC transmit */
663 UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
665 if (!uart_circ_empty(xmit) && !uart_tx_stopped(port)) {
666 dma_sync_single_for_device(port->dev,
671 count = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE);
674 UART_PUT_TPR(port, pdc->dma_addr + xmit->tail);
675 UART_PUT_TCR(port, count);
676 /* re-enable PDC transmit */
677 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
678 /* Enable interrupts */
679 UART_PUT_IER(port, atmel_port->tx_done_mask);
681 if (atmel_port->rs485.flags & SER_RS485_ENABLED) {
682 /* DMA done, stop TX, start RX for RS485 */
683 atmel_start_rx(port);
687 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
688 uart_write_wakeup(port);
691 static void atmel_rx_from_ring(struct uart_port *port)
693 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
694 struct circ_buf *ring = &atmel_port->rx_ring;
698 while (ring->head != ring->tail) {
699 struct atmel_uart_char c;
701 /* Make sure c is loaded after head. */
704 c = ((struct atmel_uart_char *)ring->buf)[ring->tail];
706 ring->tail = (ring->tail + 1) & (ATMEL_SERIAL_RINGSIZE - 1);
713 * note that the error handling code is
714 * out of the main execution path
716 if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
717 | ATMEL_US_OVRE | ATMEL_US_RXBRK))) {
718 if (status & ATMEL_US_RXBRK) {
719 /* ignore side-effect */
720 status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);
723 if (uart_handle_break(port))
726 if (status & ATMEL_US_PARE)
727 port->icount.parity++;
728 if (status & ATMEL_US_FRAME)
729 port->icount.frame++;
730 if (status & ATMEL_US_OVRE)
731 port->icount.overrun++;
733 status &= port->read_status_mask;
735 if (status & ATMEL_US_RXBRK)
737 else if (status & ATMEL_US_PARE)
739 else if (status & ATMEL_US_FRAME)
744 if (uart_handle_sysrq_char(port, c.ch))
747 uart_insert_char(port, status, ATMEL_US_OVRE, c.ch, flg);
751 * Drop the lock here since it might end up calling
752 * uart_start(), which takes the lock.
754 spin_unlock(&port->lock);
755 tty_flip_buffer_push(port->state->port.tty);
756 spin_lock(&port->lock);
759 static void atmel_rx_from_dma(struct uart_port *port)
761 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
762 struct tty_struct *tty = port->state->port.tty;
763 struct atmel_dma_buffer *pdc;
764 int rx_idx = atmel_port->pdc_rx_idx;
770 /* Reset the UART timeout early so that we don't miss one */
771 UART_PUT_CR(port, ATMEL_US_STTTO);
773 pdc = &atmel_port->pdc_rx[rx_idx];
774 head = UART_GET_RPR(port) - pdc->dma_addr;
777 /* If the PDC has switched buffers, RPR won't contain
778 * any address within the current buffer. Since head
779 * is unsigned, we just need a one-way comparison to
782 * In this case, we just need to consume the entire
783 * buffer and resubmit it for DMA. This will clear the
784 * ENDRX bit as well, so that we can safely re-enable
785 * all interrupts below.
787 head = min(head, pdc->dma_size);
789 if (likely(head != tail)) {
790 dma_sync_single_for_cpu(port->dev, pdc->dma_addr,
791 pdc->dma_size, DMA_FROM_DEVICE);
794 * head will only wrap around when we recycle
795 * the DMA buffer, and when that happens, we
796 * explicitly set tail to 0. So head will
797 * always be greater than tail.
801 tty_insert_flip_string(tty, pdc->buf + pdc->ofs, count);
803 dma_sync_single_for_device(port->dev, pdc->dma_addr,
804 pdc->dma_size, DMA_FROM_DEVICE);
806 port->icount.rx += count;
811 * If the current buffer is full, we need to check if
812 * the next one contains any additional data.
814 if (head >= pdc->dma_size) {
816 UART_PUT_RNPR(port, pdc->dma_addr);
817 UART_PUT_RNCR(port, pdc->dma_size);
820 atmel_port->pdc_rx_idx = rx_idx;
822 } while (head >= pdc->dma_size);
825 * Drop the lock here since it might end up calling
826 * uart_start(), which takes the lock.
828 spin_unlock(&port->lock);
829 tty_flip_buffer_push(tty);
830 spin_lock(&port->lock);
832 UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
836 * tasklet handling tty stuff outside the interrupt handler.
838 static void atmel_tasklet_func(unsigned long data)
840 struct uart_port *port = (struct uart_port *)data;
841 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
843 unsigned int status_change;
845 /* The interrupt handler does not take the lock */
846 spin_lock(&port->lock);
848 if (atmel_use_dma_tx(port))
851 atmel_tx_chars(port);
853 status = atmel_port->irq_status;
854 status_change = status ^ atmel_port->irq_status_prev;
856 if (status_change & (ATMEL_US_RI | ATMEL_US_DSR
857 | ATMEL_US_DCD | ATMEL_US_CTS)) {
858 /* TODO: All reads to CSR will clear these interrupts! */
859 if (status_change & ATMEL_US_RI)
861 if (status_change & ATMEL_US_DSR)
863 if (status_change & ATMEL_US_DCD)
864 uart_handle_dcd_change(port, !(status & ATMEL_US_DCD));
865 if (status_change & ATMEL_US_CTS)
866 uart_handle_cts_change(port, !(status & ATMEL_US_CTS));
868 wake_up_interruptible(&port->state->port.delta_msr_wait);
870 atmel_port->irq_status_prev = status;
873 if (atmel_use_dma_rx(port))
874 atmel_rx_from_dma(port);
876 atmel_rx_from_ring(port);
878 spin_unlock(&port->lock);
882 * Perform initialization and enable port for reception
884 static int atmel_startup(struct uart_port *port)
886 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
887 struct tty_struct *tty = port->state->port.tty;
891 * Ensure that no interrupts are enabled otherwise when
892 * request_irq() is called we could get stuck trying to
893 * handle an unexpected interrupt
895 UART_PUT_IDR(port, -1);
900 retval = request_irq(port->irq, atmel_interrupt, IRQF_SHARED,
901 tty ? tty->name : "atmel_serial", port);
903 printk("atmel_serial: atmel_startup - Can't get irq\n");
908 * Initialize DMA (if necessary)
910 if (atmel_use_dma_rx(port)) {
913 for (i = 0; i < 2; i++) {
914 struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
916 pdc->buf = kmalloc(PDC_BUFFER_SIZE, GFP_KERNEL);
917 if (pdc->buf == NULL) {
919 dma_unmap_single(port->dev,
920 atmel_port->pdc_rx[0].dma_addr,
923 kfree(atmel_port->pdc_rx[0].buf);
925 free_irq(port->irq, port);
928 pdc->dma_addr = dma_map_single(port->dev,
932 pdc->dma_size = PDC_BUFFER_SIZE;
936 atmel_port->pdc_rx_idx = 0;
938 UART_PUT_RPR(port, atmel_port->pdc_rx[0].dma_addr);
939 UART_PUT_RCR(port, PDC_BUFFER_SIZE);
941 UART_PUT_RNPR(port, atmel_port->pdc_rx[1].dma_addr);
942 UART_PUT_RNCR(port, PDC_BUFFER_SIZE);
944 if (atmel_use_dma_tx(port)) {
945 struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
946 struct circ_buf *xmit = &port->state->xmit;
948 pdc->buf = xmit->buf;
949 pdc->dma_addr = dma_map_single(port->dev,
953 pdc->dma_size = UART_XMIT_SIZE;
958 * If there is a specific "open" function (to register
959 * control line interrupts)
961 if (atmel_open_hook) {
962 retval = atmel_open_hook(port);
964 free_irq(port->irq, port);
969 /* Save current CSR for comparison in atmel_tasklet_func() */
970 atmel_port->irq_status_prev = UART_GET_CSR(port);
971 atmel_port->irq_status = atmel_port->irq_status_prev;
974 * Finally, enable the serial port
976 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
977 /* enable xmit & rcvr */
978 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
980 if (atmel_use_dma_rx(port)) {
981 /* set UART timeout */
982 UART_PUT_RTOR(port, PDC_RX_TIMEOUT);
983 UART_PUT_CR(port, ATMEL_US_STTTO);
985 UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
986 /* enable PDC controller */
987 UART_PUT_PTCR(port, ATMEL_PDC_RXTEN);
989 /* enable receive only */
990 UART_PUT_IER(port, ATMEL_US_RXRDY);
999 static void atmel_shutdown(struct uart_port *port)
1001 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1003 * Ensure everything is stopped.
1005 atmel_stop_rx(port);
1006 atmel_stop_tx(port);
1009 * Shut-down the DMA.
1011 if (atmel_use_dma_rx(port)) {
1014 for (i = 0; i < 2; i++) {
1015 struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
1017 dma_unmap_single(port->dev,
1024 if (atmel_use_dma_tx(port)) {
1025 struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
1027 dma_unmap_single(port->dev,
1034 * Disable all interrupts, port and break condition.
1036 UART_PUT_CR(port, ATMEL_US_RSTSTA);
1037 UART_PUT_IDR(port, -1);
1040 * Free the interrupt
1042 free_irq(port->irq, port);
1045 * If there is a specific "close" function (to unregister
1046 * control line interrupts)
1048 if (atmel_close_hook)
1049 atmel_close_hook(port);
1053 * Flush any TX data submitted for DMA. Called when the TX circular
1056 static void atmel_flush_buffer(struct uart_port *port)
1058 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1060 if (atmel_use_dma_tx(port)) {
1061 UART_PUT_TCR(port, 0);
1062 atmel_port->pdc_tx.ofs = 0;
1067 * Power / Clock management.
1069 static void atmel_serial_pm(struct uart_port *port, unsigned int state,
1070 unsigned int oldstate)
1072 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1077 * Enable the peripheral clock for this serial port.
1078 * This is called on uart_open() or a resume event.
1080 clk_enable(atmel_port->clk);
1082 /* re-enable interrupts if we disabled some on suspend */
1083 UART_PUT_IER(port, atmel_port->backup_imr);
1086 /* Back up the interrupt mask and disable all interrupts */
1087 atmel_port->backup_imr = UART_GET_IMR(port);
1088 UART_PUT_IDR(port, -1);
1091 * Disable the peripheral clock for this serial port.
1092 * This is called on uart_close() or a suspend event.
1094 clk_disable(atmel_port->clk);
1097 printk(KERN_ERR "atmel_serial: unknown pm %d\n", state);
1102 * Change the port parameters
1104 static void atmel_set_termios(struct uart_port *port, struct ktermios *termios,
1105 struct ktermios *old)
1107 unsigned long flags;
1108 unsigned int mode, imr, quot, baud;
1109 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1111 /* Get current mode register */
1112 mode = UART_GET_MR(port) & ~(ATMEL_US_USCLKS | ATMEL_US_CHRL
1113 | ATMEL_US_NBSTOP | ATMEL_US_PAR
1116 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
1117 quot = uart_get_divisor(port, baud);
1119 if (quot > 65535) { /* BRGR is 16-bit, so switch to slower clock */
1121 mode |= ATMEL_US_USCLKS_MCK_DIV8;
1125 switch (termios->c_cflag & CSIZE) {
1127 mode |= ATMEL_US_CHRL_5;
1130 mode |= ATMEL_US_CHRL_6;
1133 mode |= ATMEL_US_CHRL_7;
1136 mode |= ATMEL_US_CHRL_8;
1141 if (termios->c_cflag & CSTOPB)
1142 mode |= ATMEL_US_NBSTOP_2;
1145 if (termios->c_cflag & PARENB) {
1146 /* Mark or Space parity */
1147 if (termios->c_cflag & CMSPAR) {
1148 if (termios->c_cflag & PARODD)
1149 mode |= ATMEL_US_PAR_MARK;
1151 mode |= ATMEL_US_PAR_SPACE;
1152 } else if (termios->c_cflag & PARODD)
1153 mode |= ATMEL_US_PAR_ODD;
1155 mode |= ATMEL_US_PAR_EVEN;
1157 mode |= ATMEL_US_PAR_NONE;
1159 /* hardware handshake (RTS/CTS) */
1160 if (termios->c_cflag & CRTSCTS)
1161 mode |= ATMEL_US_USMODE_HWHS;
1163 mode |= ATMEL_US_USMODE_NORMAL;
1165 spin_lock_irqsave(&port->lock, flags);
1167 port->read_status_mask = ATMEL_US_OVRE;
1168 if (termios->c_iflag & INPCK)
1169 port->read_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE);
1170 if (termios->c_iflag & (BRKINT | PARMRK))
1171 port->read_status_mask |= ATMEL_US_RXBRK;
1173 if (atmel_use_dma_rx(port))
1174 /* need to enable error interrupts */
1175 UART_PUT_IER(port, port->read_status_mask);
1178 * Characters to ignore
1180 port->ignore_status_mask = 0;
1181 if (termios->c_iflag & IGNPAR)
1182 port->ignore_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE);
1183 if (termios->c_iflag & IGNBRK) {
1184 port->ignore_status_mask |= ATMEL_US_RXBRK;
1186 * If we're ignoring parity and break indicators,
1187 * ignore overruns too (for real raw support).
1189 if (termios->c_iflag & IGNPAR)
1190 port->ignore_status_mask |= ATMEL_US_OVRE;
1192 /* TODO: Ignore all characters if CREAD is set.*/
1194 /* update the per-port timeout */
1195 uart_update_timeout(port, termios->c_cflag, baud);
1198 * save/disable interrupts. The tty layer will ensure that the
1199 * transmitter is empty if requested by the caller, so there's
1200 * no need to wait for it here.
1202 imr = UART_GET_IMR(port);
1203 UART_PUT_IDR(port, -1);
1205 /* disable receiver and transmitter */
1206 UART_PUT_CR(port, ATMEL_US_TXDIS | ATMEL_US_RXDIS);
1208 /* Resetting serial mode to RS232 (0x0) */
1209 mode &= ~ATMEL_US_USMODE;
1211 if (atmel_port->rs485.flags & SER_RS485_ENABLED) {
1212 dev_dbg(port->dev, "Setting UART to RS485\n");
1213 UART_PUT_TTGR(port, atmel_port->rs485.delay_rts_before_send);
1214 mode |= ATMEL_US_USMODE_RS485;
1216 dev_dbg(port->dev, "Setting UART to RS232\n");
1219 /* set the parity, stop bits and data size */
1220 UART_PUT_MR(port, mode);
1222 /* set the baud rate */
1223 UART_PUT_BRGR(port, quot);
1224 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
1225 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
1227 /* restore interrupts */
1228 UART_PUT_IER(port, imr);
1230 /* CTS flow-control and modem-status interrupts */
1231 if (UART_ENABLE_MS(port, termios->c_cflag))
1232 port->ops->enable_ms(port);
1234 spin_unlock_irqrestore(&port->lock, flags);
1238 * Return string describing the specified port
1240 static const char *atmel_type(struct uart_port *port)
1242 return (port->type == PORT_ATMEL) ? "ATMEL_SERIAL" : NULL;
1246 * Release the memory region(s) being used by 'port'.
1248 static void atmel_release_port(struct uart_port *port)
1250 struct platform_device *pdev = to_platform_device(port->dev);
1251 int size = pdev->resource[0].end - pdev->resource[0].start + 1;
1253 release_mem_region(port->mapbase, size);
1255 if (port->flags & UPF_IOREMAP) {
1256 iounmap(port->membase);
1257 port->membase = NULL;
1262 * Request the memory region(s) being used by 'port'.
1264 static int atmel_request_port(struct uart_port *port)
1266 struct platform_device *pdev = to_platform_device(port->dev);
1267 int size = pdev->resource[0].end - pdev->resource[0].start + 1;
1269 if (!request_mem_region(port->mapbase, size, "atmel_serial"))
1272 if (port->flags & UPF_IOREMAP) {
1273 port->membase = ioremap(port->mapbase, size);
1274 if (port->membase == NULL) {
1275 release_mem_region(port->mapbase, size);
1284 * Configure/autoconfigure the port.
1286 static void atmel_config_port(struct uart_port *port, int flags)
1288 if (flags & UART_CONFIG_TYPE) {
1289 port->type = PORT_ATMEL;
1290 atmel_request_port(port);
1295 * Verify the new serial_struct (for TIOCSSERIAL).
1297 static int atmel_verify_port(struct uart_port *port, struct serial_struct *ser)
1300 if (ser->type != PORT_UNKNOWN && ser->type != PORT_ATMEL)
1302 if (port->irq != ser->irq)
1304 if (ser->io_type != SERIAL_IO_MEM)
1306 if (port->uartclk / 16 != ser->baud_base)
1308 if ((void *)port->mapbase != ser->iomem_base)
1310 if (port->iobase != ser->port)
1317 #ifdef CONFIG_CONSOLE_POLL
1318 static int atmel_poll_get_char(struct uart_port *port)
1320 while (!(UART_GET_CSR(port) & ATMEL_US_RXRDY))
1323 return UART_GET_CHAR(port);
1326 static void atmel_poll_put_char(struct uart_port *port, unsigned char ch)
1328 while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY))
1331 UART_PUT_CHAR(port, ch);
1336 atmel_ioctl(struct uart_port *port, unsigned int cmd, unsigned long arg)
1338 struct serial_rs485 rs485conf;
1342 if (copy_from_user(&rs485conf, (struct serial_rs485 *) arg,
1346 atmel_config_rs485(port, &rs485conf);
1350 if (copy_to_user((struct serial_rs485 *) arg,
1351 &(to_atmel_uart_port(port)->rs485),
1357 return -ENOIOCTLCMD;
1364 static struct uart_ops atmel_pops = {
1365 .tx_empty = atmel_tx_empty,
1366 .set_mctrl = atmel_set_mctrl,
1367 .get_mctrl = atmel_get_mctrl,
1368 .stop_tx = atmel_stop_tx,
1369 .start_tx = atmel_start_tx,
1370 .stop_rx = atmel_stop_rx,
1371 .enable_ms = atmel_enable_ms,
1372 .break_ctl = atmel_break_ctl,
1373 .startup = atmel_startup,
1374 .shutdown = atmel_shutdown,
1375 .flush_buffer = atmel_flush_buffer,
1376 .set_termios = atmel_set_termios,
1378 .release_port = atmel_release_port,
1379 .request_port = atmel_request_port,
1380 .config_port = atmel_config_port,
1381 .verify_port = atmel_verify_port,
1382 .pm = atmel_serial_pm,
1383 .ioctl = atmel_ioctl,
1384 #ifdef CONFIG_CONSOLE_POLL
1385 .poll_get_char = atmel_poll_get_char,
1386 .poll_put_char = atmel_poll_put_char,
1391 * Configure the port from the platform device resource info.
1393 static void __devinit atmel_init_port(struct atmel_uart_port *atmel_port,
1394 struct platform_device *pdev)
1396 struct uart_port *port = &atmel_port->uart;
1397 struct atmel_uart_data *data = pdev->dev.platform_data;
1399 port->iotype = UPIO_MEM;
1400 port->flags = UPF_BOOT_AUTOCONF;
1401 port->ops = &atmel_pops;
1403 port->line = pdev->id;
1404 port->dev = &pdev->dev;
1405 port->mapbase = pdev->resource[0].start;
1406 port->irq = pdev->resource[1].start;
1408 tasklet_init(&atmel_port->tasklet, atmel_tasklet_func,
1409 (unsigned long)port);
1411 memset(&atmel_port->rx_ring, 0, sizeof(atmel_port->rx_ring));
1414 /* Already mapped by setup code */
1415 port->membase = data->regs;
1417 port->flags |= UPF_IOREMAP;
1418 port->membase = NULL;
1421 /* for console, the clock could already be configured */
1422 if (!atmel_port->clk) {
1423 atmel_port->clk = clk_get(&pdev->dev, "usart");
1424 clk_enable(atmel_port->clk);
1425 port->uartclk = clk_get_rate(atmel_port->clk);
1426 clk_disable(atmel_port->clk);
1427 /* only enable clock when USART is in use */
1430 atmel_port->use_dma_rx = data->use_dma_rx;
1431 atmel_port->use_dma_tx = data->use_dma_tx;
1432 atmel_port->rs485 = data->rs485;
1433 /* Use TXEMPTY for interrupt when rs485 else TXRDY or ENDTX|TXBUFE */
1434 if (atmel_port->rs485.flags & SER_RS485_ENABLED)
1435 atmel_port->tx_done_mask = ATMEL_US_TXEMPTY;
1436 else if (atmel_use_dma_tx(port)) {
1437 port->fifosize = PDC_BUFFER_SIZE;
1438 atmel_port->tx_done_mask = ATMEL_US_ENDTX | ATMEL_US_TXBUFE;
1440 atmel_port->tx_done_mask = ATMEL_US_TXRDY;
1445 * Register board-specific modem-control line handlers.
1447 void __init atmel_register_uart_fns(struct atmel_port_fns *fns)
1450 atmel_pops.enable_ms = fns->enable_ms;
1452 atmel_pops.get_mctrl = fns->get_mctrl;
1454 atmel_pops.set_mctrl = fns->set_mctrl;
1455 atmel_open_hook = fns->open;
1456 atmel_close_hook = fns->close;
1457 atmel_pops.pm = fns->pm;
1458 atmel_pops.set_wake = fns->set_wake;
1461 #ifdef CONFIG_SERIAL_ATMEL_CONSOLE
1462 static void atmel_console_putchar(struct uart_port *port, int ch)
1464 while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY))
1466 UART_PUT_CHAR(port, ch);
1470 * Interrupts are disabled on entering
1472 static void atmel_console_write(struct console *co, const char *s, u_int count)
1474 struct uart_port *port = &atmel_ports[co->index].uart;
1475 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1476 unsigned int status, imr;
1477 unsigned int pdc_tx;
1480 * First, save IMR and then disable interrupts
1482 imr = UART_GET_IMR(port);
1483 UART_PUT_IDR(port, ATMEL_US_RXRDY | atmel_port->tx_done_mask);
1485 /* Store PDC transmit status and disable it */
1486 pdc_tx = UART_GET_PTSR(port) & ATMEL_PDC_TXTEN;
1487 UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
1489 uart_console_write(port, s, count, atmel_console_putchar);
1492 * Finally, wait for transmitter to become empty
1496 status = UART_GET_CSR(port);
1497 } while (!(status & ATMEL_US_TXRDY));
1499 /* Restore PDC transmit status */
1501 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
1503 /* set interrupts back the way they were */
1504 UART_PUT_IER(port, imr);
1508 * If the port was already initialised (eg, by a boot loader),
1509 * try to determine the current setup.
1511 static void __init atmel_console_get_options(struct uart_port *port, int *baud,
1512 int *parity, int *bits)
1514 unsigned int mr, quot;
1517 * If the baud rate generator isn't running, the port wasn't
1518 * initialized by the boot loader.
1520 quot = UART_GET_BRGR(port) & ATMEL_US_CD;
1524 mr = UART_GET_MR(port) & ATMEL_US_CHRL;
1525 if (mr == ATMEL_US_CHRL_8)
1530 mr = UART_GET_MR(port) & ATMEL_US_PAR;
1531 if (mr == ATMEL_US_PAR_EVEN)
1533 else if (mr == ATMEL_US_PAR_ODD)
1537 * The serial core only rounds down when matching this to a
1538 * supported baud rate. Make sure we don't end up slightly
1539 * lower than one of those, as it would make us fall through
1540 * to a much lower baud rate than we really want.
1542 *baud = port->uartclk / (16 * (quot - 1));
1545 static int __init atmel_console_setup(struct console *co, char *options)
1547 struct uart_port *port = &atmel_ports[co->index].uart;
1553 if (port->membase == NULL) {
1554 /* Port not initialized yet - delay setup */
1558 clk_enable(atmel_ports[co->index].clk);
1560 UART_PUT_IDR(port, -1);
1561 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
1562 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
1565 uart_parse_options(options, &baud, &parity, &bits, &flow);
1567 atmel_console_get_options(port, &baud, &parity, &bits);
1569 return uart_set_options(port, co, baud, parity, bits, flow);
1572 static struct uart_driver atmel_uart;
1574 static struct console atmel_console = {
1575 .name = ATMEL_DEVICENAME,
1576 .write = atmel_console_write,
1577 .device = uart_console_device,
1578 .setup = atmel_console_setup,
1579 .flags = CON_PRINTBUFFER,
1581 .data = &atmel_uart,
1584 #define ATMEL_CONSOLE_DEVICE (&atmel_console)
1587 * Early console initialization (before VM subsystem initialized).
1589 static int __init atmel_console_init(void)
1591 if (atmel_default_console_device) {
1592 add_preferred_console(ATMEL_DEVICENAME,
1593 atmel_default_console_device->id, NULL);
1594 atmel_init_port(&atmel_ports[atmel_default_console_device->id],
1595 atmel_default_console_device);
1596 register_console(&atmel_console);
1602 console_initcall(atmel_console_init);
1605 * Late console initialization.
1607 static int __init atmel_late_console_init(void)
1609 if (atmel_default_console_device
1610 && !(atmel_console.flags & CON_ENABLED))
1611 register_console(&atmel_console);
1616 core_initcall(atmel_late_console_init);
1618 static inline bool atmel_is_console_port(struct uart_port *port)
1620 return port->cons && port->cons->index == port->line;
1624 #define ATMEL_CONSOLE_DEVICE NULL
1626 static inline bool atmel_is_console_port(struct uart_port *port)
1632 static struct uart_driver atmel_uart = {
1633 .owner = THIS_MODULE,
1634 .driver_name = "atmel_serial",
1635 .dev_name = ATMEL_DEVICENAME,
1636 .major = SERIAL_ATMEL_MAJOR,
1637 .minor = MINOR_START,
1638 .nr = ATMEL_MAX_UART,
1639 .cons = ATMEL_CONSOLE_DEVICE,
1643 static bool atmel_serial_clk_will_stop(void)
1645 #ifdef CONFIG_ARCH_AT91
1646 return at91_suspend_entering_slow_clock();
1652 static int atmel_serial_suspend(struct platform_device *pdev,
1655 struct uart_port *port = platform_get_drvdata(pdev);
1656 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1658 if (atmel_is_console_port(port) && console_suspend_enabled) {
1659 /* Drain the TX shifter */
1660 while (!(UART_GET_CSR(port) & ATMEL_US_TXEMPTY))
1664 /* we can not wake up if we're running on slow clock */
1665 atmel_port->may_wakeup = device_may_wakeup(&pdev->dev);
1666 if (atmel_serial_clk_will_stop())
1667 device_set_wakeup_enable(&pdev->dev, 0);
1669 uart_suspend_port(&atmel_uart, port);
1674 static int atmel_serial_resume(struct platform_device *pdev)
1676 struct uart_port *port = platform_get_drvdata(pdev);
1677 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1679 uart_resume_port(&atmel_uart, port);
1680 device_set_wakeup_enable(&pdev->dev, atmel_port->may_wakeup);
1685 #define atmel_serial_suspend NULL
1686 #define atmel_serial_resume NULL
1689 static int __devinit atmel_serial_probe(struct platform_device *pdev)
1691 struct atmel_uart_port *port;
1695 BUILD_BUG_ON(ATMEL_SERIAL_RINGSIZE & (ATMEL_SERIAL_RINGSIZE - 1));
1697 port = &atmel_ports[pdev->id];
1698 port->backup_imr = 0;
1700 atmel_init_port(port, pdev);
1702 if (!atmel_use_dma_rx(&port->uart)) {
1704 data = kmalloc(sizeof(struct atmel_uart_char)
1705 * ATMEL_SERIAL_RINGSIZE, GFP_KERNEL);
1707 goto err_alloc_ring;
1708 port->rx_ring.buf = data;
1711 ret = uart_add_one_port(&atmel_uart, &port->uart);
1715 #ifdef CONFIG_SERIAL_ATMEL_CONSOLE
1716 if (atmel_is_console_port(&port->uart)
1717 && ATMEL_CONSOLE_DEVICE->flags & CON_ENABLED) {
1719 * The serial core enabled the clock for us, so undo
1720 * the clk_enable() in atmel_console_setup()
1722 clk_disable(port->clk);
1726 device_init_wakeup(&pdev->dev, 1);
1727 platform_set_drvdata(pdev, port);
1732 kfree(port->rx_ring.buf);
1733 port->rx_ring.buf = NULL;
1735 if (!atmel_is_console_port(&port->uart)) {
1743 static int __devexit atmel_serial_remove(struct platform_device *pdev)
1745 struct uart_port *port = platform_get_drvdata(pdev);
1746 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1749 device_init_wakeup(&pdev->dev, 0);
1750 platform_set_drvdata(pdev, NULL);
1752 ret = uart_remove_one_port(&atmel_uart, port);
1754 tasklet_kill(&atmel_port->tasklet);
1755 kfree(atmel_port->rx_ring.buf);
1757 /* "port" is allocated statically, so we shouldn't free it */
1759 clk_put(atmel_port->clk);
1764 static struct platform_driver atmel_serial_driver = {
1765 .probe = atmel_serial_probe,
1766 .remove = __devexit_p(atmel_serial_remove),
1767 .suspend = atmel_serial_suspend,
1768 .resume = atmel_serial_resume,
1770 .name = "atmel_usart",
1771 .owner = THIS_MODULE,
1775 static int __init atmel_serial_init(void)
1779 ret = uart_register_driver(&atmel_uart);
1783 ret = platform_driver_register(&atmel_serial_driver);
1785 uart_unregister_driver(&atmel_uart);
1790 static void __exit atmel_serial_exit(void)
1792 platform_driver_unregister(&atmel_serial_driver);
1793 uart_unregister_driver(&atmel_uart);
1796 module_init(atmel_serial_init);
1797 module_exit(atmel_serial_exit);
1799 MODULE_AUTHOR("Rick Bronson");
1800 MODULE_DESCRIPTION("Atmel AT91 / AT32 serial port driver");
1801 MODULE_LICENSE("GPL");
1802 MODULE_ALIAS("platform:atmel_usart");