2 * linux/drivers/serial/21285.c
4 * Driver for the serial port on the 21285 StrongArm-110 core logic chip.
6 * Based on drivers/char/serial.c
8 #include <linux/module.h>
10 #include <linux/ioport.h>
11 #include <linux/init.h>
12 #include <linux/console.h>
13 #include <linux/device.h>
14 #include <linux/tty_flip.h>
15 #include <linux/serial_core.h>
16 #include <linux/serial.h>
20 #include <asm/mach-types.h>
21 #include <asm/hardware/dec21285.h>
22 #include <mach/hardware.h>
24 #define BAUD_BASE (mem_fclk_21285/64)
26 #define SERIAL_21285_NAME "ttyFB"
27 #define SERIAL_21285_MAJOR 204
28 #define SERIAL_21285_MINOR 4
30 #define RXSTAT_DUMMY_READ 0x80000000
31 #define RXSTAT_FRAME (1 << 0)
32 #define RXSTAT_PARITY (1 << 1)
33 #define RXSTAT_OVERRUN (1 << 2)
34 #define RXSTAT_ANYERR (RXSTAT_FRAME|RXSTAT_PARITY|RXSTAT_OVERRUN)
36 #define H_UBRLCR_BREAK (1 << 0)
37 #define H_UBRLCR_PARENB (1 << 1)
38 #define H_UBRLCR_PAREVN (1 << 2)
39 #define H_UBRLCR_STOPB (1 << 3)
40 #define H_UBRLCR_FIFO (1 << 4)
42 static const char serial21285_name[] = "Footbridge UART";
44 #define tx_enabled(port) ((port)->unused[0])
45 #define rx_enabled(port) ((port)->unused[1])
48 * The documented expression for selecting the divisor is:
49 * BAUD_BASE / baud - 1
50 * However, typically BAUD_BASE is not divisible by baud, so
51 * we want to select the divisor that gives us the minimum
52 * error. Therefore, we want:
53 * int(BAUD_BASE / baud - 0.5) ->
54 * int(BAUD_BASE / baud - (baud >> 1) / baud) ->
55 * int((BAUD_BASE - (baud >> 1)) / baud)
58 static void serial21285_stop_tx(struct uart_port *port)
60 if (tx_enabled(port)) {
61 disable_irq_nosync(IRQ_CONTX);
66 static void serial21285_start_tx(struct uart_port *port)
68 if (!tx_enabled(port)) {
69 enable_irq(IRQ_CONTX);
74 static void serial21285_stop_rx(struct uart_port *port)
76 if (rx_enabled(port)) {
77 disable_irq_nosync(IRQ_CONRX);
82 static void serial21285_enable_ms(struct uart_port *port)
86 static irqreturn_t serial21285_rx_chars(int irq, void *dev_id)
88 struct uart_port *port = dev_id;
89 struct tty_struct *tty = port->state->port.tty;
90 unsigned int status, ch, flag, rxs, max_count = 256;
92 status = *CSR_UARTFLG;
93 while (!(status & 0x10) && max_count--) {
98 rxs = *CSR_RXSTAT | RXSTAT_DUMMY_READ;
99 if (unlikely(rxs & RXSTAT_ANYERR)) {
100 if (rxs & RXSTAT_PARITY)
101 port->icount.parity++;
102 else if (rxs & RXSTAT_FRAME)
103 port->icount.frame++;
104 if (rxs & RXSTAT_OVERRUN)
105 port->icount.overrun++;
107 rxs &= port->read_status_mask;
109 if (rxs & RXSTAT_PARITY)
111 else if (rxs & RXSTAT_FRAME)
115 uart_insert_char(port, rxs, RXSTAT_OVERRUN, ch, flag);
117 status = *CSR_UARTFLG;
119 tty_flip_buffer_push(tty);
124 static irqreturn_t serial21285_tx_chars(int irq, void *dev_id)
126 struct uart_port *port = dev_id;
127 struct circ_buf *xmit = &port->state->xmit;
131 *CSR_UARTDR = port->x_char;
136 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
137 serial21285_stop_tx(port);
142 *CSR_UARTDR = xmit->buf[xmit->tail];
143 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
145 if (uart_circ_empty(xmit))
147 } while (--count > 0 && !(*CSR_UARTFLG & 0x20));
149 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
150 uart_write_wakeup(port);
152 if (uart_circ_empty(xmit))
153 serial21285_stop_tx(port);
159 static unsigned int serial21285_tx_empty(struct uart_port *port)
161 return (*CSR_UARTFLG & 8) ? 0 : TIOCSER_TEMT;
164 /* no modem control lines */
165 static unsigned int serial21285_get_mctrl(struct uart_port *port)
167 return TIOCM_CAR | TIOCM_DSR | TIOCM_CTS;
170 static void serial21285_set_mctrl(struct uart_port *port, unsigned int mctrl)
174 static void serial21285_break_ctl(struct uart_port *port, int break_state)
179 spin_lock_irqsave(&port->lock, flags);
180 h_lcr = *CSR_H_UBRLCR;
182 h_lcr |= H_UBRLCR_BREAK;
184 h_lcr &= ~H_UBRLCR_BREAK;
185 *CSR_H_UBRLCR = h_lcr;
186 spin_unlock_irqrestore(&port->lock, flags);
189 static int serial21285_startup(struct uart_port *port)
193 tx_enabled(port) = 1;
194 rx_enabled(port) = 1;
196 ret = request_irq(IRQ_CONRX, serial21285_rx_chars, 0,
197 serial21285_name, port);
199 ret = request_irq(IRQ_CONTX, serial21285_tx_chars, 0,
200 serial21285_name, port);
202 free_irq(IRQ_CONRX, port);
208 static void serial21285_shutdown(struct uart_port *port)
210 free_irq(IRQ_CONTX, port);
211 free_irq(IRQ_CONRX, port);
215 serial21285_set_termios(struct uart_port *port, struct ktermios *termios,
216 struct ktermios *old)
219 unsigned int baud, quot, h_lcr;
222 * We don't support modem control lines.
224 termios->c_cflag &= ~(HUPCL | CRTSCTS | CMSPAR);
225 termios->c_cflag |= CLOCAL;
228 * We don't support BREAK character recognition.
230 termios->c_iflag &= ~(IGNBRK | BRKINT);
233 * Ask the core to calculate the divisor for us.
235 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
236 quot = uart_get_divisor(port, baud);
238 if (port->state && port->state->port.tty) {
239 struct tty_struct *tty = port->state->port.tty;
240 unsigned int b = port->uartclk / (16 * quot);
241 tty_encode_baud_rate(tty, b, b);
244 switch (termios->c_cflag & CSIZE) {
259 if (termios->c_cflag & CSTOPB)
260 h_lcr |= H_UBRLCR_STOPB;
261 if (termios->c_cflag & PARENB) {
262 h_lcr |= H_UBRLCR_PARENB;
263 if (!(termios->c_cflag & PARODD))
264 h_lcr |= H_UBRLCR_PAREVN;
268 h_lcr |= H_UBRLCR_FIFO;
270 spin_lock_irqsave(&port->lock, flags);
273 * Update the per-port timeout.
275 uart_update_timeout(port, termios->c_cflag, baud);
278 * Which character status flags are we interested in?
280 port->read_status_mask = RXSTAT_OVERRUN;
281 if (termios->c_iflag & INPCK)
282 port->read_status_mask |= RXSTAT_FRAME | RXSTAT_PARITY;
285 * Which character status flags should we ignore?
287 port->ignore_status_mask = 0;
288 if (termios->c_iflag & IGNPAR)
289 port->ignore_status_mask |= RXSTAT_FRAME | RXSTAT_PARITY;
290 if (termios->c_iflag & IGNBRK && termios->c_iflag & IGNPAR)
291 port->ignore_status_mask |= RXSTAT_OVERRUN;
294 * Ignore all characters if CREAD is not set.
296 if ((termios->c_cflag & CREAD) == 0)
297 port->ignore_status_mask |= RXSTAT_DUMMY_READ;
302 *CSR_L_UBRLCR = quot & 0xff;
303 *CSR_M_UBRLCR = (quot >> 8) & 0x0f;
304 *CSR_H_UBRLCR = h_lcr;
307 spin_unlock_irqrestore(&port->lock, flags);
310 static const char *serial21285_type(struct uart_port *port)
312 return port->type == PORT_21285 ? "DC21285" : NULL;
315 static void serial21285_release_port(struct uart_port *port)
317 release_mem_region(port->mapbase, 32);
320 static int serial21285_request_port(struct uart_port *port)
322 return request_mem_region(port->mapbase, 32, serial21285_name)
323 != NULL ? 0 : -EBUSY;
326 static void serial21285_config_port(struct uart_port *port, int flags)
328 if (flags & UART_CONFIG_TYPE && serial21285_request_port(port) == 0)
329 port->type = PORT_21285;
333 * verify the new serial_struct (for TIOCSSERIAL).
335 static int serial21285_verify_port(struct uart_port *port, struct serial_struct *ser)
338 if (ser->type != PORT_UNKNOWN && ser->type != PORT_21285)
340 if (ser->irq != NO_IRQ)
342 if (ser->baud_base != port->uartclk / 16)
347 static struct uart_ops serial21285_ops = {
348 .tx_empty = serial21285_tx_empty,
349 .get_mctrl = serial21285_get_mctrl,
350 .set_mctrl = serial21285_set_mctrl,
351 .stop_tx = serial21285_stop_tx,
352 .start_tx = serial21285_start_tx,
353 .stop_rx = serial21285_stop_rx,
354 .enable_ms = serial21285_enable_ms,
355 .break_ctl = serial21285_break_ctl,
356 .startup = serial21285_startup,
357 .shutdown = serial21285_shutdown,
358 .set_termios = serial21285_set_termios,
359 .type = serial21285_type,
360 .release_port = serial21285_release_port,
361 .request_port = serial21285_request_port,
362 .config_port = serial21285_config_port,
363 .verify_port = serial21285_verify_port,
366 static struct uart_port serial21285_port = {
367 .mapbase = 0x42000160,
371 .ops = &serial21285_ops,
372 .flags = UPF_BOOT_AUTOCONF,
375 static void serial21285_setup_ports(void)
377 serial21285_port.uartclk = mem_fclk_21285 / 4;
380 #ifdef CONFIG_SERIAL_21285_CONSOLE
381 static void serial21285_console_putchar(struct uart_port *port, int ch)
383 while (*CSR_UARTFLG & 0x20)
389 serial21285_console_write(struct console *co, const char *s,
392 uart_console_write(&serial21285_port, s, count, serial21285_console_putchar);
396 serial21285_get_options(struct uart_port *port, int *baud,
397 int *parity, int *bits)
399 if (*CSR_UARTCON == 1) {
403 switch (tmp & 0x60) {
419 if (tmp & H_UBRLCR_PARENB) {
421 if (tmp & H_UBRLCR_PAREVN)
425 tmp = *CSR_L_UBRLCR | (*CSR_M_UBRLCR << 8);
427 *baud = port->uartclk / (16 * (tmp + 1));
431 static int __init serial21285_console_setup(struct console *co, char *options)
433 struct uart_port *port = &serial21285_port;
439 if (machine_is_personal_server())
443 * Check whether an invalid uart number has been specified, and
444 * if so, search for the first available port that does have
448 uart_parse_options(options, &baud, &parity, &bits, &flow);
450 serial21285_get_options(port, &baud, &parity, &bits);
452 return uart_set_options(port, co, baud, parity, bits, flow);
455 static struct uart_driver serial21285_reg;
457 static struct console serial21285_console =
459 .name = SERIAL_21285_NAME,
460 .write = serial21285_console_write,
461 .device = uart_console_device,
462 .setup = serial21285_console_setup,
463 .flags = CON_PRINTBUFFER,
465 .data = &serial21285_reg,
468 static int __init rs285_console_init(void)
470 serial21285_setup_ports();
471 register_console(&serial21285_console);
474 console_initcall(rs285_console_init);
476 #define SERIAL_21285_CONSOLE &serial21285_console
478 #define SERIAL_21285_CONSOLE NULL
481 static struct uart_driver serial21285_reg = {
482 .owner = THIS_MODULE,
483 .driver_name = "ttyFB",
485 .major = SERIAL_21285_MAJOR,
486 .minor = SERIAL_21285_MINOR,
488 .cons = SERIAL_21285_CONSOLE,
491 static int __init serial21285_init(void)
495 printk(KERN_INFO "Serial: 21285 driver\n");
497 serial21285_setup_ports();
499 ret = uart_register_driver(&serial21285_reg);
501 uart_add_one_port(&serial21285_reg, &serial21285_port);
506 static void __exit serial21285_exit(void)
508 uart_remove_one_port(&serial21285_reg, &serial21285_port);
509 uart_unregister_driver(&serial21285_reg);
512 module_init(serial21285_init);
513 module_exit(serial21285_exit);
515 MODULE_LICENSE("GPL");
516 MODULE_DESCRIPTION("Intel Footbridge (21285) serial driver");
517 MODULE_ALIAS_CHARDEV(SERIAL_21285_MAJOR, SERIAL_21285_MINOR);