drivers/scsi/stex.c

   1 /*
   2  * SuperTrak EX Series Storage Controller driver for Linux
   3  *
   4  *      Copyright (C) 2005, 2006 Promise Technology Inc.
   5  *
   6  *      This program is free software; you can redistribute it and/or
   7  *      modify it under the terms of the GNU General Public License
   8  *      as published by the Free Software Foundation; either version
   9  *      2 of the License, or (at your option) any later version.
  10  *
  11  *      Written By:
  12  *              Ed Lin <promise_linux@promise.com>
  13  *
  14  */
  15
  16 #include <linux/init.h>
  17 #include <linux/errno.h>
  18 #include <linux/kernel.h>
  19 #include <linux/delay.h>
  20 #include <linux/time.h>
  21 #include <linux/pci.h>
  22 #include <linux/blkdev.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/types.h>
  25 #include <linux/module.h>
  26 #include <linux/spinlock.h>
  27 #include <asm/io.h>
  28 #include <asm/irq.h>
  29 #include <asm/byteorder.h>
  30 #include <scsi/scsi.h>
  31 #include <scsi/scsi_device.h>
  32 #include <scsi/scsi_cmnd.h>
  33 #include <scsi/scsi_host.h>
  34 #include <scsi/scsi_tcq.h>
  35 #include <scsi/scsi_dbg.h>
  36
  37 #define DRV_NAME "stex"
  38 #define ST_DRIVER_VERSION "3.6.0000.1"
  39 #define ST_VER_MAJOR            3
  40 #define ST_VER_MINOR            6
  41 #define ST_OEM                  0
  42 #define ST_BUILD_VER            1
  43
  44 enum {
  45         /* MU register offset */
  46         IMR0    = 0x10, /* MU_INBOUND_MESSAGE_REG0 */
  47         IMR1    = 0x14, /* MU_INBOUND_MESSAGE_REG1 */
  48         OMR0    = 0x18, /* MU_OUTBOUND_MESSAGE_REG0 */
  49         OMR1    = 0x1c, /* MU_OUTBOUND_MESSAGE_REG1 */
  50         IDBL    = 0x20, /* MU_INBOUND_DOORBELL */
  51         IIS     = 0x24, /* MU_INBOUND_INTERRUPT_STATUS */
  52         IIM     = 0x28, /* MU_INBOUND_INTERRUPT_MASK */
  53         ODBL    = 0x2c, /* MU_OUTBOUND_DOORBELL */
  54         OIS     = 0x30, /* MU_OUTBOUND_INTERRUPT_STATUS */
  55         OIM     = 0x3c, /* MU_OUTBOUND_INTERRUPT_MASK */
  56
  57         /* MU register value */
  58         MU_INBOUND_DOORBELL_HANDSHAKE           = 1,
  59         MU_INBOUND_DOORBELL_REQHEADCHANGED      = 2,
  60         MU_INBOUND_DOORBELL_STATUSTAILCHANGED   = 4,
  61         MU_INBOUND_DOORBELL_HMUSTOPPED          = 8,
  62         MU_INBOUND_DOORBELL_RESET               = 16,
  63
  64         MU_OUTBOUND_DOORBELL_HANDSHAKE          = 1,
  65         MU_OUTBOUND_DOORBELL_REQUESTTAILCHANGED = 2,
  66         MU_OUTBOUND_DOORBELL_STATUSHEADCHANGED  = 4,
  67         MU_OUTBOUND_DOORBELL_BUSCHANGE          = 8,
  68         MU_OUTBOUND_DOORBELL_HASEVENT           = 16,
  69
  70         /* MU status code */
  71         MU_STATE_STARTING                       = 1,
  72         MU_STATE_FMU_READY_FOR_HANDSHAKE        = 2,
  73         MU_STATE_SEND_HANDSHAKE_FRAME           = 3,
  74         MU_STATE_STARTED                        = 4,
  75         MU_STATE_RESETTING                      = 5,
  76
  77         MU_MAX_DELAY                            = 120,
  78         MU_HANDSHAKE_SIGNATURE                  = 0x55aaaa55,
  79         MU_HANDSHAKE_SIGNATURE_HALF             = 0x5a5a0000,
  80         MU_HARD_RESET_WAIT                      = 30000,
  81         HMU_PARTNER_TYPE                        = 2,
  82
  83         /* firmware returned values */
  84         SRB_STATUS_SUCCESS                      = 0x01,
  85         SRB_STATUS_ERROR                        = 0x04,
  86         SRB_STATUS_BUSY                         = 0x05,
  87         SRB_STATUS_INVALID_REQUEST              = 0x06,
  88         SRB_STATUS_SELECTION_TIMEOUT            = 0x0A,
  89         SRB_SEE_SENSE                           = 0x80,
  90
  91         /* task attribute */
  92         TASK_ATTRIBUTE_SIMPLE                   = 0x0,
  93         TASK_ATTRIBUTE_HEADOFQUEUE              = 0x1,
  94         TASK_ATTRIBUTE_ORDERED                  = 0x2,
  95         TASK_ATTRIBUTE_ACA                      = 0x4,
  96
  97         /* request count, etc. */
  98         MU_MAX_REQUEST                          = 32,
  99
 100         /* one message wasted, use MU_MAX_REQUEST+1
 101                 to handle MU_MAX_REQUEST messages */
 102         MU_REQ_COUNT                            = (MU_MAX_REQUEST + 1),
 103         MU_STATUS_COUNT                         = (MU_MAX_REQUEST + 1),
 104
 105         STEX_CDB_LENGTH                         = MAX_COMMAND_SIZE,
 106         REQ_VARIABLE_LEN                        = 1024,
 107         STATUS_VAR_LEN                          = 128,
 108         ST_CAN_QUEUE                            = MU_MAX_REQUEST,
 109         ST_CMD_PER_LUN                          = MU_MAX_REQUEST,
 110         ST_MAX_SG                               = 32,
 111
 112         /* sg flags */
 113         SG_CF_EOT                               = 0x80, /* end of table */
 114         SG_CF_64B                               = 0x40, /* 64 bit item */
 115         SG_CF_HOST                              = 0x20, /* sg in host memory */
 116
 117         st_shasta                               = 0,
 118         st_vsc                                  = 1,
 119         st_vsc1                                 = 2,
 120         st_yosemite                             = 3,
 121
 122         PASSTHRU_REQ_TYPE                       = 0x00000001,
 123         PASSTHRU_REQ_NO_WAKEUP                  = 0x00000100,
 124         ST_INTERNAL_TIMEOUT                     = 30,
 125
 126         ST_TO_CMD                               = 0,
 127         ST_FROM_CMD                             = 1,
 128
 129         /* vendor specific commands of Promise */
 130         MGT_CMD                                 = 0xd8,
 131         SINBAND_MGT_CMD                         = 0xd9,
 132         ARRAY_CMD                               = 0xe0,
 133         CONTROLLER_CMD                          = 0xe1,
 134         DEBUGGING_CMD                           = 0xe2,
 135         PASSTHRU_CMD                            = 0xe3,
 136
 137         PASSTHRU_GET_ADAPTER                    = 0x05,
 138         PASSTHRU_GET_DRVVER                     = 0x10,
 139
 140         CTLR_CONFIG_CMD                         = 0x03,
 141         CTLR_SHUTDOWN                           = 0x0d,
 142
 143         CTLR_POWER_STATE_CHANGE                 = 0x0e,
 144         CTLR_POWER_SAVING                       = 0x01,
 145
 146         PASSTHRU_SIGNATURE                      = 0x4e415041,
 147         MGT_CMD_SIGNATURE                       = 0xba,
 148
 149         INQUIRY_EVPD                            = 0x01,
 150
 151         ST_ADDITIONAL_MEM                       = 0x200000,
 152 };
 153
 154 /* SCSI inquiry data */
 155 typedef struct st_inq {
 156         u8 DeviceType                   :5;
 157         u8 DeviceTypeQualifier          :3;
 158         u8 DeviceTypeModifier           :7;
 159         u8 RemovableMedia               :1;
 160         u8 Versions;
 161         u8 ResponseDataFormat           :4;
 162         u8 HiSupport                    :1;
 163         u8 NormACA                      :1;
 164         u8 ReservedBit                  :1;
 165         u8 AERC                         :1;
 166         u8 AdditionalLength;
 167         u8 Reserved[2];
 168         u8 SoftReset                    :1;
 169         u8 CommandQueue                 :1;
 170         u8 Reserved2                    :1;
 171         u8 LinkedCommands               :1;
 172         u8 Synchronous                  :1;
 173         u8 Wide16Bit                    :1;
 174         u8 Wide32Bit                    :1;
 175         u8 RelativeAddressing           :1;
 176         u8 VendorId[8];
 177         u8 ProductId[16];
 178         u8 ProductRevisionLevel[4];
 179         u8 VendorSpecific[20];
 180         u8 Reserved3[40];
 181 } ST_INQ;
 182
 183 struct st_sgitem {
 184         u8 ctrl;        /* SG_CF_xxx */
 185         u8 reserved[3];
 186         __le32 count;
 187         __le32 addr;
 188         __le32 addr_hi;
 189 };
 190
 191 struct st_sgtable {
 192         __le16 sg_count;
 193         __le16 max_sg_count;
 194         __le32 sz_in_byte;
 195         struct st_sgitem table[ST_MAX_SG];
 196 };
 197
 198 struct handshake_frame {
 199         __le32 rb_phy;          /* request payload queue physical address */
 200         __le32 rb_phy_hi;
 201         __le16 req_sz;          /* size of each request payload */
 202         __le16 req_cnt;         /* count of reqs the buffer can hold */
 203         __le16 status_sz;       /* size of each status payload */
 204         __le16 status_cnt;      /* count of status the buffer can hold */
 205         __le32 hosttime;        /* seconds from Jan 1, 1970 (GMT) */
 206         __le32 hosttime_hi;
 207         u8 partner_type;        /* who sends this frame */
 208         u8 reserved0[7];
 209         __le32 partner_ver_major;
 210         __le32 partner_ver_minor;
 211         __le32 partner_ver_oem;
 212         __le32 partner_ver_build;
 213         __le32 extra_offset;    /* NEW */
 214         __le32 extra_size;      /* NEW */
 215         u32 reserved1[2];
 216 };
 217
 218 struct req_msg {
 219         __le16 tag;
 220         u8 lun;
 221         u8 target;
 222         u8 task_attr;
 223         u8 task_manage;
 224         u8 prd_entry;
 225         u8 payload_sz;          /* payload size in 4-byte, not used */
 226         u8 cdb[STEX_CDB_LENGTH];
 227         u8 variable[REQ_VARIABLE_LEN];
 228 };
 229
 230 struct status_msg {
 231         __le16 tag;
 232         u8 lun;
 233         u8 target;
 234         u8 srb_status;
 235         u8 scsi_status;
 236         u8 reserved;
 237         u8 payload_sz;          /* payload size in 4-byte */
 238         u8 variable[STATUS_VAR_LEN];
 239 };
 240
 241 struct ver_info {
 242         u32 major;
 243         u32 minor;
 244         u32 oem;
 245         u32 build;
 246         u32 reserved[2];
 247 };
 248
 249 struct st_frame {
 250         u32 base[6];
 251         u32 rom_addr;
 252
 253         struct ver_info drv_ver;
 254         struct ver_info bios_ver;
 255
 256         u32 bus;
 257         u32 slot;
 258         u32 irq_level;
 259         u32 irq_vec;
 260         u32 id;
 261         u32 subid;
 262
 263         u32 dimm_size;
 264         u8 dimm_type;
 265         u8 reserved[3];
 266
 267         u32 channel;
 268         u32 reserved1;
 269 };
 270
 271 struct st_drvver {
 272         u32 major;
 273         u32 minor;
 274         u32 oem;
 275         u32 build;
 276         u32 signature[2];
 277         u8 console_id;
 278         u8 host_no;
 279         u8 reserved0[2];
 280         u32 reserved[3];
 281 };
 282
 283 #define MU_REQ_BUFFER_SIZE      (MU_REQ_COUNT * sizeof(struct req_msg))
 284 #define MU_STATUS_BUFFER_SIZE   (MU_STATUS_COUNT * sizeof(struct status_msg))
 285 #define MU_BUFFER_SIZE          (MU_REQ_BUFFER_SIZE + MU_STATUS_BUFFER_SIZE)
 286 #define STEX_EXTRA_SIZE         max(sizeof(struct st_frame), sizeof(ST_INQ))
 287 #define STEX_BUFFER_SIZE        (MU_BUFFER_SIZE + STEX_EXTRA_SIZE)
 288
 289 struct st_ccb {
 290         struct req_msg *req;
 291         struct scsi_cmnd *cmd;
 292
 293         void *sense_buffer;
 294         unsigned int sense_bufflen;
 295         int sg_count;
 296
 297         u32 req_type;
 298         u8 srb_status;
 299         u8 scsi_status;
 300 };
 301
 302 struct st_hba {
 303         void __iomem *mmio_base;        /* iomapped PCI memory space */
 304         void *dma_mem;
 305         dma_addr_t dma_handle;
 306         size_t dma_size;
 307
 308         struct Scsi_Host *host;
 309         struct pci_dev *pdev;
 310
 311         u32 req_head;
 312         u32 req_tail;
 313         u32 status_head;
 314         u32 status_tail;
 315
 316         struct status_msg *status_buffer;
 317         void *copy_buffer; /* temp buffer for driver-handled commands */
 318         struct st_ccb ccb[MU_MAX_REQUEST];
 319         struct st_ccb *wait_ccb;
 320         wait_queue_head_t waitq;
 321
 322         unsigned int mu_status;
 323         int out_req_cnt;
 324
 325         unsigned int cardtype;
 326 };
 327
 328 static const char console_inq_page[] =
 329 {
 330         0x03,0x00,0x03,0x03,0xFA,0x00,0x00,0x30,
 331         0x50,0x72,0x6F,0x6D,0x69,0x73,0x65,0x20,        /* "Promise " */
 332         0x52,0x41,0x49,0x44,0x20,0x43,0x6F,0x6E,        /* "RAID Con" */
 333         0x73,0x6F,0x6C,0x65,0x20,0x20,0x20,0x20,        /* "sole    " */
 334         0x31,0x2E,0x30,0x30,0x20,0x20,0x20,0x20,        /* "1.00    " */
 335         0x53,0x58,0x2F,0x52,0x53,0x41,0x46,0x2D,        /* "SX/RSAF-" */
 336         0x54,0x45,0x31,0x2E,0x30,0x30,0x20,0x20,        /* "TE1.00  " */
 337         0x0C,0x20,0x20,0x20,0x20,0x20,0x20,0x20
 338 };
 339
 340 MODULE_AUTHOR("Ed Lin");
 341 MODULE_DESCRIPTION("Promise Technology SuperTrak EX Controllers");
 342 MODULE_LICENSE("GPL");
 343 MODULE_VERSION(ST_DRIVER_VERSION);
 344
 345 static void stex_gettime(__le32 *time)
 346 {
 347         struct timeval tv;
 348         do_gettimeofday(&tv);
 349
 350         *time = cpu_to_le32(tv.tv_sec & 0xffffffff);
 351         *(time + 1) = cpu_to_le32((tv.tv_sec >> 16) >> 16);
 352 }
 353
 354 static struct status_msg *stex_get_status(struct st_hba *hba)
 355 {
 356         struct status_msg *status =
 357                 hba->status_buffer + hba->status_tail;
 358
 359         ++hba->status_tail;
 360         hba->status_tail %= MU_STATUS_COUNT;
 361
 362         return status;
 363 }
 364
 365 static void stex_set_sense(struct scsi_cmnd *cmd, u8 sk, u8 asc, u8 ascq)
 366 {
 367         cmd->result = (DRIVER_SENSE << 24) | SAM_STAT_CHECK_CONDITION;
 368
 369         cmd->sense_buffer[0] = 0x70;    /* fixed format, current */
 370         cmd->sense_buffer[2] = sk;
 371         cmd->sense_buffer[7] = 18 - 8;  /* additional sense length */
 372         cmd->sense_buffer[12] = asc;
 373         cmd->sense_buffer[13] = ascq;
 374 }
 375
 376 static void stex_invalid_field(struct scsi_cmnd *cmd,
 377                                void (*done)(struct scsi_cmnd *))
 378 {
 379         /* "Invalid field in cbd" */
 380         stex_set_sense(cmd, ILLEGAL_REQUEST, 0x24, 0x0);
 381         done(cmd);
 382 }
 383
 384 static struct req_msg *stex_alloc_req(struct st_hba *hba)
 385 {
 386         struct req_msg *req = ((struct req_msg *)hba->dma_mem) +
 387                 hba->req_head;
 388
 389         ++hba->req_head;
 390         hba->req_head %= MU_REQ_COUNT;
 391
 392         return req;
 393 }
 394
 395 static int stex_map_sg(struct st_hba *hba,
 396         struct req_msg *req, struct st_ccb *ccb)
 397 {
 398         struct scsi_cmnd *cmd;
 399         struct scatterlist *sg;
 400         struct st_sgtable *dst;
 401         int i, nseg;
 402
 403         cmd = ccb->cmd;
 404         dst = (struct st_sgtable *)req->variable;
 405         dst->max_sg_count = cpu_to_le16(ST_MAX_SG);
 406         dst->sz_in_byte = cpu_to_le32(scsi_bufflen(cmd));
 407
 408         nseg = scsi_dma_map(cmd);
 409         if (nseg < 0)
 410                 return -EIO;
 411         if (nseg) {
 412                 ccb->sg_count = nseg;
 413                 dst->sg_count = cpu_to_le16((u16)nseg);
 414
 415                 scsi_for_each_sg(cmd, sg, nseg, i) {
 416                         dst->table[i].count = cpu_to_le32((u32)sg_dma_len(sg));
 417                         dst->table[i].addr =
 418                                 cpu_to_le32(sg_dma_address(sg) & 0xffffffff);
 419                         dst->table[i].addr_hi =
 420                                 cpu_to_le32((sg_dma_address(sg) >> 16) >> 16);
 421                         dst->table[i].ctrl = SG_CF_64B | SG_CF_HOST;
 422                 }
 423                 dst->table[--i].ctrl |= SG_CF_EOT;
 424         }
 425
 426         return 0;
 427 }
 428
 429 static void stex_controller_info(struct st_hba *hba, struct st_ccb *ccb)
 430 {
 431         struct st_frame *p;
 432         size_t count = sizeof(struct st_frame);
 433
 434         p = hba->copy_buffer;
 435         count = scsi_sg_copy_to_buffer(ccb->cmd, p, count);
 436         memset(p->base, 0, sizeof(u32)*6);
 437         *(unsigned long *)(p->base) = pci_resource_start(hba->pdev, 0);
 438         p->rom_addr = 0;
 439
 440         p->drv_ver.major = ST_VER_MAJOR;
 441         p->drv_ver.minor = ST_VER_MINOR;
 442         p->drv_ver.oem = ST_OEM;
 443         p->drv_ver.build = ST_BUILD_VER;
 444
 445         p->bus = hba->pdev->bus->number;
 446         p->slot = hba->pdev->devfn;
 447         p->irq_level = 0;
 448         p->irq_vec = hba->pdev->irq;
 449         p->id = hba->pdev->vendor << 16 | hba->pdev->device;
 450         p->subid =
 451                 hba->pdev->subsystem_vendor << 16 | hba->pdev->subsystem_device;
 452
 453         count = scsi_sg_copy_from_buffer(ccb->cmd, p, count);
 454 }
 455
 456 static void
 457 stex_send_cmd(struct st_hba *hba, struct req_msg *req, u16 tag)
 458 {
 459         req->tag = cpu_to_le16(tag);
 460         req->task_attr = TASK_ATTRIBUTE_SIMPLE;
 461         req->task_manage = 0; /* not supported yet */
 462
 463         hba->ccb[tag].req = req;
 464         hba->out_req_cnt++;
 465
 466         writel(hba->req_head, hba->mmio_base + IMR0);
 467         writel(MU_INBOUND_DOORBELL_REQHEADCHANGED, hba->mmio_base + IDBL);
 468         readl(hba->mmio_base + IDBL); /* flush */
 469 }
 470
 471 static int
 472 stex_slave_alloc(struct scsi_device *sdev)
 473 {
 474         /* Cheat: usually extracted from Inquiry data */
 475         sdev->tagged_supported = 1;
 476
 477         scsi_activate_tcq(sdev, sdev->host->can_queue);
 478
 479         return 0;
 480 }
 481
 482 static int
 483 stex_slave_config(struct scsi_device *sdev)
 484 {
 485         sdev->use_10_for_rw = 1;
 486         sdev->use_10_for_ms = 1;
 487         sdev->timeout = 60 * HZ;
 488         sdev->tagged_supported = 1;
 489
 490         return 0;
 491 }
 492
 493 static void
 494 stex_slave_destroy(struct scsi_device *sdev)
 495 {
 496         scsi_deactivate_tcq(sdev, 1);
 497 }
 498
 499 static int
 500 stex_queuecommand(struct scsi_cmnd *cmd, void (* done)(struct scsi_cmnd *))
 501 {
 502         struct st_hba *hba;
 503         struct Scsi_Host *host;
 504         unsigned int id,lun;
 505         struct req_msg *req;
 506         u16 tag;
 507         host = cmd->device->host;
 508         id = cmd->device->id;
 509         lun = cmd->device->lun;
 510         hba = (struct st_hba *) &host->hostdata[0];
 511
 512         switch (cmd->cmnd[0]) {
 513         case MODE_SENSE_10:
 514         {
 515                 static char ms10_caching_page[12] =
 516                         { 0, 0x12, 0, 0, 0, 0, 0, 0, 0x8, 0xa, 0x4, 0 };
 517                 unsigned char page;
 518                 page = cmd->cmnd[2] & 0x3f;
 519                 if (page == 0x8 || page == 0x3f) {
 520                         scsi_sg_copy_from_buffer(cmd, ms10_caching_page,
 521                                                  sizeof(ms10_caching_page));
 522                         cmd->result = DID_OK << 16 | COMMAND_COMPLETE << 8;
 523                         done(cmd);
 524                 } else
 525                         stex_invalid_field(cmd, done);
 526                 return 0;
 527         }
 528         case REPORT_LUNS:
 529                 /*
 530                  * The shasta firmware does not report actual luns in the
 531                  * target, so fail the command to force sequential lun scan.
 532                  * Also, the console device does not support this command.
 533                  */
 534                 if (hba->cardtype == st_shasta || id == host->max_id - 1) {
 535                         stex_invalid_field(cmd, done);
 536                         return 0;
 537                 }
 538                 break;
 539         case TEST_UNIT_READY:
 540                 if (id == host->max_id - 1) {
 541                         cmd->result = DID_OK << 16 | COMMAND_COMPLETE << 8;
 542                         done(cmd);
 543                         return 0;
 544                 }
 545                 break;
 546         case INQUIRY:
 547                 if (id != host->max_id - 1)
 548                         break;
 549                 if (lun == 0 && (cmd->cmnd[1] & INQUIRY_EVPD) == 0) {
 550                         scsi_sg_copy_from_buffer(cmd, (void *)console_inq_page,
 551                                                  sizeof(console_inq_page));
 552                         cmd->result = DID_OK << 16 | COMMAND_COMPLETE << 8;
 553                         done(cmd);
 554                 } else
 555                         stex_invalid_field(cmd, done);
 556                 return 0;
 557         case PASSTHRU_CMD:
 558                 if (cmd->cmnd[1] == PASSTHRU_GET_DRVVER) {
 559                         struct st_drvver ver;
 560                         size_t cp_len = sizeof(ver);
 561                         ver.major = ST_VER_MAJOR;
 562                         ver.minor = ST_VER_MINOR;
 563                         ver.oem = ST_OEM;
 564                         ver.build = ST_BUILD_VER;
 565                         ver.signature[0] = PASSTHRU_SIGNATURE;
 566                         ver.console_id = host->max_id - 1;
 567                         ver.host_no = hba->host->host_no;
 568                         cp_len = scsi_sg_copy_from_buffer(cmd, &ver, cp_len);
 569                         cmd->result = sizeof(ver) == cp_len ?
 570                                 DID_OK << 16 | COMMAND_COMPLETE << 8 :
 571                                 DID_ERROR << 16 | COMMAND_COMPLETE << 8;
 572                         done(cmd);
 573                         return 0;
 574                 }
 575         default:
 576                 break;
 577         }
 578
 579         cmd->scsi_done = done;
 580
 581         tag = cmd->request->tag;
 582
 583         if (unlikely(tag >= host->can_queue))
 584                 return SCSI_MLQUEUE_HOST_BUSY;
 585
 586         req = stex_alloc_req(hba);
 587
 588         req->lun = lun;
 589         req->target = id;
 590
 591         /* cdb */
 592         memcpy(req->cdb, cmd->cmnd, STEX_CDB_LENGTH);
 593
 594         hba->ccb[tag].cmd = cmd;
 595         hba->ccb[tag].sense_bufflen = SCSI_SENSE_BUFFERSIZE;
 596         hba->ccb[tag].sense_buffer = cmd->sense_buffer;
 597         hba->ccb[tag].req_type = 0;
 598
 599         if (cmd->sc_data_direction != DMA_NONE)
 600                 stex_map_sg(hba, req, &hba->ccb[tag]);
 601
 602         stex_send_cmd(hba, req, tag);
 603         return 0;
 604 }
 605
 606 static void stex_scsi_done(struct st_ccb *ccb)
 607 {
 608         struct scsi_cmnd *cmd = ccb->cmd;
 609         int result;
 610
 611         if (ccb->srb_status == SRB_STATUS_SUCCESS ||  ccb->srb_status == 0) {
 612                 result = ccb->scsi_status;
 613                 switch (ccb->scsi_status) {
 614                 case SAM_STAT_GOOD:
 615                         result |= DID_OK << 16 | COMMAND_COMPLETE << 8;
 616                         break;
 617                 case SAM_STAT_CHECK_CONDITION:
 618                         result |= DRIVER_SENSE << 24;
 619                         break;
 620                 case SAM_STAT_BUSY:
 621                         result |= DID_BUS_BUSY << 16 | COMMAND_COMPLETE << 8;
 622                         break;
 623                 default:
 624                         result |= DID_ERROR << 16 | COMMAND_COMPLETE << 8;
 625                         break;
 626                 }
 627         }
 628         else if (ccb->srb_status & SRB_SEE_SENSE)
 629                 result = DRIVER_SENSE << 24 | SAM_STAT_CHECK_CONDITION;
 630         else switch (ccb->srb_status) {
 631                 case SRB_STATUS_SELECTION_TIMEOUT:
 632                         result = DID_NO_CONNECT << 16 | COMMAND_COMPLETE << 8;
 633                         break;
 634                 case SRB_STATUS_BUSY:
 635                         result = DID_BUS_BUSY << 16 | COMMAND_COMPLETE << 8;
 636                         break;
 637                 case SRB_STATUS_INVALID_REQUEST:
 638                 case SRB_STATUS_ERROR:
 639                 default:
 640                         result = DID_ERROR << 16 | COMMAND_COMPLETE << 8;
 641                         break;
 642         }
 643
 644         cmd->result = result;
 645         cmd->scsi_done(cmd);
 646 }
 647
 648 static void stex_copy_data(struct st_ccb *ccb,
 649         struct status_msg *resp, unsigned int variable)
 650 {
 651         size_t count = variable;
 652         if (resp->scsi_status != SAM_STAT_GOOD) {
 653                 if (ccb->sense_buffer != NULL)
 654                         memcpy(ccb->sense_buffer, resp->variable,
 655                                 min(variable, ccb->sense_bufflen));
 656                 return;
 657         }
 658
 659         if (ccb->cmd == NULL)
 660                 return;
 661         count = scsi_sg_copy_from_buffer(ccb->cmd, resp->variable, count);
 662 }
 663
 664 static void stex_ys_commands(struct st_hba *hba,
 665         struct st_ccb *ccb, struct status_msg *resp)
 666 {
 667         if (ccb->cmd->cmnd[0] == MGT_CMD &&
 668                 resp->scsi_status != SAM_STAT_CHECK_CONDITION) {
 669                 scsi_set_resid(ccb->cmd, scsi_bufflen(ccb->cmd) -
 670                         le32_to_cpu(*(__le32 *)&resp->variable[0]));
 671                 return;
 672         }
 673
 674         if (resp->srb_status != 0)
 675                 return;
 676
 677         /* determine inquiry command status by DeviceTypeQualifier */
 678         if (ccb->cmd->cmnd[0] == INQUIRY &&
 679                 resp->scsi_status == SAM_STAT_GOOD) {
 680                 ST_INQ *inq_data;
 681
 682                 scsi_sg_copy_to_buffer(ccb->cmd, hba->copy_buffer,
 683                                        STEX_EXTRA_SIZE);
 684                 inq_data = (ST_INQ *)hba->copy_buffer;
 685                 if (inq_data->DeviceTypeQualifier != 0)
 686                         ccb->srb_status = SRB_STATUS_SELECTION_TIMEOUT;
 687                 else
 688                         ccb->srb_status = SRB_STATUS_SUCCESS;
 689         }
 690 }
 691
 692 static void stex_mu_intr(struct st_hba *hba, u32 doorbell)
 693 {
 694         void __iomem *base = hba->mmio_base;
 695         struct status_msg *resp;
 696         struct st_ccb *ccb;
 697         unsigned int size;
 698         u16 tag;
 699
 700         if (!(doorbell & MU_OUTBOUND_DOORBELL_STATUSHEADCHANGED))
 701                 return;
 702
 703         /* status payloads */
 704         hba->status_head = readl(base + OMR1);
 705         if (unlikely(hba->status_head >= MU_STATUS_COUNT)) {
 706                 printk(KERN_WARNING DRV_NAME "(%s): invalid status head\n",
 707                         pci_name(hba->pdev));
 708                 return;
 709         }
 710
 711         /*
 712          * it's not a valid status payload if:
 713          * 1. there are no pending requests(e.g. during init stage)
 714          * 2. there are some pending requests, but the controller is in
 715          *     reset status, and its type is not st_yosemite
 716          * firmware of st_yosemite in reset status will return pending requests
 717          * to driver, so we allow it to pass
 718          */
 719         if (unlikely(hba->out_req_cnt <= 0 ||
 720                         (hba->mu_status == MU_STATE_RESETTING &&
 721                          hba->cardtype != st_yosemite))) {
 722                 hba->status_tail = hba->status_head;
 723                 goto update_status;
 724         }
 725
 726         while (hba->status_tail != hba->status_head) {
 727                 resp = stex_get_status(hba);
 728                 tag = le16_to_cpu(resp->tag);
 729                 if (unlikely(tag >= hba->host->can_queue)) {
 730                         printk(KERN_WARNING DRV_NAME
 731                                 "(%s): invalid tag\n", pci_name(hba->pdev));
 732                         continue;
 733                 }
 734
 735                 ccb = &hba->ccb[tag];
 736                 if (hba->wait_ccb == ccb)
 737                         hba->wait_ccb = NULL;
 738                 if (unlikely(ccb->req == NULL)) {
 739                         printk(KERN_WARNING DRV_NAME
 740                                 "(%s): lagging req\n", pci_name(hba->pdev));
 741                         hba->out_req_cnt--;
 742                         continue;
 743                 }
 744
 745                 size = resp->payload_sz * sizeof(u32); /* payload size */
 746                 if (unlikely(size < sizeof(*resp) - STATUS_VAR_LEN ||
 747                         size > sizeof(*resp))) {
 748                         printk(KERN_WARNING DRV_NAME "(%s): bad status size\n",
 749                                 pci_name(hba->pdev));
 750                 } else {
 751                         size -= sizeof(*resp) - STATUS_VAR_LEN; /* copy size */
 752                         if (size)
 753                                 stex_copy_data(ccb, resp, size);
 754                 }
 755
 756                 ccb->srb_status = resp->srb_status;
 757                 ccb->scsi_status = resp->scsi_status;
 758
 759                 if (likely(ccb->cmd != NULL)) {
 760                         if (hba->cardtype == st_yosemite)
 761                                 stex_ys_commands(hba, ccb, resp);
 762
 763                         if (unlikely(ccb->cmd->cmnd[0] == PASSTHRU_CMD &&
 764                                 ccb->cmd->cmnd[1] == PASSTHRU_GET_ADAPTER))
 765                                 stex_controller_info(hba, ccb);
 766
 767                         scsi_dma_unmap(ccb->cmd);
 768                         stex_scsi_done(ccb);
 769                         hba->out_req_cnt--;
 770                 } else if (ccb->req_type & PASSTHRU_REQ_TYPE) {
 771                         hba->out_req_cnt--;
 772                         if (ccb->req_type & PASSTHRU_REQ_NO_WAKEUP) {
 773                                 ccb->req_type = 0;
 774                                 continue;
 775                         }
 776                         ccb->req_type = 0;
 777                         if (waitqueue_active(&hba->waitq))
 778                                 wake_up(&hba->waitq);
 779                 }
 780         }
 781
 782 update_status:
 783         writel(hba->status_head, base + IMR1);
 784         readl(base + IMR1); /* flush */
 785 }
 786
 787 static irqreturn_t stex_intr(int irq, void *__hba)
 788 {
 789         struct st_hba *hba = __hba;
 790         void __iomem *base = hba->mmio_base;
 791         u32 data;
 792         unsigned long flags;
 793         int handled = 0;
 794
 795         spin_lock_irqsave(hba->host->host_lock, flags);
 796
 797         data = readl(base + ODBL);
 798
 799         if (data && data != 0xffffffff) {
 800                 /* clear the interrupt */
 801                 writel(data, base + ODBL);
 802                 readl(base + ODBL); /* flush */
 803                 stex_mu_intr(hba, data);
 804                 handled = 1;
 805         }
 806
 807         spin_unlock_irqrestore(hba->host->host_lock, flags);
 808
 809         return IRQ_RETVAL(handled);
 810 }
 811
 812 static int stex_handshake(struct st_hba *hba)
 813 {
 814         void __iomem *base = hba->mmio_base;
 815         struct handshake_frame *h;
 816         dma_addr_t status_phys;
 817         u32 data;
 818         unsigned long before;
 819
 820         if (readl(base + OMR0) != MU_HANDSHAKE_SIGNATURE) {
 821                 writel(MU_INBOUND_DOORBELL_HANDSHAKE, base + IDBL);
 822                 readl(base + IDBL);
 823                 before = jiffies;
 824                 while (readl(base + OMR0) != MU_HANDSHAKE_SIGNATURE) {
 825                         if (time_after(jiffies, before + MU_MAX_DELAY * HZ)) {
 826                                 printk(KERN_ERR DRV_NAME
 827                                         "(%s): no handshake signature\n",
 828                                         pci_name(hba->pdev));
 829                                 return -1;
 830                         }
 831                         rmb();
 832                         msleep(1);
 833                 }
 834         }
 835
 836         udelay(10);
 837
 838         data = readl(base + OMR1);
 839         if ((data & 0xffff0000) == MU_HANDSHAKE_SIGNATURE_HALF) {
 840                 data &= 0x0000ffff;
 841                 if (hba->host->can_queue > data)
 842                         hba->host->can_queue = data;
 843         }
 844
 845         h = (struct handshake_frame *)(hba->dma_mem + MU_REQ_BUFFER_SIZE);
 846         h->rb_phy = cpu_to_le32(hba->dma_handle);
 847         h->rb_phy_hi = cpu_to_le32((hba->dma_handle >> 16) >> 16);
 848         h->req_sz = cpu_to_le16(sizeof(struct req_msg));
 849         h->req_cnt = cpu_to_le16(MU_REQ_COUNT);
 850         h->status_sz = cpu_to_le16(sizeof(struct status_msg));
 851         h->status_cnt = cpu_to_le16(MU_STATUS_COUNT);
 852         stex_gettime(&h->hosttime);
 853         h->partner_type = HMU_PARTNER_TYPE;
 854         if (hba->dma_size > STEX_BUFFER_SIZE) {
 855                 h->extra_offset = cpu_to_le32(STEX_BUFFER_SIZE);
 856                 h->extra_size = cpu_to_le32(ST_ADDITIONAL_MEM);
 857         } else
 858                 h->extra_offset = h->extra_size = 0;
 859
 860         status_phys = hba->dma_handle + MU_REQ_BUFFER_SIZE;
 861         writel(status_phys, base + IMR0);
 862         readl(base + IMR0);
 863         writel((status_phys >> 16) >> 16, base + IMR1);
 864         readl(base + IMR1);
 865
 866         writel((status_phys >> 16) >> 16, base + OMR0); /* old fw compatible */
 867         readl(base + OMR0);
 868         writel(MU_INBOUND_DOORBELL_HANDSHAKE, base + IDBL);
 869         readl(base + IDBL); /* flush */
 870
 871         udelay(10);
 872         before = jiffies;
 873         while (readl(base + OMR0) != MU_HANDSHAKE_SIGNATURE) {
 874                 if (time_after(jiffies, before + MU_MAX_DELAY * HZ)) {
 875                         printk(KERN_ERR DRV_NAME
 876                                 "(%s): no signature after handshake frame\n",
 877                                 pci_name(hba->pdev));
 878                         return -1;
 879                 }
 880                 rmb();
 881                 msleep(1);
 882         }
 883
 884         writel(0, base + IMR0);
 885         readl(base + IMR0);
 886         writel(0, base + OMR0);
 887         readl(base + OMR0);
 888         writel(0, base + IMR1);
 889         readl(base + IMR1);
 890         writel(0, base + OMR1);
 891         readl(base + OMR1); /* flush */
 892         hba->mu_status = MU_STATE_STARTED;
 893         return 0;
 894 }
 895
 896 static int stex_abort(struct scsi_cmnd *cmd)
 897 {
 898         struct Scsi_Host *host = cmd->device->host;
 899         struct st_hba *hba = (struct st_hba *)host->hostdata;
 900         u16 tag = cmd->request->tag;
 901         void __iomem *base;
 902         u32 data;
 903         int result = SUCCESS;
 904         unsigned long flags;
 905
 906         printk(KERN_INFO DRV_NAME
 907                 "(%s): aborting command\n", pci_name(hba->pdev));
 908         scsi_print_command(cmd);
 909
 910         base = hba->mmio_base;
 911         spin_lock_irqsave(host->host_lock, flags);
 912         if (tag < host->can_queue && hba->ccb[tag].cmd == cmd)
 913                 hba->wait_ccb = &hba->ccb[tag];
 914         else {
 915                 for (tag = 0; tag < host->can_queue; tag++)
 916                         if (hba->ccb[tag].cmd == cmd) {
 917                                 hba->wait_ccb = &hba->ccb[tag];
 918                                 break;
 919                         }
 920                 if (tag >= host->can_queue)
 921                         goto out;
 922         }
 923
 924         data = readl(base + ODBL);
 925         if (data == 0 || data == 0xffffffff)
 926                 goto fail_out;
 927
 928         writel(data, base + ODBL);
 929         readl(base + ODBL); /* flush */
 930
 931         stex_mu_intr(hba, data);
 932
 933         if (hba->wait_ccb == NULL) {
 934                 printk(KERN_WARNING DRV_NAME
 935                         "(%s): lost interrupt\n", pci_name(hba->pdev));
 936                 goto out;
 937         }
 938
 939 fail_out:
 940         scsi_dma_unmap(cmd);
 941         hba->wait_ccb->req = NULL; /* nullify the req's future return */
 942         hba->wait_ccb = NULL;
 943         result = FAILED;
 944 out:
 945         spin_unlock_irqrestore(host->host_lock, flags);
 946         return result;
 947 }
 948
 949 static void stex_hard_reset(struct st_hba *hba)
 950 {
 951         struct pci_bus *bus;
 952         int i;
 953         u16 pci_cmd;
 954         u8 pci_bctl;
 955
 956         for (i = 0; i < 16; i++)
 957                 pci_read_config_dword(hba->pdev, i * 4,
 958                         &hba->pdev->saved_config_space[i]);
 959
 960         /* Reset secondary bus. Our controller(MU/ATU) is the only device on
 961            secondary bus. Consult Intel 80331/3 developer's manual for detail */
 962         bus = hba->pdev->bus;
 963         pci_read_config_byte(bus->self, PCI_BRIDGE_CONTROL, &pci_bctl);
 964         pci_bctl |= PCI_BRIDGE_CTL_BUS_RESET;
 965         pci_write_config_byte(bus->self, PCI_BRIDGE_CONTROL, pci_bctl);
 966
 967         /*
 968          * 1 ms may be enough for 8-port controllers. But 16-port controllers
 969          * require more time to finish bus reset. Use 100 ms here for safety
 970          */
 971         msleep(100);
 972         pci_bctl &= ~PCI_BRIDGE_CTL_BUS_RESET;
 973         pci_write_config_byte(bus->self, PCI_BRIDGE_CONTROL, pci_bctl);
 974
 975         for (i = 0; i < MU_HARD_RESET_WAIT; i++) {
 976                 pci_read_config_word(hba->pdev, PCI_COMMAND, &pci_cmd);
 977                 if (pci_cmd != 0xffff && (pci_cmd & PCI_COMMAND_MASTER))
 978                         break;
 979                 msleep(1);
 980         }
 981
 982         ssleep(5);
 983         for (i = 0; i < 16; i++)
 984                 pci_write_config_dword(hba->pdev, i * 4,
 985                         hba->pdev->saved_config_space[i]);
 986 }
 987
 988 static int stex_reset(struct scsi_cmnd *cmd)
 989 {
 990         struct st_hba *hba;
 991         unsigned long flags;
 992         unsigned long before;
 993         hba = (struct st_hba *) &cmd->device->host->hostdata[0];
 994
 995         printk(KERN_INFO DRV_NAME
 996                 "(%s): resetting host\n", pci_name(hba->pdev));
 997         scsi_print_command(cmd);
 998
 999         hba->mu_status = MU_STATE_RESETTING;
1000
1001         if (hba->cardtype == st_shasta)
1002                 stex_hard_reset(hba);
1003
1004         if (hba->cardtype != st_yosemite) {
1005                 if (stex_handshake(hba)) {
1006                         printk(KERN_WARNING DRV_NAME
1007                                 "(%s): resetting: handshake failed\n",
1008                                 pci_name(hba->pdev));
1009                         return FAILED;
1010                 }
1011                 spin_lock_irqsave(hba->host->host_lock, flags);
1012                 hba->req_head = 0;
1013                 hba->req_tail = 0;
1014                 hba->status_head = 0;
1015                 hba->status_tail = 0;
1016                 hba->out_req_cnt = 0;
1017                 spin_unlock_irqrestore(hba->host->host_lock, flags);
1018                 return SUCCESS;
1019         }
1020
1021         /* st_yosemite */
1022         writel(MU_INBOUND_DOORBELL_RESET, hba->mmio_base + IDBL);
1023         readl(hba->mmio_base + IDBL); /* flush */
1024         before = jiffies;
1025         while (hba->out_req_cnt > 0) {
1026                 if (time_after(jiffies, before + ST_INTERNAL_TIMEOUT * HZ)) {
1027                         printk(KERN_WARNING DRV_NAME
1028                                 "(%s): reset timeout\n", pci_name(hba->pdev));
1029                         return FAILED;
1030                 }
1031                 msleep(1);
1032         }
1033
1034         hba->mu_status = MU_STATE_STARTED;
1035         return SUCCESS;
1036 }
1037
1038 static int stex_biosparam(struct scsi_device *sdev,
1039         struct block_device *bdev, sector_t capacity, int geom[])
1040 {
1041         int heads = 255, sectors = 63;
1042
1043         if (capacity < 0x200000) {
1044                 heads = 64;
1045                 sectors = 32;
1046         }
1047
1048         sector_div(capacity, heads * sectors);
1049
1050         geom[0] = heads;
1051         geom[1] = sectors;
1052         geom[2] = capacity;
1053
1054         return 0;
1055 }
1056
1057 static struct scsi_host_template driver_template = {
1058         .module                         = THIS_MODULE,
1059         .name                           = DRV_NAME,
1060         .proc_name                      = DRV_NAME,
1061         .bios_param                     = stex_biosparam,
1062         .queuecommand                   = stex_queuecommand,
1063         .slave_alloc                    = stex_slave_alloc,
1064         .slave_configure                = stex_slave_config,
1065         .slave_destroy                  = stex_slave_destroy,
1066         .eh_abort_handler               = stex_abort,
1067         .eh_host_reset_handler          = stex_reset,
1068         .can_queue                      = ST_CAN_QUEUE,
1069         .this_id                        = -1,
1070         .sg_tablesize                   = ST_MAX_SG,
1071         .cmd_per_lun                    = ST_CMD_PER_LUN,
1072 };
1073
1074 static int stex_set_dma_mask(struct pci_dev * pdev)
1075 {
1076         int ret;
1077         if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)
1078                 && !pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))
1079                 return 0;
1080         ret = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
1081         if (!ret)
1082                 ret = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
1083         return ret;
1084 }
1085
1086 static int __devinit
1087 stex_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1088 {
1089         struct st_hba *hba;
1090         struct Scsi_Host *host;
1091         int err;
1092
1093         err = pci_enable_device(pdev);
1094         if (err)
1095                 return err;
1096
1097         pci_set_master(pdev);
1098
1099         host = scsi_host_alloc(&driver_template, sizeof(struct st_hba));
1100
1101         if (!host) {
1102                 printk(KERN_ERR DRV_NAME "(%s): scsi_host_alloc failed\n",
1103                         pci_name(pdev));
1104                 err = -ENOMEM;
1105                 goto out_disable;
1106         }
1107
1108         hba = (struct st_hba *)host->hostdata;
1109         memset(hba, 0, sizeof(struct st_hba));
1110
1111         err = pci_request_regions(pdev, DRV_NAME);
1112         if (err < 0) {
1113                 printk(KERN_ERR DRV_NAME "(%s): request regions failed\n",
1114                         pci_name(pdev));
1115                 goto out_scsi_host_put;
1116         }
1117
1118         hba->mmio_base = ioremap_nocache(pci_resource_start(pdev, 0),
1119                 pci_resource_len(pdev, 0));
1120         if ( !hba->mmio_base) {
1121                 printk(KERN_ERR DRV_NAME "(%s): memory map failed\n",
1122                         pci_name(pdev));
1123                 err = -ENOMEM;
1124                 goto out_release_regions;
1125         }
1126
1127         err = stex_set_dma_mask(pdev);
1128         if (err) {
1129                 printk(KERN_ERR DRV_NAME "(%s): set dma mask failed\n",
1130                         pci_name(pdev));
1131                 goto out_iounmap;
1132         }
1133
1134         hba->cardtype = (unsigned int) id->driver_data;
1135         if (hba->cardtype == st_vsc && (pdev->subsystem_device & 0xf) == 0x1)
1136                 hba->cardtype = st_vsc1;
1137         hba->dma_size = (hba->cardtype == st_vsc1) ?
1138                 (STEX_BUFFER_SIZE + ST_ADDITIONAL_MEM) : (STEX_BUFFER_SIZE);
1139         hba->dma_mem = dma_alloc_coherent(&pdev->dev,
1140                 hba->dma_size, &hba->dma_handle, GFP_KERNEL);
1141         if (!hba->dma_mem) {
1142                 err = -ENOMEM;
1143                 printk(KERN_ERR DRV_NAME "(%s): dma mem alloc failed\n",
1144                         pci_name(pdev));
1145                 goto out_iounmap;
1146         }
1147
1148         hba->status_buffer =
1149                 (struct status_msg *)(hba->dma_mem + MU_REQ_BUFFER_SIZE);
1150         hba->copy_buffer = hba->dma_mem + MU_BUFFER_SIZE;
1151         hba->mu_status = MU_STATE_STARTING;
1152
1153         if (hba->cardtype == st_shasta) {
1154                 host->max_lun = 8;
1155                 host->max_id = 16 + 1;
1156         } else if (hba->cardtype == st_yosemite) {
1157                 host->max_lun = 128;
1158                 host->max_id = 1 + 1;
1159         } else {
1160                 /* st_vsc and st_vsc1 */
1161                 host->max_lun = 1;
1162                 host->max_id = 128 + 1;
1163         }
1164         host->max_channel = 0;
1165         host->unique_id = host->host_no;
1166         host->max_cmd_len = STEX_CDB_LENGTH;
1167
1168         hba->host = host;
1169         hba->pdev = pdev;
1170         init_waitqueue_head(&hba->waitq);
1171
1172         err = request_irq(pdev->irq, stex_intr, IRQF_SHARED, DRV_NAME, hba);
1173         if (err) {
1174                 printk(KERN_ERR DRV_NAME "(%s): request irq failed\n",
1175                         pci_name(pdev));
1176                 goto out_pci_free;
1177         }
1178
1179         err = stex_handshake(hba);
1180         if (err)
1181                 goto out_free_irq;
1182
1183         err = scsi_init_shared_tag_map(host, host->can_queue);
1184         if (err) {
1185                 printk(KERN_ERR DRV_NAME "(%s): init shared queue failed\n",
1186                         pci_name(pdev));
1187                 goto out_free_irq;
1188         }
1189
1190         pci_set_drvdata(pdev, hba);
1191
1192         err = scsi_add_host(host, &pdev->dev);
1193         if (err) {
1194                 printk(KERN_ERR DRV_NAME "(%s): scsi_add_host failed\n",
1195                         pci_name(pdev));
1196                 goto out_free_irq;
1197         }
1198
1199         scsi_scan_host(host);
1200
1201         return 0;
1202
1203 out_free_irq:
1204         free_irq(pdev->irq, hba);
1205 out_pci_free:
1206         dma_free_coherent(&pdev->dev, hba->dma_size,
1207                           hba->dma_mem, hba->dma_handle);
1208 out_iounmap:
1209         iounmap(hba->mmio_base);
1210 out_release_regions:
1211         pci_release_regions(pdev);
1212 out_scsi_host_put:
1213         scsi_host_put(host);
1214 out_disable:
1215         pci_disable_device(pdev);
1216
1217         return err;
1218 }
1219
1220 static void stex_hba_stop(struct st_hba *hba)
1221 {
1222         struct req_msg *req;
1223         unsigned long flags;
1224         unsigned long before;
1225         u16 tag = 0;
1226
1227         spin_lock_irqsave(hba->host->host_lock, flags);
1228         req = stex_alloc_req(hba);
1229         memset(req->cdb, 0, STEX_CDB_LENGTH);
1230
1231         if (hba->cardtype == st_yosemite) {
1232                 req->cdb[0] = MGT_CMD;
1233                 req->cdb[1] = MGT_CMD_SIGNATURE;
1234                 req->cdb[2] = CTLR_CONFIG_CMD;
1235                 req->cdb[3] = CTLR_SHUTDOWN;
1236         } else {
1237                 req->cdb[0] = CONTROLLER_CMD;
1238                 req->cdb[1] = CTLR_POWER_STATE_CHANGE;
1239                 req->cdb[2] = CTLR_POWER_SAVING;
1240         }
1241
1242         hba->ccb[tag].cmd = NULL;
1243         hba->ccb[tag].sg_count = 0;
1244         hba->ccb[tag].sense_bufflen = 0;
1245         hba->ccb[tag].sense_buffer = NULL;
1246         hba->ccb[tag].req_type |= PASSTHRU_REQ_TYPE;
1247
1248         stex_send_cmd(hba, req, tag);
1249         spin_unlock_irqrestore(hba->host->host_lock, flags);
1250
1251         before = jiffies;
1252         while (hba->ccb[tag].req_type & PASSTHRU_REQ_TYPE) {
1253                 if (time_after(jiffies, before + ST_INTERNAL_TIMEOUT * HZ))
1254                         return;
1255                 msleep(10);
1256         }
1257 }
1258
1259 static void stex_hba_free(struct st_hba *hba)
1260 {
1261         free_irq(hba->pdev->irq, hba);
1262
1263         iounmap(hba->mmio_base);
1264
1265         pci_release_regions(hba->pdev);
1266
1267         dma_free_coherent(&hba->pdev->dev, hba->dma_size,
1268                           hba->dma_mem, hba->dma_handle);
1269 }
1270
1271 static void stex_remove(struct pci_dev *pdev)
1272 {
1273         struct st_hba *hba = pci_get_drvdata(pdev);
1274
1275         scsi_remove_host(hba->host);
1276
1277         pci_set_drvdata(pdev, NULL);
1278
1279         stex_hba_stop(hba);
1280
1281         stex_hba_free(hba);
1282
1283         scsi_host_put(hba->host);
1284
1285         pci_disable_device(pdev);
1286 }
1287
1288 static void stex_shutdown(struct pci_dev *pdev)
1289 {
1290         struct st_hba *hba = pci_get_drvdata(pdev);
1291
1292         stex_hba_stop(hba);
1293 }
1294
1295 static struct pci_device_id stex_pci_tbl[] = {
1296         /* st_shasta */
1297         { 0x105a, 0x8350, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
1298                 st_shasta }, /* SuperTrak EX8350/8300/16350/16300 */
1299         { 0x105a, 0xc350, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
1300                 st_shasta }, /* SuperTrak EX12350 */
1301         { 0x105a, 0x4302, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
1302                 st_shasta }, /* SuperTrak EX4350 */
1303         { 0x105a, 0xe350, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
1304                 st_shasta }, /* SuperTrak EX24350 */
1305
1306         /* st_vsc */
1307         { 0x105a, 0x7250, PCI_ANY_ID, PCI_ANY_ID, 0, 0, st_vsc },
1308
1309         /* st_yosemite */
1310         { 0x105a, 0x8650, PCI_ANY_ID, 0x4600, 0, 0,
1311                 st_yosemite }, /* SuperTrak EX4650 */
1312         { 0x105a, 0x8650, PCI_ANY_ID, 0x4610, 0, 0,
1313                 st_yosemite }, /* SuperTrak EX4650o */
1314         { 0x105a, 0x8650, PCI_ANY_ID, 0x8600, 0, 0,
1315                 st_yosemite }, /* SuperTrak EX8650EL */
1316         { 0x105a, 0x8650, PCI_ANY_ID, 0x8601, 0, 0,
1317                 st_yosemite }, /* SuperTrak EX8650 */
1318         { 0x105a, 0x8650, PCI_ANY_ID, 0x8602, 0, 0,
1319                 st_yosemite }, /* SuperTrak EX8654 */
1320         { 0x105a, 0x8650, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
1321                 st_yosemite }, /* generic st_yosemite */
1322         { }     /* terminate list */
1323 };
1324 MODULE_DEVICE_TABLE(pci, stex_pci_tbl);
1325
1326 static struct pci_driver stex_pci_driver = {
1327         .name           = DRV_NAME,
1328         .id_table       = stex_pci_tbl,
1329         .probe          = stex_probe,
1330         .remove         = __devexit_p(stex_remove),
1331         .shutdown       = stex_shutdown,
1332 };
1333
1334 static int __init stex_init(void)
1335 {
1336         printk(KERN_INFO DRV_NAME
1337                 ": Promise SuperTrak EX Driver version: %s\n",
1338                  ST_DRIVER_VERSION);
1339
1340         return pci_register_driver(&stex_pci_driver);
1341 }
1342
1343 static void __exit stex_exit(void)
1344 {
1345         pci_unregister_driver(&stex_pci_driver);
1346 }
1347
1348 module_init(stex_init);
1349 module_exit(stex_exit);