2 * QLogic iSCSI HBA Driver
3 * Copyright (c) 2003-2006 QLogic Corporation
5 * See LICENSE.qla4xxx for copyright and licensing details.
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/types.h>
14 #include <linux/module.h>
15 #include <linux/list.h>
16 #include <linux/pci.h>
17 #include <linux/dma-mapping.h>
18 #include <linux/sched.h>
19 #include <linux/slab.h>
20 #include <linux/dmapool.h>
21 #include <linux/mempool.h>
22 #include <linux/spinlock.h>
23 #include <linux/workqueue.h>
24 #include <linux/delay.h>
25 #include <linux/interrupt.h>
26 #include <linux/mutex.h>
29 #include <scsi/scsi.h>
30 #include <scsi/scsi_host.h>
31 #include <scsi/scsi_device.h>
32 #include <scsi/scsi_cmnd.h>
33 #include <scsi/scsi_transport.h>
34 #include <scsi/scsi_transport_iscsi.h>
39 #ifndef PCI_DEVICE_ID_QLOGIC_ISP4010
40 #define PCI_DEVICE_ID_QLOGIC_ISP4010 0x4010
43 #ifndef PCI_DEVICE_ID_QLOGIC_ISP4022
44 #define PCI_DEVICE_ID_QLOGIC_ISP4022 0x4022
47 #ifndef PCI_DEVICE_ID_QLOGIC_ISP4032
48 #define PCI_DEVICE_ID_QLOGIC_ISP4032 0x4032
51 #ifndef PCI_DEVICE_ID_QLOGIC_ISP8022
52 #define PCI_DEVICE_ID_QLOGIC_ISP8022 0x8022
59 * Data bit definitions
77 #define BIT_16 0x10000
78 #define BIT_17 0x20000
79 #define BIT_18 0x40000
80 #define BIT_19 0x80000
81 #define BIT_20 0x100000
82 #define BIT_21 0x200000
83 #define BIT_22 0x400000
84 #define BIT_23 0x800000
85 #define BIT_24 0x1000000
86 #define BIT_25 0x2000000
87 #define BIT_26 0x4000000
88 #define BIT_27 0x8000000
89 #define BIT_28 0x10000000
90 #define BIT_29 0x20000000
91 #define BIT_30 0x40000000
92 #define BIT_31 0x80000000
95 * Macros to help code, maintain, etc.
97 #define ql4_printk(level, ha, format, arg...) \
98 dev_printk(level , &((ha)->pdev->dev) , format , ## arg)
102 * Host adapter default definitions
103 ***********************************/
106 #define MAX_TARGETS MAX_DEV_DB_ENTRIES
107 #define MAX_LUNS 0xffff
108 #define MAX_AEN_ENTRIES 256 /* should be > EXT_DEF_MAX_AEN_QUEUE */
109 #define MAX_DDB_ENTRIES MAX_DEV_DB_ENTRIES
110 #define MAX_PDU_ENTRIES 32
111 #define INVALID_ENTRY 0xFFFF
112 #define MAX_CMDS_TO_RISC 1024
113 #define MAX_SRBS MAX_CMDS_TO_RISC
114 #define MBOX_AEN_REG_COUNT 5
115 #define MAX_INIT_RETRIES 5
120 #define REQUEST_QUEUE_DEPTH MAX_CMDS_TO_RISC
121 #define RESPONSE_QUEUE_DEPTH 64
122 #define QUEUE_SIZE 64
123 #define DMA_BUFFER_SIZE 512
128 #define MAC_ADDR_LEN 6 /* in bytes */
129 #define IP_ADDR_LEN 4 /* in bytes */
130 #define IPv6_ADDR_LEN 16 /* IPv6 address size */
131 #define DRIVER_NAME "qla4xxx"
133 #define MAX_LINKED_CMDS_PER_LUN 3
134 #define MAX_REQS_SERVICED_PER_INTR 1
136 #define ISCSI_IPADDR_SIZE 4 /* IP address size */
137 #define ISCSI_ALIAS_SIZE 32 /* ISCSI Alias name size */
138 #define ISCSI_NAME_SIZE 0xE0 /* ISCSI Name size */
140 #define LSDW(x) ((u32)((u64)(x)))
141 #define MSDW(x) ((u32)((((u64)(x)) >> 16) >> 16))
144 * Retry & Timeout Values
147 #define SOFT_RESET_TOV 30
148 #define RESET_INTR_TOV 3
149 #define SEMAPHORE_TOV 10
150 #define ADAPTER_INIT_TOV 30
151 #define ADAPTER_RESET_TOV 180
152 #define EXTEND_CMD_TOV 60
153 #define WAIT_CMD_TOV 30
154 #define EH_WAIT_CMD_TOV 120
155 #define FIRMWARE_UP_TOV 60
156 #define RESET_FIRMWARE_TOV 30
157 #define LOGOUT_TOV 10
158 #define IOCB_TOV_MARGIN 10
159 #define RELOGIN_TOV 18
160 #define ISNS_DEREG_TOV 5
162 #define MAX_RESET_HA_RETRIES 2
164 #define CMD_SP(Cmnd) ((Cmnd)->SCp.ptr)
167 * SCSI Request Block structure (srb) that is placed
168 * on cmd->SCp location of every I/O [We have 22 bytes available]
171 struct list_head list; /* (8) */
172 struct scsi_qla_host *ha; /* HA the SP is queued on */
173 struct ddb_entry *ddb;
174 uint16_t flags; /* (1) Status flags. */
176 #define SRB_DMA_VALID BIT_3 /* DMA Buffer mapped. */
177 #define SRB_GOT_SENSE BIT_4 /* sense data recieved. */
178 uint8_t state; /* (1) Status flags. */
180 #define SRB_NO_QUEUE_STATE 0 /* Request is in between states */
181 #define SRB_FREE_STATE 1
182 #define SRB_ACTIVE_STATE 3
183 #define SRB_ACTIVE_TIMEOUT_STATE 4
184 #define SRB_SUSPENDED_STATE 7 /* Request in suspended state */
186 struct scsi_cmnd *cmd; /* (4) SCSI command block */
187 dma_addr_t dma_handle; /* (4) for unmap of single transfers */
188 struct kref srb_ref; /* reference count for this srb */
189 uint32_t fw_ddb_index;
190 uint8_t err_id; /* error id */
191 #define SRB_ERR_PORT 1 /* Request failed because "port down" */
192 #define SRB_ERR_LOOP 2 /* Request failed because "loop down" */
193 #define SRB_ERR_DEVICE 3 /* Request failed because "device error" */
194 #define SRB_ERR_OTHER 4
198 uint16_t iocb_cnt; /* Number of used iocbs */
201 /* Used for extended sense / status continuation */
202 uint8_t *req_sense_ptr;
203 uint16_t req_sense_len;
208 * Asynchronous Event Queue structure
211 uint32_t mbox_sts[MBOX_AEN_REG_COUNT];
216 struct aen entry[MAX_AEN_ENTRIES];
220 * Device Database (DDB) structure
223 struct list_head list; /* ddb list */
224 struct scsi_qla_host *ha;
225 struct iscsi_cls_session *sess;
226 struct iscsi_cls_conn *conn;
228 atomic_t state; /* DDB State */
230 unsigned long flags; /* DDB Flags */
232 unsigned long dev_scan_wait_to_start_relogin;
233 unsigned long dev_scan_wait_to_complete_relogin;
235 uint16_t fw_ddb_index; /* DDB firmware index */
237 uint32_t fw_ddb_device_state; /* F/W Device State -- see ql4_fw.h */
240 uint16_t target_session_id;
241 uint16_t connection_id;
242 uint16_t exe_throttle; /* Max mumber of cmds outstanding
244 uint16_t task_mgmt_timeout; /* Min time for task mgmt cmds to
246 uint16_t default_relogin_timeout; /* Max time to wait for
247 * relogin to complete */
248 uint16_t tcp_source_port_num;
249 uint32_t default_time2wait; /* Default Min time between
250 * relogins (+aens) */
252 atomic_t port_down_timer; /* Device connection timer */
253 atomic_t retry_relogin_timer; /* Min Time between relogins
255 atomic_t relogin_timer; /* Max Time to wait for relogin to complete */
256 atomic_t relogin_retry_count; /* Num of times relogin has been
261 uint8_t ip_addr[IP_ADDR_LEN];
262 uint8_t iscsi_name[ISCSI_NAME_SIZE]; /* 72 x48 */
263 uint8_t iscsi_alias[0x20];
265 uint16_t iscsi_max_burst_len;
266 uint16_t iscsi_max_outsnd_r2t;
267 uint16_t iscsi_first_burst_len;
268 uint16_t iscsi_max_rcv_data_seg_len;
269 uint16_t iscsi_max_snd_data_seg_len;
271 struct in6_addr remote_ipv6_addr;
272 struct in6_addr link_local_ipv6_addr;
278 #define DDB_STATE_DEAD 0 /* We can no longer talk to
280 #define DDB_STATE_ONLINE 1 /* Device ready to accept
282 #define DDB_STATE_MISSING 2 /* Device logged off, trying
288 #define DF_RELOGIN 0 /* Relogin to device */
289 #define DF_NO_RELOGIN 1 /* Do not relogin if IOCTL
291 #define DF_ISNS_DISCOVERED 2 /* Device was discovered via iSNS */
292 #define DF_FO_MASKED 3
296 #include "ql4_nvram.h"
298 struct ql82xx_hw_data {
299 /* Offsets for flash/nvram access (set to ~0 if not used). */
300 uint32_t flash_conf_off;
301 uint32_t flash_data_off;
303 uint32_t fdt_wrt_disable;
304 uint32_t fdt_erase_cmd;
305 uint32_t fdt_block_size;
306 uint32_t fdt_unprotect_sec_cmd;
307 uint32_t fdt_protect_sec_cmd;
309 uint32_t flt_region_flt;
310 uint32_t flt_region_fdt;
311 uint32_t flt_region_boot;
312 uint32_t flt_region_bootload;
313 uint32_t flt_region_fw;
317 struct qla4_8xxx_legacy_intr_set {
318 uint32_t int_vec_bit;
319 uint32_t tgt_status_reg;
320 uint32_t tgt_mask_reg;
321 uint32_t pci_int_reg;
326 #define QLA_MSIX_DEFAULT 0x00
327 #define QLA_MSIX_RSP_Q 0x01
329 #define QLA_MSIX_ENTRIES 2
330 #define QLA_MIDX_DEFAULT 0
331 #define QLA_MIDX_RSP_Q 1
333 struct ql4_msix_entry {
335 uint16_t msix_vector;
342 struct isp_operations {
343 int (*iospace_config) (struct scsi_qla_host *ha);
344 void (*pci_config) (struct scsi_qla_host *);
345 void (*disable_intrs) (struct scsi_qla_host *);
346 void (*enable_intrs) (struct scsi_qla_host *);
347 int (*start_firmware) (struct scsi_qla_host *);
348 irqreturn_t (*intr_handler) (int , void *);
349 void (*interrupt_service_routine) (struct scsi_qla_host *, uint32_t);
350 int (*reset_chip) (struct scsi_qla_host *);
351 int (*reset_firmware) (struct scsi_qla_host *);
352 void (*queue_iocb) (struct scsi_qla_host *);
353 void (*complete_iocb) (struct scsi_qla_host *);
354 uint16_t (*rd_shdw_req_q_out) (struct scsi_qla_host *);
355 uint16_t (*rd_shdw_rsp_q_in) (struct scsi_qla_host *);
356 int (*get_sys_info) (struct scsi_qla_host *);
360 * Linux Host Adapter structure
362 struct scsi_qla_host {
363 /* Linux adapter configuration data */
366 #define AF_ONLINE 0 /* 0x00000001 */
367 #define AF_INIT_DONE 1 /* 0x00000002 */
368 #define AF_MBOX_COMMAND 2 /* 0x00000004 */
369 #define AF_MBOX_COMMAND_DONE 3 /* 0x00000008 */
370 #define AF_DPC_SCHEDULED 5 /* 0x00000020 */
371 #define AF_INTERRUPTS_ON 6 /* 0x00000040 */
372 #define AF_GET_CRASH_RECORD 7 /* 0x00000080 */
373 #define AF_LINK_UP 8 /* 0x00000100 */
374 #define AF_IRQ_ATTACHED 10 /* 0x00000400 */
375 #define AF_DISABLE_ACB_COMPLETE 11 /* 0x00000800 */
376 #define AF_HBA_GOING_AWAY 12 /* 0x00001000 */
377 #define AF_INTx_ENABLED 15 /* 0x00008000 */
378 #define AF_MSI_ENABLED 16 /* 0x00010000 */
379 #define AF_MSIX_ENABLED 17 /* 0x00020000 */
380 #define AF_MBOX_COMMAND_NOPOLL 18 /* 0x00040000 */
383 unsigned long dpc_flags;
385 #define DPC_RESET_HA 1 /* 0x00000002 */
386 #define DPC_RETRY_RESET_HA 2 /* 0x00000004 */
387 #define DPC_RELOGIN_DEVICE 3 /* 0x00000008 */
388 #define DPC_RESET_HA_FW_CONTEXT 4 /* 0x00000010 */
389 #define DPC_RESET_HA_INTR 5 /* 0x00000020 */
390 #define DPC_ISNS_RESTART 7 /* 0x00000080 */
391 #define DPC_AEN 9 /* 0x00000200 */
392 #define DPC_GET_DHCP_IP_ADDR 15 /* 0x00008000 */
393 #define DPC_LINK_CHANGED 18 /* 0x00040000 */
394 #define DPC_RESET_ACTIVE 20 /* 0x00040000 */
395 #define DPC_HA_UNRECOVERABLE 21 /* 0x00080000 ISP-82xx only*/
396 #define DPC_HA_NEED_QUIESCENT 22 /* 0x00100000 ISP-82xx only*/
399 struct Scsi_Host *host; /* pointer to host data */
405 #define SRB_MIN_REQ 128
406 mempool_t *srb_mempool;
408 /* pci information */
409 struct pci_dev *pdev;
411 struct isp_reg __iomem *reg; /* Base I/O address */
412 unsigned long pio_address;
413 unsigned long pio_length;
414 #define MIN_IOBASE_LEN 0x100
416 uint16_t req_q_count;
418 unsigned long host_no;
420 /* NVRAM registers */
421 struct eeprom_data *nvram;
422 spinlock_t hardware_lock ____cacheline_aligned;
423 uint32_t eeprom_cmd_data;
425 /* Counters for general statistics */
427 uint64_t adapter_error_count;
428 uint64_t device_error_count;
429 uint64_t total_io_count;
430 uint64_t total_mbytes_xferred;
431 uint64_t link_failure_count;
432 uint64_t invalid_crc_count;
433 uint32_t bytes_xfered;
434 uint32_t spurious_int_count;
435 uint32_t aborted_io_count;
436 uint32_t io_timeout_count;
437 uint32_t mailbox_timeout_count;
438 uint32_t seconds_since_last_intr;
439 uint32_t seconds_since_last_heartbeat;
442 /* Info Needed for Management App */
443 /* --- From GetFwVersion --- */
444 uint32_t firmware_version[2];
445 uint32_t patch_number;
446 uint32_t build_number;
449 /* --- From Init_FW --- */
450 /* init_cb_t *init_cb; */
451 uint16_t firmware_options;
452 uint16_t tcp_options;
453 uint8_t ip_address[IP_ADDR_LEN];
454 uint8_t subnet_mask[IP_ADDR_LEN];
455 uint8_t gateway[IP_ADDR_LEN];
457 uint8_t name_string[256];
458 uint8_t heartbeat_interval;
460 /* --- From FlashSysInfo --- */
461 uint8_t my_mac[MAC_ADDR_LEN];
462 uint8_t serial_number[16];
464 /* --- From GetFwState --- */
465 uint32_t firmware_state;
466 uint32_t addl_fw_state;
468 /* Linux kernel thread */
469 struct workqueue_struct *dpc_thread;
470 struct work_struct dpc_work;
472 /* Linux timer thread */
473 struct timer_list timer;
474 uint32_t timer_active;
476 /* Recovery Timers */
477 uint32_t port_down_retry_count;
478 uint32_t discovery_wait;
479 atomic_t check_relogin_timeouts;
480 uint32_t retry_reset_ha_cnt;
481 uint32_t isp_reset_timer; /* reset test timer */
482 uint32_t nic_reset_timer; /* simulated nic reset test timer */
484 struct list_head free_srb_q;
485 uint16_t free_srb_q_count;
486 uint16_t num_srbs_allocated;
488 /* DMA Memory Block */
490 dma_addr_t queues_dma;
491 unsigned long queues_len;
493 #define MEM_ALIGN_VALUE \
494 ((max(REQUEST_QUEUE_DEPTH, RESPONSE_QUEUE_DEPTH)) * \
495 sizeof(struct queue_entry))
496 /* request and response queue variables */
497 dma_addr_t request_dma;
498 struct queue_entry *request_ring;
499 struct queue_entry *request_ptr;
500 dma_addr_t response_dma;
501 struct queue_entry *response_ring;
502 struct queue_entry *response_ptr;
503 dma_addr_t shadow_regs_dma;
504 struct shadow_regs *shadow_regs;
505 uint16_t request_in; /* Current indexes. */
506 uint16_t request_out;
507 uint16_t response_in;
508 uint16_t response_out;
510 /* aen queue variables */
511 uint16_t aen_q_count; /* Number of available aen_q entries */
512 uint16_t aen_in; /* Current indexes */
514 struct aen aen_q[MAX_AEN_ENTRIES];
516 struct ql4_aen_log aen_log;/* tracks all aens */
518 /* This mutex protects several threads to do mailbox commands
521 struct mutex mbox_sem;
523 /* temporary mailbox status registers */
524 volatile uint8_t mbox_status_count;
525 volatile uint32_t mbox_status[MBOX_REG_COUNT];
527 /* local device database list (contains internal ddb entries) */
528 struct list_head ddb_list;
530 /* Map ddb_list entry by FW ddb index */
531 struct ddb_entry *fw_ddb_index_map[MAX_DDB_ENTRIES];
533 /* Saved srb for status continuation entry processing */
534 struct srb *status_srb;
536 /* IPv6 support info from InitFW */
538 uint8_t ipv4_addr_state;
539 uint16_t ipv4_options;
542 uint32_t ipv6_options;
543 uint32_t ipv6_addl_options;
544 uint8_t ipv6_link_local_state;
545 uint8_t ipv6_addr0_state;
546 uint8_t ipv6_addr1_state;
547 uint8_t ipv6_default_router_state;
548 struct in6_addr ipv6_link_local_addr;
549 struct in6_addr ipv6_addr0;
550 struct in6_addr ipv6_addr1;
551 struct in6_addr ipv6_default_router_addr;
553 /* qla82xx specific fields */
554 struct device_reg_82xx __iomem *qla4_8xxx_reg; /* Base I/O address */
555 unsigned long nx_pcibase; /* Base I/O address */
556 uint8_t *nx_db_rd_ptr; /* Doorbell read pointer */
557 unsigned long nx_db_wr_ptr; /* Door bell write pointer */
558 unsigned long first_page_group_start;
559 unsigned long first_page_group_end;
562 uint32_t curr_window;
563 uint32_t ddr_mn_window;
564 unsigned long mn_win_crb;
565 unsigned long ms_win_crb;
571 struct qla4_8xxx_legacy_intr_set nx_legacy_intr;
575 uint32_t fw_heartbeat_counter;
577 struct isp_operations *isp_ops;
578 struct ql82xx_hw_data hw;
580 struct ql4_msix_entry msix_entries[QLA_MSIX_ENTRIES];
582 uint32_t nx_dev_init_timeout;
583 uint32_t nx_reset_timeout;
585 struct completion mbx_intr_comp;
588 static inline int is_ipv4_enabled(struct scsi_qla_host *ha)
590 return ((ha->ipv4_options & IPOPT_IPv4_PROTOCOL_ENABLE) != 0);
593 static inline int is_ipv6_enabled(struct scsi_qla_host *ha)
595 return ((ha->ipv6_options & IPV6_OPT_IPV6_PROTOCOL_ENABLE) != 0);
598 static inline int is_qla4010(struct scsi_qla_host *ha)
600 return ha->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP4010;
603 static inline int is_qla4022(struct scsi_qla_host *ha)
605 return ha->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP4022;
608 static inline int is_qla4032(struct scsi_qla_host *ha)
610 return ha->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP4032;
613 static inline int is_qla8022(struct scsi_qla_host *ha)
615 return ha->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8022;
618 static inline int adapter_up(struct scsi_qla_host *ha)
620 return (test_bit(AF_ONLINE, &ha->flags) != 0) &&
621 (test_bit(AF_LINK_UP, &ha->flags) != 0);
624 static inline struct scsi_qla_host* to_qla_host(struct Scsi_Host *shost)
626 return (struct scsi_qla_host *)shost->hostdata;
629 static inline void __iomem* isp_semaphore(struct scsi_qla_host *ha)
631 return (is_qla4010(ha) ?
632 &ha->reg->u1.isp4010.nvram :
633 &ha->reg->u1.isp4022.semaphore);
636 static inline void __iomem* isp_nvram(struct scsi_qla_host *ha)
638 return (is_qla4010(ha) ?
639 &ha->reg->u1.isp4010.nvram :
640 &ha->reg->u1.isp4022.nvram);
643 static inline void __iomem* isp_ext_hw_conf(struct scsi_qla_host *ha)
645 return (is_qla4010(ha) ?
646 &ha->reg->u2.isp4010.ext_hw_conf :
647 &ha->reg->u2.isp4022.p0.ext_hw_conf);
650 static inline void __iomem* isp_port_status(struct scsi_qla_host *ha)
652 return (is_qla4010(ha) ?
653 &ha->reg->u2.isp4010.port_status :
654 &ha->reg->u2.isp4022.p0.port_status);
657 static inline void __iomem* isp_port_ctrl(struct scsi_qla_host *ha)
659 return (is_qla4010(ha) ?
660 &ha->reg->u2.isp4010.port_ctrl :
661 &ha->reg->u2.isp4022.p0.port_ctrl);
664 static inline void __iomem* isp_port_error_status(struct scsi_qla_host *ha)
666 return (is_qla4010(ha) ?
667 &ha->reg->u2.isp4010.port_err_status :
668 &ha->reg->u2.isp4022.p0.port_err_status);
671 static inline void __iomem * isp_gp_out(struct scsi_qla_host *ha)
673 return (is_qla4010(ha) ?
674 &ha->reg->u2.isp4010.gp_out :
675 &ha->reg->u2.isp4022.p0.gp_out);
678 static inline int eeprom_ext_hw_conf_offset(struct scsi_qla_host *ha)
680 return (is_qla4010(ha) ?
681 offsetof(struct eeprom_data, isp4010.ext_hw_conf) / 2 :
682 offsetof(struct eeprom_data, isp4022.ext_hw_conf) / 2);
685 int ql4xxx_sem_spinlock(struct scsi_qla_host * ha, u32 sem_mask, u32 sem_bits);
686 void ql4xxx_sem_unlock(struct scsi_qla_host * ha, u32 sem_mask);
687 int ql4xxx_sem_lock(struct scsi_qla_host * ha, u32 sem_mask, u32 sem_bits);
689 static inline int ql4xxx_lock_flash(struct scsi_qla_host *a)
692 return ql4xxx_sem_spinlock(a, QL4010_FLASH_SEM_MASK,
693 QL4010_FLASH_SEM_BITS);
695 return ql4xxx_sem_spinlock(a, QL4022_FLASH_SEM_MASK,
696 (QL4022_RESOURCE_BITS_BASE_CODE |
697 (a->mac_index)) << 13);
700 static inline void ql4xxx_unlock_flash(struct scsi_qla_host *a)
703 ql4xxx_sem_unlock(a, QL4010_FLASH_SEM_MASK);
705 ql4xxx_sem_unlock(a, QL4022_FLASH_SEM_MASK);
708 static inline int ql4xxx_lock_nvram(struct scsi_qla_host *a)
711 return ql4xxx_sem_spinlock(a, QL4010_NVRAM_SEM_MASK,
712 QL4010_NVRAM_SEM_BITS);
714 return ql4xxx_sem_spinlock(a, QL4022_NVRAM_SEM_MASK,
715 (QL4022_RESOURCE_BITS_BASE_CODE |
716 (a->mac_index)) << 10);
719 static inline void ql4xxx_unlock_nvram(struct scsi_qla_host *a)
722 ql4xxx_sem_unlock(a, QL4010_NVRAM_SEM_MASK);
724 ql4xxx_sem_unlock(a, QL4022_NVRAM_SEM_MASK);
727 static inline int ql4xxx_lock_drvr(struct scsi_qla_host *a)
730 return ql4xxx_sem_lock(a, QL4010_DRVR_SEM_MASK,
731 QL4010_DRVR_SEM_BITS);
733 return ql4xxx_sem_lock(a, QL4022_DRVR_SEM_MASK,
734 (QL4022_RESOURCE_BITS_BASE_CODE |
735 (a->mac_index)) << 1);
738 static inline void ql4xxx_unlock_drvr(struct scsi_qla_host *a)
741 ql4xxx_sem_unlock(a, QL4010_DRVR_SEM_MASK);
743 ql4xxx_sem_unlock(a, QL4022_DRVR_SEM_MASK);
746 /*---------------------------------------------------------------------------*/
748 /* Defines for qla4xxx_initialize_adapter() and qla4xxx_recover_adapter() */
749 #define PRESERVE_DDB_LIST 0
750 #define REBUILD_DDB_LIST 1
752 /* Defines for process_aen() */
753 #define PROCESS_ALL_AENS 0
754 #define FLUSH_DDB_CHANGED_AENS 1
755 #define RELOGIN_DDB_CHANGED_AENS 2
757 #endif /*_QLA4XXX_H */