drivers/scsi/megaraid/megaraid_sas.h

   1 /*
   2  *
   3  *              Linux MegaRAID driver for SAS based RAID controllers
   4  *
   5  * Copyright (c) 2003-2005  LSI Logic Corporation.
   6  *
   7  *              This program is free software; you can redistribute it and/or
   8  *              modify it under the terms of the GNU General Public License
   9  *              as published by the Free Software Foundation; either version
  10  *              2 of the License, or (at your option) any later version.
  11  *
  12  * FILE         : megaraid_sas.h
  13  */
  14
  15 #ifndef LSI_MEGARAID_SAS_H
  16 #define LSI_MEGARAID_SAS_H
  17
  18 /**
  19  * MegaRAID SAS Driver meta data
  20  */
  21 #define MEGASAS_VERSION                         "00.00.02.00-rc4"
  22 #define MEGASAS_RELDATE                         "Sep 16, 2005"
  23 #define MEGASAS_EXT_VERSION                     "Fri Sep 16 12:37:08 EDT 2005"
  24
  25 /*
  26  * =====================================
  27  * MegaRAID SAS MFI firmware definitions
  28  * =====================================
  29  */
  30
  31 /*
  32  * MFI stands for  MegaRAID SAS FW Interface. This is just a moniker for
  33  * protocol between the software and firmware. Commands are issued using
  34  * "message frames"
  35  */
  36
  37 /**
  38  * FW posts its state in upper 4 bits of outbound_msg_0 register
  39  */
  40 #define MFI_STATE_MASK                          0xF0000000
  41 #define MFI_STATE_UNDEFINED                     0x00000000
  42 #define MFI_STATE_BB_INIT                       0x10000000
  43 #define MFI_STATE_FW_INIT                       0x40000000
  44 #define MFI_STATE_WAIT_HANDSHAKE                0x60000000
  45 #define MFI_STATE_FW_INIT_2                     0x70000000
  46 #define MFI_STATE_DEVICE_SCAN                   0x80000000
  47 #define MFI_STATE_FLUSH_CACHE                   0xA0000000
  48 #define MFI_STATE_READY                         0xB0000000
  49 #define MFI_STATE_OPERATIONAL                   0xC0000000
  50 #define MFI_STATE_FAULT                         0xF0000000
  51
  52 #define MEGAMFI_FRAME_SIZE                      64
  53
  54 /**
  55  * During FW init, clear pending cmds & reset state using inbound_msg_0
  56  *
  57  * ABORT        : Abort all pending cmds
  58  * READY        : Move from OPERATIONAL to READY state; discard queue info
  59  * MFIMODE      : Discard (possible) low MFA posted in 64-bit mode (??)
  60  * CLR_HANDSHAKE: FW is waiting for HANDSHAKE from BIOS or Driver
  61  */
  62 #define MFI_INIT_ABORT                          0x00000000
  63 #define MFI_INIT_READY                          0x00000002
  64 #define MFI_INIT_MFIMODE                        0x00000004
  65 #define MFI_INIT_CLEAR_HANDSHAKE                0x00000008
  66 #define MFI_RESET_FLAGS                         MFI_INIT_READY|MFI_INIT_MFIMODE
  67
  68 /**
  69  * MFI frame flags
  70  */
  71 #define MFI_FRAME_POST_IN_REPLY_QUEUE           0x0000
  72 #define MFI_FRAME_DONT_POST_IN_REPLY_QUEUE      0x0001
  73 #define MFI_FRAME_SGL32                         0x0000
  74 #define MFI_FRAME_SGL64                         0x0002
  75 #define MFI_FRAME_SENSE32                       0x0000
  76 #define MFI_FRAME_SENSE64                       0x0004
  77 #define MFI_FRAME_DIR_NONE                      0x0000
  78 #define MFI_FRAME_DIR_WRITE                     0x0008
  79 #define MFI_FRAME_DIR_READ                      0x0010
  80 #define MFI_FRAME_DIR_BOTH                      0x0018
  81
  82 /**
  83  * Definition for cmd_status
  84  */
  85 #define MFI_CMD_STATUS_POLL_MODE                0xFF
  86
  87 /**
  88  * MFI command opcodes
  89  */
  90 #define MFI_CMD_INIT                            0x00
  91 #define MFI_CMD_LD_READ                         0x01
  92 #define MFI_CMD_LD_WRITE                        0x02
  93 #define MFI_CMD_LD_SCSI_IO                      0x03
  94 #define MFI_CMD_PD_SCSI_IO                      0x04
  95 #define MFI_CMD_DCMD                            0x05
  96 #define MFI_CMD_ABORT                           0x06
  97 #define MFI_CMD_SMP                             0x07
  98 #define MFI_CMD_STP                             0x08
  99
 100 #define MR_DCMD_CTRL_GET_INFO                   0x01010000
 101
 102 #define MR_DCMD_CTRL_CACHE_FLUSH                0x01101000
 103 #define MR_FLUSH_CTRL_CACHE                     0x01
 104 #define MR_FLUSH_DISK_CACHE                     0x02
 105
 106 #define MR_DCMD_CTRL_SHUTDOWN                   0x01050000
 107 #define MR_ENABLE_DRIVE_SPINDOWN                0x01
 108
 109 #define MR_DCMD_CTRL_EVENT_GET_INFO             0x01040100
 110 #define MR_DCMD_CTRL_EVENT_GET                  0x01040300
 111 #define MR_DCMD_CTRL_EVENT_WAIT                 0x01040500
 112 #define MR_DCMD_LD_GET_PROPERTIES               0x03030000
 113
 114 #define MR_DCMD_CLUSTER                         0x08000000
 115 #define MR_DCMD_CLUSTER_RESET_ALL               0x08010100
 116 #define MR_DCMD_CLUSTER_RESET_LD                0x08010200
 117
 118 /**
 119  * MFI command completion codes
 120  */
 121 enum MFI_STAT {
 122         MFI_STAT_OK = 0x00,
 123         MFI_STAT_INVALID_CMD = 0x01,
 124         MFI_STAT_INVALID_DCMD = 0x02,
 125         MFI_STAT_INVALID_PARAMETER = 0x03,
 126         MFI_STAT_INVALID_SEQUENCE_NUMBER = 0x04,
 127         MFI_STAT_ABORT_NOT_POSSIBLE = 0x05,
 128         MFI_STAT_APP_HOST_CODE_NOT_FOUND = 0x06,
 129         MFI_STAT_APP_IN_USE = 0x07,
 130         MFI_STAT_APP_NOT_INITIALIZED = 0x08,
 131         MFI_STAT_ARRAY_INDEX_INVALID = 0x09,
 132         MFI_STAT_ARRAY_ROW_NOT_EMPTY = 0x0a,
 133         MFI_STAT_CONFIG_RESOURCE_CONFLICT = 0x0b,
 134         MFI_STAT_DEVICE_NOT_FOUND = 0x0c,
 135         MFI_STAT_DRIVE_TOO_SMALL = 0x0d,
 136         MFI_STAT_FLASH_ALLOC_FAIL = 0x0e,
 137         MFI_STAT_FLASH_BUSY = 0x0f,
 138         MFI_STAT_FLASH_ERROR = 0x10,
 139         MFI_STAT_FLASH_IMAGE_BAD = 0x11,
 140         MFI_STAT_FLASH_IMAGE_INCOMPLETE = 0x12,
 141         MFI_STAT_FLASH_NOT_OPEN = 0x13,
 142         MFI_STAT_FLASH_NOT_STARTED = 0x14,
 143         MFI_STAT_FLUSH_FAILED = 0x15,
 144         MFI_STAT_HOST_CODE_NOT_FOUNT = 0x16,
 145         MFI_STAT_LD_CC_IN_PROGRESS = 0x17,
 146         MFI_STAT_LD_INIT_IN_PROGRESS = 0x18,
 147         MFI_STAT_LD_LBA_OUT_OF_RANGE = 0x19,
 148         MFI_STAT_LD_MAX_CONFIGURED = 0x1a,
 149         MFI_STAT_LD_NOT_OPTIMAL = 0x1b,
 150         MFI_STAT_LD_RBLD_IN_PROGRESS = 0x1c,
 151         MFI_STAT_LD_RECON_IN_PROGRESS = 0x1d,
 152         MFI_STAT_LD_WRONG_RAID_LEVEL = 0x1e,
 153         MFI_STAT_MAX_SPARES_EXCEEDED = 0x1f,
 154         MFI_STAT_MEMORY_NOT_AVAILABLE = 0x20,
 155         MFI_STAT_MFC_HW_ERROR = 0x21,
 156         MFI_STAT_NO_HW_PRESENT = 0x22,
 157         MFI_STAT_NOT_FOUND = 0x23,
 158         MFI_STAT_NOT_IN_ENCL = 0x24,
 159         MFI_STAT_PD_CLEAR_IN_PROGRESS = 0x25,
 160         MFI_STAT_PD_TYPE_WRONG = 0x26,
 161         MFI_STAT_PR_DISABLED = 0x27,
 162         MFI_STAT_ROW_INDEX_INVALID = 0x28,
 163         MFI_STAT_SAS_CONFIG_INVALID_ACTION = 0x29,
 164         MFI_STAT_SAS_CONFIG_INVALID_DATA = 0x2a,
 165         MFI_STAT_SAS_CONFIG_INVALID_PAGE = 0x2b,
 166         MFI_STAT_SAS_CONFIG_INVALID_TYPE = 0x2c,
 167         MFI_STAT_SCSI_DONE_WITH_ERROR = 0x2d,
 168         MFI_STAT_SCSI_IO_FAILED = 0x2e,
 169         MFI_STAT_SCSI_RESERVATION_CONFLICT = 0x2f,
 170         MFI_STAT_SHUTDOWN_FAILED = 0x30,
 171         MFI_STAT_TIME_NOT_SET = 0x31,
 172         MFI_STAT_WRONG_STATE = 0x32,
 173         MFI_STAT_LD_OFFLINE = 0x33,
 174         MFI_STAT_PEER_NOTIFICATION_REJECTED = 0x34,
 175         MFI_STAT_PEER_NOTIFICATION_FAILED = 0x35,
 176         MFI_STAT_RESERVATION_IN_PROGRESS = 0x36,
 177         MFI_STAT_I2C_ERRORS_DETECTED = 0x37,
 178         MFI_STAT_PCI_ERRORS_DETECTED = 0x38,
 179
 180         MFI_STAT_INVALID_STATUS = 0xFF
 181 };
 182
 183 /*
 184  * Number of mailbox bytes in DCMD message frame
 185  */
 186 #define MFI_MBOX_SIZE                           12
 187
 188 enum MR_EVT_CLASS {
 189
 190         MR_EVT_CLASS_DEBUG = -2,
 191         MR_EVT_CLASS_PROGRESS = -1,
 192         MR_EVT_CLASS_INFO = 0,
 193         MR_EVT_CLASS_WARNING = 1,
 194         MR_EVT_CLASS_CRITICAL = 2,
 195         MR_EVT_CLASS_FATAL = 3,
 196         MR_EVT_CLASS_DEAD = 4,
 197
 198 };
 199
 200 enum MR_EVT_LOCALE {
 201
 202         MR_EVT_LOCALE_LD = 0x0001,
 203         MR_EVT_LOCALE_PD = 0x0002,
 204         MR_EVT_LOCALE_ENCL = 0x0004,
 205         MR_EVT_LOCALE_BBU = 0x0008,
 206         MR_EVT_LOCALE_SAS = 0x0010,
 207         MR_EVT_LOCALE_CTRL = 0x0020,
 208         MR_EVT_LOCALE_CONFIG = 0x0040,
 209         MR_EVT_LOCALE_CLUSTER = 0x0080,
 210         MR_EVT_LOCALE_ALL = 0xffff,
 211
 212 };
 213
 214 enum MR_EVT_ARGS {
 215
 216         MR_EVT_ARGS_NONE,
 217         MR_EVT_ARGS_CDB_SENSE,
 218         MR_EVT_ARGS_LD,
 219         MR_EVT_ARGS_LD_COUNT,
 220         MR_EVT_ARGS_LD_LBA,
 221         MR_EVT_ARGS_LD_OWNER,
 222         MR_EVT_ARGS_LD_LBA_PD_LBA,
 223         MR_EVT_ARGS_LD_PROG,
 224         MR_EVT_ARGS_LD_STATE,
 225         MR_EVT_ARGS_LD_STRIP,
 226         MR_EVT_ARGS_PD,
 227         MR_EVT_ARGS_PD_ERR,
 228         MR_EVT_ARGS_PD_LBA,
 229         MR_EVT_ARGS_PD_LBA_LD,
 230         MR_EVT_ARGS_PD_PROG,
 231         MR_EVT_ARGS_PD_STATE,
 232         MR_EVT_ARGS_PCI,
 233         MR_EVT_ARGS_RATE,
 234         MR_EVT_ARGS_STR,
 235         MR_EVT_ARGS_TIME,
 236         MR_EVT_ARGS_ECC,
 237
 238 };
 239
 240 /*
 241  * SAS controller properties
 242  */
 243 struct megasas_ctrl_prop {
 244
 245         u16 seq_num;
 246         u16 pred_fail_poll_interval;
 247         u16 intr_throttle_count;
 248         u16 intr_throttle_timeouts;
 249         u8 rebuild_rate;
 250         u8 patrol_read_rate;
 251         u8 bgi_rate;
 252         u8 cc_rate;
 253         u8 recon_rate;
 254         u8 cache_flush_interval;
 255         u8 spinup_drv_count;
 256         u8 spinup_delay;
 257         u8 cluster_enable;
 258         u8 coercion_mode;
 259         u8 alarm_enable;
 260         u8 disable_auto_rebuild;
 261         u8 disable_battery_warn;
 262         u8 ecc_bucket_size;
 263         u16 ecc_bucket_leak_rate;
 264         u8 restore_hotspare_on_insertion;
 265         u8 expose_encl_devices;
 266         u8 reserved[38];
 267
 268 } __attribute__ ((packed));
 269
 270 /*
 271  * SAS controller information
 272  */
 273 struct megasas_ctrl_info {
 274
 275         /*
 276          * PCI device information
 277          */
 278         struct {
 279
 280                 u16 vendor_id;
 281                 u16 device_id;
 282                 u16 sub_vendor_id;
 283                 u16 sub_device_id;
 284                 u8 reserved[24];
 285
 286         } __attribute__ ((packed)) pci;
 287
 288         /*
 289          * Host interface information
 290          */
 291         struct {
 292
 293                 u8 PCIX:1;
 294                 u8 PCIE:1;
 295                 u8 iSCSI:1;
 296                 u8 SAS_3G:1;
 297                 u8 reserved_0:4;
 298                 u8 reserved_1[6];
 299                 u8 port_count;
 300                 u64 port_addr[8];
 301
 302         } __attribute__ ((packed)) host_interface;
 303
 304         /*
 305          * Device (backend) interface information
 306          */
 307         struct {
 308
 309                 u8 SPI:1;
 310                 u8 SAS_3G:1;
 311                 u8 SATA_1_5G:1;
 312                 u8 SATA_3G:1;
 313                 u8 reserved_0:4;
 314                 u8 reserved_1[6];
 315                 u8 port_count;
 316                 u64 port_addr[8];
 317
 318         } __attribute__ ((packed)) device_interface;
 319
 320         /*
 321          * List of components residing in flash. All str are null terminated
 322          */
 323         u32 image_check_word;
 324         u32 image_component_count;
 325
 326         struct {
 327
 328                 char name[8];
 329                 char version[32];
 330                 char build_date[16];
 331                 char built_time[16];
 332
 333         } __attribute__ ((packed)) image_component[8];
 334
 335         /*
 336          * List of flash components that have been flashed on the card, but
 337          * are not in use, pending reset of the adapter. This list will be
 338          * empty if a flash operation has not occurred. All stings are null
 339          * terminated
 340          */
 341         u32 pending_image_component_count;
 342
 343         struct {
 344
 345                 char name[8];
 346                 char version[32];
 347                 char build_date[16];
 348                 char build_time[16];
 349
 350         } __attribute__ ((packed)) pending_image_component[8];
 351
 352         u8 max_arms;
 353         u8 max_spans;
 354         u8 max_arrays;
 355         u8 max_lds;
 356
 357         char product_name[80];
 358         char serial_no[32];
 359
 360         /*
 361          * Other physical/controller/operation information. Indicates the
 362          * presence of the hardware
 363          */
 364         struct {
 365
 366                 u32 bbu:1;
 367                 u32 alarm:1;
 368                 u32 nvram:1;
 369                 u32 uart:1;
 370                 u32 reserved:28;
 371
 372         } __attribute__ ((packed)) hw_present;
 373
 374         u32 current_fw_time;
 375
 376         /*
 377          * Maximum data transfer sizes
 378          */
 379         u16 max_concurrent_cmds;
 380         u16 max_sge_count;
 381         u32 max_request_size;
 382
 383         /*
 384          * Logical and physical device counts
 385          */
 386         u16 ld_present_count;
 387         u16 ld_degraded_count;
 388         u16 ld_offline_count;
 389
 390         u16 pd_present_count;
 391         u16 pd_disk_present_count;
 392         u16 pd_disk_pred_failure_count;
 393         u16 pd_disk_failed_count;
 394
 395         /*
 396          * Memory size information
 397          */
 398         u16 nvram_size;
 399         u16 memory_size;
 400         u16 flash_size;
 401
 402         /*
 403          * Error counters
 404          */
 405         u16 mem_correctable_error_count;
 406         u16 mem_uncorrectable_error_count;
 407
 408         /*
 409          * Cluster information
 410          */
 411         u8 cluster_permitted;
 412         u8 cluster_active;
 413
 414         /*
 415          * Additional max data transfer sizes
 416          */
 417         u16 max_strips_per_io;
 418
 419         /*
 420          * Controller capabilities structures
 421          */
 422         struct {
 423
 424                 u32 raid_level_0:1;
 425                 u32 raid_level_1:1;
 426                 u32 raid_level_5:1;
 427                 u32 raid_level_1E:1;
 428                 u32 raid_level_6:1;
 429                 u32 reserved:27;
 430
 431         } __attribute__ ((packed)) raid_levels;
 432
 433         struct {
 434
 435                 u32 rbld_rate:1;
 436                 u32 cc_rate:1;
 437                 u32 bgi_rate:1;
 438                 u32 recon_rate:1;
 439                 u32 patrol_rate:1;
 440                 u32 alarm_control:1;
 441                 u32 cluster_supported:1;
 442                 u32 bbu:1;
 443                 u32 spanning_allowed:1;
 444                 u32 dedicated_hotspares:1;
 445                 u32 revertible_hotspares:1;
 446                 u32 foreign_config_import:1;
 447                 u32 self_diagnostic:1;
 448                 u32 mixed_redundancy_arr:1;
 449                 u32 global_hot_spares:1;
 450                 u32 reserved:17;
 451
 452         } __attribute__ ((packed)) adapter_operations;
 453
 454         struct {
 455
 456                 u32 read_policy:1;
 457                 u32 write_policy:1;
 458                 u32 io_policy:1;
 459                 u32 access_policy:1;
 460                 u32 disk_cache_policy:1;
 461                 u32 reserved:27;
 462
 463         } __attribute__ ((packed)) ld_operations;
 464
 465         struct {
 466
 467                 u8 min;
 468                 u8 max;
 469                 u8 reserved[2];
 470
 471         } __attribute__ ((packed)) stripe_sz_ops;
 472
 473         struct {
 474
 475                 u32 force_online:1;
 476                 u32 force_offline:1;
 477                 u32 force_rebuild:1;
 478                 u32 reserved:29;
 479
 480         } __attribute__ ((packed)) pd_operations;
 481
 482         struct {
 483
 484                 u32 ctrl_supports_sas:1;
 485                 u32 ctrl_supports_sata:1;
 486                 u32 allow_mix_in_encl:1;
 487                 u32 allow_mix_in_ld:1;
 488                 u32 allow_sata_in_cluster:1;
 489                 u32 reserved:27;
 490
 491         } __attribute__ ((packed)) pd_mix_support;
 492
 493         /*
 494          * Define ECC single-bit-error bucket information
 495          */
 496         u8 ecc_bucket_count;
 497         u8 reserved_2[11];
 498
 499         /*
 500          * Include the controller properties (changeable items)
 501          */
 502         struct megasas_ctrl_prop properties;
 503
 504         /*
 505          * Define FW pkg version (set in envt v'bles on OEM basis)
 506          */
 507         char package_version[0x60];
 508
 509         u8 pad[0x800 - 0x6a0];
 510
 511 } __attribute__ ((packed));
 512
 513 /*
 514  * ===============================
 515  * MegaRAID SAS driver definitions
 516  * ===============================
 517  */
 518 #define MEGASAS_MAX_PD_CHANNELS                 2
 519 #define MEGASAS_MAX_LD_CHANNELS                 2
 520 #define MEGASAS_MAX_CHANNELS                    (MEGASAS_MAX_PD_CHANNELS + \
 521                                                 MEGASAS_MAX_LD_CHANNELS)
 522 #define MEGASAS_MAX_DEV_PER_CHANNEL             128
 523 #define MEGASAS_DEFAULT_INIT_ID                 -1
 524 #define MEGASAS_MAX_LUN                         8
 525 #define MEGASAS_MAX_LD                          64
 526
 527 /*
 528  * When SCSI mid-layer calls driver's reset routine, driver waits for
 529  * MEGASAS_RESET_WAIT_TIME seconds for all outstanding IO to complete. Note
 530  * that the driver cannot _actually_ abort or reset pending commands. While
 531  * it is waiting for the commands to complete, it prints a diagnostic message
 532  * every MEGASAS_RESET_NOTICE_INTERVAL seconds
 533  */
 534 #define MEGASAS_RESET_WAIT_TIME                 180
 535 #define MEGASAS_RESET_NOTICE_INTERVAL           5
 536
 537 #define MEGASAS_IOCTL_CMD                       0
 538
 539 /*
 540  * FW reports the maximum of number of commands that it can accept (maximum
 541  * commands that can be outstanding) at any time. The driver must report a
 542  * lower number to the mid layer because it can issue a few internal commands
 543  * itself (E.g, AEN, abort cmd, IOCTLs etc). The number of commands it needs
 544  * is shown below
 545  */
 546 #define MEGASAS_INT_CMDS                        32
 547
 548 /*
 549  * FW can accept both 32 and 64 bit SGLs. We want to allocate 32/64 bit
 550  * SGLs based on the size of dma_addr_t
 551  */
 552 #define IS_DMA64                                (sizeof(dma_addr_t) == 8)
 553
 554 #define MFI_OB_INTR_STATUS_MASK                 0x00000002
 555 #define MFI_POLL_TIMEOUT_SECS                   10
 556
 557 struct megasas_register_set {
 558
 559         u32 reserved_0[4];      /*0000h */
 560
 561         u32 inbound_msg_0;      /*0010h */
 562         u32 inbound_msg_1;      /*0014h */
 563         u32 outbound_msg_0;     /*0018h */
 564         u32 outbound_msg_1;     /*001Ch */
 565
 566         u32 inbound_doorbell;   /*0020h */
 567         u32 inbound_intr_status;        /*0024h */
 568         u32 inbound_intr_mask;  /*0028h */
 569
 570         u32 outbound_doorbell;  /*002Ch */
 571         u32 outbound_intr_status;       /*0030h */
 572         u32 outbound_intr_mask; /*0034h */
 573
 574         u32 reserved_1[2];      /*0038h */
 575
 576         u32 inbound_queue_port; /*0040h */
 577         u32 outbound_queue_port;        /*0044h */
 578
 579         u32 reserved_2;         /*004Ch */
 580
 581         u32 index_registers[1004];      /*0050h */
 582
 583 } __attribute__ ((packed));
 584
 585 struct megasas_sge32 {
 586
 587         u32 phys_addr;
 588         u32 length;
 589
 590 } __attribute__ ((packed));
 591
 592 struct megasas_sge64 {
 593
 594         u64 phys_addr;
 595         u32 length;
 596
 597 } __attribute__ ((packed));
 598
 599 union megasas_sgl {
 600
 601         struct megasas_sge32 sge32[1];
 602         struct megasas_sge64 sge64[1];
 603
 604 } __attribute__ ((packed));
 605
 606 struct megasas_header {
 607
 608         u8 cmd;                 /*00h */
 609         u8 sense_len;           /*01h */
 610         u8 cmd_status;          /*02h */
 611         u8 scsi_status;         /*03h */
 612
 613         u8 target_id;           /*04h */
 614         u8 lun;                 /*05h */
 615         u8 cdb_len;             /*06h */
 616         u8 sge_count;           /*07h */
 617
 618         u32 context;            /*08h */
 619         u32 pad_0;              /*0Ch */
 620
 621         u16 flags;              /*10h */
 622         u16 timeout;            /*12h */
 623         u32 data_xferlen;       /*14h */
 624
 625 } __attribute__ ((packed));
 626
 627 union megasas_sgl_frame {
 628
 629         struct megasas_sge32 sge32[8];
 630         struct megasas_sge64 sge64[5];
 631
 632 } __attribute__ ((packed));
 633
 634 struct megasas_init_frame {
 635
 636         u8 cmd;                 /*00h */
 637         u8 reserved_0;          /*01h */
 638         u8 cmd_status;          /*02h */
 639
 640         u8 reserved_1;          /*03h */
 641         u32 reserved_2;         /*04h */
 642
 643         u32 context;            /*08h */
 644         u32 pad_0;              /*0Ch */
 645
 646         u16 flags;              /*10h */
 647         u16 reserved_3;         /*12h */
 648         u32 data_xfer_len;      /*14h */
 649
 650         u32 queue_info_new_phys_addr_lo;        /*18h */
 651         u32 queue_info_new_phys_addr_hi;        /*1Ch */
 652         u32 queue_info_old_phys_addr_lo;        /*20h */
 653         u32 queue_info_old_phys_addr_hi;        /*24h */
 654
 655         u32 reserved_4[6];      /*28h */
 656
 657 } __attribute__ ((packed));
 658
 659 struct megasas_init_queue_info {
 660
 661         u32 init_flags;         /*00h */
 662         u32 reply_queue_entries;        /*04h */
 663
 664         u32 reply_queue_start_phys_addr_lo;     /*08h */
 665         u32 reply_queue_start_phys_addr_hi;     /*0Ch */
 666         u32 producer_index_phys_addr_lo;        /*10h */
 667         u32 producer_index_phys_addr_hi;        /*14h */
 668         u32 consumer_index_phys_addr_lo;        /*18h */
 669         u32 consumer_index_phys_addr_hi;        /*1Ch */
 670
 671 } __attribute__ ((packed));
 672
 673 struct megasas_io_frame {
 674
 675         u8 cmd;                 /*00h */
 676         u8 sense_len;           /*01h */
 677         u8 cmd_status;          /*02h */
 678         u8 scsi_status;         /*03h */
 679
 680         u8 target_id;           /*04h */
 681         u8 access_byte;         /*05h */
 682         u8 reserved_0;          /*06h */
 683         u8 sge_count;           /*07h */
 684
 685         u32 context;            /*08h */
 686         u32 pad_0;              /*0Ch */
 687
 688         u16 flags;              /*10h */
 689         u16 timeout;            /*12h */
 690         u32 lba_count;          /*14h */
 691
 692         u32 sense_buf_phys_addr_lo;     /*18h */
 693         u32 sense_buf_phys_addr_hi;     /*1Ch */
 694
 695         u32 start_lba_lo;       /*20h */
 696         u32 start_lba_hi;       /*24h */
 697
 698         union megasas_sgl sgl;  /*28h */
 699
 700 } __attribute__ ((packed));
 701
 702 struct megasas_pthru_frame {
 703
 704         u8 cmd;                 /*00h */
 705         u8 sense_len;           /*01h */
 706         u8 cmd_status;          /*02h */
 707         u8 scsi_status;         /*03h */
 708
 709         u8 target_id;           /*04h */
 710         u8 lun;                 /*05h */
 711         u8 cdb_len;             /*06h */
 712         u8 sge_count;           /*07h */
 713
 714         u32 context;            /*08h */
 715         u32 pad_0;              /*0Ch */
 716
 717         u16 flags;              /*10h */
 718         u16 timeout;            /*12h */
 719         u32 data_xfer_len;      /*14h */
 720
 721         u32 sense_buf_phys_addr_lo;     /*18h */
 722         u32 sense_buf_phys_addr_hi;     /*1Ch */
 723
 724         u8 cdb[16];             /*20h */
 725         union megasas_sgl sgl;  /*30h */
 726
 727 } __attribute__ ((packed));
 728
 729 struct megasas_dcmd_frame {
 730
 731         u8 cmd;                 /*00h */
 732         u8 reserved_0;          /*01h */
 733         u8 cmd_status;          /*02h */
 734         u8 reserved_1[4];       /*03h */
 735         u8 sge_count;           /*07h */
 736
 737         u32 context;            /*08h */
 738         u32 pad_0;              /*0Ch */
 739
 740         u16 flags;              /*10h */
 741         u16 timeout;            /*12h */
 742
 743         u32 data_xfer_len;      /*14h */
 744         u32 opcode;             /*18h */
 745
 746         union {                 /*1Ch */
 747                 u8 b[12];
 748                 u16 s[6];
 749                 u32 w[3];
 750         } mbox;
 751
 752         union megasas_sgl sgl;  /*28h */
 753
 754 } __attribute__ ((packed));
 755
 756 struct megasas_abort_frame {
 757
 758         u8 cmd;                 /*00h */
 759         u8 reserved_0;          /*01h */
 760         u8 cmd_status;          /*02h */
 761
 762         u8 reserved_1;          /*03h */
 763         u32 reserved_2;         /*04h */
 764
 765         u32 context;            /*08h */
 766         u32 pad_0;              /*0Ch */
 767
 768         u16 flags;              /*10h */
 769         u16 reserved_3;         /*12h */
 770         u32 reserved_4;         /*14h */
 771
 772         u32 abort_context;      /*18h */
 773         u32 pad_1;              /*1Ch */
 774
 775         u32 abort_mfi_phys_addr_lo;     /*20h */
 776         u32 abort_mfi_phys_addr_hi;     /*24h */
 777
 778         u32 reserved_5[6];      /*28h */
 779
 780 } __attribute__ ((packed));
 781
 782 struct megasas_smp_frame {
 783
 784         u8 cmd;                 /*00h */
 785         u8 reserved_1;          /*01h */
 786         u8 cmd_status;          /*02h */
 787         u8 connection_status;   /*03h */
 788
 789         u8 reserved_2[3];       /*04h */
 790         u8 sge_count;           /*07h */
 791
 792         u32 context;            /*08h */
 793         u32 pad_0;              /*0Ch */
 794
 795         u16 flags;              /*10h */
 796         u16 timeout;            /*12h */
 797
 798         u32 data_xfer_len;      /*14h */
 799         u64 sas_addr;           /*18h */
 800
 801         union {
 802                 struct megasas_sge32 sge32[2];  /* [0]: resp [1]: req */
 803                 struct megasas_sge64 sge64[2];  /* [0]: resp [1]: req */
 804         } sgl;
 805
 806 } __attribute__ ((packed));
 807
 808 struct megasas_stp_frame {
 809
 810         u8 cmd;                 /*00h */
 811         u8 reserved_1;          /*01h */
 812         u8 cmd_status;          /*02h */
 813         u8 reserved_2;          /*03h */
 814
 815         u8 target_id;           /*04h */
 816         u8 reserved_3[2];       /*05h */
 817         u8 sge_count;           /*07h */
 818
 819         u32 context;            /*08h */
 820         u32 pad_0;              /*0Ch */
 821
 822         u16 flags;              /*10h */
 823         u16 timeout;            /*12h */
 824
 825         u32 data_xfer_len;      /*14h */
 826
 827         u16 fis[10];            /*18h */
 828         u32 stp_flags;
 829
 830         union {
 831                 struct megasas_sge32 sge32[2];  /* [0]: resp [1]: data */
 832                 struct megasas_sge64 sge64[2];  /* [0]: resp [1]: data */
 833         } sgl;
 834
 835 } __attribute__ ((packed));
 836
 837 union megasas_frame {
 838
 839         struct megasas_header hdr;
 840         struct megasas_init_frame init;
 841         struct megasas_io_frame io;
 842         struct megasas_pthru_frame pthru;
 843         struct megasas_dcmd_frame dcmd;
 844         struct megasas_abort_frame abort;
 845         struct megasas_smp_frame smp;
 846         struct megasas_stp_frame stp;
 847
 848         u8 raw_bytes[64];
 849 };
 850
 851 struct megasas_cmd;
 852
 853 union megasas_evt_class_locale {
 854
 855         struct {
 856                 u16 locale;
 857                 u8 reserved;
 858                 s8 class;
 859         } __attribute__ ((packed)) members;
 860
 861         u32 word;
 862
 863 } __attribute__ ((packed));
 864
 865 struct megasas_evt_log_info {
 866         u32 newest_seq_num;
 867         u32 oldest_seq_num;
 868         u32 clear_seq_num;
 869         u32 shutdown_seq_num;
 870         u32 boot_seq_num;
 871
 872 } __attribute__ ((packed));
 873
 874 struct megasas_progress {
 875
 876         u16 progress;
 877         u16 elapsed_seconds;
 878
 879 } __attribute__ ((packed));
 880
 881 struct megasas_evtarg_ld {
 882
 883         u16 target_id;
 884         u8 ld_index;
 885         u8 reserved;
 886
 887 } __attribute__ ((packed));
 888
 889 struct megasas_evtarg_pd {
 890         u16 device_id;
 891         u8 encl_index;
 892         u8 slot_number;
 893
 894 } __attribute__ ((packed));
 895
 896 struct megasas_evt_detail {
 897
 898         u32 seq_num;
 899         u32 time_stamp;
 900         u32 code;
 901         union megasas_evt_class_locale cl;
 902         u8 arg_type;
 903         u8 reserved1[15];
 904
 905         union {
 906                 struct {
 907                         struct megasas_evtarg_pd pd;
 908                         u8 cdb_length;
 909                         u8 sense_length;
 910                         u8 reserved[2];
 911                         u8 cdb[16];
 912                         u8 sense[64];
 913                 } __attribute__ ((packed)) cdbSense;
 914
 915                 struct megasas_evtarg_ld ld;
 916
 917                 struct {
 918                         struct megasas_evtarg_ld ld;
 919                         u64 count;
 920                 } __attribute__ ((packed)) ld_count;
 921
 922                 struct {
 923                         u64 lba;
 924                         struct megasas_evtarg_ld ld;
 925                 } __attribute__ ((packed)) ld_lba;
 926
 927                 struct {
 928                         struct megasas_evtarg_ld ld;
 929                         u32 prevOwner;
 930                         u32 newOwner;
 931                 } __attribute__ ((packed)) ld_owner;
 932
 933                 struct {
 934                         u64 ld_lba;
 935                         u64 pd_lba;
 936                         struct megasas_evtarg_ld ld;
 937                         struct megasas_evtarg_pd pd;
 938                 } __attribute__ ((packed)) ld_lba_pd_lba;
 939
 940                 struct {
 941                         struct megasas_evtarg_ld ld;
 942                         struct megasas_progress prog;
 943                 } __attribute__ ((packed)) ld_prog;
 944
 945                 struct {
 946                         struct megasas_evtarg_ld ld;
 947                         u32 prev_state;
 948                         u32 new_state;
 949                 } __attribute__ ((packed)) ld_state;
 950
 951                 struct {
 952                         u64 strip;
 953                         struct megasas_evtarg_ld ld;
 954                 } __attribute__ ((packed)) ld_strip;
 955
 956                 struct megasas_evtarg_pd pd;
 957
 958                 struct {
 959                         struct megasas_evtarg_pd pd;
 960                         u32 err;
 961                 } __attribute__ ((packed)) pd_err;
 962
 963                 struct {
 964                         u64 lba;
 965                         struct megasas_evtarg_pd pd;
 966                 } __attribute__ ((packed)) pd_lba;
 967
 968                 struct {
 969                         u64 lba;
 970                         struct megasas_evtarg_pd pd;
 971                         struct megasas_evtarg_ld ld;
 972                 } __attribute__ ((packed)) pd_lba_ld;
 973
 974                 struct {
 975                         struct megasas_evtarg_pd pd;
 976                         struct megasas_progress prog;
 977                 } __attribute__ ((packed)) pd_prog;
 978
 979                 struct {
 980                         struct megasas_evtarg_pd pd;
 981                         u32 prevState;
 982                         u32 newState;
 983                 } __attribute__ ((packed)) pd_state;
 984
 985                 struct {
 986                         u16 vendorId;
 987                         u16 deviceId;
 988                         u16 subVendorId;
 989                         u16 subDeviceId;
 990                 } __attribute__ ((packed)) pci;
 991
 992                 u32 rate;
 993                 char str[96];
 994
 995                 struct {
 996                         u32 rtc;
 997                         u32 elapsedSeconds;
 998                 } __attribute__ ((packed)) time;
 999
1000                 struct {
1001                         u32 ecar;
1002                         u32 elog;
1003                         char str[64];
1004                 } __attribute__ ((packed)) ecc;
1005
1006                 u8 b[96];
1007                 u16 s[48];
1008                 u32 w[24];
1009                 u64 d[12];
1010         } args;
1011
1012         char description[128];
1013
1014 } __attribute__ ((packed));
1015
1016 struct megasas_instance {
1017
1018         u32 *producer;
1019         dma_addr_t producer_h;
1020         u32 *consumer;
1021         dma_addr_t consumer_h;
1022
1023         u32 *reply_queue;
1024         dma_addr_t reply_queue_h;
1025
1026         unsigned long base_addr;
1027         struct megasas_register_set __iomem *reg_set;
1028
1029         s8 init_id;
1030         u8 reserved[3];
1031
1032         u16 max_num_sge;
1033         u16 max_fw_cmds;
1034         u32 max_sectors_per_req;
1035
1036         struct megasas_cmd **cmd_list;
1037         struct list_head cmd_pool;
1038         spinlock_t cmd_pool_lock;
1039         struct dma_pool *frame_dma_pool;
1040         struct dma_pool *sense_dma_pool;
1041
1042         struct megasas_evt_detail *evt_detail;
1043         dma_addr_t evt_detail_h;
1044         struct megasas_cmd *aen_cmd;
1045         struct semaphore aen_mutex;
1046         struct semaphore ioctl_sem;
1047
1048         struct Scsi_Host *host;
1049
1050         wait_queue_head_t int_cmd_wait_q;
1051         wait_queue_head_t abort_cmd_wait_q;
1052
1053         struct pci_dev *pdev;
1054         u32 unique_id;
1055
1056         u32 fw_outstanding;
1057         u32 hw_crit_error;
1058         spinlock_t instance_lock;
1059 };
1060
1061 #define MEGASAS_IS_LOGICAL(scp)                                         \
1062         (scp->device->channel < MEGASAS_MAX_PD_CHANNELS) ? 0 : 1
1063
1064 #define MEGASAS_DEV_INDEX(inst, scp)                                    \
1065         ((scp->device->channel % 2) * MEGASAS_MAX_DEV_PER_CHANNEL) +    \
1066         scp->device->id
1067
1068 struct megasas_cmd {
1069
1070         union megasas_frame *frame;
1071         dma_addr_t frame_phys_addr;
1072         u8 *sense;
1073         dma_addr_t sense_phys_addr;
1074
1075         u32 index;
1076         u8 sync_cmd;
1077         u8 cmd_status;
1078         u16 abort_aen;
1079
1080         struct list_head list;
1081         struct scsi_cmnd *scmd;
1082         struct megasas_instance *instance;
1083         u32 frame_count;
1084 };
1085
1086 #define MAX_MGMT_ADAPTERS               1024
1087 #define MAX_IOCTL_SGE                   16
1088
1089 struct megasas_iocpacket {
1090
1091         u16 host_no;
1092         u16 __pad1;
1093         u32 sgl_off;
1094         u32 sge_count;
1095         u32 sense_off;
1096         u32 sense_len;
1097         union {
1098                 u8 raw[128];
1099                 struct megasas_header hdr;
1100         } frame;
1101
1102         struct iovec sgl[MAX_IOCTL_SGE];
1103
1104 } __attribute__ ((packed));
1105
1106 struct megasas_aen {
1107         u16 host_no;
1108         u16 __pad1;
1109         u32 seq_num;
1110         u32 class_locale_word;
1111 } __attribute__ ((packed));
1112
1113 #ifdef CONFIG_COMPAT
1114 struct compat_megasas_iocpacket {
1115         u16 host_no;
1116         u16 __pad1;
1117         u32 sgl_off;
1118         u32 sge_count;
1119         u32 sense_off;
1120         u32 sense_len;
1121         union {
1122                 u8 raw[128];
1123                 struct megasas_header hdr;
1124         } frame;
1125         struct compat_iovec sgl[MAX_IOCTL_SGE];
1126 } __attribute__ ((packed));
1127
1128 #define MEGASAS_IOC_FIRMWARE    _IOWR('M', 1, struct compat_megasas_iocpacket)
1129 #else
1130 #define MEGASAS_IOC_FIRMWARE    _IOWR('M', 1, struct megasas_iocpacket)
1131 #endif
1132
1133 #define MEGASAS_IOC_GET_AEN     _IOW('M', 3, struct megasas_aen)
1134
1135 struct megasas_mgmt_info {
1136
1137         u16 count;
1138         struct megasas_instance *instance[MAX_MGMT_ADAPTERS];
1139         int max_index;
1140 };
1141
1142 #endif                          /*LSI_MEGARAID_SAS_H */