drivers/scsi/megaraid/megaraid_sas.h

   1 /*
   2  *
   3  *              Linux MegaRAID driver for SAS based RAID controllers
   4  *
   5  * Copyright (c) 2003-2005  LSI Corporation.
   6  *
   7  *              This program is free software; you can redistribute it and/or
   8  *              modify it under the terms of the GNU General Public License
   9  *              as published by the Free Software Foundation; either version
  10  *              2 of the License, or (at your option) any later version.
  11  *
  12  * FILE         : megaraid_sas.h
  13  */
  14
  15 #ifndef LSI_MEGARAID_SAS_H
  16 #define LSI_MEGARAID_SAS_H
  17
  18 /*
  19  * MegaRAID SAS Driver meta data
  20  */
  21 #define MEGASAS_VERSION                 "00.00.04.17.1-rc1"
  22 #define MEGASAS_RELDATE                 "Oct. 29, 2009"
  23 #define MEGASAS_EXT_VERSION             "Thu. Oct. 29, 11:41:51 PST 2009"
  24
  25 /*
  26  * Device IDs
  27  */
  28 #define PCI_DEVICE_ID_LSI_SAS1078R              0x0060
  29 #define PCI_DEVICE_ID_LSI_SAS1078DE             0x007C
  30 #define PCI_DEVICE_ID_LSI_VERDE_ZCR             0x0413
  31 #define PCI_DEVICE_ID_LSI_SAS1078GEN2           0x0078
  32 #define PCI_DEVICE_ID_LSI_SAS0079GEN2           0x0079
  33 #define PCI_DEVICE_ID_LSI_SAS0073SKINNY         0x0073
  34 #define PCI_DEVICE_ID_LSI_SAS0071SKINNY         0x0071
  35
  36 /*
  37  * =====================================
  38  * MegaRAID SAS MFI firmware definitions
  39  * =====================================
  40  */
  41
  42 /*
  43  * MFI stands for  MegaRAID SAS FW Interface. This is just a moniker for
  44  * protocol between the software and firmware. Commands are issued using
  45  * "message frames"
  46  */
  47
  48 /*
  49  * FW posts its state in upper 4 bits of outbound_msg_0 register
  50  */
  51 #define MFI_STATE_MASK                          0xF0000000
  52 #define MFI_STATE_UNDEFINED                     0x00000000
  53 #define MFI_STATE_BB_INIT                       0x10000000
  54 #define MFI_STATE_FW_INIT                       0x40000000
  55 #define MFI_STATE_WAIT_HANDSHAKE                0x60000000
  56 #define MFI_STATE_FW_INIT_2                     0x70000000
  57 #define MFI_STATE_DEVICE_SCAN                   0x80000000
  58 #define MFI_STATE_BOOT_MESSAGE_PENDING          0x90000000
  59 #define MFI_STATE_FLUSH_CACHE                   0xA0000000
  60 #define MFI_STATE_READY                         0xB0000000
  61 #define MFI_STATE_OPERATIONAL                   0xC0000000
  62 #define MFI_STATE_FAULT                         0xF0000000
  63
  64 #define MEGAMFI_FRAME_SIZE                      64
  65
  66 /*
  67  * During FW init, clear pending cmds & reset state using inbound_msg_0
  68  *
  69  * ABORT        : Abort all pending cmds
  70  * READY        : Move from OPERATIONAL to READY state; discard queue info
  71  * MFIMODE      : Discard (possible) low MFA posted in 64-bit mode (??)
  72  * CLR_HANDSHAKE: FW is waiting for HANDSHAKE from BIOS or Driver
  73  * HOTPLUG      : Resume from Hotplug
  74  * MFI_STOP_ADP : Send signal to FW to stop processing
  75  */
  76 #define MFI_INIT_ABORT                          0x00000001
  77 #define MFI_INIT_READY                          0x00000002
  78 #define MFI_INIT_MFIMODE                        0x00000004
  79 #define MFI_INIT_CLEAR_HANDSHAKE                0x00000008
  80 #define MFI_INIT_HOTPLUG                        0x00000010
  81 #define MFI_STOP_ADP                            0x00000020
  82 #define MFI_RESET_FLAGS                         MFI_INIT_READY| \
  83                                                 MFI_INIT_MFIMODE| \
  84                                                 MFI_INIT_ABORT
  85
  86 /*
  87  * MFI frame flags
  88  */
  89 #define MFI_FRAME_POST_IN_REPLY_QUEUE           0x0000
  90 #define MFI_FRAME_DONT_POST_IN_REPLY_QUEUE      0x0001
  91 #define MFI_FRAME_SGL32                         0x0000
  92 #define MFI_FRAME_SGL64                         0x0002
  93 #define MFI_FRAME_SENSE32                       0x0000
  94 #define MFI_FRAME_SENSE64                       0x0004
  95 #define MFI_FRAME_DIR_NONE                      0x0000
  96 #define MFI_FRAME_DIR_WRITE                     0x0008
  97 #define MFI_FRAME_DIR_READ                      0x0010
  98 #define MFI_FRAME_DIR_BOTH                      0x0018
  99 #define MFI_FRAME_IEEE                          0x0020
 100
 101 /*
 102  * Definition for cmd_status
 103  */
 104 #define MFI_CMD_STATUS_POLL_MODE                0xFF
 105
 106 /*
 107  * MFI command opcodes
 108  */
 109 #define MFI_CMD_INIT                            0x00
 110 #define MFI_CMD_LD_READ                         0x01
 111 #define MFI_CMD_LD_WRITE                        0x02
 112 #define MFI_CMD_LD_SCSI_IO                      0x03
 113 #define MFI_CMD_PD_SCSI_IO                      0x04
 114 #define MFI_CMD_DCMD                            0x05
 115 #define MFI_CMD_ABORT                           0x06
 116 #define MFI_CMD_SMP                             0x07
 117 #define MFI_CMD_STP                             0x08
 118
 119 #define MR_DCMD_CTRL_GET_INFO                   0x01010000
 120 #define MR_DCMD_LD_GET_LIST                     0x03010000
 121
 122 #define MR_DCMD_CTRL_CACHE_FLUSH                0x01101000
 123 #define MR_FLUSH_CTRL_CACHE                     0x01
 124 #define MR_FLUSH_DISK_CACHE                     0x02
 125
 126 #define MR_DCMD_CTRL_SHUTDOWN                   0x01050000
 127 #define MR_DCMD_HIBERNATE_SHUTDOWN              0x01060000
 128 #define MR_ENABLE_DRIVE_SPINDOWN                0x01
 129
 130 #define MR_DCMD_CTRL_EVENT_GET_INFO             0x01040100
 131 #define MR_DCMD_CTRL_EVENT_GET                  0x01040300
 132 #define MR_DCMD_CTRL_EVENT_WAIT                 0x01040500
 133 #define MR_DCMD_LD_GET_PROPERTIES               0x03030000
 134
 135 #define MR_DCMD_CLUSTER                         0x08000000
 136 #define MR_DCMD_CLUSTER_RESET_ALL               0x08010100
 137 #define MR_DCMD_CLUSTER_RESET_LD                0x08010200
 138 #define MR_DCMD_PD_LIST_QUERY                   0x02010100
 139
 140 /*
 141  * MFI command completion codes
 142  */
 143 enum MFI_STAT {
 144         MFI_STAT_OK = 0x00,
 145         MFI_STAT_INVALID_CMD = 0x01,
 146         MFI_STAT_INVALID_DCMD = 0x02,
 147         MFI_STAT_INVALID_PARAMETER = 0x03,
 148         MFI_STAT_INVALID_SEQUENCE_NUMBER = 0x04,
 149         MFI_STAT_ABORT_NOT_POSSIBLE = 0x05,
 150         MFI_STAT_APP_HOST_CODE_NOT_FOUND = 0x06,
 151         MFI_STAT_APP_IN_USE = 0x07,
 152         MFI_STAT_APP_NOT_INITIALIZED = 0x08,
 153         MFI_STAT_ARRAY_INDEX_INVALID = 0x09,
 154         MFI_STAT_ARRAY_ROW_NOT_EMPTY = 0x0a,
 155         MFI_STAT_CONFIG_RESOURCE_CONFLICT = 0x0b,
 156         MFI_STAT_DEVICE_NOT_FOUND = 0x0c,
 157         MFI_STAT_DRIVE_TOO_SMALL = 0x0d,
 158         MFI_STAT_FLASH_ALLOC_FAIL = 0x0e,
 159         MFI_STAT_FLASH_BUSY = 0x0f,
 160         MFI_STAT_FLASH_ERROR = 0x10,
 161         MFI_STAT_FLASH_IMAGE_BAD = 0x11,
 162         MFI_STAT_FLASH_IMAGE_INCOMPLETE = 0x12,
 163         MFI_STAT_FLASH_NOT_OPEN = 0x13,
 164         MFI_STAT_FLASH_NOT_STARTED = 0x14,
 165         MFI_STAT_FLUSH_FAILED = 0x15,
 166         MFI_STAT_HOST_CODE_NOT_FOUNT = 0x16,
 167         MFI_STAT_LD_CC_IN_PROGRESS = 0x17,
 168         MFI_STAT_LD_INIT_IN_PROGRESS = 0x18,
 169         MFI_STAT_LD_LBA_OUT_OF_RANGE = 0x19,
 170         MFI_STAT_LD_MAX_CONFIGURED = 0x1a,
 171         MFI_STAT_LD_NOT_OPTIMAL = 0x1b,
 172         MFI_STAT_LD_RBLD_IN_PROGRESS = 0x1c,
 173         MFI_STAT_LD_RECON_IN_PROGRESS = 0x1d,
 174         MFI_STAT_LD_WRONG_RAID_LEVEL = 0x1e,
 175         MFI_STAT_MAX_SPARES_EXCEEDED = 0x1f,
 176         MFI_STAT_MEMORY_NOT_AVAILABLE = 0x20,
 177         MFI_STAT_MFC_HW_ERROR = 0x21,
 178         MFI_STAT_NO_HW_PRESENT = 0x22,
 179         MFI_STAT_NOT_FOUND = 0x23,
 180         MFI_STAT_NOT_IN_ENCL = 0x24,
 181         MFI_STAT_PD_CLEAR_IN_PROGRESS = 0x25,
 182         MFI_STAT_PD_TYPE_WRONG = 0x26,
 183         MFI_STAT_PR_DISABLED = 0x27,
 184         MFI_STAT_ROW_INDEX_INVALID = 0x28,
 185         MFI_STAT_SAS_CONFIG_INVALID_ACTION = 0x29,
 186         MFI_STAT_SAS_CONFIG_INVALID_DATA = 0x2a,
 187         MFI_STAT_SAS_CONFIG_INVALID_PAGE = 0x2b,
 188         MFI_STAT_SAS_CONFIG_INVALID_TYPE = 0x2c,
 189         MFI_STAT_SCSI_DONE_WITH_ERROR = 0x2d,
 190         MFI_STAT_SCSI_IO_FAILED = 0x2e,
 191         MFI_STAT_SCSI_RESERVATION_CONFLICT = 0x2f,
 192         MFI_STAT_SHUTDOWN_FAILED = 0x30,
 193         MFI_STAT_TIME_NOT_SET = 0x31,
 194         MFI_STAT_WRONG_STATE = 0x32,
 195         MFI_STAT_LD_OFFLINE = 0x33,
 196         MFI_STAT_PEER_NOTIFICATION_REJECTED = 0x34,
 197         MFI_STAT_PEER_NOTIFICATION_FAILED = 0x35,
 198         MFI_STAT_RESERVATION_IN_PROGRESS = 0x36,
 199         MFI_STAT_I2C_ERRORS_DETECTED = 0x37,
 200         MFI_STAT_PCI_ERRORS_DETECTED = 0x38,
 201
 202         MFI_STAT_INVALID_STATUS = 0xFF
 203 };
 204
 205 /*
 206  * Number of mailbox bytes in DCMD message frame
 207  */
 208 #define MFI_MBOX_SIZE                           12
 209
 210 enum MR_EVT_CLASS {
 211
 212         MR_EVT_CLASS_DEBUG = -2,
 213         MR_EVT_CLASS_PROGRESS = -1,
 214         MR_EVT_CLASS_INFO = 0,
 215         MR_EVT_CLASS_WARNING = 1,
 216         MR_EVT_CLASS_CRITICAL = 2,
 217         MR_EVT_CLASS_FATAL = 3,
 218         MR_EVT_CLASS_DEAD = 4,
 219
 220 };
 221
 222 enum MR_EVT_LOCALE {
 223
 224         MR_EVT_LOCALE_LD = 0x0001,
 225         MR_EVT_LOCALE_PD = 0x0002,
 226         MR_EVT_LOCALE_ENCL = 0x0004,
 227         MR_EVT_LOCALE_BBU = 0x0008,
 228         MR_EVT_LOCALE_SAS = 0x0010,
 229         MR_EVT_LOCALE_CTRL = 0x0020,
 230         MR_EVT_LOCALE_CONFIG = 0x0040,
 231         MR_EVT_LOCALE_CLUSTER = 0x0080,
 232         MR_EVT_LOCALE_ALL = 0xffff,
 233
 234 };
 235
 236 enum MR_EVT_ARGS {
 237
 238         MR_EVT_ARGS_NONE,
 239         MR_EVT_ARGS_CDB_SENSE,
 240         MR_EVT_ARGS_LD,
 241         MR_EVT_ARGS_LD_COUNT,
 242         MR_EVT_ARGS_LD_LBA,
 243         MR_EVT_ARGS_LD_OWNER,
 244         MR_EVT_ARGS_LD_LBA_PD_LBA,
 245         MR_EVT_ARGS_LD_PROG,
 246         MR_EVT_ARGS_LD_STATE,
 247         MR_EVT_ARGS_LD_STRIP,
 248         MR_EVT_ARGS_PD,
 249         MR_EVT_ARGS_PD_ERR,
 250         MR_EVT_ARGS_PD_LBA,
 251         MR_EVT_ARGS_PD_LBA_LD,
 252         MR_EVT_ARGS_PD_PROG,
 253         MR_EVT_ARGS_PD_STATE,
 254         MR_EVT_ARGS_PCI,
 255         MR_EVT_ARGS_RATE,
 256         MR_EVT_ARGS_STR,
 257         MR_EVT_ARGS_TIME,
 258         MR_EVT_ARGS_ECC,
 259         MR_EVT_ARGS_LD_PROP,
 260         MR_EVT_ARGS_PD_SPARE,
 261         MR_EVT_ARGS_PD_INDEX,
 262         MR_EVT_ARGS_DIAG_PASS,
 263         MR_EVT_ARGS_DIAG_FAIL,
 264         MR_EVT_ARGS_PD_LBA_LBA,
 265         MR_EVT_ARGS_PORT_PHY,
 266         MR_EVT_ARGS_PD_MISSING,
 267         MR_EVT_ARGS_PD_ADDRESS,
 268         MR_EVT_ARGS_BITMAP,
 269         MR_EVT_ARGS_CONNECTOR,
 270         MR_EVT_ARGS_PD_PD,
 271         MR_EVT_ARGS_PD_FRU,
 272         MR_EVT_ARGS_PD_PATHINFO,
 273         MR_EVT_ARGS_PD_POWER_STATE,
 274         MR_EVT_ARGS_GENERIC,
 275 };
 276
 277 /*
 278  * define constants for device list query options
 279  */
 280 enum MR_PD_QUERY_TYPE {
 281         MR_PD_QUERY_TYPE_ALL                = 0,
 282         MR_PD_QUERY_TYPE_STATE              = 1,
 283         MR_PD_QUERY_TYPE_POWER_STATE        = 2,
 284         MR_PD_QUERY_TYPE_MEDIA_TYPE         = 3,
 285         MR_PD_QUERY_TYPE_SPEED              = 4,
 286         MR_PD_QUERY_TYPE_EXPOSED_TO_HOST    = 5,
 287 };
 288
 289 #define MR_EVT_CFG_CLEARED                              0x0004
 290 #define MR_EVT_LD_STATE_CHANGE                          0x0051
 291 #define MR_EVT_PD_INSERTED                              0x005b
 292 #define MR_EVT_PD_REMOVED                               0x0070
 293 #define MR_EVT_LD_CREATED                               0x008a
 294 #define MR_EVT_LD_DELETED                               0x008b
 295 #define MR_EVT_FOREIGN_CFG_IMPORTED                     0x00db
 296 #define MR_EVT_LD_OFFLINE                               0x00fc
 297 #define MR_EVT_CTRL_HOST_BUS_SCAN_REQUESTED             0x0152
 298 #define MAX_LOGICAL_DRIVES                              64
 299
 300 enum MR_PD_STATE {
 301         MR_PD_STATE_UNCONFIGURED_GOOD   = 0x00,
 302         MR_PD_STATE_UNCONFIGURED_BAD    = 0x01,
 303         MR_PD_STATE_HOT_SPARE           = 0x02,
 304         MR_PD_STATE_OFFLINE             = 0x10,
 305         MR_PD_STATE_FAILED              = 0x11,
 306         MR_PD_STATE_REBUILD             = 0x14,
 307         MR_PD_STATE_ONLINE              = 0x18,
 308         MR_PD_STATE_COPYBACK            = 0x20,
 309         MR_PD_STATE_SYSTEM              = 0x40,
 310  };
 311
 312
 313  /*
 314  * defines the physical drive address structure
 315  */
 316 struct MR_PD_ADDRESS {
 317         u16     deviceId;
 318         u16     enclDeviceId;
 319
 320         union {
 321                 struct {
 322                         u8  enclIndex;
 323                         u8  slotNumber;
 324                 } mrPdAddress;
 325                 struct {
 326                         u8  enclPosition;
 327                         u8  enclConnectorIndex;
 328                 } mrEnclAddress;
 329         };
 330         u8      scsiDevType;
 331         union {
 332                 u8      connectedPortBitmap;
 333                 u8      connectedPortNumbers;
 334         };
 335         u64     sasAddr[2];
 336 } __packed;
 337
 338 /*
 339  * defines the physical drive list structure
 340  */
 341 struct MR_PD_LIST {
 342         u32             size;
 343         u32             count;
 344         struct MR_PD_ADDRESS   addr[1];
 345 } __packed;
 346
 347 struct megasas_pd_list {
 348         u16             tid;
 349         u8             driveType;
 350         u8             driveState;
 351 } __packed;
 352
 353  /*
 354  * defines the logical drive reference structure
 355  */
 356 union  MR_LD_REF {
 357         struct {
 358                 u8      targetId;
 359                 u8      reserved;
 360                 u16     seqNum;
 361         };
 362         u32     ref;
 363 } __packed;
 364
 365 /*
 366  * defines the logical drive list structure
 367  */
 368 struct MR_LD_LIST {
 369         u32     ldCount;
 370         u32     reserved;
 371         struct {
 372                 union MR_LD_REF   ref;
 373                 u8          state;
 374                 u8          reserved[3];
 375                 u64         size;
 376         } ldList[MAX_LOGICAL_DRIVES];
 377 } __packed;
 378
 379 /*
 380  * SAS controller properties
 381  */
 382 struct megasas_ctrl_prop {
 383
 384         u16 seq_num;
 385         u16 pred_fail_poll_interval;
 386         u16 intr_throttle_count;
 387         u16 intr_throttle_timeouts;
 388         u8 rebuild_rate;
 389         u8 patrol_read_rate;
 390         u8 bgi_rate;
 391         u8 cc_rate;
 392         u8 recon_rate;
 393         u8 cache_flush_interval;
 394         u8 spinup_drv_count;
 395         u8 spinup_delay;
 396         u8 cluster_enable;
 397         u8 coercion_mode;
 398         u8 alarm_enable;
 399         u8 disable_auto_rebuild;
 400         u8 disable_battery_warn;
 401         u8 ecc_bucket_size;
 402         u16 ecc_bucket_leak_rate;
 403         u8 restore_hotspare_on_insertion;
 404         u8 expose_encl_devices;
 405         u8 reserved[38];
 406
 407 } __packed;
 408
 409 /*
 410  * SAS controller information
 411  */
 412 struct megasas_ctrl_info {
 413
 414         /*
 415          * PCI device information
 416          */
 417         struct {
 418
 419                 u16 vendor_id;
 420                 u16 device_id;
 421                 u16 sub_vendor_id;
 422                 u16 sub_device_id;
 423                 u8 reserved[24];
 424
 425         } __attribute__ ((packed)) pci;
 426
 427         /*
 428          * Host interface information
 429          */
 430         struct {
 431
 432                 u8 PCIX:1;
 433                 u8 PCIE:1;
 434                 u8 iSCSI:1;
 435                 u8 SAS_3G:1;
 436                 u8 reserved_0:4;
 437                 u8 reserved_1[6];
 438                 u8 port_count;
 439                 u64 port_addr[8];
 440
 441         } __attribute__ ((packed)) host_interface;
 442
 443         /*
 444          * Device (backend) interface information
 445          */
 446         struct {
 447
 448                 u8 SPI:1;
 449                 u8 SAS_3G:1;
 450                 u8 SATA_1_5G:1;
 451                 u8 SATA_3G:1;
 452                 u8 reserved_0:4;
 453                 u8 reserved_1[6];
 454                 u8 port_count;
 455                 u64 port_addr[8];
 456
 457         } __attribute__ ((packed)) device_interface;
 458
 459         /*
 460          * List of components residing in flash. All str are null terminated
 461          */
 462         u32 image_check_word;
 463         u32 image_component_count;
 464
 465         struct {
 466
 467                 char name[8];
 468                 char version[32];
 469                 char build_date[16];
 470                 char built_time[16];
 471
 472         } __attribute__ ((packed)) image_component[8];
 473
 474         /*
 475          * List of flash components that have been flashed on the card, but
 476          * are not in use, pending reset of the adapter. This list will be
 477          * empty if a flash operation has not occurred. All stings are null
 478          * terminated
 479          */
 480         u32 pending_image_component_count;
 481
 482         struct {
 483
 484                 char name[8];
 485                 char version[32];
 486                 char build_date[16];
 487                 char build_time[16];
 488
 489         } __attribute__ ((packed)) pending_image_component[8];
 490
 491         u8 max_arms;
 492         u8 max_spans;
 493         u8 max_arrays;
 494         u8 max_lds;
 495
 496         char product_name[80];
 497         char serial_no[32];
 498
 499         /*
 500          * Other physical/controller/operation information. Indicates the
 501          * presence of the hardware
 502          */
 503         struct {
 504
 505                 u32 bbu:1;
 506                 u32 alarm:1;
 507                 u32 nvram:1;
 508                 u32 uart:1;
 509                 u32 reserved:28;
 510
 511         } __attribute__ ((packed)) hw_present;
 512
 513         u32 current_fw_time;
 514
 515         /*
 516          * Maximum data transfer sizes
 517          */
 518         u16 max_concurrent_cmds;
 519         u16 max_sge_count;
 520         u32 max_request_size;
 521
 522         /*
 523          * Logical and physical device counts
 524          */
 525         u16 ld_present_count;
 526         u16 ld_degraded_count;
 527         u16 ld_offline_count;
 528
 529         u16 pd_present_count;
 530         u16 pd_disk_present_count;
 531         u16 pd_disk_pred_failure_count;
 532         u16 pd_disk_failed_count;
 533
 534         /*
 535          * Memory size information
 536          */
 537         u16 nvram_size;
 538         u16 memory_size;
 539         u16 flash_size;
 540
 541         /*
 542          * Error counters
 543          */
 544         u16 mem_correctable_error_count;
 545         u16 mem_uncorrectable_error_count;
 546
 547         /*
 548          * Cluster information
 549          */
 550         u8 cluster_permitted;
 551         u8 cluster_active;
 552
 553         /*
 554          * Additional max data transfer sizes
 555          */
 556         u16 max_strips_per_io;
 557
 558         /*
 559          * Controller capabilities structures
 560          */
 561         struct {
 562
 563                 u32 raid_level_0:1;
 564                 u32 raid_level_1:1;
 565                 u32 raid_level_5:1;
 566                 u32 raid_level_1E:1;
 567                 u32 raid_level_6:1;
 568                 u32 reserved:27;
 569
 570         } __attribute__ ((packed)) raid_levels;
 571
 572         struct {
 573
 574                 u32 rbld_rate:1;
 575                 u32 cc_rate:1;
 576                 u32 bgi_rate:1;
 577                 u32 recon_rate:1;
 578                 u32 patrol_rate:1;
 579                 u32 alarm_control:1;
 580                 u32 cluster_supported:1;
 581                 u32 bbu:1;
 582                 u32 spanning_allowed:1;
 583                 u32 dedicated_hotspares:1;
 584                 u32 revertible_hotspares:1;
 585                 u32 foreign_config_import:1;
 586                 u32 self_diagnostic:1;
 587                 u32 mixed_redundancy_arr:1;
 588                 u32 global_hot_spares:1;
 589                 u32 reserved:17;
 590
 591         } __attribute__ ((packed)) adapter_operations;
 592
 593         struct {
 594
 595                 u32 read_policy:1;
 596                 u32 write_policy:1;
 597                 u32 io_policy:1;
 598                 u32 access_policy:1;
 599                 u32 disk_cache_policy:1;
 600                 u32 reserved:27;
 601
 602         } __attribute__ ((packed)) ld_operations;
 603
 604         struct {
 605
 606                 u8 min;
 607                 u8 max;
 608                 u8 reserved[2];
 609
 610         } __attribute__ ((packed)) stripe_sz_ops;
 611
 612         struct {
 613
 614                 u32 force_online:1;
 615                 u32 force_offline:1;
 616                 u32 force_rebuild:1;
 617                 u32 reserved:29;
 618
 619         } __attribute__ ((packed)) pd_operations;
 620
 621         struct {
 622
 623                 u32 ctrl_supports_sas:1;
 624                 u32 ctrl_supports_sata:1;
 625                 u32 allow_mix_in_encl:1;
 626                 u32 allow_mix_in_ld:1;
 627                 u32 allow_sata_in_cluster:1;
 628                 u32 reserved:27;
 629
 630         } __attribute__ ((packed)) pd_mix_support;
 631
 632         /*
 633          * Define ECC single-bit-error bucket information
 634          */
 635         u8 ecc_bucket_count;
 636         u8 reserved_2[11];
 637
 638         /*
 639          * Include the controller properties (changeable items)
 640          */
 641         struct megasas_ctrl_prop properties;
 642
 643         /*
 644          * Define FW pkg version (set in envt v'bles on OEM basis)
 645          */
 646         char package_version[0x60];
 647
 648         u8 pad[0x800 - 0x6a0];
 649
 650 } __packed;
 651
 652 /*
 653  * ===============================
 654  * MegaRAID SAS driver definitions
 655  * ===============================
 656  */
 657 #define MEGASAS_MAX_PD_CHANNELS                 2
 658 #define MEGASAS_MAX_LD_CHANNELS                 2
 659 #define MEGASAS_MAX_CHANNELS                    (MEGASAS_MAX_PD_CHANNELS + \
 660                                                 MEGASAS_MAX_LD_CHANNELS)
 661 #define MEGASAS_MAX_DEV_PER_CHANNEL             128
 662 #define MEGASAS_DEFAULT_INIT_ID                 -1
 663 #define MEGASAS_MAX_LUN                         8
 664 #define MEGASAS_MAX_LD                          64
 665 #define MEGASAS_MAX_PD                          (MEGASAS_MAX_PD_CHANNELS * \
 666                                                 MEGASAS_MAX_DEV_PER_CHANNEL)
 667 #define MEGASAS_MAX_LD_IDS                      (MEGASAS_MAX_LD_CHANNELS * \
 668                                                 MEGASAS_MAX_DEV_PER_CHANNEL)
 669
 670 #define MEGASAS_DBG_LVL                         1
 671
 672 #define MEGASAS_FW_BUSY                         1
 673
 674 /* Frame Type */
 675 #define IO_FRAME                                0
 676 #define PTHRU_FRAME                             1
 677
 678 /*
 679  * When SCSI mid-layer calls driver's reset routine, driver waits for
 680  * MEGASAS_RESET_WAIT_TIME seconds for all outstanding IO to complete. Note
 681  * that the driver cannot _actually_ abort or reset pending commands. While
 682  * it is waiting for the commands to complete, it prints a diagnostic message
 683  * every MEGASAS_RESET_NOTICE_INTERVAL seconds
 684  */
 685 #define MEGASAS_RESET_WAIT_TIME                 180
 686 #define MEGASAS_INTERNAL_CMD_WAIT_TIME          180
 687 #define MEGASAS_RESET_NOTICE_INTERVAL           5
 688 #define MEGASAS_IOCTL_CMD                       0
 689 #define MEGASAS_DEFAULT_CMD_TIMEOUT             90
 690
 691 /*
 692  * FW reports the maximum of number of commands that it can accept (maximum
 693  * commands that can be outstanding) at any time. The driver must report a
 694  * lower number to the mid layer because it can issue a few internal commands
 695  * itself (E.g, AEN, abort cmd, IOCTLs etc). The number of commands it needs
 696  * is shown below
 697  */
 698 #define MEGASAS_INT_CMDS                        32
 699 #define MEGASAS_SKINNY_INT_CMDS                 5
 700
 701 /*
 702  * FW can accept both 32 and 64 bit SGLs. We want to allocate 32/64 bit
 703  * SGLs based on the size of dma_addr_t
 704  */
 705 #define IS_DMA64                                (sizeof(dma_addr_t) == 8)
 706
 707 #define MFI_OB_INTR_STATUS_MASK                 0x00000002
 708 #define MFI_POLL_TIMEOUT_SECS                   60
 709 #define MEGASAS_COMPLETION_TIMER_INTERVAL      (HZ/10)
 710
 711 #define MFI_REPLY_1078_MESSAGE_INTERRUPT        0x80000000
 712 #define MFI_REPLY_GEN2_MESSAGE_INTERRUPT        0x00000001
 713 #define MFI_GEN2_ENABLE_INTERRUPT_MASK          (0x00000001 | 0x00000004)
 714 #define MFI_REPLY_SKINNY_MESSAGE_INTERRUPT      0x40000000
 715 #define MFI_SKINNY_ENABLE_INTERRUPT_MASK        (0x00000001)
 716
 717 /*
 718 * register set for both 1068 and 1078 controllers
 719 * structure extended for 1078 registers
 720 */
 721
 722 struct megasas_register_set {
 723         u32     reserved_0[4];                  /*0000h*/
 724
 725         u32     inbound_msg_0;                  /*0010h*/
 726         u32     inbound_msg_1;                  /*0014h*/
 727         u32     outbound_msg_0;                 /*0018h*/
 728         u32     outbound_msg_1;                 /*001Ch*/
 729
 730         u32     inbound_doorbell;               /*0020h*/
 731         u32     inbound_intr_status;            /*0024h*/
 732         u32     inbound_intr_mask;              /*0028h*/
 733
 734         u32     outbound_doorbell;              /*002Ch*/
 735         u32     outbound_intr_status;           /*0030h*/
 736         u32     outbound_intr_mask;             /*0034h*/
 737
 738         u32     reserved_1[2];                  /*0038h*/
 739
 740         u32     inbound_queue_port;             /*0040h*/
 741         u32     outbound_queue_port;            /*0044h*/
 742
 743         u32     reserved_2[22];                 /*0048h*/
 744
 745         u32     outbound_doorbell_clear;        /*00A0h*/
 746
 747         u32     reserved_3[3];                  /*00A4h*/
 748
 749         u32     outbound_scratch_pad ;          /*00B0h*/
 750
 751         u32     reserved_4[3];                  /*00B4h*/
 752
 753         u32     inbound_low_queue_port ;        /*00C0h*/
 754
 755         u32     inbound_high_queue_port ;       /*00C4h*/
 756
 757         u32     reserved_5;                     /*00C8h*/
 758         u32     index_registers[820];           /*00CCh*/
 759
 760 } __attribute__ ((packed));
 761
 762 struct megasas_sge32 {
 763
 764         u32 phys_addr;
 765         u32 length;
 766
 767 } __attribute__ ((packed));
 768
 769 struct megasas_sge64 {
 770
 771         u64 phys_addr;
 772         u32 length;
 773
 774 } __attribute__ ((packed));
 775
 776 struct megasas_sge_skinny {
 777         u64 phys_addr;
 778         u32 length;
 779         u32 flag;
 780 } __packed;
 781
 782 union megasas_sgl {
 783
 784         struct megasas_sge32 sge32[1];
 785         struct megasas_sge64 sge64[1];
 786         struct megasas_sge_skinny sge_skinny[1];
 787
 788 } __attribute__ ((packed));
 789
 790 struct megasas_header {
 791
 792         u8 cmd;                 /*00h */
 793         u8 sense_len;           /*01h */
 794         u8 cmd_status;          /*02h */
 795         u8 scsi_status;         /*03h */
 796
 797         u8 target_id;           /*04h */
 798         u8 lun;                 /*05h */
 799         u8 cdb_len;             /*06h */
 800         u8 sge_count;           /*07h */
 801
 802         u32 context;            /*08h */
 803         u32 pad_0;              /*0Ch */
 804
 805         u16 flags;              /*10h */
 806         u16 timeout;            /*12h */
 807         u32 data_xferlen;       /*14h */
 808
 809 } __attribute__ ((packed));
 810
 811 union megasas_sgl_frame {
 812
 813         struct megasas_sge32 sge32[8];
 814         struct megasas_sge64 sge64[5];
 815
 816 } __attribute__ ((packed));
 817
 818 struct megasas_init_frame {
 819
 820         u8 cmd;                 /*00h */
 821         u8 reserved_0;          /*01h */
 822         u8 cmd_status;          /*02h */
 823
 824         u8 reserved_1;          /*03h */
 825         u32 reserved_2;         /*04h */
 826
 827         u32 context;            /*08h */
 828         u32 pad_0;              /*0Ch */
 829
 830         u16 flags;              /*10h */
 831         u16 reserved_3;         /*12h */
 832         u32 data_xfer_len;      /*14h */
 833
 834         u32 queue_info_new_phys_addr_lo;        /*18h */
 835         u32 queue_info_new_phys_addr_hi;        /*1Ch */
 836         u32 queue_info_old_phys_addr_lo;        /*20h */
 837         u32 queue_info_old_phys_addr_hi;        /*24h */
 838
 839         u32 reserved_4[6];      /*28h */
 840
 841 } __attribute__ ((packed));
 842
 843 struct megasas_init_queue_info {
 844
 845         u32 init_flags;         /*00h */
 846         u32 reply_queue_entries;        /*04h */
 847
 848         u32 reply_queue_start_phys_addr_lo;     /*08h */
 849         u32 reply_queue_start_phys_addr_hi;     /*0Ch */
 850         u32 producer_index_phys_addr_lo;        /*10h */
 851         u32 producer_index_phys_addr_hi;        /*14h */
 852         u32 consumer_index_phys_addr_lo;        /*18h */
 853         u32 consumer_index_phys_addr_hi;        /*1Ch */
 854
 855 } __attribute__ ((packed));
 856
 857 struct megasas_io_frame {
 858
 859         u8 cmd;                 /*00h */
 860         u8 sense_len;           /*01h */
 861         u8 cmd_status;          /*02h */
 862         u8 scsi_status;         /*03h */
 863
 864         u8 target_id;           /*04h */
 865         u8 access_byte;         /*05h */
 866         u8 reserved_0;          /*06h */
 867         u8 sge_count;           /*07h */
 868
 869         u32 context;            /*08h */
 870         u32 pad_0;              /*0Ch */
 871
 872         u16 flags;              /*10h */
 873         u16 timeout;            /*12h */
 874         u32 lba_count;          /*14h */
 875
 876         u32 sense_buf_phys_addr_lo;     /*18h */
 877         u32 sense_buf_phys_addr_hi;     /*1Ch */
 878
 879         u32 start_lba_lo;       /*20h */
 880         u32 start_lba_hi;       /*24h */
 881
 882         union megasas_sgl sgl;  /*28h */
 883
 884 } __attribute__ ((packed));
 885
 886 struct megasas_pthru_frame {
 887
 888         u8 cmd;                 /*00h */
 889         u8 sense_len;           /*01h */
 890         u8 cmd_status;          /*02h */
 891         u8 scsi_status;         /*03h */
 892
 893         u8 target_id;           /*04h */
 894         u8 lun;                 /*05h */
 895         u8 cdb_len;             /*06h */
 896         u8 sge_count;           /*07h */
 897
 898         u32 context;            /*08h */
 899         u32 pad_0;              /*0Ch */
 900
 901         u16 flags;              /*10h */
 902         u16 timeout;            /*12h */
 903         u32 data_xfer_len;      /*14h */
 904
 905         u32 sense_buf_phys_addr_lo;     /*18h */
 906         u32 sense_buf_phys_addr_hi;     /*1Ch */
 907
 908         u8 cdb[16];             /*20h */
 909         union megasas_sgl sgl;  /*30h */
 910
 911 } __attribute__ ((packed));
 912
 913 struct megasas_dcmd_frame {
 914
 915         u8 cmd;                 /*00h */
 916         u8 reserved_0;          /*01h */
 917         u8 cmd_status;          /*02h */
 918         u8 reserved_1[4];       /*03h */
 919         u8 sge_count;           /*07h */
 920
 921         u32 context;            /*08h */
 922         u32 pad_0;              /*0Ch */
 923
 924         u16 flags;              /*10h */
 925         u16 timeout;            /*12h */
 926
 927         u32 data_xfer_len;      /*14h */
 928         u32 opcode;             /*18h */
 929
 930         union {                 /*1Ch */
 931                 u8 b[12];
 932                 u16 s[6];
 933                 u32 w[3];
 934         } mbox;
 935
 936         union megasas_sgl sgl;  /*28h */
 937
 938 } __attribute__ ((packed));
 939
 940 struct megasas_abort_frame {
 941
 942         u8 cmd;                 /*00h */
 943         u8 reserved_0;          /*01h */
 944         u8 cmd_status;          /*02h */
 945
 946         u8 reserved_1;          /*03h */
 947         u32 reserved_2;         /*04h */
 948
 949         u32 context;            /*08h */
 950         u32 pad_0;              /*0Ch */
 951
 952         u16 flags;              /*10h */
 953         u16 reserved_3;         /*12h */
 954         u32 reserved_4;         /*14h */
 955
 956         u32 abort_context;      /*18h */
 957         u32 pad_1;              /*1Ch */
 958
 959         u32 abort_mfi_phys_addr_lo;     /*20h */
 960         u32 abort_mfi_phys_addr_hi;     /*24h */
 961
 962         u32 reserved_5[6];      /*28h */
 963
 964 } __attribute__ ((packed));
 965
 966 struct megasas_smp_frame {
 967
 968         u8 cmd;                 /*00h */
 969         u8 reserved_1;          /*01h */
 970         u8 cmd_status;          /*02h */
 971         u8 connection_status;   /*03h */
 972
 973         u8 reserved_2[3];       /*04h */
 974         u8 sge_count;           /*07h */
 975
 976         u32 context;            /*08h */
 977         u32 pad_0;              /*0Ch */
 978
 979         u16 flags;              /*10h */
 980         u16 timeout;            /*12h */
 981
 982         u32 data_xfer_len;      /*14h */
 983         u64 sas_addr;           /*18h */
 984
 985         union {
 986                 struct megasas_sge32 sge32[2];  /* [0]: resp [1]: req */
 987                 struct megasas_sge64 sge64[2];  /* [0]: resp [1]: req */
 988         } sgl;
 989
 990 } __attribute__ ((packed));
 991
 992 struct megasas_stp_frame {
 993
 994         u8 cmd;                 /*00h */
 995         u8 reserved_1;          /*01h */
 996         u8 cmd_status;          /*02h */
 997         u8 reserved_2;          /*03h */
 998
 999         u8 target_id;           /*04h */
1000         u8 reserved_3[2];       /*05h */
1001         u8 sge_count;           /*07h */
1002
1003         u32 context;            /*08h */
1004         u32 pad_0;              /*0Ch */
1005
1006         u16 flags;              /*10h */
1007         u16 timeout;            /*12h */
1008
1009         u32 data_xfer_len;      /*14h */
1010
1011         u16 fis[10];            /*18h */
1012         u32 stp_flags;
1013
1014         union {
1015                 struct megasas_sge32 sge32[2];  /* [0]: resp [1]: data */
1016                 struct megasas_sge64 sge64[2];  /* [0]: resp [1]: data */
1017         } sgl;
1018
1019 } __attribute__ ((packed));
1020
1021 union megasas_frame {
1022
1023         struct megasas_header hdr;
1024         struct megasas_init_frame init;
1025         struct megasas_io_frame io;
1026         struct megasas_pthru_frame pthru;
1027         struct megasas_dcmd_frame dcmd;
1028         struct megasas_abort_frame abort;
1029         struct megasas_smp_frame smp;
1030         struct megasas_stp_frame stp;
1031
1032         u8 raw_bytes[64];
1033 };
1034
1035 struct megasas_cmd;
1036
1037 union megasas_evt_class_locale {
1038
1039         struct {
1040                 u16 locale;
1041                 u8 reserved;
1042                 s8 class;
1043         } __attribute__ ((packed)) members;
1044
1045         u32 word;
1046
1047 } __attribute__ ((packed));
1048
1049 struct megasas_evt_log_info {
1050         u32 newest_seq_num;
1051         u32 oldest_seq_num;
1052         u32 clear_seq_num;
1053         u32 shutdown_seq_num;
1054         u32 boot_seq_num;
1055
1056 } __attribute__ ((packed));
1057
1058 struct megasas_progress {
1059
1060         u16 progress;
1061         u16 elapsed_seconds;
1062
1063 } __attribute__ ((packed));
1064
1065 struct megasas_evtarg_ld {
1066
1067         u16 target_id;
1068         u8 ld_index;
1069         u8 reserved;
1070
1071 } __attribute__ ((packed));
1072
1073 struct megasas_evtarg_pd {
1074         u16 device_id;
1075         u8 encl_index;
1076         u8 slot_number;
1077
1078 } __attribute__ ((packed));
1079
1080 struct megasas_evt_detail {
1081
1082         u32 seq_num;
1083         u32 time_stamp;
1084         u32 code;
1085         union megasas_evt_class_locale cl;
1086         u8 arg_type;
1087         u8 reserved1[15];
1088
1089         union {
1090                 struct {
1091                         struct megasas_evtarg_pd pd;
1092                         u8 cdb_length;
1093                         u8 sense_length;
1094                         u8 reserved[2];
1095                         u8 cdb[16];
1096                         u8 sense[64];
1097                 } __attribute__ ((packed)) cdbSense;
1098
1099                 struct megasas_evtarg_ld ld;
1100
1101                 struct {
1102                         struct megasas_evtarg_ld ld;
1103                         u64 count;
1104                 } __attribute__ ((packed)) ld_count;
1105
1106                 struct {
1107                         u64 lba;
1108                         struct megasas_evtarg_ld ld;
1109                 } __attribute__ ((packed)) ld_lba;
1110
1111                 struct {
1112                         struct megasas_evtarg_ld ld;
1113                         u32 prevOwner;
1114                         u32 newOwner;
1115                 } __attribute__ ((packed)) ld_owner;
1116
1117                 struct {
1118                         u64 ld_lba;
1119                         u64 pd_lba;
1120                         struct megasas_evtarg_ld ld;
1121                         struct megasas_evtarg_pd pd;
1122                 } __attribute__ ((packed)) ld_lba_pd_lba;
1123
1124                 struct {
1125                         struct megasas_evtarg_ld ld;
1126                         struct megasas_progress prog;
1127                 } __attribute__ ((packed)) ld_prog;
1128
1129                 struct {
1130                         struct megasas_evtarg_ld ld;
1131                         u32 prev_state;
1132                         u32 new_state;
1133                 } __attribute__ ((packed)) ld_state;
1134
1135                 struct {
1136                         u64 strip;
1137                         struct megasas_evtarg_ld ld;
1138                 } __attribute__ ((packed)) ld_strip;
1139
1140                 struct megasas_evtarg_pd pd;
1141
1142                 struct {
1143                         struct megasas_evtarg_pd pd;
1144                         u32 err;
1145                 } __attribute__ ((packed)) pd_err;
1146
1147                 struct {
1148                         u64 lba;
1149                         struct megasas_evtarg_pd pd;
1150                 } __attribute__ ((packed)) pd_lba;
1151
1152                 struct {
1153                         u64 lba;
1154                         struct megasas_evtarg_pd pd;
1155                         struct megasas_evtarg_ld ld;
1156                 } __attribute__ ((packed)) pd_lba_ld;
1157
1158                 struct {
1159                         struct megasas_evtarg_pd pd;
1160                         struct megasas_progress prog;
1161                 } __attribute__ ((packed)) pd_prog;
1162
1163                 struct {
1164                         struct megasas_evtarg_pd pd;
1165                         u32 prevState;
1166                         u32 newState;
1167                 } __attribute__ ((packed)) pd_state;
1168
1169                 struct {
1170                         u16 vendorId;
1171                         u16 deviceId;
1172                         u16 subVendorId;
1173                         u16 subDeviceId;
1174                 } __attribute__ ((packed)) pci;
1175
1176                 u32 rate;
1177                 char str[96];
1178
1179                 struct {
1180                         u32 rtc;
1181                         u32 elapsedSeconds;
1182                 } __attribute__ ((packed)) time;
1183
1184                 struct {
1185                         u32 ecar;
1186                         u32 elog;
1187                         char str[64];
1188                 } __attribute__ ((packed)) ecc;
1189
1190                 u8 b[96];
1191                 u16 s[48];
1192                 u32 w[24];
1193                 u64 d[12];
1194         } args;
1195
1196         char description[128];
1197
1198 } __attribute__ ((packed));
1199
1200 struct megasas_aen_event {
1201         struct work_struct hotplug_work;
1202         struct megasas_instance *instance;
1203 };
1204
1205 struct megasas_instance {
1206
1207         u32 *producer;
1208         dma_addr_t producer_h;
1209         u32 *consumer;
1210         dma_addr_t consumer_h;
1211
1212         u32 *reply_queue;
1213         dma_addr_t reply_queue_h;
1214
1215         unsigned long base_addr;
1216         struct megasas_register_set __iomem *reg_set;
1217
1218         struct megasas_pd_list          pd_list[MEGASAS_MAX_PD];
1219         u8     ld_ids[MEGASAS_MAX_LD_IDS];
1220         s8 init_id;
1221
1222         u16 max_num_sge;
1223         u16 max_fw_cmds;
1224         u32 max_sectors_per_req;
1225         struct megasas_aen_event *ev;
1226
1227         struct megasas_cmd **cmd_list;
1228         struct list_head cmd_pool;
1229         spinlock_t cmd_pool_lock;
1230         /* used to synch producer, consumer ptrs in dpc */
1231         spinlock_t completion_lock;
1232         /* used to sync fire the cmd to fw */
1233         spinlock_t fire_lock;
1234         struct dma_pool *frame_dma_pool;
1235         struct dma_pool *sense_dma_pool;
1236
1237         struct megasas_evt_detail *evt_detail;
1238         dma_addr_t evt_detail_h;
1239         struct megasas_cmd *aen_cmd;
1240         struct mutex aen_mutex;
1241         struct semaphore ioctl_sem;
1242
1243         struct Scsi_Host *host;
1244
1245         wait_queue_head_t int_cmd_wait_q;
1246         wait_queue_head_t abort_cmd_wait_q;
1247
1248         struct pci_dev *pdev;
1249         u32 unique_id;
1250
1251         atomic_t fw_outstanding;
1252         u32 hw_crit_error;
1253
1254         struct megasas_instance_template *instancet;
1255         struct tasklet_struct isr_tasklet;
1256
1257         u8 flag;
1258         u8 unload;
1259         u8 flag_ieee;
1260         unsigned long last_time;
1261
1262         struct timer_list io_completion_timer;
1263 };
1264
1265 struct megasas_instance_template {
1266         void (*fire_cmd)(struct megasas_instance *, dma_addr_t, \
1267                 u32, struct megasas_register_set __iomem *);
1268
1269         void (*enable_intr)(struct megasas_register_set __iomem *) ;
1270         void (*disable_intr)(struct megasas_register_set __iomem *);
1271
1272         int (*clear_intr)(struct megasas_register_set __iomem *);
1273
1274         u32 (*read_fw_status_reg)(struct megasas_register_set __iomem *);
1275 };
1276
1277 #define MEGASAS_IS_LOGICAL(scp)                                         \
1278         (scp->device->channel < MEGASAS_MAX_PD_CHANNELS) ? 0 : 1
1279
1280 #define MEGASAS_DEV_INDEX(inst, scp)                                    \
1281         ((scp->device->channel % 2) * MEGASAS_MAX_DEV_PER_CHANNEL) +    \
1282         scp->device->id
1283
1284 struct megasas_cmd {
1285
1286         union megasas_frame *frame;
1287         dma_addr_t frame_phys_addr;
1288         u8 *sense;
1289         dma_addr_t sense_phys_addr;
1290
1291         u32 index;
1292         u8 sync_cmd;
1293         u8 cmd_status;
1294         u16 abort_aen;
1295
1296         struct list_head list;
1297         struct scsi_cmnd *scmd;
1298         struct megasas_instance *instance;
1299         u32 frame_count;
1300 };
1301
1302 #define MAX_MGMT_ADAPTERS               1024
1303 #define MAX_IOCTL_SGE                   16
1304
1305 struct megasas_iocpacket {
1306
1307         u16 host_no;
1308         u16 __pad1;
1309         u32 sgl_off;
1310         u32 sge_count;
1311         u32 sense_off;
1312         u32 sense_len;
1313         union {
1314                 u8 raw[128];
1315                 struct megasas_header hdr;
1316         } frame;
1317
1318         struct iovec sgl[MAX_IOCTL_SGE];
1319
1320 } __attribute__ ((packed));
1321
1322 struct megasas_aen {
1323         u16 host_no;
1324         u16 __pad1;
1325         u32 seq_num;
1326         u32 class_locale_word;
1327 } __attribute__ ((packed));
1328
1329 #ifdef CONFIG_COMPAT
1330 struct compat_megasas_iocpacket {
1331         u16 host_no;
1332         u16 __pad1;
1333         u32 sgl_off;
1334         u32 sge_count;
1335         u32 sense_off;
1336         u32 sense_len;
1337         union {
1338                 u8 raw[128];
1339                 struct megasas_header hdr;
1340         } frame;
1341         struct compat_iovec sgl[MAX_IOCTL_SGE];
1342 } __attribute__ ((packed));
1343
1344 #define MEGASAS_IOC_FIRMWARE32  _IOWR('M', 1, struct compat_megasas_iocpacket)
1345 #endif
1346
1347 #define MEGASAS_IOC_FIRMWARE    _IOWR('M', 1, struct megasas_iocpacket)
1348 #define MEGASAS_IOC_GET_AEN     _IOW('M', 3, struct megasas_aen)
1349
1350 struct megasas_mgmt_info {
1351
1352         u16 count;
1353         struct megasas_instance *instance[MAX_MGMT_ADAPTERS];
1354         int max_index;
1355 };
1356
1357 #endif                          /*LSI_MEGARAID_SAS_H */