drivers/scsi/gdth.c

   1 /************************************************************************
   2  * Linux driver for                                                     *
   3  * ICP vortex GmbH:    GDT ISA/EISA/PCI Disk Array Controllers          *
   4  * Intel Corporation:  Storage RAID Controllers                         *
   5  *                                                                      *
   6  * gdth.c                                                               *
   7  * Copyright (C) 1995-06 ICP vortex GmbH, Achim Leubner                 *
   8  * Copyright (C) 2002-04 Intel Corporation                              *
   9  * Copyright (C) 2003-06 Adaptec Inc.                                   *
  10  * <achim_leubner@adaptec.com>                                          *
  11  *                                                                      *
  12  * Additions/Fixes:                                                     *
  13  * Boji Tony Kannanthanam <boji.t.kannanthanam@intel.com>               *
  14  * Johannes Dinner <johannes_dinner@adaptec.com>                        *
  15  *                                                                      *
  16  * This program is free software; you can redistribute it and/or modify *
  17  * it under the terms of the GNU General Public License as published    *
  18  * by the Free Software Foundation; either version 2 of the License,    *
  19  * or (at your option) any later version.                               *
  20  *                                                                      *
  21  * This program is distributed in the hope that it will be useful,      *
  22  * but WITHOUT ANY WARRANTY; without even the implied warranty of       *
  23  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the         *
  24  * GNU General Public License for more details.                         *
  25  *                                                                      *
  26  * You should have received a copy of the GNU General Public License    *
  27  * along with this kernel; if not, write to the Free Software           *
  28  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.            *
  29  *                                                                      *
  30  * Linux kernel 2.6.x supported                                         *
  31  *                                                                      *
  32  ************************************************************************/
  33
  34 /* All GDT Disk Array Controllers are fully supported by this driver.
  35  * This includes the PCI/EISA/ISA SCSI Disk Array Controllers and the
  36  * PCI Fibre Channel Disk Array Controllers. See gdth.h for a complete
  37  * list of all controller types.
  38  *
  39  * If you have one or more GDT3000/3020 EISA controllers with
  40  * controller BIOS disabled, you have to set the IRQ values with the
  41  * command line option "gdth=irq1,irq2,...", where the irq1,irq2,... are
  42  * the IRQ values for the EISA controllers.
  43  *
  44  * After the optional list of IRQ values, other possible
  45  * command line options are:
  46  * disable:Y                    disable driver
  47  * disable:N                    enable driver
  48  * reserve_mode:0               reserve no drives for the raw service
  49  * reserve_mode:1               reserve all not init., removable drives
  50  * reserve_mode:2               reserve all not init. drives
  51  * reserve_list:h,b,t,l,h,b,t,l,...     reserve particular drive(s) with
  52  *                              h- controller no., b- channel no.,
  53  *                              t- target ID, l- LUN
  54  * reverse_scan:Y               reverse scan order for PCI controllers
  55  * reverse_scan:N               scan PCI controllers like BIOS
  56  * max_ids:x                    x - target ID count per channel (1..MAXID)
  57  * rescan:Y                     rescan all channels/IDs
  58  * rescan:N                     use all devices found until now
  59  * hdr_channel:x                x - number of virtual bus for host drives
  60  * shared_access:Y              disable driver reserve/release protocol to
  61  *                              access a shared resource from several nodes,
  62  *                              appropriate controller firmware required
  63  * shared_access:N              enable driver reserve/release protocol
  64  * probe_eisa_isa:Y             scan for EISA/ISA controllers
  65  * probe_eisa_isa:N             do not scan for EISA/ISA controllers
  66  * force_dma32:Y                use only 32 bit DMA mode
  67  * force_dma32:N                use 64 bit DMA mode, if supported
  68  *
  69  * The default values are: "gdth=disable:N,reserve_mode:1,reverse_scan:N,
  70  *                          max_ids:127,rescan:N,hdr_channel:0,
  71  *                          shared_access:Y,probe_eisa_isa:N,force_dma32:N".
  72  * Here is another example: "gdth=reserve_list:0,1,2,0,0,1,3,0,rescan:Y".
  73  *
  74  * When loading the gdth driver as a module, the same options are available.
  75  * You can set the IRQs with "IRQ=...". However, the syntax to specify the
  76  * options changes slightly. You must replace all ',' between options
  77  * with ' ' and all ':' with '=' and you must use
  78  * '1' in place of 'Y' and '0' in place of 'N'.
  79  *
  80  * Default: "modprobe gdth disable=0 reserve_mode=1 reverse_scan=0
  81  *           max_ids=127 rescan=0 hdr_channel=0 shared_access=0
  82  *           probe_eisa_isa=0 force_dma32=0"
  83  * The other example: "modprobe gdth reserve_list=0,1,2,0,0,1,3,0 rescan=1".
  84  */
  85
  86 /* The meaning of the Scsi_Pointer members in this driver is as follows:
  87  * ptr:                     Chaining
  88  * this_residual:           unused
  89  * buffer:                  unused
  90  * dma_handle:              unused
  91  * buffers_residual:        unused
  92  * Status:                  unused
  93  * Message:                 unused
  94  * have_data_in:            unused
  95  * sent_command:            unused
  96  * phase:                   unused
  97  */
  98
  99
 100 /* interrupt coalescing */
 101 /* #define INT_COAL */
 102
 103 /* statistics */
 104 #define GDTH_STATISTICS
 105
 106 #include <linux/module.h>
 107
 108 #include <linux/version.h>
 109 #include <linux/kernel.h>
 110 #include <linux/types.h>
 111 #include <linux/pci.h>
 112 #include <linux/string.h>
 113 #include <linux/ctype.h>
 114 #include <linux/ioport.h>
 115 #include <linux/delay.h>
 116 #include <linux/interrupt.h>
 117 #include <linux/in.h>
 118 #include <linux/proc_fs.h>
 119 #include <linux/time.h>
 120 #include <linux/timer.h>
 121 #include <linux/dma-mapping.h>
 122 #include <linux/list.h>
 123
 124 #ifdef GDTH_RTC
 125 #include <linux/mc146818rtc.h>
 126 #endif
 127 #include <linux/reboot.h>
 128
 129 #include <asm/dma.h>
 130 #include <asm/system.h>
 131 #include <asm/io.h>
 132 #include <asm/uaccess.h>
 133 #include <linux/spinlock.h>
 134 #include <linux/blkdev.h>
 135 #include <linux/scatterlist.h>
 136
 137 #include "scsi.h"
 138 #include <scsi/scsi_host.h>
 139 #include "gdth.h"
 140
 141 static void gdth_delay(int milliseconds);
 142 static void gdth_eval_mapping(ulong32 size, ulong32 *cyls, int *heads, int *secs);
 143 static irqreturn_t gdth_interrupt(int irq, void *dev_id);
 144 static irqreturn_t __gdth_interrupt(gdth_ha_str *ha,
 145                                     int gdth_from_wait, int* pIndex);
 146 static int gdth_sync_event(gdth_ha_str *ha, int service, unchar index,
 147                                                                Scsi_Cmnd *scp);
 148 static int gdth_async_event(gdth_ha_str *ha);
 149 static void gdth_log_event(gdth_evt_data *dvr, char *buffer);
 150
 151 static void gdth_putq(gdth_ha_str *ha, Scsi_Cmnd *scp, unchar priority);
 152 static void gdth_next(gdth_ha_str *ha);
 153 static int gdth_fill_raw_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp, unchar b);
 154 static int gdth_special_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp);
 155 static gdth_evt_str *gdth_store_event(gdth_ha_str *ha, ushort source,
 156                                       ushort idx, gdth_evt_data *evt);
 157 static int gdth_read_event(gdth_ha_str *ha, int handle, gdth_evt_str *estr);
 158 static void gdth_readapp_event(gdth_ha_str *ha, unchar application,
 159                                gdth_evt_str *estr);
 160 static void gdth_clear_events(void);
 161
 162 static void gdth_copy_internal_data(gdth_ha_str *ha, Scsi_Cmnd *scp,
 163                                     char *buffer, ushort count);
 164 static int gdth_internal_cache_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp);
 165 static int gdth_fill_cache_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp, ushort hdrive);
 166
 167 static void gdth_enable_int(gdth_ha_str *ha);
 168 static int gdth_test_busy(gdth_ha_str *ha);
 169 static int gdth_get_cmd_index(gdth_ha_str *ha);
 170 static void gdth_release_event(gdth_ha_str *ha);
 171 static int gdth_wait(gdth_ha_str *ha, int index,ulong32 time);
 172 static int gdth_internal_cmd(gdth_ha_str *ha, unchar service, ushort opcode,
 173                                              ulong32 p1, ulong64 p2,ulong64 p3);
 174 static int gdth_search_drives(gdth_ha_str *ha);
 175 static int gdth_analyse_hdrive(gdth_ha_str *ha, ushort hdrive);
 176
 177 static const char *gdth_ctr_name(gdth_ha_str *ha);
 178
 179 static int gdth_open(struct inode *inode, struct file *filep);
 180 static int gdth_close(struct inode *inode, struct file *filep);
 181 static int gdth_ioctl(struct inode *inode, struct file *filep,
 182                       unsigned int cmd, unsigned long arg);
 183
 184 static void gdth_flush(gdth_ha_str *ha);
 185 static int gdth_queuecommand(Scsi_Cmnd *scp,void (*done)(Scsi_Cmnd *));
 186 static int __gdth_queuecommand(gdth_ha_str *ha, struct scsi_cmnd *scp,
 187                                 struct gdth_cmndinfo *cmndinfo);
 188 static void gdth_scsi_done(struct scsi_cmnd *scp);
 189
 190 #ifdef DEBUG_GDTH
 191 static unchar   DebugState = DEBUG_GDTH;
 192
 193 #ifdef __SERIAL__
 194 #define MAX_SERBUF 160
 195 static void ser_init(void);
 196 static void ser_puts(char *str);
 197 static void ser_putc(char c);
 198 static int  ser_printk(const char *fmt, ...);
 199 static char strbuf[MAX_SERBUF+1];
 200 #ifdef __COM2__
 201 #define COM_BASE 0x2f8
 202 #else
 203 #define COM_BASE 0x3f8
 204 #endif
 205 static void ser_init()
 206 {
 207     unsigned port=COM_BASE;
 208
 209     outb(0x80,port+3);
 210     outb(0,port+1);
 211     /* 19200 Baud, if 9600: outb(12,port) */
 212     outb(6, port);
 213     outb(3,port+3);
 214     outb(0,port+1);
 215     /*
 216     ser_putc('I');
 217     ser_putc(' ');
 218     */
 219 }
 220
 221 static void ser_puts(char *str)
 222 {
 223     char *ptr;
 224
 225     ser_init();
 226     for (ptr=str;*ptr;++ptr)
 227         ser_putc(*ptr);
 228 }
 229
 230 static void ser_putc(char c)
 231 {
 232     unsigned port=COM_BASE;
 233
 234     while ((inb(port+5) & 0x20)==0);
 235     outb(c,port);
 236     if (c==0x0a)
 237     {
 238         while ((inb(port+5) & 0x20)==0);
 239         outb(0x0d,port);
 240     }
 241 }
 242
 243 static int ser_printk(const char *fmt, ...)
 244 {
 245     va_list args;
 246     int i;
 247
 248     va_start(args,fmt);
 249     i = vsprintf(strbuf,fmt,args);
 250     ser_puts(strbuf);
 251     va_end(args);
 252     return i;
 253 }
 254
 255 #define TRACE(a)    {if (DebugState==1) {ser_printk a;}}
 256 #define TRACE2(a)   {if (DebugState==1 || DebugState==2) {ser_printk a;}}
 257 #define TRACE3(a)   {if (DebugState!=0) {ser_printk a;}}
 258
 259 #else /* !__SERIAL__ */
 260 #define TRACE(a)    {if (DebugState==1) {printk a;}}
 261 #define TRACE2(a)   {if (DebugState==1 || DebugState==2) {printk a;}}
 262 #define TRACE3(a)   {if (DebugState!=0) {printk a;}}
 263 #endif
 264
 265 #else /* !DEBUG */
 266 #define TRACE(a)
 267 #define TRACE2(a)
 268 #define TRACE3(a)
 269 #endif
 270
 271 #ifdef GDTH_STATISTICS
 272 static ulong32 max_rq=0, max_index=0, max_sg=0;
 273 #ifdef INT_COAL
 274 static ulong32 max_int_coal=0;
 275 #endif
 276 static ulong32 act_ints=0, act_ios=0, act_stats=0, act_rq=0;
 277 static struct timer_list gdth_timer;
 278 #endif
 279
 280 #define PTR2USHORT(a)   (ushort)(ulong)(a)
 281 #define GDTOFFSOF(a,b)  (size_t)&(((a*)0)->b)
 282 #define INDEX_OK(i,t)   ((i)<ARRAY_SIZE(t))
 283
 284 #define BUS_L2P(a,b)    ((b)>(a)->virt_bus ? (b-1):(b))
 285
 286 #ifdef CONFIG_ISA
 287 static unchar   gdth_drq_tab[4] = {5,6,7,7};            /* DRQ table */
 288 #endif
 289 #if defined(CONFIG_EISA) || defined(CONFIG_ISA)
 290 static unchar   gdth_irq_tab[6] = {0,10,11,12,14,0};    /* IRQ table */
 291 #endif
 292 static unchar   gdth_polling;                           /* polling if TRUE */
 293 static int      gdth_ctr_count  = 0;                    /* controller count */
 294 static LIST_HEAD(gdth_instances);                       /* controller list */
 295 static unchar   gdth_write_through = FALSE;             /* write through */
 296 static gdth_evt_str ebuffer[MAX_EVENTS];                /* event buffer */
 297 static int elastidx;
 298 static int eoldidx;
 299 static int major;
 300
 301 #define DIN     1                               /* IN data direction */
 302 #define DOU     2                               /* OUT data direction */
 303 #define DNO     DIN                             /* no data transfer */
 304 #define DUN     DIN                             /* unknown data direction */
 305 static unchar gdth_direction_tab[0x100] = {
 306     DNO,DNO,DIN,DIN,DOU,DIN,DIN,DOU,DIN,DUN,DOU,DOU,DUN,DUN,DUN,DIN,
 307     DNO,DIN,DIN,DOU,DIN,DOU,DNO,DNO,DOU,DNO,DIN,DNO,DIN,DOU,DNO,DUN,
 308     DIN,DUN,DIN,DUN,DOU,DIN,DUN,DUN,DIN,DIN,DOU,DNO,DUN,DIN,DOU,DOU,
 309     DOU,DOU,DOU,DNO,DIN,DNO,DNO,DIN,DOU,DOU,DOU,DOU,DIN,DOU,DIN,DOU,
 310     DOU,DOU,DIN,DIN,DIN,DNO,DUN,DNO,DNO,DNO,DUN,DNO,DOU,DIN,DUN,DUN,
 311     DUN,DUN,DUN,DUN,DUN,DOU,DUN,DUN,DUN,DUN,DIN,DUN,DUN,DUN,DUN,DUN,
 312     DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
 313     DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
 314     DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DIN,DUN,DOU,DUN,DUN,DUN,DUN,DUN,
 315     DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DIN,DUN,
 316     DUN,DUN,DUN,DUN,DUN,DNO,DNO,DUN,DIN,DNO,DOU,DUN,DNO,DUN,DOU,DOU,
 317     DOU,DOU,DOU,DNO,DUN,DIN,DOU,DIN,DIN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
 318     DUN,DUN,DOU,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
 319     DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
 320     DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DOU,DUN,DUN,DUN,DUN,DUN,
 321     DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN
 322 };
 323
 324 /* LILO and modprobe/insmod parameters */
 325 /* IRQ list for GDT3000/3020 EISA controllers */
 326 static int irq[MAXHA] __initdata =
 327 {0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
 328  0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff};
 329 /* disable driver flag */
 330 static int disable __initdata = 0;
 331 /* reserve flag */
 332 static int reserve_mode = 1;
 333 /* reserve list */
 334 static int reserve_list[MAX_RES_ARGS] =
 335 {0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
 336  0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
 337  0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff};
 338 /* scan order for PCI controllers */
 339 static int reverse_scan = 0;
 340 /* virtual channel for the host drives */
 341 static int hdr_channel = 0;
 342 /* max. IDs per channel */
 343 static int max_ids = MAXID;
 344 /* rescan all IDs */
 345 static int rescan = 0;
 346 /* shared access */
 347 static int shared_access = 1;
 348 /* enable support for EISA and ISA controllers */
 349 static int probe_eisa_isa = 0;
 350 /* 64 bit DMA mode, support for drives > 2 TB, if force_dma32 = 0 */
 351 static int force_dma32 = 0;
 352
 353 /* parameters for modprobe/insmod */
 354 module_param_array(irq, int, NULL, 0);
 355 module_param(disable, int, 0);
 356 module_param(reserve_mode, int, 0);
 357 module_param_array(reserve_list, int, NULL, 0);
 358 module_param(reverse_scan, int, 0);
 359 module_param(hdr_channel, int, 0);
 360 module_param(max_ids, int, 0);
 361 module_param(rescan, int, 0);
 362 module_param(shared_access, int, 0);
 363 module_param(probe_eisa_isa, int, 0);
 364 module_param(force_dma32, int, 0);
 365 MODULE_AUTHOR("Achim Leubner");
 366 MODULE_LICENSE("GPL");
 367
 368 /* ioctl interface */
 369 static const struct file_operations gdth_fops = {
 370     .ioctl   = gdth_ioctl,
 371     .open    = gdth_open,
 372     .release = gdth_close,
 373 };
 374
 375 #include "gdth_proc.h"
 376 #include "gdth_proc.c"
 377
 378 static gdth_ha_str *gdth_find_ha(int hanum)
 379 {
 380         gdth_ha_str *ha;
 381
 382         list_for_each_entry(ha, &gdth_instances, list)
 383                 if (hanum == ha->hanum)
 384                         return ha;
 385
 386         return NULL;
 387 }
 388
 389 static struct gdth_cmndinfo *gdth_get_cmndinfo(gdth_ha_str *ha)
 390 {
 391         struct gdth_cmndinfo *priv = NULL;
 392         ulong flags;
 393         int i;
 394
 395         spin_lock_irqsave(&ha->smp_lock, flags);
 396
 397         for (i=0; i<GDTH_MAXCMDS; ++i) {
 398                 if (ha->cmndinfo[i].index == 0) {
 399                         priv = &ha->cmndinfo[i];
 400                         memset(priv, 0, sizeof(*priv));
 401                         priv->index = i+1;
 402                         break;
 403                 }
 404         }
 405
 406         spin_unlock_irqrestore(&ha->smp_lock, flags);
 407
 408         return priv;
 409 }
 410
 411 static void gdth_put_cmndinfo(struct gdth_cmndinfo *priv)
 412 {
 413         BUG_ON(!priv);
 414         priv->index = 0;
 415 }
 416
 417 static void gdth_delay(int milliseconds)
 418 {
 419     if (milliseconds == 0) {
 420         udelay(1);
 421     } else {
 422         mdelay(milliseconds);
 423     }
 424 }
 425
 426 static void gdth_scsi_done(struct scsi_cmnd *scp)
 427 {
 428         struct gdth_cmndinfo *cmndinfo = gdth_cmnd_priv(scp);
 429         int internal_command = cmndinfo->internal_command;
 430
 431         TRACE2(("gdth_scsi_done()\n"));
 432
 433         gdth_put_cmndinfo(cmndinfo);
 434         scp->host_scribble = NULL;
 435
 436         if (internal_command)
 437                 complete((struct completion *)scp->request);
 438         else
 439                 scp->scsi_done(scp);
 440 }
 441
 442 int __gdth_execute(struct scsi_device *sdev, gdth_cmd_str *gdtcmd, char *cmnd,
 443                    int timeout, u32 *info)
 444 {
 445     gdth_ha_str *ha = shost_priv(sdev->host);
 446     Scsi_Cmnd *scp;
 447     struct gdth_cmndinfo cmndinfo;
 448     DECLARE_COMPLETION_ONSTACK(wait);
 449     int rval;
 450
 451     scp = kzalloc(sizeof(*scp), GFP_KERNEL);
 452     if (!scp)
 453         return -ENOMEM;
 454
 455     scp->sense_buffer = kzalloc(SCSI_SENSE_BUFFERSIZE, GFP_KERNEL);
 456     if (!scp->sense_buffer) {
 457         kfree(scp);
 458         return -ENOMEM;
 459     }
 460
 461     scp->device = sdev;
 462     memset(&cmndinfo, 0, sizeof(cmndinfo));
 463
 464     /* use request field to save the ptr. to completion struct. */
 465     scp->request = (struct request *)&wait;
 466     scp->timeout_per_command = timeout*HZ;
 467     scp->cmd_len = 12;
 468     scp->cmnd = cmnd;
 469     cmndinfo.priority = IOCTL_PRI;
 470     cmndinfo.internal_cmd_str = gdtcmd;
 471     cmndinfo.internal_command = 1;
 472
 473     TRACE(("__gdth_execute() cmd 0x%x\n", scp->cmnd[0]));
 474     __gdth_queuecommand(ha, scp, &cmndinfo);
 475
 476     wait_for_completion(&wait);
 477
 478     rval = cmndinfo.status;
 479     if (info)
 480         *info = cmndinfo.info;
 481     kfree(scp->sense_buffer);
 482     kfree(scp);
 483     return rval;
 484 }
 485
 486 int gdth_execute(struct Scsi_Host *shost, gdth_cmd_str *gdtcmd, char *cmnd,
 487                  int timeout, u32 *info)
 488 {
 489     struct scsi_device *sdev = scsi_get_host_dev(shost);
 490     int rval = __gdth_execute(sdev, gdtcmd, cmnd, timeout, info);
 491
 492     scsi_free_host_dev(sdev);
 493     return rval;
 494 }
 495
 496 static void gdth_eval_mapping(ulong32 size, ulong32 *cyls, int *heads, int *secs)
 497 {
 498     *cyls = size /HEADS/SECS;
 499     if (*cyls <= MAXCYLS) {
 500         *heads = HEADS;
 501         *secs = SECS;
 502     } else {                                        /* too high for 64*32 */
 503         *cyls = size /MEDHEADS/MEDSECS;
 504         if (*cyls <= MAXCYLS) {
 505             *heads = MEDHEADS;
 506             *secs = MEDSECS;
 507         } else {                                    /* too high for 127*63 */
 508             *cyls = size /BIGHEADS/BIGSECS;
 509             *heads = BIGHEADS;
 510             *secs = BIGSECS;
 511         }
 512     }
 513 }
 514
 515 /* controller search and initialization functions */
 516 #ifdef CONFIG_EISA
 517 static int __init gdth_search_eisa(ushort eisa_adr)
 518 {
 519     ulong32 id;
 520
 521     TRACE(("gdth_search_eisa() adr. %x\n",eisa_adr));
 522     id = inl(eisa_adr+ID0REG);
 523     if (id == GDT3A_ID || id == GDT3B_ID) {     /* GDT3000A or GDT3000B */
 524         if ((inb(eisa_adr+EISAREG) & 8) == 0)
 525             return 0;                           /* not EISA configured */
 526         return 1;
 527     }
 528     if (id == GDT3_ID)                          /* GDT3000 */
 529         return 1;
 530
 531     return 0;
 532 }
 533 #endif /* CONFIG_EISA */
 534
 535 #ifdef CONFIG_ISA
 536 static int __init gdth_search_isa(ulong32 bios_adr)
 537 {
 538     void __iomem *addr;
 539     ulong32 id;
 540
 541     TRACE(("gdth_search_isa() bios adr. %x\n",bios_adr));
 542     if ((addr = ioremap(bios_adr+BIOS_ID_OFFS, sizeof(ulong32))) != NULL) {
 543         id = readl(addr);
 544         iounmap(addr);
 545         if (id == GDT2_ID)                          /* GDT2000 */
 546             return 1;
 547     }
 548     return 0;
 549 }
 550 #endif /* CONFIG_ISA */
 551
 552 #ifdef CONFIG_PCI
 553
 554 static bool gdth_search_vortex(ushort device)
 555 {
 556         if (device <= PCI_DEVICE_ID_VORTEX_GDT6555)
 557                 return true;
 558         if (device >= PCI_DEVICE_ID_VORTEX_GDT6x17RP &&
 559             device <= PCI_DEVICE_ID_VORTEX_GDTMAXRP)
 560                 return true;
 561         if (device == PCI_DEVICE_ID_VORTEX_GDTNEWRX ||
 562             device == PCI_DEVICE_ID_VORTEX_GDTNEWRX2)
 563                 return true;
 564         return false;
 565 }
 566
 567 static int gdth_pci_probe_one(gdth_pci_str *pcistr, gdth_ha_str **ha_out);
 568 static int gdth_pci_init_one(struct pci_dev *pdev,
 569                              const struct pci_device_id *ent);
 570 static void gdth_pci_remove_one(struct pci_dev *pdev);
 571 static void gdth_remove_one(gdth_ha_str *ha);
 572
 573 /* Vortex only makes RAID controllers.
 574  * We do not really want to specify all 550 ids here, so wildcard match.
 575  */
 576 static const struct pci_device_id gdthtable[] = {
 577         { PCI_VDEVICE(VORTEX, PCI_ANY_ID) },
 578         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_SRC) },
 579         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_SRC_XSCALE) },
 580         { }     /* terminate list */
 581 };
 582 MODULE_DEVICE_TABLE(pci, gdthtable);
 583
 584 static struct pci_driver gdth_pci_driver = {
 585         .name           = "gdth",
 586         .id_table       = gdthtable,
 587         .probe          = gdth_pci_init_one,
 588         .remove         = gdth_pci_remove_one,
 589 };
 590
 591 static void gdth_pci_remove_one(struct pci_dev *pdev)
 592 {
 593         gdth_ha_str *ha = pci_get_drvdata(pdev);
 594
 595         pci_set_drvdata(pdev, NULL);
 596
 597         list_del(&ha->list);
 598         gdth_remove_one(ha);
 599
 600         pci_disable_device(pdev);
 601 }
 602
 603 static int gdth_pci_init_one(struct pci_dev *pdev,
 604                                        const struct pci_device_id *ent)
 605 {
 606         ushort vendor = pdev->vendor;
 607         ushort device = pdev->device;
 608         ulong base0, base1, base2;
 609         int rc;
 610         gdth_pci_str gdth_pcistr;
 611         gdth_ha_str *ha = NULL;
 612
 613         TRACE(("gdth_search_dev() cnt %d vendor %x device %x\n",
 614                gdth_ctr_count, vendor, device));
 615
 616         memset(&gdth_pcistr, 0, sizeof(gdth_pcistr));
 617
 618         if (vendor == PCI_VENDOR_ID_VORTEX && !gdth_search_vortex(device))
 619                 return -ENODEV;
 620
 621         rc = pci_enable_device(pdev);
 622         if (rc)
 623                 return rc;
 624
 625         if (gdth_ctr_count >= MAXHA)
 626                 return -EBUSY;
 627
 628         /* GDT PCI controller found, resources are already in pdev */
 629         gdth_pcistr.pdev = pdev;
 630         base0 = pci_resource_flags(pdev, 0);
 631         base1 = pci_resource_flags(pdev, 1);
 632         base2 = pci_resource_flags(pdev, 2);
 633         if (device <= PCI_DEVICE_ID_VORTEX_GDT6000B ||   /* GDT6000/B */
 634             device >= PCI_DEVICE_ID_VORTEX_GDT6x17RP) {  /* MPR */
 635             if (!(base0 & IORESOURCE_MEM))
 636                 return -ENODEV;
 637             gdth_pcistr.dpmem = pci_resource_start(pdev, 0);
 638         } else {                                  /* GDT6110, GDT6120, .. */
 639             if (!(base0 & IORESOURCE_MEM) ||
 640                 !(base2 & IORESOURCE_MEM) ||
 641                 !(base1 & IORESOURCE_IO))
 642                 return -ENODEV;
 643             gdth_pcistr.dpmem = pci_resource_start(pdev, 2);
 644             gdth_pcistr.io    = pci_resource_start(pdev, 1);
 645         }
 646         TRACE2(("Controller found at %d/%d, irq %d, dpmem 0x%lx\n",
 647                 gdth_pcistr.pdev->bus->number,
 648                 PCI_SLOT(gdth_pcistr.pdev->devfn),
 649                 gdth_pcistr.irq,
 650                 gdth_pcistr.dpmem));
 651
 652         rc = gdth_pci_probe_one(&gdth_pcistr, &ha);
 653         if (rc)
 654                 return rc;
 655
 656         return 0;
 657 }
 658 #endif /* CONFIG_PCI */
 659
 660 #ifdef CONFIG_EISA
 661 static int __init gdth_init_eisa(ushort eisa_adr,gdth_ha_str *ha)
 662 {
 663     ulong32 retries,id;
 664     unchar prot_ver,eisacf,i,irq_found;
 665
 666     TRACE(("gdth_init_eisa() adr. %x\n",eisa_adr));
 667
 668     /* disable board interrupts, deinitialize services */
 669     outb(0xff,eisa_adr+EDOORREG);
 670     outb(0x00,eisa_adr+EDENABREG);
 671     outb(0x00,eisa_adr+EINTENABREG);
 672
 673     outb(0xff,eisa_adr+LDOORREG);
 674     retries = INIT_RETRIES;
 675     gdth_delay(20);
 676     while (inb(eisa_adr+EDOORREG) != 0xff) {
 677         if (--retries == 0) {
 678             printk("GDT-EISA: Initialization error (DEINIT failed)\n");
 679             return 0;
 680         }
 681         gdth_delay(1);
 682         TRACE2(("wait for DEINIT: retries=%d\n",retries));
 683     }
 684     prot_ver = inb(eisa_adr+MAILBOXREG);
 685     outb(0xff,eisa_adr+EDOORREG);
 686     if (prot_ver != PROTOCOL_VERSION) {
 687         printk("GDT-EISA: Illegal protocol version\n");
 688         return 0;
 689     }
 690     ha->bmic = eisa_adr;
 691     ha->brd_phys = (ulong32)eisa_adr >> 12;
 692
 693     outl(0,eisa_adr+MAILBOXREG);
 694     outl(0,eisa_adr+MAILBOXREG+4);
 695     outl(0,eisa_adr+MAILBOXREG+8);
 696     outl(0,eisa_adr+MAILBOXREG+12);
 697
 698     /* detect IRQ */
 699     if ((id = inl(eisa_adr+ID0REG)) == GDT3_ID) {
 700         ha->oem_id = OEM_ID_ICP;
 701         ha->type = GDT_EISA;
 702         ha->stype = id;
 703         outl(1,eisa_adr+MAILBOXREG+8);
 704         outb(0xfe,eisa_adr+LDOORREG);
 705         retries = INIT_RETRIES;
 706         gdth_delay(20);
 707         while (inb(eisa_adr+EDOORREG) != 0xfe) {
 708             if (--retries == 0) {
 709                 printk("GDT-EISA: Initialization error (get IRQ failed)\n");
 710                 return 0;
 711             }
 712             gdth_delay(1);
 713         }
 714         ha->irq = inb(eisa_adr+MAILBOXREG);
 715         outb(0xff,eisa_adr+EDOORREG);
 716         TRACE2(("GDT3000/3020: IRQ=%d\n",ha->irq));
 717         /* check the result */
 718         if (ha->irq == 0) {
 719                 TRACE2(("Unknown IRQ, use IRQ table from cmd line !\n"));
 720                 for (i = 0, irq_found = FALSE;
 721                      i < MAXHA && irq[i] != 0xff; ++i) {
 722                 if (irq[i]==10 || irq[i]==11 || irq[i]==12 || irq[i]==14) {
 723                     irq_found = TRUE;
 724                     break;
 725                 }
 726                 }
 727             if (irq_found) {
 728                 ha->irq = irq[i];
 729                 irq[i] = 0;
 730                 printk("GDT-EISA: Can not detect controller IRQ,\n");
 731                 printk("Use IRQ setting from command line (IRQ = %d)\n",
 732                        ha->irq);
 733             } else {
 734                 printk("GDT-EISA: Initialization error (unknown IRQ), Enable\n");
 735                 printk("the controller BIOS or use command line parameters\n");
 736                 return 0;
 737             }
 738         }
 739     } else {
 740         eisacf = inb(eisa_adr+EISAREG) & 7;
 741         if (eisacf > 4)                         /* level triggered */
 742             eisacf -= 4;
 743         ha->irq = gdth_irq_tab[eisacf];
 744         ha->oem_id = OEM_ID_ICP;
 745         ha->type = GDT_EISA;
 746         ha->stype = id;
 747     }
 748
 749     ha->dma64_support = 0;
 750     return 1;
 751 }
 752 #endif /* CONFIG_EISA */
 753
 754 #ifdef CONFIG_ISA
 755 static int __init gdth_init_isa(ulong32 bios_adr,gdth_ha_str *ha)
 756 {
 757     register gdt2_dpram_str __iomem *dp2_ptr;
 758     int i;
 759     unchar irq_drq,prot_ver;
 760     ulong32 retries;
 761
 762     TRACE(("gdth_init_isa() bios adr. %x\n",bios_adr));
 763
 764     ha->brd = ioremap(bios_adr, sizeof(gdt2_dpram_str));
 765     if (ha->brd == NULL) {
 766         printk("GDT-ISA: Initialization error (DPMEM remap error)\n");
 767         return 0;
 768     }
 769     dp2_ptr = ha->brd;
 770     writeb(1, &dp2_ptr->io.memlock); /* switch off write protection */
 771     /* reset interface area */
 772     memset_io(&dp2_ptr->u, 0, sizeof(dp2_ptr->u));
 773     if (readl(&dp2_ptr->u) != 0) {
 774         printk("GDT-ISA: Initialization error (DPMEM write error)\n");
 775         iounmap(ha->brd);
 776         return 0;
 777     }
 778
 779     /* disable board interrupts, read DRQ and IRQ */
 780     writeb(0xff, &dp2_ptr->io.irqdel);
 781     writeb(0x00, &dp2_ptr->io.irqen);
 782     writeb(0x00, &dp2_ptr->u.ic.S_Status);
 783     writeb(0x00, &dp2_ptr->u.ic.Cmd_Index);
 784
 785     irq_drq = readb(&dp2_ptr->io.rq);
 786     for (i=0; i<3; ++i) {
 787         if ((irq_drq & 1)==0)
 788             break;
 789         irq_drq >>= 1;
 790     }
 791     ha->drq = gdth_drq_tab[i];
 792
 793     irq_drq = readb(&dp2_ptr->io.rq) >> 3;
 794     for (i=1; i<5; ++i) {
 795         if ((irq_drq & 1)==0)
 796             break;
 797         irq_drq >>= 1;
 798     }
 799     ha->irq = gdth_irq_tab[i];
 800
 801     /* deinitialize services */
 802     writel(bios_adr, &dp2_ptr->u.ic.S_Info[0]);
 803     writeb(0xff, &dp2_ptr->u.ic.S_Cmd_Indx);
 804     writeb(0, &dp2_ptr->io.event);
 805     retries = INIT_RETRIES;
 806     gdth_delay(20);
 807     while (readb(&dp2_ptr->u.ic.S_Status) != 0xff) {
 808         if (--retries == 0) {
 809             printk("GDT-ISA: Initialization error (DEINIT failed)\n");
 810             iounmap(ha->brd);
 811             return 0;
 812         }
 813         gdth_delay(1);
 814     }
 815     prot_ver = (unchar)readl(&dp2_ptr->u.ic.S_Info[0]);
 816     writeb(0, &dp2_ptr->u.ic.Status);
 817     writeb(0xff, &dp2_ptr->io.irqdel);
 818     if (prot_ver != PROTOCOL_VERSION) {
 819         printk("GDT-ISA: Illegal protocol version\n");
 820         iounmap(ha->brd);
 821         return 0;
 822     }
 823
 824     ha->oem_id = OEM_ID_ICP;
 825     ha->type = GDT_ISA;
 826     ha->ic_all_size = sizeof(dp2_ptr->u);
 827     ha->stype= GDT2_ID;
 828     ha->brd_phys = bios_adr >> 4;
 829
 830     /* special request to controller BIOS */
 831     writel(0x00, &dp2_ptr->u.ic.S_Info[0]);
 832     writel(0x00, &dp2_ptr->u.ic.S_Info[1]);
 833     writel(0x01, &dp2_ptr->u.ic.S_Info[2]);
 834     writel(0x00, &dp2_ptr->u.ic.S_Info[3]);
 835     writeb(0xfe, &dp2_ptr->u.ic.S_Cmd_Indx);
 836     writeb(0, &dp2_ptr->io.event);
 837     retries = INIT_RETRIES;
 838     gdth_delay(20);
 839     while (readb(&dp2_ptr->u.ic.S_Status) != 0xfe) {
 840         if (--retries == 0) {
 841             printk("GDT-ISA: Initialization error\n");
 842             iounmap(ha->brd);
 843             return 0;
 844         }
 845         gdth_delay(1);
 846     }
 847     writeb(0, &dp2_ptr->u.ic.Status);
 848     writeb(0xff, &dp2_ptr->io.irqdel);
 849
 850     ha->dma64_support = 0;
 851     return 1;
 852 }
 853 #endif /* CONFIG_ISA */
 854
 855 #ifdef CONFIG_PCI
 856 static int gdth_init_pci(struct pci_dev *pdev, gdth_pci_str *pcistr,
 857                                    gdth_ha_str *ha)
 858 {
 859     register gdt6_dpram_str __iomem *dp6_ptr;
 860     register gdt6c_dpram_str __iomem *dp6c_ptr;
 861     register gdt6m_dpram_str __iomem *dp6m_ptr;
 862     ulong32 retries;
 863     unchar prot_ver;
 864     ushort command;
 865     int i, found = FALSE;
 866
 867     TRACE(("gdth_init_pci()\n"));
 868
 869     if (pdev->vendor == PCI_VENDOR_ID_INTEL)
 870         ha->oem_id = OEM_ID_INTEL;
 871     else
 872         ha->oem_id = OEM_ID_ICP;
 873     ha->brd_phys = (pdev->bus->number << 8) | (pdev->devfn & 0xf8);
 874     ha->stype = (ulong32)pdev->device;
 875     ha->irq = pdev->irq;
 876     ha->pdev = pdev;
 877
 878     if (ha->pdev->device <= PCI_DEVICE_ID_VORTEX_GDT6000B) {  /* GDT6000/B */
 879         TRACE2(("init_pci() dpmem %lx irq %d\n",pcistr->dpmem,ha->irq));
 880         ha->brd = ioremap(pcistr->dpmem, sizeof(gdt6_dpram_str));
 881         if (ha->brd == NULL) {
 882             printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
 883             return 0;
 884         }
 885         /* check and reset interface area */
 886         dp6_ptr = ha->brd;
 887         writel(DPMEM_MAGIC, &dp6_ptr->u);
 888         if (readl(&dp6_ptr->u) != DPMEM_MAGIC) {
 889             printk("GDT-PCI: Cannot access DPMEM at 0x%lx (shadowed?)\n",
 890                    pcistr->dpmem);
 891             found = FALSE;
 892             for (i = 0xC8000; i < 0xE8000; i += 0x4000) {
 893                 iounmap(ha->brd);
 894                 ha->brd = ioremap(i, sizeof(ushort));
 895                 if (ha->brd == NULL) {
 896                     printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
 897                     return 0;
 898                 }
 899                 if (readw(ha->brd) != 0xffff) {
 900                     TRACE2(("init_pci_old() address 0x%x busy\n", i));
 901                     continue;
 902                 }
 903                 iounmap(ha->brd);
 904                 pci_write_config_dword(pdev, PCI_BASE_ADDRESS_0, i);
 905                 ha->brd = ioremap(i, sizeof(gdt6_dpram_str));
 906                 if (ha->brd == NULL) {
 907                     printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
 908                     return 0;
 909                 }
 910                 dp6_ptr = ha->brd;
 911                 writel(DPMEM_MAGIC, &dp6_ptr->u);
 912                 if (readl(&dp6_ptr->u) == DPMEM_MAGIC) {
 913                     printk("GDT-PCI: Use free address at 0x%x\n", i);
 914                     found = TRUE;
 915                     break;
 916                 }
 917             }
 918             if (!found) {
 919                 printk("GDT-PCI: No free address found!\n");
 920                 iounmap(ha->brd);
 921                 return 0;
 922             }
 923         }
 924         memset_io(&dp6_ptr->u, 0, sizeof(dp6_ptr->u));
 925         if (readl(&dp6_ptr->u) != 0) {
 926             printk("GDT-PCI: Initialization error (DPMEM write error)\n");
 927             iounmap(ha->brd);
 928             return 0;
 929         }
 930
 931         /* disable board interrupts, deinit services */
 932         writeb(0xff, &dp6_ptr->io.irqdel);
 933         writeb(0x00, &dp6_ptr->io.irqen);
 934         writeb(0x00, &dp6_ptr->u.ic.S_Status);
 935         writeb(0x00, &dp6_ptr->u.ic.Cmd_Index);
 936
 937         writel(pcistr->dpmem, &dp6_ptr->u.ic.S_Info[0]);
 938         writeb(0xff, &dp6_ptr->u.ic.S_Cmd_Indx);
 939         writeb(0, &dp6_ptr->io.event);
 940         retries = INIT_RETRIES;
 941         gdth_delay(20);
 942         while (readb(&dp6_ptr->u.ic.S_Status) != 0xff) {
 943             if (--retries == 0) {
 944                 printk("GDT-PCI: Initialization error (DEINIT failed)\n");
 945                 iounmap(ha->brd);
 946                 return 0;
 947             }
 948             gdth_delay(1);
 949         }
 950         prot_ver = (unchar)readl(&dp6_ptr->u.ic.S_Info[0]);
 951         writeb(0, &dp6_ptr->u.ic.S_Status);
 952         writeb(0xff, &dp6_ptr->io.irqdel);
 953         if (prot_ver != PROTOCOL_VERSION) {
 954             printk("GDT-PCI: Illegal protocol version\n");
 955             iounmap(ha->brd);
 956             return 0;
 957         }
 958
 959         ha->type = GDT_PCI;
 960         ha->ic_all_size = sizeof(dp6_ptr->u);
 961
 962         /* special command to controller BIOS */
 963         writel(0x00, &dp6_ptr->u.ic.S_Info[0]);
 964         writel(0x00, &dp6_ptr->u.ic.S_Info[1]);
 965         writel(0x00, &dp6_ptr->u.ic.S_Info[2]);
 966         writel(0x00, &dp6_ptr->u.ic.S_Info[3]);
 967         writeb(0xfe, &dp6_ptr->u.ic.S_Cmd_Indx);
 968         writeb(0, &dp6_ptr->io.event);
 969         retries = INIT_RETRIES;
 970         gdth_delay(20);
 971         while (readb(&dp6_ptr->u.ic.S_Status) != 0xfe) {
 972             if (--retries == 0) {
 973                 printk("GDT-PCI: Initialization error\n");
 974                 iounmap(ha->brd);
 975                 return 0;
 976             }
 977             gdth_delay(1);
 978         }
 979         writeb(0, &dp6_ptr->u.ic.S_Status);
 980         writeb(0xff, &dp6_ptr->io.irqdel);
 981
 982         ha->dma64_support = 0;
 983
 984     } else if (ha->pdev->device <= PCI_DEVICE_ID_VORTEX_GDT6555) { /* GDT6110, ... */
 985         ha->plx = (gdt6c_plx_regs *)pcistr->io;
 986         TRACE2(("init_pci_new() dpmem %lx irq %d\n",
 987             pcistr->dpmem,ha->irq));
 988         ha->brd = ioremap(pcistr->dpmem, sizeof(gdt6c_dpram_str));
 989         if (ha->brd == NULL) {
 990             printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
 991             iounmap(ha->brd);
 992             return 0;
 993         }
 994         /* check and reset interface area */
 995         dp6c_ptr = ha->brd;
 996         writel(DPMEM_MAGIC, &dp6c_ptr->u);
 997         if (readl(&dp6c_ptr->u) != DPMEM_MAGIC) {
 998             printk("GDT-PCI: Cannot access DPMEM at 0x%lx (shadowed?)\n",
 999                    pcistr->dpmem);
1000             found = FALSE;
1001             for (i = 0xC8000; i < 0xE8000; i += 0x4000) {
1002                 iounmap(ha->brd);
1003                 ha->brd = ioremap(i, sizeof(ushort));
1004                 if (ha->brd == NULL) {
1005                     printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1006                     return 0;
1007                 }
1008                 if (readw(ha->brd) != 0xffff) {
1009                     TRACE2(("init_pci_plx() address 0x%x busy\n", i));
1010                     continue;
1011                 }
1012                 iounmap(ha->brd);
1013                 pci_write_config_dword(pdev, PCI_BASE_ADDRESS_2, i);
1014                 ha->brd = ioremap(i, sizeof(gdt6c_dpram_str));
1015                 if (ha->brd == NULL) {
1016                     printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1017                     return 0;
1018                 }
1019                 dp6c_ptr = ha->brd;
1020                 writel(DPMEM_MAGIC, &dp6c_ptr->u);
1021                 if (readl(&dp6c_ptr->u) == DPMEM_MAGIC) {
1022                     printk("GDT-PCI: Use free address at 0x%x\n", i);
1023                     found = TRUE;
1024                     break;
1025                 }
1026             }
1027             if (!found) {
1028                 printk("GDT-PCI: No free address found!\n");
1029                 iounmap(ha->brd);
1030                 return 0;
1031             }
1032         }
1033         memset_io(&dp6c_ptr->u, 0, sizeof(dp6c_ptr->u));
1034         if (readl(&dp6c_ptr->u) != 0) {
1035             printk("GDT-PCI: Initialization error (DPMEM write error)\n");
1036             iounmap(ha->brd);
1037             return 0;
1038         }
1039
1040         /* disable board interrupts, deinit services */
1041         outb(0x00,PTR2USHORT(&ha->plx->control1));
1042         outb(0xff,PTR2USHORT(&ha->plx->edoor_reg));
1043
1044         writeb(0x00, &dp6c_ptr->u.ic.S_Status);
1045         writeb(0x00, &dp6c_ptr->u.ic.Cmd_Index);
1046
1047         writel(pcistr->dpmem, &dp6c_ptr->u.ic.S_Info[0]);
1048         writeb(0xff, &dp6c_ptr->u.ic.S_Cmd_Indx);
1049
1050         outb(1,PTR2USHORT(&ha->plx->ldoor_reg));
1051
1052         retries = INIT_RETRIES;
1053         gdth_delay(20);
1054         while (readb(&dp6c_ptr->u.ic.S_Status) != 0xff) {
1055             if (--retries == 0) {
1056                 printk("GDT-PCI: Initialization error (DEINIT failed)\n");
1057                 iounmap(ha->brd);
1058                 return 0;
1059             }
1060             gdth_delay(1);
1061         }
1062         prot_ver = (unchar)readl(&dp6c_ptr->u.ic.S_Info[0]);
1063         writeb(0, &dp6c_ptr->u.ic.Status);
1064         if (prot_ver != PROTOCOL_VERSION) {
1065             printk("GDT-PCI: Illegal protocol version\n");
1066             iounmap(ha->brd);
1067             return 0;
1068         }
1069
1070         ha->type = GDT_PCINEW;
1071         ha->ic_all_size = sizeof(dp6c_ptr->u);
1072
1073         /* special command to controller BIOS */
1074         writel(0x00, &dp6c_ptr->u.ic.S_Info[0]);
1075         writel(0x00, &dp6c_ptr->u.ic.S_Info[1]);
1076         writel(0x00, &dp6c_ptr->u.ic.S_Info[2]);
1077         writel(0x00, &dp6c_ptr->u.ic.S_Info[3]);
1078         writeb(0xfe, &dp6c_ptr->u.ic.S_Cmd_Indx);
1079
1080         outb(1,PTR2USHORT(&ha->plx->ldoor_reg));
1081
1082         retries = INIT_RETRIES;
1083         gdth_delay(20);
1084         while (readb(&dp6c_ptr->u.ic.S_Status) != 0xfe) {
1085             if (--retries == 0) {
1086                 printk("GDT-PCI: Initialization error\n");
1087                 iounmap(ha->brd);
1088                 return 0;
1089             }
1090             gdth_delay(1);
1091         }
1092         writeb(0, &dp6c_ptr->u.ic.S_Status);
1093
1094         ha->dma64_support = 0;
1095
1096     } else {                                            /* MPR */
1097         TRACE2(("init_pci_mpr() dpmem %lx irq %d\n",pcistr->dpmem,ha->irq));
1098         ha->brd = ioremap(pcistr->dpmem, sizeof(gdt6m_dpram_str));
1099         if (ha->brd == NULL) {
1100             printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1101             return 0;
1102         }
1103
1104         /* manipulate config. space to enable DPMEM, start RP controller */
1105         pci_read_config_word(pdev, PCI_COMMAND, &command);
1106         command |= 6;
1107         pci_write_config_word(pdev, PCI_COMMAND, command);
1108         if (pci_resource_start(pdev, 8) == 1UL)
1109             pci_resource_start(pdev, 8) = 0UL;
1110         i = 0xFEFF0001UL;
1111         pci_write_config_dword(pdev, PCI_ROM_ADDRESS, i);
1112         gdth_delay(1);
1113         pci_write_config_dword(pdev, PCI_ROM_ADDRESS,
1114                                pci_resource_start(pdev, 8));
1115
1116         dp6m_ptr = ha->brd;
1117
1118         /* Ensure that it is safe to access the non HW portions of DPMEM.
1119          * Aditional check needed for Xscale based RAID controllers */
1120         while( ((int)readb(&dp6m_ptr->i960r.sema0_reg) ) & 3 )
1121             gdth_delay(1);
1122
1123         /* check and reset interface area */
1124         writel(DPMEM_MAGIC, &dp6m_ptr->u);
1125         if (readl(&dp6m_ptr->u) != DPMEM_MAGIC) {
1126             printk("GDT-PCI: Cannot access DPMEM at 0x%lx (shadowed?)\n",
1127                    pcistr->dpmem);
1128             found = FALSE;
1129             for (i = 0xC8000; i < 0xE8000; i += 0x4000) {
1130                 iounmap(ha->brd);
1131                 ha->brd = ioremap(i, sizeof(ushort));
1132                 if (ha->brd == NULL) {
1133                     printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1134                     return 0;
1135                 }
1136                 if (readw(ha->brd) != 0xffff) {
1137                     TRACE2(("init_pci_mpr() address 0x%x busy\n", i));
1138                     continue;
1139                 }
1140                 iounmap(ha->brd);
1141                 pci_write_config_dword(pdev, PCI_BASE_ADDRESS_0, i);
1142                 ha->brd = ioremap(i, sizeof(gdt6m_dpram_str));
1143                 if (ha->brd == NULL) {
1144                     printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1145                     return 0;
1146                 }
1147                 dp6m_ptr = ha->brd;
1148                 writel(DPMEM_MAGIC, &dp6m_ptr->u);
1149                 if (readl(&dp6m_ptr->u) == DPMEM_MAGIC) {
1150                     printk("GDT-PCI: Use free address at 0x%x\n", i);
1151                     found = TRUE;
1152                     break;
1153                 }
1154             }
1155             if (!found) {
1156                 printk("GDT-PCI: No free address found!\n");
1157                 iounmap(ha->brd);
1158                 return 0;
1159             }
1160         }
1161         memset_io(&dp6m_ptr->u, 0, sizeof(dp6m_ptr->u));
1162
1163         /* disable board interrupts, deinit services */
1164         writeb(readb(&dp6m_ptr->i960r.edoor_en_reg) | 4,
1165                     &dp6m_ptr->i960r.edoor_en_reg);
1166         writeb(0xff, &dp6m_ptr->i960r.edoor_reg);
1167         writeb(0x00, &dp6m_ptr->u.ic.S_Status);
1168         writeb(0x00, &dp6m_ptr->u.ic.Cmd_Index);
1169
1170         writel(pcistr->dpmem, &dp6m_ptr->u.ic.S_Info[0]);
1171         writeb(0xff, &dp6m_ptr->u.ic.S_Cmd_Indx);
1172         writeb(1, &dp6m_ptr->i960r.ldoor_reg);
1173         retries = INIT_RETRIES;
1174         gdth_delay(20);
1175         while (readb(&dp6m_ptr->u.ic.S_Status) != 0xff) {
1176             if (--retries == 0) {
1177                 printk("GDT-PCI: Initialization error (DEINIT failed)\n");
1178                 iounmap(ha->brd);
1179                 return 0;
1180             }
1181             gdth_delay(1);
1182         }
1183         prot_ver = (unchar)readl(&dp6m_ptr->u.ic.S_Info[0]);
1184         writeb(0, &dp6m_ptr->u.ic.S_Status);
1185         if (prot_ver != PROTOCOL_VERSION) {
1186             printk("GDT-PCI: Illegal protocol version\n");
1187             iounmap(ha->brd);
1188             return 0;
1189         }
1190
1191         ha->type = GDT_PCIMPR;
1192         ha->ic_all_size = sizeof(dp6m_ptr->u);
1193
1194         /* special command to controller BIOS */
1195         writel(0x00, &dp6m_ptr->u.ic.S_Info[0]);
1196         writel(0x00, &dp6m_ptr->u.ic.S_Info[1]);
1197         writel(0x00, &dp6m_ptr->u.ic.S_Info[2]);
1198         writel(0x00, &dp6m_ptr->u.ic.S_Info[3]);
1199         writeb(0xfe, &dp6m_ptr->u.ic.S_Cmd_Indx);
1200         writeb(1, &dp6m_ptr->i960r.ldoor_reg);
1201         retries = INIT_RETRIES;
1202         gdth_delay(20);
1203         while (readb(&dp6m_ptr->u.ic.S_Status) != 0xfe) {
1204             if (--retries == 0) {
1205                 printk("GDT-PCI: Initialization error\n");
1206                 iounmap(ha->brd);
1207                 return 0;
1208             }
1209             gdth_delay(1);
1210         }
1211         writeb(0, &dp6m_ptr->u.ic.S_Status);
1212
1213         /* read FW version to detect 64-bit DMA support */
1214         writeb(0xfd, &dp6m_ptr->u.ic.S_Cmd_Indx);
1215         writeb(1, &dp6m_ptr->i960r.ldoor_reg);
1216         retries = INIT_RETRIES;
1217         gdth_delay(20);
1218         while (readb(&dp6m_ptr->u.ic.S_Status) != 0xfd) {
1219             if (--retries == 0) {
1220                 printk("GDT-PCI: Initialization error (DEINIT failed)\n");
1221                 iounmap(ha->brd);
1222                 return 0;
1223             }
1224             gdth_delay(1);
1225         }
1226         prot_ver = (unchar)(readl(&dp6m_ptr->u.ic.S_Info[0]) >> 16);
1227         writeb(0, &dp6m_ptr->u.ic.S_Status);
1228         if (prot_ver < 0x2b)      /* FW < x.43: no 64-bit DMA support */
1229             ha->dma64_support = 0;
1230         else
1231             ha->dma64_support = 1;
1232     }
1233
1234     return 1;
1235 }
1236 #endif /* CONFIG_PCI */
1237
1238 /* controller protocol functions */
1239
1240 static void __init gdth_enable_int(gdth_ha_str *ha)
1241 {
1242     ulong flags;
1243     gdt2_dpram_str __iomem *dp2_ptr;
1244     gdt6_dpram_str __iomem *dp6_ptr;
1245     gdt6m_dpram_str __iomem *dp6m_ptr;
1246
1247     TRACE(("gdth_enable_int() hanum %d\n",ha->hanum));
1248     spin_lock_irqsave(&ha->smp_lock, flags);
1249
1250     if (ha->type == GDT_EISA) {
1251         outb(0xff, ha->bmic + EDOORREG);
1252         outb(0xff, ha->bmic + EDENABREG);
1253         outb(0x01, ha->bmic + EINTENABREG);
1254     } else if (ha->type == GDT_ISA) {
1255         dp2_ptr = ha->brd;
1256         writeb(1, &dp2_ptr->io.irqdel);
1257         writeb(0, &dp2_ptr->u.ic.Cmd_Index);
1258         writeb(1, &dp2_ptr->io.irqen);
1259     } else if (ha->type == GDT_PCI) {
1260         dp6_ptr = ha->brd;
1261         writeb(1, &dp6_ptr->io.irqdel);
1262         writeb(0, &dp6_ptr->u.ic.Cmd_Index);
1263         writeb(1, &dp6_ptr->io.irqen);
1264     } else if (ha->type == GDT_PCINEW) {
1265         outb(0xff, PTR2USHORT(&ha->plx->edoor_reg));
1266         outb(0x03, PTR2USHORT(&ha->plx->control1));
1267     } else if (ha->type == GDT_PCIMPR) {
1268         dp6m_ptr = ha->brd;
1269         writeb(0xff, &dp6m_ptr->i960r.edoor_reg);
1270         writeb(readb(&dp6m_ptr->i960r.edoor_en_reg) & ~4,
1271                     &dp6m_ptr->i960r.edoor_en_reg);
1272     }
1273     spin_unlock_irqrestore(&ha->smp_lock, flags);
1274 }
1275
1276 /* return IStatus if interrupt was from this card else 0 */
1277 static unchar gdth_get_status(gdth_ha_str *ha)
1278 {
1279     unchar IStatus = 0;
1280
1281     TRACE(("gdth_get_status() irq %d ctr_count %d\n", ha->irq, gdth_ctr_count));
1282
1283         if (ha->type == GDT_EISA)
1284             IStatus = inb((ushort)ha->bmic + EDOORREG);
1285         else if (ha->type == GDT_ISA)
1286             IStatus =
1287                 readb(&((gdt2_dpram_str __iomem *)ha->brd)->u.ic.Cmd_Index);
1288         else if (ha->type == GDT_PCI)
1289             IStatus =
1290                 readb(&((gdt6_dpram_str __iomem *)ha->brd)->u.ic.Cmd_Index);
1291         else if (ha->type == GDT_PCINEW)
1292             IStatus = inb(PTR2USHORT(&ha->plx->edoor_reg));
1293         else if (ha->type == GDT_PCIMPR)
1294             IStatus =
1295                 readb(&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.edoor_reg);
1296
1297         return IStatus;
1298 }
1299
1300 static int gdth_test_busy(gdth_ha_str *ha)
1301 {
1302     register int gdtsema0 = 0;
1303
1304     TRACE(("gdth_test_busy() hanum %d\n", ha->hanum));
1305
1306     if (ha->type == GDT_EISA)
1307         gdtsema0 = (int)inb(ha->bmic + SEMA0REG);
1308     else if (ha->type == GDT_ISA)
1309         gdtsema0 = (int)readb(&((gdt2_dpram_str __iomem *)ha->brd)->u.ic.Sema0);
1310     else if (ha->type == GDT_PCI)
1311         gdtsema0 = (int)readb(&((gdt6_dpram_str __iomem *)ha->brd)->u.ic.Sema0);
1312     else if (ha->type == GDT_PCINEW)
1313         gdtsema0 = (int)inb(PTR2USHORT(&ha->plx->sema0_reg));
1314     else if (ha->type == GDT_PCIMPR)
1315         gdtsema0 =
1316             (int)readb(&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.sema0_reg);
1317
1318     return (gdtsema0 & 1);
1319 }
1320
1321
1322 static int gdth_get_cmd_index(gdth_ha_str *ha)
1323 {
1324     int i;
1325
1326     TRACE(("gdth_get_cmd_index() hanum %d\n", ha->hanum));
1327
1328     for (i=0; i<GDTH_MAXCMDS; ++i) {
1329         if (ha->cmd_tab[i].cmnd == UNUSED_CMND) {
1330             ha->cmd_tab[i].cmnd = ha->pccb->RequestBuffer;
1331             ha->cmd_tab[i].service = ha->pccb->Service;
1332             ha->pccb->CommandIndex = (ulong32)i+2;
1333             return (i+2);
1334         }
1335     }
1336     return 0;
1337 }
1338
1339
1340 static void gdth_set_sema0(gdth_ha_str *ha)
1341 {
1342     TRACE(("gdth_set_sema0() hanum %d\n", ha->hanum));
1343
1344     if (ha->type == GDT_EISA) {
1345         outb(1, ha->bmic + SEMA0REG);
1346     } else if (ha->type == GDT_ISA) {
1347         writeb(1, &((gdt2_dpram_str __iomem *)ha->brd)->u.ic.Sema0);
1348     } else if (ha->type == GDT_PCI) {
1349         writeb(1, &((gdt6_dpram_str __iomem *)ha->brd)->u.ic.Sema0);
1350     } else if (ha->type == GDT_PCINEW) {
1351         outb(1, PTR2USHORT(&ha->plx->sema0_reg));
1352     } else if (ha->type == GDT_PCIMPR) {
1353         writeb(1, &((gdt6m_dpram_str __iomem *)ha->brd)->i960r.sema0_reg);
1354     }
1355 }
1356
1357
1358 static void gdth_copy_command(gdth_ha_str *ha)
1359 {
1360     register gdth_cmd_str *cmd_ptr;
1361     register gdt6m_dpram_str __iomem *dp6m_ptr;
1362     register gdt6c_dpram_str __iomem *dp6c_ptr;
1363     gdt6_dpram_str __iomem *dp6_ptr;
1364     gdt2_dpram_str __iomem *dp2_ptr;
1365     ushort cp_count,dp_offset,cmd_no;
1366
1367     TRACE(("gdth_copy_command() hanum %d\n", ha->hanum));
1368
1369     cp_count = ha->cmd_len;
1370     dp_offset= ha->cmd_offs_dpmem;
1371     cmd_no   = ha->cmd_cnt;
1372     cmd_ptr  = ha->pccb;
1373
1374     ++ha->cmd_cnt;
1375     if (ha->type == GDT_EISA)
1376         return;                                 /* no DPMEM, no copy */
1377
1378     /* set cpcount dword aligned */
1379     if (cp_count & 3)
1380         cp_count += (4 - (cp_count & 3));
1381
1382     ha->cmd_offs_dpmem += cp_count;
1383
1384     /* set offset and service, copy command to DPMEM */
1385     if (ha->type == GDT_ISA) {
1386         dp2_ptr = ha->brd;
1387         writew(dp_offset + DPMEM_COMMAND_OFFSET,
1388                     &dp2_ptr->u.ic.comm_queue[cmd_no].offset);
1389         writew((ushort)cmd_ptr->Service,
1390                     &dp2_ptr->u.ic.comm_queue[cmd_no].serv_id);
1391         memcpy_toio(&dp2_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count);
1392     } else if (ha->type == GDT_PCI) {
1393         dp6_ptr = ha->brd;
1394         writew(dp_offset + DPMEM_COMMAND_OFFSET,
1395                     &dp6_ptr->u.ic.comm_queue[cmd_no].offset);
1396         writew((ushort)cmd_ptr->Service,
1397                     &dp6_ptr->u.ic.comm_queue[cmd_no].serv_id);
1398         memcpy_toio(&dp6_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count);
1399     } else if (ha->type == GDT_PCINEW) {
1400         dp6c_ptr = ha->brd;
1401         writew(dp_offset + DPMEM_COMMAND_OFFSET,
1402                     &dp6c_ptr->u.ic.comm_queue[cmd_no].offset);
1403         writew((ushort)cmd_ptr->Service,
1404                     &dp6c_ptr->u.ic.comm_queue[cmd_no].serv_id);
1405         memcpy_toio(&dp6c_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count);
1406     } else if (ha->type == GDT_PCIMPR) {
1407         dp6m_ptr = ha->brd;
1408         writew(dp_offset + DPMEM_COMMAND_OFFSET,
1409                     &dp6m_ptr->u.ic.comm_queue[cmd_no].offset);
1410         writew((ushort)cmd_ptr->Service,
1411                     &dp6m_ptr->u.ic.comm_queue[cmd_no].serv_id);
1412         memcpy_toio(&dp6m_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count);
1413     }
1414 }
1415
1416
1417 static void gdth_release_event(gdth_ha_str *ha)
1418 {
1419     TRACE(("gdth_release_event() hanum %d\n", ha->hanum));
1420
1421 #ifdef GDTH_STATISTICS
1422     {
1423         ulong32 i,j;
1424         for (i=0,j=0; j<GDTH_MAXCMDS; ++j) {
1425             if (ha->cmd_tab[j].cmnd != UNUSED_CMND)
1426                 ++i;
1427         }
1428         if (max_index < i) {
1429             max_index = i;
1430             TRACE3(("GDT: max_index = %d\n",(ushort)i));
1431         }
1432     }
1433 #endif
1434
1435     if (ha->pccb->OpCode == GDT_INIT)
1436         ha->pccb->Service |= 0x80;
1437
1438     if (ha->type == GDT_EISA) {
1439         if (ha->pccb->OpCode == GDT_INIT)               /* store DMA buffer */
1440             outl(ha->ccb_phys, ha->bmic + MAILBOXREG);
1441         outb(ha->pccb->Service, ha->bmic + LDOORREG);
1442     } else if (ha->type == GDT_ISA) {
1443         writeb(0, &((gdt2_dpram_str __iomem *)ha->brd)->io.event);
1444     } else if (ha->type == GDT_PCI) {
1445         writeb(0, &((gdt6_dpram_str __iomem *)ha->brd)->io.event);
1446     } else if (ha->type == GDT_PCINEW) {
1447         outb(1, PTR2USHORT(&ha->plx->ldoor_reg));
1448     } else if (ha->type == GDT_PCIMPR) {
1449         writeb(1, &((gdt6m_dpram_str __iomem *)ha->brd)->i960r.ldoor_reg);
1450     }
1451 }
1452
1453 static int gdth_wait(gdth_ha_str *ha, int index, ulong32 time)
1454 {
1455     int answer_found = FALSE;
1456     int wait_index = 0;
1457
1458     TRACE(("gdth_wait() hanum %d index %d time %d\n", ha->hanum, index, time));
1459
1460     if (index == 0)
1461         return 1;                               /* no wait required */
1462
1463     do {
1464         __gdth_interrupt(ha, true, &wait_index);
1465         if (wait_index == index) {
1466             answer_found = TRUE;
1467             break;
1468         }
1469         gdth_delay(1);
1470     } while (--time);
1471
1472     while (gdth_test_busy(ha))
1473         gdth_delay(0);
1474
1475     return (answer_found);
1476 }
1477
1478
1479 static int gdth_internal_cmd(gdth_ha_str *ha, unchar service, ushort opcode,
1480                                             ulong32 p1, ulong64 p2, ulong64 p3)
1481 {
1482     register gdth_cmd_str *cmd_ptr;
1483     int retries,index;
1484
1485     TRACE2(("gdth_internal_cmd() service %d opcode %d\n",service,opcode));
1486
1487     cmd_ptr = ha->pccb;
1488     memset((char*)cmd_ptr,0,sizeof(gdth_cmd_str));
1489
1490     /* make command  */
1491     for (retries = INIT_RETRIES;;) {
1492         cmd_ptr->Service          = service;
1493         cmd_ptr->RequestBuffer    = INTERNAL_CMND;
1494         if (!(index=gdth_get_cmd_index(ha))) {
1495             TRACE(("GDT: No free command index found\n"));
1496             return 0;
1497         }
1498         gdth_set_sema0(ha);
1499         cmd_ptr->OpCode           = opcode;
1500         cmd_ptr->BoardNode        = LOCALBOARD;
1501         if (service == CACHESERVICE) {
1502             if (opcode == GDT_IOCTL) {
1503                 cmd_ptr->u.ioctl.subfunc = p1;
1504                 cmd_ptr->u.ioctl.channel = (ulong32)p2;
1505                 cmd_ptr->u.ioctl.param_size = (ushort)p3;
1506                 cmd_ptr->u.ioctl.p_param = ha->scratch_phys;
1507             } else {
1508                 if (ha->cache_feat & GDT_64BIT) {
1509                     cmd_ptr->u.cache64.DeviceNo = (ushort)p1;
1510                     cmd_ptr->u.cache64.BlockNo  = p2;
1511                 } else {
1512                     cmd_ptr->u.cache.DeviceNo = (ushort)p1;
1513                     cmd_ptr->u.cache.BlockNo  = (ulong32)p2;
1514                 }
1515             }
1516         } else if (service == SCSIRAWSERVICE) {
1517             if (ha->raw_feat & GDT_64BIT) {
1518                 cmd_ptr->u.raw64.direction  = p1;
1519                 cmd_ptr->u.raw64.bus        = (unchar)p2;
1520                 cmd_ptr->u.raw64.target     = (unchar)p3;
1521                 cmd_ptr->u.raw64.lun        = (unchar)(p3 >> 8);
1522             } else {
1523                 cmd_ptr->u.raw.direction  = p1;
1524                 cmd_ptr->u.raw.bus        = (unchar)p2;
1525                 cmd_ptr->u.raw.target     = (unchar)p3;
1526                 cmd_ptr->u.raw.lun        = (unchar)(p3 >> 8);
1527             }
1528         } else if (service == SCREENSERVICE) {
1529             if (opcode == GDT_REALTIME) {
1530                 *(ulong32 *)&cmd_ptr->u.screen.su.data[0] = p1;
1531                 *(ulong32 *)&cmd_ptr->u.screen.su.data[4] = (ulong32)p2;
1532                 *(ulong32 *)&cmd_ptr->u.screen.su.data[8] = (ulong32)p3;
1533             }
1534         }
1535         ha->cmd_len          = sizeof(gdth_cmd_str);
1536         ha->cmd_offs_dpmem   = 0;
1537         ha->cmd_cnt          = 0;
1538         gdth_copy_command(ha);
1539         gdth_release_event(ha);
1540         gdth_delay(20);
1541         if (!gdth_wait(ha, index, INIT_TIMEOUT)) {
1542             printk("GDT: Initialization error (timeout service %d)\n",service);
1543             return 0;
1544         }
1545         if (ha->status != S_BSY || --retries == 0)
1546             break;
1547         gdth_delay(1);
1548     }
1549
1550     return (ha->status != S_OK ? 0:1);
1551 }
1552
1553
1554 /* search for devices */
1555
1556 static int __init gdth_search_drives(gdth_ha_str *ha)
1557 {
1558     ushort cdev_cnt, i;
1559     int ok;
1560     ulong32 bus_no, drv_cnt, drv_no, j;
1561     gdth_getch_str *chn;
1562     gdth_drlist_str *drl;
1563     gdth_iochan_str *ioc;
1564     gdth_raw_iochan_str *iocr;
1565     gdth_arcdl_str *alst;
1566     gdth_alist_str *alst2;
1567     gdth_oem_str_ioctl *oemstr;
1568 #ifdef INT_COAL
1569     gdth_perf_modes *pmod;
1570 #endif
1571
1572 #ifdef GDTH_RTC
1573     unchar rtc[12];
1574     ulong flags;
1575 #endif
1576
1577     TRACE(("gdth_search_drives() hanum %d\n", ha->hanum));
1578     ok = 0;
1579
1580     /* initialize controller services, at first: screen service */
1581     ha->screen_feat = 0;
1582     if (!force_dma32) {
1583         ok = gdth_internal_cmd(ha, SCREENSERVICE, GDT_X_INIT_SCR, 0, 0, 0);
1584         if (ok)
1585             ha->screen_feat = GDT_64BIT;
1586     }
1587     if (force_dma32 || (!ok && ha->status == (ushort)S_NOFUNC))
1588         ok = gdth_internal_cmd(ha, SCREENSERVICE, GDT_INIT, 0, 0, 0);
1589     if (!ok) {
1590         printk("GDT-HA %d: Initialization error screen service (code %d)\n",
1591                ha->hanum, ha->status);
1592         return 0;
1593     }
1594     TRACE2(("gdth_search_drives(): SCREENSERVICE initialized\n"));
1595
1596 #ifdef GDTH_RTC
1597     /* read realtime clock info, send to controller */
1598     /* 1. wait for the falling edge of update flag */
1599     spin_lock_irqsave(&rtc_lock, flags);
1600     for (j = 0; j < 1000000; ++j)
1601         if (CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP)
1602             break;
1603     for (j = 0; j < 1000000; ++j)
1604         if (!(CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP))
1605             break;
1606     /* 2. read info */
1607     do {
1608         for (j = 0; j < 12; ++j)
1609             rtc[j] = CMOS_READ(j);
1610     } while (rtc[0] != CMOS_READ(0));
1611     spin_unlock_irqrestore(&rtc_lock, flags);
1612     TRACE2(("gdth_search_drives(): RTC: %x/%x/%x\n",*(ulong32 *)&rtc[0],
1613             *(ulong32 *)&rtc[4], *(ulong32 *)&rtc[8]));
1614     /* 3. send to controller firmware */
1615     gdth_internal_cmd(ha, SCREENSERVICE, GDT_REALTIME, *(ulong32 *)&rtc[0],
1616                       *(ulong32 *)&rtc[4], *(ulong32 *)&rtc[8]);
1617 #endif
1618
1619     /* unfreeze all IOs */
1620     gdth_internal_cmd(ha, CACHESERVICE, GDT_UNFREEZE_IO, 0, 0, 0);
1621
1622     /* initialize cache service */
1623     ha->cache_feat = 0;
1624     if (!force_dma32) {
1625         ok = gdth_internal_cmd(ha, CACHESERVICE, GDT_X_INIT_HOST, LINUX_OS,
1626                                                                          0, 0);
1627         if (ok)
1628             ha->cache_feat = GDT_64BIT;
1629     }
1630     if (force_dma32 || (!ok && ha->status == (ushort)S_NOFUNC))
1631         ok = gdth_internal_cmd(ha, CACHESERVICE, GDT_INIT, LINUX_OS, 0, 0);
1632     if (!ok) {
1633         printk("GDT-HA %d: Initialization error cache service (code %d)\n",
1634                ha->hanum, ha->status);
1635         return 0;
1636     }
1637     TRACE2(("gdth_search_drives(): CACHESERVICE initialized\n"));
1638     cdev_cnt = (ushort)ha->info;
1639     ha->fw_vers = ha->service;
1640
1641 #ifdef INT_COAL
1642     if (ha->type == GDT_PCIMPR) {
1643         /* set perf. modes */
1644         pmod = (gdth_perf_modes *)ha->pscratch;
1645         pmod->version          = 1;
1646         pmod->st_mode          = 1;    /* enable one status buffer */
1647         *((ulong64 *)&pmod->st_buff_addr1) = ha->coal_stat_phys;
1648         pmod->st_buff_indx1    = COALINDEX;
1649         pmod->st_buff_addr2    = 0;
1650         pmod->st_buff_u_addr2  = 0;
1651         pmod->st_buff_indx2    = 0;
1652         pmod->st_buff_size     = sizeof(gdth_coal_status) * MAXOFFSETS;
1653         pmod->cmd_mode         = 0;    // disable all cmd buffers
1654         pmod->cmd_buff_addr1   = 0;
1655         pmod->cmd_buff_u_addr1 = 0;
1656         pmod->cmd_buff_indx1   = 0;
1657         pmod->cmd_buff_addr2   = 0;
1658         pmod->cmd_buff_u_addr2 = 0;
1659         pmod->cmd_buff_indx2   = 0;
1660         pmod->cmd_buff_size    = 0;
1661         pmod->reserved1        = 0;
1662         pmod->reserved2        = 0;
1663         if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, SET_PERF_MODES,
1664                               INVALID_CHANNEL,sizeof(gdth_perf_modes))) {
1665             printk("GDT-HA %d: Interrupt coalescing activated\n", ha->hanum);
1666         }
1667     }
1668 #endif
1669
1670     /* detect number of buses - try new IOCTL */
1671     iocr = (gdth_raw_iochan_str *)ha->pscratch;
1672     iocr->hdr.version        = 0xffffffff;
1673     iocr->hdr.list_entries   = MAXBUS;
1674     iocr->hdr.first_chan     = 0;
1675     iocr->hdr.last_chan      = MAXBUS-1;
1676     iocr->hdr.list_offset    = GDTOFFSOF(gdth_raw_iochan_str, list[0]);
1677     if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, IOCHAN_RAW_DESC,
1678                           INVALID_CHANNEL,sizeof(gdth_raw_iochan_str))) {
1679         TRACE2(("IOCHAN_RAW_DESC supported!\n"));
1680         ha->bus_cnt = iocr->hdr.chan_count;
1681         for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) {
1682             if (iocr->list[bus_no].proc_id < MAXID)
1683                 ha->bus_id[bus_no] = iocr->list[bus_no].proc_id;
1684             else
1685                 ha->bus_id[bus_no] = 0xff;
1686         }
1687     } else {
1688         /* old method */
1689         chn = (gdth_getch_str *)ha->pscratch;
1690         for (bus_no = 0; bus_no < MAXBUS; ++bus_no) {
1691             chn->channel_no = bus_no;
1692             if (!gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL,
1693                                    SCSI_CHAN_CNT | L_CTRL_PATTERN,
1694                                    IO_CHANNEL | INVALID_CHANNEL,
1695                                    sizeof(gdth_getch_str))) {
1696                 if (bus_no == 0) {
1697                     printk("GDT-HA %d: Error detecting channel count (0x%x)\n",
1698                            ha->hanum, ha->status);
1699                     return 0;
1700                 }
1701                 break;
1702             }
1703             if (chn->siop_id < MAXID)
1704                 ha->bus_id[bus_no] = chn->siop_id;
1705             else
1706                 ha->bus_id[bus_no] = 0xff;
1707         }
1708         ha->bus_cnt = (unchar)bus_no;
1709     }
1710     TRACE2(("gdth_search_drives() %d channels\n",ha->bus_cnt));
1711
1712     /* read cache configuration */
1713     if (!gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, CACHE_INFO,
1714                            INVALID_CHANNEL,sizeof(gdth_cinfo_str))) {
1715         printk("GDT-HA %d: Initialization error cache service (code %d)\n",
1716                ha->hanum, ha->status);
1717         return 0;
1718     }
1719     ha->cpar = ((gdth_cinfo_str *)ha->pscratch)->cpar;
1720     TRACE2(("gdth_search_drives() cinfo: vs %x sta %d str %d dw %d b %d\n",
1721             ha->cpar.version,ha->cpar.state,ha->cpar.strategy,
1722             ha->cpar.write_back,ha->cpar.block_size));
1723
1724     /* read board info and features */
1725     ha->more_proc = FALSE;
1726     if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, BOARD_INFO,
1727                           INVALID_CHANNEL,sizeof(gdth_binfo_str))) {
1728         memcpy(&ha->binfo, (gdth_binfo_str *)ha->pscratch,
1729                sizeof(gdth_binfo_str));
1730         if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, BOARD_FEATURES,
1731                               INVALID_CHANNEL,sizeof(gdth_bfeat_str))) {
1732             TRACE2(("BOARD_INFO/BOARD_FEATURES supported\n"));
1733             ha->bfeat = *(gdth_bfeat_str *)ha->pscratch;
1734             ha->more_proc = TRUE;
1735         }
1736     } else {
1737         TRACE2(("BOARD_INFO requires firmware >= 1.10/2.08\n"));
1738         strcpy(ha->binfo.type_string, gdth_ctr_name(ha));
1739     }
1740     TRACE2(("Controller name: %s\n",ha->binfo.type_string));
1741
1742     /* read more informations */
1743     if (ha->more_proc) {
1744         /* physical drives, channel addresses */
1745         ioc = (gdth_iochan_str *)ha->pscratch;
1746         ioc->hdr.version        = 0xffffffff;
1747         ioc->hdr.list_entries   = MAXBUS;
1748         ioc->hdr.first_chan     = 0;
1749         ioc->hdr.last_chan      = MAXBUS-1;
1750         ioc->hdr.list_offset    = GDTOFFSOF(gdth_iochan_str, list[0]);
1751         if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, IOCHAN_DESC,
1752                               INVALID_CHANNEL,sizeof(gdth_iochan_str))) {
1753             for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) {
1754                 ha->raw[bus_no].address = ioc->list[bus_no].address;
1755                 ha->raw[bus_no].local_no = ioc->list[bus_no].local_no;
1756             }
1757         } else {
1758             for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) {
1759                 ha->raw[bus_no].address = IO_CHANNEL;
1760                 ha->raw[bus_no].local_no = bus_no;
1761             }
1762         }
1763         for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) {
1764             chn = (gdth_getch_str *)ha->pscratch;
1765             chn->channel_no = ha->raw[bus_no].local_no;
1766             if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL,
1767                                   SCSI_CHAN_CNT | L_CTRL_PATTERN,
1768                                   ha->raw[bus_no].address | INVALID_CHANNEL,
1769                                   sizeof(gdth_getch_str))) {
1770                 ha->raw[bus_no].pdev_cnt = chn->drive_cnt;
1771                 TRACE2(("Channel %d: %d phys. drives\n",
1772                         bus_no,chn->drive_cnt));
1773             }
1774             if (ha->raw[bus_no].pdev_cnt > 0) {
1775                 drl = (gdth_drlist_str *)ha->pscratch;
1776                 drl->sc_no = ha->raw[bus_no].local_no;
1777                 drl->sc_cnt = ha->raw[bus_no].pdev_cnt;
1778                 if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL,
1779                                       SCSI_DR_LIST | L_CTRL_PATTERN,
1780                                       ha->raw[bus_no].address | INVALID_CHANNEL,
1781                                       sizeof(gdth_drlist_str))) {
1782                     for (j = 0; j < ha->raw[bus_no].pdev_cnt; ++j)
1783                         ha->raw[bus_no].id_list[j] = drl->sc_list[j];
1784                 } else {
1785                     ha->raw[bus_no].pdev_cnt = 0;
1786                 }
1787             }
1788         }
1789
1790         /* logical drives */
1791         if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, CACHE_DRV_CNT,
1792                               INVALID_CHANNEL,sizeof(ulong32))) {
1793             drv_cnt = *(ulong32 *)ha->pscratch;
1794             if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, CACHE_DRV_LIST,
1795                                   INVALID_CHANNEL,drv_cnt * sizeof(ulong32))) {
1796                 for (j = 0; j < drv_cnt; ++j) {
1797                     drv_no = ((ulong32 *)ha->pscratch)[j];
1798                     if (drv_no < MAX_LDRIVES) {
1799                         ha->hdr[drv_no].is_logdrv = TRUE;
1800                         TRACE2(("Drive %d is log. drive\n",drv_no));
1801                     }
1802                 }
1803             }
1804             alst = (gdth_arcdl_str *)ha->pscratch;
1805             alst->entries_avail = MAX_LDRIVES;
1806             alst->first_entry = 0;
1807             alst->list_offset = GDTOFFSOF(gdth_arcdl_str, list[0]);
1808             if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL,
1809                                   ARRAY_DRV_LIST2 | LA_CTRL_PATTERN,
1810                                   INVALID_CHANNEL, sizeof(gdth_arcdl_str) +
1811                                   (alst->entries_avail-1) * sizeof(gdth_alist_str))) {
1812                 for (j = 0; j < alst->entries_init; ++j) {
1813                     ha->hdr[j].is_arraydrv = alst->list[j].is_arrayd;
1814                     ha->hdr[j].is_master = alst->list[j].is_master;
1815                     ha->hdr[j].is_parity = alst->list[j].is_parity;
1816                     ha->hdr[j].is_hotfix = alst->list[j].is_hotfix;
1817                     ha->hdr[j].master_no = alst->list[j].cd_handle;
1818                 }
1819             } else if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL,
1820                                          ARRAY_DRV_LIST | LA_CTRL_PATTERN,
1821                                          0, 35 * sizeof(gdth_alist_str))) {
1822                 for (j = 0; j < 35; ++j) {
1823                     alst2 = &((gdth_alist_str *)ha->pscratch)[j];
1824                     ha->hdr[j].is_arraydrv = alst2->is_arrayd;
1825                     ha->hdr[j].is_master = alst2->is_master;
1826                     ha->hdr[j].is_parity = alst2->is_parity;
1827                     ha->hdr[j].is_hotfix = alst2->is_hotfix;
1828                     ha->hdr[j].master_no = alst2->cd_handle;
1829                 }
1830             }
1831         }
1832     }
1833
1834     /* initialize raw service */
1835     ha->raw_feat = 0;
1836     if (!force_dma32) {
1837         ok = gdth_internal_cmd(ha, SCSIRAWSERVICE, GDT_X_INIT_RAW, 0, 0, 0);
1838         if (ok)
1839             ha->raw_feat = GDT_64BIT;
1840     }
1841     if (force_dma32 || (!ok && ha->status == (ushort)S_NOFUNC))
1842         ok = gdth_internal_cmd(ha, SCSIRAWSERVICE, GDT_INIT, 0, 0, 0);
1843     if (!ok) {
1844         printk("GDT-HA %d: Initialization error raw service (code %d)\n",
1845                ha->hanum, ha->status);
1846         return 0;
1847     }
1848     TRACE2(("gdth_search_drives(): RAWSERVICE initialized\n"));
1849
1850     /* set/get features raw service (scatter/gather) */
1851     if (gdth_internal_cmd(ha, SCSIRAWSERVICE, GDT_SET_FEAT, SCATTER_GATHER,
1852                           0, 0)) {
1853         TRACE2(("gdth_search_drives(): set features RAWSERVICE OK\n"));
1854         if (gdth_internal_cmd(ha, SCSIRAWSERVICE, GDT_GET_FEAT, 0, 0, 0)) {
1855             TRACE2(("gdth_search_dr(): get feat RAWSERVICE %d\n",
1856                     ha->info));
1857             ha->raw_feat |= (ushort)ha->info;
1858         }
1859     }
1860
1861     /* set/get features cache service (equal to raw service) */
1862     if (gdth_internal_cmd(ha, CACHESERVICE, GDT_SET_FEAT, 0,
1863                           SCATTER_GATHER,0)) {
1864         TRACE2(("gdth_search_drives(): set features CACHESERVICE OK\n"));
1865         if (gdth_internal_cmd(ha, CACHESERVICE, GDT_GET_FEAT, 0, 0, 0)) {
1866             TRACE2(("gdth_search_dr(): get feat CACHESERV. %d\n",
1867                     ha->info));
1868             ha->cache_feat |= (ushort)ha->info;
1869         }
1870     }
1871
1872     /* reserve drives for raw service */
1873     if (reserve_mode != 0) {
1874         gdth_internal_cmd(ha, SCSIRAWSERVICE, GDT_RESERVE_ALL,
1875                           reserve_mode == 1 ? 1 : 3, 0, 0);
1876         TRACE2(("gdth_search_drives(): RESERVE_ALL code %d\n",
1877                 ha->status));
1878     }
1879     for (i = 0; i < MAX_RES_ARGS; i += 4) {
1880         if (reserve_list[i] == ha->hanum && reserve_list[i+1] < ha->bus_cnt &&
1881             reserve_list[i+2] < ha->tid_cnt && reserve_list[i+3] < MAXLUN) {
1882             TRACE2(("gdth_search_drives(): reserve ha %d bus %d id %d lun %d\n",
1883                     reserve_list[i], reserve_list[i+1],
1884                     reserve_list[i+2], reserve_list[i+3]));
1885             if (!gdth_internal_cmd(ha, SCSIRAWSERVICE, GDT_RESERVE, 0,
1886                                    reserve_list[i+1], reserve_list[i+2] |
1887                                    (reserve_list[i+3] << 8))) {
1888                 printk("GDT-HA %d: Error raw service (RESERVE, code %d)\n",
1889                        ha->hanum, ha->status);
1890              }
1891         }
1892     }
1893
1894     /* Determine OEM string using IOCTL */
1895     oemstr = (gdth_oem_str_ioctl *)ha->pscratch;
1896     oemstr->params.ctl_version = 0x01;
1897     oemstr->params.buffer_size = sizeof(oemstr->text);
1898     if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL,
1899                           CACHE_READ_OEM_STRING_RECORD,INVALID_CHANNEL,
1900                           sizeof(gdth_oem_str_ioctl))) {
1901         TRACE2(("gdth_search_drives(): CACHE_READ_OEM_STRING_RECORD OK\n"));
1902         printk("GDT-HA %d: Vendor: %s Name: %s\n",
1903                ha->hanum, oemstr->text.oem_company_name, ha->binfo.type_string);
1904         /* Save the Host Drive inquiry data */
1905         strlcpy(ha->oem_name,oemstr->text.scsi_host_drive_inquiry_vendor_id,
1906                 sizeof(ha->oem_name));
1907     } else {
1908         /* Old method, based on PCI ID */
1909         TRACE2(("gdth_search_drives(): CACHE_READ_OEM_STRING_RECORD failed\n"));
1910         printk("GDT-HA %d: Name: %s\n",
1911                ha->hanum, ha->binfo.type_string);
1912         if (ha->oem_id == OEM_ID_INTEL)
1913             strlcpy(ha->oem_name,"Intel  ", sizeof(ha->oem_name));
1914         else
1915             strlcpy(ha->oem_name,"ICP    ", sizeof(ha->oem_name));
1916     }
1917
1918     /* scanning for host drives */
1919     for (i = 0; i < cdev_cnt; ++i)
1920         gdth_analyse_hdrive(ha, i);
1921
1922     TRACE(("gdth_search_drives() OK\n"));
1923     return 1;
1924 }
1925
1926 static int gdth_analyse_hdrive(gdth_ha_str *ha, ushort hdrive)
1927 {
1928     ulong32 drv_cyls;
1929     int drv_hds, drv_secs;
1930
1931     TRACE(("gdth_analyse_hdrive() hanum %d drive %d\n", ha->hanum, hdrive));
1932     if (hdrive >= MAX_HDRIVES)
1933         return 0;
1934
1935     if (!gdth_internal_cmd(ha, CACHESERVICE, GDT_INFO, hdrive, 0, 0))
1936         return 0;
1937     ha->hdr[hdrive].present = TRUE;
1938     ha->hdr[hdrive].size = ha->info;
1939
1940     /* evaluate mapping (sectors per head, heads per cylinder) */
1941     ha->hdr[hdrive].size &= ~SECS32;
1942     if (ha->info2 == 0) {
1943         gdth_eval_mapping(ha->hdr[hdrive].size,&drv_cyls,&drv_hds,&drv_secs);
1944     } else {
1945         drv_hds = ha->info2 & 0xff;
1946         drv_secs = (ha->info2 >> 8) & 0xff;
1947         drv_cyls = (ulong32)ha->hdr[hdrive].size / drv_hds / drv_secs;
1948     }
1949     ha->hdr[hdrive].heads = (unchar)drv_hds;
1950     ha->hdr[hdrive].secs  = (unchar)drv_secs;
1951     /* round size */
1952     ha->hdr[hdrive].size  = drv_cyls * drv_hds * drv_secs;
1953
1954     if (ha->cache_feat & GDT_64BIT) {
1955         if (gdth_internal_cmd(ha, CACHESERVICE, GDT_X_INFO, hdrive, 0, 0)
1956             && ha->info2 != 0) {
1957             ha->hdr[hdrive].size = ((ulong64)ha->info2 << 32) | ha->info;
1958         }
1959     }
1960     TRACE2(("gdth_search_dr() cdr. %d size %d hds %d scs %d\n",
1961             hdrive,ha->hdr[hdrive].size,drv_hds,drv_secs));
1962
1963     /* get informations about device */
1964     if (gdth_internal_cmd(ha, CACHESERVICE, GDT_DEVTYPE, hdrive, 0, 0)) {
1965         TRACE2(("gdth_search_dr() cache drive %d devtype %d\n",
1966                 hdrive,ha->info));
1967         ha->hdr[hdrive].devtype = (ushort)ha->info;
1968     }
1969
1970     /* cluster info */
1971     if (gdth_internal_cmd(ha, CACHESERVICE, GDT_CLUST_INFO, hdrive, 0, 0)) {
1972         TRACE2(("gdth_search_dr() cache drive %d cluster info %d\n",
1973                 hdrive,ha->info));
1974         if (!shared_access)
1975             ha->hdr[hdrive].cluster_type = (unchar)ha->info;
1976     }
1977
1978     /* R/W attributes */
1979     if (gdth_internal_cmd(ha, CACHESERVICE, GDT_RW_ATTRIBS, hdrive, 0, 0)) {
1980         TRACE2(("gdth_search_dr() cache drive %d r/w attrib. %d\n",
1981                 hdrive,ha->info));
1982         ha->hdr[hdrive].rw_attribs = (unchar)ha->info;
1983     }
1984
1985     return 1;
1986 }
1987
1988
1989 /* command queueing/sending functions */
1990
1991 static void gdth_putq(gdth_ha_str *ha, Scsi_Cmnd *scp, unchar priority)
1992 {
1993     struct gdth_cmndinfo *cmndinfo = gdth_cmnd_priv(scp);
1994     register Scsi_Cmnd *pscp;
1995     register Scsi_Cmnd *nscp;
1996     ulong flags;
1997     unchar b, t;
1998
1999     TRACE(("gdth_putq() priority %d\n",priority));
2000     spin_lock_irqsave(&ha->smp_lock, flags);
2001
2002     if (!cmndinfo->internal_command) {
2003         cmndinfo->priority = priority;
2004         b = scp->device->channel;
2005         t = scp->device->id;
2006         if (priority >= DEFAULT_PRI) {
2007             if ((b != ha->virt_bus && ha->raw[BUS_L2P(ha,b)].lock) ||
2008                 (b==ha->virt_bus && t<MAX_HDRIVES && ha->hdr[t].lock)) {
2009                 TRACE2(("gdth_putq(): locked IO ->update_timeout()\n"));
2010                 cmndinfo->timeout = gdth_update_timeout(scp, 0);
2011             }
2012         }
2013     }
2014
2015     if (ha->req_first==NULL) {
2016         ha->req_first = scp;                    /* queue was empty */
2017         scp->SCp.ptr = NULL;
2018     } else {                                    /* queue not empty */
2019         pscp = ha->req_first;
2020         nscp = (Scsi_Cmnd *)pscp->SCp.ptr;
2021         /* priority: 0-highest,..,0xff-lowest */
2022         while (nscp && gdth_cmnd_priv(nscp)->priority <= priority) {
2023             pscp = nscp;
2024             nscp = (Scsi_Cmnd *)pscp->SCp.ptr;
2025         }
2026         pscp->SCp.ptr = (char *)scp;
2027         scp->SCp.ptr  = (char *)nscp;
2028     }
2029     spin_unlock_irqrestore(&ha->smp_lock, flags);
2030
2031 #ifdef GDTH_STATISTICS
2032     flags = 0;
2033     for (nscp=ha->req_first; nscp; nscp=(Scsi_Cmnd*)nscp->SCp.ptr)
2034         ++flags;
2035     if (max_rq < flags) {
2036         max_rq = flags;
2037         TRACE3(("GDT: max_rq = %d\n",(ushort)max_rq));
2038     }
2039 #endif
2040 }
2041
2042 static void gdth_next(gdth_ha_str *ha)
2043 {
2044     register Scsi_Cmnd *pscp;
2045     register Scsi_Cmnd *nscp;
2046     unchar b, t, l, firsttime;
2047     unchar this_cmd, next_cmd;
2048     ulong flags = 0;
2049     int cmd_index;
2050
2051     TRACE(("gdth_next() hanum %d\n", ha->hanum));
2052     if (!gdth_polling)
2053         spin_lock_irqsave(&ha->smp_lock, flags);
2054
2055     ha->cmd_cnt = ha->cmd_offs_dpmem = 0;
2056     this_cmd = firsttime = TRUE;
2057     next_cmd = gdth_polling ? FALSE:TRUE;
2058     cmd_index = 0;
2059
2060     for (nscp = pscp = ha->req_first; nscp; nscp = (Scsi_Cmnd *)nscp->SCp.ptr) {
2061         struct gdth_cmndinfo *nscp_cmndinfo = gdth_cmnd_priv(nscp);
2062         if (nscp != pscp && nscp != (Scsi_Cmnd *)pscp->SCp.ptr)
2063             pscp = (Scsi_Cmnd *)pscp->SCp.ptr;
2064         if (!nscp_cmndinfo->internal_command) {
2065             b = nscp->device->channel;
2066             t = nscp->device->id;
2067             l = nscp->device->lun;
2068             if (nscp_cmndinfo->priority >= DEFAULT_PRI) {
2069                 if ((b != ha->virt_bus && ha->raw[BUS_L2P(ha,b)].lock) ||
2070                     (b == ha->virt_bus && t < MAX_HDRIVES && ha->hdr[t].lock))
2071                     continue;
2072             }
2073         } else
2074             b = t = l = 0;
2075
2076         if (firsttime) {
2077             if (gdth_test_busy(ha)) {        /* controller busy ? */
2078                 TRACE(("gdth_next() controller %d busy !\n", ha->hanum));
2079                 if (!gdth_polling) {
2080                     spin_unlock_irqrestore(&ha->smp_lock, flags);
2081                     return;
2082                 }
2083                 while (gdth_test_busy(ha))
2084                     gdth_delay(1);
2085             }
2086             firsttime = FALSE;
2087         }
2088
2089         if (!nscp_cmndinfo->internal_command) {
2090         if (nscp_cmndinfo->phase == -1) {
2091             nscp_cmndinfo->phase = CACHESERVICE;           /* default: cache svc. */
2092             if (nscp->cmnd[0] == TEST_UNIT_READY) {
2093                 TRACE2(("TEST_UNIT_READY Bus %d Id %d LUN %d\n",
2094                         b, t, l));
2095                 /* TEST_UNIT_READY -> set scan mode */
2096                 if ((ha->scan_mode & 0x0f) == 0) {
2097                     if (b == 0 && t == 0 && l == 0) {
2098                         ha->scan_mode |= 1;
2099                         TRACE2(("Scan mode: 0x%x\n", ha->scan_mode));
2100                     }
2101                 } else if ((ha->scan_mode & 0x0f) == 1) {
2102                     if (b == 0 && ((t == 0 && l == 1) ||
2103                          (t == 1 && l == 0))) {
2104                         nscp_cmndinfo->OpCode = GDT_SCAN_START;
2105                         nscp_cmndinfo->phase = ((ha->scan_mode & 0x10 ? 1:0) << 8)
2106                             | SCSIRAWSERVICE;
2107                         ha->scan_mode = 0x12;
2108                         TRACE2(("Scan mode: 0x%x (SCAN_START)\n",
2109                                 ha->scan_mode));
2110                     } else {
2111                         ha->scan_mode &= 0x10;
2112                         TRACE2(("Scan mode: 0x%x\n", ha->scan_mode));
2113                     }
2114                 } else if (ha->scan_mode == 0x12) {
2115                     if (b == ha->bus_cnt && t == ha->tid_cnt-1) {
2116                         nscp_cmndinfo->phase = SCSIRAWSERVICE;
2117                         nscp_cmndinfo->OpCode = GDT_SCAN_END;
2118                         ha->scan_mode &= 0x10;
2119                         TRACE2(("Scan mode: 0x%x (SCAN_END)\n",
2120                                 ha->scan_mode));
2121                     }
2122                 }
2123             }
2124             if (b == ha->virt_bus && nscp->cmnd[0] != INQUIRY &&
2125                 nscp->cmnd[0] != READ_CAPACITY && nscp->cmnd[0] != MODE_SENSE &&
2126                 (ha->hdr[t].cluster_type & CLUSTER_DRIVE)) {
2127                 /* always GDT_CLUST_INFO! */
2128                 nscp_cmndinfo->OpCode = GDT_CLUST_INFO;
2129             }
2130         }
2131         }
2132
2133         if (nscp_cmndinfo->OpCode != -1) {
2134             if ((nscp_cmndinfo->phase & 0xff) == CACHESERVICE) {
2135                 if (!(cmd_index=gdth_fill_cache_cmd(ha, nscp, t)))
2136                     this_cmd = FALSE;
2137                 next_cmd = FALSE;
2138             } else if ((nscp_cmndinfo->phase & 0xff) == SCSIRAWSERVICE) {
2139                 if (!(cmd_index=gdth_fill_raw_cmd(ha, nscp, BUS_L2P(ha, b))))
2140                     this_cmd = FALSE;
2141                 next_cmd = FALSE;
2142             } else {
2143                 memset((char*)nscp->sense_buffer,0,16);
2144                 nscp->sense_buffer[0] = 0x70;
2145                 nscp->sense_buffer[2] = NOT_READY;
2146                 nscp->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
2147                 if (!nscp_cmndinfo->wait_for_completion)
2148                     nscp_cmndinfo->wait_for_completion++;
2149                 else
2150                     gdth_scsi_done(nscp);
2151             }
2152         } else if (gdth_cmnd_priv(nscp)->internal_command) {
2153             if (!(cmd_index=gdth_special_cmd(ha, nscp)))
2154                 this_cmd = FALSE;
2155             next_cmd = FALSE;
2156         } else if (b != ha->virt_bus) {
2157             if (ha->raw[BUS_L2P(ha,b)].io_cnt[t] >= GDTH_MAX_RAW ||
2158                 !(cmd_index=gdth_fill_raw_cmd(ha, nscp, BUS_L2P(ha, b))))
2159                 this_cmd = FALSE;
2160             else
2161                 ha->raw[BUS_L2P(ha,b)].io_cnt[t]++;
2162         } else if (t >= MAX_HDRIVES || !ha->hdr[t].present || l != 0) {
2163             TRACE2(("Command 0x%x to bus %d id %d lun %d -> IGNORE\n",
2164                     nscp->cmnd[0], b, t, l));
2165             nscp->result = DID_BAD_TARGET << 16;
2166             if (!nscp_cmndinfo->wait_for_completion)
2167                 nscp_cmndinfo->wait_for_completion++;
2168             else
2169                 gdth_scsi_done(nscp);
2170         } else {
2171             switch (nscp->cmnd[0]) {
2172               case TEST_UNIT_READY:
2173               case INQUIRY:
2174               case REQUEST_SENSE:
2175               case READ_CAPACITY:
2176               case VERIFY:
2177               case START_STOP:
2178               case MODE_SENSE:
2179               case SERVICE_ACTION_IN:
2180                 TRACE(("cache cmd %x/%x/%x/%x/%x/%x\n",nscp->cmnd[0],
2181                        nscp->cmnd[1],nscp->cmnd[2],nscp->cmnd[3],
2182                        nscp->cmnd[4],nscp->cmnd[5]));
2183                 if (ha->hdr[t].media_changed && nscp->cmnd[0] != INQUIRY) {
2184                     /* return UNIT_ATTENTION */
2185                     TRACE2(("cmd 0x%x target %d: UNIT_ATTENTION\n",
2186                              nscp->cmnd[0], t));
2187                     ha->hdr[t].media_changed = FALSE;
2188                     memset((char*)nscp->sense_buffer,0,16);
2189                     nscp->sense_buffer[0] = 0x70;
2190                     nscp->sense_buffer[2] = UNIT_ATTENTION;
2191                     nscp->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
2192                     if (!nscp_cmndinfo->wait_for_completion)
2193                         nscp_cmndinfo->wait_for_completion++;
2194                     else
2195                         gdth_scsi_done(nscp);
2196                 } else if (gdth_internal_cache_cmd(ha, nscp))
2197                     gdth_scsi_done(nscp);
2198                 break;
2199
2200               case ALLOW_MEDIUM_REMOVAL:
2201                 TRACE(("cache cmd %x/%x/%x/%x/%x/%x\n",nscp->cmnd[0],
2202                        nscp->cmnd[1],nscp->cmnd[2],nscp->cmnd[3],
2203                        nscp->cmnd[4],nscp->cmnd[5]));
2204                 if ( (nscp->cmnd[4]&1) && !(ha->hdr[t].devtype&1) ) {
2205                     TRACE(("Prevent r. nonremov. drive->do nothing\n"));
2206                     nscp->result = DID_OK << 16;
2207                     nscp->sense_buffer[0] = 0;
2208                     if (!nscp_cmndinfo->wait_for_completion)
2209                         nscp_cmndinfo->wait_for_completion++;
2210                     else
2211                         gdth_scsi_done(nscp);
2212                 } else {
2213                     nscp->cmnd[3] = (ha->hdr[t].devtype&1) ? 1:0;
2214                     TRACE(("Prevent/allow r. %d rem. drive %d\n",
2215                            nscp->cmnd[4],nscp->cmnd[3]));
2216                     if (!(cmd_index=gdth_fill_cache_cmd(ha, nscp, t)))
2217                         this_cmd = FALSE;
2218                 }
2219                 break;
2220
2221               case RESERVE:
2222               case RELEASE:
2223                 TRACE2(("cache cmd %s\n",nscp->cmnd[0] == RESERVE ?
2224                         "RESERVE" : "RELEASE"));
2225                 if (!(cmd_index=gdth_fill_cache_cmd(ha, nscp, t)))
2226                     this_cmd = FALSE;
2227                 break;
2228
2229               case READ_6:
2230               case WRITE_6:
2231               case READ_10:
2232               case WRITE_10:
2233               case READ_16:
2234               case WRITE_16:
2235                 if (ha->hdr[t].media_changed) {
2236                     /* return UNIT_ATTENTION */
2237                     TRACE2(("cmd 0x%x target %d: UNIT_ATTENTION\n",
2238                              nscp->cmnd[0], t));
2239                     ha->hdr[t].media_changed = FALSE;
2240                     memset((char*)nscp->sense_buffer,0,16);
2241                     nscp->sense_buffer[0] = 0x70;
2242                     nscp->sense_buffer[2] = UNIT_ATTENTION;
2243                     nscp->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
2244                     if (!nscp_cmndinfo->wait_for_completion)
2245                         nscp_cmndinfo->wait_for_completion++;
2246                     else
2247                         gdth_scsi_done(nscp);
2248                 } else if (!(cmd_index=gdth_fill_cache_cmd(ha, nscp, t)))
2249                     this_cmd = FALSE;
2250                 break;
2251
2252               default:
2253                 TRACE2(("cache cmd %x/%x/%x/%x/%x/%x unknown\n",nscp->cmnd[0],
2254                         nscp->cmnd[1],nscp->cmnd[2],nscp->cmnd[3],
2255                         nscp->cmnd[4],nscp->cmnd[5]));
2256                 printk("GDT-HA %d: Unknown SCSI command 0x%x to cache service !\n",
2257                        ha->hanum, nscp->cmnd[0]);
2258                 nscp->result = DID_ABORT << 16;
2259                 if (!nscp_cmndinfo->wait_for_completion)
2260                     nscp_cmndinfo->wait_for_completion++;
2261                 else
2262                     gdth_scsi_done(nscp);
2263                 break;
2264             }
2265         }
2266
2267         if (!this_cmd)
2268             break;
2269         if (nscp == ha->req_first)
2270             ha->req_first = pscp = (Scsi_Cmnd *)nscp->SCp.ptr;
2271         else
2272             pscp->SCp.ptr = nscp->SCp.ptr;
2273         if (!next_cmd)
2274             break;
2275     }
2276
2277     if (ha->cmd_cnt > 0) {
2278         gdth_release_event(ha);
2279     }
2280
2281     if (!gdth_polling)
2282         spin_unlock_irqrestore(&ha->smp_lock, flags);
2283
2284     if (gdth_polling && ha->cmd_cnt > 0) {
2285         if (!gdth_wait(ha, cmd_index, POLL_TIMEOUT))
2286             printk("GDT-HA %d: Command %d timed out !\n",
2287                    ha->hanum, cmd_index);
2288     }
2289 }
2290
2291 /*
2292  * gdth_copy_internal_data() - copy to/from a buffer onto a scsi_cmnd's
2293  * buffers, kmap_atomic() as needed.
2294  */
2295 static void gdth_copy_internal_data(gdth_ha_str *ha, Scsi_Cmnd *scp,
2296                                     char *buffer, ushort count)
2297 {
2298     ushort cpcount,i, max_sg = scsi_sg_count(scp);
2299     ushort cpsum,cpnow;
2300     struct scatterlist *sl;
2301     char *address;
2302
2303     cpcount = min_t(ushort, count, scsi_bufflen(scp));
2304
2305     if (cpcount) {
2306         cpsum=0;
2307         scsi_for_each_sg(scp, sl, max_sg, i) {
2308             unsigned long flags;
2309             cpnow = (ushort)sl->length;
2310             TRACE(("copy_internal() now %d sum %d count %d %d\n",
2311                           cpnow, cpsum, cpcount, scsi_bufflen(scp)));
2312             if (cpsum+cpnow > cpcount)
2313                 cpnow = cpcount - cpsum;
2314             cpsum += cpnow;
2315             if (!sg_page(sl)) {
2316                 printk("GDT-HA %d: invalid sc/gt element in gdth_copy_internal_data()\n",
2317                        ha->hanum);
2318                 return;
2319             }
2320             local_irq_save(flags);
2321             address = kmap_atomic(sg_page(sl), KM_BIO_SRC_IRQ) + sl->offset;
2322             memcpy(address, buffer, cpnow);
2323             flush_dcache_page(sg_page(sl));
2324             kunmap_atomic(address, KM_BIO_SRC_IRQ);
2325             local_irq_restore(flags);
2326             if (cpsum == cpcount)
2327                 break;
2328             buffer += cpnow;
2329         }
2330     } else if (count) {
2331         printk("GDT-HA %d: SCSI command with no buffers but data transfer expected!\n",
2332                ha->hanum);
2333         WARN_ON(1);
2334     }
2335 }
2336
2337 static int gdth_internal_cache_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp)
2338 {
2339     unchar t;
2340     gdth_inq_data inq;
2341     gdth_rdcap_data rdc;
2342     gdth_sense_data sd;
2343     gdth_modep_data mpd;
2344     struct gdth_cmndinfo *cmndinfo = gdth_cmnd_priv(scp);
2345
2346     t  = scp->device->id;
2347     TRACE(("gdth_internal_cache_cmd() cmd 0x%x hdrive %d\n",
2348            scp->cmnd[0],t));
2349
2350     scp->result = DID_OK << 16;
2351     scp->sense_buffer[0] = 0;
2352
2353     switch (scp->cmnd[0]) {
2354       case TEST_UNIT_READY:
2355       case VERIFY:
2356       case START_STOP:
2357         TRACE2(("Test/Verify/Start hdrive %d\n",t));
2358         break;
2359
2360       case INQUIRY:
2361         TRACE2(("Inquiry hdrive %d devtype %d\n",
2362                 t,ha->hdr[t].devtype));
2363         inq.type_qual = (ha->hdr[t].devtype&4) ? TYPE_ROM:TYPE_DISK;
2364         /* you can here set all disks to removable, if you want to do
2365            a flush using the ALLOW_MEDIUM_REMOVAL command */
2366         inq.modif_rmb = 0x00;
2367         if ((ha->hdr[t].devtype & 1) ||
2368             (ha->hdr[t].cluster_type & CLUSTER_DRIVE))
2369             inq.modif_rmb = 0x80;
2370         inq.version   = 2;
2371         inq.resp_aenc = 2;
2372         inq.add_length= 32;
2373         strcpy(inq.vendor,ha->oem_name);
2374         sprintf(inq.product,"Host Drive  #%02d",t);
2375         strcpy(inq.revision,"   ");
2376         gdth_copy_internal_data(ha, scp, (char*)&inq, sizeof(gdth_inq_data));
2377         break;
2378
2379       case REQUEST_SENSE:
2380         TRACE2(("Request sense hdrive %d\n",t));
2381         sd.errorcode = 0x70;
2382         sd.segno     = 0x00;
2383         sd.key       = NO_SENSE;
2384         sd.info      = 0;
2385         sd.add_length= 0;
2386         gdth_copy_internal_data(ha, scp, (char*)&sd, sizeof(gdth_sense_data));
2387         break;
2388
2389       case MODE_SENSE:
2390         TRACE2(("Mode sense hdrive %d\n",t));
2391         memset((char*)&mpd,0,sizeof(gdth_modep_data));
2392         mpd.hd.data_length = sizeof(gdth_modep_data);
2393         mpd.hd.dev_par     = (ha->hdr[t].devtype&2) ? 0x80:0;
2394         mpd.hd.bd_length   = sizeof(mpd.bd);
2395         mpd.bd.block_length[0] = (SECTOR_SIZE & 0x00ff0000) >> 16;
2396         mpd.bd.block_length[1] = (SECTOR_SIZE & 0x0000ff00) >> 8;
2397         mpd.bd.block_length[2] = (SECTOR_SIZE & 0x000000ff);
2398         gdth_copy_internal_data(ha, scp, (char*)&mpd, sizeof(gdth_modep_data));
2399         break;
2400
2401       case READ_CAPACITY:
2402         TRACE2(("Read capacity hdrive %d\n",t));
2403         if (ha->hdr[t].size > (ulong64)0xffffffff)
2404             rdc.last_block_no = 0xffffffff;
2405         else
2406             rdc.last_block_no = cpu_to_be32(ha->hdr[t].size-1);
2407         rdc.block_length  = cpu_to_be32(SECTOR_SIZE);
2408         gdth_copy_internal_data(ha, scp, (char*)&rdc, sizeof(gdth_rdcap_data));
2409         break;
2410
2411       case SERVICE_ACTION_IN:
2412         if ((scp->cmnd[1] & 0x1f) == SAI_READ_CAPACITY_16 &&
2413             (ha->cache_feat & GDT_64BIT)) {
2414             gdth_rdcap16_data rdc16;
2415
2416             TRACE2(("Read capacity (16) hdrive %d\n",t));
2417             rdc16.last_block_no = cpu_to_be64(ha->hdr[t].size-1);
2418             rdc16.block_length  = cpu_to_be32(SECTOR_SIZE);
2419             gdth_copy_internal_data(ha, scp, (char*)&rdc16,
2420                                                  sizeof(gdth_rdcap16_data));
2421         } else {
2422             scp->result = DID_ABORT << 16;
2423         }
2424         break;
2425
2426       default:
2427         TRACE2(("Internal cache cmd 0x%x unknown\n",scp->cmnd[0]));
2428         break;
2429     }
2430
2431     if (!cmndinfo->wait_for_completion)
2432         cmndinfo->wait_for_completion++;
2433     else
2434         return 1;
2435
2436     return 0;
2437 }
2438
2439 static int gdth_fill_cache_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp, ushort hdrive)
2440 {
2441     register gdth_cmd_str *cmdp;
2442     struct gdth_cmndinfo *cmndinfo = gdth_cmnd_priv(scp);
2443     ulong32 cnt, blockcnt;
2444     ulong64 no, blockno;
2445     int i, cmd_index, read_write, sgcnt, mode64;
2446
2447     cmdp = ha->pccb;
2448     TRACE(("gdth_fill_cache_cmd() cmd 0x%x cmdsize %d hdrive %d\n",
2449                  scp->cmnd[0],scp->cmd_len,hdrive));
2450
2451     if (ha->type==GDT_EISA && ha->cmd_cnt>0)
2452         return 0;
2453
2454     mode64 = (ha->cache_feat & GDT_64BIT) ? TRUE : FALSE;
2455     /* test for READ_16, WRITE_16 if !mode64 ? ---
2456        not required, should not occur due to error return on
2457        READ_CAPACITY_16 */
2458
2459     cmdp->Service = CACHESERVICE;
2460     cmdp->RequestBuffer = scp;
2461     /* search free command index */
2462     if (!(cmd_index=gdth_get_cmd_index(ha))) {
2463         TRACE(("GDT: No free command index found\n"));
2464         return 0;
2465     }
2466     /* if it's the first command, set command semaphore */
2467     if (ha->cmd_cnt == 0)
2468         gdth_set_sema0(ha);
2469
2470     /* fill command */
2471     read_write = 0;
2472     if (cmndinfo->OpCode != -1)
2473         cmdp->OpCode = cmndinfo->OpCode;   /* special cache cmd. */
2474     else if (scp->cmnd[0] == RESERVE)
2475         cmdp->OpCode = GDT_RESERVE_DRV;
2476     else if (scp->cmnd[0] == RELEASE)
2477         cmdp->OpCode = GDT_RELEASE_DRV;
2478     else if (scp->cmnd[0] == ALLOW_MEDIUM_REMOVAL) {
2479         if (scp->cmnd[4] & 1)                   /* prevent ? */
2480             cmdp->OpCode = GDT_MOUNT;
2481         else if (scp->cmnd[3] & 1)              /* removable drive ? */
2482             cmdp->OpCode = GDT_UNMOUNT;
2483         else
2484             cmdp->OpCode = GDT_FLUSH;
2485     } else if (scp->cmnd[0] == WRITE_6 || scp->cmnd[0] == WRITE_10 ||
2486                scp->cmnd[0] == WRITE_12 || scp->cmnd[0] == WRITE_16
2487     ) {
2488         read_write = 1;
2489         if (gdth_write_through || ((ha->hdr[hdrive].rw_attribs & 1) &&
2490                                    (ha->cache_feat & GDT_WR_THROUGH)))
2491             cmdp->OpCode = GDT_WRITE_THR;
2492         else
2493             cmdp->OpCode = GDT_WRITE;
2494     } else {
2495         read_write = 2;
2496         cmdp->OpCode = GDT_READ;
2497     }
2498
2499     cmdp->BoardNode = LOCALBOARD;
2500     if (mode64) {
2501         cmdp->u.cache64.DeviceNo = hdrive;
2502         cmdp->u.cache64.BlockNo  = 1;
2503         cmdp->u.cache64.sg_canz  = 0;
2504     } else {
2505         cmdp->u.cache.DeviceNo = hdrive;
2506         cmdp->u.cache.BlockNo  = 1;
2507         cmdp->u.cache.sg_canz  = 0;
2508     }
2509
2510     if (read_write) {
2511         if (scp->cmd_len == 16) {
2512             memcpy(&no, &scp->cmnd[2], sizeof(ulong64));
2513             blockno = be64_to_cpu(no);
2514             memcpy(&cnt, &scp->cmnd[10], sizeof(ulong32));
2515             blockcnt = be32_to_cpu(cnt);
2516         } else if (scp->cmd_len == 10) {
2517             memcpy(&no, &scp->cmnd[2], sizeof(ulong32));
2518             blockno = be32_to_cpu(no);
2519             memcpy(&cnt, &scp->cmnd[7], sizeof(ushort));
2520             blockcnt = be16_to_cpu(cnt);
2521         } else {
2522             memcpy(&no, &scp->cmnd[0], sizeof(ulong32));
2523             blockno = be32_to_cpu(no) & 0x001fffffUL;
2524             blockcnt= scp->cmnd[4]==0 ? 0x100 : scp->cmnd[4];
2525         }
2526         if (mode64) {
2527             cmdp->u.cache64.BlockNo = blockno;
2528             cmdp->u.cache64.BlockCnt = blockcnt;
2529         } else {
2530             cmdp->u.cache.BlockNo = (ulong32)blockno;
2531             cmdp->u.cache.BlockCnt = blockcnt;
2532         }
2533
2534         if (scsi_bufflen(scp)) {
2535             cmndinfo->dma_dir = (read_write == 1 ?
2536                 PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
2537             sgcnt = pci_map_sg(ha->pdev, scsi_sglist(scp), scsi_sg_count(scp),
2538                                cmndinfo->dma_dir);
2539             if (mode64) {
2540                 struct scatterlist *sl;
2541
2542                 cmdp->u.cache64.DestAddr= (ulong64)-1;
2543                 cmdp->u.cache64.sg_canz = sgcnt;
2544                 scsi_for_each_sg(scp, sl, sgcnt, i) {
2545                     cmdp->u.cache64.sg_lst[i].sg_ptr = sg_dma_address(sl);
2546 #ifdef GDTH_DMA_STATISTICS
2547                     if (cmdp->u.cache64.sg_lst[i].sg_ptr > (ulong64)0xffffffff)
2548                         ha->dma64_cnt++;
2549                     else
2550                         ha->dma32_cnt++;
2551 #endif
2552                     cmdp->u.cache64.sg_lst[i].sg_len = sg_dma_len(sl);
2553                 }
2554             } else {
2555                 struct scatterlist *sl;
2556
2557                 cmdp->u.cache.DestAddr= 0xffffffff;
2558                 cmdp->u.cache.sg_canz = sgcnt;
2559                 scsi_for_each_sg(scp, sl, sgcnt, i) {
2560                     cmdp->u.cache.sg_lst[i].sg_ptr = sg_dma_address(sl);
2561 #ifdef GDTH_DMA_STATISTICS
2562                     ha->dma32_cnt++;
2563 #endif
2564                     cmdp->u.cache.sg_lst[i].sg_len = sg_dma_len(sl);
2565                 }
2566             }
2567
2568 #ifdef GDTH_STATISTICS
2569             if (max_sg < (ulong32)sgcnt) {
2570                 max_sg = (ulong32)sgcnt;
2571                 TRACE3(("GDT: max_sg = %d\n",max_sg));
2572             }
2573 #endif
2574
2575         }
2576     }
2577     /* evaluate command size, check space */
2578     if (mode64) {
2579         TRACE(("cache cmd: addr. %x sganz %x sgptr0 %x sglen0 %x\n",
2580                cmdp->u.cache64.DestAddr,cmdp->u.cache64.sg_canz,
2581                cmdp->u.cache64.sg_lst[0].sg_ptr,
2582                cmdp->u.cache64.sg_lst[0].sg_len));
2583         TRACE(("cache cmd: cmd %d blockno. %d, blockcnt %d\n",
2584                cmdp->OpCode,cmdp->u.cache64.BlockNo,cmdp->u.cache64.BlockCnt));
2585         ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.cache64.sg_lst) +
2586             (ushort)cmdp->u.cache64.sg_canz * sizeof(gdth_sg64_str);
2587     } else {
2588         TRACE(("cache cmd: addr. %x sganz %x sgptr0 %x sglen0 %x\n",
2589                cmdp->u.cache.DestAddr,cmdp->u.cache.sg_canz,
2590                cmdp->u.cache.sg_lst[0].sg_ptr,
2591                cmdp->u.cache.sg_lst[0].sg_len));
2592         TRACE(("cache cmd: cmd %d blockno. %d, blockcnt %d\n",
2593                cmdp->OpCode,cmdp->u.cache.BlockNo,cmdp->u.cache.BlockCnt));
2594         ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.cache.sg_lst) +
2595             (ushort)cmdp->u.cache.sg_canz * sizeof(gdth_sg_str);
2596     }
2597     if (ha->cmd_len & 3)
2598         ha->cmd_len += (4 - (ha->cmd_len & 3));
2599
2600     if (ha->cmd_cnt > 0) {
2601         if ((ha->cmd_offs_dpmem + ha->cmd_len + DPMEM_COMMAND_OFFSET) >
2602             ha->ic_all_size) {
2603             TRACE2(("gdth_fill_cache() DPMEM overflow\n"));
2604             ha->cmd_tab[cmd_index-2].cmnd = UNUSED_CMND;
2605             return 0;
2606         }
2607     }
2608
2609     /* copy command */
2610     gdth_copy_command(ha);
2611     return cmd_index;
2612 }
2613
2614 static int gdth_fill_raw_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp, unchar b)
2615 {
2616     register gdth_cmd_str *cmdp;
2617     ushort i;
2618     dma_addr_t sense_paddr;
2619     int cmd_index, sgcnt, mode64;
2620     unchar t,l;
2621     struct page *page;
2622     ulong offset;
2623     struct gdth_cmndinfo *cmndinfo;
2624
2625     t = scp->device->id;
2626     l = scp->device->lun;
2627     cmdp = ha->pccb;
2628     TRACE(("gdth_fill_raw_cmd() cmd 0x%x bus %d ID %d LUN %d\n",
2629            scp->cmnd[0],b,t,l));
2630
2631     if (ha->type==GDT_EISA && ha->cmd_cnt>0)
2632         return 0;
2633
2634     mode64 = (ha->raw_feat & GDT_64BIT) ? TRUE : FALSE;
2635
2636     cmdp->Service = SCSIRAWSERVICE;
2637     cmdp->RequestBuffer = scp;
2638     /* search free command index */
2639     if (!(cmd_index=gdth_get_cmd_index(ha))) {
2640         TRACE(("GDT: No free command index found\n"));
2641         return 0;
2642     }
2643     /* if it's the first command, set command semaphore */
2644     if (ha->cmd_cnt == 0)
2645         gdth_set_sema0(ha);
2646
2647     cmndinfo = gdth_cmnd_priv(scp);
2648     /* fill command */
2649     if (cmndinfo->OpCode != -1) {
2650         cmdp->OpCode           = cmndinfo->OpCode; /* special raw cmd. */
2651         cmdp->BoardNode        = LOCALBOARD;
2652         if (mode64) {
2653             cmdp->u.raw64.direction = (cmndinfo->phase >> 8);
2654             TRACE2(("special raw cmd 0x%x param 0x%x\n",
2655                     cmdp->OpCode, cmdp->u.raw64.direction));
2656             /* evaluate command size */
2657             ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw64.sg_lst);
2658         } else {
2659             cmdp->u.raw.direction  = (cmndinfo->phase >> 8);
2660             TRACE2(("special raw cmd 0x%x param 0x%x\n",
2661                     cmdp->OpCode, cmdp->u.raw.direction));
2662             /* evaluate command size */
2663             ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw.sg_lst);
2664         }
2665
2666     } else {
2667         page = virt_to_page(scp->sense_buffer);
2668         offset = (ulong)scp->sense_buffer & ~PAGE_MASK;
2669         sense_paddr = pci_map_page(ha->pdev,page,offset,
2670                                    16,PCI_DMA_FROMDEVICE);
2671
2672         cmndinfo->sense_paddr  = sense_paddr;
2673         cmdp->OpCode           = GDT_WRITE;             /* always */
2674         cmdp->BoardNode        = LOCALBOARD;
2675         if (mode64) {
2676             cmdp->u.raw64.reserved   = 0;
2677             cmdp->u.raw64.mdisc_time = 0;
2678             cmdp->u.raw64.mcon_time  = 0;
2679             cmdp->u.raw64.clen       = scp->cmd_len;
2680             cmdp->u.raw64.target     = t;
2681             cmdp->u.raw64.lun        = l;
2682             cmdp->u.raw64.bus        = b;
2683             cmdp->u.raw64.priority   = 0;
2684             cmdp->u.raw64.sdlen      = scsi_bufflen(scp);
2685             cmdp->u.raw64.sense_len  = 16;
2686             cmdp->u.raw64.sense_data = sense_paddr;
2687             cmdp->u.raw64.direction  =
2688                 gdth_direction_tab[scp->cmnd[0]]==DOU ? GDTH_DATA_OUT:GDTH_DATA_IN;
2689             memcpy(cmdp->u.raw64.cmd,scp->cmnd,16);
2690             cmdp->u.raw64.sg_ranz    = 0;
2691         } else {
2692             cmdp->u.raw.reserved   = 0;
2693             cmdp->u.raw.mdisc_time = 0;
2694             cmdp->u.raw.mcon_time  = 0;
2695             cmdp->u.raw.clen       = scp->cmd_len;
2696             cmdp->u.raw.target     = t;
2697             cmdp->u.raw.lun        = l;
2698             cmdp->u.raw.bus        = b;
2699             cmdp->u.raw.priority   = 0;
2700             cmdp->u.raw.link_p     = 0;
2701             cmdp->u.raw.sdlen      = scsi_bufflen(scp);
2702             cmdp->u.raw.sense_len  = 16;
2703             cmdp->u.raw.sense_data = sense_paddr;
2704             cmdp->u.raw.direction  =
2705                 gdth_direction_tab[scp->cmnd[0]]==DOU ? GDTH_DATA_OUT:GDTH_DATA_IN;
2706             memcpy(cmdp->u.raw.cmd,scp->cmnd,12);
2707             cmdp->u.raw.sg_ranz    = 0;
2708         }
2709
2710         if (scsi_bufflen(scp)) {
2711             cmndinfo->dma_dir = PCI_DMA_BIDIRECTIONAL;
2712             sgcnt = pci_map_sg(ha->pdev, scsi_sglist(scp), scsi_sg_count(scp),
2713                                cmndinfo->dma_dir);
2714             if (mode64) {
2715                 struct scatterlist *sl;
2716
2717                 cmdp->u.raw64.sdata = (ulong64)-1;
2718                 cmdp->u.raw64.sg_ranz = sgcnt;
2719                 scsi_for_each_sg(scp, sl, sgcnt, i) {
2720                     cmdp->u.raw64.sg_lst[i].sg_ptr = sg_dma_address(sl);
2721 #ifdef GDTH_DMA_STATISTICS
2722                     if (cmdp->u.raw64.sg_lst[i].sg_ptr > (ulong64)0xffffffff)
2723                         ha->dma64_cnt++;
2724                     else
2725                         ha->dma32_cnt++;
2726 #endif
2727                     cmdp->u.raw64.sg_lst[i].sg_len = sg_dma_len(sl);
2728                 }
2729             } else {
2730                 struct scatterlist *sl;
2731
2732                 cmdp->u.raw.sdata = 0xffffffff;
2733                 cmdp->u.raw.sg_ranz = sgcnt;
2734                 scsi_for_each_sg(scp, sl, sgcnt, i) {
2735                     cmdp->u.raw.sg_lst[i].sg_ptr = sg_dma_address(sl);
2736 #ifdef GDTH_DMA_STATISTICS
2737                     ha->dma32_cnt++;
2738 #endif
2739                     cmdp->u.raw.sg_lst[i].sg_len = sg_dma_len(sl);
2740                 }
2741             }
2742
2743 #ifdef GDTH_STATISTICS
2744             if (max_sg < sgcnt) {
2745                 max_sg = sgcnt;
2746                 TRACE3(("GDT: max_sg = %d\n",sgcnt));
2747             }
2748 #endif
2749
2750         }
2751         if (mode64) {
2752             TRACE(("raw cmd: addr. %x sganz %x sgptr0 %x sglen0 %x\n",
2753                    cmdp->u.raw64.sdata,cmdp->u.raw64.sg_ranz,
2754                    cmdp->u.raw64.sg_lst[0].sg_ptr,
2755                    cmdp->u.raw64.sg_lst[0].sg_len));
2756             /* evaluate command size */
2757             ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw64.sg_lst) +
2758                 (ushort)cmdp->u.raw64.sg_ranz * sizeof(gdth_sg64_str);
2759         } else {
2760             TRACE(("raw cmd: addr. %x sganz %x sgptr0 %x sglen0 %x\n",
2761                    cmdp->u.raw.sdata,cmdp->u.raw.sg_ranz,
2762                    cmdp->u.raw.sg_lst[0].sg_ptr,
2763                    cmdp->u.raw.sg_lst[0].sg_len));
2764             /* evaluate command size */
2765             ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw.sg_lst) +
2766                 (ushort)cmdp->u.raw.sg_ranz * sizeof(gdth_sg_str);
2767         }
2768     }
2769     /* check space */
2770     if (ha->cmd_len & 3)
2771         ha->cmd_len += (4 - (ha->cmd_len & 3));
2772
2773     if (ha->cmd_cnt > 0) {
2774         if ((ha->cmd_offs_dpmem + ha->cmd_len + DPMEM_COMMAND_OFFSET) >
2775             ha->ic_all_size) {
2776             TRACE2(("gdth_fill_raw() DPMEM overflow\n"));
2777             ha->cmd_tab[cmd_index-2].cmnd = UNUSED_CMND;
2778             return 0;
2779         }
2780     }
2781
2782     /* copy command */
2783     gdth_copy_command(ha);
2784     return cmd_index;
2785 }
2786
2787 static int gdth_special_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp)
2788 {
2789     register gdth_cmd_str *cmdp;
2790     struct gdth_cmndinfo *cmndinfo = gdth_cmnd_priv(scp);
2791     int cmd_index;
2792
2793     cmdp= ha->pccb;
2794     TRACE2(("gdth_special_cmd(): "));
2795
2796     if (ha->type==GDT_EISA && ha->cmd_cnt>0)
2797         return 0;
2798
2799     *cmdp = *cmndinfo->internal_cmd_str;
2800     cmdp->RequestBuffer = scp;
2801
2802     /* search free command index */
2803     if (!(cmd_index=gdth_get_cmd_index(ha))) {
2804         TRACE(("GDT: No free command index found\n"));
2805         return 0;
2806     }
2807
2808     /* if it's the first command, set command semaphore */
2809     if (ha->cmd_cnt == 0)
2810        gdth_set_sema0(ha);
2811
2812     /* evaluate command size, check space */
2813     if (cmdp->OpCode == GDT_IOCTL) {
2814         TRACE2(("IOCTL\n"));
2815         ha->cmd_len =
2816             GDTOFFSOF(gdth_cmd_str,u.ioctl.p_param) + sizeof(ulong64);
2817     } else if (cmdp->Service == CACHESERVICE) {
2818         TRACE2(("cache command %d\n",cmdp->OpCode));
2819         if (ha->cache_feat & GDT_64BIT)
2820             ha->cmd_len =
2821                 GDTOFFSOF(gdth_cmd_str,u.cache64.sg_lst) + sizeof(gdth_sg64_str);
2822         else
2823             ha->cmd_len =
2824                 GDTOFFSOF(gdth_cmd_str,u.cache.sg_lst) + sizeof(gdth_sg_str);
2825     } else if (cmdp->Service == SCSIRAWSERVICE) {
2826         TRACE2(("raw command %d\n",cmdp->OpCode));
2827         if (ha->raw_feat & GDT_64BIT)
2828             ha->cmd_len =
2829                 GDTOFFSOF(gdth_cmd_str,u.raw64.sg_lst) + sizeof(gdth_sg64_str);
2830         else
2831             ha->cmd_len =
2832                 GDTOFFSOF(gdth_cmd_str,u.raw.sg_lst) + sizeof(gdth_sg_str);
2833     }
2834
2835     if (ha->cmd_len & 3)
2836         ha->cmd_len += (4 - (ha->cmd_len & 3));
2837
2838     if (ha->cmd_cnt > 0) {
2839         if ((ha->cmd_offs_dpmem + ha->cmd_len + DPMEM_COMMAND_OFFSET) >
2840             ha->ic_all_size) {
2841             TRACE2(("gdth_special_cmd() DPMEM overflow\n"));
2842             ha->cmd_tab[cmd_index-2].cmnd = UNUSED_CMND;
2843             return 0;
2844         }
2845     }
2846
2847     /* copy command */
2848     gdth_copy_command(ha);
2849     return cmd_index;
2850 }
2851
2852
2853 /* Controller event handling functions */
2854 static gdth_evt_str *gdth_store_event(gdth_ha_str *ha, ushort source,
2855                                       ushort idx, gdth_evt_data *evt)
2856 {
2857     gdth_evt_str *e;
2858     struct timeval tv;
2859
2860     /* no GDTH_LOCK_HA() ! */
2861     TRACE2(("gdth_store_event() source %d idx %d\n", source, idx));
2862     if (source == 0)                        /* no source -> no event */
2863         return NULL;
2864
2865     if (ebuffer[elastidx].event_source == source &&
2866         ebuffer[elastidx].event_idx == idx &&
2867         ((evt->size != 0 && ebuffer[elastidx].event_data.size != 0 &&
2868             !memcmp((char *)&ebuffer[elastidx].event_data.eu,
2869             (char *)&evt->eu, evt->size)) ||
2870         (evt->size == 0 && ebuffer[elastidx].event_data.size == 0 &&
2871             !strcmp((char *)&ebuffer[elastidx].event_data.event_string,
2872             (char *)&evt->event_string)))) {
2873         e = &ebuffer[elastidx];
2874         do_gettimeofday(&tv);
2875         e->last_stamp = tv.tv_sec;
2876         ++e->same_count;
2877     } else {
2878         if (ebuffer[elastidx].event_source != 0) {  /* entry not free ? */
2879             ++elastidx;
2880             if (elastidx == MAX_EVENTS)
2881                 elastidx = 0;
2882             if (elastidx == eoldidx) {              /* reached mark ? */
2883                 ++eoldidx;
2884                 if (eoldidx == MAX_EVENTS)
2885                     eoldidx = 0;
2886             }
2887         }
2888         e = &ebuffer[elastidx];
2889         e->event_source = source;
2890         e->event_idx = idx;
2891         do_gettimeofday(&tv);
2892         e->first_stamp = e->last_stamp = tv.tv_sec;
2893         e->same_count = 1;
2894         e->event_data = *evt;
2895         e->application = 0;
2896     }
2897     return e;
2898 }
2899
2900 static int gdth_read_event(gdth_ha_str *ha, int handle, gdth_evt_str *estr)
2901 {
2902     gdth_evt_str *e;
2903     int eindex;
2904     ulong flags;
2905
2906     TRACE2(("gdth_read_event() handle %d\n", handle));
2907     spin_lock_irqsave(&ha->smp_lock, flags);
2908     if (handle == -1)
2909         eindex = eoldidx;
2910     else
2911         eindex = handle;
2912     estr->event_source = 0;
2913
2914     if (eindex >= MAX_EVENTS) {
2915         spin_unlock_irqrestore(&ha->smp_lock, flags);
2916         return eindex;
2917     }
2918     e = &ebuffer[eindex];
2919     if (e->event_source != 0) {
2920         if (eindex != elastidx) {
2921             if (++eindex == MAX_EVENTS)
2922                 eindex = 0;
2923         } else {
2924             eindex = -1;
2925         }
2926         memcpy(estr, e, sizeof(gdth_evt_str));
2927     }
2928     spin_unlock_irqrestore(&ha->smp_lock, flags);
2929     return eindex;
2930 }
2931
2932 static void gdth_readapp_event(gdth_ha_str *ha,
2933                                unchar application, gdth_evt_str *estr)
2934 {
2935     gdth_evt_str *e;
2936     int eindex;
2937     ulong flags;
2938     unchar found = FALSE;
2939
2940     TRACE2(("gdth_readapp_event() app. %d\n", application));
2941     spin_lock_irqsave(&ha->smp_lock, flags);
2942     eindex = eoldidx;
2943     for (;;) {
2944         e = &ebuffer[eindex];
2945         if (e->event_source == 0)
2946             break;
2947         if ((e->application & application) == 0) {
2948             e->application |= application;
2949             found = TRUE;
2950             break;
2951         }
2952         if (eindex == elastidx)
2953             break;
2954         if (++eindex == MAX_EVENTS)
2955             eindex = 0;
2956     }
2957     if (found)
2958         memcpy(estr, e, sizeof(gdth_evt_str));
2959     else
2960         estr->event_source = 0;
2961     spin_unlock_irqrestore(&ha->smp_lock, flags);
2962 }
2963
2964 static void gdth_clear_events(void)
2965 {
2966     TRACE(("gdth_clear_events()"));
2967
2968     eoldidx = elastidx = 0;
2969     ebuffer[0].event_source = 0;
2970 }
2971
2972
2973 /* SCSI interface functions */
2974
2975 static irqreturn_t __gdth_interrupt(gdth_ha_str *ha,
2976                                     int gdth_from_wait, int* pIndex)
2977 {
2978     gdt6m_dpram_str __iomem *dp6m_ptr = NULL;
2979     gdt6_dpram_str __iomem *dp6_ptr;
2980     gdt2_dpram_str __iomem *dp2_ptr;
2981     Scsi_Cmnd *scp;
2982     int rval, i;
2983     unchar IStatus;
2984     ushort Service;
2985     ulong flags = 0;
2986 #ifdef INT_COAL
2987     int coalesced = FALSE;
2988     int next = FALSE;
2989     gdth_coal_status *pcs = NULL;
2990     int act_int_coal = 0;
2991 #endif
2992
2993     TRACE(("gdth_interrupt() IRQ %d\n", ha->irq));
2994
2995     /* if polling and not from gdth_wait() -> return */
2996     if (gdth_polling) {
2997         if (!gdth_from_wait) {
2998             return IRQ_HANDLED;
2999         }
3000     }
3001
3002     if (!gdth_polling)
3003         spin_lock_irqsave(&ha->smp_lock, flags);
3004
3005     /* search controller */
3006     IStatus = gdth_get_status(ha);
3007     if (IStatus == 0) {
3008         /* spurious interrupt */
3009         if (!gdth_polling)
3010             spin_unlock_irqrestore(&ha->smp_lock, flags);
3011         return IRQ_HANDLED;
3012     }
3013
3014 #ifdef GDTH_STATISTICS
3015     ++act_ints;
3016 #endif
3017
3018 #ifdef INT_COAL
3019     /* See if the fw is returning coalesced status */
3020     if (IStatus == COALINDEX) {
3021         /* Coalesced status.  Setup the initial status
3022            buffer pointer and flags */
3023         pcs = ha->coal_stat;
3024         coalesced = TRUE;
3025         next = TRUE;
3026     }
3027
3028     do {
3029         if (coalesced) {
3030             /* For coalesced requests all status
3031                information is found in the status buffer */
3032             IStatus = (unchar)(pcs->status & 0xff);
3033         }
3034 #endif
3035
3036         if (ha->type == GDT_EISA) {
3037             if (IStatus & 0x80) {                       /* error flag */
3038                 IStatus &= ~0x80;
3039                 ha->status = inw(ha->bmic + MAILBOXREG+8);
3040                 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3041             } else                                      /* no error */
3042                 ha->status = S_OK;
3043             ha->info = inl(ha->bmic + MAILBOXREG+12);
3044             ha->service = inw(ha->bmic + MAILBOXREG+10);
3045             ha->info2 = inl(ha->bmic + MAILBOXREG+4);
3046
3047             outb(0xff, ha->bmic + EDOORREG);    /* acknowledge interrupt */
3048             outb(0x00, ha->bmic + SEMA1REG);    /* reset status semaphore */
3049         } else if (ha->type == GDT_ISA) {
3050             dp2_ptr = ha->brd;
3051             if (IStatus & 0x80) {                       /* error flag */
3052                 IStatus &= ~0x80;
3053                 ha->status = readw(&dp2_ptr->u.ic.Status);
3054                 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3055             } else                                      /* no error */
3056                 ha->status = S_OK;
3057             ha->info = readl(&dp2_ptr->u.ic.Info[0]);
3058             ha->service = readw(&dp2_ptr->u.ic.Service);
3059             ha->info2 = readl(&dp2_ptr->u.ic.Info[1]);
3060
3061             writeb(0xff, &dp2_ptr->io.irqdel); /* acknowledge interrupt */
3062             writeb(0, &dp2_ptr->u.ic.Cmd_Index);/* reset command index */
3063             writeb(0, &dp2_ptr->io.Sema1);     /* reset status semaphore */
3064         } else if (ha->type == GDT_PCI) {
3065             dp6_ptr = ha->brd;
3066             if (IStatus & 0x80) {                       /* error flag */
3067                 IStatus &= ~0x80;
3068                 ha->status = readw(&dp6_ptr->u.ic.Status);
3069                 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3070             } else                                      /* no error */
3071                 ha->status = S_OK;
3072             ha->info = readl(&dp6_ptr->u.ic.Info[0]);
3073             ha->service = readw(&dp6_ptr->u.ic.Service);
3074             ha->info2 = readl(&dp6_ptr->u.ic.Info[1]);
3075
3076             writeb(0xff, &dp6_ptr->io.irqdel); /* acknowledge interrupt */
3077             writeb(0, &dp6_ptr->u.ic.Cmd_Index);/* reset command index */
3078             writeb(0, &dp6_ptr->io.Sema1);     /* reset status semaphore */
3079         } else if (ha->type == GDT_PCINEW) {
3080             if (IStatus & 0x80) {                       /* error flag */
3081                 IStatus &= ~0x80;
3082                 ha->status = inw(PTR2USHORT(&ha->plx->status));
3083                 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3084             } else
3085                 ha->status = S_OK;
3086             ha->info = inl(PTR2USHORT(&ha->plx->info[0]));
3087             ha->service = inw(PTR2USHORT(&ha->plx->service));
3088             ha->info2 = inl(PTR2USHORT(&ha->plx->info[1]));
3089
3090             outb(0xff, PTR2USHORT(&ha->plx->edoor_reg));
3091             outb(0x00, PTR2USHORT(&ha->plx->sema1_reg));
3092         } else if (ha->type == GDT_PCIMPR) {
3093             dp6m_ptr = ha->brd;
3094             if (IStatus & 0x80) {                       /* error flag */
3095                 IStatus &= ~0x80;
3096 #ifdef INT_COAL
3097                 if (coalesced)
3098                     ha->status = pcs->ext_status & 0xffff;
3099                 else
3100 #endif
3101                     ha->status = readw(&dp6m_ptr->i960r.status);
3102                 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3103             } else                                      /* no error */
3104                 ha->status = S_OK;
3105 #ifdef INT_COAL
3106             /* get information */
3107             if (coalesced) {
3108                 ha->info = pcs->info0;
3109                 ha->info2 = pcs->info1;
3110                 ha->service = (pcs->ext_status >> 16) & 0xffff;
3111             } else
3112 #endif
3113             {
3114                 ha->info = readl(&dp6m_ptr->i960r.info[0]);
3115                 ha->service = readw(&dp6m_ptr->i960r.service);
3116                 ha->info2 = readl(&dp6m_ptr->i960r.info[1]);
3117             }
3118             /* event string */
3119             if (IStatus == ASYNCINDEX) {
3120                 if (ha->service != SCREENSERVICE &&
3121                     (ha->fw_vers & 0xff) >= 0x1a) {
3122                     ha->dvr.severity = readb
3123                         (&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.severity);
3124                     for (i = 0; i < 256; ++i) {
3125                         ha->dvr.event_string[i] = readb
3126                             (&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.evt_str[i]);
3127                         if (ha->dvr.event_string[i] == 0)
3128                             break;
3129                     }
3130                 }
3131             }
3132 #ifdef INT_COAL
3133             /* Make sure that non coalesced interrupts get cleared
3134                before being handled by gdth_async_event/gdth_sync_event */
3135             if (!coalesced)
3136 #endif
3137             {
3138                 writeb(0xff, &dp6m_ptr->i960r.edoor_reg);
3139                 writeb(0, &dp6m_ptr->i960r.sema1_reg);
3140             }
3141         } else {
3142             TRACE2(("gdth_interrupt() unknown controller type\n"));
3143             if (!gdth_polling)
3144                 spin_unlock_irqrestore(&ha->smp_lock, flags);
3145             return IRQ_HANDLED;
3146         }
3147
3148         TRACE(("gdth_interrupt() index %d stat %d info %d\n",
3149                IStatus,ha->status,ha->info));
3150
3151         if (gdth_from_wait) {
3152             *pIndex = (int)IStatus;
3153         }
3154
3155         if (IStatus == ASYNCINDEX) {
3156             TRACE2(("gdth_interrupt() async. event\n"));
3157             gdth_async_event(ha);
3158             if (!gdth_polling)
3159                 spin_unlock_irqrestore(&ha->smp_lock, flags);
3160             gdth_next(ha);
3161             return IRQ_HANDLED;
3162         }
3163
3164         if (IStatus == SPEZINDEX) {
3165             TRACE2(("Service unknown or not initialized !\n"));
3166             ha->dvr.size = sizeof(ha->dvr.eu.driver);
3167             ha->dvr.eu.driver.ionode = ha->hanum;
3168             gdth_store_event(ha, ES_DRIVER, 4, &ha->dvr);
3169             if (!gdth_polling)
3170                 spin_unlock_irqrestore(&ha->smp_lock, flags);
3171             return IRQ_HANDLED;
3172         }
3173         scp     = ha->cmd_tab[IStatus-2].cmnd;
3174         Service = ha->cmd_tab[IStatus-2].service;
3175         ha->cmd_tab[IStatus-2].cmnd = UNUSED_CMND;
3176         if (scp == UNUSED_CMND) {
3177             TRACE2(("gdth_interrupt() index to unused command (%d)\n",IStatus));
3178             ha->dvr.size = sizeof(ha->dvr.eu.driver);
3179             ha->dvr.eu.driver.ionode = ha->hanum;
3180             ha->dvr.eu.driver.index = IStatus;
3181             gdth_store_event(ha, ES_DRIVER, 1, &ha->dvr);
3182             if (!gdth_polling)
3183                 spin_unlock_irqrestore(&ha->smp_lock, flags);
3184             return IRQ_HANDLED;
3185         }
3186         if (scp == INTERNAL_CMND) {
3187             TRACE(("gdth_interrupt() answer to internal command\n"));
3188             if (!gdth_polling)
3189                 spin_unlock_irqrestore(&ha->smp_lock, flags);
3190             return IRQ_HANDLED;
3191         }
3192
3193         TRACE(("gdth_interrupt() sync. status\n"));
3194         rval = gdth_sync_event(ha,Service,IStatus,scp);
3195         if (!gdth_polling)
3196             spin_unlock_irqrestore(&ha->smp_lock, flags);
3197         if (rval == 2) {
3198             gdth_putq(ha, scp, gdth_cmnd_priv(scp)->priority);
3199         } else if (rval == 1) {
3200             gdth_scsi_done(scp);
3201         }
3202
3203 #ifdef INT_COAL
3204         if (coalesced) {
3205             /* go to the next status in the status buffer */
3206             ++pcs;
3207 #ifdef GDTH_STATISTICS
3208             ++act_int_coal;
3209             if (act_int_coal > max_int_coal) {
3210                 max_int_coal = act_int_coal;
3211                 printk("GDT: max_int_coal = %d\n",(ushort)max_int_coal);
3212             }
3213 #endif
3214             /* see if there is another status */
3215             if (pcs->status == 0)
3216                 /* Stop the coalesce loop */
3217                 next = FALSE;
3218         }
3219     } while (next);
3220
3221     /* coalescing only for new GDT_PCIMPR controllers available */
3222     if (ha->type == GDT_PCIMPR && coalesced) {
3223         writeb(0xff, &dp6m_ptr->i960r.edoor_reg);
3224         writeb(0, &dp6m_ptr->i960r.sema1_reg);
3225     }
3226 #endif
3227
3228     gdth_next(ha);
3229     return IRQ_HANDLED;
3230 }
3231
3232 static irqreturn_t gdth_interrupt(int irq, void *dev_id)
3233 {
3234         gdth_ha_str *ha = dev_id;
3235
3236         return __gdth_interrupt(ha, false, NULL);
3237 }
3238
3239 static int gdth_sync_event(gdth_ha_str *ha, int service, unchar index,
3240                                                               Scsi_Cmnd *scp)
3241 {
3242     gdth_msg_str *msg;
3243     gdth_cmd_str *cmdp;
3244     unchar b, t;
3245     struct gdth_cmndinfo *cmndinfo = gdth_cmnd_priv(scp);
3246
3247     cmdp = ha->pccb;
3248     TRACE(("gdth_sync_event() serv %d status %d\n",
3249            service,ha->status));
3250
3251     if (service == SCREENSERVICE) {
3252         msg  = ha->pmsg;
3253         TRACE(("len: %d, answer: %d, ext: %d, alen: %d\n",
3254                msg->msg_len,msg->msg_answer,msg->msg_ext,msg->msg_alen));
3255         if (msg->msg_len > MSGLEN+1)
3256             msg->msg_len = MSGLEN+1;
3257         if (msg->msg_len)
3258             if (!(msg->msg_answer && msg->msg_ext)) {
3259                 msg->msg_text[msg->msg_len] = '\0';
3260                 printk("%s",msg->msg_text);
3261             }
3262
3263         if (msg->msg_ext && !msg->msg_answer) {
3264             while (gdth_test_busy(ha))
3265                 gdth_delay(0);
3266             cmdp->Service       = SCREENSERVICE;
3267             cmdp->RequestBuffer = SCREEN_CMND;
3268             gdth_get_cmd_index(ha);
3269             gdth_set_sema0(ha);
3270             cmdp->OpCode        = GDT_READ;
3271             cmdp->BoardNode     = LOCALBOARD;
3272             cmdp->u.screen.reserved  = 0;
3273             cmdp->u.screen.su.msg.msg_handle= msg->msg_handle;
3274             cmdp->u.screen.su.msg.msg_addr  = ha->msg_phys;
3275             ha->cmd_offs_dpmem = 0;
3276             ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.screen.su.msg.msg_addr)
3277                 + sizeof(ulong64);
3278             ha->cmd_cnt = 0;
3279             gdth_copy_command(ha);
3280             gdth_release_event(ha);
3281             return 0;
3282         }
3283
3284         if (msg->msg_answer && msg->msg_alen) {
3285             /* default answers (getchar() not possible) */
3286             if (msg->msg_alen == 1) {
3287                 msg->msg_alen = 0;
3288                 msg->msg_len = 1;
3289                 msg->msg_text[0] = 0;
3290             } else {
3291                 msg->msg_alen -= 2;
3292                 msg->msg_len = 2;
3293                 msg->msg_text[0] = 1;
3294                 msg->msg_text[1] = 0;
3295             }
3296             msg->msg_ext    = 0;
3297             msg->msg_answer = 0;
3298             while (gdth_test_busy(ha))
3299                 gdth_delay(0);
3300             cmdp->Service       = SCREENSERVICE;
3301             cmdp->RequestBuffer = SCREEN_CMND;
3302             gdth_get_cmd_index(ha);
3303             gdth_set_sema0(ha);
3304             cmdp->OpCode        = GDT_WRITE;
3305             cmdp->BoardNode     = LOCALBOARD;
3306             cmdp->u.screen.reserved  = 0;
3307             cmdp->u.screen.su.msg.msg_handle= msg->msg_handle;
3308             cmdp->u.screen.su.msg.msg_addr  = ha->msg_phys;
3309             ha->cmd_offs_dpmem = 0;
3310             ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.screen.su.msg.msg_addr)
3311                 + sizeof(ulong64);
3312             ha->cmd_cnt = 0;
3313             gdth_copy_command(ha);
3314             gdth_release_event(ha);
3315             return 0;
3316         }
3317         printk("\n");
3318
3319     } else {
3320         b = scp->device->channel;
3321         t = scp->device->id;
3322         if (cmndinfo->OpCode == -1 && b != ha->virt_bus) {
3323             ha->raw[BUS_L2P(ha,b)].io_cnt[t]--;
3324         }
3325         /* cache or raw service */
3326         if (ha->status == S_BSY) {
3327             TRACE2(("Controller busy -> retry !\n"));
3328             if (cmndinfo->OpCode == GDT_MOUNT)
3329                 cmndinfo->OpCode = GDT_CLUST_INFO;
3330             /* retry */
3331             return 2;
3332         }
3333         if (scsi_bufflen(scp))
3334             pci_unmap_sg(ha->pdev, scsi_sglist(scp), scsi_sg_count(scp),
3335                          cmndinfo->dma_dir);
3336
3337         if (cmndinfo->sense_paddr)
3338             pci_unmap_page(ha->pdev, cmndinfo->sense_paddr, 16,
3339                                                            PCI_DMA_FROMDEVICE);
3340
3341         if (ha->status == S_OK) {
3342             cmndinfo->status = S_OK;
3343             cmndinfo->info = ha->info;
3344             if (cmndinfo->OpCode != -1) {
3345                 TRACE2(("gdth_sync_event(): special cmd 0x%x OK\n",
3346                         cmndinfo->OpCode));
3347                 /* special commands GDT_CLUST_INFO/GDT_MOUNT ? */
3348                 if (cmndinfo->OpCode == GDT_CLUST_INFO) {
3349                     ha->hdr[t].cluster_type = (unchar)ha->info;
3350                     if (!(ha->hdr[t].cluster_type &
3351                         CLUSTER_MOUNTED)) {
3352                         /* NOT MOUNTED -> MOUNT */
3353                         cmndinfo->OpCode = GDT_MOUNT;
3354                         if (ha->hdr[t].cluster_type &
3355                             CLUSTER_RESERVED) {
3356                             /* cluster drive RESERVED (on the other node) */
3357                             cmndinfo->phase = -2;      /* reservation conflict */
3358                         }
3359                     } else {
3360                         cmndinfo->OpCode = -1;
3361                     }
3362                 } else {
3363                     if (cmndinfo->OpCode == GDT_MOUNT) {
3364                         ha->hdr[t].cluster_type |= CLUSTER_MOUNTED;
3365                         ha->hdr[t].media_changed = TRUE;
3366                     } else if (cmndinfo->OpCode == GDT_UNMOUNT) {
3367                         ha->hdr[t].cluster_type &= ~CLUSTER_MOUNTED;
3368                         ha->hdr[t].media_changed = TRUE;
3369                     }
3370                     cmndinfo->OpCode = -1;
3371                 }
3372                 /* retry */
3373                 cmndinfo->priority = HIGH_PRI;
3374                 return 2;
3375             } else {
3376                 /* RESERVE/RELEASE ? */
3377                 if (scp->cmnd[0] == RESERVE) {
3378                     ha->hdr[t].cluster_type |= CLUSTER_RESERVED;
3379                 } else if (scp->cmnd[0] == RELEASE) {
3380                     ha->hdr[t].cluster_type &= ~CLUSTER_RESERVED;
3381                 }
3382                 scp->result = DID_OK << 16;
3383                 scp->sense_buffer[0] = 0;
3384             }
3385         } else {
3386             cmndinfo->status = ha->status;
3387             cmndinfo->info = ha->info;
3388
3389             if (cmndinfo->OpCode != -1) {
3390                 TRACE2(("gdth_sync_event(): special cmd 0x%x error 0x%x\n",
3391                         cmndinfo->OpCode, ha->status));
3392                 if (cmndinfo->OpCode == GDT_SCAN_START ||
3393                     cmndinfo->OpCode == GDT_SCAN_END) {
3394                     cmndinfo->OpCode = -1;
3395                     /* retry */
3396                     cmndinfo->priority = HIGH_PRI;
3397                     return 2;
3398                 }
3399                 memset((char*)scp->sense_buffer,0,16);
3400                 scp->sense_buffer[0] = 0x70;
3401                 scp->sense_buffer[2] = NOT_READY;
3402                 scp->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
3403             } else if (service == CACHESERVICE) {
3404                 if (ha->status == S_CACHE_UNKNOWN &&
3405                     (ha->hdr[t].cluster_type &
3406                      CLUSTER_RESERVE_STATE) == CLUSTER_RESERVE_STATE) {
3407                     /* bus reset -> force GDT_CLUST_INFO */
3408                     ha->hdr[t].cluster_type &= ~CLUSTER_RESERVED;
3409                 }
3410                 memset((char*)scp->sense_buffer,0,16);
3411                 if (ha->status == (ushort)S_CACHE_RESERV) {
3412                     scp->result = (DID_OK << 16) | (RESERVATION_CONFLICT << 1);
3413                 } else {
3414                     scp->sense_buffer[0] = 0x70;
3415                     scp->sense_buffer[2] = NOT_READY;
3416                     scp->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
3417                 }
3418                 if (!cmndinfo->internal_command) {
3419                     ha->dvr.size = sizeof(ha->dvr.eu.sync);
3420                     ha->dvr.eu.sync.ionode  = ha->hanum;
3421                     ha->dvr.eu.sync.service = service;
3422                     ha->dvr.eu.sync.status  = ha->status;
3423                     ha->dvr.eu.sync.info    = ha->info;
3424                     ha->dvr.eu.sync.hostdrive = t;
3425                     if (ha->status >= 0x8000)
3426                         gdth_store_event(ha, ES_SYNC, 0, &ha->dvr);
3427                     else
3428                         gdth_store_event(ha, ES_SYNC, service, &ha->dvr);
3429                 }
3430             } else {
3431                 /* sense buffer filled from controller firmware (DMA) */
3432                 if (ha->status != S_RAW_SCSI || ha->info >= 0x100) {
3433                     scp->result = DID_BAD_TARGET << 16;
3434                 } else {
3435                     scp->result = (DID_OK << 16) | ha->info;
3436                 }
3437             }
3438         }
3439         if (!cmndinfo->wait_for_completion)
3440             cmndinfo->wait_for_completion++;
3441         else
3442             return 1;
3443     }
3444
3445     return 0;
3446 }
3447
3448 static char *async_cache_tab[] = {
3449 /* 0*/  "\011\000\002\002\002\004\002\006\004"
3450         "GDT HA %u, service %u, async. status %u/%lu unknown",
3451 /* 1*/  "\011\000\002\002\002\004\002\006\004"
3452         "GDT HA %u, service %u, async. status %u/%lu unknown",
3453 /* 2*/  "\005\000\002\006\004"
3454         "GDT HA %u, Host Drive %lu not ready",
3455 /* 3*/  "\005\000\002\006\004"
3456         "GDT HA %u, Host Drive %lu: REASSIGN not successful and/or data error on reassigned blocks. Drive may crash in the future and should be replaced",
3457 /* 4*/  "\005\000\002\006\004"
3458         "GDT HA %u, mirror update on Host Drive %lu failed",
3459 /* 5*/  "\005\000\002\006\004"
3460         "GDT HA %u, Mirror Drive %lu failed",
3461 /* 6*/  "\005\000\002\006\004"
3462         "GDT HA %u, Mirror Drive %lu: REASSIGN not successful and/or data error on reassigned blocks. Drive may crash in the future and should be replaced",
3463 /* 7*/  "\005\000\002\006\004"
3464         "GDT HA %u, Host Drive %lu write protected",
3465 /* 8*/  "\005\000\002\006\004"
3466         "GDT HA %u, media changed in Host Drive %lu",
3467 /* 9*/  "\005\000\002\006\004"
3468         "GDT HA %u, Host Drive %lu is offline",
3469 /*10*/  "\005\000\002\006\004"
3470         "GDT HA %u, media change of Mirror Drive %lu",
3471 /*11*/  "\005\000\002\006\004"
3472         "GDT HA %u, Mirror Drive %lu is write protected",
3473 /*12*/  "\005\000\002\006\004"
3474         "GDT HA %u, general error on Host Drive %lu. Please check the devices of this drive!",
3475 /*13*/  "\007\000\002\006\002\010\002"
3476         "GDT HA %u, Array Drive %u: Cache Drive %u failed",
3477 /*14*/  "\005\000\002\006\002"
3478         "GDT HA %u, Array Drive %u: FAIL state entered",
3479 /*15*/  "\005\000\002\006\002"
3480         "GDT HA %u, Array Drive %u: error",
3481 /*16*/  "\007\000\002\006\002\010\002"
3482         "GDT HA %u, Array Drive %u: failed drive replaced by Cache Drive %u",
3483 /*17*/  "\005\000\002\006\002"
3484         "GDT HA %u, Array Drive %u: parity build failed",
3485 /*18*/  "\005\000\002\006\002"
3486         "GDT HA %u, Array Drive %u: drive rebuild failed",
3487 /*19*/  "\005\000\002\010\002"
3488         "GDT HA %u, Test of Hot Fix %u failed",
3489 /*20*/  "\005\000\002\006\002"
3490         "GDT HA %u, Array Drive %u: drive build finished successfully",
3491 /*21*/  "\005\000\002\006\002"
3492         "GDT HA %u, Array Drive %u: drive rebuild finished successfully",
3493 /*22*/  "\007\000\002\006\002\010\002"
3494         "GDT HA %u, Array Drive %u: Hot Fix %u activated",
3495 /*23*/  "\005\000\002\006\002"
3496         "GDT HA %u, Host Drive %u: processing of i/o aborted due to serious drive error",
3497 /*24*/  "\005\000\002\010\002"
3498         "GDT HA %u, mirror update on Cache Drive %u completed",
3499 /*25*/  "\005\000\002\010\002"
3500         "GDT HA %u, mirror update on Cache Drive %lu failed",
3501 /*26*/  "\005\000\002\006\002"
3502         "GDT HA %u, Array Drive %u: drive rebuild started",
3503 /*27*/  "\005\000\002\012\001"
3504         "GDT HA %u, Fault bus %u: SHELF OK detected",
3505 /*28*/  "\005\000\002\012\001"
3506         "GDT HA %u, Fault bus %u: SHELF not OK detected",
3507 /*29*/  "\007\000\002\012\001\013\001"
3508         "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug started",
3509 /*30*/  "\007\000\002\012\001\013\001"
3510         "GDT HA %u, Fault bus %u, ID %u: new disk detected",
3511 /*31*/  "\007\000\002\012\001\013\001"
3512         "GDT HA %u, Fault bus %u, ID %u: old disk detected",
3513 /*32*/  "\007\000\002\012\001\013\001"
3514         "GDT HA %u, Fault bus %u, ID %u: plugging an active disk is invalid",
3515 /*33*/  "\007\000\002\012\001\013\001"
3516         "GDT HA %u, Fault bus %u, ID %u: invalid device detected",
3517 /*34*/  "\011\000\002\012\001\013\001\006\004"
3518         "GDT HA %u, Fault bus %u, ID %u: insufficient disk capacity (%lu MB required)",
3519 /*35*/  "\007\000\002\012\001\013\001"
3520         "GDT HA %u, Fault bus %u, ID %u: disk write protected",
3521 /*36*/  "\007\000\002\012\001\013\001"
3522         "GDT HA %u, Fault bus %u, ID %u: disk not available",
3523 /*37*/  "\007\000\002\012\001\006\004"
3524         "GDT HA %u, Fault bus %u: swap detected (%lu)",
3525 /*38*/  "\007\000\002\012\001\013\001"
3526         "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug finished successfully",
3527 /*39*/  "\007\000\002\012\001\013\001"
3528         "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug aborted due to user Hot Plug",
3529 /*40*/  "\007\000\002\012\001\013\001"
3530         "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug aborted",
3531 /*41*/  "\007\000\002\012\001\013\001"
3532         "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug for Hot Fix started",
3533 /*42*/  "\005\000\002\006\002"
3534         "GDT HA %u, Array Drive %u: drive build started",
3535 /*43*/  "\003\000\002"
3536         "GDT HA %u, DRAM parity error detected",
3537 /*44*/  "\005\000\002\006\002"
3538         "GDT HA %u, Mirror Drive %u: update started",
3539 /*45*/  "\007\000\002\006\002\010\002"
3540         "GDT HA %u, Mirror Drive %u: Hot Fix %u activated",
3541 /*46*/  "\005\000\002\006\002"
3542         "GDT HA %u, Array Drive %u: no matching Pool Hot Fix Drive available",
3543 /*47*/  "\005\000\002\006\002"
3544         "GDT HA %u, Array Drive %u: Pool Hot Fix Drive available",
3545 /*48*/  "\005\000\002\006\002"
3546         "GDT HA %u, Mirror Drive %u: no matching Pool Hot Fix Drive available",
3547 /*49*/  "\005\000\002\006\002"
3548         "GDT HA %u, Mirror Drive %u: Pool Hot Fix Drive available",
3549 /*50*/  "\007\000\002\012\001\013\001"
3550         "GDT HA %u, SCSI bus %u, ID %u: IGNORE_WIDE_RESIDUE message received",
3551 /*51*/  "\005\000\002\006\002"
3552         "GDT HA %u, Array Drive %u: expand started",
3553 /*52*/  "\005\000\002\006\002"
3554         "GDT HA %u, Array Drive %u: expand finished successfully",
3555 /*53*/  "\005\000\002\006\002"
3556         "GDT HA %u, Array Drive %u: expand failed",
3557 /*54*/  "\003\000\002"
3558         "GDT HA %u, CPU temperature critical",
3559 /*55*/  "\003\000\002"
3560         "GDT HA %u, CPU temperature OK",
3561 /*56*/  "\005\000\002\006\004"
3562         "GDT HA %u, Host drive %lu created",
3563 /*57*/  "\005\000\002\006\002"
3564         "GDT HA %u, Array Drive %u: expand restarted",
3565 /*58*/  "\005\000\002\006\002"
3566         "GDT HA %u, Array Drive %u: expand stopped",
3567 /*59*/  "\005\000\002\010\002"
3568         "GDT HA %u, Mirror Drive %u: drive build quited",
3569 /*60*/  "\005\000\002\006\002"
3570         "GDT HA %u, Array Drive %u: parity build quited",
3571 /*61*/  "\005\000\002\006\002"
3572         "GDT HA %u, Array Drive %u: drive rebuild quited",
3573 /*62*/  "\005\000\002\006\002"
3574         "GDT HA %u, Array Drive %u: parity verify started",
3575 /*63*/  "\005\000\002\006\002"
3576         "GDT HA %u, Array Drive %u: parity verify done",
3577 /*64*/  "\005\000\002\006\002"
3578         "GDT HA %u, Array Drive %u: parity verify failed",
3579 /*65*/  "\005\000\002\006\002"
3580         "GDT HA %u, Array Drive %u: parity error detected",
3581 /*66*/  "\005\000\002\006\002"
3582         "GDT HA %u, Array Drive %u: parity verify quited",
3583 /*67*/  "\005\000\002\006\002"
3584         "GDT HA %u, Host Drive %u reserved",
3585 /*68*/  "\005\000\002\006\002"
3586         "GDT HA %u, Host Drive %u mounted and released",
3587 /*69*/  "\005\000\002\006\002"
3588         "GDT HA %u, Host Drive %u released",
3589 /*70*/  "\003\000\002"
3590         "GDT HA %u, DRAM error detected and corrected with ECC",
3591 /*71*/  "\003\000\002"
3592         "GDT HA %u, Uncorrectable DRAM error detected with ECC",
3593 /*72*/  "\011\000\002\012\001\013\001\014\001"
3594         "GDT HA %u, SCSI bus %u, ID %u, LUN %u: reassigning block",
3595 /*73*/  "\005\000\002\006\002"
3596         "GDT HA %u, Host drive %u resetted locally",
3597 /*74*/  "\005\000\002\006\002"
3598         "GDT HA %u, Host drive %u resetted remotely",
3599 /*75*/  "\003\000\002"
3600         "GDT HA %u, async. status 75 unknown",
3601 };
3602
3603
3604 static int gdth_async_event(gdth_ha_str *ha)
3605 {
3606     gdth_cmd_str *cmdp;
3607     int cmd_index;
3608
3609     cmdp= ha->pccb;
3610     TRACE2(("gdth_async_event() ha %d serv %d\n",
3611             ha->hanum, ha->service));
3612
3613     if (ha->service == SCREENSERVICE) {
3614         if (ha->status == MSG_REQUEST) {
3615             while (gdth_test_busy(ha))
3616                 gdth_delay(0);
3617             cmdp->Service       = SCREENSERVICE;
3618             cmdp->RequestBuffer = SCREEN_CMND;
3619             cmd_index = gdth_get_cmd_index(ha);
3620             gdth_set_sema0(ha);
3621             cmdp->OpCode        = GDT_READ;
3622             cmdp->BoardNode     = LOCALBOARD;
3623             cmdp->u.screen.reserved  = 0;
3624             cmdp->u.screen.su.msg.msg_handle= MSG_INV_HANDLE;
3625             cmdp->u.screen.su.msg.msg_addr  = ha->msg_phys;
3626             ha->cmd_offs_dpmem = 0;
3627             ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.screen.su.msg.msg_addr)
3628                 + sizeof(ulong64);
3629             ha->cmd_cnt = 0;
3630             gdth_copy_command(ha);
3631             if (ha->type == GDT_EISA)
3632                 printk("[EISA slot %d] ",(ushort)ha->brd_phys);
3633             else if (ha->type == GDT_ISA)
3634                 printk("[DPMEM 0x%4X] ",(ushort)ha->brd_phys);
3635             else
3636                 printk("[PCI %d/%d] ",(ushort)(ha->brd_phys>>8),
3637                        (ushort)((ha->brd_phys>>3)&0x1f));
3638             gdth_release_event(ha);
3639         }
3640
3641     } else {
3642         if (ha->type == GDT_PCIMPR &&
3643             (ha->fw_vers & 0xff) >= 0x1a) {
3644             ha->dvr.size = 0;
3645             ha->dvr.eu.async.ionode = ha->hanum;
3646             ha->dvr.eu.async.status  = ha->status;
3647             /* severity and event_string already set! */
3648         } else {
3649             ha->dvr.size = sizeof(ha->dvr.eu.async);
3650             ha->dvr.eu.async.ionode   = ha->hanum;
3651             ha->dvr.eu.async.service = ha->service;
3652             ha->dvr.eu.async.status  = ha->status;
3653             ha->dvr.eu.async.info    = ha->info;
3654             *(ulong32 *)ha->dvr.eu.async.scsi_coord  = ha->info2;
3655         }
3656         gdth_store_event( ha, ES_ASYNC, ha->service, &ha->dvr );
3657         gdth_log_event( &ha->dvr, NULL );
3658
3659         /* new host drive from expand? */
3660         if (ha->service == CACHESERVICE && ha->status == 56) {
3661             TRACE2(("gdth_async_event(): new host drive %d created\n",
3662                     (ushort)ha->info));
3663             /* gdth_analyse_hdrive(hanum, (ushort)ha->info); */
3664         }
3665     }
3666     return 1;
3667 }
3668
3669 static void gdth_log_event(gdth_evt_data *dvr, char *buffer)
3670 {
3671     gdth_stackframe stack;
3672     char *f = NULL;
3673     int i,j;
3674
3675     TRACE2(("gdth_log_event()\n"));
3676     if (dvr->size == 0) {
3677         if (buffer == NULL) {
3678             printk("Adapter %d: %s\n",dvr->eu.async.ionode,dvr->event_string);
3679         } else {
3680             sprintf(buffer,"Adapter %d: %s\n",
3681                 dvr->eu.async.ionode,dvr->event_string);
3682         }
3683     } else if (dvr->eu.async.service == CACHESERVICE &&
3684         INDEX_OK(dvr->eu.async.status, async_cache_tab)) {
3685         TRACE2(("GDT: Async. event cache service, event no.: %d\n",
3686                 dvr->eu.async.status));
3687
3688         f = async_cache_tab[dvr->eu.async.status];
3689
3690         /* i: parameter to push, j: stack element to fill */
3691         for (j=0,i=1; i < f[0]; i+=2) {
3692             switch (f[i+1]) {
3693               case 4:
3694                 stack.b[j++] = *(ulong32*)&dvr->eu.stream[(int)f[i]];
3695                 break;
3696               case 2:
3697                 stack.b[j++] = *(ushort*)&dvr->eu.stream[(int)f[i]];
3698                 break;
3699               case 1:
3700                 stack.b[j++] = *(unchar*)&dvr->eu.stream[(int)f[i]];
3701                 break;
3702               default:
3703                 break;
3704             }
3705         }
3706
3707         if (buffer == NULL) {
3708             printk(&f[(int)f[0]],stack);
3709             printk("\n");
3710         } else {
3711             sprintf(buffer,&f[(int)f[0]],stack);
3712         }
3713
3714     } else {
3715         if (buffer == NULL) {
3716             printk("GDT HA %u, Unknown async. event service %d event no. %d\n",
3717                    dvr->eu.async.ionode,dvr->eu.async.service,dvr->eu.async.status);
3718         } else {
3719             sprintf(buffer,"GDT HA %u, Unknown async. event service %d event no. %d",
3720                     dvr->eu.async.ionode,dvr->eu.async.service,dvr->eu.async.status);
3721         }
3722     }
3723 }
3724
3725 #ifdef GDTH_STATISTICS
3726 static unchar   gdth_timer_running;
3727
3728 static void gdth_timeout(ulong data)
3729 {
3730     ulong32 i;
3731     Scsi_Cmnd *nscp;
3732     gdth_ha_str *ha;
3733     ulong flags;
3734
3735     if(unlikely(list_empty(&gdth_instances))) {
3736             gdth_timer_running = 0;
3737             return;
3738     }
3739
3740     ha = list_first_entry(&gdth_instances, gdth_ha_str, list);
3741     spin_lock_irqsave(&ha->smp_lock, flags);
3742
3743     for (act_stats=0,i=0; i<GDTH_MAXCMDS; ++i)
3744         if (ha->cmd_tab[i].cmnd != UNUSED_CMND)
3745             ++act_stats;
3746
3747     for (act_rq=0,nscp=ha->req_first; nscp; nscp=(Scsi_Cmnd*)nscp->SCp.ptr)
3748         ++act_rq;
3749
3750     TRACE2(("gdth_to(): ints %d, ios %d, act_stats %d, act_rq %d\n",
3751             act_ints, act_ios, act_stats, act_rq));
3752     act_ints = act_ios = 0;
3753
3754     gdth_timer.expires = jiffies + 30 * HZ;
3755     add_timer(&gdth_timer);
3756     spin_unlock_irqrestore(&ha->smp_lock, flags);
3757 }
3758
3759 static void gdth_timer_init(void)
3760 {
3761         if (gdth_timer_running)
3762                 return;
3763         gdth_timer_running = 1;
3764         TRACE2(("gdth_detect(): Initializing timer !\n"));
3765         gdth_timer.expires = jiffies + HZ;
3766         gdth_timer.data = 0L;
3767         gdth_timer.function = gdth_timeout;
3768         add_timer(&gdth_timer);
3769 }
3770 #else
3771 static inline void gdth_timer_init(void)
3772 {
3773 }
3774 #endif
3775
3776 static void __init internal_setup(char *str,int *ints)
3777 {
3778     int i, argc;
3779     char *cur_str, *argv;
3780
3781     TRACE2(("internal_setup() str %s ints[0] %d\n",
3782             str ? str:"NULL", ints ? ints[0]:0));
3783
3784     /* read irq[] from ints[] */
3785     if (ints) {
3786         argc = ints[0];
3787         if (argc > 0) {
3788             if (argc > MAXHA)
3789                 argc = MAXHA;
3790             for (i = 0; i < argc; ++i)
3791                 irq[i] = ints[i+1];
3792         }
3793     }
3794
3795     /* analyse string */
3796     argv = str;
3797     while (argv && (cur_str = strchr(argv, ':'))) {
3798         int val = 0, c = *++cur_str;
3799
3800         if (c == 'n' || c == 'N')
3801             val = 0;
3802         else if (c == 'y' || c == 'Y')
3803             val = 1;
3804         else
3805             val = (int)simple_strtoul(cur_str, NULL, 0);
3806
3807         if (!strncmp(argv, "disable:", 8))
3808             disable = val;
3809         else if (!strncmp(argv, "reserve_mode:", 13))
3810             reserve_mode = val;
3811         else if (!strncmp(argv, "reverse_scan:", 13))
3812             reverse_scan = val;
3813         else if (!strncmp(argv, "hdr_channel:", 12))
3814             hdr_channel = val;
3815         else if (!strncmp(argv, "max_ids:", 8))
3816             max_ids = val;
3817         else if (!strncmp(argv, "rescan:", 7))
3818             rescan = val;
3819         else if (!strncmp(argv, "shared_access:", 14))
3820             shared_access = val;
3821         else if (!strncmp(argv, "probe_eisa_isa:", 15))
3822             probe_eisa_isa = val;
3823         else if (!strncmp(argv, "reserve_list:", 13)) {
3824             reserve_list[0] = val;
3825             for (i = 1; i < MAX_RES_ARGS; i++) {
3826                 cur_str = strchr(cur_str, ',');
3827                 if (!cur_str)
3828                     break;
3829                 if (!isdigit((int)*++cur_str)) {
3830                     --cur_str;
3831                     break;
3832                 }
3833                 reserve_list[i] =
3834                     (int)simple_strtoul(cur_str, NULL, 0);
3835             }
3836             if (!cur_str)
3837                 break;
3838             argv = ++cur_str;
3839             continue;
3840         }
3841
3842         if ((argv = strchr(argv, ',')))
3843             ++argv;
3844     }
3845 }
3846
3847 int __init option_setup(char *str)
3848 {
3849     int ints[MAXHA];
3850     char *cur = str;
3851     int i = 1;
3852
3853     TRACE2(("option_setup() str %s\n", str ? str:"NULL"));
3854
3855     while (cur && isdigit(*cur) && i <= MAXHA) {
3856         ints[i++] = simple_strtoul(cur, NULL, 0);
3857         if ((cur = strchr(cur, ',')) != NULL) cur++;
3858     }
3859
3860     ints[0] = i - 1;
3861     internal_setup(cur, ints);
3862     return 1;
3863 }
3864
3865 static const char *gdth_ctr_name(gdth_ha_str *ha)
3866 {
3867     TRACE2(("gdth_ctr_name()\n"));
3868
3869     if (ha->type == GDT_EISA) {
3870         switch (ha->stype) {
3871           case GDT3_ID:
3872             return("GDT3000/3020");
3873           case GDT3A_ID:
3874             return("GDT3000A/3020A/3050A");
3875           case GDT3B_ID:
3876             return("GDT3000B/3010A");
3877         }
3878     } else if (ha->type == GDT_ISA) {
3879         return("GDT2000/2020");
3880     } else if (ha->type == GDT_PCI) {
3881         switch (ha->pdev->device) {
3882           case PCI_DEVICE_ID_VORTEX_GDT60x0:
3883             return("GDT6000/6020/6050");
3884           case PCI_DEVICE_ID_VORTEX_GDT6000B:
3885             return("GDT6000B/6010");
3886         }
3887     }
3888     /* new controllers (GDT_PCINEW, GDT_PCIMPR, ..) use board_info IOCTL! */
3889
3890     return("");
3891 }
3892
3893 static const char *gdth_info(struct Scsi_Host *shp)
3894 {
3895     gdth_ha_str *ha = shost_priv(shp);
3896
3897     TRACE2(("gdth_info()\n"));
3898     return ((const char *)ha->binfo.type_string);
3899 }
3900
3901 static int gdth_eh_bus_reset(Scsi_Cmnd *scp)
3902 {
3903     gdth_ha_str *ha = shost_priv(scp->device->host);
3904     int i;
3905     ulong flags;
3906     Scsi_Cmnd *cmnd;
3907     unchar b;
3908
3909     TRACE2(("gdth_eh_bus_reset()\n"));
3910
3911     b = scp->device->channel;
3912
3913     /* clear command tab */
3914     spin_lock_irqsave(&ha->smp_lock, flags);
3915     for (i = 0; i < GDTH_MAXCMDS; ++i) {
3916         cmnd = ha->cmd_tab[i].cmnd;
3917         if (!SPECIAL_SCP(cmnd) && cmnd->device->channel == b)
3918             ha->cmd_tab[i].cmnd = UNUSED_CMND;
3919     }
3920     spin_unlock_irqrestore(&ha->smp_lock, flags);
3921
3922     if (b == ha->virt_bus) {
3923         /* host drives */
3924         for (i = 0; i < MAX_HDRIVES; ++i) {
3925             if (ha->hdr[i].present) {
3926                 spin_lock_irqsave(&ha->smp_lock, flags);
3927                 gdth_polling = TRUE;
3928                 while (gdth_test_busy(ha))
3929                     gdth_delay(0);
3930                 if (gdth_internal_cmd(ha, CACHESERVICE,
3931                                       GDT_CLUST_RESET, i, 0, 0))
3932                     ha->hdr[i].cluster_type &= ~CLUSTER_RESERVED;
3933                 gdth_polling = FALSE;
3934                 spin_unlock_irqrestore(&ha->smp_lock, flags);
3935             }
3936         }
3937     } else {
3938         /* raw devices */
3939         spin_lock_irqsave(&ha->smp_lock, flags);
3940         for (i = 0; i < MAXID; ++i)
3941             ha->raw[BUS_L2P(ha,b)].io_cnt[i] = 0;
3942         gdth_polling = TRUE;
3943         while (gdth_test_busy(ha))
3944             gdth_delay(0);
3945         gdth_internal_cmd(ha, SCSIRAWSERVICE, GDT_RESET_BUS,
3946                           BUS_L2P(ha,b), 0, 0);
3947         gdth_polling = FALSE;
3948         spin_unlock_irqrestore(&ha->smp_lock, flags);
3949     }
3950     return SUCCESS;
3951 }
3952
3953 static int gdth_bios_param(struct scsi_device *sdev,struct block_device *bdev,sector_t cap,int *ip)
3954 {
3955     unchar b, t;
3956     gdth_ha_str *ha = shost_priv(sdev->host);
3957     struct scsi_device *sd;
3958     unsigned capacity;
3959
3960     sd = sdev;
3961     capacity = cap;
3962     b = sd->channel;
3963     t = sd->id;
3964     TRACE2(("gdth_bios_param() ha %d bus %d target %d\n", ha->hanum, b, t));
3965
3966     if (b != ha->virt_bus || ha->hdr[t].heads == 0) {
3967         /* raw device or host drive without mapping information */
3968         TRACE2(("Evaluate mapping\n"));
3969         gdth_eval_mapping(capacity,&ip[2],&ip[0],&ip[1]);
3970     } else {
3971         ip[0] = ha->hdr[t].heads;
3972         ip[1] = ha->hdr[t].secs;
3973         ip[2] = capacity / ip[0] / ip[1];
3974     }
3975
3976     TRACE2(("gdth_bios_param(): %d heads, %d secs, %d cyls\n",
3977             ip[0],ip[1],ip[2]));
3978     return 0;
3979 }
3980
3981
3982 static int gdth_queuecommand(struct scsi_cmnd *scp,
3983                                 void (*done)(struct scsi_cmnd *))
3984 {
3985     gdth_ha_str *ha = shost_priv(scp->device->host);
3986     struct gdth_cmndinfo *cmndinfo;
3987
3988     TRACE(("gdth_queuecommand() cmd 0x%x\n", scp->cmnd[0]));
3989
3990     cmndinfo = gdth_get_cmndinfo(ha);
3991     BUG_ON(!cmndinfo);
3992
3993     scp->scsi_done = done;
3994     gdth_update_timeout(scp, scp->timeout_per_command * 6);
3995     cmndinfo->priority = DEFAULT_PRI;
3996
3997     return __gdth_queuecommand(ha, scp, cmndinfo);
3998 }
3999
4000 static int __gdth_queuecommand(gdth_ha_str *ha, struct scsi_cmnd *scp,
4001                                 struct gdth_cmndinfo *cmndinfo)
4002 {
4003     scp->host_scribble = (unsigned char *)cmndinfo;
4004     cmndinfo->wait_for_completion = 1;
4005     cmndinfo->phase = -1;
4006     cmndinfo->OpCode = -1;
4007
4008 #ifdef GDTH_STATISTICS
4009     ++act_ios;
4010 #endif
4011
4012     gdth_putq(ha, scp, cmndinfo->priority);
4013     gdth_next(ha);
4014     return 0;
4015 }
4016
4017
4018 static int gdth_open(struct inode *inode, struct file *filep)
4019 {
4020     gdth_ha_str *ha;
4021
4022     list_for_each_entry(ha, &gdth_instances, list) {
4023         if (!ha->sdev)
4024             ha->sdev = scsi_get_host_dev(ha->shost);
4025     }
4026
4027     TRACE(("gdth_open()\n"));
4028     return 0;
4029 }
4030
4031 static int gdth_close(struct inode *inode, struct file *filep)
4032 {
4033     TRACE(("gdth_close()\n"));
4034     return 0;
4035 }
4036
4037 static int ioc_event(void __user *arg)
4038 {
4039     gdth_ioctl_event evt;
4040     gdth_ha_str *ha;
4041     ulong flags;
4042
4043     if (copy_from_user(&evt, arg, sizeof(gdth_ioctl_event)))
4044         return -EFAULT;
4045     ha = gdth_find_ha(evt.ionode);
4046     if (!ha)
4047         return -EFAULT;
4048
4049     if (evt.erase == 0xff) {
4050         if (evt.event.event_source == ES_TEST)
4051             evt.event.event_data.size=sizeof(evt.event.event_data.eu.test);
4052         else if (evt.event.event_source == ES_DRIVER)
4053             evt.event.event_data.size=sizeof(evt.event.event_data.eu.driver);
4054         else if (evt.event.event_source == ES_SYNC)
4055             evt.event.event_data.size=sizeof(evt.event.event_data.eu.sync);
4056         else
4057             evt.event.event_data.size=sizeof(evt.event.event_data.eu.async);
4058         spin_lock_irqsave(&ha->smp_lock, flags);
4059         gdth_store_event(ha, evt.event.event_source, evt.event.event_idx,
4060                          &evt.event.event_data);
4061         spin_unlock_irqrestore(&ha->smp_lock, flags);
4062     } else if (evt.erase == 0xfe) {
4063         gdth_clear_events();
4064     } else if (evt.erase == 0) {
4065         evt.handle = gdth_read_event(ha, evt.handle, &evt.event);
4066     } else {
4067         gdth_readapp_event(ha, evt.erase, &evt.event);
4068     }
4069     if (copy_to_user(arg, &evt, sizeof(gdth_ioctl_event)))
4070         return -EFAULT;
4071     return 0;
4072 }
4073
4074 static int ioc_lockdrv(void __user *arg)
4075 {
4076     gdth_ioctl_lockdrv ldrv;
4077     unchar i, j;
4078     ulong flags;
4079     gdth_ha_str *ha;
4080
4081     if (copy_from_user(&ldrv, arg, sizeof(gdth_ioctl_lockdrv)))
4082         return -EFAULT;
4083     ha = gdth_find_ha(ldrv.ionode);
4084     if (!ha)
4085         return -EFAULT;
4086
4087     for (i = 0; i < ldrv.drive_cnt && i < MAX_HDRIVES; ++i) {
4088         j = ldrv.drives[i];
4089         if (j >= MAX_HDRIVES || !ha->hdr[j].present)
4090             continue;
4091         if (ldrv.lock) {
4092             spin_lock_irqsave(&ha->smp_lock, flags);
4093             ha->hdr[j].lock = 1;
4094             spin_unlock_irqrestore(&ha->smp_lock, flags);
4095             gdth_wait_completion(ha, ha->bus_cnt, j);
4096             gdth_stop_timeout(ha, ha->bus_cnt, j);
4097         } else {
4098             spin_lock_irqsave(&ha->smp_lock, flags);
4099             ha->hdr[j].lock = 0;
4100             spin_unlock_irqrestore(&ha->smp_lock, flags);
4101             gdth_start_timeout(ha, ha->bus_cnt, j);
4102             gdth_next(ha);
4103         }
4104     }
4105     return 0;
4106 }
4107
4108 static int ioc_resetdrv(void __user *arg, char *cmnd)
4109 {
4110     gdth_ioctl_reset res;
4111     gdth_cmd_str cmd;
4112     gdth_ha_str *ha;
4113     int rval;
4114
4115     if (copy_from_user(&res, arg, sizeof(gdth_ioctl_reset)) ||
4116         res.number >= MAX_HDRIVES)
4117         return -EFAULT;
4118     ha = gdth_find_ha(res.ionode);
4119     if (!ha)
4120         return -EFAULT;
4121
4122     if (!ha->hdr[res.number].present)
4123         return 0;
4124     memset(&cmd, 0, sizeof(gdth_cmd_str));
4125     cmd.Service = CACHESERVICE;
4126     cmd.OpCode = GDT_CLUST_RESET;
4127     if (ha->cache_feat & GDT_64BIT)
4128         cmd.u.cache64.DeviceNo = res.number;
4129     else
4130         cmd.u.cache.DeviceNo = res.number;
4131
4132     rval = __gdth_execute(ha->sdev, &cmd, cmnd, 30, NULL);
4133     if (rval < 0)
4134         return rval;
4135     res.status = rval;
4136
4137     if (copy_to_user(arg, &res, sizeof(gdth_ioctl_reset)))
4138         return -EFAULT;
4139     return 0;
4140 }
4141
4142 static int ioc_general(void __user *arg, char *cmnd)
4143 {
4144     gdth_ioctl_general gen;
4145     char *buf = NULL;
4146     ulong64 paddr;
4147     gdth_ha_str *ha;
4148     int rval;
4149
4150     if (copy_from_user(&gen, arg, sizeof(gdth_ioctl_general)))
4151         return -EFAULT;
4152     ha = gdth_find_ha(gen.ionode);
4153     if (!ha)
4154         return -EFAULT;
4155     if (gen.data_len + gen.sense_len != 0) {
4156         if (!(buf = gdth_ioctl_alloc(ha, gen.data_len + gen.sense_len,
4157                                      FALSE, &paddr)))
4158             return -EFAULT;
4159         if (copy_from_user(buf, arg + sizeof(gdth_ioctl_general),
4160                            gen.data_len + gen.sense_len)) {
4161             gdth_ioctl_free(ha, gen.data_len+gen.sense_len, buf, paddr);
4162             return -EFAULT;
4163         }
4164
4165         if (gen.command.OpCode == GDT_IOCTL) {
4166             gen.command.u.ioctl.p_param = paddr;
4167         } else if (gen.command.Service == CACHESERVICE) {
4168             if (ha->cache_feat & GDT_64BIT) {
4169                 /* copy elements from 32-bit IOCTL structure */
4170                 gen.command.u.cache64.BlockCnt = gen.command.u.cache.BlockCnt;
4171                 gen.command.u.cache64.BlockNo = gen.command.u.cache.BlockNo;
4172                 gen.command.u.cache64.DeviceNo = gen.command.u.cache.DeviceNo;
4173                 /* addresses */
4174                 if (ha->cache_feat & SCATTER_GATHER) {
4175                     gen.command.u.cache64.DestAddr = (ulong64)-1;
4176                     gen.command.u.cache64.sg_canz = 1;
4177                     gen.command.u.cache64.sg_lst[0].sg_ptr = paddr;
4178                     gen.command.u.cache64.sg_lst[0].sg_len = gen.data_len;
4179                     gen.command.u.cache64.sg_lst[1].sg_len = 0;
4180                 } else {
4181                     gen.command.u.cache64.DestAddr = paddr;
4182                     gen.command.u.cache64.sg_canz = 0;
4183                 }
4184             } else {
4185                 if (ha->cache_feat & SCATTER_GATHER) {
4186                     gen.command.u.cache.DestAddr = 0xffffffff;
4187                     gen.command.u.cache.sg_canz = 1;
4188                     gen.command.u.cache.sg_lst[0].sg_ptr = (ulong32)paddr;
4189                     gen.command.u.cache.sg_lst[0].sg_len = gen.data_len;
4190                     gen.command.u.cache.sg_lst[1].sg_len = 0;
4191                 } else {
4192                     gen.command.u.cache.DestAddr = paddr;
4193                     gen.command.u.cache.sg_canz = 0;
4194                 }
4195             }
4196         } else if (gen.command.Service == SCSIRAWSERVICE) {
4197             if (ha->raw_feat & GDT_64BIT) {
4198                 /* copy elements from 32-bit IOCTL structure */
4199                 char cmd[16];
4200                 gen.command.u.raw64.sense_len = gen.command.u.raw.sense_len;
4201                 gen.command.u.raw64.bus = gen.command.u.raw.bus;
4202                 gen.command.u.raw64.lun = gen.command.u.raw.lun;
4203                 gen.command.u.raw64.target = gen.command.u.raw.target;
4204                 memcpy(cmd, gen.command.u.raw.cmd, 16);
4205                 memcpy(gen.command.u.raw64.cmd, cmd, 16);
4206                 gen.command.u.raw64.clen = gen.command.u.raw.clen;
4207                 gen.command.u.raw64.sdlen = gen.command.u.raw.sdlen;
4208                 gen.command.u.raw64.direction = gen.command.u.raw.direction;
4209                 /* addresses */
4210                 if (ha->raw_feat & SCATTER_GATHER) {
4211                     gen.command.u.raw64.sdata = (ulong64)-1;
4212                     gen.command.u.raw64.sg_ranz = 1;
4213                     gen.command.u.raw64.sg_lst[0].sg_ptr = paddr;
4214                     gen.command.u.raw64.sg_lst[0].sg_len = gen.data_len;
4215                     gen.command.u.raw64.sg_lst[1].sg_len = 0;
4216                 } else {
4217                     gen.command.u.raw64.sdata = paddr;
4218                     gen.command.u.raw64.sg_ranz = 0;
4219                 }
4220                 gen.command.u.raw64.sense_data = paddr + gen.data_len;
4221             } else {
4222                 if (ha->raw_feat & SCATTER_GATHER) {
4223                     gen.command.u.raw.sdata = 0xffffffff;
4224                     gen.command.u.raw.sg_ranz = 1;
4225                     gen.command.u.raw.sg_lst[0].sg_ptr = (ulong32)paddr;
4226                     gen.command.u.raw.sg_lst[0].sg_len = gen.data_len;
4227                     gen.command.u.raw.sg_lst[1].sg_len = 0;
4228                 } else {
4229                     gen.command.u.raw.sdata = paddr;
4230                     gen.command.u.raw.sg_ranz = 0;
4231                 }
4232                 gen.command.u.raw.sense_data = (ulong32)paddr + gen.data_len;
4233             }
4234         } else {
4235             gdth_ioctl_free(ha, gen.data_len+gen.sense_len, buf, paddr);
4236             return -EFAULT;
4237         }
4238     }
4239
4240     rval = __gdth_execute(ha->sdev, &gen.command, cmnd, gen.timeout, &gen.info);
4241     if (rval < 0)
4242         return rval;
4243     gen.status = rval;
4244
4245     if (copy_to_user(arg + sizeof(gdth_ioctl_general), buf,
4246                      gen.data_len + gen.sense_len)) {
4247         gdth_ioctl_free(ha, gen.data_len+gen.sense_len, buf, paddr);
4248         return -EFAULT;
4249     }
4250     if (copy_to_user(arg, &gen,
4251         sizeof(gdth_ioctl_general) - sizeof(gdth_cmd_str))) {
4252         gdth_ioctl_free(ha, gen.data_len+gen.sense_len, buf, paddr);
4253         return -EFAULT;
4254     }
4255     gdth_ioctl_free(ha, gen.data_len+gen.sense_len, buf, paddr);
4256     return 0;
4257 }
4258
4259 static int ioc_hdrlist(void __user *arg, char *cmnd)
4260 {
4261     gdth_ioctl_rescan *rsc;
4262     gdth_cmd_str *cmd;
4263     gdth_ha_str *ha;
4264     unchar i;
4265     int rc = -ENOMEM;
4266     u32 cluster_type = 0;
4267
4268     rsc = kmalloc(sizeof(*rsc), GFP_KERNEL);
4269     cmd = kmalloc(sizeof(*cmd), GFP_KERNEL);
4270     if (!rsc || !cmd)
4271         goto free_fail;
4272
4273     if (copy_from_user(rsc, arg, sizeof(gdth_ioctl_rescan)) ||
4274         (NULL == (ha = gdth_find_ha(rsc->ionode)))) {
4275         rc = -EFAULT;
4276         goto free_fail;
4277     }
4278     memset(cmd, 0, sizeof(gdth_cmd_str));
4279
4280     for (i = 0; i < MAX_HDRIVES; ++i) {
4281         if (!ha->hdr[i].present) {
4282             rsc->hdr_list[i].bus = 0xff;
4283             continue;
4284         }
4285         rsc->hdr_list[i].bus = ha->virt_bus;
4286         rsc->hdr_list[i].target = i;
4287         rsc->hdr_list[i].lun = 0;
4288         rsc->hdr_list[i].cluster_type = ha->hdr[i].cluster_type;
4289         if (ha->hdr[i].cluster_type & CLUSTER_DRIVE) {
4290             cmd->Service = CACHESERVICE;
4291             cmd->OpCode = GDT_CLUST_INFO;
4292             if (ha->cache_feat & GDT_64BIT)
4293                 cmd->u.cache64.DeviceNo = i;
4294             else
4295                 cmd->u.cache.DeviceNo = i;
4296             if (__gdth_execute(ha->sdev, cmd, cmnd, 30, &cluster_type) == S_OK)
4297                 rsc->hdr_list[i].cluster_type = cluster_type;
4298         }
4299     }
4300
4301     if (copy_to_user(arg, rsc, sizeof(gdth_ioctl_rescan)))
4302         rc = -EFAULT;
4303     else
4304         rc = 0;
4305
4306 free_fail:
4307     kfree(rsc);
4308     kfree(cmd);
4309     return rc;
4310 }
4311
4312 static int ioc_rescan(void __user *arg, char *cmnd)
4313 {
4314     gdth_ioctl_rescan *rsc;
4315     gdth_cmd_str *cmd;
4316     ushort i, status, hdr_cnt;
4317     ulong32 info;
4318     int cyls, hds, secs;
4319     int rc = -ENOMEM;
4320     ulong flags;
4321     gdth_ha_str *ha;
4322
4323     rsc = kmalloc(sizeof(*rsc), GFP_KERNEL);
4324     cmd = kmalloc(sizeof(*cmd), GFP_KERNEL);
4325     if (!cmd || !rsc)
4326         goto free_fail;
4327
4328     if (copy_from_user(rsc, arg, sizeof(gdth_ioctl_rescan)) ||
4329         (NULL == (ha = gdth_find_ha(rsc->ionode)))) {
4330         rc = -EFAULT;
4331         goto free_fail;
4332     }
4333     memset(cmd, 0, sizeof(gdth_cmd_str));
4334
4335     if (rsc->flag == 0) {
4336         /* old method: re-init. cache service */
4337         cmd->Service = CACHESERVICE;
4338         if (ha->cache_feat & GDT_64BIT) {
4339             cmd->OpCode = GDT_X_INIT_HOST;
4340             cmd->u.cache64.DeviceNo = LINUX_OS;
4341         } else {
4342             cmd->OpCode = GDT_INIT;
4343             cmd->u.cache.DeviceNo = LINUX_OS;
4344         }
4345
4346         status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info);
4347         i = 0;
4348         hdr_cnt = (status == S_OK ? (ushort)info : 0);
4349     } else {
4350         i = rsc->hdr_no;
4351         hdr_cnt = i + 1;
4352     }
4353
4354     for (; i < hdr_cnt && i < MAX_HDRIVES; ++i) {
4355         cmd->Service = CACHESERVICE;
4356         cmd->OpCode = GDT_INFO;
4357         if (ha->cache_feat & GDT_64BIT)
4358             cmd->u.cache64.DeviceNo = i;
4359         else
4360             cmd->u.cache.DeviceNo = i;
4361
4362         status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info);
4363
4364         spin_lock_irqsave(&ha->smp_lock, flags);
4365         rsc->hdr_list[i].bus = ha->virt_bus;
4366         rsc->hdr_list[i].target = i;
4367         rsc->hdr_list[i].lun = 0;
4368         if (status != S_OK) {
4369             ha->hdr[i].present = FALSE;
4370         } else {
4371             ha->hdr[i].present = TRUE;
4372             ha->hdr[i].size = info;
4373             /* evaluate mapping */
4374             ha->hdr[i].size &= ~SECS32;
4375             gdth_eval_mapping(ha->hdr[i].size,&cyls,&hds,&secs);
4376             ha->hdr[i].heads = hds;
4377             ha->hdr[i].secs = secs;
4378             /* round size */
4379             ha->hdr[i].size = cyls * hds * secs;
4380         }
4381         spin_unlock_irqrestore(&ha->smp_lock, flags);
4382         if (status != S_OK)
4383             continue;
4384
4385         /* extended info, if GDT_64BIT, for drives > 2 TB */
4386         /* but we need ha->info2, not yet stored in scp->SCp */
4387
4388         /* devtype, cluster info, R/W attribs */
4389         cmd->Service = CACHESERVICE;
4390         cmd->OpCode = GDT_DEVTYPE;
4391         if (ha->cache_feat & GDT_64BIT)
4392             cmd->u.cache64.DeviceNo = i;
4393         else
4394             cmd->u.cache.DeviceNo = i;
4395
4396         status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info);
4397
4398         spin_lock_irqsave(&ha->smp_lock, flags);
4399         ha->hdr[i].devtype = (status == S_OK ? (ushort)info : 0);
4400         spin_unlock_irqrestore(&ha->smp_lock, flags);
4401
4402         cmd->Service = CACHESERVICE;
4403         cmd->OpCode = GDT_CLUST_INFO;
4404         if (ha->cache_feat & GDT_64BIT)
4405             cmd->u.cache64.DeviceNo = i;
4406         else
4407             cmd->u.cache.DeviceNo = i;
4408
4409         status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info);
4410
4411         spin_lock_irqsave(&ha->smp_lock, flags);
4412         ha->hdr[i].cluster_type =
4413             ((status == S_OK && !shared_access) ? (ushort)info : 0);
4414         spin_unlock_irqrestore(&ha->smp_lock, flags);
4415         rsc->hdr_list[i].cluster_type = ha->hdr[i].cluster_type;
4416
4417         cmd->Service = CACHESERVICE;
4418         cmd->OpCode = GDT_RW_ATTRIBS;
4419         if (ha->cache_feat & GDT_64BIT)
4420             cmd->u.cache64.DeviceNo = i;
4421         else
4422             cmd->u.cache.DeviceNo = i;
4423
4424         status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info);
4425
4426         spin_lock_irqsave(&ha->smp_lock, flags);
4427         ha->hdr[i].rw_attribs = (status == S_OK ? (ushort)info : 0);
4428         spin_unlock_irqrestore(&ha->smp_lock, flags);
4429     }
4430
4431     if (copy_to_user(arg, rsc, sizeof(gdth_ioctl_rescan)))
4432         rc = -EFAULT;
4433     else
4434         rc = 0;
4435
4436 free_fail:
4437     kfree(rsc);
4438     kfree(cmd);
4439     return rc;
4440 }
4441
4442 static int gdth_ioctl(struct inode *inode, struct file *filep,
4443                       unsigned int cmd, unsigned long arg)
4444 {
4445     gdth_ha_str *ha;
4446     Scsi_Cmnd *scp;
4447     ulong flags;
4448     char cmnd[MAX_COMMAND_SIZE];
4449     void __user *argp = (void __user *)arg;
4450
4451     memset(cmnd, 0xff, 12);
4452
4453     TRACE(("gdth_ioctl() cmd 0x%x\n", cmd));
4454
4455     switch (cmd) {
4456       case GDTIOCTL_CTRCNT:
4457       {
4458         int cnt = gdth_ctr_count;
4459         if (put_user(cnt, (int __user *)argp))
4460                 return -EFAULT;
4461         break;
4462       }
4463
4464       case GDTIOCTL_DRVERS:
4465       {
4466         int ver = (GDTH_VERSION<<8) | GDTH_SUBVERSION;
4467         if (put_user(ver, (int __user *)argp))
4468                 return -EFAULT;
4469         break;
4470       }
4471
4472       case GDTIOCTL_OSVERS:
4473       {
4474         gdth_ioctl_osvers osv;
4475
4476         osv.version = (unchar)(LINUX_VERSION_CODE >> 16);
4477         osv.subversion = (unchar)(LINUX_VERSION_CODE >> 8);
4478         osv.revision = (ushort)(LINUX_VERSION_CODE & 0xff);
4479         if (copy_to_user(argp, &osv, sizeof(gdth_ioctl_osvers)))
4480                 return -EFAULT;
4481         break;
4482       }
4483
4484       case GDTIOCTL_CTRTYPE:
4485       {
4486         gdth_ioctl_ctrtype ctrt;
4487
4488         if (copy_from_user(&ctrt, argp, sizeof(gdth_ioctl_ctrtype)) ||
4489             (NULL == (ha = gdth_find_ha(ctrt.ionode))))
4490             return -EFAULT;
4491
4492         if (ha->type == GDT_ISA || ha->type == GDT_EISA) {
4493             ctrt.type = (unchar)((ha->stype>>20) - 0x10);
4494         } else {
4495             if (ha->type != GDT_PCIMPR) {
4496                 ctrt.type = (unchar)((ha->stype<<4) + 6);
4497             } else {
4498                 ctrt.type =
4499                     (ha->oem_id == OEM_ID_INTEL ? 0xfd : 0xfe);
4500                 if (ha->stype >= 0x300)
4501                     ctrt.ext_type = 0x6000 | ha->pdev->subsystem_device;
4502                 else
4503                     ctrt.ext_type = 0x6000 | ha->stype;
4504             }
4505             ctrt.device_id = ha->pdev->device;
4506             ctrt.sub_device_id = ha->pdev->subsystem_device;
4507         }
4508         ctrt.info = ha->brd_phys;
4509         ctrt.oem_id = ha->oem_id;
4510         if (copy_to_user(argp, &ctrt, sizeof(gdth_ioctl_ctrtype)))
4511             return -EFAULT;
4512         break;
4513       }
4514
4515       case GDTIOCTL_GENERAL:
4516         return ioc_general(argp, cmnd);
4517
4518       case GDTIOCTL_EVENT:
4519         return ioc_event(argp);
4520
4521       case GDTIOCTL_LOCKDRV:
4522         return ioc_lockdrv(argp);
4523
4524       case GDTIOCTL_LOCKCHN:
4525       {
4526         gdth_ioctl_lockchn lchn;
4527         unchar i, j;
4528
4529         if (copy_from_user(&lchn, argp, sizeof(gdth_ioctl_lockchn)) ||
4530             (NULL == (ha = gdth_find_ha(lchn.ionode))))
4531             return -EFAULT;
4532
4533         i = lchn.channel;
4534         if (i < ha->bus_cnt) {
4535             if (lchn.lock) {
4536                 spin_lock_irqsave(&ha->smp_lock, flags);
4537                 ha->raw[i].lock = 1;
4538                 spin_unlock_irqrestore(&ha->smp_lock, flags);
4539                 for (j = 0; j < ha->tid_cnt; ++j) {
4540                     gdth_wait_completion(ha, i, j);
4541                     gdth_stop_timeout(ha, i, j);
4542                 }
4543             } else {
4544                 spin_lock_irqsave(&ha->smp_lock, flags);
4545                 ha->raw[i].lock = 0;
4546                 spin_unlock_irqrestore(&ha->smp_lock, flags);
4547                 for (j = 0; j < ha->tid_cnt; ++j) {
4548                     gdth_start_timeout(ha, i, j);
4549                     gdth_next(ha);
4550                 }
4551             }
4552         }
4553         break;
4554       }
4555
4556       case GDTIOCTL_RESCAN:
4557         return ioc_rescan(argp, cmnd);
4558
4559       case GDTIOCTL_HDRLIST:
4560         return ioc_hdrlist(argp, cmnd);
4561
4562       case GDTIOCTL_RESET_BUS:
4563       {
4564         gdth_ioctl_reset res;
4565         int rval;
4566
4567         if (copy_from_user(&res, argp, sizeof(gdth_ioctl_reset)) ||
4568             (NULL == (ha = gdth_find_ha(res.ionode))))
4569             return -EFAULT;
4570
4571         scp  = kzalloc(sizeof(*scp), GFP_KERNEL);
4572         if (!scp)
4573             return -ENOMEM;
4574         scp->device = ha->sdev;
4575         scp->cmd_len = 12;
4576         scp->device->channel = res.number;
4577         rval = gdth_eh_bus_reset(scp);
4578         res.status = (rval == SUCCESS ? S_OK : S_GENERR);
4579         kfree(scp);
4580
4581         if (copy_to_user(argp, &res, sizeof(gdth_ioctl_reset)))
4582             return -EFAULT;
4583         break;
4584       }
4585
4586       case GDTIOCTL_RESET_DRV:
4587         return ioc_resetdrv(argp, cmnd);
4588
4589       default:
4590         break;
4591     }
4592     return 0;
4593 }
4594
4595
4596 /* flush routine */
4597 static void gdth_flush(gdth_ha_str *ha)
4598 {
4599     int             i;
4600     gdth_cmd_str    gdtcmd;
4601     char            cmnd[MAX_COMMAND_SIZE];
4602     memset(cmnd, 0xff, MAX_COMMAND_SIZE);
4603
4604     TRACE2(("gdth_flush() hanum %d\n", ha->hanum));
4605
4606     for (i = 0; i < MAX_HDRIVES; ++i) {
4607         if (ha->hdr[i].present) {
4608             gdtcmd.BoardNode = LOCALBOARD;
4609             gdtcmd.Service = CACHESERVICE;
4610             gdtcmd.OpCode = GDT_FLUSH;
4611             if (ha->cache_feat & GDT_64BIT) {
4612                 gdtcmd.u.cache64.DeviceNo = i;
4613                 gdtcmd.u.cache64.BlockNo = 1;
4614                 gdtcmd.u.cache64.sg_canz = 0;
4615             } else {
4616                 gdtcmd.u.cache.DeviceNo = i;
4617                 gdtcmd.u.cache.BlockNo = 1;
4618                 gdtcmd.u.cache.sg_canz = 0;
4619             }
4620             TRACE2(("gdth_flush(): flush ha %d drive %d\n", ha->hanum, i));
4621
4622             gdth_execute(ha->shost, &gdtcmd, cmnd, 30, NULL);
4623         }
4624     }
4625 }
4626
4627 /* configure lun */
4628 static int gdth_slave_configure(struct scsi_device *sdev)
4629 {
4630     scsi_adjust_queue_depth(sdev, 0, sdev->host->cmd_per_lun);
4631     sdev->skip_ms_page_3f = 1;
4632     sdev->skip_ms_page_8 = 1;
4633     return 0;
4634 }
4635
4636 static struct scsi_host_template gdth_template = {
4637         .name                   = "GDT SCSI Disk Array Controller",
4638         .info                   = gdth_info,
4639         .queuecommand           = gdth_queuecommand,
4640         .eh_bus_reset_handler   = gdth_eh_bus_reset,
4641         .slave_configure        = gdth_slave_configure,
4642         .bios_param             = gdth_bios_param,
4643         .proc_info              = gdth_proc_info,
4644         .proc_name              = "gdth",
4645         .can_queue              = GDTH_MAXCMDS,
4646         .this_id                = -1,
4647         .sg_tablesize           = GDTH_MAXSG,
4648         .cmd_per_lun            = GDTH_MAXC_P_L,
4649         .unchecked_isa_dma      = 1,
4650         .use_clustering         = ENABLE_CLUSTERING,
4651 };
4652
4653 #ifdef CONFIG_ISA
4654 static int __init gdth_isa_probe_one(ulong32 isa_bios)
4655 {
4656         struct Scsi_Host *shp;
4657         gdth_ha_str *ha;
4658         dma_addr_t scratch_dma_handle = 0;
4659         int error, i;
4660
4661         if (!gdth_search_isa(isa_bios))
4662                 return -ENXIO;
4663
4664         shp = scsi_host_alloc(&gdth_template, sizeof(gdth_ha_str));
4665         if (!shp)
4666                 return -ENOMEM;
4667         ha = shost_priv(shp);
4668
4669         error = -ENODEV;
4670         if (!gdth_init_isa(isa_bios,ha))
4671                 goto out_host_put;
4672
4673         /* controller found and initialized */
4674         printk("Configuring GDT-ISA HA at BIOS 0x%05X IRQ %u DRQ %u\n",
4675                 isa_bios, ha->irq, ha->drq);
4676
4677         error = request_irq(ha->irq, gdth_interrupt, IRQF_DISABLED, "gdth", ha);
4678         if (error) {
4679                 printk("GDT-ISA: Unable to allocate IRQ\n");
4680                 goto out_host_put;
4681         }
4682
4683         error = request_dma(ha->drq, "gdth");
4684         if (error) {
4685                 printk("GDT-ISA: Unable to allocate DMA channel\n");
4686                 goto out_free_irq;
4687         }
4688
4689         set_dma_mode(ha->drq,DMA_MODE_CASCADE);
4690         enable_dma(ha->drq);
4691         shp->unchecked_isa_dma = 1;
4692         shp->irq = ha->irq;
4693         shp->dma_channel = ha->drq;
4694
4695         ha->hanum = gdth_ctr_count++;
4696         ha->shost = shp;
4697
4698         ha->pccb = &ha->cmdext;
4699         ha->ccb_phys = 0L;
4700         ha->pdev = NULL;
4701
4702         error = -ENOMEM;
4703
4704         ha->pscratch = pci_alloc_consistent(ha->pdev, GDTH_SCRATCH,
4705                                                 &scratch_dma_handle);
4706         if (!ha->pscratch)
4707                 goto out_dec_counters;
4708         ha->scratch_phys = scratch_dma_handle;
4709
4710         ha->pmsg = pci_alloc_consistent(ha->pdev, sizeof(gdth_msg_str),
4711                                                 &scratch_dma_handle);
4712         if (!ha->pmsg)
4713                 goto out_free_pscratch;
4714         ha->msg_phys = scratch_dma_handle;
4715
4716 #ifdef INT_COAL
4717         ha->coal_stat = pci_alloc_consistent(ha->pdev,
4718                                 sizeof(gdth_coal_status) * MAXOFFSETS,
4719                                 &scratch_dma_handle);
4720         if (!ha->coal_stat)
4721                 goto out_free_pmsg;
4722         ha->coal_stat_phys = scratch_dma_handle;
4723 #endif
4724
4725         ha->scratch_busy = FALSE;
4726         ha->req_first = NULL;
4727         ha->tid_cnt = MAX_HDRIVES;
4728         if (max_ids > 0 && max_ids < ha->tid_cnt)
4729                 ha->tid_cnt = max_ids;
4730         for (i = 0; i < GDTH_MAXCMDS; ++i)
4731                 ha->cmd_tab[i].cmnd = UNUSED_CMND;
4732         ha->scan_mode = rescan ? 0x10 : 0;
4733
4734         error = -ENODEV;
4735         if (!gdth_search_drives(ha)) {
4736                 printk("GDT-ISA: Error during device scan\n");
4737                 goto out_free_coal_stat;
4738         }
4739
4740         if (hdr_channel < 0 || hdr_channel > ha->bus_cnt)
4741                 hdr_channel = ha->bus_cnt;
4742         ha->virt_bus = hdr_channel;
4743
4744         if (ha->cache_feat & ha->raw_feat & ha->screen_feat & GDT_64BIT)
4745                 shp->max_cmd_len = 16;
4746
4747         shp->max_id      = ha->tid_cnt;
4748         shp->max_lun     = MAXLUN;
4749         shp->max_channel = ha->bus_cnt;
4750
4751         spin_lock_init(&ha->smp_lock);
4752         gdth_enable_int(ha);
4753
4754         error = scsi_add_host(shp, NULL);
4755         if (error)
4756                 goto out_free_coal_stat;
4757         list_add_tail(&ha->list, &gdth_instances);
4758         gdth_timer_init();
4759
4760         scsi_scan_host(shp);
4761
4762         return 0;
4763
4764  out_free_coal_stat:
4765 #ifdef INT_COAL
4766         pci_free_consistent(ha->pdev, sizeof(gdth_coal_status) * MAXOFFSETS,
4767                                 ha->coal_stat, ha->coal_stat_phys);
4768  out_free_pmsg:
4769 #endif
4770         pci_free_consistent(ha->pdev, sizeof(gdth_msg_str),
4771                                 ha->pmsg, ha->msg_phys);
4772  out_free_pscratch:
4773         pci_free_consistent(ha->pdev, GDTH_SCRATCH,
4774                                 ha->pscratch, ha->scratch_phys);
4775  out_dec_counters:
4776         gdth_ctr_count--;
4777  out_free_irq:
4778         free_irq(ha->irq, ha);
4779  out_host_put:
4780         scsi_host_put(shp);
4781         return error;
4782 }
4783 #endif /* CONFIG_ISA */
4784
4785 #ifdef CONFIG_EISA
4786 static int __init gdth_eisa_probe_one(ushort eisa_slot)
4787 {
4788         struct Scsi_Host *shp;
4789         gdth_ha_str *ha;
4790         dma_addr_t scratch_dma_handle = 0;
4791         int error, i;
4792
4793         if (!gdth_search_eisa(eisa_slot))
4794                 return -ENXIO;
4795
4796         shp = scsi_host_alloc(&gdth_template, sizeof(gdth_ha_str));
4797         if (!shp)
4798                 return -ENOMEM;
4799         ha = shost_priv(shp);
4800
4801         error = -ENODEV;
4802         if (!gdth_init_eisa(eisa_slot,ha))
4803                 goto out_host_put;
4804
4805         /* controller found and initialized */
4806         printk("Configuring GDT-EISA HA at Slot %d IRQ %u\n",
4807                 eisa_slot >> 12, ha->irq);
4808
4809         error = request_irq(ha->irq, gdth_interrupt, IRQF_DISABLED, "gdth", ha);
4810         if (error) {
4811                 printk("GDT-EISA: Unable to allocate IRQ\n");
4812                 goto out_host_put;
4813         }
4814
4815         shp->unchecked_isa_dma = 0;
4816         shp->irq = ha->irq;
4817         shp->dma_channel = 0xff;
4818
4819         ha->hanum = gdth_ctr_count++;
4820         ha->shost = shp;
4821
4822         TRACE2(("EISA detect Bus 0: hanum %d\n", ha->hanum));
4823
4824         ha->pccb = &ha->cmdext;
4825         ha->ccb_phys = 0L;
4826
4827         error = -ENOMEM;
4828
4829         ha->pdev = NULL;
4830         ha->pscratch = pci_alloc_consistent(ha->pdev, GDTH_SCRATCH,
4831                                                 &scratch_dma_handle);
4832         if (!ha->pscratch)
4833                 goto out_free_irq;
4834         ha->scratch_phys = scratch_dma_handle;
4835
4836         ha->pmsg = pci_alloc_consistent(ha->pdev, sizeof(gdth_msg_str),
4837                                                 &scratch_dma_handle);
4838         if (!ha->pmsg)
4839                 goto out_free_pscratch;
4840         ha->msg_phys = scratch_dma_handle;
4841
4842 #ifdef INT_COAL
4843         ha->coal_stat = pci_alloc_consistent(ha->pdev,
4844                         sizeof(gdth_coal_status) * MAXOFFSETS,
4845                         &scratch_dma_handle);
4846         if (!ha->coal_stat)
4847                 goto out_free_pmsg;
4848         ha->coal_stat_phys = scratch_dma_handle;
4849 #endif
4850
4851         ha->ccb_phys = pci_map_single(ha->pdev,ha->pccb,
4852                         sizeof(gdth_cmd_str), PCI_DMA_BIDIRECTIONAL);
4853         if (!ha->ccb_phys)
4854                 goto out_free_coal_stat;
4855
4856         ha->scratch_busy = FALSE;
4857         ha->req_first = NULL;
4858         ha->tid_cnt = MAX_HDRIVES;
4859         if (max_ids > 0 && max_ids < ha->tid_cnt)
4860                 ha->tid_cnt = max_ids;
4861         for (i = 0; i < GDTH_MAXCMDS; ++i)
4862                 ha->cmd_tab[i].cmnd = UNUSED_CMND;
4863         ha->scan_mode = rescan ? 0x10 : 0;
4864
4865         if (!gdth_search_drives(ha)) {
4866                 printk("GDT-EISA: Error during device scan\n");
4867                 error = -ENODEV;
4868                 goto out_free_ccb_phys;
4869         }
4870
4871         if (hdr_channel < 0 || hdr_channel > ha->bus_cnt)
4872                 hdr_channel = ha->bus_cnt;
4873         ha->virt_bus = hdr_channel;
4874
4875         if (ha->cache_feat & ha->raw_feat & ha->screen_feat & GDT_64BIT)
4876                 shp->max_cmd_len = 16;
4877
4878         shp->max_id      = ha->tid_cnt;
4879         shp->max_lun     = MAXLUN;
4880         shp->max_channel = ha->bus_cnt;
4881
4882         spin_lock_init(&ha->smp_lock);
4883         gdth_enable_int(ha);
4884
4885         error = scsi_add_host(shp, NULL);
4886         if (error)
4887                 goto out_free_coal_stat;
4888         list_add_tail(&ha->list, &gdth_instances);
4889         gdth_timer_init();
4890
4891         scsi_scan_host(shp);
4892
4893         return 0;
4894
4895  out_free_ccb_phys:
4896         pci_unmap_single(ha->pdev,ha->ccb_phys, sizeof(gdth_cmd_str),
4897                         PCI_DMA_BIDIRECTIONAL);
4898  out_free_coal_stat:
4899 #ifdef INT_COAL
4900         pci_free_consistent(ha->pdev, sizeof(gdth_coal_status) * MAXOFFSETS,
4901                                 ha->coal_stat, ha->coal_stat_phys);
4902  out_free_pmsg:
4903 #endif
4904         pci_free_consistent(ha->pdev, sizeof(gdth_msg_str),
4905                                 ha->pmsg, ha->msg_phys);
4906  out_free_pscratch:
4907         pci_free_consistent(ha->pdev, GDTH_SCRATCH,
4908                                 ha->pscratch, ha->scratch_phys);
4909  out_free_irq:
4910         free_irq(ha->irq, ha);
4911         gdth_ctr_count--;
4912  out_host_put:
4913         scsi_host_put(shp);
4914         return error;
4915 }
4916 #endif /* CONFIG_EISA */
4917
4918 #ifdef CONFIG_PCI
4919 static int gdth_pci_probe_one(gdth_pci_str *pcistr,
4920                              gdth_ha_str **ha_out)
4921 {
4922         struct Scsi_Host *shp;
4923         gdth_ha_str *ha;
4924         dma_addr_t scratch_dma_handle = 0;
4925         int error, i;
4926         struct pci_dev *pdev = pcistr->pdev;
4927
4928         *ha_out = NULL;
4929
4930         shp = scsi_host_alloc(&gdth_template, sizeof(gdth_ha_str));
4931         if (!shp)
4932                 return -ENOMEM;
4933         ha = shost_priv(shp);
4934
4935         error = -ENODEV;
4936         if (!gdth_init_pci(pdev, pcistr, ha))
4937                 goto out_host_put;
4938
4939         /* controller found and initialized */
4940         printk("Configuring GDT-PCI HA at %d/%d IRQ %u\n",
4941                 pdev->bus->number,
4942                 PCI_SLOT(pdev->devfn),
4943                 ha->irq);
4944
4945         error = request_irq(ha->irq, gdth_interrupt,
4946                                 IRQF_DISABLED|IRQF_SHARED, "gdth", ha);
4947         if (error) {
4948                 printk("GDT-PCI: Unable to allocate IRQ\n");
4949                 goto out_host_put;
4950         }
4951
4952         shp->unchecked_isa_dma = 0;
4953         shp->irq = ha->irq;
4954         shp->dma_channel = 0xff;
4955
4956         ha->hanum = gdth_ctr_count++;
4957         ha->shost = shp;
4958
4959         ha->pccb = &ha->cmdext;
4960         ha->ccb_phys = 0L;
4961
4962         error = -ENOMEM;
4963
4964         ha->pscratch = pci_alloc_consistent(ha->pdev, GDTH_SCRATCH,
4965                                                 &scratch_dma_handle);
4966         if (!ha->pscratch)
4967                 goto out_free_irq;
4968         ha->scratch_phys = scratch_dma_handle;
4969
4970         ha->pmsg = pci_alloc_consistent(ha->pdev, sizeof(gdth_msg_str),
4971                                         &scratch_dma_handle);
4972         if (!ha->pmsg)
4973                 goto out_free_pscratch;
4974         ha->msg_phys = scratch_dma_handle;
4975
4976 #ifdef INT_COAL
4977         ha->coal_stat = pci_alloc_consistent(ha->pdev,
4978                         sizeof(gdth_coal_status) * MAXOFFSETS,
4979                         &scratch_dma_handle);
4980         if (!ha->coal_stat)
4981                 goto out_free_pmsg;
4982         ha->coal_stat_phys = scratch_dma_handle;
4983 #endif
4984
4985         ha->scratch_busy = FALSE;
4986         ha->req_first = NULL;
4987         ha->tid_cnt = pdev->device >= 0x200 ? MAXID : MAX_HDRIVES;
4988         if (max_ids > 0 && max_ids < ha->tid_cnt)
4989                 ha->tid_cnt = max_ids;
4990         for (i = 0; i < GDTH_MAXCMDS; ++i)
4991                 ha->cmd_tab[i].cmnd = UNUSED_CMND;
4992         ha->scan_mode = rescan ? 0x10 : 0;
4993
4994         error = -ENODEV;
4995         if (!gdth_search_drives(ha)) {
4996                 printk("GDT-PCI %d: Error during device scan\n", ha->hanum);
4997                 goto out_free_coal_stat;
4998         }
4999
5000         if (hdr_channel < 0 || hdr_channel > ha->bus_cnt)
5001                 hdr_channel = ha->bus_cnt;
5002         ha->virt_bus = hdr_channel;
5003
5004         /* 64-bit DMA only supported from FW >= x.43 */
5005         if (!(ha->cache_feat & ha->raw_feat & ha->screen_feat & GDT_64BIT) ||
5006             !ha->dma64_support) {
5007                 if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
5008                         printk(KERN_WARNING "GDT-PCI %d: "
5009                                 "Unable to set 32-bit DMA\n", ha->hanum);
5010                                 goto out_free_coal_stat;
5011                 }
5012         } else {
5013                 shp->max_cmd_len = 16;
5014                 if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)) {
5015                         printk("GDT-PCI %d: 64-bit DMA enabled\n", ha->hanum);
5016                 } else if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
5017                         printk(KERN_WARNING "GDT-PCI %d: "
5018                                 "Unable to set 64/32-bit DMA\n", ha->hanum);
5019                         goto out_free_coal_stat;
5020                 }
5021         }
5022
5023         shp->max_id      = ha->tid_cnt;
5024         shp->max_lun     = MAXLUN;
5025         shp->max_channel = ha->bus_cnt;
5026
5027         spin_lock_init(&ha->smp_lock);
5028         gdth_enable_int(ha);
5029
5030         error = scsi_add_host(shp, &pdev->dev);
5031         if (error)
5032                 goto out_free_coal_stat;
5033         list_add_tail(&ha->list, &gdth_instances);
5034
5035         pci_set_drvdata(ha->pdev, ha);
5036         gdth_timer_init();
5037
5038         scsi_scan_host(shp);
5039
5040         *ha_out = ha;
5041
5042         return 0;
5043
5044  out_free_coal_stat:
5045 #ifdef INT_COAL
5046         pci_free_consistent(ha->pdev, sizeof(gdth_coal_status) * MAXOFFSETS,
5047                                 ha->coal_stat, ha->coal_stat_phys);
5048  out_free_pmsg:
5049 #endif
5050         pci_free_consistent(ha->pdev, sizeof(gdth_msg_str),
5051                                 ha->pmsg, ha->msg_phys);
5052  out_free_pscratch:
5053         pci_free_consistent(ha->pdev, GDTH_SCRATCH,
5054                                 ha->pscratch, ha->scratch_phys);
5055  out_free_irq:
5056         free_irq(ha->irq, ha);
5057         gdth_ctr_count--;
5058  out_host_put:
5059         scsi_host_put(shp);
5060         return error;
5061 }
5062 #endif /* CONFIG_PCI */
5063
5064 static void gdth_remove_one(gdth_ha_str *ha)
5065 {
5066         struct Scsi_Host *shp = ha->shost;
5067
5068         TRACE2(("gdth_remove_one()\n"));
5069
5070         scsi_remove_host(shp);
5071
5072         gdth_flush(ha);
5073
5074         if (ha->sdev) {
5075                 scsi_free_host_dev(ha->sdev);
5076                 ha->sdev = NULL;
5077         }
5078
5079         if (shp->irq)
5080                 free_irq(shp->irq,ha);
5081
5082 #ifdef CONFIG_ISA
5083         if (shp->dma_channel != 0xff)
5084                 free_dma(shp->dma_channel);
5085 #endif
5086 #ifdef INT_COAL
5087         if (ha->coal_stat)
5088                 pci_free_consistent(ha->pdev, sizeof(gdth_coal_status) *
5089                         MAXOFFSETS, ha->coal_stat, ha->coal_stat_phys);
5090 #endif
5091         if (ha->pscratch)
5092                 pci_free_consistent(ha->pdev, GDTH_SCRATCH,
5093                         ha->pscratch, ha->scratch_phys);
5094         if (ha->pmsg)
5095                 pci_free_consistent(ha->pdev, sizeof(gdth_msg_str),
5096                         ha->pmsg, ha->msg_phys);
5097         if (ha->ccb_phys)
5098                 pci_unmap_single(ha->pdev,ha->ccb_phys,
5099                         sizeof(gdth_cmd_str),PCI_DMA_BIDIRECTIONAL);
5100
5101         scsi_host_put(shp);
5102 }
5103
5104 static int gdth_halt(struct notifier_block *nb, ulong event, void *buf)
5105 {
5106         gdth_ha_str *ha;
5107
5108         TRACE2(("gdth_halt() event %d\n", (int)event));
5109         if (event != SYS_RESTART && event != SYS_HALT && event != SYS_POWER_OFF)
5110                 return NOTIFY_DONE;
5111
5112         list_for_each_entry(ha, &gdth_instances, list)
5113                 gdth_flush(ha);
5114
5115         return NOTIFY_OK;
5116 }
5117
5118 static struct notifier_block gdth_notifier = {
5119     gdth_halt, NULL, 0
5120 };
5121
5122 static int __init gdth_init(void)
5123 {
5124         if (disable) {
5125                 printk("GDT-HA: Controller driver disabled from"
5126                        " command line !\n");
5127                 return 0;
5128         }
5129
5130         printk("GDT-HA: Storage RAID Controller Driver. Version: %s\n",
5131                GDTH_VERSION_STR);
5132
5133         /* initializations */
5134         gdth_polling = TRUE;
5135         gdth_clear_events();
5136         init_timer(&gdth_timer);
5137
5138         /* As default we do not probe for EISA or ISA controllers */
5139         if (probe_eisa_isa) {
5140                 /* scanning for controllers, at first: ISA controller */
5141 #ifdef CONFIG_ISA
5142                 ulong32 isa_bios;
5143                 for (isa_bios = 0xc8000UL; isa_bios <= 0xd8000UL;
5144                                 isa_bios += 0x8000UL)
5145                         gdth_isa_probe_one(isa_bios);
5146 #endif
5147 #ifdef CONFIG_EISA
5148                 {
5149                         ushort eisa_slot;
5150                         for (eisa_slot = 0x1000; eisa_slot <= 0x8000;
5151                                                  eisa_slot += 0x1000)
5152                                 gdth_eisa_probe_one(eisa_slot);
5153                 }
5154 #endif
5155         }
5156
5157 #ifdef CONFIG_PCI
5158         /* scanning for PCI controllers */
5159         if (pci_register_driver(&gdth_pci_driver)) {
5160                 gdth_ha_str *ha;
5161
5162                 list_for_each_entry(ha, &gdth_instances, list)
5163                         gdth_remove_one(ha);
5164                 return -ENODEV;
5165         }
5166 #endif /* CONFIG_PCI */
5167
5168         TRACE2(("gdth_detect() %d controller detected\n", gdth_ctr_count));
5169
5170         major = register_chrdev(0,"gdth", &gdth_fops);
5171         register_reboot_notifier(&gdth_notifier);
5172         gdth_polling = FALSE;
5173         return 0;
5174 }
5175
5176 static void __exit gdth_exit(void)
5177 {
5178         gdth_ha_str *ha;
5179
5180         unregister_chrdev(major, "gdth");
5181         unregister_reboot_notifier(&gdth_notifier);
5182
5183 #ifdef GDTH_STATISTICS
5184         del_timer_sync(&gdth_timer);
5185 #endif
5186
5187 #ifdef CONFIG_PCI
5188         pci_unregister_driver(&gdth_pci_driver);
5189 #endif
5190
5191         list_for_each_entry(ha, &gdth_instances, list)
5192                 gdth_remove_one(ha);
5193 }
5194
5195 module_init(gdth_init);
5196 module_exit(gdth_exit);
5197
5198 #ifndef MODULE
5199 __setup("gdth=", option_setup);
5200 #endif