2 * Copyright (c) 2005-2010 Brocade Communications Systems, Inc.
6 * Linux driver for Brocade Fibre Channel Host Bus Adapter.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License (GPL) Version 2 as
10 * published by the Free Software Foundation
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
22 #include "bfa_defs_svc.h"
26 /* Per dma segment max size */
27 #define BFI_MEM_DMA_SEG_SZ (131072)
29 /* Get number of dma segments required */
30 #define BFI_MEM_DMA_NSEGS(_num_reqs, _req_sz) \
31 ((u16)(((((_num_reqs) * (_req_sz)) + BFI_MEM_DMA_SEG_SZ - 1) & \
32 ~(BFI_MEM_DMA_SEG_SZ - 1)) / BFI_MEM_DMA_SEG_SZ))
34 /* Get num dma reqs - that fit in a segment */
35 #define BFI_MEM_NREQS_SEG(_rqsz) (BFI_MEM_DMA_SEG_SZ / (_rqsz))
37 /* Get segment num from tag */
38 #define BFI_MEM_SEG_FROM_TAG(_tag, _rqsz) ((_tag) / BFI_MEM_NREQS_SEG(_rqsz))
40 /* Get dma req offset in a segment */
41 #define BFI_MEM_SEG_REQ_OFFSET(_tag, _sz) \
42 ((_tag) - (BFI_MEM_SEG_FROM_TAG(_tag, _sz) * BFI_MEM_NREQS_SEG(_sz)))
47 #define BFI_FLASH_CHUNK_SZ 256 /* Flash chunk size */
48 #define BFI_FLASH_CHUNK_SZ_WORDS (BFI_FLASH_CHUNK_SZ/sizeof(u32))
51 * Msg header common to all msgs
54 u8 msg_class; /* @ref bfi_mclass_t */
55 u8 msg_id; /* msg opcode with in the class */
59 u8 fn_lpu; /* msg destination */
61 u16 i2htok; /* token in msgs to host */
65 #define bfi_fn_lpu(__fn, __lpu) ((__fn) << 1 | (__lpu))
66 #define bfi_mhdr_2_fn(_mh) ((_mh)->mtag.h2i.fn_lpu >> 1)
68 #define bfi_h2i_set(_mh, _mc, _op, _fn_lpu) do { \
69 (_mh).msg_class = (_mc); \
70 (_mh).msg_id = (_op); \
71 (_mh).mtag.h2i.fn_lpu = (_fn_lpu); \
74 #define bfi_i2h_set(_mh, _mc, _op, _i2htok) do { \
75 (_mh).msg_class = (_mc); \
76 (_mh).msg_id = (_op); \
77 (_mh).mtag.i2htok = (_i2htok); \
81 * Message opcodes: 0-127 to firmware, 128-255 to host
83 #define BFI_I2H_OPCODE_BASE 128
84 #define BFA_I2HM(_x) ((_x) + BFI_I2H_OPCODE_BASE)
87 ****************************************************************************
89 * Scatter Gather Element and Page definition
91 ****************************************************************************
94 #define BFI_SGE_INLINE 1
95 #define BFI_SGE_INLINE_MAX (BFI_SGE_INLINE + 1)
101 BFI_SGE_DATA = 0, /* data address, not last */
102 BFI_SGE_DATA_CPL = 1, /* data addr, last in current page */
103 BFI_SGE_DATA_LAST = 3, /* data address, last */
104 BFI_SGE_LINK = 2, /* link address */
105 BFI_SGE_PGDLEN = 2, /* cumulative data length for page */
119 * Scatter Gather Element used for fast-path IO requests
131 union bfi_addr_u sga;
135 * Generic DMA addr-len pair.
138 union bfi_addr_u al_addr; /* DMA addr of buffer */
139 u32 al_len; /* length of buffer */
143 * Scatter Gather Page
145 #define BFI_SGPG_DATA_SGES 7
146 #define BFI_SGPG_SGES_MAX (BFI_SGPG_DATA_SGES + 1)
147 #define BFI_SGPG_RSVD_WD_LEN 8
149 struct bfi_sge_s sges[BFI_SGPG_SGES_MAX];
150 u32 rsvd[BFI_SGPG_RSVD_WD_LEN];
153 /* FCP module definitions */
154 #define BFI_IO_MAX (2000)
155 #define BFI_IOIM_SNSLEN (256)
156 #define BFI_IOIM_SNSBUF_SEGS \
157 BFI_MEM_DMA_NSEGS(BFI_IO_MAX, BFI_IOIM_SNSLEN)
160 * Large Message structure - 128 Bytes size Msgs
162 #define BFI_LMSG_SZ 128
163 #define BFI_LMSG_PL_WSZ \
164 ((BFI_LMSG_SZ - sizeof(struct bfi_mhdr_s)) / 4)
167 struct bfi_mhdr_s mhdr;
168 u32 pl[BFI_LMSG_PL_WSZ];
172 * Mailbox message structure
174 #define BFI_MBMSG_SZ 7
176 struct bfi_mhdr_s mh;
177 u32 pl[BFI_MBMSG_SZ];
181 * Supported PCI function class codes (personality)
183 enum bfi_pcifn_class {
184 BFI_PCIFN_CLASS_FC = 0x0c04,
185 BFI_PCIFN_CLASS_ETH = 0x0200,
192 BFI_MC_IOC = 1, /* IO Controller (IOC) */
193 BFI_MC_CEE = 4, /* CEE */
194 BFI_MC_FCPORT = 5, /* FC port */
195 BFI_MC_IOCFC = 6, /* FC - IO Controller (IOC) */
196 BFI_MC_ABLK = 7, /* ASIC block configuration */
197 BFI_MC_UF = 8, /* Unsolicited frame receive */
198 BFI_MC_FCXP = 9, /* FC Transport */
199 BFI_MC_LPS = 10, /* lport fc login services */
200 BFI_MC_RPORT = 11, /* Remote port */
201 BFI_MC_ITN = 12, /* I-T nexus (Initiator mode) */
202 BFI_MC_IOIM_READ = 13, /* read IO (Initiator mode) */
203 BFI_MC_IOIM_WRITE = 14, /* write IO (Initiator mode) */
204 BFI_MC_IOIM_IO = 15, /* IO (Initiator mode) */
205 BFI_MC_IOIM = 16, /* IO (Initiator mode) */
206 BFI_MC_IOIM_IOCOM = 17, /* good IO completion */
207 BFI_MC_TSKIM = 18, /* Initiator Task management */
208 BFI_MC_PORT = 21, /* Physical port */
212 #define BFI_IOC_MAX_CQS 4
213 #define BFI_IOC_MAX_CQS_ASIC 8
214 #define BFI_IOC_MSGLEN_MAX 32 /* 32 bytes */
217 *----------------------------------------------------------------------
219 *----------------------------------------------------------------------
223 * Different asic generations
226 BFI_ASIC_GEN_CB = 1, /* crossbow 8G FC */
227 BFI_ASIC_GEN_CT = 2, /* catapult 8G FC or 10G CNA */
228 BFI_ASIC_GEN_CT2 = 3, /* catapult-2 16G FC or 10G CNA */
232 BFI_ASIC_MODE_FC = 1, /* FC upto 8G speed */
233 BFI_ASIC_MODE_FC16 = 2, /* FC upto 16G speed */
234 BFI_ASIC_MODE_ETH = 3, /* Ethernet ports */
235 BFI_ASIC_MODE_COMBO = 4, /* FC 16G and Ethernet 10G port */
238 enum bfi_ioc_h2i_msgs {
239 BFI_IOC_H2I_ENABLE_REQ = 1,
240 BFI_IOC_H2I_DISABLE_REQ = 2,
241 BFI_IOC_H2I_GETATTR_REQ = 3,
242 BFI_IOC_H2I_DBG_SYNC = 4,
243 BFI_IOC_H2I_DBG_DUMP = 5,
246 enum bfi_ioc_i2h_msgs {
247 BFI_IOC_I2H_ENABLE_REPLY = BFA_I2HM(1),
248 BFI_IOC_I2H_DISABLE_REPLY = BFA_I2HM(2),
249 BFI_IOC_I2H_GETATTR_REPLY = BFA_I2HM(3),
250 BFI_IOC_I2H_HBEAT = BFA_I2HM(4),
251 BFI_IOC_I2H_ACQ_ADDR_REPLY = BFA_I2HM(5),
255 * BFI_IOC_H2I_GETATTR_REQ message
257 struct bfi_ioc_getattr_req_s {
258 struct bfi_mhdr_s mh;
259 union bfi_addr_u attr_addr;
262 struct bfi_ioc_attr_s {
263 wwn_t mfg_pwwn; /* Mfg port wwn */
264 wwn_t mfg_nwwn; /* Mfg node wwn */
265 mac_t mfg_mac; /* Mfg mac */
266 u8 port_mode; /* bfi_port_mode */
270 mac_t mac; /* PBC or Mfg mac */
274 char brcd_serialnum[STRSZ(BFA_MFG_SERIALNUM_SIZE)];
278 u8 rx_bbcredit; /* receive buffer credits */
279 u32 adapter_prop; /* adapter properties */
280 u16 maxfrsize; /* max receive frame size */
283 char fw_version[BFA_VERSION_LEN];
284 char optrom_version[BFA_VERSION_LEN];
285 struct bfa_mfg_vpd_s vpd;
286 u32 card_type; /* card type */
290 * BFI_IOC_I2H_GETATTR_REPLY message
292 struct bfi_ioc_getattr_reply_s {
293 struct bfi_mhdr_s mh; /* Common msg header */
294 u8 status; /* cfg reply status */
299 * Firmware memory page offsets
301 #define BFI_IOC_SMEM_PG0_CB (0x40)
302 #define BFI_IOC_SMEM_PG0_CT (0x180)
305 * Firmware statistic offset
307 #define BFI_IOC_FWSTATS_OFF (0x6B40)
308 #define BFI_IOC_FWSTATS_SZ (4096)
311 * Firmware trace offset
313 #define BFI_IOC_TRC_OFF (0x4b00)
314 #define BFI_IOC_TRC_ENTS 256
316 #define BFI_IOC_FW_SIGNATURE (0xbfadbfad)
317 #define BFI_IOC_MD5SUM_SZ 4
318 struct bfi_ioc_image_hdr_s {
319 u32 signature; /* constant signature */
320 u8 asic_gen; /* asic generation */
322 u8 port0_mode; /* device mode for port 0 */
323 u8 port1_mode; /* device mode for port 1 */
324 u32 exec; /* exec vector */
325 u32 bootenv; /* fimware boot env */
327 u32 md5sum[BFI_IOC_MD5SUM_SZ];
330 #define BFI_FWBOOT_DEVMODE_OFF 4
331 #define BFI_FWBOOT_TYPE_OFF 8
332 #define BFI_FWBOOT_ENV_OFF 12
333 #define BFI_FWBOOT_DEVMODE(__asic_gen, __asic_mode, __p0_mode, __p1_mode) \
334 (((u32)(__asic_gen)) << 24 | \
335 ((u32)(__asic_mode)) << 16 | \
336 ((u32)(__p0_mode)) << 8 | \
339 #define BFI_FWBOOT_TYPE_NORMAL 0
340 #define BFI_FWBOOT_TYPE_MEMTEST 1
341 #define BFI_FWBOOT_ENV_OS 0
344 BFI_PORT_MODE_FC = 1,
345 BFI_PORT_MODE_ETH = 2,
348 struct bfi_ioc_hbeat_s {
349 struct bfi_mhdr_s mh; /* common msg header */
350 u32 hb_count; /* current heart beat count */
354 * IOC hardware/firmware state
357 BFI_IOC_UNINIT = 0, /* not initialized */
358 BFI_IOC_INITING = 1, /* h/w is being initialized */
359 BFI_IOC_HWINIT = 2, /* h/w is initialized */
360 BFI_IOC_CFG = 3, /* IOC configuration in progress */
361 BFI_IOC_OP = 4, /* IOC is operational */
362 BFI_IOC_DISABLING = 5, /* IOC is being disabled */
363 BFI_IOC_DISABLED = 6, /* IOC is disabled */
364 BFI_IOC_CFG_DISABLED = 7, /* IOC is being disabled;transient */
365 BFI_IOC_FAIL = 8, /* IOC heart-beat failure */
366 BFI_IOC_MEMTEST = 9, /* IOC is doing memtest */
369 #define BFI_IOC_ENDIAN_SIG 0x12345678
372 BFI_ADAPTER_TYPE_FC = 0x01, /* FC adapters */
373 BFI_ADAPTER_TYPE_MK = 0x0f0000, /* adapter type mask */
374 BFI_ADAPTER_TYPE_SH = 16, /* adapter type shift */
375 BFI_ADAPTER_NPORTS_MK = 0xff00, /* number of ports mask */
376 BFI_ADAPTER_NPORTS_SH = 8, /* number of ports shift */
377 BFI_ADAPTER_SPEED_MK = 0xff, /* adapter speed mask */
378 BFI_ADAPTER_SPEED_SH = 0, /* adapter speed shift */
379 BFI_ADAPTER_PROTO = 0x100000, /* prototype adapaters */
380 BFI_ADAPTER_TTV = 0x200000, /* TTV debug capable */
381 BFI_ADAPTER_UNSUPP = 0x400000, /* unknown adapter type */
384 #define BFI_ADAPTER_GETP(__prop, __adap_prop) \
385 (((__adap_prop) & BFI_ADAPTER_ ## __prop ## _MK) >> \
386 BFI_ADAPTER_ ## __prop ## _SH)
387 #define BFI_ADAPTER_SETP(__prop, __val) \
388 ((__val) << BFI_ADAPTER_ ## __prop ## _SH)
389 #define BFI_ADAPTER_IS_PROTO(__adap_type) \
390 ((__adap_type) & BFI_ADAPTER_PROTO)
391 #define BFI_ADAPTER_IS_TTV(__adap_type) \
392 ((__adap_type) & BFI_ADAPTER_TTV)
393 #define BFI_ADAPTER_IS_UNSUPP(__adap_type) \
394 ((__adap_type) & BFI_ADAPTER_UNSUPP)
395 #define BFI_ADAPTER_IS_SPECIAL(__adap_type) \
396 ((__adap_type) & (BFI_ADAPTER_TTV | BFI_ADAPTER_PROTO | \
400 * BFI_IOC_H2I_ENABLE_REQ & BFI_IOC_H2I_DISABLE_REQ messages
402 struct bfi_ioc_ctrl_req_s {
403 struct bfi_mhdr_s mh;
408 #define bfi_ioc_enable_req_t struct bfi_ioc_ctrl_req_s;
409 #define bfi_ioc_disable_req_t struct bfi_ioc_ctrl_req_s;
412 * BFI_IOC_I2H_ENABLE_REPLY & BFI_IOC_I2H_DISABLE_REPLY messages
414 struct bfi_ioc_ctrl_reply_s {
415 struct bfi_mhdr_s mh; /* Common msg header */
416 u8 status; /* enable/disable status */
417 u8 port_mode; /* bfa_mode_s */
418 u8 cap_bm; /* capability bit mask */
421 #define bfi_ioc_enable_reply_t struct bfi_ioc_ctrl_reply_s;
422 #define bfi_ioc_disable_reply_t struct bfi_ioc_ctrl_reply_s;
424 #define BFI_IOC_MSGSZ 8
428 union bfi_ioc_h2i_msg_u {
429 struct bfi_mhdr_s mh;
430 struct bfi_ioc_ctrl_req_s enable_req;
431 struct bfi_ioc_ctrl_req_s disable_req;
432 struct bfi_ioc_getattr_req_s getattr_req;
433 u32 mboxmsg[BFI_IOC_MSGSZ];
439 union bfi_ioc_i2h_msg_u {
440 struct bfi_mhdr_s mh;
441 struct bfi_ioc_ctrl_reply_s fw_event;
442 u32 mboxmsg[BFI_IOC_MSGSZ];
447 *----------------------------------------------------------------------
449 *----------------------------------------------------------------------
452 #define BFI_PBC_MAX_BLUNS 8
453 #define BFI_PBC_MAX_VPORTS 16
454 #define BFI_PBC_PORT_DISABLED 2
457 * PBC boot lun configuration
459 struct bfi_pbc_blun_s {
461 struct scsi_lun tgt_lun;
465 * PBC virtual port configuration
467 struct bfi_pbc_vport_s {
473 * BFI pre-boot configuration information
485 struct bfi_pbc_blun_s blun[BFI_PBC_MAX_BLUNS];
486 struct bfi_pbc_vport_s vport[BFI_PBC_MAX_VPORTS];
490 *----------------------------------------------------------------------
492 *----------------------------------------------------------------------
494 #define BFI_MSGQ_FULL(_q) (((_q->pi + 1) % _q->q_depth) == _q->ci)
495 #define BFI_MSGQ_EMPTY(_q) (_q->pi == _q->ci)
496 #define BFI_MSGQ_UPDATE_CI(_q) (_q->ci = (_q->ci + 1) % _q->q_depth)
497 #define BFI_MSGQ_UPDATE_PI(_q) (_q->pi = (_q->pi + 1) % _q->q_depth)
499 /* q_depth must be power of 2 */
500 #define BFI_MSGQ_FREE_CNT(_q) ((_q->ci - _q->pi - 1) & (_q->q_depth - 1))
502 enum bfi_msgq_h2i_msgs_e {
503 BFI_MSGQ_H2I_INIT_REQ = 1,
504 BFI_MSGQ_H2I_DOORBELL = 2,
505 BFI_MSGQ_H2I_SHUTDOWN = 3,
508 enum bfi_msgq_i2h_msgs_e {
509 BFI_MSGQ_I2H_INIT_RSP = 1,
510 BFI_MSGQ_I2H_DOORBELL = 2,
514 /* Messages(commands/responsed/AENS will have the following header */
515 struct bfi_msgq_mhdr_s {
524 #define bfi_msgq_mhdr_set(_mh, _mc, _mid, _tok, _enet_id) do { \
525 (_mh).msg_class = (_mc); \
526 (_mh).msg_id = (_mid); \
527 (_mh).msg_token = (_tok); \
528 (_mh).enet_id = (_enet_id); \
532 * Mailbox for messaging interface
535 #define BFI_MSGQ_CMD_ENTRY_SIZE (64) /* TBD */
536 #define BFI_MSGQ_RSP_ENTRY_SIZE (64) /* TBD */
537 #define BFI_MSGQ_MSG_SIZE_MAX (2048) /* TBD */
540 union bfi_addr_u addr;
541 u16 q_depth; /* Total num of entries in the queue */
545 /* BFI_ENET_MSGQ_CFG_REQ TBD init or cfg? */
546 struct bfi_msgq_cfg_req_s {
547 struct bfi_mhdr_s mh;
548 struct bfi_msgq_s cmdq;
549 struct bfi_msgq_s rspq;
552 /* BFI_ENET_MSGQ_CFG_RSP */
553 struct bfi_msgq_cfg_rsp_s {
554 struct bfi_mhdr_s mh;
560 /* BFI_MSGQ_H2I_DOORBELL */
561 struct bfi_msgq_h2i_db_s {
562 struct bfi_mhdr_s mh;
567 /* BFI_MSGQ_I2H_DOORBELL */
568 struct bfi_msgq_i2h_db_s {
569 struct bfi_mhdr_s mh;
576 /* BFI port specific */
580 BFI_PORT_H2I_ENABLE_REQ = (1),
581 BFI_PORT_H2I_DISABLE_REQ = (2),
582 BFI_PORT_H2I_GET_STATS_REQ = (3),
583 BFI_PORT_H2I_CLEAR_STATS_REQ = (4),
587 BFI_PORT_I2H_ENABLE_RSP = BFA_I2HM(1),
588 BFI_PORT_I2H_DISABLE_RSP = BFA_I2HM(2),
589 BFI_PORT_I2H_GET_STATS_RSP = BFA_I2HM(3),
590 BFI_PORT_I2H_CLEAR_STATS_RSP = BFA_I2HM(4),
596 struct bfi_port_generic_req_s {
597 struct bfi_mhdr_s mh; /* msg header */
598 u32 msgtag; /* msgtag for reply */
605 struct bfi_port_generic_rsp_s {
606 struct bfi_mhdr_s mh; /* common msg header */
607 u8 status; /* port enable status */
609 u32 msgtag; /* msgtag for reply */
613 * BFI_PORT_H2I_GET_STATS_REQ
615 struct bfi_port_get_stats_req_s {
616 struct bfi_mhdr_s mh; /* common msg header */
617 union bfi_addr_u dma_addr;
620 union bfi_port_h2i_msg_u {
621 struct bfi_mhdr_s mh;
622 struct bfi_port_generic_req_s enable_req;
623 struct bfi_port_generic_req_s disable_req;
624 struct bfi_port_get_stats_req_s getstats_req;
625 struct bfi_port_generic_req_s clearstats_req;
628 union bfi_port_i2h_msg_u {
629 struct bfi_mhdr_s mh;
630 struct bfi_port_generic_rsp_s enable_rsp;
631 struct bfi_port_generic_rsp_s disable_rsp;
632 struct bfi_port_generic_rsp_s getstats_rsp;
633 struct bfi_port_generic_rsp_s clearstats_rsp;
637 *----------------------------------------------------------------------
639 *----------------------------------------------------------------------
641 enum bfi_ablk_h2i_msgs_e {
642 BFI_ABLK_H2I_QUERY = 1,
643 BFI_ABLK_H2I_ADPT_CONFIG = 2,
644 BFI_ABLK_H2I_PORT_CONFIG = 3,
645 BFI_ABLK_H2I_PF_CREATE = 4,
646 BFI_ABLK_H2I_PF_DELETE = 5,
647 BFI_ABLK_H2I_PF_UPDATE = 6,
648 BFI_ABLK_H2I_OPTROM_ENABLE = 7,
649 BFI_ABLK_H2I_OPTROM_DISABLE = 8,
652 enum bfi_ablk_i2h_msgs_e {
653 BFI_ABLK_I2H_QUERY = BFA_I2HM(BFI_ABLK_H2I_QUERY),
654 BFI_ABLK_I2H_ADPT_CONFIG = BFA_I2HM(BFI_ABLK_H2I_ADPT_CONFIG),
655 BFI_ABLK_I2H_PORT_CONFIG = BFA_I2HM(BFI_ABLK_H2I_PORT_CONFIG),
656 BFI_ABLK_I2H_PF_CREATE = BFA_I2HM(BFI_ABLK_H2I_PF_CREATE),
657 BFI_ABLK_I2H_PF_DELETE = BFA_I2HM(BFI_ABLK_H2I_PF_DELETE),
658 BFI_ABLK_I2H_PF_UPDATE = BFA_I2HM(BFI_ABLK_H2I_PF_UPDATE),
659 BFI_ABLK_I2H_OPTROM_ENABLE = BFA_I2HM(BFI_ABLK_H2I_OPTROM_ENABLE),
660 BFI_ABLK_I2H_OPTROM_DISABLE = BFA_I2HM(BFI_ABLK_H2I_OPTROM_DISABLE),
663 /* BFI_ABLK_H2I_QUERY */
664 struct bfi_ablk_h2i_query_s {
665 struct bfi_mhdr_s mh;
666 union bfi_addr_u addr;
669 /* BFI_ABL_H2I_ADPT_CONFIG, BFI_ABLK_H2I_PORT_CONFIG */
670 struct bfi_ablk_h2i_cfg_req_s {
671 struct bfi_mhdr_s mh;
679 * BFI_ABLK_H2I_PF_CREATE, BFI_ABLK_H2I_PF_DELETE,
681 struct bfi_ablk_h2i_pf_req_s {
682 struct bfi_mhdr_s mh;
689 /* BFI_ABLK_H2I_OPTROM_ENABLE, BFI_ABLK_H2I_OPTROM_DISABLE */
690 struct bfi_ablk_h2i_optrom_s {
691 struct bfi_mhdr_s mh;
696 * BFI_ABLK_I2H_PORT_CONFIG
697 * BFI_ABLK_I2H_PF_CREATE
698 * BFI_ABLK_I2H_PF_DELETE
699 * BFI_ABLK_I2H_PF_UPDATE
700 * BFI_ABLK_I2H_OPTROM_ENABLE
701 * BFI_ABLK_I2H_OPTROM_DISABLE
703 struct bfi_ablk_i2h_rsp_s {
704 struct bfi_mhdr_s mh;
712 * CEE module specific messages
715 /* Mailbox commands from host to firmware */
716 enum bfi_cee_h2i_msgs_e {
717 BFI_CEE_H2I_GET_CFG_REQ = 1,
718 BFI_CEE_H2I_RESET_STATS = 2,
719 BFI_CEE_H2I_GET_STATS_REQ = 3,
722 enum bfi_cee_i2h_msgs_e {
723 BFI_CEE_I2H_GET_CFG_RSP = BFA_I2HM(1),
724 BFI_CEE_I2H_RESET_STATS_RSP = BFA_I2HM(2),
725 BFI_CEE_I2H_GET_STATS_RSP = BFA_I2HM(3),
729 * H2I command structure for resetting the stats
731 struct bfi_cee_reset_stats_s {
732 struct bfi_mhdr_s mh;
736 * Get configuration command from host
738 struct bfi_cee_get_req_s {
739 struct bfi_mhdr_s mh;
740 union bfi_addr_u dma_addr;
744 * Reply message from firmware
746 struct bfi_cee_get_rsp_s {
747 struct bfi_mhdr_s mh;
753 * Reply message from firmware
755 struct bfi_cee_stats_rsp_s {
756 struct bfi_mhdr_s mh;
761 /* Mailbox message structures from firmware to host */
762 union bfi_cee_i2h_msg_u {
763 struct bfi_mhdr_s mh;
764 struct bfi_cee_get_rsp_s get_rsp;
765 struct bfi_cee_stats_rsp_s stats_rsp;
770 #endif /* __BFI_H__ */