2 * Copyright (c) 2005-2010 Brocade Communications Systems, Inc.
6 * Linux driver for Brocade Fibre Channel Host Bus Adapter.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License (GPL) Version 2 as
10 * published by the Free Software Foundation
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
19 #include "bfa_modules.h"
22 BFA_TRC_FILE(HAL, IOCFC_CT);
25 * Dummy interrupt handler for handling spurious interrupt during chip-reinit.
28 bfa_hwct_msix_dummy(struct bfa_s *bfa, int vec)
33 bfa_hwct_reginit(struct bfa_s *bfa)
35 struct bfa_iocfc_regs_s *bfa_regs = &bfa->iocfc.bfa_regs;
36 void __iomem *kva = bfa_ioc_bar0(&bfa->ioc);
37 int fn = bfa_ioc_pcifn(&bfa->ioc);
40 bfa_regs->intr_status = (kva + HOSTFN0_INT_STATUS);
41 bfa_regs->intr_mask = (kva + HOSTFN0_INT_MSK);
43 bfa_regs->intr_status = (kva + HOSTFN1_INT_STATUS);
44 bfa_regs->intr_mask = (kva + HOSTFN1_INT_MSK);
49 bfa_hwct2_reginit(struct bfa_s *bfa)
51 struct bfa_iocfc_regs_s *bfa_regs = &bfa->iocfc.bfa_regs;
52 void __iomem *kva = bfa_ioc_bar0(&bfa->ioc);
54 bfa_regs->intr_status = (kva + CT2_HOSTFN_INT_STATUS);
55 bfa_regs->intr_mask = (kva + CT2_HOSTFN_INTR_MASK);
59 bfa_hwct_reqq_ack(struct bfa_s *bfa, int reqq)
63 r32 = readl(bfa->iocfc.bfa_regs.cpe_q_ctrl[reqq]);
64 writel(r32, bfa->iocfc.bfa_regs.cpe_q_ctrl[reqq]);
68 bfa_hwct_rspq_ack(struct bfa_s *bfa, int rspq)
72 r32 = readl(bfa->iocfc.bfa_regs.rme_q_ctrl[rspq]);
73 writel(r32, bfa->iocfc.bfa_regs.rme_q_ctrl[rspq]);
77 bfa_hwct_msix_getvecs(struct bfa_s *bfa, u32 *msix_vecs_bmap,
78 u32 *num_vecs, u32 *max_vec_bit)
80 *msix_vecs_bmap = (1 << BFI_MSIX_CT_MAX) - 1;
81 *max_vec_bit = (1 << (BFI_MSIX_CT_MAX - 1));
82 *num_vecs = BFI_MSIX_CT_MAX;
86 * Setup MSI-X vector for catapult
89 bfa_hwct_msix_init(struct bfa_s *bfa, int nvecs)
91 WARN_ON((nvecs != 1) && (nvecs != BFI_MSIX_CT_MAX));
94 bfa->msix.nvecs = nvecs;
95 bfa_hwct_msix_uninstall(bfa);
99 bfa_hwct_msix_ctrl_install(struct bfa_s *bfa)
101 if (bfa->msix.nvecs == 0)
104 if (bfa->msix.nvecs == 1)
105 bfa->msix.handler[BFI_MSIX_LPU_ERR_CT] = bfa_msix_all;
107 bfa->msix.handler[BFI_MSIX_LPU_ERR_CT] = bfa_msix_lpu_err;
111 bfa_hwct_msix_queue_install(struct bfa_s *bfa)
115 if (bfa->msix.nvecs == 0)
118 if (bfa->msix.nvecs == 1) {
119 for (i = BFI_MSIX_CPE_QMIN_CT; i < BFI_MSIX_CT_MAX; i++)
120 bfa->msix.handler[i] = bfa_msix_all;
124 for (i = BFI_MSIX_CPE_QMIN_CT; i <= BFI_MSIX_CPE_QMAX_CT; i++)
125 bfa->msix.handler[i] = bfa_msix_reqq;
127 for (i = BFI_MSIX_RME_QMIN_CT; i <= BFI_MSIX_RME_QMAX_CT; i++)
128 bfa->msix.handler[i] = bfa_msix_rspq;
132 bfa_hwct_msix_uninstall(struct bfa_s *bfa)
136 for (i = 0; i < BFI_MSIX_CT_MAX; i++)
137 bfa->msix.handler[i] = bfa_hwct_msix_dummy;
141 * Enable MSI-X vectors
144 bfa_hwct_isr_mode_set(struct bfa_s *bfa, bfa_boolean_t msix)
147 bfa_ioc_isr_mode_set(&bfa->ioc, msix);
151 bfa_hwct_msix_get_rme_range(struct bfa_s *bfa, u32 *start, u32 *end)
153 *start = BFI_MSIX_RME_QMIN_CT;
154 *end = BFI_MSIX_RME_QMAX_CT;