2 * drivers/s390/net/qeth_core_main.c
4 * Copyright IBM Corp. 2007, 2009
5 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
6 * Frank Pavlic <fpavlic@de.ibm.com>,
7 * Thomas Spatzier <tspat@de.ibm.com>,
8 * Frank Blaschka <frank.blaschka@de.ibm.com>
11 #define KMSG_COMPONENT "qeth"
12 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
14 #include <linux/module.h>
15 #include <linux/moduleparam.h>
16 #include <linux/string.h>
17 #include <linux/errno.h>
18 #include <linux/kernel.h>
20 #include <linux/tcp.h>
21 #include <linux/mii.h>
22 #include <linux/kthread.h>
23 #include <linux/slab.h>
25 #include <asm/ebcdic.h>
28 #include "qeth_core.h"
30 struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
31 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
33 [QETH_DBF_SETUP] = {"qeth_setup",
34 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
35 [QETH_DBF_QERR] = {"qeth_qerr",
36 2, 1, 8, 2, &debug_hex_ascii_view, NULL},
37 [QETH_DBF_TRACE] = {"qeth_trace",
38 4, 1, 8, 3, &debug_hex_ascii_view, NULL},
39 [QETH_DBF_MSG] = {"qeth_msg",
40 8, 1, 128, 3, &debug_sprintf_view, NULL},
41 [QETH_DBF_SENSE] = {"qeth_sense",
42 2, 1, 64, 2, &debug_hex_ascii_view, NULL},
43 [QETH_DBF_MISC] = {"qeth_misc",
44 2, 1, 256, 2, &debug_hex_ascii_view, NULL},
45 [QETH_DBF_CTRL] = {"qeth_control",
46 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
48 EXPORT_SYMBOL_GPL(qeth_dbf);
50 struct qeth_card_list_struct qeth_core_card_list;
51 EXPORT_SYMBOL_GPL(qeth_core_card_list);
52 struct kmem_cache *qeth_core_header_cache;
53 EXPORT_SYMBOL_GPL(qeth_core_header_cache);
55 static struct device *qeth_core_root_dev;
56 static unsigned int known_devices[][10] = QETH_MODELLIST_ARRAY;
57 static struct lock_class_key qdio_out_skb_queue_key;
59 static void qeth_send_control_data_cb(struct qeth_channel *,
60 struct qeth_cmd_buffer *);
61 static int qeth_issue_next_read(struct qeth_card *);
62 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
63 static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
64 static void qeth_free_buffer_pool(struct qeth_card *);
65 static int qeth_qdio_establish(struct qeth_card *);
68 static inline void __qeth_fill_buffer_frag(struct sk_buff *skb,
69 struct qdio_buffer *buffer, int is_tso,
70 int *next_element_to_fill)
72 struct skb_frag_struct *frag;
75 int element, cnt, dlen;
77 fragno = skb_shinfo(skb)->nr_frags;
78 element = *next_element_to_fill;
82 buffer->element[element].flags =
83 SBAL_FLAGS_MIDDLE_FRAG;
85 buffer->element[element].flags =
86 SBAL_FLAGS_FIRST_FRAG;
87 dlen = skb->len - skb->data_len;
89 buffer->element[element].addr = skb->data;
90 buffer->element[element].length = dlen;
93 for (cnt = 0; cnt < fragno; cnt++) {
94 frag = &skb_shinfo(skb)->frags[cnt];
95 addr = (page_to_pfn(frag->page) << PAGE_SHIFT) +
97 buffer->element[element].addr = (char *)addr;
98 buffer->element[element].length = frag->size;
99 if (cnt < (fragno - 1))
100 buffer->element[element].flags =
101 SBAL_FLAGS_MIDDLE_FRAG;
103 buffer->element[element].flags =
104 SBAL_FLAGS_LAST_FRAG;
107 *next_element_to_fill = element;
110 static inline const char *qeth_get_cardname(struct qeth_card *card)
112 if (card->info.guestlan) {
113 switch (card->info.type) {
114 case QETH_CARD_TYPE_OSAE:
115 return " Guest LAN QDIO";
116 case QETH_CARD_TYPE_IQD:
117 return " Guest LAN Hiper";
122 switch (card->info.type) {
123 case QETH_CARD_TYPE_OSAE:
124 return " OSD Express";
125 case QETH_CARD_TYPE_IQD:
126 return " HiperSockets";
127 case QETH_CARD_TYPE_OSN:
136 /* max length to be returned: 14 */
137 const char *qeth_get_cardname_short(struct qeth_card *card)
139 if (card->info.guestlan) {
140 switch (card->info.type) {
141 case QETH_CARD_TYPE_OSAE:
142 return "GuestLAN QDIO";
143 case QETH_CARD_TYPE_IQD:
144 return "GuestLAN Hiper";
149 switch (card->info.type) {
150 case QETH_CARD_TYPE_OSAE:
151 switch (card->info.link_type) {
152 case QETH_LINK_TYPE_FAST_ETH:
154 case QETH_LINK_TYPE_HSTR:
156 case QETH_LINK_TYPE_GBIT_ETH:
158 case QETH_LINK_TYPE_10GBIT_ETH:
160 case QETH_LINK_TYPE_LANE_ETH100:
161 return "OSD_FE_LANE";
162 case QETH_LINK_TYPE_LANE_TR:
163 return "OSD_TR_LANE";
164 case QETH_LINK_TYPE_LANE_ETH1000:
165 return "OSD_GbE_LANE";
166 case QETH_LINK_TYPE_LANE:
167 return "OSD_ATM_LANE";
169 return "OSD_Express";
171 case QETH_CARD_TYPE_IQD:
172 return "HiperSockets";
173 case QETH_CARD_TYPE_OSN:
182 void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
183 int clear_start_mask)
187 spin_lock_irqsave(&card->thread_mask_lock, flags);
188 card->thread_allowed_mask = threads;
189 if (clear_start_mask)
190 card->thread_start_mask &= threads;
191 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
192 wake_up(&card->wait_q);
194 EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
196 int qeth_threads_running(struct qeth_card *card, unsigned long threads)
201 spin_lock_irqsave(&card->thread_mask_lock, flags);
202 rc = (card->thread_running_mask & threads);
203 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
206 EXPORT_SYMBOL_GPL(qeth_threads_running);
208 int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
210 return wait_event_interruptible(card->wait_q,
211 qeth_threads_running(card, threads) == 0);
213 EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
215 void qeth_clear_working_pool_list(struct qeth_card *card)
217 struct qeth_buffer_pool_entry *pool_entry, *tmp;
219 QETH_DBF_TEXT(TRACE, 5, "clwrklst");
220 list_for_each_entry_safe(pool_entry, tmp,
221 &card->qdio.in_buf_pool.entry_list, list){
222 list_del(&pool_entry->list);
225 EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
227 static int qeth_alloc_buffer_pool(struct qeth_card *card)
229 struct qeth_buffer_pool_entry *pool_entry;
233 QETH_DBF_TEXT(TRACE, 5, "alocpool");
234 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
235 pool_entry = kmalloc(sizeof(*pool_entry), GFP_KERNEL);
237 qeth_free_buffer_pool(card);
240 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
241 ptr = (void *) __get_free_page(GFP_KERNEL);
244 free_page((unsigned long)
245 pool_entry->elements[--j]);
247 qeth_free_buffer_pool(card);
250 pool_entry->elements[j] = ptr;
252 list_add(&pool_entry->init_list,
253 &card->qdio.init_pool.entry_list);
258 int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
260 QETH_DBF_TEXT(TRACE, 2, "realcbp");
262 if ((card->state != CARD_STATE_DOWN) &&
263 (card->state != CARD_STATE_RECOVER))
266 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
267 qeth_clear_working_pool_list(card);
268 qeth_free_buffer_pool(card);
269 card->qdio.in_buf_pool.buf_count = bufcnt;
270 card->qdio.init_pool.buf_count = bufcnt;
271 return qeth_alloc_buffer_pool(card);
273 EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
275 static int qeth_issue_next_read(struct qeth_card *card)
278 struct qeth_cmd_buffer *iob;
280 QETH_DBF_TEXT(TRACE, 5, "issnxrd");
281 if (card->read.state != CH_STATE_UP)
283 iob = qeth_get_buffer(&card->read);
285 dev_warn(&card->gdev->dev, "The qeth device driver "
286 "failed to recover an error on the device\n");
287 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
288 "available\n", dev_name(&card->gdev->dev));
291 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
292 QETH_DBF_TEXT(TRACE, 6, "noirqpnd");
293 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
296 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
297 "rc=%i\n", dev_name(&card->gdev->dev), rc);
298 atomic_set(&card->read.irq_pending, 0);
299 qeth_schedule_recovery(card);
300 wake_up(&card->wait_q);
305 static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
307 struct qeth_reply *reply;
309 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
311 atomic_set(&reply->refcnt, 1);
312 atomic_set(&reply->received, 0);
318 static void qeth_get_reply(struct qeth_reply *reply)
320 WARN_ON(atomic_read(&reply->refcnt) <= 0);
321 atomic_inc(&reply->refcnt);
324 static void qeth_put_reply(struct qeth_reply *reply)
326 WARN_ON(atomic_read(&reply->refcnt) <= 0);
327 if (atomic_dec_and_test(&reply->refcnt))
331 static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
332 struct qeth_card *card)
335 int com = cmd->hdr.command;
336 ipa_name = qeth_get_ipa_cmd_name(com);
338 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s returned x%X \"%s\"\n",
339 ipa_name, com, QETH_CARD_IFNAME(card),
340 rc, qeth_get_ipa_msg(rc));
342 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s succeeded\n",
343 ipa_name, com, QETH_CARD_IFNAME(card));
346 static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
347 struct qeth_cmd_buffer *iob)
349 struct qeth_ipa_cmd *cmd = NULL;
351 QETH_DBF_TEXT(TRACE, 5, "chkipad");
352 if (IS_IPA(iob->data)) {
353 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
354 if (IS_IPA_REPLY(cmd)) {
355 if (cmd->hdr.command != IPA_CMD_SETCCID &&
356 cmd->hdr.command != IPA_CMD_DELCCID &&
357 cmd->hdr.command != IPA_CMD_MODCCID &&
358 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
359 qeth_issue_ipa_msg(cmd,
360 cmd->hdr.return_code, card);
363 switch (cmd->hdr.command) {
364 case IPA_CMD_STOPLAN:
365 dev_warn(&card->gdev->dev,
366 "The link for interface %s on CHPID"
368 QETH_CARD_IFNAME(card),
370 card->lan_online = 0;
371 if (card->dev && netif_carrier_ok(card->dev))
372 netif_carrier_off(card->dev);
374 case IPA_CMD_STARTLAN:
375 dev_info(&card->gdev->dev,
376 "The link for %s on CHPID 0x%X has"
378 QETH_CARD_IFNAME(card),
380 netif_carrier_on(card->dev);
381 card->lan_online = 1;
382 qeth_schedule_recovery(card);
384 case IPA_CMD_MODCCID:
386 case IPA_CMD_REGISTER_LOCAL_ADDR:
387 QETH_DBF_TEXT(TRACE, 3, "irla");
389 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
390 QETH_DBF_TEXT(TRACE, 3, "urla");
393 QETH_DBF_MESSAGE(2, "Received data is IPA "
394 "but not a reply!\n");
402 void qeth_clear_ipacmd_list(struct qeth_card *card)
404 struct qeth_reply *reply, *r;
407 QETH_DBF_TEXT(TRACE, 4, "clipalst");
409 spin_lock_irqsave(&card->lock, flags);
410 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
411 qeth_get_reply(reply);
413 atomic_inc(&reply->received);
414 list_del_init(&reply->list);
415 wake_up(&reply->wait_q);
416 qeth_put_reply(reply);
418 spin_unlock_irqrestore(&card->lock, flags);
420 EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
422 static int qeth_check_idx_response(unsigned char *buffer)
427 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
428 if ((buffer[2] & 0xc0) == 0xc0) {
429 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE "
430 "with cause code 0x%02x%s\n",
432 ((buffer[4] == 0x22) ?
433 " -- try another portname" : ""));
434 QETH_DBF_TEXT(TRACE, 2, "ckidxres");
435 QETH_DBF_TEXT(TRACE, 2, " idxterm");
436 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -EIO);
442 static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
445 struct qeth_card *card;
447 QETH_DBF_TEXT(TRACE, 4, "setupccw");
448 card = CARD_FROM_CDEV(channel->ccwdev);
449 if (channel == &card->read)
450 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
452 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
453 channel->ccw.count = len;
454 channel->ccw.cda = (__u32) __pa(iob);
457 static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
461 QETH_DBF_TEXT(TRACE, 6, "getbuff");
462 index = channel->io_buf_no;
464 if (channel->iob[index].state == BUF_STATE_FREE) {
465 channel->iob[index].state = BUF_STATE_LOCKED;
466 channel->io_buf_no = (channel->io_buf_no + 1) %
468 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
469 return channel->iob + index;
471 index = (index + 1) % QETH_CMD_BUFFER_NO;
472 } while (index != channel->io_buf_no);
477 void qeth_release_buffer(struct qeth_channel *channel,
478 struct qeth_cmd_buffer *iob)
482 QETH_DBF_TEXT(TRACE, 6, "relbuff");
483 spin_lock_irqsave(&channel->iob_lock, flags);
484 memset(iob->data, 0, QETH_BUFSIZE);
485 iob->state = BUF_STATE_FREE;
486 iob->callback = qeth_send_control_data_cb;
488 spin_unlock_irqrestore(&channel->iob_lock, flags);
490 EXPORT_SYMBOL_GPL(qeth_release_buffer);
492 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
494 struct qeth_cmd_buffer *buffer = NULL;
497 spin_lock_irqsave(&channel->iob_lock, flags);
498 buffer = __qeth_get_buffer(channel);
499 spin_unlock_irqrestore(&channel->iob_lock, flags);
503 struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
505 struct qeth_cmd_buffer *buffer;
506 wait_event(channel->wait_q,
507 ((buffer = qeth_get_buffer(channel)) != NULL));
510 EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
512 void qeth_clear_cmd_buffers(struct qeth_channel *channel)
516 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
517 qeth_release_buffer(channel, &channel->iob[cnt]);
519 channel->io_buf_no = 0;
521 EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
523 static void qeth_send_control_data_cb(struct qeth_channel *channel,
524 struct qeth_cmd_buffer *iob)
526 struct qeth_card *card;
527 struct qeth_reply *reply, *r;
528 struct qeth_ipa_cmd *cmd;
532 QETH_DBF_TEXT(TRACE, 4, "sndctlcb");
534 card = CARD_FROM_CDEV(channel->ccwdev);
535 if (qeth_check_idx_response(iob->data)) {
536 qeth_clear_ipacmd_list(card);
537 if (((iob->data[2] & 0xc0) == 0xc0) && iob->data[4] == 0xf6)
538 dev_err(&card->gdev->dev,
539 "The qeth device is not configured "
540 "for the OSI layer required by z/VM\n");
542 qeth_schedule_recovery(card);
546 cmd = qeth_check_ipa_data(card, iob);
547 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
549 /*in case of OSN : check if cmd is set */
550 if (card->info.type == QETH_CARD_TYPE_OSN &&
552 cmd->hdr.command != IPA_CMD_STARTLAN &&
553 card->osn_info.assist_cb != NULL) {
554 card->osn_info.assist_cb(card->dev, cmd);
558 spin_lock_irqsave(&card->lock, flags);
559 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
560 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
561 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
562 qeth_get_reply(reply);
563 list_del_init(&reply->list);
564 spin_unlock_irqrestore(&card->lock, flags);
566 if (reply->callback != NULL) {
568 reply->offset = (__u16)((char *)cmd -
570 keep_reply = reply->callback(card,
574 keep_reply = reply->callback(card,
579 reply->rc = (u16) cmd->hdr.return_code;
583 spin_lock_irqsave(&card->lock, flags);
584 list_add_tail(&reply->list,
585 &card->cmd_waiter_list);
586 spin_unlock_irqrestore(&card->lock, flags);
588 atomic_inc(&reply->received);
589 wake_up(&reply->wait_q);
591 qeth_put_reply(reply);
595 spin_unlock_irqrestore(&card->lock, flags);
597 memcpy(&card->seqno.pdu_hdr_ack,
598 QETH_PDU_HEADER_SEQ_NO(iob->data),
600 qeth_release_buffer(channel, iob);
603 static int qeth_setup_channel(struct qeth_channel *channel)
607 QETH_DBF_TEXT(SETUP, 2, "setupch");
608 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
609 channel->iob[cnt].data = (char *)
610 kmalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
611 if (channel->iob[cnt].data == NULL)
613 channel->iob[cnt].state = BUF_STATE_FREE;
614 channel->iob[cnt].channel = channel;
615 channel->iob[cnt].callback = qeth_send_control_data_cb;
616 channel->iob[cnt].rc = 0;
618 if (cnt < QETH_CMD_BUFFER_NO) {
620 kfree(channel->iob[cnt].data);
624 channel->io_buf_no = 0;
625 atomic_set(&channel->irq_pending, 0);
626 spin_lock_init(&channel->iob_lock);
628 init_waitqueue_head(&channel->wait_q);
632 static int qeth_set_thread_start_bit(struct qeth_card *card,
633 unsigned long thread)
637 spin_lock_irqsave(&card->thread_mask_lock, flags);
638 if (!(card->thread_allowed_mask & thread) ||
639 (card->thread_start_mask & thread)) {
640 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
643 card->thread_start_mask |= thread;
644 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
648 void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
652 spin_lock_irqsave(&card->thread_mask_lock, flags);
653 card->thread_start_mask &= ~thread;
654 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
655 wake_up(&card->wait_q);
657 EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
659 void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
663 spin_lock_irqsave(&card->thread_mask_lock, flags);
664 card->thread_running_mask &= ~thread;
665 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
666 wake_up(&card->wait_q);
668 EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
670 static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
675 spin_lock_irqsave(&card->thread_mask_lock, flags);
676 if (card->thread_start_mask & thread) {
677 if ((card->thread_allowed_mask & thread) &&
678 !(card->thread_running_mask & thread)) {
680 card->thread_start_mask &= ~thread;
681 card->thread_running_mask |= thread;
685 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
689 int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
693 wait_event(card->wait_q,
694 (rc = __qeth_do_run_thread(card, thread)) >= 0);
697 EXPORT_SYMBOL_GPL(qeth_do_run_thread);
699 void qeth_schedule_recovery(struct qeth_card *card)
701 QETH_DBF_TEXT(TRACE, 2, "startrec");
702 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
703 schedule_work(&card->kernel_thread_starter);
705 EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
707 static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
712 sense = (char *) irb->ecw;
713 cstat = irb->scsw.cmd.cstat;
714 dstat = irb->scsw.cmd.dstat;
716 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
717 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
718 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
719 QETH_DBF_TEXT(TRACE, 2, "CGENCHK");
720 dev_warn(&cdev->dev, "The qeth device driver "
721 "failed to recover an error on the device\n");
722 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x ",
723 dev_name(&cdev->dev), dstat, cstat);
724 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
729 if (dstat & DEV_STAT_UNIT_CHECK) {
730 if (sense[SENSE_RESETTING_EVENT_BYTE] &
731 SENSE_RESETTING_EVENT_FLAG) {
732 QETH_DBF_TEXT(TRACE, 2, "REVIND");
735 if (sense[SENSE_COMMAND_REJECT_BYTE] &
736 SENSE_COMMAND_REJECT_FLAG) {
737 QETH_DBF_TEXT(TRACE, 2, "CMDREJi");
740 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
741 QETH_DBF_TEXT(TRACE, 2, "AFFE");
744 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
745 QETH_DBF_TEXT(TRACE, 2, "ZEROSEN");
748 QETH_DBF_TEXT(TRACE, 2, "DGENCHK");
754 static long __qeth_check_irb_error(struct ccw_device *cdev,
755 unsigned long intparm, struct irb *irb)
760 switch (PTR_ERR(irb)) {
762 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
763 dev_name(&cdev->dev));
764 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
765 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -EIO);
768 dev_warn(&cdev->dev, "A hardware operation timed out"
770 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
771 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -ETIMEDOUT);
772 if (intparm == QETH_RCD_PARM) {
773 struct qeth_card *card = CARD_FROM_CDEV(cdev);
775 if (card && (card->data.ccwdev == cdev)) {
776 card->data.state = CH_STATE_DOWN;
777 wake_up(&card->wait_q);
782 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
783 dev_name(&cdev->dev), PTR_ERR(irb));
784 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
785 QETH_DBF_TEXT(TRACE, 2, " rc???");
790 static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
795 struct qeth_cmd_buffer *buffer;
796 struct qeth_channel *channel;
797 struct qeth_card *card;
798 struct qeth_cmd_buffer *iob;
801 QETH_DBF_TEXT(TRACE, 5, "irq");
803 if (__qeth_check_irb_error(cdev, intparm, irb))
805 cstat = irb->scsw.cmd.cstat;
806 dstat = irb->scsw.cmd.dstat;
808 card = CARD_FROM_CDEV(cdev);
812 if (card->read.ccwdev == cdev) {
813 channel = &card->read;
814 QETH_DBF_TEXT(TRACE, 5, "read");
815 } else if (card->write.ccwdev == cdev) {
816 channel = &card->write;
817 QETH_DBF_TEXT(TRACE, 5, "write");
819 channel = &card->data;
820 QETH_DBF_TEXT(TRACE, 5, "data");
822 atomic_set(&channel->irq_pending, 0);
824 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
825 channel->state = CH_STATE_STOPPED;
827 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
828 channel->state = CH_STATE_HALTED;
830 /*let's wake up immediately on data channel*/
831 if ((channel == &card->data) && (intparm != 0) &&
832 (intparm != QETH_RCD_PARM))
835 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
836 QETH_DBF_TEXT(TRACE, 6, "clrchpar");
837 /* we don't have to handle this further */
840 if (intparm == QETH_HALT_CHANNEL_PARM) {
841 QETH_DBF_TEXT(TRACE, 6, "hltchpar");
842 /* we don't have to handle this further */
845 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
846 (dstat & DEV_STAT_UNIT_CHECK) ||
848 if (irb->esw.esw0.erw.cons) {
849 dev_warn(&channel->ccwdev->dev,
850 "The qeth device driver failed to recover "
851 "an error on the device\n");
852 QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
854 dev_name(&channel->ccwdev->dev), cstat, dstat);
855 print_hex_dump(KERN_WARNING, "qeth: irb ",
856 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
857 print_hex_dump(KERN_WARNING, "qeth: sense data ",
858 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
860 if (intparm == QETH_RCD_PARM) {
861 channel->state = CH_STATE_DOWN;
864 rc = qeth_get_problem(cdev, irb);
866 qeth_clear_ipacmd_list(card);
867 qeth_schedule_recovery(card);
872 if (intparm == QETH_RCD_PARM) {
873 channel->state = CH_STATE_RCD_DONE;
877 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
878 buffer->state = BUF_STATE_PROCESSED;
880 if (channel == &card->data)
882 if (channel == &card->read &&
883 channel->state == CH_STATE_UP)
884 qeth_issue_next_read(card);
887 index = channel->buf_no;
888 while (iob[index].state == BUF_STATE_PROCESSED) {
889 if (iob[index].callback != NULL)
890 iob[index].callback(channel, iob + index);
892 index = (index + 1) % QETH_CMD_BUFFER_NO;
894 channel->buf_no = index;
896 wake_up(&card->wait_q);
900 static void __qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
901 struct qeth_qdio_out_buffer *buf, unsigned int qeth_skip_skb)
906 /* is PCI flag set on buffer? */
907 if (buf->buffer->element[0].flags & 0x40)
908 atomic_dec(&queue->set_pci_flags_count);
910 if (!qeth_skip_skb) {
911 skb = skb_dequeue(&buf->skb_list);
913 atomic_dec(&skb->users);
914 dev_kfree_skb_any(skb);
915 skb = skb_dequeue(&buf->skb_list);
918 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
919 if (buf->buffer->element[i].addr && buf->is_header[i])
920 kmem_cache_free(qeth_core_header_cache,
921 buf->buffer->element[i].addr);
922 buf->is_header[i] = 0;
923 buf->buffer->element[i].length = 0;
924 buf->buffer->element[i].addr = NULL;
925 buf->buffer->element[i].flags = 0;
927 buf->buffer->element[15].flags = 0;
928 buf->next_element_to_fill = 0;
929 atomic_set(&buf->state, QETH_QDIO_BUF_EMPTY);
932 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
933 struct qeth_qdio_out_buffer *buf)
935 __qeth_clear_output_buffer(queue, buf, 0);
938 void qeth_clear_qdio_buffers(struct qeth_card *card)
942 QETH_DBF_TEXT(TRACE, 2, "clearqdbf");
943 /* clear outbound buffers to free skbs */
944 for (i = 0; i < card->qdio.no_out_queues; ++i)
945 if (card->qdio.out_qs[i]) {
946 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
947 qeth_clear_output_buffer(card->qdio.out_qs[i],
948 &card->qdio.out_qs[i]->bufs[j]);
951 EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
953 static void qeth_free_buffer_pool(struct qeth_card *card)
955 struct qeth_buffer_pool_entry *pool_entry, *tmp;
957 QETH_DBF_TEXT(TRACE, 5, "freepool");
958 list_for_each_entry_safe(pool_entry, tmp,
959 &card->qdio.init_pool.entry_list, init_list){
960 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
961 free_page((unsigned long)pool_entry->elements[i]);
962 list_del(&pool_entry->init_list);
967 static void qeth_free_qdio_buffers(struct qeth_card *card)
971 QETH_DBF_TEXT(TRACE, 2, "freeqdbf");
972 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
973 QETH_QDIO_UNINITIALIZED)
975 kfree(card->qdio.in_q);
976 card->qdio.in_q = NULL;
977 /* inbound buffer pool */
978 qeth_free_buffer_pool(card);
979 /* free outbound qdio_qs */
980 if (card->qdio.out_qs) {
981 for (i = 0; i < card->qdio.no_out_queues; ++i) {
982 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
983 qeth_clear_output_buffer(card->qdio.out_qs[i],
984 &card->qdio.out_qs[i]->bufs[j]);
985 kfree(card->qdio.out_qs[i]);
987 kfree(card->qdio.out_qs);
988 card->qdio.out_qs = NULL;
992 static void qeth_clean_channel(struct qeth_channel *channel)
996 QETH_DBF_TEXT(SETUP, 2, "freech");
997 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
998 kfree(channel->iob[cnt].data);
1001 static int qeth_is_1920_device(struct qeth_card *card)
1003 int single_queue = 0;
1004 struct ccw_device *ccwdev;
1005 struct channelPath_dsc {
1016 QETH_DBF_TEXT(SETUP, 2, "chk_1920");
1018 ccwdev = card->data.ccwdev;
1019 chp_dsc = (struct channelPath_dsc *)ccw_device_get_chp_desc(ccwdev, 0);
1020 if (chp_dsc != NULL) {
1021 /* CHPP field bit 6 == 1 -> single queue */
1022 single_queue = ((chp_dsc->chpp & 0x02) == 0x02);
1025 QETH_DBF_TEXT_(SETUP, 2, "rc:%x", single_queue);
1026 return single_queue;
1029 static void qeth_init_qdio_info(struct qeth_card *card)
1031 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
1032 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
1034 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1035 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
1036 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1037 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1038 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1041 static void qeth_set_intial_options(struct qeth_card *card)
1043 card->options.route4.type = NO_ROUTER;
1044 card->options.route6.type = NO_ROUTER;
1045 card->options.checksum_type = QETH_CHECKSUM_DEFAULT;
1046 card->options.broadcast_mode = QETH_TR_BROADCAST_ALLRINGS;
1047 card->options.macaddr_mode = QETH_TR_MACADDR_NONCANONICAL;
1048 card->options.fake_broadcast = 0;
1049 card->options.add_hhlen = DEFAULT_ADD_HHLEN;
1050 card->options.performance_stats = 0;
1051 card->options.rx_sg_cb = QETH_RX_SG_CB;
1052 card->options.isolation = ISOLATION_MODE_NONE;
1055 static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1057 unsigned long flags;
1060 spin_lock_irqsave(&card->thread_mask_lock, flags);
1061 QETH_DBF_TEXT_(TRACE, 4, " %02x%02x%02x",
1062 (u8) card->thread_start_mask,
1063 (u8) card->thread_allowed_mask,
1064 (u8) card->thread_running_mask);
1065 rc = (card->thread_start_mask & thread);
1066 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1070 static void qeth_start_kernel_thread(struct work_struct *work)
1072 struct qeth_card *card = container_of(work, struct qeth_card,
1073 kernel_thread_starter);
1074 QETH_DBF_TEXT(TRACE , 2, "strthrd");
1076 if (card->read.state != CH_STATE_UP &&
1077 card->write.state != CH_STATE_UP)
1079 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD))
1080 kthread_run(card->discipline.recover, (void *) card,
1084 static int qeth_setup_card(struct qeth_card *card)
1087 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1088 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
1090 card->read.state = CH_STATE_DOWN;
1091 card->write.state = CH_STATE_DOWN;
1092 card->data.state = CH_STATE_DOWN;
1093 card->state = CARD_STATE_DOWN;
1094 card->lan_online = 0;
1095 card->use_hard_stop = 0;
1097 spin_lock_init(&card->vlanlock);
1098 spin_lock_init(&card->mclock);
1099 card->vlangrp = NULL;
1100 spin_lock_init(&card->lock);
1101 spin_lock_init(&card->ip_lock);
1102 spin_lock_init(&card->thread_mask_lock);
1103 card->thread_start_mask = 0;
1104 card->thread_allowed_mask = 0;
1105 card->thread_running_mask = 0;
1106 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
1107 INIT_LIST_HEAD(&card->ip_list);
1108 INIT_LIST_HEAD(card->ip_tbd_list);
1109 INIT_LIST_HEAD(&card->cmd_waiter_list);
1110 init_waitqueue_head(&card->wait_q);
1111 /* intial options */
1112 qeth_set_intial_options(card);
1113 /* IP address takeover */
1114 INIT_LIST_HEAD(&card->ipato.entries);
1115 card->ipato.enabled = 0;
1116 card->ipato.invert4 = 0;
1117 card->ipato.invert6 = 0;
1118 /* init QDIO stuff */
1119 qeth_init_qdio_info(card);
1123 static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
1125 struct qeth_card *card = container_of(slr, struct qeth_card,
1126 qeth_service_level);
1127 if (card->info.mcl_level[0])
1128 seq_printf(m, "qeth: %s firmware level %s\n",
1129 CARD_BUS_ID(card), card->info.mcl_level);
1132 static struct qeth_card *qeth_alloc_card(void)
1134 struct qeth_card *card;
1136 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
1137 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
1140 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
1141 card->ip_tbd_list = kmalloc(sizeof(struct list_head), GFP_KERNEL);
1142 if (!card->ip_tbd_list) {
1143 QETH_DBF_TEXT(SETUP, 0, "iptbdnom");
1146 if (qeth_setup_channel(&card->read))
1148 if (qeth_setup_channel(&card->write))
1150 card->options.layer2 = -1;
1151 card->qeth_service_level.seq_print = qeth_core_sl_print;
1152 register_service_level(&card->qeth_service_level);
1156 qeth_clean_channel(&card->read);
1158 kfree(card->ip_tbd_list);
1165 static int qeth_determine_card_type(struct qeth_card *card)
1169 QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
1171 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1172 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
1173 while (known_devices[i][4]) {
1174 if ((CARD_RDEV(card)->id.dev_type == known_devices[i][2]) &&
1175 (CARD_RDEV(card)->id.dev_model == known_devices[i][3])) {
1176 card->info.type = known_devices[i][4];
1177 card->qdio.no_out_queues = known_devices[i][8];
1178 card->info.is_multicast_different = known_devices[i][9];
1179 if (qeth_is_1920_device(card)) {
1180 dev_info(&card->gdev->dev,
1181 "Priority Queueing not supported\n");
1182 card->qdio.no_out_queues = 1;
1183 card->qdio.default_out_queue = 0;
1189 card->info.type = QETH_CARD_TYPE_UNKNOWN;
1190 dev_err(&card->gdev->dev, "The adapter hardware is of an "
1195 static int qeth_clear_channel(struct qeth_channel *channel)
1197 unsigned long flags;
1198 struct qeth_card *card;
1201 QETH_DBF_TEXT(TRACE, 3, "clearch");
1202 card = CARD_FROM_CDEV(channel->ccwdev);
1203 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1204 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
1205 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1209 rc = wait_event_interruptible_timeout(card->wait_q,
1210 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1211 if (rc == -ERESTARTSYS)
1213 if (channel->state != CH_STATE_STOPPED)
1215 channel->state = CH_STATE_DOWN;
1219 static int qeth_halt_channel(struct qeth_channel *channel)
1221 unsigned long flags;
1222 struct qeth_card *card;
1225 QETH_DBF_TEXT(TRACE, 3, "haltch");
1226 card = CARD_FROM_CDEV(channel->ccwdev);
1227 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1228 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
1229 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1233 rc = wait_event_interruptible_timeout(card->wait_q,
1234 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1235 if (rc == -ERESTARTSYS)
1237 if (channel->state != CH_STATE_HALTED)
1242 static int qeth_halt_channels(struct qeth_card *card)
1244 int rc1 = 0, rc2 = 0, rc3 = 0;
1246 QETH_DBF_TEXT(TRACE, 3, "haltchs");
1247 rc1 = qeth_halt_channel(&card->read);
1248 rc2 = qeth_halt_channel(&card->write);
1249 rc3 = qeth_halt_channel(&card->data);
1257 static int qeth_clear_channels(struct qeth_card *card)
1259 int rc1 = 0, rc2 = 0, rc3 = 0;
1261 QETH_DBF_TEXT(TRACE, 3, "clearchs");
1262 rc1 = qeth_clear_channel(&card->read);
1263 rc2 = qeth_clear_channel(&card->write);
1264 rc3 = qeth_clear_channel(&card->data);
1272 static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1276 QETH_DBF_TEXT(TRACE, 3, "clhacrd");
1277 QETH_DBF_HEX(TRACE, 3, &card, sizeof(void *));
1280 rc = qeth_halt_channels(card);
1283 return qeth_clear_channels(card);
1286 int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1290 QETH_DBF_TEXT(TRACE, 3, "qdioclr");
1291 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1292 QETH_QDIO_CLEANING)) {
1293 case QETH_QDIO_ESTABLISHED:
1294 if (card->info.type == QETH_CARD_TYPE_IQD)
1295 rc = qdio_shutdown(CARD_DDEV(card),
1296 QDIO_FLAG_CLEANUP_USING_HALT);
1298 rc = qdio_shutdown(CARD_DDEV(card),
1299 QDIO_FLAG_CLEANUP_USING_CLEAR);
1301 QETH_DBF_TEXT_(TRACE, 3, "1err%d", rc);
1302 qdio_free(CARD_DDEV(card));
1303 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1305 case QETH_QDIO_CLEANING:
1310 rc = qeth_clear_halt_card(card, use_halt);
1312 QETH_DBF_TEXT_(TRACE, 3, "2err%d", rc);
1313 card->state = CARD_STATE_DOWN;
1316 EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1318 static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1324 struct qeth_channel *channel = &card->data;
1325 unsigned long flags;
1328 * scan for RCD command in extended SenseID data
1330 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1331 if (!ciw || ciw->cmd == 0)
1333 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1337 channel->ccw.cmd_code = ciw->cmd;
1338 channel->ccw.cda = (__u32) __pa(rcd_buf);
1339 channel->ccw.count = ciw->count;
1340 channel->ccw.flags = CCW_FLAG_SLI;
1341 channel->state = CH_STATE_RCD;
1342 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1343 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1344 QETH_RCD_PARM, LPM_ANYPATH, 0,
1346 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1348 wait_event(card->wait_q,
1349 (channel->state == CH_STATE_RCD_DONE ||
1350 channel->state == CH_STATE_DOWN));
1351 if (channel->state == CH_STATE_DOWN)
1354 channel->state = CH_STATE_DOWN;
1360 *length = ciw->count;
1366 static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
1368 QETH_DBF_TEXT(SETUP, 2, "cfgunit");
1369 card->info.chpid = prcd[30];
1370 card->info.unit_addr2 = prcd[31];
1371 card->info.cula = prcd[63];
1372 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1373 (prcd[0x11] == _ascebc['M']));
1376 static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
1378 QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
1380 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 && prcd[76] == 0xF5) {
1381 card->info.blkt.time_total = 250;
1382 card->info.blkt.inter_packet = 5;
1383 card->info.blkt.inter_packet_jumbo = 15;
1385 card->info.blkt.time_total = 0;
1386 card->info.blkt.inter_packet = 0;
1387 card->info.blkt.inter_packet_jumbo = 0;
1391 static void qeth_init_tokens(struct qeth_card *card)
1393 card->token.issuer_rm_w = 0x00010103UL;
1394 card->token.cm_filter_w = 0x00010108UL;
1395 card->token.cm_connection_w = 0x0001010aUL;
1396 card->token.ulp_filter_w = 0x0001010bUL;
1397 card->token.ulp_connection_w = 0x0001010dUL;
1400 static void qeth_init_func_level(struct qeth_card *card)
1402 if (card->ipato.enabled) {
1403 if (card->info.type == QETH_CARD_TYPE_IQD)
1404 card->info.func_level =
1405 QETH_IDX_FUNC_LEVEL_IQD_ENA_IPAT;
1407 card->info.func_level =
1408 QETH_IDX_FUNC_LEVEL_OSAE_ENA_IPAT;
1410 if (card->info.type == QETH_CARD_TYPE_IQD)
1411 /*FIXME:why do we have same values for dis and ena for
1413 card->info.func_level =
1414 QETH_IDX_FUNC_LEVEL_IQD_DIS_IPAT;
1416 card->info.func_level =
1417 QETH_IDX_FUNC_LEVEL_OSAE_DIS_IPAT;
1421 static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
1422 void (*idx_reply_cb)(struct qeth_channel *,
1423 struct qeth_cmd_buffer *))
1425 struct qeth_cmd_buffer *iob;
1426 unsigned long flags;
1428 struct qeth_card *card;
1430 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
1431 card = CARD_FROM_CDEV(channel->ccwdev);
1432 iob = qeth_get_buffer(channel);
1433 iob->callback = idx_reply_cb;
1434 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1435 channel->ccw.count = QETH_BUFSIZE;
1436 channel->ccw.cda = (__u32) __pa(iob->data);
1438 wait_event(card->wait_q,
1439 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1440 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
1441 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1442 rc = ccw_device_start(channel->ccwdev,
1443 &channel->ccw, (addr_t) iob, 0, 0);
1444 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1447 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
1448 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
1449 atomic_set(&channel->irq_pending, 0);
1450 wake_up(&card->wait_q);
1453 rc = wait_event_interruptible_timeout(card->wait_q,
1454 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1455 if (rc == -ERESTARTSYS)
1457 if (channel->state != CH_STATE_UP) {
1459 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
1460 qeth_clear_cmd_buffers(channel);
1466 static int qeth_idx_activate_channel(struct qeth_channel *channel,
1467 void (*idx_reply_cb)(struct qeth_channel *,
1468 struct qeth_cmd_buffer *))
1470 struct qeth_card *card;
1471 struct qeth_cmd_buffer *iob;
1472 unsigned long flags;
1476 struct ccw_dev_id temp_devid;
1478 card = CARD_FROM_CDEV(channel->ccwdev);
1480 QETH_DBF_TEXT(SETUP, 2, "idxactch");
1482 iob = qeth_get_buffer(channel);
1483 iob->callback = idx_reply_cb;
1484 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1485 channel->ccw.count = IDX_ACTIVATE_SIZE;
1486 channel->ccw.cda = (__u32) __pa(iob->data);
1487 if (channel == &card->write) {
1488 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1489 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1490 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1491 card->seqno.trans_hdr++;
1493 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1494 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1495 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1497 tmp = ((__u8)card->info.portno) | 0x80;
1498 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1499 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1500 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1501 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1502 &card->info.func_level, sizeof(__u16));
1503 ccw_device_get_id(CARD_DDEV(card), &temp_devid);
1504 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
1505 temp = (card->info.cula << 8) + card->info.unit_addr2;
1506 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1508 wait_event(card->wait_q,
1509 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1510 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
1511 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1512 rc = ccw_device_start(channel->ccwdev,
1513 &channel->ccw, (addr_t) iob, 0, 0);
1514 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1517 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
1519 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
1520 atomic_set(&channel->irq_pending, 0);
1521 wake_up(&card->wait_q);
1524 rc = wait_event_interruptible_timeout(card->wait_q,
1525 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1526 if (rc == -ERESTARTSYS)
1528 if (channel->state != CH_STATE_ACTIVATING) {
1529 dev_warn(&channel->ccwdev->dev, "The qeth device driver"
1530 " failed to recover an error on the device\n");
1531 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
1532 dev_name(&channel->ccwdev->dev));
1533 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
1534 qeth_clear_cmd_buffers(channel);
1537 return qeth_idx_activate_get_answer(channel, idx_reply_cb);
1540 static int qeth_peer_func_level(int level)
1542 if ((level & 0xff) == 8)
1543 return (level & 0xff) + 0x400;
1544 if (((level >> 8) & 3) == 1)
1545 return (level & 0xff) + 0x200;
1549 static void qeth_idx_write_cb(struct qeth_channel *channel,
1550 struct qeth_cmd_buffer *iob)
1552 struct qeth_card *card;
1555 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
1557 if (channel->state == CH_STATE_DOWN) {
1558 channel->state = CH_STATE_ACTIVATING;
1561 card = CARD_FROM_CDEV(channel->ccwdev);
1563 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1564 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == 0x19)
1565 dev_err(&card->write.ccwdev->dev,
1566 "The adapter is used exclusively by another "
1569 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
1570 " negative reply\n",
1571 dev_name(&card->write.ccwdev->dev));
1574 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1575 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
1576 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
1577 "function level mismatch (sent: 0x%x, received: "
1578 "0x%x)\n", dev_name(&card->write.ccwdev->dev),
1579 card->info.func_level, temp);
1582 channel->state = CH_STATE_UP;
1584 qeth_release_buffer(channel, iob);
1587 static void qeth_idx_read_cb(struct qeth_channel *channel,
1588 struct qeth_cmd_buffer *iob)
1590 struct qeth_card *card;
1593 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
1594 if (channel->state == CH_STATE_DOWN) {
1595 channel->state = CH_STATE_ACTIVATING;
1599 card = CARD_FROM_CDEV(channel->ccwdev);
1600 if (qeth_check_idx_response(iob->data))
1603 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1604 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == 0x19)
1605 dev_err(&card->write.ccwdev->dev,
1606 "The adapter is used exclusively by another "
1609 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
1610 " negative reply\n",
1611 dev_name(&card->read.ccwdev->dev));
1616 * temporary fix for microcode bug
1617 * to revert it,replace OR by AND
1619 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) ||
1620 (card->info.type == QETH_CARD_TYPE_OSAE))
1621 card->info.portname_required = 1;
1623 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1624 if (temp != qeth_peer_func_level(card->info.func_level)) {
1625 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
1626 "level mismatch (sent: 0x%x, received: 0x%x)\n",
1627 dev_name(&card->read.ccwdev->dev),
1628 card->info.func_level, temp);
1631 memcpy(&card->token.issuer_rm_r,
1632 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1633 QETH_MPC_TOKEN_LENGTH);
1634 memcpy(&card->info.mcl_level[0],
1635 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
1636 channel->state = CH_STATE_UP;
1638 qeth_release_buffer(channel, iob);
1641 void qeth_prepare_control_data(struct qeth_card *card, int len,
1642 struct qeth_cmd_buffer *iob)
1644 qeth_setup_ccw(&card->write, iob->data, len);
1645 iob->callback = qeth_release_buffer;
1647 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1648 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1649 card->seqno.trans_hdr++;
1650 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
1651 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
1652 card->seqno.pdu_hdr++;
1653 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
1654 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
1655 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
1657 EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
1659 int qeth_send_control_data(struct qeth_card *card, int len,
1660 struct qeth_cmd_buffer *iob,
1661 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
1666 unsigned long flags;
1667 struct qeth_reply *reply = NULL;
1668 unsigned long timeout, event_timeout;
1669 struct qeth_ipa_cmd *cmd;
1671 QETH_DBF_TEXT(TRACE, 2, "sendctl");
1673 reply = qeth_alloc_reply(card);
1677 reply->callback = reply_cb;
1678 reply->param = reply_param;
1679 if (card->state == CARD_STATE_DOWN)
1680 reply->seqno = QETH_IDX_COMMAND_SEQNO;
1682 reply->seqno = card->seqno.ipa++;
1683 init_waitqueue_head(&reply->wait_q);
1684 spin_lock_irqsave(&card->lock, flags);
1685 list_add_tail(&reply->list, &card->cmd_waiter_list);
1686 spin_unlock_irqrestore(&card->lock, flags);
1687 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
1689 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
1690 qeth_prepare_control_data(card, len, iob);
1692 if (IS_IPA(iob->data))
1693 event_timeout = QETH_IPA_TIMEOUT;
1695 event_timeout = QETH_TIMEOUT;
1696 timeout = jiffies + event_timeout;
1698 QETH_DBF_TEXT(TRACE, 6, "noirqpnd");
1699 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
1700 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
1701 (addr_t) iob, 0, 0);
1702 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
1704 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
1705 "ccw_device_start rc = %i\n",
1706 dev_name(&card->write.ccwdev->dev), rc);
1707 QETH_DBF_TEXT_(TRACE, 2, " err%d", rc);
1708 spin_lock_irqsave(&card->lock, flags);
1709 list_del_init(&reply->list);
1710 qeth_put_reply(reply);
1711 spin_unlock_irqrestore(&card->lock, flags);
1712 qeth_release_buffer(iob->channel, iob);
1713 atomic_set(&card->write.irq_pending, 0);
1714 wake_up(&card->wait_q);
1718 /* we have only one long running ipassist, since we can ensure
1719 process context of this command we can sleep */
1720 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
1721 if ((cmd->hdr.command == IPA_CMD_SETIP) &&
1722 (cmd->hdr.prot_version == QETH_PROT_IPV4)) {
1723 if (!wait_event_timeout(reply->wait_q,
1724 atomic_read(&reply->received), event_timeout))
1727 while (!atomic_read(&reply->received)) {
1728 if (time_after(jiffies, timeout))
1735 qeth_put_reply(reply);
1739 spin_lock_irqsave(&reply->card->lock, flags);
1740 list_del_init(&reply->list);
1741 spin_unlock_irqrestore(&reply->card->lock, flags);
1743 atomic_inc(&reply->received);
1744 wake_up(&reply->wait_q);
1746 qeth_put_reply(reply);
1749 EXPORT_SYMBOL_GPL(qeth_send_control_data);
1751 static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
1754 struct qeth_cmd_buffer *iob;
1756 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
1758 iob = (struct qeth_cmd_buffer *) data;
1759 memcpy(&card->token.cm_filter_r,
1760 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
1761 QETH_MPC_TOKEN_LENGTH);
1762 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1766 static int qeth_cm_enable(struct qeth_card *card)
1769 struct qeth_cmd_buffer *iob;
1771 QETH_DBF_TEXT(SETUP, 2, "cmenable");
1773 iob = qeth_wait_for_buffer(&card->write);
1774 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
1775 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
1776 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
1777 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
1778 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
1780 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
1781 qeth_cm_enable_cb, NULL);
1785 static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
1789 struct qeth_cmd_buffer *iob;
1791 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
1793 iob = (struct qeth_cmd_buffer *) data;
1794 memcpy(&card->token.cm_connection_r,
1795 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
1796 QETH_MPC_TOKEN_LENGTH);
1797 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1801 static int qeth_cm_setup(struct qeth_card *card)
1804 struct qeth_cmd_buffer *iob;
1806 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
1808 iob = qeth_wait_for_buffer(&card->write);
1809 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
1810 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
1811 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
1812 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
1813 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
1814 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
1815 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
1816 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
1817 qeth_cm_setup_cb, NULL);
1822 static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
1824 switch (card->info.type) {
1825 case QETH_CARD_TYPE_UNKNOWN:
1827 case QETH_CARD_TYPE_IQD:
1828 return card->info.max_mtu;
1829 case QETH_CARD_TYPE_OSAE:
1830 switch (card->info.link_type) {
1831 case QETH_LINK_TYPE_HSTR:
1832 case QETH_LINK_TYPE_LANE_TR:
1842 static inline int qeth_get_max_mtu_for_card(int cardtype)
1846 case QETH_CARD_TYPE_UNKNOWN:
1847 case QETH_CARD_TYPE_OSAE:
1848 case QETH_CARD_TYPE_OSN:
1850 case QETH_CARD_TYPE_IQD:
1857 static inline int qeth_get_mtu_out_of_mpc(int cardtype)
1860 case QETH_CARD_TYPE_IQD:
1867 static inline int qeth_get_mtu_outof_framesize(int framesize)
1869 switch (framesize) {
1883 static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
1885 switch (card->info.type) {
1886 case QETH_CARD_TYPE_OSAE:
1887 return ((mtu >= 576) && (mtu <= 61440));
1888 case QETH_CARD_TYPE_IQD:
1889 return ((mtu >= 576) &&
1890 (mtu <= card->info.max_mtu + 4096 - 32));
1891 case QETH_CARD_TYPE_OSN:
1892 case QETH_CARD_TYPE_UNKNOWN:
1898 static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
1902 __u16 mtu, framesize;
1905 struct qeth_cmd_buffer *iob;
1907 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
1909 iob = (struct qeth_cmd_buffer *) data;
1910 memcpy(&card->token.ulp_filter_r,
1911 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
1912 QETH_MPC_TOKEN_LENGTH);
1913 if (qeth_get_mtu_out_of_mpc(card->info.type)) {
1914 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
1915 mtu = qeth_get_mtu_outof_framesize(framesize);
1918 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1921 card->info.max_mtu = mtu;
1922 card->info.initial_mtu = mtu;
1923 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
1925 card->info.initial_mtu = qeth_get_initial_mtu_for_card(card);
1926 card->info.max_mtu = qeth_get_max_mtu_for_card(card->info.type);
1927 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1930 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
1931 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
1933 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
1934 card->info.link_type = link_type;
1936 card->info.link_type = 0;
1937 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1941 static int qeth_ulp_enable(struct qeth_card *card)
1945 struct qeth_cmd_buffer *iob;
1947 /*FIXME: trace view callbacks*/
1948 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
1950 iob = qeth_wait_for_buffer(&card->write);
1951 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
1953 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
1954 (__u8) card->info.portno;
1955 if (card->options.layer2)
1956 if (card->info.type == QETH_CARD_TYPE_OSN)
1957 prot_type = QETH_PROT_OSN2;
1959 prot_type = QETH_PROT_LAYER2;
1961 prot_type = QETH_PROT_TCPIP;
1963 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
1964 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
1965 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
1966 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
1967 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
1968 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data),
1969 card->info.portname, 9);
1970 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
1971 qeth_ulp_enable_cb, NULL);
1976 static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
1979 struct qeth_cmd_buffer *iob;
1981 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
1983 iob = (struct qeth_cmd_buffer *) data;
1984 memcpy(&card->token.ulp_connection_r,
1985 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
1986 QETH_MPC_TOKEN_LENGTH);
1987 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1991 static int qeth_ulp_setup(struct qeth_card *card)
1995 struct qeth_cmd_buffer *iob;
1996 struct ccw_dev_id dev_id;
1998 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
2000 iob = qeth_wait_for_buffer(&card->write);
2001 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
2003 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
2004 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2005 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
2006 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
2007 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
2008 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
2010 ccw_device_get_id(CARD_DDEV(card), &dev_id);
2011 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
2012 temp = (card->info.cula << 8) + card->info.unit_addr2;
2013 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
2014 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
2015 qeth_ulp_setup_cb, NULL);
2019 static int qeth_alloc_qdio_buffers(struct qeth_card *card)
2023 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
2025 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
2026 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
2029 card->qdio.in_q = kmalloc(sizeof(struct qeth_qdio_q),
2031 if (!card->qdio.in_q)
2033 QETH_DBF_TEXT(SETUP, 2, "inq");
2034 QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *));
2035 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q));
2036 /* give inbound qeth_qdio_buffers their qdio_buffers */
2037 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
2038 card->qdio.in_q->bufs[i].buffer =
2039 &card->qdio.in_q->qdio_bufs[i];
2040 /* inbound buffer pool */
2041 if (qeth_alloc_buffer_pool(card))
2045 kmalloc(card->qdio.no_out_queues *
2046 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
2047 if (!card->qdio.out_qs)
2049 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2050 card->qdio.out_qs[i] = kmalloc(sizeof(struct qeth_qdio_out_q),
2052 if (!card->qdio.out_qs[i])
2054 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2055 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
2056 memset(card->qdio.out_qs[i], 0, sizeof(struct qeth_qdio_out_q));
2057 card->qdio.out_qs[i]->queue_no = i;
2058 /* give outbound qeth_qdio_buffers their qdio_buffers */
2059 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2060 card->qdio.out_qs[i]->bufs[j].buffer =
2061 &card->qdio.out_qs[i]->qdio_bufs[j];
2062 skb_queue_head_init(&card->qdio.out_qs[i]->bufs[j].
2065 &card->qdio.out_qs[i]->bufs[j].skb_list.lock,
2066 &qdio_out_skb_queue_key);
2067 INIT_LIST_HEAD(&card->qdio.out_qs[i]->bufs[j].ctx_list);
2074 kfree(card->qdio.out_qs[--i]);
2075 kfree(card->qdio.out_qs);
2076 card->qdio.out_qs = NULL;
2078 qeth_free_buffer_pool(card);
2080 kfree(card->qdio.in_q);
2081 card->qdio.in_q = NULL;
2083 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2087 static void qeth_create_qib_param_field(struct qeth_card *card,
2091 param_field[0] = _ascebc['P'];
2092 param_field[1] = _ascebc['C'];
2093 param_field[2] = _ascebc['I'];
2094 param_field[3] = _ascebc['T'];
2095 *((unsigned int *) (¶m_field[4])) = QETH_PCI_THRESHOLD_A(card);
2096 *((unsigned int *) (¶m_field[8])) = QETH_PCI_THRESHOLD_B(card);
2097 *((unsigned int *) (¶m_field[12])) = QETH_PCI_TIMER_VALUE(card);
2100 static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2103 param_field[16] = _ascebc['B'];
2104 param_field[17] = _ascebc['L'];
2105 param_field[18] = _ascebc['K'];
2106 param_field[19] = _ascebc['T'];
2107 *((unsigned int *) (¶m_field[20])) = card->info.blkt.time_total;
2108 *((unsigned int *) (¶m_field[24])) = card->info.blkt.inter_packet;
2109 *((unsigned int *) (¶m_field[28])) =
2110 card->info.blkt.inter_packet_jumbo;
2113 static int qeth_qdio_activate(struct qeth_card *card)
2115 QETH_DBF_TEXT(SETUP, 3, "qdioact");
2116 return qdio_activate(CARD_DDEV(card));
2119 static int qeth_dm_act(struct qeth_card *card)
2122 struct qeth_cmd_buffer *iob;
2124 QETH_DBF_TEXT(SETUP, 2, "dmact");
2126 iob = qeth_wait_for_buffer(&card->write);
2127 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2129 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2130 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2131 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2132 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2133 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2137 static int qeth_mpc_initialize(struct qeth_card *card)
2141 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
2143 rc = qeth_issue_next_read(card);
2145 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
2148 rc = qeth_cm_enable(card);
2150 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
2153 rc = qeth_cm_setup(card);
2155 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
2158 rc = qeth_ulp_enable(card);
2160 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
2163 rc = qeth_ulp_setup(card);
2165 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
2168 rc = qeth_alloc_qdio_buffers(card);
2170 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
2173 rc = qeth_qdio_establish(card);
2175 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
2176 qeth_free_qdio_buffers(card);
2179 rc = qeth_qdio_activate(card);
2181 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
2184 rc = qeth_dm_act(card);
2186 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
2192 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
2196 static void qeth_print_status_with_portname(struct qeth_card *card)
2201 sprintf(dbf_text, "%s", card->info.portname + 1);
2202 for (i = 0; i < 8; i++)
2204 (char) _ebcasc[(__u8) dbf_text[i]];
2206 dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n"
2207 "with link type %s (portname: %s)\n",
2208 qeth_get_cardname(card),
2209 (card->info.mcl_level[0]) ? " (level: " : "",
2210 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2211 (card->info.mcl_level[0]) ? ")" : "",
2212 qeth_get_cardname_short(card),
2217 static void qeth_print_status_no_portname(struct qeth_card *card)
2219 if (card->info.portname[0])
2220 dev_info(&card->gdev->dev, "Device is a%s "
2221 "card%s%s%s\nwith link type %s "
2222 "(no portname needed by interface).\n",
2223 qeth_get_cardname(card),
2224 (card->info.mcl_level[0]) ? " (level: " : "",
2225 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2226 (card->info.mcl_level[0]) ? ")" : "",
2227 qeth_get_cardname_short(card));
2229 dev_info(&card->gdev->dev, "Device is a%s "
2230 "card%s%s%s\nwith link type %s.\n",
2231 qeth_get_cardname(card),
2232 (card->info.mcl_level[0]) ? " (level: " : "",
2233 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2234 (card->info.mcl_level[0]) ? ")" : "",
2235 qeth_get_cardname_short(card));
2238 void qeth_print_status_message(struct qeth_card *card)
2240 switch (card->info.type) {
2241 case QETH_CARD_TYPE_OSAE:
2242 /* VM will use a non-zero first character
2243 * to indicate a HiperSockets like reporting
2244 * of the level OSA sets the first character to zero
2246 if (!card->info.mcl_level[0]) {
2247 sprintf(card->info.mcl_level, "%02x%02x",
2248 card->info.mcl_level[2],
2249 card->info.mcl_level[3]);
2251 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2255 case QETH_CARD_TYPE_IQD:
2256 if ((card->info.guestlan) ||
2257 (card->info.mcl_level[0] & 0x80)) {
2258 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2259 card->info.mcl_level[0]];
2260 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2261 card->info.mcl_level[1]];
2262 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2263 card->info.mcl_level[2]];
2264 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2265 card->info.mcl_level[3]];
2266 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2270 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2272 if (card->info.portname_required)
2273 qeth_print_status_with_portname(card);
2275 qeth_print_status_no_portname(card);
2277 EXPORT_SYMBOL_GPL(qeth_print_status_message);
2279 static void qeth_initialize_working_pool_list(struct qeth_card *card)
2281 struct qeth_buffer_pool_entry *entry;
2283 QETH_DBF_TEXT(TRACE, 5, "inwrklst");
2285 list_for_each_entry(entry,
2286 &card->qdio.init_pool.entry_list, init_list) {
2287 qeth_put_buffer_pool_entry(card, entry);
2291 static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2292 struct qeth_card *card)
2294 struct list_head *plh;
2295 struct qeth_buffer_pool_entry *entry;
2299 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2302 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2303 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2305 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2306 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2312 list_del_init(&entry->list);
2317 /* no free buffer in pool so take first one and swap pages */
2318 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2319 struct qeth_buffer_pool_entry, list);
2320 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2321 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2322 page = alloc_page(GFP_ATOMIC);
2326 free_page((unsigned long)entry->elements[i]);
2327 entry->elements[i] = page_address(page);
2328 if (card->options.performance_stats)
2329 card->perf_stats.sg_alloc_page_rx++;
2333 list_del_init(&entry->list);
2337 static int qeth_init_input_buffer(struct qeth_card *card,
2338 struct qeth_qdio_buffer *buf)
2340 struct qeth_buffer_pool_entry *pool_entry;
2343 pool_entry = qeth_find_free_buffer_pool_entry(card);
2348 * since the buffer is accessed only from the input_tasklet
2349 * there shouldn't be a need to synchronize; also, since we use
2350 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2354 buf->pool_entry = pool_entry;
2355 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2356 buf->buffer->element[i].length = PAGE_SIZE;
2357 buf->buffer->element[i].addr = pool_entry->elements[i];
2358 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
2359 buf->buffer->element[i].flags = SBAL_FLAGS_LAST_ENTRY;
2361 buf->buffer->element[i].flags = 0;
2366 int qeth_init_qdio_queues(struct qeth_card *card)
2371 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
2374 memset(card->qdio.in_q->qdio_bufs, 0,
2375 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2376 qeth_initialize_working_pool_list(card);
2377 /*give only as many buffers to hardware as we have buffer pool entries*/
2378 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2379 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2380 card->qdio.in_q->next_buf_to_init =
2381 card->qdio.in_buf_pool.buf_count - 1;
2382 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
2383 card->qdio.in_buf_pool.buf_count - 1);
2385 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
2388 /* outbound queue */
2389 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2390 memset(card->qdio.out_qs[i]->qdio_bufs, 0,
2391 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2392 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2393 qeth_clear_output_buffer(card->qdio.out_qs[i],
2394 &card->qdio.out_qs[i]->bufs[j]);
2396 card->qdio.out_qs[i]->card = card;
2397 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2398 card->qdio.out_qs[i]->do_pack = 0;
2399 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2400 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2401 atomic_set(&card->qdio.out_qs[i]->state,
2402 QETH_OUT_Q_UNLOCKED);
2406 EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2408 static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
2410 switch (link_type) {
2411 case QETH_LINK_TYPE_HSTR:
2418 static void qeth_fill_ipacmd_header(struct qeth_card *card,
2419 struct qeth_ipa_cmd *cmd, __u8 command,
2420 enum qeth_prot_versions prot)
2422 memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
2423 cmd->hdr.command = command;
2424 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
2425 cmd->hdr.seqno = card->seqno.ipa;
2426 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
2427 cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
2428 if (card->options.layer2)
2429 cmd->hdr.prim_version_no = 2;
2431 cmd->hdr.prim_version_no = 1;
2432 cmd->hdr.param_count = 1;
2433 cmd->hdr.prot_version = prot;
2434 cmd->hdr.ipa_supported = 0;
2435 cmd->hdr.ipa_enabled = 0;
2438 struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2439 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2441 struct qeth_cmd_buffer *iob;
2442 struct qeth_ipa_cmd *cmd;
2444 iob = qeth_wait_for_buffer(&card->write);
2445 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2446 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
2450 EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2452 void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2455 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2456 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2457 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2458 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2460 EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2462 int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2463 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2470 QETH_DBF_TEXT(TRACE, 4, "sendipa");
2472 if (card->options.layer2)
2473 if (card->info.type == QETH_CARD_TYPE_OSN)
2474 prot_type = QETH_PROT_OSN2;
2476 prot_type = QETH_PROT_LAYER2;
2478 prot_type = QETH_PROT_TCPIP;
2479 qeth_prepare_ipa_cmd(card, iob, prot_type);
2480 rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
2481 iob, reply_cb, reply_param);
2484 EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2486 static int qeth_send_startstoplan(struct qeth_card *card,
2487 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2490 struct qeth_cmd_buffer *iob;
2492 iob = qeth_get_ipacmd_buffer(card, ipacmd, prot);
2493 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
2498 int qeth_send_startlan(struct qeth_card *card)
2502 QETH_DBF_TEXT(SETUP, 2, "strtlan");
2504 rc = qeth_send_startstoplan(card, IPA_CMD_STARTLAN, 0);
2507 EXPORT_SYMBOL_GPL(qeth_send_startlan);
2509 int qeth_send_stoplan(struct qeth_card *card)
2514 * TODO: according to the IPA format document page 14,
2515 * TCP/IP (we!) never issue a STOPLAN
2518 QETH_DBF_TEXT(SETUP, 2, "stoplan");
2520 rc = qeth_send_startstoplan(card, IPA_CMD_STOPLAN, 0);
2523 EXPORT_SYMBOL_GPL(qeth_send_stoplan);
2525 int qeth_default_setadapterparms_cb(struct qeth_card *card,
2526 struct qeth_reply *reply, unsigned long data)
2528 struct qeth_ipa_cmd *cmd;
2530 QETH_DBF_TEXT(TRACE, 4, "defadpcb");
2532 cmd = (struct qeth_ipa_cmd *) data;
2533 if (cmd->hdr.return_code == 0)
2534 cmd->hdr.return_code =
2535 cmd->data.setadapterparms.hdr.return_code;
2538 EXPORT_SYMBOL_GPL(qeth_default_setadapterparms_cb);
2540 static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2541 struct qeth_reply *reply, unsigned long data)
2543 struct qeth_ipa_cmd *cmd;
2545 QETH_DBF_TEXT(TRACE, 3, "quyadpcb");
2547 cmd = (struct qeth_ipa_cmd *) data;
2548 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f)
2549 card->info.link_type =
2550 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
2551 card->options.adp.supported_funcs =
2552 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
2553 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
2556 struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
2557 __u32 command, __u32 cmdlen)
2559 struct qeth_cmd_buffer *iob;
2560 struct qeth_ipa_cmd *cmd;
2562 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
2564 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2565 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
2566 cmd->data.setadapterparms.hdr.command_code = command;
2567 cmd->data.setadapterparms.hdr.used_total = 1;
2568 cmd->data.setadapterparms.hdr.seq_no = 1;
2572 EXPORT_SYMBOL_GPL(qeth_get_adapter_cmd);
2574 int qeth_query_setadapterparms(struct qeth_card *card)
2577 struct qeth_cmd_buffer *iob;
2579 QETH_DBF_TEXT(TRACE, 3, "queryadp");
2580 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
2581 sizeof(struct qeth_ipacmd_setadpparms));
2582 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
2585 EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
2587 int qeth_check_qdio_errors(struct qeth_card *card, struct qdio_buffer *buf,
2588 unsigned int qdio_error, const char *dbftext)
2591 QETH_DBF_TEXT(TRACE, 2, dbftext);
2592 QETH_DBF_TEXT(QERR, 2, dbftext);
2593 QETH_DBF_TEXT_(QERR, 2, " F15=%02X",
2594 buf->element[15].flags & 0xff);
2595 QETH_DBF_TEXT_(QERR, 2, " F14=%02X",
2596 buf->element[14].flags & 0xff);
2597 QETH_DBF_TEXT_(QERR, 2, " qerr=%X", qdio_error);
2598 if ((buf->element[15].flags & 0xff) == 0x12) {
2599 card->stats.rx_dropped++;
2606 EXPORT_SYMBOL_GPL(qeth_check_qdio_errors);
2608 void qeth_queue_input_buffer(struct qeth_card *card, int index)
2610 struct qeth_qdio_q *queue = card->qdio.in_q;
2616 count = (index < queue->next_buf_to_init)?
2617 card->qdio.in_buf_pool.buf_count -
2618 (queue->next_buf_to_init - index) :
2619 card->qdio.in_buf_pool.buf_count -
2620 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
2621 /* only requeue at a certain threshold to avoid SIGAs */
2622 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
2623 for (i = queue->next_buf_to_init;
2624 i < queue->next_buf_to_init + count; ++i) {
2625 if (qeth_init_input_buffer(card,
2626 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
2633 if (newcount < count) {
2634 /* we are in memory shortage so we switch back to
2635 traditional skb allocation and drop packages */
2636 atomic_set(&card->force_alloc_skb, 3);
2639 atomic_add_unless(&card->force_alloc_skb, -1, 0);
2643 * according to old code it should be avoided to requeue all
2644 * 128 buffers in order to benefit from PCI avoidance.
2645 * this function keeps at least one buffer (the buffer at
2646 * 'index') un-requeued -> this buffer is the first buffer that
2647 * will be requeued the next time
2649 if (card->options.performance_stats) {
2650 card->perf_stats.inbound_do_qdio_cnt++;
2651 card->perf_stats.inbound_do_qdio_start_time =
2654 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
2655 queue->next_buf_to_init, count);
2656 if (card->options.performance_stats)
2657 card->perf_stats.inbound_do_qdio_time +=
2659 card->perf_stats.inbound_do_qdio_start_time;
2661 dev_warn(&card->gdev->dev,
2662 "QDIO reported an error, rc=%i\n", rc);
2663 QETH_DBF_TEXT(TRACE, 2, "qinberr");
2664 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
2666 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
2667 QDIO_MAX_BUFFERS_PER_Q;
2670 EXPORT_SYMBOL_GPL(qeth_queue_input_buffer);
2672 static int qeth_handle_send_error(struct qeth_card *card,
2673 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
2675 int sbalf15 = buffer->buffer->element[15].flags & 0xff;
2677 QETH_DBF_TEXT(TRACE, 6, "hdsnderr");
2678 if (card->info.type == QETH_CARD_TYPE_IQD) {
2685 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
2688 return QETH_SEND_ERROR_NONE;
2690 if ((sbalf15 >= 15) && (sbalf15 <= 31))
2691 return QETH_SEND_ERROR_RETRY;
2693 QETH_DBF_TEXT(TRACE, 1, "lnkfail");
2694 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
2695 QETH_DBF_TEXT_(TRACE, 1, "%04x %02x",
2696 (u16)qdio_err, (u8)sbalf15);
2697 return QETH_SEND_ERROR_LINK_FAILURE;
2701 * Switched to packing state if the number of used buffers on a queue
2702 * reaches a certain limit.
2704 static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
2706 if (!queue->do_pack) {
2707 if (atomic_read(&queue->used_buffers)
2708 >= QETH_HIGH_WATERMARK_PACK){
2709 /* switch non-PACKING -> PACKING */
2710 QETH_DBF_TEXT(TRACE, 6, "np->pack");
2711 if (queue->card->options.performance_stats)
2712 queue->card->perf_stats.sc_dp_p++;
2719 * Switches from packing to non-packing mode. If there is a packing
2720 * buffer on the queue this buffer will be prepared to be flushed.
2721 * In that case 1 is returned to inform the caller. If no buffer
2722 * has to be flushed, zero is returned.
2724 static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
2726 struct qeth_qdio_out_buffer *buffer;
2727 int flush_count = 0;
2729 if (queue->do_pack) {
2730 if (atomic_read(&queue->used_buffers)
2731 <= QETH_LOW_WATERMARK_PACK) {
2732 /* switch PACKING -> non-PACKING */
2733 QETH_DBF_TEXT(TRACE, 6, "pack->np");
2734 if (queue->card->options.performance_stats)
2735 queue->card->perf_stats.sc_p_dp++;
2737 /* flush packing buffers */
2738 buffer = &queue->bufs[queue->next_buf_to_fill];
2739 if ((atomic_read(&buffer->state) ==
2740 QETH_QDIO_BUF_EMPTY) &&
2741 (buffer->next_element_to_fill > 0)) {
2742 atomic_set(&buffer->state,
2743 QETH_QDIO_BUF_PRIMED);
2745 queue->next_buf_to_fill =
2746 (queue->next_buf_to_fill + 1) %
2747 QDIO_MAX_BUFFERS_PER_Q;
2755 * Called to flush a packing buffer if no more pci flags are on the queue.
2756 * Checks if there is a packing buffer and prepares it to be flushed.
2757 * In that case returns 1, otherwise zero.
2759 static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
2761 struct qeth_qdio_out_buffer *buffer;
2763 buffer = &queue->bufs[queue->next_buf_to_fill];
2764 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
2765 (buffer->next_element_to_fill > 0)) {
2766 /* it's a packing buffer */
2767 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
2768 queue->next_buf_to_fill =
2769 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
2775 static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
2778 struct qeth_qdio_out_buffer *buf;
2781 unsigned int qdio_flags;
2783 for (i = index; i < index + count; ++i) {
2784 buf = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
2785 buf->buffer->element[buf->next_element_to_fill - 1].flags |=
2786 SBAL_FLAGS_LAST_ENTRY;
2788 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
2791 if (!queue->do_pack) {
2792 if ((atomic_read(&queue->used_buffers) >=
2793 (QETH_HIGH_WATERMARK_PACK -
2794 QETH_WATERMARK_PACK_FUZZ)) &&
2795 !atomic_read(&queue->set_pci_flags_count)) {
2796 /* it's likely that we'll go to packing
2798 atomic_inc(&queue->set_pci_flags_count);
2799 buf->buffer->element[0].flags |= 0x40;
2802 if (!atomic_read(&queue->set_pci_flags_count)) {
2804 * there's no outstanding PCI any more, so we
2805 * have to request a PCI to be sure the the PCI
2806 * will wake at some time in the future then we
2807 * can flush packed buffers that might still be
2808 * hanging around, which can happen if no
2809 * further send was requested by the stack
2811 atomic_inc(&queue->set_pci_flags_count);
2812 buf->buffer->element[0].flags |= 0x40;
2817 queue->sync_iqdio_error = 0;
2818 queue->card->dev->trans_start = jiffies;
2819 if (queue->card->options.performance_stats) {
2820 queue->card->perf_stats.outbound_do_qdio_cnt++;
2821 queue->card->perf_stats.outbound_do_qdio_start_time =
2824 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
2825 if (atomic_read(&queue->set_pci_flags_count))
2826 qdio_flags |= QDIO_FLAG_PCI_OUT;
2827 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
2828 queue->queue_no, index, count);
2829 if (queue->card->options.performance_stats)
2830 queue->card->perf_stats.outbound_do_qdio_time +=
2832 queue->card->perf_stats.outbound_do_qdio_start_time;
2834 if (!(rc & QDIO_ERROR_SIGA_BUSY))
2835 queue->sync_iqdio_error = rc & 3;
2838 queue->card->stats.tx_errors += count;
2839 /* ignore temporary SIGA errors without busy condition */
2840 if (rc == QDIO_ERROR_SIGA_TARGET)
2842 QETH_DBF_TEXT(TRACE, 2, "flushbuf");
2843 QETH_DBF_TEXT_(TRACE, 2, " err%d", rc);
2844 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_DDEV_ID(queue->card));
2846 /* this must not happen under normal circumstances. if it
2847 * happens something is really wrong -> recover */
2848 qeth_schedule_recovery(queue->card);
2851 atomic_add(count, &queue->used_buffers);
2852 if (queue->card->options.performance_stats)
2853 queue->card->perf_stats.bufs_sent += count;
2856 static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
2860 int q_was_packing = 0;
2863 * check if weed have to switch to non-packing mode or if
2864 * we have to get a pci flag out on the queue
2866 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
2867 !atomic_read(&queue->set_pci_flags_count)) {
2868 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
2869 QETH_OUT_Q_UNLOCKED) {
2871 * If we get in here, there was no action in
2872 * do_send_packet. So, we check if there is a
2873 * packing buffer to be flushed here.
2875 netif_stop_queue(queue->card->dev);
2876 index = queue->next_buf_to_fill;
2877 q_was_packing = queue->do_pack;
2878 /* queue->do_pack may change */
2880 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
2882 !atomic_read(&queue->set_pci_flags_count))
2884 qeth_flush_buffers_on_no_pci(queue);
2885 if (queue->card->options.performance_stats &&
2887 queue->card->perf_stats.bufs_sent_pack +=
2890 qeth_flush_buffers(queue, index, flush_cnt);
2891 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
2896 void qeth_qdio_output_handler(struct ccw_device *ccwdev,
2897 unsigned int qdio_error, int __queue, int first_element,
2898 int count, unsigned long card_ptr)
2900 struct qeth_card *card = (struct qeth_card *) card_ptr;
2901 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
2902 struct qeth_qdio_out_buffer *buffer;
2904 unsigned qeth_send_err;
2906 QETH_DBF_TEXT(TRACE, 6, "qdouhdl");
2907 if (qdio_error & QDIO_ERROR_ACTIVATE_CHECK_CONDITION) {
2908 QETH_DBF_TEXT(TRACE, 2, "achkcond");
2909 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
2910 netif_stop_queue(card->dev);
2911 qeth_schedule_recovery(card);
2914 if (card->options.performance_stats) {
2915 card->perf_stats.outbound_handler_cnt++;
2916 card->perf_stats.outbound_handler_start_time =
2919 for (i = first_element; i < (first_element + count); ++i) {
2920 buffer = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
2921 qeth_send_err = qeth_handle_send_error(card, buffer, qdio_error);
2922 __qeth_clear_output_buffer(queue, buffer,
2923 (qeth_send_err == QETH_SEND_ERROR_RETRY) ? 1 : 0);
2925 atomic_sub(count, &queue->used_buffers);
2926 /* check if we need to do something on this outbound queue */
2927 if (card->info.type != QETH_CARD_TYPE_IQD)
2928 qeth_check_outbound_queue(queue);
2930 netif_wake_queue(queue->card->dev);
2931 if (card->options.performance_stats)
2932 card->perf_stats.outbound_handler_time += qeth_get_micros() -
2933 card->perf_stats.outbound_handler_start_time;
2935 EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
2937 int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
2938 int ipv, int cast_type)
2940 if (!ipv && (card->info.type == QETH_CARD_TYPE_OSAE))
2941 return card->qdio.default_out_queue;
2942 switch (card->qdio.no_out_queues) {
2944 if (cast_type && card->info.is_multicast_different)
2945 return card->info.is_multicast_different &
2946 (card->qdio.no_out_queues - 1);
2947 if (card->qdio.do_prio_queueing && (ipv == 4)) {
2948 const u8 tos = ip_hdr(skb)->tos;
2950 if (card->qdio.do_prio_queueing ==
2951 QETH_PRIO_Q_ING_TOS) {
2952 if (tos & IP_TOS_NOTIMPORTANT)
2954 if (tos & IP_TOS_HIGHRELIABILITY)
2956 if (tos & IP_TOS_HIGHTHROUGHPUT)
2958 if (tos & IP_TOS_LOWDELAY)
2961 if (card->qdio.do_prio_queueing ==
2962 QETH_PRIO_Q_ING_PREC)
2963 return 3 - (tos >> 6);
2964 } else if (card->qdio.do_prio_queueing && (ipv == 6)) {
2967 return card->qdio.default_out_queue;
2968 case 1: /* fallthrough for single-out-queue 1920-device */
2970 return card->qdio.default_out_queue;
2973 EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
2975 int qeth_get_elements_no(struct qeth_card *card, void *hdr,
2976 struct sk_buff *skb, int elems)
2978 int elements_needed = 0;
2980 if (skb_shinfo(skb)->nr_frags > 0)
2981 elements_needed = (skb_shinfo(skb)->nr_frags + 1);
2982 if (elements_needed == 0)
2983 elements_needed = 1 + (((((unsigned long) skb->data) %
2984 PAGE_SIZE) + skb->len) >> PAGE_SHIFT);
2985 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
2986 QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
2987 "(Number=%d / Length=%d). Discarded.\n",
2988 (elements_needed+elems), skb->len);
2991 return elements_needed;
2993 EXPORT_SYMBOL_GPL(qeth_get_elements_no);
2995 static inline void __qeth_fill_buffer(struct sk_buff *skb,
2996 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill,
2999 int length = skb->len;
3005 element = *next_element_to_fill;
3007 first_lap = (is_tso == 0 ? 1 : 0);
3010 data = skb->data + offset;
3015 while (length > 0) {
3016 /* length_here is the remaining amount of data in this page */
3017 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3018 if (length < length_here)
3019 length_here = length;
3021 buffer->element[element].addr = data;
3022 buffer->element[element].length = length_here;
3023 length -= length_here;
3026 buffer->element[element].flags = 0;
3028 buffer->element[element].flags =
3029 SBAL_FLAGS_LAST_FRAG;
3032 buffer->element[element].flags =
3033 SBAL_FLAGS_FIRST_FRAG;
3035 buffer->element[element].flags =
3036 SBAL_FLAGS_MIDDLE_FRAG;
3038 data += length_here;
3042 *next_element_to_fill = element;
3045 static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
3046 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb,
3047 struct qeth_hdr *hdr, int offset, int hd_len)
3049 struct qdio_buffer *buffer;
3050 int flush_cnt = 0, hdr_len, large_send = 0;
3052 buffer = buf->buffer;
3053 atomic_inc(&skb->users);
3054 skb_queue_tail(&buf->skb_list, skb);
3056 /*check first on TSO ....*/
3057 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) {
3058 int element = buf->next_element_to_fill;
3060 hdr_len = sizeof(struct qeth_hdr_tso) +
3061 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len;
3062 /*fill first buffer entry only with header information */
3063 buffer->element[element].addr = skb->data;
3064 buffer->element[element].length = hdr_len;
3065 buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG;
3066 buf->next_element_to_fill++;
3067 skb->data += hdr_len;
3068 skb->len -= hdr_len;
3073 int element = buf->next_element_to_fill;
3074 buffer->element[element].addr = hdr;
3075 buffer->element[element].length = sizeof(struct qeth_hdr) +
3077 buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG;
3078 buf->is_header[element] = 1;
3079 buf->next_element_to_fill++;
3082 if (skb_shinfo(skb)->nr_frags == 0)
3083 __qeth_fill_buffer(skb, buffer, large_send,
3084 (int *)&buf->next_element_to_fill, offset);
3086 __qeth_fill_buffer_frag(skb, buffer, large_send,
3087 (int *)&buf->next_element_to_fill);
3089 if (!queue->do_pack) {
3090 QETH_DBF_TEXT(TRACE, 6, "fillbfnp");
3091 /* set state to PRIMED -> will be flushed */
3092 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3095 QETH_DBF_TEXT(TRACE, 6, "fillbfpa");
3096 if (queue->card->options.performance_stats)
3097 queue->card->perf_stats.skbs_sent_pack++;
3098 if (buf->next_element_to_fill >=
3099 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
3101 * packed buffer if full -> set state PRIMED
3102 * -> will be flushed
3104 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3111 int qeth_do_send_packet_fast(struct qeth_card *card,
3112 struct qeth_qdio_out_q *queue, struct sk_buff *skb,
3113 struct qeth_hdr *hdr, int elements_needed,
3114 int offset, int hd_len)
3116 struct qeth_qdio_out_buffer *buffer;
3117 struct sk_buff *skb1;
3118 struct qeth_skb_data *retry_ctrl;
3122 /* spin until we get the queue ... */
3123 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3124 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3125 /* ... now we've got the queue */
3126 index = queue->next_buf_to_fill;
3127 buffer = &queue->bufs[queue->next_buf_to_fill];
3129 * check if buffer is empty to make sure that we do not 'overtake'
3130 * ourselves and try to fill a buffer that is already primed
3132 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
3134 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
3135 QDIO_MAX_BUFFERS_PER_Q;
3136 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3137 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
3138 qeth_flush_buffers(queue, index, 1);
3139 if (queue->sync_iqdio_error == 2) {
3140 skb1 = skb_dequeue(&buffer->skb_list);
3142 atomic_dec(&skb1->users);
3143 skb1 = skb_dequeue(&buffer->skb_list);
3145 retry_ctrl = (struct qeth_skb_data *) &skb->cb[16];
3146 if (retry_ctrl->magic != QETH_SKB_MAGIC) {
3147 retry_ctrl->magic = QETH_SKB_MAGIC;
3148 retry_ctrl->count = 0;
3150 if (retry_ctrl->count < QETH_SIGA_CC2_RETRIES) {
3151 retry_ctrl->count++;
3152 rc = dev_queue_xmit(skb);
3154 dev_kfree_skb_any(skb);
3155 QETH_DBF_TEXT(QERR, 2, "qrdrop");
3160 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3163 EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
3165 int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
3166 struct sk_buff *skb, struct qeth_hdr *hdr,
3167 int elements_needed)
3169 struct qeth_qdio_out_buffer *buffer;
3171 int flush_count = 0;
3176 /* spin until we get the queue ... */
3177 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3178 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3179 start_index = queue->next_buf_to_fill;
3180 buffer = &queue->bufs[queue->next_buf_to_fill];
3182 * check if buffer is empty to make sure that we do not 'overtake'
3183 * ourselves and try to fill a buffer that is already primed
3185 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
3186 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3189 /* check if we need to switch packing state of this queue */
3190 qeth_switch_to_packing_if_needed(queue);
3191 if (queue->do_pack) {
3193 /* does packet fit in current buffer? */
3194 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
3195 buffer->next_element_to_fill) < elements_needed) {
3196 /* ... no -> set state PRIMED */
3197 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3199 queue->next_buf_to_fill =
3200 (queue->next_buf_to_fill + 1) %
3201 QDIO_MAX_BUFFERS_PER_Q;
3202 buffer = &queue->bufs[queue->next_buf_to_fill];
3203 /* we did a step forward, so check buffer state
3205 if (atomic_read(&buffer->state) !=
3206 QETH_QDIO_BUF_EMPTY) {
3207 qeth_flush_buffers(queue, start_index,
3209 atomic_set(&queue->state,
3210 QETH_OUT_Q_UNLOCKED);
3215 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0);
3216 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
3217 QDIO_MAX_BUFFERS_PER_Q;
3220 qeth_flush_buffers(queue, start_index, flush_count);
3221 else if (!atomic_read(&queue->set_pci_flags_count))
3222 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
3224 * queue->state will go from LOCKED -> UNLOCKED or from
3225 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
3226 * (switch packing state or flush buffer to get another pci flag out).
3227 * In that case we will enter this loop
3229 while (atomic_dec_return(&queue->state)) {
3231 start_index = queue->next_buf_to_fill;
3232 /* check if we can go back to non-packing state */
3233 flush_count += qeth_switch_to_nonpacking_if_needed(queue);
3235 * check if we need to flush a packing buffer to get a pci
3236 * flag out on the queue
3238 if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
3239 flush_count += qeth_flush_buffers_on_no_pci(queue);
3241 qeth_flush_buffers(queue, start_index, flush_count);
3243 /* at this point the queue is UNLOCKED again */
3244 if (queue->card->options.performance_stats && do_pack)
3245 queue->card->perf_stats.bufs_sent_pack += flush_count;
3249 EXPORT_SYMBOL_GPL(qeth_do_send_packet);
3251 static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
3252 struct qeth_reply *reply, unsigned long data)
3254 struct qeth_ipa_cmd *cmd;
3255 struct qeth_ipacmd_setadpparms *setparms;
3257 QETH_DBF_TEXT(TRACE, 4, "prmadpcb");
3259 cmd = (struct qeth_ipa_cmd *) data;
3260 setparms = &(cmd->data.setadapterparms);
3262 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
3263 if (cmd->hdr.return_code) {
3264 QETH_DBF_TEXT_(TRACE, 4, "prmrc%2.2x", cmd->hdr.return_code);
3265 setparms->data.mode = SET_PROMISC_MODE_OFF;
3267 card->info.promisc_mode = setparms->data.mode;
3271 void qeth_setadp_promisc_mode(struct qeth_card *card)
3273 enum qeth_ipa_promisc_modes mode;
3274 struct net_device *dev = card->dev;
3275 struct qeth_cmd_buffer *iob;
3276 struct qeth_ipa_cmd *cmd;
3278 QETH_DBF_TEXT(TRACE, 4, "setprom");
3280 if (((dev->flags & IFF_PROMISC) &&
3281 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
3282 (!(dev->flags & IFF_PROMISC) &&
3283 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
3285 mode = SET_PROMISC_MODE_OFF;
3286 if (dev->flags & IFF_PROMISC)
3287 mode = SET_PROMISC_MODE_ON;
3288 QETH_DBF_TEXT_(TRACE, 4, "mode:%x", mode);
3290 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
3291 sizeof(struct qeth_ipacmd_setadpparms));
3292 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
3293 cmd->data.setadapterparms.data.mode = mode;
3294 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
3296 EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
3298 int qeth_change_mtu(struct net_device *dev, int new_mtu)
3300 struct qeth_card *card;
3303 card = dev->ml_priv;
3305 QETH_DBF_TEXT(TRACE, 4, "chgmtu");
3306 sprintf(dbf_text, "%8x", new_mtu);
3307 QETH_DBF_TEXT(TRACE, 4, dbf_text);
3311 if (new_mtu > 65535)
3313 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) &&
3314 (!qeth_mtu_is_valid(card, new_mtu)))
3319 EXPORT_SYMBOL_GPL(qeth_change_mtu);
3321 struct net_device_stats *qeth_get_stats(struct net_device *dev)
3323 struct qeth_card *card;
3325 card = dev->ml_priv;
3327 QETH_DBF_TEXT(TRACE, 5, "getstat");
3329 return &card->stats;
3331 EXPORT_SYMBOL_GPL(qeth_get_stats);
3333 static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
3334 struct qeth_reply *reply, unsigned long data)
3336 struct qeth_ipa_cmd *cmd;
3338 QETH_DBF_TEXT(TRACE, 4, "chgmaccb");
3340 cmd = (struct qeth_ipa_cmd *) data;
3341 if (!card->options.layer2 ||
3342 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
3343 memcpy(card->dev->dev_addr,
3344 &cmd->data.setadapterparms.data.change_addr.addr,
3346 card->info.mac_bits |= QETH_LAYER2_MAC_READ;
3348 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
3352 int qeth_setadpparms_change_macaddr(struct qeth_card *card)
3355 struct qeth_cmd_buffer *iob;
3356 struct qeth_ipa_cmd *cmd;
3358 QETH_DBF_TEXT(TRACE, 4, "chgmac");
3360 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
3361 sizeof(struct qeth_ipacmd_setadpparms));
3362 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3363 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
3364 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
3365 memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
3366 card->dev->dev_addr, OSA_ADDR_LEN);
3367 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
3371 EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
3373 static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
3374 struct qeth_reply *reply, unsigned long data)
3376 struct qeth_ipa_cmd *cmd;
3377 struct qeth_set_access_ctrl *access_ctrl_req;
3380 QETH_DBF_TEXT(TRACE, 4, "setaccb");
3382 cmd = (struct qeth_ipa_cmd *) data;
3383 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
3384 QETH_DBF_TEXT_(SETUP, 2, "setaccb");
3385 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
3386 QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
3387 cmd->data.setadapterparms.hdr.return_code);
3388 switch (cmd->data.setadapterparms.hdr.return_code) {
3389 case SET_ACCESS_CTRL_RC_SUCCESS:
3390 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
3391 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
3393 card->options.isolation = access_ctrl_req->subcmd_code;
3394 if (card->options.isolation == ISOLATION_MODE_NONE) {
3395 dev_info(&card->gdev->dev,
3396 "QDIO data connection isolation is deactivated\n");
3398 dev_info(&card->gdev->dev,
3399 "QDIO data connection isolation is activated\n");
3401 QETH_DBF_MESSAGE(3, "OK:SET_ACCESS_CTRL(%s, %d)==%d\n",
3402 card->gdev->dev.kobj.name,
3403 access_ctrl_req->subcmd_code,
3404 cmd->data.setadapterparms.hdr.return_code);
3408 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
3410 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n",
3411 card->gdev->dev.kobj.name,
3412 access_ctrl_req->subcmd_code,
3413 cmd->data.setadapterparms.hdr.return_code);
3414 dev_err(&card->gdev->dev, "Adapter does not "
3415 "support QDIO data connection isolation\n");
3417 /* ensure isolation mode is "none" */
3418 card->options.isolation = ISOLATION_MODE_NONE;
3422 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
3424 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n",
3425 card->gdev->dev.kobj.name,
3426 access_ctrl_req->subcmd_code,
3427 cmd->data.setadapterparms.hdr.return_code);
3428 dev_err(&card->gdev->dev,
3429 "Adapter is dedicated. "
3430 "QDIO data connection isolation not supported\n");
3432 /* ensure isolation mode is "none" */
3433 card->options.isolation = ISOLATION_MODE_NONE;
3437 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
3439 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n",
3440 card->gdev->dev.kobj.name,
3441 access_ctrl_req->subcmd_code,
3442 cmd->data.setadapterparms.hdr.return_code);
3443 dev_err(&card->gdev->dev,
3444 "TSO does not permit QDIO data connection isolation\n");
3446 /* ensure isolation mode is "none" */
3447 card->options.isolation = ISOLATION_MODE_NONE;
3453 /* this should never happen */
3454 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d"
3456 card->gdev->dev.kobj.name,
3457 access_ctrl_req->subcmd_code,
3458 cmd->data.setadapterparms.hdr.return_code);
3460 /* ensure isolation mode is "none" */
3461 card->options.isolation = ISOLATION_MODE_NONE;
3466 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
3470 static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
3471 enum qeth_ipa_isolation_modes isolation)
3474 struct qeth_cmd_buffer *iob;
3475 struct qeth_ipa_cmd *cmd;
3476 struct qeth_set_access_ctrl *access_ctrl_req;
3478 QETH_DBF_TEXT(TRACE, 4, "setacctl");
3480 QETH_DBF_TEXT_(SETUP, 2, "setacctl");
3481 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
3483 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
3484 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
3485 sizeof(struct qeth_set_access_ctrl));
3486 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3487 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
3488 access_ctrl_req->subcmd_code = isolation;
3490 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
3492 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
3496 int qeth_set_access_ctrl_online(struct qeth_card *card)
3500 QETH_DBF_TEXT(TRACE, 4, "setactlo");
3502 if (card->info.type == QETH_CARD_TYPE_OSAE &&
3503 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
3504 rc = qeth_setadpparms_set_access_ctrl(card,
3505 card->options.isolation);
3508 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed",
3509 card->gdev->dev.kobj.name,
3512 } else if (card->options.isolation != ISOLATION_MODE_NONE) {
3513 card->options.isolation = ISOLATION_MODE_NONE;
3515 dev_err(&card->gdev->dev, "Adapter does not "
3516 "support QDIO data connection isolation\n");
3521 EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
3523 void qeth_tx_timeout(struct net_device *dev)
3525 struct qeth_card *card;
3527 QETH_DBF_TEXT(TRACE, 4, "txtimeo");
3528 card = dev->ml_priv;
3529 card->stats.tx_errors++;
3530 qeth_schedule_recovery(card);
3532 EXPORT_SYMBOL_GPL(qeth_tx_timeout);
3534 int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
3536 struct qeth_card *card = dev->ml_priv;
3540 case MII_BMCR: /* Basic mode control register */
3542 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
3543 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
3544 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
3545 rc |= BMCR_SPEED100;
3547 case MII_BMSR: /* Basic mode status register */
3548 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
3549 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
3552 case MII_PHYSID1: /* PHYS ID 1 */
3553 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
3555 rc = (rc >> 5) & 0xFFFF;
3557 case MII_PHYSID2: /* PHYS ID 2 */
3558 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
3560 case MII_ADVERTISE: /* Advertisement control reg */
3563 case MII_LPA: /* Link partner ability reg */
3564 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
3565 LPA_100BASE4 | LPA_LPACK;
3567 case MII_EXPANSION: /* Expansion register */
3569 case MII_DCOUNTER: /* disconnect counter */
3571 case MII_FCSCOUNTER: /* false carrier counter */
3573 case MII_NWAYTEST: /* N-way auto-neg test register */
3575 case MII_RERRCOUNTER: /* rx error counter */
3576 rc = card->stats.rx_errors;
3578 case MII_SREVISION: /* silicon revision */
3580 case MII_RESV1: /* reserved 1 */
3582 case MII_LBRERROR: /* loopback, rx, bypass error */
3584 case MII_PHYADDR: /* physical address */
3586 case MII_RESV2: /* reserved 2 */
3588 case MII_TPISTATUS: /* TPI status for 10mbps */
3590 case MII_NCONFIG: /* network interface config */
3597 EXPORT_SYMBOL_GPL(qeth_mdio_read);
3599 static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
3600 struct qeth_cmd_buffer *iob, int len,
3601 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
3607 QETH_DBF_TEXT(TRACE, 4, "sendsnmp");
3609 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
3610 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
3611 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
3612 /* adjust PDU length fields in IPA_PDU_HEADER */
3613 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
3615 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
3616 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
3617 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
3618 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
3619 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
3620 reply_cb, reply_param);
3623 static int qeth_snmp_command_cb(struct qeth_card *card,
3624 struct qeth_reply *reply, unsigned long sdata)
3626 struct qeth_ipa_cmd *cmd;
3627 struct qeth_arp_query_info *qinfo;
3628 struct qeth_snmp_cmd *snmp;
3629 unsigned char *data;
3632 QETH_DBF_TEXT(TRACE, 3, "snpcmdcb");
3634 cmd = (struct qeth_ipa_cmd *) sdata;
3635 data = (unsigned char *)((char *)cmd - reply->offset);
3636 qinfo = (struct qeth_arp_query_info *) reply->param;
3637 snmp = &cmd->data.setadapterparms.data.snmp;
3639 if (cmd->hdr.return_code) {
3640 QETH_DBF_TEXT_(TRACE, 4, "scer1%i", cmd->hdr.return_code);
3643 if (cmd->data.setadapterparms.hdr.return_code) {
3644 cmd->hdr.return_code =
3645 cmd->data.setadapterparms.hdr.return_code;
3646 QETH_DBF_TEXT_(TRACE, 4, "scer2%i", cmd->hdr.return_code);
3649 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
3650 if (cmd->data.setadapterparms.hdr.seq_no == 1)
3651 data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
3653 data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
3655 /* check if there is enough room in userspace */
3656 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
3657 QETH_DBF_TEXT_(TRACE, 4, "scer3%i", -ENOMEM);
3658 cmd->hdr.return_code = -ENOMEM;
3661 QETH_DBF_TEXT_(TRACE, 4, "snore%i",
3662 cmd->data.setadapterparms.hdr.used_total);
3663 QETH_DBF_TEXT_(TRACE, 4, "sseqn%i",
3664 cmd->data.setadapterparms.hdr.seq_no);
3665 /*copy entries to user buffer*/
3666 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
3667 memcpy(qinfo->udata + qinfo->udata_offset,
3669 data_len + offsetof(struct qeth_snmp_cmd, data));
3670 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
3672 memcpy(qinfo->udata + qinfo->udata_offset,
3673 (char *)&snmp->request, data_len);
3675 qinfo->udata_offset += data_len;
3676 /* check if all replies received ... */
3677 QETH_DBF_TEXT_(TRACE, 4, "srtot%i",
3678 cmd->data.setadapterparms.hdr.used_total);
3679 QETH_DBF_TEXT_(TRACE, 4, "srseq%i",
3680 cmd->data.setadapterparms.hdr.seq_no);
3681 if (cmd->data.setadapterparms.hdr.seq_no <
3682 cmd->data.setadapterparms.hdr.used_total)
3687 int qeth_snmp_command(struct qeth_card *card, char __user *udata)
3689 struct qeth_cmd_buffer *iob;
3690 struct qeth_ipa_cmd *cmd;
3691 struct qeth_snmp_ureq *ureq;
3693 struct qeth_arp_query_info qinfo = {0, };
3696 QETH_DBF_TEXT(TRACE, 3, "snmpcmd");
3698 if (card->info.guestlan)
3701 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
3702 (!card->options.layer2)) {
3705 /* skip 4 bytes (data_len struct member) to get req_len */
3706 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
3708 ureq = kmalloc(req_len+sizeof(struct qeth_snmp_ureq_hdr), GFP_KERNEL);
3710 QETH_DBF_TEXT(TRACE, 2, "snmpnome");
3713 if (copy_from_user(ureq, udata,
3714 req_len + sizeof(struct qeth_snmp_ureq_hdr))) {
3718 qinfo.udata_len = ureq->hdr.data_len;
3719 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
3724 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
3726 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
3727 QETH_SNMP_SETADP_CMDLENGTH + req_len);
3728 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3729 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
3730 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
3731 qeth_snmp_command_cb, (void *)&qinfo);
3733 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
3734 QETH_CARD_IFNAME(card), rc);
3736 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
3744 EXPORT_SYMBOL_GPL(qeth_snmp_command);
3746 static inline int qeth_get_qdio_q_format(struct qeth_card *card)
3748 switch (card->info.type) {
3749 case QETH_CARD_TYPE_IQD:
3756 static int qeth_qdio_establish(struct qeth_card *card)
3758 struct qdio_initialize init_data;
3759 char *qib_param_field;
3760 struct qdio_buffer **in_sbal_ptrs;
3761 struct qdio_buffer **out_sbal_ptrs;
3765 QETH_DBF_TEXT(SETUP, 2, "qdioest");
3767 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
3769 if (!qib_param_field)
3772 qeth_create_qib_param_field(card, qib_param_field);
3773 qeth_create_qib_param_field_blkt(card, qib_param_field);
3775 in_sbal_ptrs = kmalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
3777 if (!in_sbal_ptrs) {
3778 kfree(qib_param_field);
3781 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
3782 in_sbal_ptrs[i] = (struct qdio_buffer *)
3783 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
3786 kmalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
3787 sizeof(void *), GFP_KERNEL);
3788 if (!out_sbal_ptrs) {
3789 kfree(in_sbal_ptrs);
3790 kfree(qib_param_field);
3793 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
3794 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
3795 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
3796 card->qdio.out_qs[i]->bufs[j].buffer);
3799 memset(&init_data, 0, sizeof(struct qdio_initialize));
3800 init_data.cdev = CARD_DDEV(card);
3801 init_data.q_format = qeth_get_qdio_q_format(card);
3802 init_data.qib_param_field_format = 0;
3803 init_data.qib_param_field = qib_param_field;
3804 init_data.no_input_qs = 1;
3805 init_data.no_output_qs = card->qdio.no_out_queues;
3806 init_data.input_handler = card->discipline.input_handler;
3807 init_data.output_handler = card->discipline.output_handler;
3808 init_data.int_parm = (unsigned long) card;
3809 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
3810 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
3812 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
3813 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
3814 rc = qdio_allocate(&init_data);
3816 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
3819 rc = qdio_establish(&init_data);
3821 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
3822 qdio_free(CARD_DDEV(card));
3826 kfree(out_sbal_ptrs);
3827 kfree(in_sbal_ptrs);
3828 kfree(qib_param_field);
3832 static void qeth_core_free_card(struct qeth_card *card)
3835 QETH_DBF_TEXT(SETUP, 2, "freecrd");
3836 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
3837 qeth_clean_channel(&card->read);
3838 qeth_clean_channel(&card->write);
3840 free_netdev(card->dev);
3841 kfree(card->ip_tbd_list);
3842 qeth_free_qdio_buffers(card);
3843 unregister_service_level(&card->qeth_service_level);
3847 static struct ccw_device_id qeth_ids[] = {
3848 {CCW_DEVICE(0x1731, 0x01), .driver_info = QETH_CARD_TYPE_OSAE},
3849 {CCW_DEVICE(0x1731, 0x05), .driver_info = QETH_CARD_TYPE_IQD},
3850 {CCW_DEVICE(0x1731, 0x06), .driver_info = QETH_CARD_TYPE_OSN},
3853 MODULE_DEVICE_TABLE(ccw, qeth_ids);
3855 static struct ccw_driver qeth_ccw_driver = {
3858 .probe = ccwgroup_probe_ccwdev,
3859 .remove = ccwgroup_remove_ccwdev,
3862 static int qeth_core_driver_group(const char *buf, struct device *root_dev,
3863 unsigned long driver_id)
3865 return ccwgroup_create_from_string(root_dev, driver_id,
3866 &qeth_ccw_driver, 3, buf);
3869 int qeth_core_hardsetup_card(struct qeth_card *card)
3874 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
3875 atomic_set(&card->force_alloc_skb, 0);
3878 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
3879 dev_name(&card->gdev->dev));
3880 ccw_device_set_offline(CARD_DDEV(card));
3881 ccw_device_set_offline(CARD_WDEV(card));
3882 ccw_device_set_offline(CARD_RDEV(card));
3883 rc = ccw_device_set_online(CARD_RDEV(card));
3886 rc = ccw_device_set_online(CARD_WDEV(card));
3889 rc = ccw_device_set_online(CARD_DDEV(card));
3892 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
3894 if (rc == -ERESTARTSYS) {
3895 QETH_DBF_TEXT(SETUP, 2, "break1");
3898 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
3904 qeth_init_tokens(card);
3905 qeth_init_func_level(card);
3906 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
3907 if (rc == -ERESTARTSYS) {
3908 QETH_DBF_TEXT(SETUP, 2, "break2");
3911 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
3917 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
3918 if (rc == -ERESTARTSYS) {
3919 QETH_DBF_TEXT(SETUP, 2, "break3");
3922 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
3928 rc = qeth_mpc_initialize(card);
3930 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
3935 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
3936 "an error on the device\n");
3937 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
3938 dev_name(&card->gdev->dev), rc);
3941 EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
3943 static inline int qeth_create_skb_frag(struct qdio_buffer_element *element,
3944 struct sk_buff **pskb, int offset, int *pfrag, int data_len)
3946 struct page *page = virt_to_page(element->addr);
3947 if (*pskb == NULL) {
3948 /* the upper protocol layers assume that there is data in the
3949 * skb itself. Copy a small amount (64 bytes) to make them
3951 *pskb = dev_alloc_skb(64 + ETH_HLEN);
3954 skb_reserve(*pskb, ETH_HLEN);
3955 if (data_len <= 64) {
3956 memcpy(skb_put(*pskb, data_len), element->addr + offset,
3960 memcpy(skb_put(*pskb, 64), element->addr + offset, 64);
3961 skb_fill_page_desc(*pskb, *pfrag, page, offset + 64,
3963 (*pskb)->data_len += data_len - 64;
3964 (*pskb)->len += data_len - 64;
3965 (*pskb)->truesize += data_len - 64;
3970 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
3971 (*pskb)->data_len += data_len;
3972 (*pskb)->len += data_len;
3973 (*pskb)->truesize += data_len;
3979 struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
3980 struct qdio_buffer *buffer,
3981 struct qdio_buffer_element **__element, int *__offset,
3982 struct qeth_hdr **hdr)
3984 struct qdio_buffer_element *element = *__element;
3985 int offset = *__offset;
3986 struct sk_buff *skb = NULL;
3994 /* qeth_hdr must not cross element boundaries */
3995 if (element->length < offset + sizeof(struct qeth_hdr)) {
3996 if (qeth_is_last_sbale(element))
4000 if (element->length < sizeof(struct qeth_hdr))
4003 *hdr = element->addr + offset;
4005 offset += sizeof(struct qeth_hdr);
4006 switch ((*hdr)->hdr.l2.id) {
4007 case QETH_HEADER_TYPE_LAYER2:
4008 skb_len = (*hdr)->hdr.l2.pkt_length;
4010 case QETH_HEADER_TYPE_LAYER3:
4011 skb_len = (*hdr)->hdr.l3.length;
4012 if ((card->info.link_type == QETH_LINK_TYPE_LANE_TR) ||
4013 (card->info.link_type == QETH_LINK_TYPE_HSTR))
4016 headroom = ETH_HLEN;
4018 case QETH_HEADER_TYPE_OSN:
4019 skb_len = (*hdr)->hdr.osn.pdu_length;
4020 headroom = sizeof(struct qeth_hdr);
4029 if ((skb_len >= card->options.rx_sg_cb) &&
4030 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
4031 (!atomic_read(&card->force_alloc_skb))) {
4034 skb = dev_alloc_skb(skb_len + headroom);
4038 skb_reserve(skb, headroom);
4041 data_ptr = element->addr + offset;
4043 data_len = min(skb_len, (int)(element->length - offset));
4046 if (qeth_create_skb_frag(element, &skb, offset,
4050 memcpy(skb_put(skb, data_len), data_ptr,
4054 skb_len -= data_len;
4056 if (qeth_is_last_sbale(element)) {
4057 QETH_DBF_TEXT(TRACE, 4, "unexeob");
4058 QETH_DBF_TEXT_(TRACE, 4, "%s",
4060 QETH_DBF_TEXT(QERR, 2, "unexeob");
4061 QETH_DBF_TEXT_(QERR, 2, "%s",
4063 QETH_DBF_HEX(MISC, 4, buffer, sizeof(*buffer));
4064 dev_kfree_skb_any(skb);
4065 card->stats.rx_errors++;
4070 data_ptr = element->addr;
4075 *__element = element;
4077 if (use_rx_sg && card->options.performance_stats) {
4078 card->perf_stats.sg_skbs_rx++;
4079 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
4083 if (net_ratelimit()) {
4084 QETH_DBF_TEXT(TRACE, 2, "noskbmem");
4085 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
4087 card->stats.rx_dropped++;
4090 EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
4092 static void qeth_unregister_dbf_views(void)
4095 for (x = 0; x < QETH_DBF_INFOS; x++) {
4096 debug_unregister(qeth_dbf[x].id);
4097 qeth_dbf[x].id = NULL;
4101 void qeth_dbf_longtext(enum qeth_dbf_names dbf_nix, int level, char *fmt, ...)
4103 char dbf_txt_buf[32];
4106 if (level > (qeth_dbf[dbf_nix].id)->level)
4108 va_start(args, fmt);
4109 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
4111 debug_text_event(qeth_dbf[dbf_nix].id, level, dbf_txt_buf);
4113 EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
4115 static int qeth_register_dbf_views(void)
4120 for (x = 0; x < QETH_DBF_INFOS; x++) {
4121 /* register the areas */
4122 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
4126 if (qeth_dbf[x].id == NULL) {
4127 qeth_unregister_dbf_views();
4131 /* register a view */
4132 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
4134 qeth_unregister_dbf_views();
4138 /* set a passing level */
4139 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
4145 int qeth_core_load_discipline(struct qeth_card *card,
4146 enum qeth_discipline_id discipline)
4149 switch (discipline) {
4150 case QETH_DISCIPLINE_LAYER3:
4151 card->discipline.ccwgdriver = try_then_request_module(
4152 symbol_get(qeth_l3_ccwgroup_driver),
4155 case QETH_DISCIPLINE_LAYER2:
4156 card->discipline.ccwgdriver = try_then_request_module(
4157 symbol_get(qeth_l2_ccwgroup_driver),
4161 if (!card->discipline.ccwgdriver) {
4162 dev_err(&card->gdev->dev, "There is no kernel module to "
4163 "support discipline %d\n", discipline);
4169 void qeth_core_free_discipline(struct qeth_card *card)
4171 if (card->options.layer2)
4172 symbol_put(qeth_l2_ccwgroup_driver);
4174 symbol_put(qeth_l3_ccwgroup_driver);
4175 card->discipline.ccwgdriver = NULL;
4178 static void qeth_determine_capabilities(struct qeth_card *card)
4184 QETH_DBF_TEXT(SETUP, 2, "detcapab");
4185 rc = ccw_device_set_online(CARD_DDEV(card));
4187 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4192 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
4194 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
4195 dev_name(&card->gdev->dev), rc);
4196 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4199 qeth_configure_unitaddr(card, prcd);
4200 qeth_configure_blkt_default(card, prcd);
4203 rc = qdio_get_ssqd_desc(CARD_DDEV(card), &card->ssqd);
4205 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4208 ccw_device_set_offline(CARD_DDEV(card));
4213 static int qeth_core_probe_device(struct ccwgroup_device *gdev)
4215 struct qeth_card *card;
4218 unsigned long flags;
4220 QETH_DBF_TEXT(SETUP, 2, "probedev");
4223 if (!get_device(dev))
4226 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
4228 card = qeth_alloc_card();
4230 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
4234 card->read.ccwdev = gdev->cdev[0];
4235 card->write.ccwdev = gdev->cdev[1];
4236 card->data.ccwdev = gdev->cdev[2];
4237 dev_set_drvdata(&gdev->dev, card);
4239 gdev->cdev[0]->handler = qeth_irq;
4240 gdev->cdev[1]->handler = qeth_irq;
4241 gdev->cdev[2]->handler = qeth_irq;
4243 rc = qeth_determine_card_type(card);
4245 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4248 rc = qeth_setup_card(card);
4250 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4254 if (card->info.type == QETH_CARD_TYPE_OSN) {
4255 rc = qeth_core_create_osn_attributes(dev);
4258 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2);
4260 qeth_core_remove_osn_attributes(dev);
4263 rc = card->discipline.ccwgdriver->probe(card->gdev);
4265 qeth_core_free_discipline(card);
4266 qeth_core_remove_osn_attributes(dev);
4270 rc = qeth_core_create_device_attributes(dev);
4275 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
4276 list_add_tail(&card->list, &qeth_core_card_list.list);
4277 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
4279 qeth_determine_capabilities(card);
4283 qeth_core_free_card(card);
4289 static void qeth_core_remove_device(struct ccwgroup_device *gdev)
4291 unsigned long flags;
4292 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4294 QETH_DBF_TEXT(SETUP, 2, "removedv");
4295 if (card->discipline.ccwgdriver) {
4296 card->discipline.ccwgdriver->remove(gdev);
4297 qeth_core_free_discipline(card);
4300 if (card->info.type == QETH_CARD_TYPE_OSN) {
4301 qeth_core_remove_osn_attributes(&gdev->dev);
4303 qeth_core_remove_device_attributes(&gdev->dev);
4305 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
4306 list_del(&card->list);
4307 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
4308 qeth_core_free_card(card);
4309 dev_set_drvdata(&gdev->dev, NULL);
4310 put_device(&gdev->dev);
4314 static int qeth_core_set_online(struct ccwgroup_device *gdev)
4316 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4320 if (!card->discipline.ccwgdriver) {
4321 if (card->info.type == QETH_CARD_TYPE_IQD)
4322 def_discipline = QETH_DISCIPLINE_LAYER3;
4324 def_discipline = QETH_DISCIPLINE_LAYER2;
4325 rc = qeth_core_load_discipline(card, def_discipline);
4328 rc = card->discipline.ccwgdriver->probe(card->gdev);
4332 rc = card->discipline.ccwgdriver->set_online(gdev);
4337 static int qeth_core_set_offline(struct ccwgroup_device *gdev)
4339 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4340 return card->discipline.ccwgdriver->set_offline(gdev);
4343 static void qeth_core_shutdown(struct ccwgroup_device *gdev)
4345 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4346 if (card->discipline.ccwgdriver &&
4347 card->discipline.ccwgdriver->shutdown)
4348 card->discipline.ccwgdriver->shutdown(gdev);
4351 static int qeth_core_prepare(struct ccwgroup_device *gdev)
4353 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4354 if (card->discipline.ccwgdriver &&
4355 card->discipline.ccwgdriver->prepare)
4356 return card->discipline.ccwgdriver->prepare(gdev);
4360 static void qeth_core_complete(struct ccwgroup_device *gdev)
4362 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4363 if (card->discipline.ccwgdriver &&
4364 card->discipline.ccwgdriver->complete)
4365 card->discipline.ccwgdriver->complete(gdev);
4368 static int qeth_core_freeze(struct ccwgroup_device *gdev)
4370 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4371 if (card->discipline.ccwgdriver &&
4372 card->discipline.ccwgdriver->freeze)
4373 return card->discipline.ccwgdriver->freeze(gdev);
4377 static int qeth_core_thaw(struct ccwgroup_device *gdev)
4379 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4380 if (card->discipline.ccwgdriver &&
4381 card->discipline.ccwgdriver->thaw)
4382 return card->discipline.ccwgdriver->thaw(gdev);
4386 static int qeth_core_restore(struct ccwgroup_device *gdev)
4388 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4389 if (card->discipline.ccwgdriver &&
4390 card->discipline.ccwgdriver->restore)
4391 return card->discipline.ccwgdriver->restore(gdev);
4395 static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
4396 .owner = THIS_MODULE,
4398 .driver_id = 0xD8C5E3C8,
4399 .probe = qeth_core_probe_device,
4400 .remove = qeth_core_remove_device,
4401 .set_online = qeth_core_set_online,
4402 .set_offline = qeth_core_set_offline,
4403 .shutdown = qeth_core_shutdown,
4404 .prepare = qeth_core_prepare,
4405 .complete = qeth_core_complete,
4406 .freeze = qeth_core_freeze,
4407 .thaw = qeth_core_thaw,
4408 .restore = qeth_core_restore,
4412 qeth_core_driver_group_store(struct device_driver *ddrv, const char *buf,
4416 err = qeth_core_driver_group(buf, qeth_core_root_dev,
4417 qeth_core_ccwgroup_driver.driver_id);
4424 static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
4427 const char str[ETH_GSTRING_LEN];
4428 } qeth_ethtool_stats_keys[] = {
4433 {"tx skbs no packing"},
4434 {"tx buffers no packing"},
4435 {"tx skbs packing"},
4436 {"tx buffers packing"},
4439 /* 10 */{"rx sg skbs"},
4441 {"rx sg page allocs"},
4442 {"tx large kbytes"},
4444 {"tx pk state ch n->p"},
4445 {"tx pk state ch p->n"},
4446 {"tx pk watermark low"},
4447 {"tx pk watermark high"},
4448 {"queue 0 buffer usage"},
4449 /* 20 */{"queue 1 buffer usage"},
4450 {"queue 2 buffer usage"},
4451 {"queue 3 buffer usage"},
4452 {"rx handler time"},
4453 {"rx handler count"},
4454 {"rx do_QDIO time"},
4455 {"rx do_QDIO count"},
4456 {"tx handler time"},
4457 {"tx handler count"},
4459 /* 30 */{"tx count"},
4460 {"tx do_QDIO time"},
4461 {"tx do_QDIO count"},
4466 int qeth_core_get_sset_count(struct net_device *dev, int stringset)
4468 switch (stringset) {
4470 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
4475 EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
4477 void qeth_core_get_ethtool_stats(struct net_device *dev,
4478 struct ethtool_stats *stats, u64 *data)
4480 struct qeth_card *card = dev->ml_priv;
4481 data[0] = card->stats.rx_packets -
4482 card->perf_stats.initial_rx_packets;
4483 data[1] = card->perf_stats.bufs_rec;
4484 data[2] = card->stats.tx_packets -
4485 card->perf_stats.initial_tx_packets;
4486 data[3] = card->perf_stats.bufs_sent;
4487 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
4488 - card->perf_stats.skbs_sent_pack;
4489 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
4490 data[6] = card->perf_stats.skbs_sent_pack;
4491 data[7] = card->perf_stats.bufs_sent_pack;
4492 data[8] = card->perf_stats.sg_skbs_sent;
4493 data[9] = card->perf_stats.sg_frags_sent;
4494 data[10] = card->perf_stats.sg_skbs_rx;
4495 data[11] = card->perf_stats.sg_frags_rx;
4496 data[12] = card->perf_stats.sg_alloc_page_rx;
4497 data[13] = (card->perf_stats.large_send_bytes >> 10);
4498 data[14] = card->perf_stats.large_send_cnt;
4499 data[15] = card->perf_stats.sc_dp_p;
4500 data[16] = card->perf_stats.sc_p_dp;
4501 data[17] = QETH_LOW_WATERMARK_PACK;
4502 data[18] = QETH_HIGH_WATERMARK_PACK;
4503 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
4504 data[20] = (card->qdio.no_out_queues > 1) ?
4505 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
4506 data[21] = (card->qdio.no_out_queues > 2) ?
4507 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
4508 data[22] = (card->qdio.no_out_queues > 3) ?
4509 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
4510 data[23] = card->perf_stats.inbound_time;
4511 data[24] = card->perf_stats.inbound_cnt;
4512 data[25] = card->perf_stats.inbound_do_qdio_time;
4513 data[26] = card->perf_stats.inbound_do_qdio_cnt;
4514 data[27] = card->perf_stats.outbound_handler_time;
4515 data[28] = card->perf_stats.outbound_handler_cnt;
4516 data[29] = card->perf_stats.outbound_time;
4517 data[30] = card->perf_stats.outbound_cnt;
4518 data[31] = card->perf_stats.outbound_do_qdio_time;
4519 data[32] = card->perf_stats.outbound_do_qdio_cnt;
4520 data[33] = card->perf_stats.tx_csum;
4521 data[34] = card->perf_stats.tx_lin;
4523 EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
4525 void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
4527 switch (stringset) {
4529 memcpy(data, &qeth_ethtool_stats_keys,
4530 sizeof(qeth_ethtool_stats_keys));
4537 EXPORT_SYMBOL_GPL(qeth_core_get_strings);
4539 void qeth_core_get_drvinfo(struct net_device *dev,
4540 struct ethtool_drvinfo *info)
4542 struct qeth_card *card = dev->ml_priv;
4543 if (card->options.layer2)
4544 strcpy(info->driver, "qeth_l2");
4546 strcpy(info->driver, "qeth_l3");
4548 strcpy(info->version, "1.0");
4549 strcpy(info->fw_version, card->info.mcl_level);
4550 sprintf(info->bus_info, "%s/%s/%s",
4553 CARD_DDEV_ID(card));
4555 EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
4557 int qeth_core_ethtool_get_settings(struct net_device *netdev,
4558 struct ethtool_cmd *ecmd)
4560 struct qeth_card *card = netdev->ml_priv;
4561 enum qeth_link_types link_type;
4563 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
4564 link_type = QETH_LINK_TYPE_10GBIT_ETH;
4566 link_type = card->info.link_type;
4568 ecmd->transceiver = XCVR_INTERNAL;
4569 ecmd->supported = SUPPORTED_Autoneg;
4570 ecmd->advertising = ADVERTISED_Autoneg;
4571 ecmd->duplex = DUPLEX_FULL;
4572 ecmd->autoneg = AUTONEG_ENABLE;
4574 switch (link_type) {
4575 case QETH_LINK_TYPE_FAST_ETH:
4576 case QETH_LINK_TYPE_LANE_ETH100:
4577 ecmd->supported |= SUPPORTED_10baseT_Half |
4578 SUPPORTED_10baseT_Full |
4579 SUPPORTED_100baseT_Half |
4580 SUPPORTED_100baseT_Full |
4582 ecmd->advertising |= ADVERTISED_10baseT_Half |
4583 ADVERTISED_10baseT_Full |
4584 ADVERTISED_100baseT_Half |
4585 ADVERTISED_100baseT_Full |
4587 ecmd->speed = SPEED_100;
4588 ecmd->port = PORT_TP;
4591 case QETH_LINK_TYPE_GBIT_ETH:
4592 case QETH_LINK_TYPE_LANE_ETH1000:
4593 ecmd->supported |= SUPPORTED_10baseT_Half |
4594 SUPPORTED_10baseT_Full |
4595 SUPPORTED_100baseT_Half |
4596 SUPPORTED_100baseT_Full |
4597 SUPPORTED_1000baseT_Half |
4598 SUPPORTED_1000baseT_Full |
4600 ecmd->advertising |= ADVERTISED_10baseT_Half |
4601 ADVERTISED_10baseT_Full |
4602 ADVERTISED_100baseT_Half |
4603 ADVERTISED_100baseT_Full |
4604 ADVERTISED_1000baseT_Half |
4605 ADVERTISED_1000baseT_Full |
4607 ecmd->speed = SPEED_1000;
4608 ecmd->port = PORT_FIBRE;
4611 case QETH_LINK_TYPE_10GBIT_ETH:
4612 ecmd->supported |= SUPPORTED_10baseT_Half |
4613 SUPPORTED_10baseT_Full |
4614 SUPPORTED_100baseT_Half |
4615 SUPPORTED_100baseT_Full |
4616 SUPPORTED_1000baseT_Half |
4617 SUPPORTED_1000baseT_Full |
4618 SUPPORTED_10000baseT_Full |
4620 ecmd->advertising |= ADVERTISED_10baseT_Half |
4621 ADVERTISED_10baseT_Full |
4622 ADVERTISED_100baseT_Half |
4623 ADVERTISED_100baseT_Full |
4624 ADVERTISED_1000baseT_Half |
4625 ADVERTISED_1000baseT_Full |
4626 ADVERTISED_10000baseT_Full |
4628 ecmd->speed = SPEED_10000;
4629 ecmd->port = PORT_FIBRE;
4633 ecmd->supported |= SUPPORTED_10baseT_Half |
4634 SUPPORTED_10baseT_Full |
4636 ecmd->advertising |= ADVERTISED_10baseT_Half |
4637 ADVERTISED_10baseT_Full |
4639 ecmd->speed = SPEED_10;
4640 ecmd->port = PORT_TP;
4645 EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings);
4647 static int __init qeth_core_init(void)
4651 pr_info("loading core functions\n");
4652 INIT_LIST_HEAD(&qeth_core_card_list.list);
4653 rwlock_init(&qeth_core_card_list.rwlock);
4655 rc = qeth_register_dbf_views();
4658 rc = ccw_driver_register(&qeth_ccw_driver);
4661 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
4664 rc = driver_create_file(&qeth_core_ccwgroup_driver.driver,
4665 &driver_attr_group);
4668 qeth_core_root_dev = root_device_register("qeth");
4669 rc = IS_ERR(qeth_core_root_dev) ? PTR_ERR(qeth_core_root_dev) : 0;
4673 qeth_core_header_cache = kmem_cache_create("qeth_hdr",
4674 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
4675 if (!qeth_core_header_cache) {
4682 root_device_unregister(qeth_core_root_dev);
4684 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
4685 &driver_attr_group);
4687 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
4689 ccw_driver_unregister(&qeth_ccw_driver);
4691 QETH_DBF_MESSAGE(2, "Initialization failed with code %d\n", rc);
4692 qeth_unregister_dbf_views();
4694 pr_err("Initializing the qeth device driver failed\n");
4698 static void __exit qeth_core_exit(void)
4700 root_device_unregister(qeth_core_root_dev);
4701 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
4702 &driver_attr_group);
4703 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
4704 ccw_driver_unregister(&qeth_ccw_driver);
4705 kmem_cache_destroy(qeth_core_header_cache);
4706 qeth_unregister_dbf_views();
4707 pr_info("core functions removed\n");
4710 module_init(qeth_core_init);
4711 module_exit(qeth_core_exit);
4712 MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
4713 MODULE_DESCRIPTION("qeth core functions");
4714 MODULE_LICENSE("GPL");