3 * Purpose: PCI Message Signaled Interrupt (MSI)
5 * Copyright (C) 2003-2004 Intel
6 * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
11 #include <linux/irq.h>
12 #include <linux/interrupt.h>
13 #include <linux/init.h>
14 #include <linux/ioport.h>
15 #include <linux/pci.h>
16 #include <linux/proc_fs.h>
17 #include <linux/msi.h>
18 #include <linux/smp.h>
20 #include <asm/errno.h>
26 static int pci_msi_enable = 1;
30 #ifndef arch_msi_check_device
31 int arch_msi_check_device(struct pci_dev *dev, int nvec, int type)
37 #ifndef arch_setup_msi_irqs
38 int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
40 struct msi_desc *entry;
43 list_for_each_entry(entry, &dev->msi_list, list) {
44 ret = arch_setup_msi_irq(dev, entry);
53 #ifndef arch_teardown_msi_irqs
54 void arch_teardown_msi_irqs(struct pci_dev *dev)
56 struct msi_desc *entry;
58 list_for_each_entry(entry, &dev->msi_list, list) {
60 arch_teardown_msi_irq(entry->irq);
65 static void __msi_set_enable(struct pci_dev *dev, int pos, int enable)
70 pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &control);
71 control &= ~PCI_MSI_FLAGS_ENABLE;
73 control |= PCI_MSI_FLAGS_ENABLE;
74 pci_write_config_word(dev, pos + PCI_MSI_FLAGS, control);
78 static void msi_set_enable(struct pci_dev *dev, int enable)
80 __msi_set_enable(dev, pci_find_capability(dev, PCI_CAP_ID_MSI), enable);
83 static void msix_set_enable(struct pci_dev *dev, int enable)
88 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
90 pci_read_config_word(dev, pos + PCI_MSIX_FLAGS, &control);
91 control &= ~PCI_MSIX_FLAGS_ENABLE;
93 control |= PCI_MSIX_FLAGS_ENABLE;
94 pci_write_config_word(dev, pos + PCI_MSIX_FLAGS, control);
98 static inline __attribute_const__ u32 msi_mask(unsigned x)
100 /* Don't shift by >= width of type */
103 return (1 << (1 << x)) - 1;
106 static void msix_flush_writes(struct irq_desc *desc)
108 struct msi_desc *entry;
110 entry = get_irq_desc_msi(desc);
111 BUG_ON(!entry || !entry->dev);
112 switch (entry->msi_attrib.type) {
116 case PCI_CAP_ID_MSIX:
118 int offset = entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE +
119 PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET;
120 readl(entry->mask_base + offset);
130 * PCI 2.3 does not specify mask bits for each MSI interrupt. Attempting to
131 * mask all MSI interrupts by clearing the MSI enable bit does not work
132 * reliably as devices without an INTx disable bit will then generate a
133 * level IRQ which will never be cleared.
135 * Returns 1 if it succeeded in masking the interrupt and 0 if the device
136 * doesn't support MSI masking.
138 static int msi_set_mask_bits(struct irq_desc *desc, u32 mask, u32 flag)
140 struct msi_desc *entry;
142 entry = get_irq_desc_msi(desc);
143 BUG_ON(!entry || !entry->dev);
144 switch (entry->msi_attrib.type) {
146 if (entry->msi_attrib.maskbit) {
150 pos = (long)entry->mask_base;
151 pci_read_config_dword(entry->dev, pos, &mask_bits);
152 mask_bits &= ~(mask);
153 mask_bits |= flag & mask;
154 pci_write_config_dword(entry->dev, pos, mask_bits);
159 case PCI_CAP_ID_MSIX:
161 int offset = entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE +
162 PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET;
163 writel(flag, entry->mask_base + offset);
164 readl(entry->mask_base + offset);
171 entry->msi_attrib.masked = !!flag;
175 void read_msi_msg_desc(struct irq_desc *desc, struct msi_msg *msg)
177 struct msi_desc *entry = get_irq_desc_msi(desc);
178 switch(entry->msi_attrib.type) {
181 struct pci_dev *dev = entry->dev;
182 int pos = entry->msi_attrib.pos;
185 pci_read_config_dword(dev, msi_lower_address_reg(pos),
187 if (entry->msi_attrib.is_64) {
188 pci_read_config_dword(dev, msi_upper_address_reg(pos),
190 pci_read_config_word(dev, msi_data_reg(pos, 1), &data);
193 pci_read_config_word(dev, msi_data_reg(pos, 0), &data);
198 case PCI_CAP_ID_MSIX:
201 base = entry->mask_base +
202 entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE;
204 msg->address_lo = readl(base + PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET);
205 msg->address_hi = readl(base + PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET);
206 msg->data = readl(base + PCI_MSIX_ENTRY_DATA_OFFSET);
214 void read_msi_msg(unsigned int irq, struct msi_msg *msg)
216 struct irq_desc *desc = irq_to_desc(irq);
218 read_msi_msg_desc(desc, msg);
221 void write_msi_msg_desc(struct irq_desc *desc, struct msi_msg *msg)
223 struct msi_desc *entry = get_irq_desc_msi(desc);
224 switch (entry->msi_attrib.type) {
227 struct pci_dev *dev = entry->dev;
228 int pos = entry->msi_attrib.pos;
230 pci_write_config_dword(dev, msi_lower_address_reg(pos),
232 if (entry->msi_attrib.is_64) {
233 pci_write_config_dword(dev, msi_upper_address_reg(pos),
235 pci_write_config_word(dev, msi_data_reg(pos, 1),
238 pci_write_config_word(dev, msi_data_reg(pos, 0),
243 case PCI_CAP_ID_MSIX:
246 base = entry->mask_base +
247 entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE;
249 writel(msg->address_lo,
250 base + PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET);
251 writel(msg->address_hi,
252 base + PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET);
253 writel(msg->data, base + PCI_MSIX_ENTRY_DATA_OFFSET);
262 void write_msi_msg(unsigned int irq, struct msi_msg *msg)
264 struct irq_desc *desc = irq_to_desc(irq);
266 write_msi_msg_desc(desc, msg);
269 void mask_msi_irq(unsigned int irq)
271 struct irq_desc *desc = irq_to_desc(irq);
273 msi_set_mask_bits(desc, 1, 1);
274 msix_flush_writes(desc);
277 void unmask_msi_irq(unsigned int irq)
279 struct irq_desc *desc = irq_to_desc(irq);
281 msi_set_mask_bits(desc, 1, 0);
282 msix_flush_writes(desc);
285 static int msi_free_irqs(struct pci_dev* dev);
287 static struct msi_desc* alloc_msi_entry(void)
289 struct msi_desc *entry;
291 entry = kzalloc(sizeof(struct msi_desc), GFP_KERNEL);
295 INIT_LIST_HEAD(&entry->list);
302 static void pci_intx_for_msi(struct pci_dev *dev, int enable)
304 if (!(dev->dev_flags & PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG))
305 pci_intx(dev, enable);
308 static void __pci_restore_msi_state(struct pci_dev *dev)
312 struct msi_desc *entry;
314 if (!dev->msi_enabled)
317 entry = get_irq_msi(dev->irq);
318 pos = entry->msi_attrib.pos;
320 pci_intx_for_msi(dev, 0);
321 msi_set_enable(dev, 0);
322 write_msi_msg(dev->irq, &entry->msg);
323 if (entry->msi_attrib.maskbit) {
324 struct irq_desc *desc = irq_to_desc(dev->irq);
325 msi_set_mask_bits(desc, entry->msi_attrib.maskbits_mask,
326 entry->msi_attrib.masked);
329 pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &control);
330 control &= ~PCI_MSI_FLAGS_QSIZE;
331 control |= PCI_MSI_FLAGS_ENABLE;
332 pci_write_config_word(dev, pos + PCI_MSI_FLAGS, control);
335 static void __pci_restore_msix_state(struct pci_dev *dev)
338 struct msi_desc *entry;
341 if (!dev->msix_enabled)
344 /* route the table */
345 pci_intx_for_msi(dev, 0);
346 msix_set_enable(dev, 0);
348 list_for_each_entry(entry, &dev->msi_list, list) {
349 struct irq_desc *desc = irq_to_desc(entry->irq);
350 write_msi_msg(entry->irq, &entry->msg);
351 msi_set_mask_bits(desc, 1, entry->msi_attrib.masked);
354 BUG_ON(list_empty(&dev->msi_list));
355 entry = list_entry(dev->msi_list.next, struct msi_desc, list);
356 pos = entry->msi_attrib.pos;
357 pci_read_config_word(dev, pos + PCI_MSIX_FLAGS, &control);
358 control &= ~PCI_MSIX_FLAGS_MASKALL;
359 control |= PCI_MSIX_FLAGS_ENABLE;
360 pci_write_config_word(dev, pos + PCI_MSIX_FLAGS, control);
363 void pci_restore_msi_state(struct pci_dev *dev)
365 __pci_restore_msi_state(dev);
366 __pci_restore_msix_state(dev);
368 EXPORT_SYMBOL_GPL(pci_restore_msi_state);
371 * msi_capability_init - configure device's MSI capability structure
372 * @dev: pointer to the pci_dev data structure of MSI device function
374 * Setup the MSI capability structure of device function with a single
375 * MSI irq, regardless of device function is capable of handling
376 * multiple messages. A return of zero indicates the successful setup
377 * of an entry zero with the new MSI irq or non-zero for otherwise.
379 static int msi_capability_init(struct pci_dev *dev)
381 struct msi_desc *entry;
385 msi_set_enable(dev, 0); /* Ensure msi is disabled as I set it up */
387 pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
388 pci_read_config_word(dev, msi_control_reg(pos), &control);
389 /* MSI Entry Initialization */
390 entry = alloc_msi_entry();
394 entry->msi_attrib.type = PCI_CAP_ID_MSI;
395 entry->msi_attrib.is_64 = is_64bit_address(control);
396 entry->msi_attrib.entry_nr = 0;
397 entry->msi_attrib.maskbit = is_mask_bit_support(control);
398 entry->msi_attrib.masked = 1;
399 entry->msi_attrib.default_irq = dev->irq; /* Save IOAPIC IRQ */
400 entry->msi_attrib.pos = pos;
402 if (entry->msi_attrib.maskbit) {
403 unsigned int base, maskbits, temp;
405 base = msi_mask_bits_reg(pos, entry->msi_attrib.is_64);
406 entry->mask_base = (void __iomem *)(long)base;
408 /* All MSIs are unmasked by default, Mask them all */
409 pci_read_config_dword(dev, base, &maskbits);
410 temp = msi_mask((control & PCI_MSI_FLAGS_QMASK) >> 1);
412 pci_write_config_dword(dev, base, maskbits);
413 entry->msi_attrib.maskbits_mask = temp;
415 list_add_tail(&entry->list, &dev->msi_list);
417 /* Configure MSI capability structure */
418 ret = arch_setup_msi_irqs(dev, 1, PCI_CAP_ID_MSI);
424 /* Set MSI enabled bits */
425 pci_intx_for_msi(dev, 0);
426 msi_set_enable(dev, 1);
427 dev->msi_enabled = 1;
429 dev->irq = entry->irq;
434 * msix_capability_init - configure device's MSI-X capability
435 * @dev: pointer to the pci_dev data structure of MSI-X device function
436 * @entries: pointer to an array of struct msix_entry entries
437 * @nvec: number of @entries
439 * Setup the MSI-X capability structure of device function with a
440 * single MSI-X irq. A return of zero indicates the successful setup of
441 * requested MSI-X entries with allocated irqs or non-zero for otherwise.
443 static int msix_capability_init(struct pci_dev *dev,
444 struct msix_entry *entries, int nvec)
446 struct msi_desc *entry;
447 int pos, i, j, nr_entries, ret;
448 unsigned long phys_addr;
454 msix_set_enable(dev, 0);/* Ensure msix is disabled as I set it up */
456 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
457 /* Request & Map MSI-X table region */
458 pci_read_config_word(dev, msi_control_reg(pos), &control);
459 nr_entries = multi_msix_capable(control);
461 pci_read_config_dword(dev, msix_table_offset_reg(pos), &table_offset);
462 bir = (u8)(table_offset & PCI_MSIX_FLAGS_BIRMASK);
463 table_offset &= ~PCI_MSIX_FLAGS_BIRMASK;
464 phys_addr = pci_resource_start (dev, bir) + table_offset;
465 base = ioremap_nocache(phys_addr, nr_entries * PCI_MSIX_ENTRY_SIZE);
469 /* MSI-X Table Initialization */
470 for (i = 0; i < nvec; i++) {
471 entry = alloc_msi_entry();
475 j = entries[i].entry;
476 entry->msi_attrib.type = PCI_CAP_ID_MSIX;
477 entry->msi_attrib.is_64 = 1;
478 entry->msi_attrib.entry_nr = j;
479 entry->msi_attrib.maskbit = 1;
480 entry->msi_attrib.masked = 1;
481 entry->msi_attrib.default_irq = dev->irq;
482 entry->msi_attrib.pos = pos;
484 entry->mask_base = base;
486 list_add_tail(&entry->list, &dev->msi_list);
489 ret = arch_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSIX);
492 list_for_each_entry(entry, &dev->msi_list, list) {
493 if (entry->irq != 0) {
500 /* If we had some success report the number of irqs
501 * we succeeded in setting up.
509 list_for_each_entry(entry, &dev->msi_list, list) {
510 entries[i].vector = entry->irq;
511 set_irq_msi(entry->irq, entry);
514 /* Set MSI-X enabled bits */
515 pci_intx_for_msi(dev, 0);
516 msix_set_enable(dev, 1);
517 dev->msix_enabled = 1;
523 * pci_msi_check_device - check whether MSI may be enabled on a device
524 * @dev: pointer to the pci_dev data structure of MSI device function
525 * @nvec: how many MSIs have been requested ?
526 * @type: are we checking for MSI or MSI-X ?
528 * Look at global flags, the device itself, and its parent busses
529 * to determine if MSI/-X are supported for the device. If MSI/-X is
530 * supported return 0, else return an error code.
532 static int pci_msi_check_device(struct pci_dev* dev, int nvec, int type)
537 /* MSI must be globally enabled and supported by the device */
538 if (!pci_msi_enable || !dev || dev->no_msi)
542 * You can't ask to have 0 or less MSIs configured.
544 * b) the list manipulation code assumes nvec >= 1.
549 /* Any bridge which does NOT route MSI transactions from it's
550 * secondary bus to it's primary bus must set NO_MSI flag on
551 * the secondary pci_bus.
552 * We expect only arch-specific PCI host bus controller driver
553 * or quirks for specific PCI bridges to be setting NO_MSI.
555 for (bus = dev->bus; bus; bus = bus->parent)
556 if (bus->bus_flags & PCI_BUS_FLAGS_NO_MSI)
559 ret = arch_msi_check_device(dev, nvec, type);
563 if (!pci_find_capability(dev, type))
570 * pci_enable_msi - configure device's MSI capability structure
571 * @dev: pointer to the pci_dev data structure of MSI device function
573 * Setup the MSI capability structure of device function with
574 * a single MSI irq upon its software driver call to request for
575 * MSI mode enabled on its hardware device function. A return of zero
576 * indicates the successful setup of an entry zero with the new MSI
577 * irq or non-zero for otherwise.
579 int pci_enable_msi(struct pci_dev* dev)
583 status = pci_msi_check_device(dev, 1, PCI_CAP_ID_MSI);
587 WARN_ON(!!dev->msi_enabled);
589 /* Check whether driver already requested for MSI-X irqs */
590 if (dev->msix_enabled) {
591 dev_info(&dev->dev, "can't enable MSI "
592 "(MSI-X already enabled)\n");
595 status = msi_capability_init(dev);
598 EXPORT_SYMBOL(pci_enable_msi);
600 void pci_msi_shutdown(struct pci_dev* dev)
602 struct msi_desc *entry;
604 if (!pci_msi_enable || !dev || !dev->msi_enabled)
607 msi_set_enable(dev, 0);
608 pci_intx_for_msi(dev, 1);
609 dev->msi_enabled = 0;
611 BUG_ON(list_empty(&dev->msi_list));
612 entry = list_entry(dev->msi_list.next, struct msi_desc, list);
613 /* Return the the pci reset with msi irqs unmasked */
614 if (entry->msi_attrib.maskbit) {
615 u32 mask = entry->msi_attrib.maskbits_mask;
616 struct irq_desc *desc = irq_to_desc(dev->irq);
617 msi_set_mask_bits(desc, mask, ~mask);
619 if (!entry->dev || entry->msi_attrib.type != PCI_CAP_ID_MSI)
622 /* Restore dev->irq to its default pin-assertion irq */
623 dev->irq = entry->msi_attrib.default_irq;
625 void pci_disable_msi(struct pci_dev* dev)
627 struct msi_desc *entry;
629 if (!pci_msi_enable || !dev || !dev->msi_enabled)
632 pci_msi_shutdown(dev);
634 entry = list_entry(dev->msi_list.next, struct msi_desc, list);
635 if (!entry->dev || entry->msi_attrib.type != PCI_CAP_ID_MSI)
640 EXPORT_SYMBOL(pci_disable_msi);
642 static int msi_free_irqs(struct pci_dev* dev)
644 struct msi_desc *entry, *tmp;
646 list_for_each_entry(entry, &dev->msi_list, list) {
648 BUG_ON(irq_has_action(entry->irq));
651 arch_teardown_msi_irqs(dev);
653 list_for_each_entry_safe(entry, tmp, &dev->msi_list, list) {
654 if (entry->msi_attrib.type == PCI_CAP_ID_MSIX) {
655 writel(1, entry->mask_base + entry->msi_attrib.entry_nr
656 * PCI_MSIX_ENTRY_SIZE
657 + PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET);
659 if (list_is_last(&entry->list, &dev->msi_list))
660 iounmap(entry->mask_base);
662 list_del(&entry->list);
670 * pci_msix_table_size - return the number of device's MSI-X table entries
671 * @dev: pointer to the pci_dev data structure of MSI-X device function
673 int pci_msix_table_size(struct pci_dev *dev)
678 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
682 pci_read_config_word(dev, msi_control_reg(pos), &control);
683 return multi_msix_capable(control);
687 * pci_enable_msix - configure device's MSI-X capability structure
688 * @dev: pointer to the pci_dev data structure of MSI-X device function
689 * @entries: pointer to an array of MSI-X entries
690 * @nvec: number of MSI-X irqs requested for allocation by device driver
692 * Setup the MSI-X capability structure of device function with the number
693 * of requested irqs upon its software driver call to request for
694 * MSI-X mode enabled on its hardware device function. A return of zero
695 * indicates the successful configuration of MSI-X capability structure
696 * with new allocated MSI-X irqs. A return of < 0 indicates a failure.
697 * Or a return of > 0 indicates that driver request is exceeding the number
698 * of irqs available. Driver should use the returned value to re-send
701 int pci_enable_msix(struct pci_dev* dev, struct msix_entry *entries, int nvec)
703 int status, nr_entries;
709 status = pci_msi_check_device(dev, nvec, PCI_CAP_ID_MSIX);
713 nr_entries = pci_msix_table_size(dev);
714 if (nvec > nr_entries)
717 /* Check for any invalid entries */
718 for (i = 0; i < nvec; i++) {
719 if (entries[i].entry >= nr_entries)
720 return -EINVAL; /* invalid entry */
721 for (j = i + 1; j < nvec; j++) {
722 if (entries[i].entry == entries[j].entry)
723 return -EINVAL; /* duplicate entry */
726 WARN_ON(!!dev->msix_enabled);
728 /* Check whether driver already requested for MSI irq */
729 if (dev->msi_enabled) {
730 dev_info(&dev->dev, "can't enable MSI-X "
731 "(MSI IRQ already assigned)\n");
734 status = msix_capability_init(dev, entries, nvec);
737 EXPORT_SYMBOL(pci_enable_msix);
739 static void msix_free_all_irqs(struct pci_dev *dev)
744 void pci_msix_shutdown(struct pci_dev* dev)
746 if (!pci_msi_enable || !dev || !dev->msix_enabled)
749 msix_set_enable(dev, 0);
750 pci_intx_for_msi(dev, 1);
751 dev->msix_enabled = 0;
753 void pci_disable_msix(struct pci_dev* dev)
755 if (!pci_msi_enable || !dev || !dev->msix_enabled)
758 pci_msix_shutdown(dev);
760 msix_free_all_irqs(dev);
762 EXPORT_SYMBOL(pci_disable_msix);
765 * msi_remove_pci_irq_vectors - reclaim MSI(X) irqs to unused state
766 * @dev: pointer to the pci_dev data structure of MSI(X) device function
768 * Being called during hotplug remove, from which the device function
769 * is hot-removed. All previous assigned MSI/MSI-X irqs, if
770 * allocated for this device function, are reclaimed to unused state,
771 * which may be used later on.
773 void msi_remove_pci_irq_vectors(struct pci_dev* dev)
775 if (!pci_msi_enable || !dev)
778 if (dev->msi_enabled)
781 if (dev->msix_enabled)
782 msix_free_all_irqs(dev);
785 void pci_no_msi(void)
791 * pci_msi_enabled - is MSI enabled?
793 * Returns true if MSI has not been disabled by the command-line option
796 int pci_msi_enabled(void)
798 return pci_msi_enable;
800 EXPORT_SYMBOL(pci_msi_enabled);
802 void pci_msi_init_pci_dev(struct pci_dev *dev)
804 INIT_LIST_HEAD(&dev->msi_list);