2 * This file is part of wl1271
4 * Copyright (C) 1998-2009 Texas Instruments. All rights reserved.
5 * Copyright (C) 2008-2010 Nokia Corporation
7 * Contact: Luciano Coelho <luciano.coelho@nokia.com>
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
25 #ifndef __WL1271_ACX_H__
26 #define __WL1271_ACX_H__
29 #include "wl1271_cmd.h"
31 /*************************************************************************
33 Host Interrupt Register (WiLink -> Host)
35 **************************************************************************/
36 /* HW Initiated interrupt Watchdog timer expiration */
37 #define WL1271_ACX_INTR_WATCHDOG BIT(0)
38 /* Init sequence is done (masked interrupt, detection through polling only ) */
39 #define WL1271_ACX_INTR_INIT_COMPLETE BIT(1)
40 /* Event was entered to Event MBOX #A*/
41 #define WL1271_ACX_INTR_EVENT_A BIT(2)
42 /* Event was entered to Event MBOX #B*/
43 #define WL1271_ACX_INTR_EVENT_B BIT(3)
44 /* Command processing completion*/
45 #define WL1271_ACX_INTR_CMD_COMPLETE BIT(4)
46 /* Signaling the host on HW wakeup */
47 #define WL1271_ACX_INTR_HW_AVAILABLE BIT(5)
48 /* The MISC bit is used for aggregation of RX, TxComplete and TX rate update */
49 #define WL1271_ACX_INTR_DATA BIT(6)
50 /* Trace meassge on MBOX #A */
51 #define WL1271_ACX_INTR_TRACE_A BIT(7)
52 /* Trace meassge on MBOX #B */
53 #define WL1271_ACX_INTR_TRACE_B BIT(8)
55 #define WL1271_ACX_INTR_ALL 0xFFFFFFFF
56 #define WL1271_ACX_ALL_EVENTS_VECTOR (WL1271_ACX_INTR_WATCHDOG | \
57 WL1271_ACX_INTR_INIT_COMPLETE | \
58 WL1271_ACX_INTR_EVENT_A | \
59 WL1271_ACX_INTR_EVENT_B | \
60 WL1271_ACX_INTR_CMD_COMPLETE | \
61 WL1271_ACX_INTR_HW_AVAILABLE | \
64 #define WL1271_INTR_MASK (WL1271_ACX_INTR_EVENT_A | \
65 WL1271_ACX_INTR_EVENT_B | \
66 WL1271_ACX_INTR_HW_AVAILABLE | \
69 /* Target's information element */
71 struct wl1271_cmd_header cmd;
73 /* acx (or information element) header */
76 /* payload length (not including headers */
80 struct acx_error_counter {
81 struct acx_header header;
83 /* The number of PLCP errors since the last time this */
84 /* information element was interrogated. This field is */
85 /* automatically cleared when it is interrogated.*/
88 /* The number of FCS errors since the last time this */
89 /* information element was interrogated. This field is */
90 /* automatically cleared when it is interrogated.*/
93 /* The number of MPDUs without PLCP header errors received*/
94 /* since the last time this information element was interrogated. */
95 /* This field is automatically cleared when it is interrogated.*/
98 /* the number of missed sequence numbers in the squentially */
99 /* values of frames seq numbers */
103 struct acx_revision {
104 struct acx_header header;
107 * The WiLink firmware version, an ASCII string x.x.x.x,
108 * that uniquely identifies the current firmware.
109 * The left most digit is incremented each time a
110 * significant change is made to the firmware, such as
111 * code redesign or new platform support.
112 * The second digit is incremented when major enhancements
113 * are added or major fixes are made.
114 * The third digit is incremented for each GA release.
115 * The fourth digit is incremented for each build.
116 * The first two digits identify a firmware release version,
117 * in other words, a unique set of features.
118 * The first three digits identify a GA release.
123 * This 4 byte field specifies the WiLink hardware version.
124 * bits 0 - 15: Reserved.
125 * bits 16 - 23: Version ID - The WiLink version ID
126 * (1 = first spin, 2 = second spin, and so on).
127 * bits 24 - 31: Chip ID - The WiLink chip ID.
132 enum wl1271_psm_mode {
136 /* Power save mode */
139 /* Extreme low power */
143 struct acx_sleep_auth {
144 struct acx_header header;
146 /* The sleep level authorization of the device. */
147 /* 0 - Always active*/
148 /* 1 - Power down mode: light / fast sleep*/
149 /* 2 - ELP mode: Deep / Max sleep*/
155 HOSTIF_PCI_MASTER_HOST_INDIRECT,
156 HOSTIF_PCI_MASTER_HOST_DIRECT,
159 HOSTIF_DONTCARE = 0xFF
162 #define DEFAULT_UCAST_PRIORITY 0
163 #define DEFAULT_RX_Q_PRIORITY 0
164 #define DEFAULT_NUM_STATIONS 1
165 #define DEFAULT_RXQ_PRIORITY 0 /* low 0 .. 15 high */
166 #define DEFAULT_RXQ_TYPE 0x07 /* All frames, Data/Ctrl/Mgmt */
167 #define TRACE_BUFFER_MAX_SIZE 256
169 #define DP_RX_PACKET_RING_CHUNK_SIZE 1600
170 #define DP_TX_PACKET_RING_CHUNK_SIZE 1600
171 #define DP_RX_PACKET_RING_CHUNK_NUM 2
172 #define DP_TX_PACKET_RING_CHUNK_NUM 2
173 #define DP_TX_COMPLETE_TIME_OUT 20
175 #define TX_MSDU_LIFETIME_MIN 0
176 #define TX_MSDU_LIFETIME_MAX 3000
177 #define TX_MSDU_LIFETIME_DEF 512
178 #define RX_MSDU_LIFETIME_MIN 0
179 #define RX_MSDU_LIFETIME_MAX 0xFFFFFFFF
180 #define RX_MSDU_LIFETIME_DEF 512000
182 struct acx_rx_msdu_lifetime {
183 struct acx_header header;
186 * The maximum amount of time, in TU, before the
187 * firmware discards the MSDU.
193 * RX Config Options Table
197 * 13 Copy RX Status - when set, write three receive status words
198 * to top of rx'd MPDUs.
199 * When cleared, do not write three status words (added rev 1.5)
201 * 11 RX Complete upon FCS error - when set, give rx complete
202 * interrupt for FCS errors, after the rx filtering, e.g. unicast
203 * frames not to us with FCS error will not generate an interrupt.
204 * 10 SSID Filter Enable - When set, the WiLink discards all beacon,
205 * probe request, and probe response frames with an SSID that does
206 * not match the SSID specified by the host in the START/JOIN
208 * When clear, the WiLink receives frames with any SSID.
209 * 9 Broadcast Filter Enable - When set, the WiLink discards all
210 * broadcast frames. When clear, the WiLink receives all received
213 * 5 BSSID Filter Enable - When set, the WiLink discards any frames
214 * with a BSSID that does not match the BSSID specified by the
216 * When clear, the WiLink receives frames from any BSSID.
217 * 4 MAC Addr Filter - When set, the WiLink discards any frames
218 * with a destination address that does not match the MAC address
220 * When clear, the WiLink receives frames destined to any MAC
222 * 3 Promiscuous - When set, the WiLink receives all valid frames
223 * (i.e., all frames that pass the FCS check).
224 * When clear, only frames that pass the other filters specified
226 * 2 FCS - When set, the WiLink includes the FCS with the received
228 * When cleared, the FCS is discarded.
229 * 1 PLCP header - When set, write all data from baseband to frame
230 * buffer including PHY header.
231 * 0 Reserved - Always equal to 0.
233 * RX Filter Options Table
236 * 31:12 Reserved - Always equal to 0.
237 * 11 Association - When set, the WiLink receives all association
238 * related frames (association request/response, reassocation
239 * request/response, and disassociation). When clear, these frames
241 * 10 Auth/De auth - When set, the WiLink receives all authentication
242 * and de-authentication frames. When clear, these frames are
244 * 9 Beacon - When set, the WiLink receives all beacon frames.
245 * When clear, these frames are discarded.
246 * 8 Contention Free - When set, the WiLink receives all contention
248 * When clear, these frames are discarded.
249 * 7 Control - When set, the WiLink receives all control frames.
250 * When clear, these frames are discarded.
251 * 6 Data - When set, the WiLink receives all data frames.
252 * When clear, these frames are discarded.
253 * 5 FCS Error - When set, the WiLink receives frames that have FCS
255 * When clear, these frames are discarded.
256 * 4 Management - When set, the WiLink receives all management
258 * When clear, these frames are discarded.
259 * 3 Probe Request - When set, the WiLink receives all probe request
261 * When clear, these frames are discarded.
262 * 2 Probe Response - When set, the WiLink receives all probe
264 * When clear, these frames are discarded.
265 * 1 RTS/CTS/ACK - When set, the WiLink receives all RTS, CTS and ACK
267 * When clear, these frames are discarded.
268 * 0 Rsvd Type/Sub Type - When set, the WiLink receives all frames
269 * that have reserved frame types and sub types as defined by the
270 * 802.11 specification.
271 * When clear, these frames are discarded.
273 struct acx_rx_config {
274 struct acx_header header;
276 __le32 config_options;
277 __le32 filter_options;
280 struct acx_packet_detection {
281 struct acx_header header;
290 DEFAULT_SLOT_TIME = SLOT_TIME_SHORT,
291 MAX_SLOT_TIMES = 0xFF
294 #define STATION_WONE_INDEX 0
297 struct acx_header header;
299 u8 wone_index; /* Reserved */
305 #define ACX_MC_ADDRESS_GROUP_MAX (8)
306 #define ADDRESS_GROUP_MAX_LEN (ETH_ALEN * ACX_MC_ADDRESS_GROUP_MAX)
308 struct acx_dot11_grp_addr_tbl {
309 struct acx_header header;
314 u8 mac_table[ADDRESS_GROUP_MAX_LEN];
317 struct acx_rx_timeout {
318 struct acx_header header;
320 __le16 ps_poll_timeout;
324 struct acx_rts_threshold {
325 struct acx_header header;
331 struct acx_beacon_filter_option {
332 struct acx_header header;
337 * The number of beacons without the unicast TIM
338 * bit set that the firmware buffers before
339 * signaling the host about ready frames.
340 * When set to 0 and the filter is enabled, beacons
341 * without the unicast TIM bit set are dropped.
348 * ACXBeaconFilterEntry (not 221)
349 * Byte Offset Size (Bytes) Definition
350 * =========== ============ ==========
352 * 1 1 Treatment bit mask
354 * ACXBeaconFilterEntry (221)
355 * Byte Offset Size (Bytes) Definition
356 * =========== ============ ==========
358 * 1 1 Treatment bit mask
364 * Treatment bit mask - The information element handling:
365 * bit 0 - The information element is compared and transferred
367 * bit 1 - The information element is transferred to the host
368 * with each appearance or disappearance.
369 * Note that both bits can be set at the same time.
371 #define BEACON_FILTER_TABLE_MAX_IE_NUM (32)
372 #define BEACON_FILTER_TABLE_MAX_VENDOR_SPECIFIC_IE_NUM (6)
373 #define BEACON_FILTER_TABLE_IE_ENTRY_SIZE (2)
374 #define BEACON_FILTER_TABLE_EXTRA_VENDOR_SPECIFIC_IE_SIZE (6)
375 #define BEACON_FILTER_TABLE_MAX_SIZE ((BEACON_FILTER_TABLE_MAX_IE_NUM * \
376 BEACON_FILTER_TABLE_IE_ENTRY_SIZE) + \
377 (BEACON_FILTER_TABLE_MAX_VENDOR_SPECIFIC_IE_NUM * \
378 BEACON_FILTER_TABLE_EXTRA_VENDOR_SPECIFIC_IE_SIZE))
380 struct acx_beacon_filter_ie_table {
381 struct acx_header header;
385 u8 table[BEACON_FILTER_TABLE_MAX_SIZE];
388 struct acx_conn_monit_params {
389 struct acx_header header;
391 __le32 synch_fail_thold; /* number of beacons missed */
392 __le32 bss_lose_timeout; /* number of TU's from synch fail */
395 struct acx_bt_wlan_coex {
396 struct acx_header header;
402 struct acx_bt_wlan_coex_param {
403 struct acx_header header;
405 __le32 params[CONF_SG_PARAMS_MAX];
410 struct acx_dco_itrim_params {
411 struct acx_header header;
418 struct acx_energy_detection {
419 struct acx_header header;
421 /* The RX Clear Channel Assessment threshold in the PHY */
422 __le16 rx_cca_threshold;
423 u8 tx_energy_detection;
427 struct acx_beacon_broadcast {
428 struct acx_header header;
430 __le16 beacon_rx_timeout;
431 __le16 broadcast_timeout;
433 /* Enables receiving of broadcast packets in PS mode */
434 u8 rx_broadcast_in_ps;
436 /* Consecutive PS Poll failures before updating the host */
437 u8 ps_poll_threshold;
441 struct acx_event_mask {
442 struct acx_header header;
445 __le32 high_event_mask; /* Unused */
448 #define CFG_RX_FCS BIT(2)
449 #define CFG_RX_ALL_GOOD BIT(3)
450 #define CFG_UNI_FILTER_EN BIT(4)
451 #define CFG_BSSID_FILTER_EN BIT(5)
452 #define CFG_MC_FILTER_EN BIT(6)
453 #define CFG_MC_ADDR0_EN BIT(7)
454 #define CFG_MC_ADDR1_EN BIT(8)
455 #define CFG_BC_REJECT_EN BIT(9)
456 #define CFG_SSID_FILTER_EN BIT(10)
457 #define CFG_RX_INT_FCS_ERROR BIT(11)
458 #define CFG_RX_INT_ENCRYPTED BIT(12)
459 #define CFG_RX_WR_RX_STATUS BIT(13)
460 #define CFG_RX_FILTER_NULTI BIT(14)
461 #define CFG_RX_RESERVE BIT(15)
462 #define CFG_RX_TIMESTAMP_TSF BIT(16)
464 #define CFG_RX_RSV_EN BIT(0)
465 #define CFG_RX_RCTS_ACK BIT(1)
466 #define CFG_RX_PRSP_EN BIT(2)
467 #define CFG_RX_PREQ_EN BIT(3)
468 #define CFG_RX_MGMT_EN BIT(4)
469 #define CFG_RX_FCS_ERROR BIT(5)
470 #define CFG_RX_DATA_EN BIT(6)
471 #define CFG_RX_CTL_EN BIT(7)
472 #define CFG_RX_CF_EN BIT(8)
473 #define CFG_RX_BCN_EN BIT(9)
474 #define CFG_RX_AUTH_EN BIT(10)
475 #define CFG_RX_ASSOC_EN BIT(11)
477 #define SCAN_PASSIVE BIT(0)
478 #define SCAN_5GHZ_BAND BIT(1)
479 #define SCAN_TRIGGERED BIT(2)
480 #define SCAN_PRIORITY_HIGH BIT(3)
482 /* When set, disable HW encryption */
483 #define DF_ENCRYPTION_DISABLE 0x01
484 #define DF_SNIFF_MODE_ENABLE 0x80
486 struct acx_feature_config {
487 struct acx_header header;
490 __le32 data_flow_options;
493 struct acx_current_tx_power {
494 struct acx_header header;
500 struct acx_wake_up_condition {
501 struct acx_header header;
503 u8 wake_up_event; /* Only one bit can be set */
509 struct acx_header header;
512 * To be set when associated with an AP.
518 enum acx_preamble_type {
519 ACX_PREAMBLE_LONG = 0,
520 ACX_PREAMBLE_SHORT = 1
523 struct acx_preamble {
524 struct acx_header header;
527 * When set, the WiLink transmits the frames with a short preamble and
528 * when cleared, the WiLink transmits the frames with a long preamble.
534 enum acx_ctsprotect_type {
535 CTSPROTECT_DISABLE = 0,
536 CTSPROTECT_ENABLE = 1
539 struct acx_ctsprotect {
540 struct acx_header header;
545 struct acx_tx_statistics {
546 __le32 internal_desc_overflow;
549 struct acx_rx_statistics {
555 __le32 xfr_hint_trig;
557 __le32 reset_counter;
560 struct acx_dma_statistics {
567 struct acx_isr_statistics {
568 /* host command complete */
574 /* (INT_STS_ND & INT_TRIG_RX_HEADER) */
577 /* (INT_STS_ND & INT_TRIG_RX_CMPLT) */
580 /* (INT_STS_ND & INT_TRIG_NO_RX_BUF) */
581 __le32 rx_mem_overflow;
583 /* (INT_STS_ND & INT_TRIG_S_RX_RDY) */
589 /* (INT_STS_ND & INT_TRIG_TX_PROC) */
592 /* (INT_STS_ND & INT_TRIG_DECRYPT_DONE) */
595 /* (INT_STS_ND & INT_TRIG_DMA0) */
598 /* (INT_STS_ND & INT_TRIG_DMA1) */
601 /* (INT_STS_ND & INT_TRIG_TX_EXC_CMPLT) */
602 __le32 tx_exch_complete;
604 /* (INT_STS_ND & INT_TRIG_COMMAND) */
607 /* (INT_STS_ND & INT_TRIG_RX_PROC) */
610 /* (INT_STS_ND & INT_TRIG_PM_802) */
611 __le32 hw_pm_mode_changes;
613 /* (INT_STS_ND & INT_TRIG_ACKNOWLEDGE) */
614 __le32 host_acknowledges;
616 /* (INT_STS_ND & INT_TRIG_PM_PCI) */
619 /* (INT_STS_ND & INT_TRIG_ACM_WAKEUP) */
622 /* (INT_STS_ND & INT_TRIG_LOW_RSSI) */
626 struct acx_wep_statistics {
627 /* WEP address keys configured */
628 __le32 addr_key_count;
630 /* default keys configured */
631 __le32 default_key_count;
635 /* number of times that WEP key not found on lookup */
636 __le32 key_not_found;
638 /* number of times that WEP key decryption failed */
641 /* WEP packets decrypted */
644 /* WEP decrypt interrupts */
648 #define ACX_MISSED_BEACONS_SPREAD 10
650 struct acx_pwr_statistics {
651 /* the amount of enters into power save mode (both PD & ELP) */
654 /* the amount of enters into ELP mode */
657 /* the amount of missing beacon interrupts to the host */
660 /* the amount of wake on host-access times */
663 /* the amount of wake on timer-expire */
664 __le32 wake_on_timer_exp;
666 /* the number of packets that were transmitted with PS bit set */
669 /* the number of packets that were transmitted with PS bit clear */
670 __le32 tx_without_ps;
672 /* the number of received beacons */
675 /* the number of entering into PowerOn (power save off) */
676 __le32 power_save_off;
678 /* the number of entries into power save mode */
682 * the number of exits from power save, not including failed PS
688 * the number of times the TSF counter was adjusted because
693 /* Gives statistics about the spread continuous missed beacons.
694 * The 16 LSB are dedicated for the PS mode.
695 * The 16 MSB are dedicated for the PS mode.
696 * cont_miss_bcns_spread[0] - single missed beacon.
697 * cont_miss_bcns_spread[1] - two continuous missed beacons.
698 * cont_miss_bcns_spread[2] - three continuous missed beacons.
700 * cont_miss_bcns_spread[9] - ten and more continuous missed beacons.
702 __le32 cont_miss_bcns_spread[ACX_MISSED_BEACONS_SPREAD];
704 /* the number of beacons in awake mode */
705 __le32 rcvd_awake_beacons;
708 struct acx_mic_statistics {
713 struct acx_aes_statistics {
716 __le32 encrypt_packets;
717 __le32 decrypt_packets;
718 __le32 encrypt_interrupt;
719 __le32 decrypt_interrupt;
722 struct acx_event_statistics {
729 __le32 phy_transmit_error;
733 struct acx_ps_statistics {
734 __le32 pspoll_timeouts;
735 __le32 upsd_timeouts;
736 __le32 upsd_max_sptime;
737 __le32 upsd_max_apturn;
738 __le32 pspoll_max_apturn;
739 __le32 pspoll_utilization;
740 __le32 upsd_utilization;
743 struct acx_rxpipe_statistics {
744 __le32 rx_prep_beacon_drop;
745 __le32 descr_host_int_trig_rx_data;
746 __le32 beacon_buffer_thres_host_int_trig_rx_data;
747 __le32 missed_beacon_host_int_trig_rx_data;
748 __le32 tx_xfr_host_int_trig_rx_data;
751 struct acx_statistics {
752 struct acx_header header;
754 struct acx_tx_statistics tx;
755 struct acx_rx_statistics rx;
756 struct acx_dma_statistics dma;
757 struct acx_isr_statistics isr;
758 struct acx_wep_statistics wep;
759 struct acx_pwr_statistics pwr;
760 struct acx_aes_statistics aes;
761 struct acx_mic_statistics mic;
762 struct acx_event_statistics event;
763 struct acx_ps_statistics ps;
764 struct acx_rxpipe_statistics rxpipe;
767 struct acx_rate_class {
768 __le32 enabled_rates;
769 u8 short_retry_limit;
775 #define ACX_TX_BASIC_RATE 0
776 #define ACX_TX_AP_FULL_RATE 1
777 #define ACX_TX_RATE_POLICY_CNT 2
778 struct acx_rate_policy {
779 struct acx_header header;
781 __le32 rate_class_cnt;
782 struct acx_rate_class rate_class[CONF_TX_MAX_RATE_CLASSES];
786 struct acx_header header;
795 struct acx_tid_config {
796 struct acx_header header;
806 struct acx_frag_threshold {
807 struct acx_header header;
808 __le16 frag_threshold;
812 struct acx_tx_config_options {
813 struct acx_header header;
814 __le16 tx_compl_timeout; /* msec */
815 __le16 tx_compl_threshold; /* number of packets */
818 #define ACX_RX_MEM_BLOCKS 70
819 #define ACX_TX_MIN_MEM_BLOCKS 40
820 #define ACX_TX_DESCRIPTORS 32
821 #define ACX_NUM_SSID_PROFILES 1
823 struct wl1271_acx_config_memory {
824 struct acx_header header;
827 u8 tx_min_mem_block_num;
829 u8 num_ssid_profiles;
830 __le32 total_tx_descriptors;
833 struct wl1271_acx_mem_map {
834 struct acx_header header;
839 __le32 wep_defkey_start;
840 __le32 wep_defkey_end;
842 __le32 sta_table_start;
843 __le32 sta_table_end;
845 __le32 packet_template_start;
846 __le32 packet_template_end;
848 /* Address of the TX result interface (control block) */
850 __le32 tx_result_queue_start;
852 __le32 queue_memory_start;
853 __le32 queue_memory_end;
855 __le32 packet_memory_pool_start;
856 __le32 packet_memory_pool_end;
858 __le32 debug_buffer1_start;
859 __le32 debug_buffer1_end;
861 __le32 debug_buffer2_start;
862 __le32 debug_buffer2_end;
864 /* Number of blocks FW allocated for TX packets */
865 __le32 num_tx_mem_blocks;
867 /* Number of blocks FW allocated for RX packets */
868 __le32 num_rx_mem_blocks;
870 /* the following 4 fields are valid in SLAVE mode only */
877 struct wl1271_acx_rx_config_opt {
878 struct acx_header header;
880 __le16 mblk_threshold;
888 struct wl1271_acx_bet_enable {
889 struct acx_header header;
896 #define ACX_IPV4_VERSION 4
897 #define ACX_IPV6_VERSION 6
898 #define ACX_IPV4_ADDR_SIZE 4
899 struct wl1271_acx_arp_filter {
900 struct acx_header header;
901 u8 version; /* ACX_IPV4_VERSION, ACX_IPV6_VERSION */
902 u8 enable; /* 1 to enable ARP filtering, 0 to disable */
904 u8 address[16]; /* The configured device IP address - all ARP
905 requests directed to this IP address will pass
906 through. For IPv4, the first four bytes are
910 struct wl1271_acx_pm_config {
911 struct acx_header header;
913 __le32 host_clk_settling_time;
914 u8 host_fast_wakeup_support;
918 struct wl1271_acx_keep_alive_mode {
919 struct acx_header header;
926 ACX_KEEP_ALIVE_NO_TX = 0,
927 ACX_KEEP_ALIVE_PERIOD_ONLY
931 ACX_KEEP_ALIVE_TPL_INVALID = 0,
932 ACX_KEEP_ALIVE_TPL_VALID
935 struct wl1271_acx_keep_alive_config {
936 struct acx_header header;
946 WL1271_ACX_TRIG_TYPE_LEVEL = 0,
947 WL1271_ACX_TRIG_TYPE_EDGE,
951 WL1271_ACX_TRIG_DIR_LOW = 0,
952 WL1271_ACX_TRIG_DIR_HIGH,
953 WL1271_ACX_TRIG_DIR_BIDIR,
957 WL1271_ACX_TRIG_ENABLE = 1,
958 WL1271_ACX_TRIG_DISABLE,
962 WL1271_ACX_TRIG_METRIC_RSSI_BEACON = 0,
963 WL1271_ACX_TRIG_METRIC_RSSI_DATA,
964 WL1271_ACX_TRIG_METRIC_SNR_BEACON,
965 WL1271_ACX_TRIG_METRIC_SNR_DATA,
969 WL1271_ACX_TRIG_IDX_RSSI = 0,
970 WL1271_ACX_TRIG_COUNT = 8,
973 struct wl1271_acx_rssi_snr_trigger {
974 struct acx_header header;
977 __le16 pacing; /* 0 - 60000 ms */
987 struct wl1271_acx_rssi_snr_avg_weights {
988 struct acx_header header;
996 struct wl1271_acx_fw_tsf_information {
997 struct acx_header header;
999 __le32 current_tsf_high;
1000 __le32 current_tsf_low;
1001 __le32 last_bttt_high;
1002 __le32 last_tbtt_low;
1008 ACX_WAKE_UP_CONDITIONS = 0x0002,
1009 ACX_MEM_CFG = 0x0003,
1011 ACX_AC_CFG = 0x0007,
1012 ACX_MEM_MAP = 0x0008,
1014 /* ACX_FW_REV is missing in the ref driver, but seems to work */
1015 ACX_FW_REV = 0x000D,
1016 ACX_MEDIUM_USAGE = 0x000F,
1017 ACX_RX_CFG = 0x0010,
1018 ACX_TX_QUEUE_CFG = 0x0011, /* FIXME: only used by wl1251 */
1019 ACX_STATISTICS = 0x0013, /* Debug API */
1020 ACX_PWR_CONSUMPTION_STATISTICS = 0x0014,
1021 ACX_FEATURE_CFG = 0x0015,
1022 ACX_TID_CFG = 0x001A,
1023 ACX_PS_RX_STREAMING = 0x001B,
1024 ACX_BEACON_FILTER_OPT = 0x001F,
1025 ACX_NOISE_HIST = 0x0021,
1026 ACX_HDK_VERSION = 0x0022, /* ??? */
1027 ACX_PD_THRESHOLD = 0x0023,
1028 ACX_TX_CONFIG_OPT = 0x0024,
1029 ACX_CCA_THRESHOLD = 0x0025,
1030 ACX_EVENT_MBOX_MASK = 0x0026,
1031 ACX_CONN_MONIT_PARAMS = 0x002D,
1032 ACX_CONS_TX_FAILURE = 0x002F,
1033 ACX_BCN_DTIM_OPTIONS = 0x0031,
1034 ACX_SG_ENABLE = 0x0032,
1035 ACX_SG_CFG = 0x0033,
1036 ACX_BEACON_FILTER_TABLE = 0x0038,
1037 ACX_ARP_IP_FILTER = 0x0039,
1038 ACX_ROAMING_STATISTICS_TBL = 0x003B,
1039 ACX_RATE_POLICY = 0x003D,
1040 ACX_CTS_PROTECTION = 0x003E,
1041 ACX_SLEEP_AUTH = 0x003F,
1042 ACX_PREAMBLE_TYPE = 0x0040,
1043 ACX_ERROR_CNT = 0x0041,
1044 ACX_IBSS_FILTER = 0x0044,
1045 ACX_SERVICE_PERIOD_TIMEOUT = 0x0045,
1046 ACX_TSF_INFO = 0x0046,
1047 ACX_CONFIG_PS_WMM = 0x0049,
1048 ACX_ENABLE_RX_DATA_FILTER = 0x004A,
1049 ACX_SET_RX_DATA_FILTER = 0x004B,
1050 ACX_GET_DATA_FILTER_STATISTICS = 0x004C,
1051 ACX_RX_CONFIG_OPT = 0x004E,
1052 ACX_FRAG_CFG = 0x004F,
1053 ACX_BET_ENABLE = 0x0050,
1054 ACX_RSSI_SNR_TRIGGER = 0x0051,
1055 ACX_RSSI_SNR_WEIGHTS = 0x0052,
1056 ACX_KEEP_ALIVE_MODE = 0x0053,
1057 ACX_SET_KEEP_ALIVE_CONFIG = 0x0054,
1058 ACX_BA_SESSION_RESPONDER_POLICY = 0x0055,
1059 ACX_BA_SESSION_INITIATOR_POLICY = 0x0056,
1060 ACX_PEER_HT_CAP = 0x0057,
1061 ACX_HT_BSS_OPERATION = 0x0058,
1062 ACX_COEX_ACTIVITY = 0x0059,
1063 ACX_SET_SMART_REFLEX_DEBUG = 0x005A,
1064 ACX_SET_DCO_ITRIM_PARAMS = 0x0061,
1065 DOT11_RX_MSDU_LIFE_TIME = 0x1004,
1066 DOT11_CUR_TX_PWR = 0x100D,
1067 DOT11_RX_DOT11_MODE = 0x1012,
1068 DOT11_RTS_THRESHOLD = 0x1013,
1069 DOT11_GROUP_ADDRESS_TBL = 0x1014,
1070 ACX_PM_CONFIG = 0x1016,
1072 MAX_DOT11_IE = DOT11_GROUP_ADDRESS_TBL,
1078 int wl1271_acx_wake_up_conditions(struct wl1271 *wl);
1079 int wl1271_acx_sleep_auth(struct wl1271 *wl, u8 sleep_auth);
1080 int wl1271_acx_fw_version(struct wl1271 *wl, char *buf, size_t len);
1081 int wl1271_acx_tx_power(struct wl1271 *wl, int power);
1082 int wl1271_acx_feature_cfg(struct wl1271 *wl);
1083 int wl1271_acx_mem_map(struct wl1271 *wl,
1084 struct acx_header *mem_map, size_t len);
1085 int wl1271_acx_rx_msdu_life_time(struct wl1271 *wl);
1086 int wl1271_acx_rx_config(struct wl1271 *wl, u32 config, u32 filter);
1087 int wl1271_acx_pd_threshold(struct wl1271 *wl);
1088 int wl1271_acx_slot(struct wl1271 *wl, enum acx_slot_type slot_time);
1089 int wl1271_acx_group_address_tbl(struct wl1271 *wl, bool enable,
1090 void *mc_list, u32 mc_list_len);
1091 int wl1271_acx_service_period_timeout(struct wl1271 *wl);
1092 int wl1271_acx_rts_threshold(struct wl1271 *wl, u16 rts_threshold);
1093 int wl1271_acx_dco_itrim_params(struct wl1271 *wl);
1094 int wl1271_acx_beacon_filter_opt(struct wl1271 *wl, bool enable_filter);
1095 int wl1271_acx_beacon_filter_table(struct wl1271 *wl);
1096 int wl1271_acx_conn_monit_params(struct wl1271 *wl, bool enable);
1097 int wl1271_acx_sg_enable(struct wl1271 *wl, bool enable);
1098 int wl1271_acx_sg_cfg(struct wl1271 *wl);
1099 int wl1271_acx_cca_threshold(struct wl1271 *wl);
1100 int wl1271_acx_bcn_dtim_options(struct wl1271 *wl);
1101 int wl1271_acx_aid(struct wl1271 *wl, u16 aid);
1102 int wl1271_acx_event_mbox_mask(struct wl1271 *wl, u32 event_mask);
1103 int wl1271_acx_set_preamble(struct wl1271 *wl, enum acx_preamble_type preamble);
1104 int wl1271_acx_cts_protect(struct wl1271 *wl,
1105 enum acx_ctsprotect_type ctsprotect);
1106 int wl1271_acx_statistics(struct wl1271 *wl, struct acx_statistics *stats);
1107 int wl1271_acx_rate_policies(struct wl1271 *wl);
1108 int wl1271_acx_ac_cfg(struct wl1271 *wl, u8 ac, u8 cw_min, u16 cw_max,
1109 u8 aifsn, u16 txop);
1110 int wl1271_acx_tid_cfg(struct wl1271 *wl, u8 queue_id, u8 channel_type,
1111 u8 tsid, u8 ps_scheme, u8 ack_policy,
1112 u32 apsd_conf0, u32 apsd_conf1);
1113 int wl1271_acx_frag_threshold(struct wl1271 *wl);
1114 int wl1271_acx_tx_config_options(struct wl1271 *wl);
1115 int wl1271_acx_mem_cfg(struct wl1271 *wl);
1116 int wl1271_acx_init_mem_config(struct wl1271 *wl);
1117 int wl1271_acx_init_rx_interrupt(struct wl1271 *wl);
1118 int wl1271_acx_smart_reflex(struct wl1271 *wl);
1119 int wl1271_acx_bet_enable(struct wl1271 *wl, bool enable);
1120 int wl1271_acx_arp_ip_filter(struct wl1271 *wl, bool enable, __be32 address);
1121 int wl1271_acx_pm_config(struct wl1271 *wl);
1122 int wl1271_acx_keep_alive_mode(struct wl1271 *wl, bool enable);
1123 int wl1271_acx_keep_alive_config(struct wl1271 *wl, u8 index, u8 tpl_valid);
1124 int wl1271_acx_rssi_snr_trigger(struct wl1271 *wl, bool enable,
1125 s16 thold, u8 hyst);
1126 int wl1271_acx_rssi_snr_avg_weights(struct wl1271 *wl);
1127 int wl1271_acx_tsf_info(struct wl1271 *wl, u64 *mactime);
1129 #endif /* __WL1271_ACX_H__ */