2 * Linux device driver for RTL8187
4 * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
5 * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
7 * Based on the r8187 driver, which is:
8 * Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al.
10 * Magic delays and register offsets below are taken from the original
11 * r8187 driver sources. Thanks to Realtek for their support!
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
18 #include <linux/init.h>
19 #include <linux/usb.h>
20 #include <linux/delay.h>
21 #include <linux/etherdevice.h>
22 #include <linux/eeprom_93cx6.h>
23 #include <net/mac80211.h>
26 #include "rtl8187_rtl8225.h"
28 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
29 MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
30 MODULE_DESCRIPTION("RTL8187/RTL8187B USB wireless driver");
31 MODULE_LICENSE("GPL");
33 static struct usb_device_id rtl8187_table[] __devinitdata = {
35 {USB_DEVICE(0x0b05, 0x171d), .driver_info = DEVICE_RTL8187},
37 {USB_DEVICE(0x050d, 0x705e), .driver_info = DEVICE_RTL8187B},
39 {USB_DEVICE(0x0bda, 0x8187), .driver_info = DEVICE_RTL8187},
40 {USB_DEVICE(0x0bda, 0x8189), .driver_info = DEVICE_RTL8187B},
41 {USB_DEVICE(0x0bda, 0x8197), .driver_info = DEVICE_RTL8187B},
42 {USB_DEVICE(0x0bda, 0x8198), .driver_info = DEVICE_RTL8187B},
44 {USB_DEVICE(0x0846, 0x6100), .driver_info = DEVICE_RTL8187},
45 {USB_DEVICE(0x0846, 0x6a00), .driver_info = DEVICE_RTL8187},
46 {USB_DEVICE(0x0846, 0x4260), .driver_info = DEVICE_RTL8187B},
48 {USB_DEVICE(0x03f0, 0xca02), .driver_info = DEVICE_RTL8187},
50 {USB_DEVICE(0x0df6, 0x000d), .driver_info = DEVICE_RTL8187},
54 MODULE_DEVICE_TABLE(usb, rtl8187_table);
56 static const struct ieee80211_rate rtl818x_rates[] = {
57 { .bitrate = 10, .hw_value = 0, },
58 { .bitrate = 20, .hw_value = 1, },
59 { .bitrate = 55, .hw_value = 2, },
60 { .bitrate = 110, .hw_value = 3, },
61 { .bitrate = 60, .hw_value = 4, },
62 { .bitrate = 90, .hw_value = 5, },
63 { .bitrate = 120, .hw_value = 6, },
64 { .bitrate = 180, .hw_value = 7, },
65 { .bitrate = 240, .hw_value = 8, },
66 { .bitrate = 360, .hw_value = 9, },
67 { .bitrate = 480, .hw_value = 10, },
68 { .bitrate = 540, .hw_value = 11, },
71 static const struct ieee80211_channel rtl818x_channels[] = {
72 { .center_freq = 2412 },
73 { .center_freq = 2417 },
74 { .center_freq = 2422 },
75 { .center_freq = 2427 },
76 { .center_freq = 2432 },
77 { .center_freq = 2437 },
78 { .center_freq = 2442 },
79 { .center_freq = 2447 },
80 { .center_freq = 2452 },
81 { .center_freq = 2457 },
82 { .center_freq = 2462 },
83 { .center_freq = 2467 },
84 { .center_freq = 2472 },
85 { .center_freq = 2484 },
88 static void rtl8187_iowrite_async_cb(struct urb *urb)
94 static void rtl8187_iowrite_async(struct rtl8187_priv *priv, __le16 addr,
97 struct usb_ctrlrequest *dr;
99 struct rtl8187_async_write_data {
101 struct usb_ctrlrequest dr;
105 buf = kmalloc(sizeof(*buf), GFP_ATOMIC);
109 urb = usb_alloc_urb(0, GFP_ATOMIC);
117 dr->bRequestType = RTL8187_REQT_WRITE;
118 dr->bRequest = RTL8187_REQ_SET_REG;
121 dr->wLength = cpu_to_le16(len);
123 memcpy(buf, data, len);
125 usb_fill_control_urb(urb, priv->udev, usb_sndctrlpipe(priv->udev, 0),
126 (unsigned char *)dr, buf, len,
127 rtl8187_iowrite_async_cb, buf);
128 rc = usb_submit_urb(urb, GFP_ATOMIC);
135 static inline void rtl818x_iowrite32_async(struct rtl8187_priv *priv,
136 __le32 *addr, u32 val)
138 __le32 buf = cpu_to_le32(val);
140 rtl8187_iowrite_async(priv, cpu_to_le16((unsigned long)addr),
144 void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data)
146 struct rtl8187_priv *priv = dev->priv;
151 rtl818x_iowrite8(priv, &priv->map->PHY[3], (data >> 24) & 0xFF);
152 rtl818x_iowrite8(priv, &priv->map->PHY[2], (data >> 16) & 0xFF);
153 rtl818x_iowrite8(priv, &priv->map->PHY[1], (data >> 8) & 0xFF);
154 rtl818x_iowrite8(priv, &priv->map->PHY[0], data & 0xFF);
157 static void rtl8187_tx_cb(struct urb *urb)
159 struct sk_buff *skb = (struct sk_buff *)urb->context;
160 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
161 struct ieee80211_hw *hw = info->rate_driver_data[0];
162 struct rtl8187_priv *priv = hw->priv;
164 usb_free_urb(info->rate_driver_data[1]);
165 skb_pull(skb, priv->is_rtl8187b ? sizeof(struct rtl8187b_tx_hdr) :
166 sizeof(struct rtl8187_tx_hdr));
167 ieee80211_tx_info_clear_status(info);
168 info->flags |= IEEE80211_TX_STAT_ACK;
169 ieee80211_tx_status_irqsafe(hw, skb);
172 static int rtl8187_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
174 struct rtl8187_priv *priv = dev->priv;
175 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
183 urb = usb_alloc_urb(0, GFP_ATOMIC);
190 flags |= RTL818X_TX_DESC_FLAG_NO_ENC;
192 flags |= ieee80211_get_tx_rate(dev, info)->hw_value << 24;
193 if (ieee80211_has_morefrags(((struct ieee80211_hdr *)skb->data)->frame_control))
194 flags |= RTL818X_TX_DESC_FLAG_MOREFRAG;
195 if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
196 flags |= RTL818X_TX_DESC_FLAG_RTS;
197 flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
198 rts_dur = ieee80211_rts_duration(dev, priv->vif,
200 } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
201 flags |= RTL818X_TX_DESC_FLAG_CTS;
202 flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
205 if (!priv->is_rtl8187b) {
206 struct rtl8187_tx_hdr *hdr =
207 (struct rtl8187_tx_hdr *)skb_push(skb, sizeof(*hdr));
208 hdr->flags = cpu_to_le32(flags);
210 hdr->rts_duration = rts_dur;
211 hdr->retry = cpu_to_le32((info->control.rates[0].count - 1) << 8);
216 /* fc needs to be calculated before skb_push() */
217 unsigned int epmap[4] = { 6, 7, 5, 4 };
218 struct ieee80211_hdr *tx_hdr =
219 (struct ieee80211_hdr *)(skb->data);
220 u16 fc = le16_to_cpu(tx_hdr->frame_control);
222 struct rtl8187b_tx_hdr *hdr =
223 (struct rtl8187b_tx_hdr *)skb_push(skb, sizeof(*hdr));
224 struct ieee80211_rate *txrate =
225 ieee80211_get_tx_rate(dev, info);
226 memset(hdr, 0, sizeof(*hdr));
227 hdr->flags = cpu_to_le32(flags);
228 hdr->rts_duration = rts_dur;
229 hdr->retry = cpu_to_le32((info->control.rates[0].count - 1) << 8);
231 ieee80211_generic_frame_duration(dev, priv->vif,
235 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
238 ep = epmap[skb_get_queue_mapping(skb)];
241 info->rate_driver_data[0] = dev;
242 info->rate_driver_data[1] = urb;
244 usb_fill_bulk_urb(urb, priv->udev, usb_sndbulkpipe(priv->udev, ep),
245 buf, skb->len, rtl8187_tx_cb, skb);
246 rc = usb_submit_urb(urb, GFP_ATOMIC);
255 static void rtl8187_rx_cb(struct urb *urb)
257 struct sk_buff *skb = (struct sk_buff *)urb->context;
258 struct rtl8187_rx_info *info = (struct rtl8187_rx_info *)skb->cb;
259 struct ieee80211_hw *dev = info->dev;
260 struct rtl8187_priv *priv = dev->priv;
261 struct ieee80211_rx_status rx_status = { 0 };
266 spin_lock(&priv->rx_queue.lock);
268 __skb_unlink(skb, &priv->rx_queue);
270 spin_unlock(&priv->rx_queue.lock);
273 spin_unlock(&priv->rx_queue.lock);
275 if (unlikely(urb->status)) {
277 dev_kfree_skb_irq(skb);
281 skb_put(skb, urb->actual_length);
282 if (!priv->is_rtl8187b) {
283 struct rtl8187_rx_hdr *hdr =
284 (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr));
285 flags = le32_to_cpu(hdr->flags);
286 signal = hdr->signal & 0x7f;
287 rx_status.antenna = (hdr->signal >> 7) & 1;
288 rx_status.noise = hdr->noise;
289 rx_status.mactime = le64_to_cpu(hdr->mac_time);
290 priv->quality = signal;
291 rx_status.qual = priv->quality;
292 priv->noise = hdr->noise;
293 rate = (flags >> 20) & 0xF;
294 if (rate > 3) { /* OFDM rate */
297 else if (signal < 25)
299 signal = 90 - signal;
300 } else { /* CCK rate */
303 else if (signal < 30)
305 signal = 95 - signal;
307 rx_status.signal = signal;
308 priv->signal = signal;
310 struct rtl8187b_rx_hdr *hdr =
311 (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr));
312 /* The Realtek datasheet for the RTL8187B shows that the RX
313 * header contains the following quantities: signal quality,
314 * RSSI, AGC, the received power in dB, and the measured SNR.
315 * In testing, none of these quantities show qualitative
316 * agreement with AP signal strength, except for the AGC,
317 * which is inversely proportional to the strength of the
318 * signal. In the following, the quality and signal strength
319 * are derived from the AGC. The arbitrary scaling constants
320 * are chosen to make the results close to the values obtained
321 * for a BCM4312 using b43 as the driver. The noise is ignored
324 flags = le32_to_cpu(hdr->flags);
325 quality = 170 - hdr->agc;
328 signal = 14 - hdr->agc / 2;
329 rx_status.qual = quality;
330 priv->quality = quality;
331 rx_status.signal = signal;
332 priv->signal = signal;
333 rx_status.antenna = (hdr->rssi >> 7) & 1;
334 rx_status.mactime = le64_to_cpu(hdr->mac_time);
335 rate = (flags >> 20) & 0xF;
338 skb_trim(skb, flags & 0x0FFF);
339 rx_status.rate_idx = rate;
340 rx_status.freq = dev->conf.channel->center_freq;
341 rx_status.band = dev->conf.channel->band;
342 rx_status.flag |= RX_FLAG_TSFT;
343 if (flags & RTL818X_RX_DESC_FLAG_CRC32_ERR)
344 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
345 ieee80211_rx_irqsafe(dev, skb, &rx_status);
347 skb = dev_alloc_skb(RTL8187_MAX_RX);
348 if (unlikely(!skb)) {
350 /* TODO check rx queue length and refill *somewhere* */
354 info = (struct rtl8187_rx_info *)skb->cb;
357 urb->transfer_buffer = skb_tail_pointer(skb);
359 skb_queue_tail(&priv->rx_queue, skb);
361 usb_submit_urb(urb, GFP_ATOMIC);
364 static int rtl8187_init_urbs(struct ieee80211_hw *dev)
366 struct rtl8187_priv *priv = dev->priv;
369 struct rtl8187_rx_info *info;
371 while (skb_queue_len(&priv->rx_queue) < 8) {
372 skb = __dev_alloc_skb(RTL8187_MAX_RX, GFP_KERNEL);
375 entry = usb_alloc_urb(0, GFP_KERNEL);
380 usb_fill_bulk_urb(entry, priv->udev,
381 usb_rcvbulkpipe(priv->udev,
382 priv->is_rtl8187b ? 3 : 1),
383 skb_tail_pointer(skb),
384 RTL8187_MAX_RX, rtl8187_rx_cb, skb);
385 info = (struct rtl8187_rx_info *)skb->cb;
388 skb_queue_tail(&priv->rx_queue, skb);
389 usb_submit_urb(entry, GFP_KERNEL);
395 static int rtl8187_cmd_reset(struct ieee80211_hw *dev)
397 struct rtl8187_priv *priv = dev->priv;
401 reg = rtl818x_ioread8(priv, &priv->map->CMD);
403 reg |= RTL818X_CMD_RESET;
404 rtl818x_iowrite8(priv, &priv->map->CMD, reg);
409 if (!(rtl818x_ioread8(priv, &priv->map->CMD) &
415 printk(KERN_ERR "%s: Reset timeout!\n", wiphy_name(dev->wiphy));
419 /* reload registers from eeprom */
420 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD);
425 if (!(rtl818x_ioread8(priv, &priv->map->EEPROM_CMD) &
426 RTL818X_EEPROM_CMD_CONFIG))
431 printk(KERN_ERR "%s: eeprom reset timeout!\n",
432 wiphy_name(dev->wiphy));
439 static int rtl8187_init_hw(struct ieee80211_hw *dev)
441 struct rtl8187_priv *priv = dev->priv;
446 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
447 RTL818X_EEPROM_CMD_CONFIG);
448 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
449 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg |
450 RTL818X_CONFIG3_ANAPARAM_WRITE);
451 rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
452 RTL8187_RTL8225_ANAPARAM_ON);
453 rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
454 RTL8187_RTL8225_ANAPARAM2_ON);
455 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg &
456 ~RTL818X_CONFIG3_ANAPARAM_WRITE);
457 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
458 RTL818X_EEPROM_CMD_NORMAL);
460 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
463 rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x10);
464 rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x11);
465 rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x00);
468 res = rtl8187_cmd_reset(dev);
472 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
473 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
474 rtl818x_iowrite8(priv, &priv->map->CONFIG3,
475 reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
476 rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
477 RTL8187_RTL8225_ANAPARAM_ON);
478 rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
479 RTL8187_RTL8225_ANAPARAM2_ON);
480 rtl818x_iowrite8(priv, &priv->map->CONFIG3,
481 reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
482 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
485 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
486 rtl818x_iowrite8(priv, &priv->map->GPIO, 0);
488 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
489 rtl818x_iowrite8(priv, &priv->map->GPIO, 1);
490 rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
492 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
494 rtl818x_iowrite16(priv, (__le16 *)0xFFF4, 0xFFFF);
495 reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
498 rtl818x_iowrite8(priv, &priv->map->CONFIG1, reg);
500 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
502 rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
503 rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
504 rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0x81);
506 // TODO: set RESP_RATE and BRSR properly
507 rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0);
508 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
511 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
512 rtl818x_iowrite8(priv, &priv->map->GPIO, 0);
513 reg = rtl818x_ioread8(priv, (u8 *)0xFE53);
514 rtl818x_iowrite8(priv, (u8 *)0xFE53, reg | (1 << 7));
515 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
516 rtl818x_iowrite8(priv, &priv->map->GPIO, 0x20);
517 rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
518 rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x80);
519 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x80);
520 rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x80);
523 rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x000a8008);
524 rtl818x_iowrite16(priv, &priv->map->BRSR, 0xFFFF);
525 rtl818x_iowrite32(priv, &priv->map->RF_PARA, 0x00100044);
526 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
527 RTL818X_EEPROM_CMD_CONFIG);
528 rtl818x_iowrite8(priv, &priv->map->CONFIG3, 0x44);
529 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
530 RTL818X_EEPROM_CMD_NORMAL);
531 rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FF7);
536 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
537 reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
538 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
539 rtl818x_iowrite16(priv, (__le16 *)0xFFFE, 0x10);
540 rtl818x_iowrite8(priv, &priv->map->TALLY_SEL, 0x80);
541 rtl818x_iowrite8(priv, (u8 *)0xFFFF, 0x60);
542 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
547 static const u8 rtl8187b_reg_table[][3] = {
548 {0xF0, 0x32, 0}, {0xF1, 0x32, 0}, {0xF2, 0x00, 0}, {0xF3, 0x00, 0},
549 {0xF4, 0x32, 0}, {0xF5, 0x43, 0}, {0xF6, 0x00, 0}, {0xF7, 0x00, 0},
550 {0xF8, 0x46, 0}, {0xF9, 0xA4, 0}, {0xFA, 0x00, 0}, {0xFB, 0x00, 0},
551 {0xFC, 0x96, 0}, {0xFD, 0xA4, 0}, {0xFE, 0x00, 0}, {0xFF, 0x00, 0},
553 {0x58, 0x4B, 1}, {0x59, 0x00, 1}, {0x5A, 0x4B, 1}, {0x5B, 0x00, 1},
554 {0x60, 0x4B, 1}, {0x61, 0x09, 1}, {0x62, 0x4B, 1}, {0x63, 0x09, 1},
555 {0xCE, 0x0F, 1}, {0xCF, 0x00, 1}, {0xE0, 0xFF, 1}, {0xE1, 0x0F, 1},
556 {0xE2, 0x00, 1}, {0xF0, 0x4E, 1}, {0xF1, 0x01, 1}, {0xF2, 0x02, 1},
557 {0xF3, 0x03, 1}, {0xF4, 0x04, 1}, {0xF5, 0x05, 1}, {0xF6, 0x06, 1},
558 {0xF7, 0x07, 1}, {0xF8, 0x08, 1},
560 {0x4E, 0x00, 2}, {0x0C, 0x04, 2}, {0x21, 0x61, 2}, {0x22, 0x68, 2},
561 {0x23, 0x6F, 2}, {0x24, 0x76, 2}, {0x25, 0x7D, 2}, {0x26, 0x84, 2},
562 {0x27, 0x8D, 2}, {0x4D, 0x08, 2}, {0x50, 0x05, 2}, {0x51, 0xF5, 2},
563 {0x52, 0x04, 2}, {0x53, 0xA0, 2}, {0x54, 0x1F, 2}, {0x55, 0x23, 2},
564 {0x56, 0x45, 2}, {0x57, 0x67, 2}, {0x58, 0x08, 2}, {0x59, 0x08, 2},
565 {0x5A, 0x08, 2}, {0x5B, 0x08, 2}, {0x60, 0x08, 2}, {0x61, 0x08, 2},
566 {0x62, 0x08, 2}, {0x63, 0x08, 2}, {0x64, 0xCF, 2}, {0x72, 0x56, 2},
569 {0x34, 0xF0, 0}, {0x35, 0x0F, 0}, {0x5B, 0x40, 0}, {0x84, 0x88, 0},
570 {0x85, 0x24, 0}, {0x88, 0x54, 0}, {0x8B, 0xB8, 0}, {0x8C, 0x07, 0},
571 {0x8D, 0x00, 0}, {0x94, 0x1B, 0}, {0x95, 0x12, 0}, {0x96, 0x00, 0},
572 {0x97, 0x06, 0}, {0x9D, 0x1A, 0}, {0x9F, 0x10, 0}, {0xB4, 0x22, 0},
573 {0xBE, 0x80, 0}, {0xDB, 0x00, 0}, {0xEE, 0x00, 0}, {0x91, 0x03, 0},
575 {0x4C, 0x00, 2}, {0x9F, 0x00, 3}, {0x8C, 0x01, 0}, {0x8D, 0x10, 0},
576 {0x8E, 0x08, 0}, {0x8F, 0x00, 0}
579 static int rtl8187b_init_hw(struct ieee80211_hw *dev)
581 struct rtl8187_priv *priv = dev->priv;
585 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
586 RTL818X_EEPROM_CMD_CONFIG);
588 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
589 reg |= RTL818X_CONFIG3_ANAPARAM_WRITE | RTL818X_CONFIG3_GNT_SELECT;
590 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
591 rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
592 RTL8187B_RTL8225_ANAPARAM2_ON);
593 rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
594 RTL8187B_RTL8225_ANAPARAM_ON);
595 rtl818x_iowrite8(priv, &priv->map->ANAPARAM3,
596 RTL8187B_RTL8225_ANAPARAM3_ON);
598 rtl818x_iowrite8(priv, (u8 *)0xFF61, 0x10);
599 reg = rtl818x_ioread8(priv, (u8 *)0xFF62);
600 rtl818x_iowrite8(priv, (u8 *)0xFF62, reg & ~(1 << 5));
601 rtl818x_iowrite8(priv, (u8 *)0xFF62, reg | (1 << 5));
603 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
604 reg &= ~RTL818X_CONFIG3_ANAPARAM_WRITE;
605 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
607 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
608 RTL818X_EEPROM_CMD_NORMAL);
610 res = rtl8187_cmd_reset(dev);
614 rtl818x_iowrite16(priv, (__le16 *)0xFF2D, 0x0FFF);
615 reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
616 reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
617 rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
618 reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
619 reg |= RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT |
620 RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
621 rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
623 rtl818x_iowrite16_idx(priv, (__le16 *)0xFFE0, 0x0FFF, 1);
624 reg = rtl818x_ioread8(priv, &priv->map->RATE_FALLBACK);
625 reg |= RTL818X_RATE_FALLBACK_ENABLE;
626 rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, reg);
628 rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
629 rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
630 rtl818x_iowrite16_idx(priv, (__le16 *)0xFFD4, 0xFFFF, 1);
632 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
633 RTL818X_EEPROM_CMD_CONFIG);
634 reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
635 rtl818x_iowrite8(priv, &priv->map->CONFIG1, (reg & 0x3F) | 0x80);
636 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
637 RTL818X_EEPROM_CMD_NORMAL);
639 rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
640 for (i = 0; i < ARRAY_SIZE(rtl8187b_reg_table); i++) {
641 rtl818x_iowrite8_idx(priv,
643 (rtl8187b_reg_table[i][0] | 0xFF00),
644 rtl8187b_reg_table[i][1],
645 rtl8187b_reg_table[i][2]);
648 rtl818x_iowrite16(priv, &priv->map->TID_AC_MAP, 0xFA50);
649 rtl818x_iowrite16(priv, &priv->map->INT_MIG, 0);
651 rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF0, 0, 1);
652 rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF4, 0, 1);
653 rtl818x_iowrite8_idx(priv, (u8 *)0xFFF8, 0, 1);
655 rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x00004001);
657 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x569A, 2);
659 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
660 RTL818X_EEPROM_CMD_CONFIG);
661 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
662 reg |= RTL818X_CONFIG3_ANAPARAM_WRITE;
663 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
664 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
665 RTL818X_EEPROM_CMD_NORMAL);
667 rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x0480);
668 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x2488);
669 rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FFF);
674 reg = RTL818X_CMD_TX_ENABLE | RTL818X_CMD_RX_ENABLE;
675 rtl818x_iowrite8(priv, &priv->map->CMD, reg);
676 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
678 rtl818x_iowrite8(priv, (u8 *)0xFE41, 0xF4);
679 rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x00);
680 rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
681 rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
682 rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x0F);
683 rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
684 rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
686 reg = rtl818x_ioread8(priv, (u8 *)0xFFDB);
687 rtl818x_iowrite8(priv, (u8 *)0xFFDB, reg | (1 << 2));
688 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x59FA, 3);
689 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF74, 0x59D2, 3);
690 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF76, 0x59D2, 3);
691 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF78, 0x19FA, 3);
692 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7A, 0x19FA, 3);
693 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7C, 0x00D0, 3);
694 rtl818x_iowrite8(priv, (u8 *)0xFF61, 0);
695 rtl818x_iowrite8_idx(priv, (u8 *)0xFF80, 0x0F, 1);
696 rtl818x_iowrite8_idx(priv, (u8 *)0xFF83, 0x03, 1);
697 rtl818x_iowrite8(priv, (u8 *)0xFFDA, 0x10);
698 rtl818x_iowrite8_idx(priv, (u8 *)0xFF4D, 0x08, 2);
700 rtl818x_iowrite32(priv, &priv->map->HSSI_PARA, 0x0600321B);
702 rtl818x_iowrite16_idx(priv, (__le16 *)0xFFEC, 0x0800, 1);
707 static int rtl8187_start(struct ieee80211_hw *dev)
709 struct rtl8187_priv *priv = dev->priv;
713 ret = (!priv->is_rtl8187b) ? rtl8187_init_hw(dev) :
714 rtl8187b_init_hw(dev);
718 mutex_lock(&priv->conf_mutex);
719 if (priv->is_rtl8187b) {
720 reg = RTL818X_RX_CONF_MGMT |
721 RTL818X_RX_CONF_DATA |
722 RTL818X_RX_CONF_BROADCAST |
723 RTL818X_RX_CONF_NICMAC |
724 RTL818X_RX_CONF_BSSID |
725 (7 << 13 /* RX FIFO threshold NONE */) |
726 (7 << 10 /* MAX RX DMA */) |
727 RTL818X_RX_CONF_RX_AUTORESETPHY |
728 RTL818X_RX_CONF_ONLYERLPKT |
729 RTL818X_RX_CONF_MULTICAST;
731 rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
733 rtl818x_iowrite32(priv, &priv->map->TX_CONF,
734 RTL818X_TX_CONF_HW_SEQNUM |
735 RTL818X_TX_CONF_DISREQQSIZE |
736 (7 << 8 /* short retry limit */) |
737 (7 << 0 /* long retry limit */) |
738 (7 << 21 /* MAX TX DMA */));
739 rtl8187_init_urbs(dev);
740 mutex_unlock(&priv->conf_mutex);
744 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
746 rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0);
747 rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0);
749 rtl8187_init_urbs(dev);
751 reg = RTL818X_RX_CONF_ONLYERLPKT |
752 RTL818X_RX_CONF_RX_AUTORESETPHY |
753 RTL818X_RX_CONF_BSSID |
754 RTL818X_RX_CONF_MGMT |
755 RTL818X_RX_CONF_DATA |
756 (7 << 13 /* RX FIFO threshold NONE */) |
757 (7 << 10 /* MAX RX DMA */) |
758 RTL818X_RX_CONF_BROADCAST |
759 RTL818X_RX_CONF_NICMAC;
762 rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
764 reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
765 reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT;
766 reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
767 rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
769 reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
770 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
771 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
772 reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
773 rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
775 reg = RTL818X_TX_CONF_CW_MIN |
776 (7 << 21 /* MAX TX DMA */) |
777 RTL818X_TX_CONF_NO_ICV;
778 rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
780 reg = rtl818x_ioread8(priv, &priv->map->CMD);
781 reg |= RTL818X_CMD_TX_ENABLE;
782 reg |= RTL818X_CMD_RX_ENABLE;
783 rtl818x_iowrite8(priv, &priv->map->CMD, reg);
784 mutex_unlock(&priv->conf_mutex);
789 static void rtl8187_stop(struct ieee80211_hw *dev)
791 struct rtl8187_priv *priv = dev->priv;
792 struct rtl8187_rx_info *info;
796 mutex_lock(&priv->conf_mutex);
797 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
799 reg = rtl818x_ioread8(priv, &priv->map->CMD);
800 reg &= ~RTL818X_CMD_TX_ENABLE;
801 reg &= ~RTL818X_CMD_RX_ENABLE;
802 rtl818x_iowrite8(priv, &priv->map->CMD, reg);
806 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
807 reg = rtl818x_ioread8(priv, &priv->map->CONFIG4);
808 rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF);
809 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
811 while ((skb = skb_dequeue(&priv->rx_queue))) {
812 info = (struct rtl8187_rx_info *)skb->cb;
813 usb_kill_urb(info->urb);
816 mutex_unlock(&priv->conf_mutex);
819 static int rtl8187_add_interface(struct ieee80211_hw *dev,
820 struct ieee80211_if_init_conf *conf)
822 struct rtl8187_priv *priv = dev->priv;
825 if (priv->mode != NL80211_IFTYPE_MONITOR)
828 switch (conf->type) {
829 case NL80211_IFTYPE_STATION:
830 priv->mode = conf->type;
836 mutex_lock(&priv->conf_mutex);
837 priv->vif = conf->vif;
839 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
840 for (i = 0; i < ETH_ALEN; i++)
841 rtl818x_iowrite8(priv, &priv->map->MAC[i],
842 ((u8 *)conf->mac_addr)[i]);
843 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
845 mutex_unlock(&priv->conf_mutex);
849 static void rtl8187_remove_interface(struct ieee80211_hw *dev,
850 struct ieee80211_if_init_conf *conf)
852 struct rtl8187_priv *priv = dev->priv;
853 mutex_lock(&priv->conf_mutex);
854 priv->mode = NL80211_IFTYPE_MONITOR;
856 mutex_unlock(&priv->conf_mutex);
859 static int rtl8187_config(struct ieee80211_hw *dev, u32 changed)
861 struct rtl8187_priv *priv = dev->priv;
862 struct ieee80211_conf *conf = &dev->conf;
865 mutex_lock(&priv->conf_mutex);
866 reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
867 /* Enable TX loopback on MAC level to avoid TX during channel
868 * changes, as this has be seen to causes problems and the
869 * card will stop work until next reset
871 rtl818x_iowrite32(priv, &priv->map->TX_CONF,
872 reg | RTL818X_TX_CONF_LOOPBACK_MAC);
873 priv->rf->set_chan(dev, conf);
875 rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
877 rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
878 rtl818x_iowrite16(priv, &priv->map->ATIMTR_INTERVAL, 100);
879 rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
880 rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL_TIME, 100);
881 mutex_unlock(&priv->conf_mutex);
885 static int rtl8187_config_interface(struct ieee80211_hw *dev,
886 struct ieee80211_vif *vif,
887 struct ieee80211_if_conf *conf)
889 struct rtl8187_priv *priv = dev->priv;
893 mutex_lock(&priv->conf_mutex);
894 for (i = 0; i < ETH_ALEN; i++)
895 rtl818x_iowrite8(priv, &priv->map->BSSID[i], conf->bssid[i]);
897 if (is_valid_ether_addr(conf->bssid)) {
898 reg = RTL818X_MSR_INFRA;
899 if (priv->is_rtl8187b)
900 reg |= RTL818X_MSR_ENEDCA;
901 rtl818x_iowrite8(priv, &priv->map->MSR, reg);
903 reg = RTL818X_MSR_NO_LINK;
904 rtl818x_iowrite8(priv, &priv->map->MSR, reg);
907 mutex_unlock(&priv->conf_mutex);
911 static void rtl8187_conf_erp(struct rtl8187_priv *priv, bool use_short_slot,
912 bool use_short_preamble)
914 if (priv->is_rtl8187b) {
915 u8 difs, eifs, slot_time;
918 if (use_short_slot) {
927 rtl818x_iowrite8(priv, &priv->map->SIFS, 0xa);
928 rtl818x_iowrite8(priv, &priv->map->SLOT, slot_time);
929 rtl818x_iowrite8(priv, &priv->map->DIFS, difs);
932 * BRSR+1 on 8187B is in fact EIFS register
933 * Value in units of 4 us
935 rtl818x_iowrite8(priv, (u8 *)&priv->map->BRSR + 1, eifs);
938 * For 8187B, CARRIER_SENSE_COUNTER is in fact ack timeout
939 * register. In units of 4 us like eifs register
940 * ack_timeout = ack duration + plcp + difs + preamble
942 ack_timeout = 112 + 48 + difs;
943 if (use_short_preamble)
947 rtl818x_iowrite8(priv, &priv->map->CARRIER_SENSE_COUNTER,
948 DIV_ROUND_UP(ack_timeout, 4));
950 rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
951 if (use_short_slot) {
952 rtl818x_iowrite8(priv, &priv->map->SLOT, 0x9);
953 rtl818x_iowrite8(priv, &priv->map->DIFS, 0x14);
954 rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x14);
955 rtl818x_iowrite8(priv, &priv->map->CW_VAL, 0x73);
957 rtl818x_iowrite8(priv, &priv->map->SLOT, 0x14);
958 rtl818x_iowrite8(priv, &priv->map->DIFS, 0x24);
959 rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x24);
960 rtl818x_iowrite8(priv, &priv->map->CW_VAL, 0xa5);
965 static void rtl8187_bss_info_changed(struct ieee80211_hw *dev,
966 struct ieee80211_vif *vif,
967 struct ieee80211_bss_conf *info,
970 struct rtl8187_priv *priv = dev->priv;
972 if (changed & (BSS_CHANGED_ERP_SLOT | BSS_CHANGED_ERP_PREAMBLE))
973 rtl8187_conf_erp(priv, info->use_short_slot,
974 info->use_short_preamble);
977 static void rtl8187_configure_filter(struct ieee80211_hw *dev,
978 unsigned int changed_flags,
979 unsigned int *total_flags,
980 int mc_count, struct dev_addr_list *mclist)
982 struct rtl8187_priv *priv = dev->priv;
984 if (changed_flags & FIF_FCSFAIL)
985 priv->rx_conf ^= RTL818X_RX_CONF_FCS;
986 if (changed_flags & FIF_CONTROL)
987 priv->rx_conf ^= RTL818X_RX_CONF_CTRL;
988 if (changed_flags & FIF_OTHER_BSS)
989 priv->rx_conf ^= RTL818X_RX_CONF_MONITOR;
990 if (*total_flags & FIF_ALLMULTI || mc_count > 0)
991 priv->rx_conf |= RTL818X_RX_CONF_MULTICAST;
993 priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST;
997 if (priv->rx_conf & RTL818X_RX_CONF_FCS)
998 *total_flags |= FIF_FCSFAIL;
999 if (priv->rx_conf & RTL818X_RX_CONF_CTRL)
1000 *total_flags |= FIF_CONTROL;
1001 if (priv->rx_conf & RTL818X_RX_CONF_MONITOR)
1002 *total_flags |= FIF_OTHER_BSS;
1003 if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST)
1004 *total_flags |= FIF_ALLMULTI;
1006 rtl818x_iowrite32_async(priv, &priv->map->RX_CONF, priv->rx_conf);
1009 static const struct ieee80211_ops rtl8187_ops = {
1011 .start = rtl8187_start,
1012 .stop = rtl8187_stop,
1013 .add_interface = rtl8187_add_interface,
1014 .remove_interface = rtl8187_remove_interface,
1015 .config = rtl8187_config,
1016 .config_interface = rtl8187_config_interface,
1017 .bss_info_changed = rtl8187_bss_info_changed,
1018 .configure_filter = rtl8187_configure_filter,
1021 static void rtl8187_eeprom_register_read(struct eeprom_93cx6 *eeprom)
1023 struct ieee80211_hw *dev = eeprom->data;
1024 struct rtl8187_priv *priv = dev->priv;
1025 u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
1027 eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
1028 eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
1029 eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
1030 eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
1033 static void rtl8187_eeprom_register_write(struct eeprom_93cx6 *eeprom)
1035 struct ieee80211_hw *dev = eeprom->data;
1036 struct rtl8187_priv *priv = dev->priv;
1037 u8 reg = RTL818X_EEPROM_CMD_PROGRAM;
1039 if (eeprom->reg_data_in)
1040 reg |= RTL818X_EEPROM_CMD_WRITE;
1041 if (eeprom->reg_data_out)
1042 reg |= RTL818X_EEPROM_CMD_READ;
1043 if (eeprom->reg_data_clock)
1044 reg |= RTL818X_EEPROM_CMD_CK;
1045 if (eeprom->reg_chip_select)
1046 reg |= RTL818X_EEPROM_CMD_CS;
1048 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg);
1052 static int __devinit rtl8187_probe(struct usb_interface *intf,
1053 const struct usb_device_id *id)
1055 struct usb_device *udev = interface_to_usbdev(intf);
1056 struct ieee80211_hw *dev;
1057 struct rtl8187_priv *priv;
1058 struct eeprom_93cx6 eeprom;
1059 struct ieee80211_channel *channel;
1060 const char *chip_name;
1064 dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8187_ops);
1066 printk(KERN_ERR "rtl8187: ieee80211 alloc failed\n");
1071 priv->is_rtl8187b = (id->driver_info == DEVICE_RTL8187B);
1073 SET_IEEE80211_DEV(dev, &intf->dev);
1074 usb_set_intfdata(intf, dev);
1079 skb_queue_head_init(&priv->rx_queue);
1081 BUILD_BUG_ON(sizeof(priv->channels) != sizeof(rtl818x_channels));
1082 BUILD_BUG_ON(sizeof(priv->rates) != sizeof(rtl818x_rates));
1084 memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels));
1085 memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates));
1086 priv->map = (struct rtl818x_csr *)0xFF00;
1088 priv->band.band = IEEE80211_BAND_2GHZ;
1089 priv->band.channels = priv->channels;
1090 priv->band.n_channels = ARRAY_SIZE(rtl818x_channels);
1091 priv->band.bitrates = priv->rates;
1092 priv->band.n_bitrates = ARRAY_SIZE(rtl818x_rates);
1093 dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
1096 priv->mode = NL80211_IFTYPE_MONITOR;
1097 dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
1098 IEEE80211_HW_RX_INCLUDES_FCS;
1101 eeprom.register_read = rtl8187_eeprom_register_read;
1102 eeprom.register_write = rtl8187_eeprom_register_write;
1103 if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6))
1104 eeprom.width = PCI_EEPROM_WIDTH_93C66;
1106 eeprom.width = PCI_EEPROM_WIDTH_93C46;
1108 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1111 eeprom_93cx6_multiread(&eeprom, RTL8187_EEPROM_MAC_ADDR,
1112 (__le16 __force *)dev->wiphy->perm_addr, 3);
1113 if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
1114 printk(KERN_WARNING "rtl8187: Invalid hwaddr! Using randomly "
1115 "generated MAC address\n");
1116 random_ether_addr(dev->wiphy->perm_addr);
1119 channel = priv->channels;
1120 for (i = 0; i < 3; i++) {
1121 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_1 + i,
1123 (*channel++).hw_value = txpwr & 0xFF;
1124 (*channel++).hw_value = txpwr >> 8;
1126 for (i = 0; i < 2; i++) {
1127 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_4 + i,
1129 (*channel++).hw_value = txpwr & 0xFF;
1130 (*channel++).hw_value = txpwr >> 8;
1133 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_BASE,
1136 reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
1137 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
1138 /* 0 means asic B-cut, we should use SW 3 wire
1139 * bit-by-bit banging for radio. 1 means we can use
1140 * USB specific request to write radio registers */
1141 priv->asic_rev = rtl818x_ioread8(priv, (u8 *)0xFFFE) & 0x3;
1142 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
1143 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1145 if (!priv->is_rtl8187b) {
1147 reg32 = rtl818x_ioread32(priv, &priv->map->TX_CONF);
1148 reg32 &= RTL818X_TX_CONF_HWVER_MASK;
1150 case RTL818X_TX_CONF_R8187vD_B:
1151 /* Some RTL8187B devices have a USB ID of 0x8187
1152 * detect them here */
1153 chip_name = "RTL8187BvB(early)";
1154 priv->is_rtl8187b = 1;
1155 priv->hw_rev = RTL8187BvB;
1157 case RTL818X_TX_CONF_R8187vD:
1158 chip_name = "RTL8187vD";
1161 chip_name = "RTL8187vB (default)";
1165 * Force USB request to write radio registers for 8187B, Realtek
1166 * only uses it in their sources
1168 /*if (priv->asic_rev == 0) {
1169 printk(KERN_WARNING "rtl8187: Forcing use of USB "
1170 "requests to write to radio registers\n");
1173 switch (rtl818x_ioread8(priv, (u8 *)0xFFE1)) {
1174 case RTL818X_R8187B_B:
1175 chip_name = "RTL8187BvB";
1176 priv->hw_rev = RTL8187BvB;
1178 case RTL818X_R8187B_D:
1179 chip_name = "RTL8187BvD";
1180 priv->hw_rev = RTL8187BvD;
1182 case RTL818X_R8187B_E:
1183 chip_name = "RTL8187BvE";
1184 priv->hw_rev = RTL8187BvE;
1187 chip_name = "RTL8187BvB (default)";
1188 priv->hw_rev = RTL8187BvB;
1192 if (!priv->is_rtl8187b) {
1193 for (i = 0; i < 2; i++) {
1194 eeprom_93cx6_read(&eeprom,
1195 RTL8187_EEPROM_TXPWR_CHAN_6 + i,
1197 (*channel++).hw_value = txpwr & 0xFF;
1198 (*channel++).hw_value = txpwr >> 8;
1201 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_6,
1203 (*channel++).hw_value = txpwr & 0xFF;
1205 eeprom_93cx6_read(&eeprom, 0x0A, &txpwr);
1206 (*channel++).hw_value = txpwr & 0xFF;
1208 eeprom_93cx6_read(&eeprom, 0x1C, &txpwr);
1209 (*channel++).hw_value = txpwr & 0xFF;
1210 (*channel++).hw_value = txpwr >> 8;
1213 if (priv->is_rtl8187b) {
1214 printk(KERN_WARNING "rtl8187: 8187B chip detected. Support "
1215 "is EXPERIMENTAL, and could damage your\n"
1216 " hardware, use at your own risk\n");
1217 dev->flags |= IEEE80211_HW_SIGNAL_DBM;
1219 dev->flags |= IEEE80211_HW_SIGNAL_UNSPEC;
1220 dev->max_signal = 65;
1224 * XXX: Once this driver supports anything that requires
1225 * beacons it must implement IEEE80211_TX_CTL_ASSIGN_SEQ.
1227 dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
1229 if ((id->driver_info == DEVICE_RTL8187) && priv->is_rtl8187b)
1230 printk(KERN_INFO "rtl8187: inconsistency between id with OEM"
1233 priv->rf = rtl8187_detect_rf(dev);
1234 dev->extra_tx_headroom = (!priv->is_rtl8187b) ?
1235 sizeof(struct rtl8187_tx_hdr) :
1236 sizeof(struct rtl8187b_tx_hdr);
1237 if (!priv->is_rtl8187b)
1242 err = ieee80211_register_hw(dev);
1244 printk(KERN_ERR "rtl8187: Cannot register device\n");
1247 mutex_init(&priv->conf_mutex);
1249 printk(KERN_INFO "%s: hwaddr %pM, %s V%d + %s\n",
1250 wiphy_name(dev->wiphy), dev->wiphy->perm_addr,
1251 chip_name, priv->asic_rev, priv->rf->name);
1256 ieee80211_free_hw(dev);
1257 usb_set_intfdata(intf, NULL);
1262 static void __devexit rtl8187_disconnect(struct usb_interface *intf)
1264 struct ieee80211_hw *dev = usb_get_intfdata(intf);
1265 struct rtl8187_priv *priv;
1270 ieee80211_unregister_hw(dev);
1273 usb_put_dev(interface_to_usbdev(intf));
1274 ieee80211_free_hw(dev);
1277 static struct usb_driver rtl8187_driver = {
1278 .name = KBUILD_MODNAME,
1279 .id_table = rtl8187_table,
1280 .probe = rtl8187_probe,
1281 .disconnect = __devexit_p(rtl8187_disconnect),
1284 static int __init rtl8187_init(void)
1286 return usb_register(&rtl8187_driver);
1289 static void __exit rtl8187_exit(void)
1291 usb_deregister(&rtl8187_driver);
1294 module_init(rtl8187_init);
1295 module_exit(rtl8187_exit);