2 * drivers/net/wireless/mwl8k.c
3 * Driver for Marvell TOPDOG 802.11 Wireless cards
5 * Copyright (C) 2008 Marvell Semiconductor Inc.
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
12 #include <linux/init.h>
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/spinlock.h>
16 #include <linux/list.h>
17 #include <linux/pci.h>
18 #include <linux/delay.h>
19 #include <linux/completion.h>
20 #include <linux/etherdevice.h>
21 #include <net/mac80211.h>
22 #include <linux/moduleparam.h>
23 #include <linux/firmware.h>
24 #include <linux/workqueue.h>
26 #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
27 #define MWL8K_NAME KBUILD_MODNAME
28 #define MWL8K_VERSION "0.9.1"
30 MODULE_DESCRIPTION(MWL8K_DESC);
31 MODULE_VERSION(MWL8K_VERSION);
32 MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
33 MODULE_LICENSE("GPL");
35 static DEFINE_PCI_DEVICE_TABLE(mwl8k_table) = {
36 { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = 8687, },
37 { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = 8687, },
40 MODULE_DEVICE_TABLE(pci, mwl8k_table);
42 /* Register definitions */
43 #define MWL8K_HIU_GEN_PTR 0x00000c10
44 #define MWL8K_MODE_STA 0x0000005a
45 #define MWL8K_MODE_AP 0x000000a5
46 #define MWL8K_HIU_INT_CODE 0x00000c14
47 #define MWL8K_FWSTA_READY 0xf0f1f2f4
48 #define MWL8K_FWAP_READY 0xf1f2f4a5
49 #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
50 #define MWL8K_HIU_SCRATCH 0x00000c40
52 /* Host->device communications */
53 #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
54 #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
55 #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
56 #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
57 #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
58 #define MWL8K_H2A_INT_DUMMY (1 << 20)
59 #define MWL8K_H2A_INT_RESET (1 << 15)
60 #define MWL8K_H2A_INT_DOORBELL (1 << 1)
61 #define MWL8K_H2A_INT_PPA_READY (1 << 0)
63 /* Device->host communications */
64 #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
65 #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
66 #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
67 #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
68 #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
69 #define MWL8K_A2H_INT_DUMMY (1 << 20)
70 #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
71 #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
72 #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
73 #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
74 #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
75 #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
76 #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
77 #define MWL8K_A2H_INT_RX_READY (1 << 1)
78 #define MWL8K_A2H_INT_TX_DONE (1 << 0)
80 #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
81 MWL8K_A2H_INT_CHNL_SWITCHED | \
82 MWL8K_A2H_INT_QUEUE_EMPTY | \
83 MWL8K_A2H_INT_RADAR_DETECT | \
84 MWL8K_A2H_INT_RADIO_ON | \
85 MWL8K_A2H_INT_RADIO_OFF | \
86 MWL8K_A2H_INT_MAC_EVENT | \
87 MWL8K_A2H_INT_OPC_DONE | \
88 MWL8K_A2H_INT_RX_READY | \
89 MWL8K_A2H_INT_TX_DONE)
91 /* WME stream classes */
92 #define WME_AC_BE 0 /* best effort */
93 #define WME_AC_BK 1 /* background */
94 #define WME_AC_VI 2 /* video */
95 #define WME_AC_VO 3 /* voice */
97 #define MWL8K_RX_QUEUES 1
98 #define MWL8K_TX_QUEUES 4
100 struct mwl8k_rx_queue {
103 /* hw receives here */
106 /* refill descs here */
109 struct mwl8k_rx_desc *rx_desc_area;
110 dma_addr_t rx_desc_dma;
111 struct sk_buff **rx_skb;
114 struct mwl8k_tx_queue {
115 /* hw transmits here */
118 /* sw appends here */
121 struct ieee80211_tx_queue_stats tx_stats;
122 struct mwl8k_tx_desc *tx_desc_area;
123 dma_addr_t tx_desc_dma;
124 struct sk_buff **tx_skb;
127 /* Pointers to the firmware data and meta information about it. */
128 struct mwl8k_firmware {
130 struct firmware *ucode;
132 /* Boot helper code */
133 struct firmware *helper;
138 struct ieee80211_hw *hw;
140 struct pci_dev *pdev;
142 /* firmware access lock */
145 /* firmware files and meta data */
146 struct mwl8k_firmware fw;
149 /* lock held over TX and TX reap */
152 struct ieee80211_vif *vif;
154 struct ieee80211_channel *current_channel;
156 /* power management status cookie from firmware */
158 dma_addr_t cookie_dma;
165 * Running count of TX packets in flight, to avoid
166 * iterating over the transmit rings each time.
170 struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
171 struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
174 struct ieee80211_supported_band band;
175 struct ieee80211_channel channels[14];
176 struct ieee80211_rate rates[12];
179 bool radio_short_preamble;
182 /* Set if PHY config is in progress */
185 /* XXX need to convert this to handle multiple interfaces */
187 u8 capture_bssid[ETH_ALEN];
188 struct sk_buff *beacon_skb;
191 * This FJ worker has to be global as it is scheduled from the
192 * RX handler. At this point we don't know which interface it
193 * belongs to until the list of bssids waiting to complete join
196 struct work_struct finalize_join_worker;
198 /* Tasklet to reclaim TX descriptors and buffers after tx */
199 struct tasklet_struct tx_reclaim_task;
201 /* Work thread to serialize configuration requests */
202 struct workqueue_struct *config_wq;
203 struct completion *hostcmd_wait;
204 struct completion *tx_wait;
207 /* Per interface specific private data */
209 /* backpointer to parent config block */
210 struct mwl8k_priv *priv;
212 /* BSS config of AP or IBSS from mac80211*/
213 struct ieee80211_bss_conf bss_info;
215 /* BSSID of AP or IBSS */
217 u8 mac_addr[ETH_ALEN];
220 * Subset of supported legacy rates.
221 * Intersection of AP and STA supported rates.
223 struct ieee80211_rate legacy_rates[12];
225 /* number of supported legacy rates */
228 /* Index into station database.Returned by update_sta_db call */
231 /* Non AMPDU sequence number assigned by driver */
235 #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
237 static const struct ieee80211_channel mwl8k_channels[] = {
238 { .center_freq = 2412, .hw_value = 1, },
239 { .center_freq = 2417, .hw_value = 2, },
240 { .center_freq = 2422, .hw_value = 3, },
241 { .center_freq = 2427, .hw_value = 4, },
242 { .center_freq = 2432, .hw_value = 5, },
243 { .center_freq = 2437, .hw_value = 6, },
244 { .center_freq = 2442, .hw_value = 7, },
245 { .center_freq = 2447, .hw_value = 8, },
246 { .center_freq = 2452, .hw_value = 9, },
247 { .center_freq = 2457, .hw_value = 10, },
248 { .center_freq = 2462, .hw_value = 11, },
251 static const struct ieee80211_rate mwl8k_rates[] = {
252 { .bitrate = 10, .hw_value = 2, },
253 { .bitrate = 20, .hw_value = 4, },
254 { .bitrate = 55, .hw_value = 11, },
255 { .bitrate = 60, .hw_value = 12, },
256 { .bitrate = 90, .hw_value = 18, },
257 { .bitrate = 110, .hw_value = 22, },
258 { .bitrate = 120, .hw_value = 24, },
259 { .bitrate = 180, .hw_value = 36, },
260 { .bitrate = 240, .hw_value = 48, },
261 { .bitrate = 360, .hw_value = 72, },
262 { .bitrate = 480, .hw_value = 96, },
263 { .bitrate = 540, .hw_value = 108, },
266 /* Set or get info from Firmware */
267 #define MWL8K_CMD_SET 0x0001
268 #define MWL8K_CMD_GET 0x0000
270 /* Firmware command codes */
271 #define MWL8K_CMD_CODE_DNLD 0x0001
272 #define MWL8K_CMD_GET_HW_SPEC 0x0003
273 #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
274 #define MWL8K_CMD_GET_STAT 0x0014
275 #define MWL8K_CMD_RADIO_CONTROL 0x001c
276 #define MWL8K_CMD_RF_TX_POWER 0x001e
277 #define MWL8K_CMD_SET_PRE_SCAN 0x0107
278 #define MWL8K_CMD_SET_POST_SCAN 0x0108
279 #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
280 #define MWL8K_CMD_SET_AID 0x010d
281 #define MWL8K_CMD_SET_RATE 0x0110
282 #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
283 #define MWL8K_CMD_RTS_THRESHOLD 0x0113
284 #define MWL8K_CMD_SET_SLOT 0x0114
285 #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
286 #define MWL8K_CMD_SET_WMM_MODE 0x0123
287 #define MWL8K_CMD_MIMO_CONFIG 0x0125
288 #define MWL8K_CMD_USE_FIXED_RATE 0x0126
289 #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
290 #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
291 #define MWL8K_CMD_UPDATE_STADB 0x1123
293 static const char *mwl8k_cmd_name(u16 cmd, char *buf, int bufsize)
295 #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
296 snprintf(buf, bufsize, "%s", #x);\
299 switch (cmd & ~0x8000) {
300 MWL8K_CMDNAME(CODE_DNLD);
301 MWL8K_CMDNAME(GET_HW_SPEC);
302 MWL8K_CMDNAME(MAC_MULTICAST_ADR);
303 MWL8K_CMDNAME(GET_STAT);
304 MWL8K_CMDNAME(RADIO_CONTROL);
305 MWL8K_CMDNAME(RF_TX_POWER);
306 MWL8K_CMDNAME(SET_PRE_SCAN);
307 MWL8K_CMDNAME(SET_POST_SCAN);
308 MWL8K_CMDNAME(SET_RF_CHANNEL);
309 MWL8K_CMDNAME(SET_AID);
310 MWL8K_CMDNAME(SET_RATE);
311 MWL8K_CMDNAME(SET_FINALIZE_JOIN);
312 MWL8K_CMDNAME(RTS_THRESHOLD);
313 MWL8K_CMDNAME(SET_SLOT);
314 MWL8K_CMDNAME(SET_EDCA_PARAMS);
315 MWL8K_CMDNAME(SET_WMM_MODE);
316 MWL8K_CMDNAME(MIMO_CONFIG);
317 MWL8K_CMDNAME(USE_FIXED_RATE);
318 MWL8K_CMDNAME(ENABLE_SNIFFER);
319 MWL8K_CMDNAME(SET_RATEADAPT_MODE);
320 MWL8K_CMDNAME(UPDATE_STADB);
322 snprintf(buf, bufsize, "0x%x", cmd);
329 /* Hardware and firmware reset */
330 static void mwl8k_hw_reset(struct mwl8k_priv *priv)
332 iowrite32(MWL8K_H2A_INT_RESET,
333 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
334 iowrite32(MWL8K_H2A_INT_RESET,
335 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
339 /* Release fw image */
340 static void mwl8k_release_fw(struct firmware **fw)
344 release_firmware(*fw);
348 static void mwl8k_release_firmware(struct mwl8k_priv *priv)
350 mwl8k_release_fw(&priv->fw.ucode);
351 mwl8k_release_fw(&priv->fw.helper);
354 /* Request fw image */
355 static int mwl8k_request_fw(struct mwl8k_priv *priv,
356 const char *fname, struct firmware **fw)
358 /* release current image */
360 mwl8k_release_fw(fw);
362 return request_firmware((const struct firmware **)fw,
363 fname, &priv->pdev->dev);
366 static int mwl8k_request_firmware(struct mwl8k_priv *priv, u32 part_num)
371 priv->part_num = part_num;
373 snprintf(filename, sizeof(filename),
374 "mwl8k/helper_%u.fw", priv->part_num);
376 rc = mwl8k_request_fw(priv, filename, &priv->fw.helper);
379 "%s Error requesting helper firmware file %s\n",
380 pci_name(priv->pdev), filename);
384 snprintf(filename, sizeof(filename),
385 "mwl8k/fmimage_%u.fw", priv->part_num);
387 rc = mwl8k_request_fw(priv, filename, &priv->fw.ucode);
389 printk(KERN_ERR "%s Error requesting firmware file %s\n",
390 pci_name(priv->pdev), filename);
391 mwl8k_release_fw(&priv->fw.helper);
398 struct mwl8k_cmd_pkt {
404 } __attribute__((packed));
410 mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
412 void __iomem *regs = priv->regs;
416 dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
417 if (pci_dma_mapping_error(priv->pdev, dma_addr))
420 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
421 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
422 iowrite32(MWL8K_H2A_INT_DOORBELL,
423 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
424 iowrite32(MWL8K_H2A_INT_DUMMY,
425 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
431 int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
432 if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
433 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
440 pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
442 return loops ? 0 : -ETIMEDOUT;
445 static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
446 const u8 *data, size_t length)
448 struct mwl8k_cmd_pkt *cmd;
452 cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
456 cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
462 int block_size = length > 256 ? 256 : length;
464 memcpy(cmd->payload, data + done, block_size);
465 cmd->length = cpu_to_le16(block_size);
467 rc = mwl8k_send_fw_load_cmd(priv, cmd,
468 sizeof(*cmd) + block_size);
473 length -= block_size;
478 rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
486 static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
487 const u8 *data, size_t length)
489 unsigned char *buffer;
490 int may_continue, rc = 0;
491 u32 done, prev_block_size;
493 buffer = kmalloc(1024, GFP_KERNEL);
500 while (may_continue > 0) {
503 block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
504 if (block_size & 1) {
508 done += prev_block_size;
509 length -= prev_block_size;
512 if (block_size > 1024 || block_size > length) {
522 if (block_size == 0) {
529 prev_block_size = block_size;
530 memcpy(buffer, data + done, block_size);
532 rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
537 if (!rc && length != 0)
545 static int mwl8k_load_firmware(struct mwl8k_priv *priv)
549 const u8 *ucode = priv->fw.ucode->data;
550 size_t ucode_len = priv->fw.ucode->size;
551 const u8 *helper = priv->fw.helper->data;
552 size_t helper_len = priv->fw.helper->size;
554 if (!memcmp(ucode, "\x01\x00\x00\x00", 4)) {
555 rc = mwl8k_load_fw_image(priv, helper, helper_len);
557 printk(KERN_ERR "%s: unable to load firmware "
558 "helper image\n", pci_name(priv->pdev));
563 rc = mwl8k_feed_fw_image(priv, ucode, ucode_len);
565 rc = mwl8k_load_fw_image(priv, ucode, ucode_len);
569 printk(KERN_ERR "%s: unable to load firmware data\n",
570 pci_name(priv->pdev));
574 iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
579 if (ioread32(priv->regs + MWL8K_HIU_INT_CODE)
580 == MWL8K_FWSTA_READY)
585 return loops ? 0 : -ETIMEDOUT;
590 * Defines shared between transmission and reception.
592 /* HT control fields for firmware */
597 } __attribute__((packed));
599 /* Firmware Station database operations */
600 #define MWL8K_STA_DB_ADD_ENTRY 0
601 #define MWL8K_STA_DB_MODIFY_ENTRY 1
602 #define MWL8K_STA_DB_DEL_ENTRY 2
603 #define MWL8K_STA_DB_FLUSH 3
605 /* Peer Entry flags - used to define the type of the peer node */
606 #define MWL8K_PEER_TYPE_ACCESSPOINT 2
608 #define MWL8K_IEEE_LEGACY_DATA_RATES 12
609 #define MWL8K_MCS_BITMAP_SIZE 16
611 struct peer_capability_info {
612 /* Peer type - AP vs. STA. */
615 /* Basic 802.11 capabilities from assoc resp. */
618 /* Set if peer supports 802.11n high throughput (HT). */
621 /* Valid if HT is supported. */
623 __u8 extended_ht_caps;
624 struct ewc_ht_info ewc_info;
626 /* Legacy rate table. Intersection of our rates and peer rates. */
627 __u8 legacy_rates[MWL8K_IEEE_LEGACY_DATA_RATES];
629 /* HT rate table. Intersection of our rates and peer rates. */
630 __u8 ht_rates[MWL8K_MCS_BITMAP_SIZE];
633 /* If set, interoperability mode, no proprietary extensions. */
637 __le16 amsdu_enabled;
638 } __attribute__((packed));
640 /* Inline functions to manipulate QoS field in data descriptor. */
641 static inline u16 mwl8k_qos_setbit_eosp(u16 qos)
643 u16 val_mask = 1 << 4;
645 /* End of Service Period Bit 4 */
646 return qos | val_mask;
649 static inline u16 mwl8k_qos_setbit_ack(u16 qos, u8 ack_policy)
653 u16 qos_mask = ~(val_mask << shift);
655 /* Ack Policy Bit 5-6 */
656 return (qos & qos_mask) | ((ack_policy & val_mask) << shift);
659 static inline u16 mwl8k_qos_setbit_amsdu(u16 qos)
661 u16 val_mask = 1 << 7;
663 /* AMSDU present Bit 7 */
664 return qos | val_mask;
667 static inline u16 mwl8k_qos_setbit_qlen(u16 qos, u8 len)
671 u16 qos_mask = ~(val_mask << shift);
673 /* Queue Length Bits 8-15 */
674 return (qos & qos_mask) | ((len & val_mask) << shift);
677 /* DMA header used by firmware and hardware. */
678 struct mwl8k_dma_data {
680 struct ieee80211_hdr wh;
681 } __attribute__((packed));
683 /* Routines to add/remove DMA header from skb. */
684 static inline void mwl8k_remove_dma_header(struct sk_buff *skb)
686 struct mwl8k_dma_data *tr = (struct mwl8k_dma_data *)skb->data;
687 void *dst, *src = &tr->wh;
688 int hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
689 u16 space = sizeof(struct mwl8k_dma_data) - hdrlen;
691 dst = (void *)tr + space;
693 memmove(dst, src, hdrlen);
694 skb_pull(skb, space);
698 static inline void mwl8k_add_dma_header(struct sk_buff *skb)
700 struct ieee80211_hdr *wh;
702 struct mwl8k_dma_data *tr;
704 wh = (struct ieee80211_hdr *)skb->data;
705 hdrlen = ieee80211_hdrlen(wh->frame_control);
709 * Copy up/down the 802.11 header; the firmware requires
710 * we present a 2-byte payload length followed by a
711 * 4-address header (w/o QoS), followed (optionally) by
712 * any WEP/ExtIV header (but only filled in for CCMP).
714 if (hdrlen != sizeof(struct mwl8k_dma_data))
715 skb_push(skb, sizeof(struct mwl8k_dma_data) - hdrlen);
717 tr = (struct mwl8k_dma_data *)skb->data;
719 memmove(&tr->wh, wh, hdrlen);
722 memset(tr->wh.addr4, 0, ETH_ALEN);
725 * Firmware length is the length of the fully formed "802.11
726 * payload". That is, everything except for the 802.11 header.
727 * This includes all crypto material including the MIC.
729 tr->fwlen = cpu_to_le16(pktlen - hdrlen);
736 #define MWL8K_RX_CTRL_OWNED_BY_HOST 0x02
738 struct mwl8k_rx_desc {
742 __le32 pkt_phys_addr;
743 __le32 next_rx_desc_phys_addr;
753 } __attribute__((packed));
755 #define MWL8K_RX_DESCS 256
756 #define MWL8K_RX_MAXSZ 3800
758 static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
760 struct mwl8k_priv *priv = hw->priv;
761 struct mwl8k_rx_queue *rxq = priv->rxq + index;
765 rxq->rx_desc_count = 0;
769 size = MWL8K_RX_DESCS * sizeof(struct mwl8k_rx_desc);
772 pci_alloc_consistent(priv->pdev, size, &rxq->rx_desc_dma);
773 if (rxq->rx_desc_area == NULL) {
774 printk(KERN_ERR "%s: failed to alloc RX descriptors\n",
778 memset(rxq->rx_desc_area, 0, size);
780 rxq->rx_skb = kmalloc(MWL8K_RX_DESCS *
781 sizeof(*rxq->rx_skb), GFP_KERNEL);
782 if (rxq->rx_skb == NULL) {
783 printk(KERN_ERR "%s: failed to alloc RX skbuff list\n",
785 pci_free_consistent(priv->pdev, size,
786 rxq->rx_desc_area, rxq->rx_desc_dma);
789 memset(rxq->rx_skb, 0, MWL8K_RX_DESCS * sizeof(*rxq->rx_skb));
791 for (i = 0; i < MWL8K_RX_DESCS; i++) {
792 struct mwl8k_rx_desc *rx_desc;
795 rx_desc = rxq->rx_desc_area + i;
796 nexti = (i + 1) % MWL8K_RX_DESCS;
798 rx_desc->next_rx_desc_phys_addr =
799 cpu_to_le32(rxq->rx_desc_dma
800 + nexti * sizeof(*rx_desc));
801 rx_desc->rx_ctrl = MWL8K_RX_CTRL_OWNED_BY_HOST;
807 static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
809 struct mwl8k_priv *priv = hw->priv;
810 struct mwl8k_rx_queue *rxq = priv->rxq + index;
814 while (rxq->rx_desc_count < MWL8K_RX_DESCS && limit--) {
818 skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
822 rxq->rx_desc_count++;
825 rxq->rx_tail = (rx + 1) % MWL8K_RX_DESCS;
827 rxq->rx_desc_area[rx].pkt_phys_addr =
828 cpu_to_le32(pci_map_single(priv->pdev, skb->data,
829 MWL8K_RX_MAXSZ, DMA_FROM_DEVICE));
831 rxq->rx_desc_area[rx].pkt_len = cpu_to_le16(MWL8K_RX_MAXSZ);
832 rxq->rx_skb[rx] = skb;
834 rxq->rx_desc_area[rx].rx_ctrl = 0;
842 /* Must be called only when the card's reception is completely halted */
843 static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
845 struct mwl8k_priv *priv = hw->priv;
846 struct mwl8k_rx_queue *rxq = priv->rxq + index;
849 for (i = 0; i < MWL8K_RX_DESCS; i++) {
850 if (rxq->rx_skb[i] != NULL) {
853 addr = le32_to_cpu(rxq->rx_desc_area[i].pkt_phys_addr);
854 pci_unmap_single(priv->pdev, addr, MWL8K_RX_MAXSZ,
856 kfree_skb(rxq->rx_skb[i]);
857 rxq->rx_skb[i] = NULL;
864 pci_free_consistent(priv->pdev,
865 MWL8K_RX_DESCS * sizeof(struct mwl8k_rx_desc),
866 rxq->rx_desc_area, rxq->rx_desc_dma);
867 rxq->rx_desc_area = NULL;
872 * Scan a list of BSSIDs to process for finalize join.
873 * Allows for extension to process multiple BSSIDs.
876 mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
878 return priv->capture_beacon &&
879 ieee80211_is_beacon(wh->frame_control) &&
880 !compare_ether_addr(wh->addr3, priv->capture_bssid);
883 static inline void mwl8k_save_beacon(struct mwl8k_priv *priv,
886 priv->capture_beacon = false;
887 memset(priv->capture_bssid, 0, ETH_ALEN);
890 * Use GFP_ATOMIC as rxq_process is called from
891 * the primary interrupt handler, memory allocation call
894 priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
895 if (priv->beacon_skb != NULL)
896 queue_work(priv->config_wq,
897 &priv->finalize_join_worker);
900 static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
902 struct mwl8k_priv *priv = hw->priv;
903 struct mwl8k_rx_queue *rxq = priv->rxq + index;
907 while (rxq->rx_desc_count && limit--) {
908 struct mwl8k_rx_desc *rx_desc;
910 struct ieee80211_rx_status status;
912 struct ieee80211_hdr *wh;
914 rx_desc = rxq->rx_desc_area + rxq->rx_head;
915 if (!(rx_desc->rx_ctrl & MWL8K_RX_CTRL_OWNED_BY_HOST))
919 skb = rxq->rx_skb[rxq->rx_head];
922 rxq->rx_skb[rxq->rx_head] = NULL;
924 rxq->rx_head = (rxq->rx_head + 1) % MWL8K_RX_DESCS;
925 rxq->rx_desc_count--;
927 addr = le32_to_cpu(rx_desc->pkt_phys_addr);
928 pci_unmap_single(priv->pdev, addr,
929 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
931 skb_put(skb, le16_to_cpu(rx_desc->pkt_len));
932 mwl8k_remove_dma_header(skb);
934 wh = (struct ieee80211_hdr *)skb->data;
937 * Check for pending join operation. save a copy of
938 * the beacon and schedule a tasklet to send finalize
939 * join command to the firmware.
941 if (mwl8k_capture_bssid(priv, wh))
942 mwl8k_save_beacon(priv, skb);
944 memset(&status, 0, sizeof(status));
946 status.signal = -rx_desc->rssi;
947 status.noise = -rx_desc->noise_level;
948 status.qual = rx_desc->link_quality;
952 status.band = IEEE80211_BAND_2GHZ;
953 status.freq = ieee80211_channel_to_frequency(rx_desc->channel);
954 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
955 ieee80211_rx_irqsafe(hw, skb);
965 * Packet transmission.
968 /* Transmit queue assignment. */
970 MWL8K_WME_AC_BK = 0, /* background access */
971 MWL8K_WME_AC_BE = 1, /* best effort access */
972 MWL8K_WME_AC_VI = 2, /* video access */
973 MWL8K_WME_AC_VO = 3, /* voice access */
976 /* Transmit packet ACK policy */
977 #define MWL8K_TXD_ACK_POLICY_NORMAL 0
978 #define MWL8K_TXD_ACK_POLICY_BLOCKACK 3
980 #define GET_TXQ(_ac) (\
981 ((_ac) == WME_AC_VO) ? MWL8K_WME_AC_VO : \
982 ((_ac) == WME_AC_VI) ? MWL8K_WME_AC_VI : \
983 ((_ac) == WME_AC_BK) ? MWL8K_WME_AC_BK : \
986 #define MWL8K_TXD_STATUS_OK 0x00000001
987 #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
988 #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
989 #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
990 #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
992 struct mwl8k_tx_desc {
997 __le32 pkt_phys_addr;
999 __u8 dest_MAC_addr[ETH_ALEN];
1000 __le32 next_tx_desc_phys_addr;
1005 } __attribute__((packed));
1007 #define MWL8K_TX_DESCS 128
1009 static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
1011 struct mwl8k_priv *priv = hw->priv;
1012 struct mwl8k_tx_queue *txq = priv->txq + index;
1016 memset(&txq->tx_stats, 0, sizeof(struct ieee80211_tx_queue_stats));
1017 txq->tx_stats.limit = MWL8K_TX_DESCS;
1021 size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
1024 pci_alloc_consistent(priv->pdev, size, &txq->tx_desc_dma);
1025 if (txq->tx_desc_area == NULL) {
1026 printk(KERN_ERR "%s: failed to alloc TX descriptors\n",
1030 memset(txq->tx_desc_area, 0, size);
1032 txq->tx_skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->tx_skb),
1034 if (txq->tx_skb == NULL) {
1035 printk(KERN_ERR "%s: failed to alloc TX skbuff list\n",
1037 pci_free_consistent(priv->pdev, size,
1038 txq->tx_desc_area, txq->tx_desc_dma);
1041 memset(txq->tx_skb, 0, MWL8K_TX_DESCS * sizeof(*txq->tx_skb));
1043 for (i = 0; i < MWL8K_TX_DESCS; i++) {
1044 struct mwl8k_tx_desc *tx_desc;
1047 tx_desc = txq->tx_desc_area + i;
1048 nexti = (i + 1) % MWL8K_TX_DESCS;
1050 tx_desc->status = 0;
1051 tx_desc->next_tx_desc_phys_addr =
1052 cpu_to_le32(txq->tx_desc_dma +
1053 nexti * sizeof(*tx_desc));
1059 static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
1061 iowrite32(MWL8K_H2A_INT_PPA_READY,
1062 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1063 iowrite32(MWL8K_H2A_INT_DUMMY,
1064 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1065 ioread32(priv->regs + MWL8K_HIU_INT_CODE);
1068 static inline int mwl8k_txq_busy(struct mwl8k_priv *priv)
1070 return priv->pending_tx_pkts;
1073 struct mwl8k_txq_info {
1082 static int mwl8k_scan_tx_ring(struct mwl8k_priv *priv,
1083 struct mwl8k_txq_info txinfo[],
1086 int count, desc, status;
1087 struct mwl8k_tx_queue *txq;
1088 struct mwl8k_tx_desc *tx_desc;
1091 memset(txinfo, 0, num_queues * sizeof(struct mwl8k_txq_info));
1092 spin_lock_bh(&priv->tx_lock);
1093 for (count = 0; count < num_queues; count++) {
1094 txq = priv->txq + count;
1095 txinfo[count].len = txq->tx_stats.len;
1096 txinfo[count].head = txq->tx_head;
1097 txinfo[count].tail = txq->tx_tail;
1098 for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
1099 tx_desc = txq->tx_desc_area + desc;
1100 status = le32_to_cpu(tx_desc->status);
1102 if (status & MWL8K_TXD_STATUS_FW_OWNED)
1103 txinfo[count].fw_owned++;
1105 txinfo[count].drv_owned++;
1107 if (tx_desc->pkt_len == 0)
1108 txinfo[count].unused++;
1111 spin_unlock_bh(&priv->tx_lock);
1116 static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw, u32 delay_ms)
1118 struct mwl8k_priv *priv = hw->priv;
1119 DECLARE_COMPLETION_ONSTACK(cmd_wait);
1121 unsigned long timeout;
1125 if (priv->tx_wait != NULL)
1126 printk(KERN_ERR "WARNING Previous TXWaitEmpty instance\n");
1128 spin_lock_bh(&priv->tx_lock);
1129 count = mwl8k_txq_busy(priv);
1131 priv->tx_wait = &cmd_wait;
1133 mwl8k_tx_start(priv);
1135 spin_unlock_bh(&priv->tx_lock);
1138 struct mwl8k_txq_info txinfo[4];
1142 timeout = wait_for_completion_timeout(&cmd_wait,
1143 msecs_to_jiffies(delay_ms));
1147 spin_lock_bh(&priv->tx_lock);
1148 priv->tx_wait = NULL;
1149 newcount = mwl8k_txq_busy(priv);
1150 spin_unlock_bh(&priv->tx_lock);
1152 printk(KERN_ERR "%s(%u) TIMEDOUT:%ums Pend:%u-->%u\n",
1153 __func__, __LINE__, delay_ms, count, newcount);
1155 mwl8k_scan_tx_ring(priv, txinfo, 4);
1156 for (index = 0; index < 4; index++)
1158 "TXQ:%u L:%u H:%u T:%u FW:%u DRV:%u U:%u\n",
1163 txinfo[index].fw_owned,
1164 txinfo[index].drv_owned,
1165 txinfo[index].unused);
1173 #define MWL8K_TXD_SUCCESS(status) \
1174 ((status) & (MWL8K_TXD_STATUS_OK | \
1175 MWL8K_TXD_STATUS_OK_RETRY | \
1176 MWL8K_TXD_STATUS_OK_MORE_RETRY))
1178 static void mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int force)
1180 struct mwl8k_priv *priv = hw->priv;
1181 struct mwl8k_tx_queue *txq = priv->txq + index;
1184 while (txq->tx_stats.len > 0) {
1186 struct mwl8k_tx_desc *tx_desc;
1189 struct sk_buff *skb;
1190 struct ieee80211_tx_info *info;
1194 tx_desc = txq->tx_desc_area + tx;
1196 status = le32_to_cpu(tx_desc->status);
1198 if (status & MWL8K_TXD_STATUS_FW_OWNED) {
1202 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
1205 txq->tx_head = (tx + 1) % MWL8K_TX_DESCS;
1206 BUG_ON(txq->tx_stats.len == 0);
1207 txq->tx_stats.len--;
1208 priv->pending_tx_pkts--;
1210 addr = le32_to_cpu(tx_desc->pkt_phys_addr);
1211 size = le16_to_cpu(tx_desc->pkt_len);
1212 skb = txq->tx_skb[tx];
1213 txq->tx_skb[tx] = NULL;
1215 BUG_ON(skb == NULL);
1216 pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
1218 mwl8k_remove_dma_header(skb);
1220 /* Mark descriptor as unused */
1221 tx_desc->pkt_phys_addr = 0;
1222 tx_desc->pkt_len = 0;
1224 info = IEEE80211_SKB_CB(skb);
1225 ieee80211_tx_info_clear_status(info);
1226 if (MWL8K_TXD_SUCCESS(status))
1227 info->flags |= IEEE80211_TX_STAT_ACK;
1229 ieee80211_tx_status_irqsafe(hw, skb);
1231 wake = !priv->inconfig && priv->radio_on;
1235 ieee80211_wake_queue(hw, index);
1238 /* must be called only when the card's transmit is completely halted */
1239 static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
1241 struct mwl8k_priv *priv = hw->priv;
1242 struct mwl8k_tx_queue *txq = priv->txq + index;
1244 mwl8k_txq_reclaim(hw, index, 1);
1249 pci_free_consistent(priv->pdev,
1250 MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
1251 txq->tx_desc_area, txq->tx_desc_dma);
1252 txq->tx_desc_area = NULL;
1256 mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
1258 struct mwl8k_priv *priv = hw->priv;
1259 struct ieee80211_tx_info *tx_info;
1260 struct ieee80211_hdr *wh;
1261 struct mwl8k_tx_queue *txq;
1262 struct mwl8k_tx_desc *tx;
1263 struct mwl8k_dma_data *tr;
1264 struct mwl8k_vif *mwl8k_vif;
1267 bool qosframe = false, ampduframe = false;
1268 bool mcframe = false, eapolframe = false;
1269 bool amsduframe = false;
1272 txq = priv->txq + index;
1273 tx = txq->tx_desc_area + txq->tx_tail;
1275 BUG_ON(txq->tx_skb[txq->tx_tail] != NULL);
1278 * Append HW DMA header to start of packet.
1280 mwl8k_add_dma_header(skb);
1282 tx_info = IEEE80211_SKB_CB(skb);
1283 mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
1284 tr = (struct mwl8k_dma_data *)skb->data;
1286 fc = wh->frame_control;
1287 qosframe = ieee80211_is_data_qos(fc);
1288 mcframe = is_multicast_ether_addr(wh->addr1);
1289 ampduframe = !!(tx_info->flags & IEEE80211_TX_CTL_AMPDU);
1291 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1292 u16 seqno = mwl8k_vif->seqno;
1293 wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1294 wh->seq_ctrl |= cpu_to_le16(seqno << 4);
1295 mwl8k_vif->seqno = seqno++ % 4096;
1299 qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
1301 dma = pci_map_single(priv->pdev, skb->data,
1302 skb->len, PCI_DMA_TODEVICE);
1304 if (pci_dma_mapping_error(priv->pdev, dma)) {
1305 printk(KERN_DEBUG "%s: failed to dma map skb, "
1306 "dropping TX frame.\n", priv->name);
1310 return NETDEV_TX_OK;
1313 /* Set desc header, cpu bit order. */
1316 tx->tx_priority = index;
1317 tx->qos_control = 0;
1319 tx->peer_id = mwl8k_vif->peer_id;
1321 amsduframe = !!(qos & IEEE80211_QOS_CONTROL_A_MSDU_PRESENT);
1323 /* Setup firmware control bit fields for each frame type. */
1324 if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc)) {
1326 qos = mwl8k_qos_setbit_eosp(qos);
1327 /* Set Queue size to unspecified */
1328 qos = mwl8k_qos_setbit_qlen(qos, 0xff);
1329 } else if (ieee80211_is_data(fc)) {
1332 tx->status |= MWL8K_TXD_STATUS_MULTICAST_TX;
1335 * Tell firmware to not send EAPOL pkts in an
1336 * aggregate. Verify against mac80211 tx path. If
1337 * stack turns off AMPDU for an EAPOL frame this
1338 * check will be removed.
1341 qos = mwl8k_qos_setbit_ack(qos,
1342 MWL8K_TXD_ACK_POLICY_NORMAL);
1344 /* Send pkt in an aggregate if AMPDU frame. */
1346 qos = mwl8k_qos_setbit_ack(qos,
1347 MWL8K_TXD_ACK_POLICY_BLOCKACK);
1349 qos = mwl8k_qos_setbit_ack(qos,
1350 MWL8K_TXD_ACK_POLICY_NORMAL);
1353 qos = mwl8k_qos_setbit_amsdu(qos);
1357 /* Convert to little endian */
1358 tx->qos_control = cpu_to_le16(qos);
1359 tx->status = cpu_to_le32(tx->status);
1360 tx->pkt_phys_addr = cpu_to_le32(dma);
1361 tx->pkt_len = cpu_to_le16(skb->len);
1363 txq->tx_skb[txq->tx_tail] = skb;
1365 spin_lock_bh(&priv->tx_lock);
1367 tx->status = cpu_to_le32(MWL8K_TXD_STATUS_OK |
1368 MWL8K_TXD_STATUS_FW_OWNED);
1370 txq->tx_stats.len++;
1371 priv->pending_tx_pkts++;
1372 txq->tx_stats.count++;
1375 if (txq->tx_tail == MWL8K_TX_DESCS)
1377 if (txq->tx_head == txq->tx_tail)
1378 ieee80211_stop_queue(hw, index);
1380 if (priv->inconfig) {
1382 * Silently queue packet when we are in the middle of
1383 * a config cycle. Notify firmware only if we are
1384 * waiting for TXQs to empty. If a packet is sent
1385 * before .config() is complete, perhaps it is better
1386 * to drop the packet, as the channel is being changed
1387 * and the packet will end up on the wrong channel.
1389 printk(KERN_ERR "%s(): WARNING TX activity while "
1390 "in config\n", __func__);
1392 if (priv->tx_wait != NULL)
1393 mwl8k_tx_start(priv);
1395 mwl8k_tx_start(priv);
1397 spin_unlock_bh(&priv->tx_lock);
1399 return NETDEV_TX_OK;
1404 * Command processing.
1407 /* Timeout firmware commands after 2000ms */
1408 #define MWL8K_CMD_TIMEOUT_MS 2000
1410 static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
1412 DECLARE_COMPLETION_ONSTACK(cmd_wait);
1413 struct mwl8k_priv *priv = hw->priv;
1414 void __iomem *regs = priv->regs;
1415 dma_addr_t dma_addr;
1416 unsigned int dma_size;
1418 unsigned long timeout = 0;
1421 cmd->result = 0xFFFF;
1422 dma_size = le16_to_cpu(cmd->length);
1423 dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
1424 PCI_DMA_BIDIRECTIONAL);
1425 if (pci_dma_mapping_error(priv->pdev, dma_addr))
1428 if (priv->hostcmd_wait != NULL)
1429 printk(KERN_ERR "WARNING host command in progress\n");
1431 spin_lock_irq(&priv->fw_lock);
1432 priv->hostcmd_wait = &cmd_wait;
1433 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
1434 iowrite32(MWL8K_H2A_INT_DOORBELL,
1435 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1436 iowrite32(MWL8K_H2A_INT_DUMMY,
1437 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1438 spin_unlock_irq(&priv->fw_lock);
1440 timeout = wait_for_completion_timeout(&cmd_wait,
1441 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
1443 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1444 PCI_DMA_BIDIRECTIONAL);
1447 spin_lock_irq(&priv->fw_lock);
1448 priv->hostcmd_wait = NULL;
1449 spin_unlock_irq(&priv->fw_lock);
1450 printk(KERN_ERR "%s: Command %s timeout after %u ms\n",
1452 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1453 MWL8K_CMD_TIMEOUT_MS);
1456 rc = cmd->result ? -EINVAL : 0;
1458 printk(KERN_ERR "%s: Command %s error 0x%x\n",
1460 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1470 struct mwl8k_cmd_get_hw_spec {
1471 struct mwl8k_cmd_pkt header;
1473 __u8 host_interface;
1475 __u8 perm_addr[ETH_ALEN];
1480 __u8 mcs_bitmap[16];
1481 __le32 rx_queue_ptr;
1482 __le32 num_tx_queues;
1483 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1485 __le32 num_tx_desc_per_queue;
1486 __le32 total_rx_desc;
1487 } __attribute__((packed));
1489 static int mwl8k_cmd_get_hw_spec(struct ieee80211_hw *hw)
1491 struct mwl8k_priv *priv = hw->priv;
1492 struct mwl8k_cmd_get_hw_spec *cmd;
1496 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1500 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1501 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1503 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1504 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1505 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rx_desc_dma);
1506 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
1507 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1508 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].tx_desc_dma);
1509 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
1510 cmd->total_rx_desc = cpu_to_le32(MWL8K_RX_DESCS);
1512 rc = mwl8k_post_cmd(hw, &cmd->header);
1515 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1516 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1517 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
1518 priv->hw_rev = cmd->hw_rev;
1526 * CMD_MAC_MULTICAST_ADR.
1528 struct mwl8k_cmd_mac_multicast_adr {
1529 struct mwl8k_cmd_pkt header;
1532 __u8 addr[0][ETH_ALEN];
1535 #define MWL8K_ENABLE_RX_MULTICAST 0x000F
1537 static struct mwl8k_cmd_pkt *
1538 __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw,
1539 int mc_count, struct dev_addr_list *mclist)
1541 struct mwl8k_priv *priv = hw->priv;
1542 struct mwl8k_cmd_mac_multicast_adr *cmd;
1546 if (mc_count > priv->num_mcaddrs)
1547 mc_count = priv->num_mcaddrs;
1549 size = sizeof(*cmd) + mc_count * ETH_ALEN;
1551 cmd = kzalloc(size, GFP_ATOMIC);
1555 cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
1556 cmd->header.length = cpu_to_le16(size);
1557 cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
1558 cmd->numaddr = cpu_to_le16(mc_count);
1560 for (i = 0; i < mc_count && mclist; i++) {
1561 if (mclist->da_addrlen != ETH_ALEN) {
1565 memcpy(cmd->addr[i], mclist->da_addr, ETH_ALEN);
1566 mclist = mclist->next;
1569 return &cmd->header;
1573 * CMD_802_11_GET_STAT.
1575 struct mwl8k_cmd_802_11_get_stat {
1576 struct mwl8k_cmd_pkt header;
1579 } __attribute__((packed));
1581 #define MWL8K_STAT_ACK_FAILURE 9
1582 #define MWL8K_STAT_RTS_FAILURE 12
1583 #define MWL8K_STAT_FCS_ERROR 24
1584 #define MWL8K_STAT_RTS_SUCCESS 11
1586 static int mwl8k_cmd_802_11_get_stat(struct ieee80211_hw *hw,
1587 struct ieee80211_low_level_stats *stats)
1589 struct mwl8k_cmd_802_11_get_stat *cmd;
1592 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1596 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
1597 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1598 cmd->action = cpu_to_le16(MWL8K_CMD_GET);
1600 rc = mwl8k_post_cmd(hw, &cmd->header);
1602 stats->dot11ACKFailureCount =
1603 le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
1604 stats->dot11RTSFailureCount =
1605 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
1606 stats->dot11FCSErrorCount =
1607 le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
1608 stats->dot11RTSSuccessCount =
1609 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
1617 * CMD_802_11_RADIO_CONTROL.
1619 struct mwl8k_cmd_802_11_radio_control {
1620 struct mwl8k_cmd_pkt header;
1624 } __attribute__((packed));
1627 mwl8k_cmd_802_11_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
1629 struct mwl8k_priv *priv = hw->priv;
1630 struct mwl8k_cmd_802_11_radio_control *cmd;
1633 if (enable == priv->radio_on && !force)
1636 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1640 cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
1641 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1642 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1643 cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
1644 cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
1646 rc = mwl8k_post_cmd(hw, &cmd->header);
1650 priv->radio_on = enable;
1655 static int mwl8k_cmd_802_11_radio_disable(struct ieee80211_hw *hw)
1657 return mwl8k_cmd_802_11_radio_control(hw, 0, 0);
1660 static int mwl8k_cmd_802_11_radio_enable(struct ieee80211_hw *hw)
1662 return mwl8k_cmd_802_11_radio_control(hw, 1, 0);
1666 mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
1668 struct mwl8k_priv *priv;
1670 if (hw == NULL || hw->priv == NULL)
1674 priv->radio_short_preamble = short_preamble;
1676 return mwl8k_cmd_802_11_radio_control(hw, 1, 1);
1680 * CMD_802_11_RF_TX_POWER.
1682 #define MWL8K_TX_POWER_LEVEL_TOTAL 8
1684 struct mwl8k_cmd_802_11_rf_tx_power {
1685 struct mwl8k_cmd_pkt header;
1687 __le16 support_level;
1688 __le16 current_level;
1690 __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
1691 } __attribute__((packed));
1693 static int mwl8k_cmd_802_11_rf_tx_power(struct ieee80211_hw *hw, int dBm)
1695 struct mwl8k_cmd_802_11_rf_tx_power *cmd;
1698 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1702 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
1703 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1704 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1705 cmd->support_level = cpu_to_le16(dBm);
1707 rc = mwl8k_post_cmd(hw, &cmd->header);
1716 struct mwl8k_cmd_set_pre_scan {
1717 struct mwl8k_cmd_pkt header;
1718 } __attribute__((packed));
1720 static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
1722 struct mwl8k_cmd_set_pre_scan *cmd;
1725 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1729 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
1730 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1732 rc = mwl8k_post_cmd(hw, &cmd->header);
1739 * CMD_SET_POST_SCAN.
1741 struct mwl8k_cmd_set_post_scan {
1742 struct mwl8k_cmd_pkt header;
1744 __u8 bssid[ETH_ALEN];
1745 } __attribute__((packed));
1748 mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, __u8 *mac)
1750 struct mwl8k_cmd_set_post_scan *cmd;
1753 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1757 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
1758 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1760 memcpy(cmd->bssid, mac, ETH_ALEN);
1762 rc = mwl8k_post_cmd(hw, &cmd->header);
1769 * CMD_SET_RF_CHANNEL.
1771 struct mwl8k_cmd_set_rf_channel {
1772 struct mwl8k_cmd_pkt header;
1774 __u8 current_channel;
1775 __le32 channel_flags;
1776 } __attribute__((packed));
1778 static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
1779 struct ieee80211_channel *channel)
1781 struct mwl8k_cmd_set_rf_channel *cmd;
1784 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1788 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
1789 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1790 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1791 cmd->current_channel = channel->hw_value;
1792 if (channel->band == IEEE80211_BAND_2GHZ)
1793 cmd->channel_flags = cpu_to_le32(0x00000081);
1795 cmd->channel_flags = cpu_to_le32(0x00000000);
1797 rc = mwl8k_post_cmd(hw, &cmd->header);
1806 struct mwl8k_cmd_set_slot {
1807 struct mwl8k_cmd_pkt header;
1810 } __attribute__((packed));
1812 static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
1814 struct mwl8k_cmd_set_slot *cmd;
1817 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1821 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
1822 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1823 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1824 cmd->short_slot = short_slot_time;
1826 rc = mwl8k_post_cmd(hw, &cmd->header);
1835 struct mwl8k_cmd_mimo_config {
1836 struct mwl8k_cmd_pkt header;
1838 __u8 rx_antenna_map;
1839 __u8 tx_antenna_map;
1840 } __attribute__((packed));
1842 static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
1844 struct mwl8k_cmd_mimo_config *cmd;
1847 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1851 cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
1852 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1853 cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
1854 cmd->rx_antenna_map = rx;
1855 cmd->tx_antenna_map = tx;
1857 rc = mwl8k_post_cmd(hw, &cmd->header);
1864 * CMD_ENABLE_SNIFFER.
1866 struct mwl8k_cmd_enable_sniffer {
1867 struct mwl8k_cmd_pkt header;
1869 } __attribute__((packed));
1871 static int mwl8k_enable_sniffer(struct ieee80211_hw *hw, bool enable)
1873 struct mwl8k_cmd_enable_sniffer *cmd;
1876 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1880 cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
1881 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1882 cmd->action = cpu_to_le32(!!enable);
1884 rc = mwl8k_post_cmd(hw, &cmd->header);
1891 * CMD_SET_RATEADAPT_MODE.
1893 struct mwl8k_cmd_set_rate_adapt_mode {
1894 struct mwl8k_cmd_pkt header;
1897 } __attribute__((packed));
1899 static int mwl8k_cmd_setrateadaptmode(struct ieee80211_hw *hw, __u16 mode)
1901 struct mwl8k_cmd_set_rate_adapt_mode *cmd;
1904 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1908 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
1909 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1910 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1911 cmd->mode = cpu_to_le16(mode);
1913 rc = mwl8k_post_cmd(hw, &cmd->header);
1922 struct mwl8k_cmd_set_wmm {
1923 struct mwl8k_cmd_pkt header;
1925 } __attribute__((packed));
1927 static int mwl8k_set_wmm(struct ieee80211_hw *hw, bool enable)
1929 struct mwl8k_priv *priv = hw->priv;
1930 struct mwl8k_cmd_set_wmm *cmd;
1933 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1937 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
1938 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1939 cmd->action = cpu_to_le16(!!enable);
1941 rc = mwl8k_post_cmd(hw, &cmd->header);
1945 priv->wmm_enabled = enable;
1951 * CMD_SET_RTS_THRESHOLD.
1953 struct mwl8k_cmd_rts_threshold {
1954 struct mwl8k_cmd_pkt header;
1957 } __attribute__((packed));
1959 static int mwl8k_rts_threshold(struct ieee80211_hw *hw,
1960 u16 action, u16 *threshold)
1962 struct mwl8k_cmd_rts_threshold *cmd;
1965 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1969 cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
1970 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1971 cmd->action = cpu_to_le16(action);
1972 cmd->threshold = cpu_to_le16(*threshold);
1974 rc = mwl8k_post_cmd(hw, &cmd->header);
1981 * CMD_SET_EDCA_PARAMS.
1983 struct mwl8k_cmd_set_edca_params {
1984 struct mwl8k_cmd_pkt header;
1986 /* See MWL8K_SET_EDCA_XXX below */
1989 /* TX opportunity in units of 32 us */
1992 /* Log exponent of max contention period: 0...15*/
1995 /* Log exponent of min contention period: 0...15 */
1998 /* Adaptive interframe spacing in units of 32us */
2001 /* TX queue to configure */
2003 } __attribute__((packed));
2005 #define MWL8K_SET_EDCA_CW 0x01
2006 #define MWL8K_SET_EDCA_TXOP 0x02
2007 #define MWL8K_SET_EDCA_AIFS 0x04
2009 #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
2010 MWL8K_SET_EDCA_TXOP | \
2011 MWL8K_SET_EDCA_AIFS)
2014 mwl8k_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
2015 __u16 cw_min, __u16 cw_max,
2016 __u8 aifs, __u16 txop)
2018 struct mwl8k_cmd_set_edca_params *cmd;
2021 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2025 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
2026 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2027 cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
2028 cmd->txop = cpu_to_le16(txop);
2029 cmd->log_cw_max = (u8)ilog2(cw_max + 1);
2030 cmd->log_cw_min = (u8)ilog2(cw_min + 1);
2034 rc = mwl8k_post_cmd(hw, &cmd->header);
2041 * CMD_FINALIZE_JOIN.
2044 /* FJ beacon buffer size is compiled into the firmware. */
2045 #define MWL8K_FJ_BEACON_MAXLEN 128
2047 struct mwl8k_cmd_finalize_join {
2048 struct mwl8k_cmd_pkt header;
2049 __le32 sleep_interval; /* Number of beacon periods to sleep */
2050 __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
2051 } __attribute__((packed));
2053 static int mwl8k_finalize_join(struct ieee80211_hw *hw, void *frame,
2054 __u16 framelen, __u16 dtim)
2056 struct mwl8k_cmd_finalize_join *cmd;
2057 struct ieee80211_mgmt *payload = frame;
2065 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2069 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
2070 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2071 cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
2073 hdrlen = ieee80211_hdrlen(payload->frame_control);
2075 payload_len = framelen > hdrlen ? framelen - hdrlen : 0;
2077 /* XXX TBD Might just have to abort and return an error */
2078 if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
2079 printk(KERN_ERR "%s(): WARNING: Incomplete beacon "
2080 "sent to firmware. Sz=%u MAX=%u\n", __func__,
2081 payload_len, MWL8K_FJ_BEACON_MAXLEN);
2083 if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
2084 payload_len = MWL8K_FJ_BEACON_MAXLEN;
2086 if (payload && payload_len)
2087 memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
2089 rc = mwl8k_post_cmd(hw, &cmd->header);
2097 struct mwl8k_cmd_update_sta_db {
2098 struct mwl8k_cmd_pkt header;
2100 /* See STADB_ACTION_TYPE */
2103 /* Peer MAC address */
2104 __u8 peer_addr[ETH_ALEN];
2108 /* Peer info - valid during add/update. */
2109 struct peer_capability_info peer_info;
2110 } __attribute__((packed));
2112 static int mwl8k_cmd_update_sta_db(struct ieee80211_hw *hw,
2113 struct ieee80211_vif *vif, __u32 action)
2115 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
2116 struct ieee80211_bss_conf *info = &mv_vif->bss_info;
2117 struct mwl8k_cmd_update_sta_db *cmd;
2118 struct peer_capability_info *peer_info;
2119 struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
2123 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2127 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
2128 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2130 cmd->action = cpu_to_le32(action);
2131 peer_info = &cmd->peer_info;
2132 memcpy(cmd->peer_addr, mv_vif->bssid, ETH_ALEN);
2135 case MWL8K_STA_DB_ADD_ENTRY:
2136 case MWL8K_STA_DB_MODIFY_ENTRY:
2137 /* Build peer_info block */
2138 peer_info->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
2139 peer_info->basic_caps = cpu_to_le16(info->assoc_capability);
2140 peer_info->interop = 1;
2141 peer_info->amsdu_enabled = 0;
2143 rates = peer_info->legacy_rates;
2144 for (count = 0; count < mv_vif->legacy_nrates; count++)
2145 rates[count] = bitrates[count].hw_value;
2147 rc = mwl8k_post_cmd(hw, &cmd->header);
2149 mv_vif->peer_id = peer_info->station_id;
2153 case MWL8K_STA_DB_DEL_ENTRY:
2154 case MWL8K_STA_DB_FLUSH:
2156 rc = mwl8k_post_cmd(hw, &cmd->header);
2158 mv_vif->peer_id = 0;
2169 #define MWL8K_RATE_INDEX_MAX_ARRAY 14
2171 #define MWL8K_FRAME_PROT_DISABLED 0x00
2172 #define MWL8K_FRAME_PROT_11G 0x07
2173 #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
2174 #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
2176 struct mwl8k_cmd_update_set_aid {
2177 struct mwl8k_cmd_pkt header;
2180 /* AP's MAC address (BSSID) */
2181 __u8 bssid[ETH_ALEN];
2182 __le16 protection_mode;
2183 __u8 supp_rates[MWL8K_RATE_INDEX_MAX_ARRAY];
2184 } __attribute__((packed));
2186 static int mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
2187 struct ieee80211_vif *vif)
2189 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
2190 struct ieee80211_bss_conf *info = &mv_vif->bss_info;
2191 struct mwl8k_cmd_update_set_aid *cmd;
2192 struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
2197 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2201 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
2202 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2203 cmd->aid = cpu_to_le16(info->aid);
2205 memcpy(cmd->bssid, mv_vif->bssid, ETH_ALEN);
2207 if (info->use_cts_prot) {
2208 prot_mode = MWL8K_FRAME_PROT_11G;
2210 switch (info->ht_operation_mode &
2211 IEEE80211_HT_OP_MODE_PROTECTION) {
2212 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
2213 prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
2215 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
2216 prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
2219 prot_mode = MWL8K_FRAME_PROT_DISABLED;
2223 cmd->protection_mode = cpu_to_le16(prot_mode);
2225 for (count = 0; count < mv_vif->legacy_nrates; count++)
2226 cmd->supp_rates[count] = bitrates[count].hw_value;
2228 rc = mwl8k_post_cmd(hw, &cmd->header);
2237 struct mwl8k_cmd_update_rateset {
2238 struct mwl8k_cmd_pkt header;
2239 __u8 legacy_rates[MWL8K_RATE_INDEX_MAX_ARRAY];
2241 /* Bitmap for supported MCS codes. */
2242 __u8 mcs_set[MWL8K_IEEE_LEGACY_DATA_RATES];
2243 __u8 reserved[MWL8K_IEEE_LEGACY_DATA_RATES];
2244 } __attribute__((packed));
2246 static int mwl8k_update_rateset(struct ieee80211_hw *hw,
2247 struct ieee80211_vif *vif)
2249 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
2250 struct mwl8k_cmd_update_rateset *cmd;
2251 struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
2255 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2259 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
2260 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2262 for (count = 0; count < mv_vif->legacy_nrates; count++)
2263 cmd->legacy_rates[count] = bitrates[count].hw_value;
2265 rc = mwl8k_post_cmd(hw, &cmd->header);
2272 * CMD_USE_FIXED_RATE.
2274 #define MWL8K_RATE_TABLE_SIZE 8
2275 #define MWL8K_UCAST_RATE 0
2276 #define MWL8K_USE_AUTO_RATE 0x0002
2278 struct mwl8k_rate_entry {
2279 /* Set to 1 if HT rate, 0 if legacy. */
2282 /* Set to 1 to use retry_count field. */
2283 __le32 enable_retry;
2285 /* Specified legacy rate or MCS. */
2288 /* Number of allowed retries. */
2290 } __attribute__((packed));
2292 struct mwl8k_rate_table {
2293 /* 1 to allow specified rate and below */
2294 __le32 allow_rate_drop;
2296 struct mwl8k_rate_entry rate_entry[MWL8K_RATE_TABLE_SIZE];
2297 } __attribute__((packed));
2299 struct mwl8k_cmd_use_fixed_rate {
2300 struct mwl8k_cmd_pkt header;
2302 struct mwl8k_rate_table rate_table;
2304 /* Unicast, Broadcast or Multicast */
2308 } __attribute__((packed));
2310 static int mwl8k_cmd_use_fixed_rate(struct ieee80211_hw *hw,
2311 u32 action, u32 rate_type, struct mwl8k_rate_table *rate_table)
2313 struct mwl8k_cmd_use_fixed_rate *cmd;
2317 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2321 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2322 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2324 cmd->action = cpu_to_le32(action);
2325 cmd->rate_type = cpu_to_le32(rate_type);
2327 if (rate_table != NULL) {
2328 /* Copy over each field manually so
2329 * that bitflipping can be done
2331 cmd->rate_table.allow_rate_drop =
2332 cpu_to_le32(rate_table->allow_rate_drop);
2333 cmd->rate_table.num_rates =
2334 cpu_to_le32(rate_table->num_rates);
2336 for (count = 0; count < rate_table->num_rates; count++) {
2337 struct mwl8k_rate_entry *dst =
2338 &cmd->rate_table.rate_entry[count];
2339 struct mwl8k_rate_entry *src =
2340 &rate_table->rate_entry[count];
2342 dst->is_ht_rate = cpu_to_le32(src->is_ht_rate);
2343 dst->enable_retry = cpu_to_le32(src->enable_retry);
2344 dst->rate = cpu_to_le32(src->rate);
2345 dst->retry_count = cpu_to_le32(src->retry_count);
2349 rc = mwl8k_post_cmd(hw, &cmd->header);
2357 * Interrupt handling.
2359 static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
2361 struct ieee80211_hw *hw = dev_id;
2362 struct mwl8k_priv *priv = hw->priv;
2365 status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
2366 iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
2371 if (status & MWL8K_A2H_INT_TX_DONE)
2372 tasklet_schedule(&priv->tx_reclaim_task);
2374 if (status & MWL8K_A2H_INT_RX_READY) {
2375 while (rxq_process(hw, 0, 1))
2376 rxq_refill(hw, 0, 1);
2379 if (status & MWL8K_A2H_INT_OPC_DONE) {
2380 if (priv->hostcmd_wait != NULL) {
2381 complete(priv->hostcmd_wait);
2382 priv->hostcmd_wait = NULL;
2386 if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
2387 if (!priv->inconfig &&
2389 mwl8k_txq_busy(priv))
2390 mwl8k_tx_start(priv);
2398 * Core driver operations.
2400 static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2402 struct mwl8k_priv *priv = hw->priv;
2403 int index = skb_get_queue_mapping(skb);
2406 if (priv->current_channel == NULL) {
2407 printk(KERN_DEBUG "%s: dropped TX frame since radio "
2408 "disabled\n", priv->name);
2410 return NETDEV_TX_OK;
2413 rc = mwl8k_txq_xmit(hw, index, skb);
2418 struct mwl8k_work_struct {
2419 /* Initialized by mwl8k_queue_work(). */
2420 struct work_struct wt;
2422 /* Required field passed in to mwl8k_queue_work(). */
2423 struct ieee80211_hw *hw;
2425 /* Required field passed in to mwl8k_queue_work(). */
2426 int (*wfunc)(struct work_struct *w);
2428 /* Initialized by mwl8k_queue_work(). */
2429 struct completion *cmd_wait;
2435 * Optional field. Refer to explanation of MWL8K_WQ_XXX_XXX
2436 * flags for explanation. Defaults to MWL8K_WQ_DEFAULT_OPTIONS.
2440 /* Optional field. Defaults to MWL8K_CONFIG_TIMEOUT_MS. */
2441 unsigned long timeout_ms;
2443 /* Optional field. Defaults to MWL8K_WQ_TXWAIT_ATTEMPTS. */
2444 u32 txwait_attempts;
2446 /* Optional field. Defaults to MWL8K_TXWAIT_MS. */
2451 /* Flags controlling behavior of config queue requests */
2453 /* Caller spins while waiting for completion. */
2454 #define MWL8K_WQ_SPIN 0x00000001
2456 /* Wait for TX queues to empty before proceeding with configuration. */
2457 #define MWL8K_WQ_TX_WAIT_EMPTY 0x00000002
2459 /* Queue request and return immediately. */
2460 #define MWL8K_WQ_POST_REQUEST 0x00000004
2463 * Caller sleeps and waits for task complete notification.
2464 * Do not use in atomic context.
2466 #define MWL8K_WQ_SLEEP 0x00000008
2468 /* Free work struct when task is done. */
2469 #define MWL8K_WQ_FREE_WORKSTRUCT 0x00000010
2472 * Config request is queued and returns to caller imediately. Use
2473 * this in atomic context. Work struct is freed by mwl8k_queue_work()
2474 * when this flag is set.
2476 #define MWL8K_WQ_QUEUE_ONLY (MWL8K_WQ_POST_REQUEST | \
2477 MWL8K_WQ_FREE_WORKSTRUCT)
2479 /* Default work queue behavior is to sleep and wait for tx completion. */
2480 #define MWL8K_WQ_DEFAULT_OPTIONS (MWL8K_WQ_SLEEP | MWL8K_WQ_TX_WAIT_EMPTY)
2483 * Default config request timeout. Add adjustments to make sure the
2484 * config thread waits long enough for both tx wait and cmd wait before
2488 /* Time to wait for all TXQs to drain. TX Doorbell is pressed each time. */
2489 #define MWL8K_TXWAIT_TIMEOUT_MS 1000
2491 /* Default number of TX wait attempts. */
2492 #define MWL8K_WQ_TXWAIT_ATTEMPTS 4
2494 /* Total time to wait for TXQ to drain. */
2495 #define MWL8K_TXWAIT_MS (MWL8K_TXWAIT_TIMEOUT_MS * \
2496 MWL8K_WQ_TXWAIT_ATTEMPTS)
2498 /* Scheduling slop. */
2499 #define MWL8K_OS_SCHEDULE_OVERHEAD_MS 200
2501 #define MWL8K_CONFIG_TIMEOUT_MS (MWL8K_CMD_TIMEOUT_MS + \
2503 MWL8K_OS_SCHEDULE_OVERHEAD_MS)
2505 static void mwl8k_config_thread(struct work_struct *wt)
2507 struct mwl8k_work_struct *worker = (struct mwl8k_work_struct *)wt;
2508 struct ieee80211_hw *hw = worker->hw;
2509 struct mwl8k_priv *priv = hw->priv;
2512 spin_lock_irq(&priv->tx_lock);
2513 priv->inconfig = true;
2514 spin_unlock_irq(&priv->tx_lock);
2516 ieee80211_stop_queues(hw);
2519 * Wait for host queues to drain before doing PHY
2520 * reconfiguration. This avoids interrupting any in-flight
2521 * DMA transfers to the hardware.
2523 if (worker->options & MWL8K_WQ_TX_WAIT_EMPTY) {
2527 u32 tx_wait_attempts = worker->txwait_attempts;
2529 time_remaining = worker->tx_timeout_ms;
2530 if (!tx_wait_attempts)
2531 tx_wait_attempts = 1;
2533 timeout = worker->tx_timeout_ms/tx_wait_attempts;
2537 iter = tx_wait_attempts;
2541 if (time_remaining > timeout) {
2542 time_remaining -= timeout;
2543 wait_time = timeout;
2545 wait_time = time_remaining;
2550 rc = mwl8k_tx_wait_empty(hw, wait_time);
2552 printk(KERN_ERR "%s() txwait timeout=%ums "
2553 "Retry:%u/%u\n", __func__, timeout,
2554 tx_wait_attempts - iter + 1,
2557 } while (rc && --iter);
2559 rc = iter ? 0 : -ETIMEDOUT;
2562 rc = worker->wfunc(wt);
2564 spin_lock_irq(&priv->tx_lock);
2565 priv->inconfig = false;
2566 if (priv->pending_tx_pkts && priv->radio_on)
2567 mwl8k_tx_start(priv);
2568 spin_unlock_irq(&priv->tx_lock);
2569 ieee80211_wake_queues(hw);
2572 if (worker->options & MWL8K_WQ_SLEEP)
2573 complete(worker->cmd_wait);
2575 if (worker->options & MWL8K_WQ_FREE_WORKSTRUCT)
2579 static int mwl8k_queue_work(struct ieee80211_hw *hw,
2580 struct mwl8k_work_struct *worker,
2581 struct workqueue_struct *wqueue,
2582 int (*wfunc)(struct work_struct *w))
2584 unsigned long timeout = 0;
2587 DECLARE_COMPLETION_ONSTACK(cmd_wait);
2589 if (!worker->timeout_ms)
2590 worker->timeout_ms = MWL8K_CONFIG_TIMEOUT_MS;
2592 if (!worker->options)
2593 worker->options = MWL8K_WQ_DEFAULT_OPTIONS;
2595 if (!worker->txwait_attempts)
2596 worker->txwait_attempts = MWL8K_WQ_TXWAIT_ATTEMPTS;
2598 if (!worker->tx_timeout_ms)
2599 worker->tx_timeout_ms = MWL8K_TXWAIT_MS;
2602 worker->cmd_wait = &cmd_wait;
2604 worker->wfunc = wfunc;
2606 INIT_WORK(&worker->wt, mwl8k_config_thread);
2607 queue_work(wqueue, &worker->wt);
2609 if (worker->options & MWL8K_WQ_POST_REQUEST) {
2612 if (worker->options & MWL8K_WQ_SPIN) {
2613 timeout = worker->timeout_ms;
2614 while (timeout && (worker->rc > 0)) {
2618 } else if (worker->options & MWL8K_WQ_SLEEP)
2619 timeout = wait_for_completion_timeout(&cmd_wait,
2620 msecs_to_jiffies(worker->timeout_ms));
2625 cancel_work_sync(&worker->wt);
2633 struct mwl8k_start_worker {
2634 struct mwl8k_work_struct header;
2637 static int mwl8k_start_wt(struct work_struct *wt)
2639 struct mwl8k_start_worker *worker = (struct mwl8k_start_worker *)wt;
2640 struct ieee80211_hw *hw = worker->header.hw;
2641 struct mwl8k_priv *priv = hw->priv;
2644 if (priv->vif != NULL) {
2646 goto mwl8k_start_exit;
2650 if (mwl8k_cmd_802_11_radio_enable(hw)) {
2652 goto mwl8k_start_exit;
2655 /* Purge TX/RX HW queues */
2656 if (mwl8k_cmd_set_pre_scan(hw)) {
2658 goto mwl8k_start_exit;
2661 if (mwl8k_cmd_set_post_scan(hw, "\x00\x00\x00\x00\x00\x00")) {
2663 goto mwl8k_start_exit;
2666 /* Enable firmware rate adaptation */
2667 if (mwl8k_cmd_setrateadaptmode(hw, 0)) {
2669 goto mwl8k_start_exit;
2672 /* Disable WMM. WMM gets enabled when stack sends WMM parms */
2673 if (mwl8k_set_wmm(hw, 0)) {
2675 goto mwl8k_start_exit;
2678 /* Disable sniffer mode */
2679 if (mwl8k_enable_sniffer(hw, 0))
2686 static int mwl8k_start(struct ieee80211_hw *hw)
2688 struct mwl8k_start_worker *worker;
2689 struct mwl8k_priv *priv = hw->priv;
2692 /* Enable tx reclaim tasklet */
2693 tasklet_enable(&priv->tx_reclaim_task);
2695 rc = request_irq(priv->pdev->irq, &mwl8k_interrupt,
2696 IRQF_SHARED, MWL8K_NAME, hw);
2698 printk(KERN_ERR "%s: failed to register IRQ handler\n",
2701 goto mwl8k_start_disable_tasklet;
2704 /* Enable interrupts */
2705 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2707 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
2708 if (worker == NULL) {
2710 goto mwl8k_start_disable_irq;
2713 rc = mwl8k_queue_work(hw, &worker->header,
2714 priv->config_wq, mwl8k_start_wt);
2719 if (rc == -ETIMEDOUT)
2720 printk(KERN_ERR "%s() timed out\n", __func__);
2724 mwl8k_start_disable_irq:
2725 spin_lock_irq(&priv->tx_lock);
2726 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2727 spin_unlock_irq(&priv->tx_lock);
2728 free_irq(priv->pdev->irq, hw);
2730 mwl8k_start_disable_tasklet:
2731 tasklet_disable(&priv->tx_reclaim_task);
2736 struct mwl8k_stop_worker {
2737 struct mwl8k_work_struct header;
2740 static int mwl8k_stop_wt(struct work_struct *wt)
2742 struct mwl8k_stop_worker *worker = (struct mwl8k_stop_worker *)wt;
2743 struct ieee80211_hw *hw = worker->header.hw;
2745 return mwl8k_cmd_802_11_radio_disable(hw);
2748 static void mwl8k_stop(struct ieee80211_hw *hw)
2751 struct mwl8k_stop_worker *worker;
2752 struct mwl8k_priv *priv = hw->priv;
2755 if (priv->vif != NULL)
2758 ieee80211_stop_queues(hw);
2760 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
2764 rc = mwl8k_queue_work(hw, &worker->header,
2765 priv->config_wq, mwl8k_stop_wt);
2767 if (rc == -ETIMEDOUT)
2768 printk(KERN_ERR "%s() timed out\n", __func__);
2770 /* Disable interrupts */
2771 spin_lock_irq(&priv->tx_lock);
2772 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2773 spin_unlock_irq(&priv->tx_lock);
2774 free_irq(priv->pdev->irq, hw);
2776 /* Stop finalize join worker */
2777 cancel_work_sync(&priv->finalize_join_worker);
2778 if (priv->beacon_skb != NULL)
2779 dev_kfree_skb(priv->beacon_skb);
2781 /* Stop tx reclaim tasklet */
2782 tasklet_disable(&priv->tx_reclaim_task);
2784 /* Stop config thread */
2785 flush_workqueue(priv->config_wq);
2787 /* Return all skbs to mac80211 */
2788 for (i = 0; i < MWL8K_TX_QUEUES; i++)
2789 mwl8k_txq_reclaim(hw, i, 1);
2792 static int mwl8k_add_interface(struct ieee80211_hw *hw,
2793 struct ieee80211_if_init_conf *conf)
2795 struct mwl8k_priv *priv = hw->priv;
2796 struct mwl8k_vif *mwl8k_vif;
2799 * We only support one active interface at a time.
2801 if (priv->vif != NULL)
2805 * We only support managed interfaces for now.
2807 if (conf->type != NL80211_IFTYPE_STATION)
2810 /* Clean out driver private area */
2811 mwl8k_vif = MWL8K_VIF(conf->vif);
2812 memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
2814 /* Save the mac address */
2815 memcpy(mwl8k_vif->mac_addr, conf->mac_addr, ETH_ALEN);
2817 /* Back pointer to parent config block */
2818 mwl8k_vif->priv = priv;
2820 /* Setup initial PHY parameters */
2821 memcpy(mwl8k_vif->legacy_rates,
2822 priv->rates, sizeof(mwl8k_vif->legacy_rates));
2823 mwl8k_vif->legacy_nrates = ARRAY_SIZE(priv->rates);
2825 /* Set Initial sequence number to zero */
2826 mwl8k_vif->seqno = 0;
2828 priv->vif = conf->vif;
2829 priv->current_channel = NULL;
2834 static void mwl8k_remove_interface(struct ieee80211_hw *hw,
2835 struct ieee80211_if_init_conf *conf)
2837 struct mwl8k_priv *priv = hw->priv;
2839 if (priv->vif == NULL)
2845 struct mwl8k_config_worker {
2846 struct mwl8k_work_struct header;
2850 static int mwl8k_config_wt(struct work_struct *wt)
2852 struct mwl8k_config_worker *worker =
2853 (struct mwl8k_config_worker *)wt;
2854 struct ieee80211_hw *hw = worker->header.hw;
2855 struct ieee80211_conf *conf = &hw->conf;
2856 struct mwl8k_priv *priv = hw->priv;
2859 if (mwl8k_cmd_802_11_radio_enable(hw)) {
2861 goto mwl8k_config_exit;
2864 priv->current_channel = conf->channel;
2866 if (mwl8k_cmd_set_rf_channel(hw, conf->channel)) {
2868 goto mwl8k_config_exit;
2871 if (conf->power_level > 18)
2872 conf->power_level = 18;
2873 if (mwl8k_cmd_802_11_rf_tx_power(hw, conf->power_level)) {
2875 goto mwl8k_config_exit;
2878 if (mwl8k_cmd_mimo_config(hw, 0x7, 0x7))
2885 static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
2888 struct mwl8k_config_worker *worker;
2889 struct mwl8k_priv *priv = hw->priv;
2891 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
2895 worker->changed = changed;
2896 rc = mwl8k_queue_work(hw, &worker->header,
2897 priv->config_wq, mwl8k_config_wt);
2898 if (rc == -ETIMEDOUT) {
2899 printk(KERN_ERR "%s() timed out.\n", __func__);
2906 * mac80211 will crash on anything other than -EINVAL on
2907 * error. Looks like wireless extensions which calls mac80211
2908 * may be the actual culprit...
2910 return rc ? -EINVAL : 0;
2913 struct mwl8k_bss_info_changed_worker {
2914 struct mwl8k_work_struct header;
2915 struct ieee80211_vif *vif;
2916 struct ieee80211_bss_conf *info;
2920 static int mwl8k_bss_info_changed_wt(struct work_struct *wt)
2922 struct mwl8k_bss_info_changed_worker *worker =
2923 (struct mwl8k_bss_info_changed_worker *)wt;
2924 struct ieee80211_hw *hw = worker->header.hw;
2925 struct ieee80211_vif *vif = worker->vif;
2926 struct ieee80211_bss_conf *info = worker->info;
2930 struct mwl8k_priv *priv = hw->priv;
2931 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
2933 changed = worker->changed;
2934 priv->capture_beacon = false;
2937 memcpy(&mwl8k_vif->bss_info, info,
2938 sizeof(struct ieee80211_bss_conf));
2941 if (mwl8k_update_rateset(hw, vif))
2942 goto mwl8k_bss_info_changed_exit;
2944 /* Turn on rate adaptation */
2945 if (mwl8k_cmd_use_fixed_rate(hw, MWL8K_USE_AUTO_RATE,
2946 MWL8K_UCAST_RATE, NULL))
2947 goto mwl8k_bss_info_changed_exit;
2949 /* Set radio preamble */
2950 if (mwl8k_set_radio_preamble(hw, info->use_short_preamble))
2951 goto mwl8k_bss_info_changed_exit;
2954 if (mwl8k_cmd_set_slot(hw, info->use_short_slot))
2955 goto mwl8k_bss_info_changed_exit;
2957 /* Update peer rate info */
2958 if (mwl8k_cmd_update_sta_db(hw, vif,
2959 MWL8K_STA_DB_MODIFY_ENTRY))
2960 goto mwl8k_bss_info_changed_exit;
2963 if (mwl8k_cmd_set_aid(hw, vif))
2964 goto mwl8k_bss_info_changed_exit;
2967 * Finalize the join. Tell rx handler to process
2968 * next beacon from our BSSID.
2970 memcpy(priv->capture_bssid, mwl8k_vif->bssid, ETH_ALEN);
2971 priv->capture_beacon = true;
2973 mwl8k_cmd_update_sta_db(hw, vif, MWL8K_STA_DB_DEL_ENTRY);
2974 memset(&mwl8k_vif->bss_info, 0,
2975 sizeof(struct ieee80211_bss_conf));
2976 memset(mwl8k_vif->bssid, 0, ETH_ALEN);
2979 mwl8k_bss_info_changed_exit:
2984 static void mwl8k_bss_info_changed(struct ieee80211_hw *hw,
2985 struct ieee80211_vif *vif,
2986 struct ieee80211_bss_conf *info,
2989 struct mwl8k_bss_info_changed_worker *worker;
2990 struct mwl8k_priv *priv = hw->priv;
2991 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
2994 if (changed & BSS_CHANGED_BSSID)
2995 memcpy(mv_vif->bssid, info->bssid, ETH_ALEN);
2997 if ((changed & BSS_CHANGED_ASSOC) == 0)
3000 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
3005 worker->info = info;
3006 worker->changed = changed;
3007 rc = mwl8k_queue_work(hw, &worker->header,
3009 mwl8k_bss_info_changed_wt);
3011 if (rc == -ETIMEDOUT)
3012 printk(KERN_ERR "%s() timed out\n", __func__);
3015 static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
3016 int mc_count, struct dev_addr_list *mclist)
3018 struct mwl8k_cmd_pkt *cmd;
3020 cmd = __mwl8k_cmd_mac_multicast_adr(hw, mc_count, mclist);
3022 return (unsigned long)cmd;
3025 struct mwl8k_configure_filter_worker {
3026 struct mwl8k_work_struct header;
3027 unsigned int changed_flags;
3028 unsigned int total_flags;
3029 struct mwl8k_cmd_pkt *multicast_adr_cmd;
3032 #define MWL8K_SUPPORTED_IF_FLAGS FIF_BCN_PRBRESP_PROMISC
3034 static int mwl8k_configure_filter_wt(struct work_struct *wt)
3036 struct mwl8k_configure_filter_worker *worker =
3037 (struct mwl8k_configure_filter_worker *)wt;
3038 struct ieee80211_hw *hw = worker->header.hw;
3039 struct mwl8k_priv *priv = hw->priv;
3042 if (worker->changed_flags & FIF_BCN_PRBRESP_PROMISC) {
3043 if (worker->total_flags & FIF_BCN_PRBRESP_PROMISC)
3044 rc = mwl8k_cmd_set_pre_scan(hw);
3048 bssid = "\x00\x00\x00\x00\x00\x00";
3049 if (priv->vif != NULL)
3050 bssid = MWL8K_VIF(priv->vif)->bssid;
3052 rc = mwl8k_cmd_set_post_scan(hw, bssid);
3056 if (!rc && worker->multicast_adr_cmd != NULL)
3057 rc = mwl8k_post_cmd(hw, worker->multicast_adr_cmd);
3058 kfree(worker->multicast_adr_cmd);
3063 static void mwl8k_configure_filter(struct ieee80211_hw *hw,
3064 unsigned int changed_flags,
3065 unsigned int *total_flags,
3068 struct mwl8k_priv *priv = hw->priv;
3069 struct mwl8k_configure_filter_worker *worker;
3071 /* Clear unsupported feature flags */
3072 *total_flags &= MWL8K_SUPPORTED_IF_FLAGS;
3074 if (!(changed_flags & MWL8K_SUPPORTED_IF_FLAGS))
3077 worker = kzalloc(sizeof(*worker), GFP_ATOMIC);
3081 worker->changed_flags = changed_flags;
3082 worker->total_flags = *total_flags;
3083 worker->multicast_adr_cmd = (void *)(unsigned long)multicast;
3085 mwl8k_queue_work(hw, &worker->header, priv->config_wq,
3086 mwl8k_configure_filter_wt);
3089 struct mwl8k_set_rts_threshold_worker {
3090 struct mwl8k_work_struct header;
3094 static int mwl8k_set_rts_threshold_wt(struct work_struct *wt)
3096 struct mwl8k_set_rts_threshold_worker *worker =
3097 (struct mwl8k_set_rts_threshold_worker *)wt;
3099 struct ieee80211_hw *hw = worker->header.hw;
3100 u16 threshold = (u16)(worker->value);
3103 rc = mwl8k_rts_threshold(hw, MWL8K_CMD_SET, &threshold);
3108 static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
3111 struct mwl8k_set_rts_threshold_worker *worker;
3112 struct mwl8k_priv *priv = hw->priv;
3114 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
3118 worker->value = value;
3120 rc = mwl8k_queue_work(hw, &worker->header,
3122 mwl8k_set_rts_threshold_wt);
3125 if (rc == -ETIMEDOUT) {
3126 printk(KERN_ERR "%s() timed out\n", __func__);
3133 struct mwl8k_conf_tx_worker {
3134 struct mwl8k_work_struct header;
3136 const struct ieee80211_tx_queue_params *params;
3139 static int mwl8k_conf_tx_wt(struct work_struct *wt)
3141 struct mwl8k_conf_tx_worker *worker =
3142 (struct mwl8k_conf_tx_worker *)wt;
3144 struct ieee80211_hw *hw = worker->header.hw;
3145 u16 queue = worker->queue;
3146 const struct ieee80211_tx_queue_params *params = worker->params;
3148 struct mwl8k_priv *priv = hw->priv;
3151 if (!priv->wmm_enabled) {
3152 if (mwl8k_set_wmm(hw, 1)) {
3154 goto mwl8k_conf_tx_exit;
3158 if (mwl8k_set_edca_params(hw, GET_TXQ(queue), params->cw_min,
3159 params->cw_max, params->aifs, params->txop))
3165 static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
3166 const struct ieee80211_tx_queue_params *params)
3169 struct mwl8k_conf_tx_worker *worker;
3170 struct mwl8k_priv *priv = hw->priv;
3172 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
3176 worker->queue = queue;
3177 worker->params = params;
3178 rc = mwl8k_queue_work(hw, &worker->header,
3179 priv->config_wq, mwl8k_conf_tx_wt);
3181 if (rc == -ETIMEDOUT) {
3182 printk(KERN_ERR "%s() timed out\n", __func__);
3188 static int mwl8k_get_tx_stats(struct ieee80211_hw *hw,
3189 struct ieee80211_tx_queue_stats *stats)
3191 struct mwl8k_priv *priv = hw->priv;
3192 struct mwl8k_tx_queue *txq;
3195 spin_lock_bh(&priv->tx_lock);
3196 for (index = 0; index < MWL8K_TX_QUEUES; index++) {
3197 txq = priv->txq + index;
3198 memcpy(&stats[index], &txq->tx_stats,
3199 sizeof(struct ieee80211_tx_queue_stats));
3201 spin_unlock_bh(&priv->tx_lock);
3205 struct mwl8k_get_stats_worker {
3206 struct mwl8k_work_struct header;
3207 struct ieee80211_low_level_stats *stats;
3210 static int mwl8k_get_stats_wt(struct work_struct *wt)
3212 struct mwl8k_get_stats_worker *worker =
3213 (struct mwl8k_get_stats_worker *)wt;
3215 return mwl8k_cmd_802_11_get_stat(worker->header.hw, worker->stats);
3218 static int mwl8k_get_stats(struct ieee80211_hw *hw,
3219 struct ieee80211_low_level_stats *stats)
3222 struct mwl8k_get_stats_worker *worker;
3223 struct mwl8k_priv *priv = hw->priv;
3225 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
3229 worker->stats = stats;
3230 rc = mwl8k_queue_work(hw, &worker->header,
3231 priv->config_wq, mwl8k_get_stats_wt);
3234 if (rc == -ETIMEDOUT) {
3235 printk(KERN_ERR "%s() timed out\n", __func__);
3242 static const struct ieee80211_ops mwl8k_ops = {
3244 .start = mwl8k_start,
3246 .add_interface = mwl8k_add_interface,
3247 .remove_interface = mwl8k_remove_interface,
3248 .config = mwl8k_config,
3249 .bss_info_changed = mwl8k_bss_info_changed,
3250 .prepare_multicast = mwl8k_prepare_multicast,
3251 .configure_filter = mwl8k_configure_filter,
3252 .set_rts_threshold = mwl8k_set_rts_threshold,
3253 .conf_tx = mwl8k_conf_tx,
3254 .get_tx_stats = mwl8k_get_tx_stats,
3255 .get_stats = mwl8k_get_stats,
3258 static void mwl8k_tx_reclaim_handler(unsigned long data)
3261 struct ieee80211_hw *hw = (struct ieee80211_hw *) data;
3262 struct mwl8k_priv *priv = hw->priv;
3264 spin_lock_bh(&priv->tx_lock);
3265 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3266 mwl8k_txq_reclaim(hw, i, 0);
3268 if (priv->tx_wait != NULL && mwl8k_txq_busy(priv) == 0) {
3269 complete(priv->tx_wait);
3270 priv->tx_wait = NULL;
3272 spin_unlock_bh(&priv->tx_lock);
3275 static void mwl8k_finalize_join_worker(struct work_struct *work)
3277 struct mwl8k_priv *priv =
3278 container_of(work, struct mwl8k_priv, finalize_join_worker);
3279 struct sk_buff *skb = priv->beacon_skb;
3280 u8 dtim = MWL8K_VIF(priv->vif)->bss_info.dtim_period;
3282 mwl8k_finalize_join(priv->hw, skb->data, skb->len, dtim);
3285 priv->beacon_skb = NULL;
3288 static int __devinit mwl8k_probe(struct pci_dev *pdev,
3289 const struct pci_device_id *id)
3291 struct ieee80211_hw *hw;
3292 struct mwl8k_priv *priv;
3297 rc = pci_enable_device(pdev);
3299 printk(KERN_ERR "%s: Cannot enable new PCI device\n",
3304 rc = pci_request_regions(pdev, MWL8K_NAME);
3306 printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
3311 pci_set_master(pdev);
3313 hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
3315 printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
3323 priv->hostcmd_wait = NULL;
3324 priv->tx_wait = NULL;
3325 priv->inconfig = false;
3326 priv->wmm_enabled = false;
3327 priv->pending_tx_pkts = 0;
3328 strncpy(priv->name, MWL8K_NAME, sizeof(priv->name));
3330 spin_lock_init(&priv->fw_lock);
3332 SET_IEEE80211_DEV(hw, &pdev->dev);
3333 pci_set_drvdata(pdev, hw);
3335 priv->regs = pci_iomap(pdev, 1, 0x10000);
3336 if (priv->regs == NULL) {
3337 printk(KERN_ERR "%s: Cannot map device memory\n", priv->name);
3341 memcpy(priv->channels, mwl8k_channels, sizeof(mwl8k_channels));
3342 priv->band.band = IEEE80211_BAND_2GHZ;
3343 priv->band.channels = priv->channels;
3344 priv->band.n_channels = ARRAY_SIZE(mwl8k_channels);
3345 priv->band.bitrates = priv->rates;
3346 priv->band.n_bitrates = ARRAY_SIZE(mwl8k_rates);
3347 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
3349 BUILD_BUG_ON(sizeof(priv->rates) != sizeof(mwl8k_rates));
3350 memcpy(priv->rates, mwl8k_rates, sizeof(mwl8k_rates));
3353 * Extra headroom is the size of the required DMA header
3354 * minus the size of the smallest 802.11 frame (CTS frame).
3356 hw->extra_tx_headroom =
3357 sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
3359 hw->channel_change_time = 10;
3361 hw->queues = MWL8K_TX_QUEUES;
3363 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
3365 /* Set rssi and noise values to dBm */
3366 hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_NOISE_DBM;
3367 hw->vif_data_size = sizeof(struct mwl8k_vif);
3370 /* Set default radio state and preamble */
3372 priv->radio_short_preamble = 0;
3374 /* Finalize join worker */
3375 INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
3377 /* TX reclaim tasklet */
3378 tasklet_init(&priv->tx_reclaim_task,
3379 mwl8k_tx_reclaim_handler, (unsigned long)hw);
3380 tasklet_disable(&priv->tx_reclaim_task);
3382 /* Config workthread */
3383 priv->config_wq = create_singlethread_workqueue("mwl8k_config");
3384 if (priv->config_wq == NULL)
3387 /* Power management cookie */
3388 priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
3389 if (priv->cookie == NULL)
3392 rc = mwl8k_rxq_init(hw, 0);
3395 rxq_refill(hw, 0, INT_MAX);
3397 spin_lock_init(&priv->tx_lock);
3399 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
3400 rc = mwl8k_txq_init(hw, i);
3402 goto err_free_queues;
3405 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3406 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3407 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
3408 iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
3410 rc = request_irq(priv->pdev->irq, &mwl8k_interrupt,
3411 IRQF_SHARED, MWL8K_NAME, hw);
3413 printk(KERN_ERR "%s: failed to register IRQ handler\n",
3415 goto err_free_queues;
3418 /* Reset firmware and hardware */
3419 mwl8k_hw_reset(priv);
3421 /* Ask userland hotplug daemon for the device firmware */
3422 rc = mwl8k_request_firmware(priv, (u32)id->driver_data);
3424 printk(KERN_ERR "%s: Firmware files not found\n", priv->name);
3428 /* Load firmware into hardware */
3429 rc = mwl8k_load_firmware(priv);
3431 printk(KERN_ERR "%s: Cannot start firmware\n", priv->name);
3432 goto err_stop_firmware;
3435 /* Reclaim memory once firmware is successfully loaded */
3436 mwl8k_release_firmware(priv);
3439 * Temporarily enable interrupts. Initial firmware host
3440 * commands use interrupts and avoids polling. Disable
3441 * interrupts when done.
3443 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3445 /* Get config data, mac addrs etc */
3446 rc = mwl8k_cmd_get_hw_spec(hw);
3448 printk(KERN_ERR "%s: Cannot initialise firmware\n", priv->name);
3449 goto err_stop_firmware;
3452 /* Turn radio off */
3453 rc = mwl8k_cmd_802_11_radio_disable(hw);
3455 printk(KERN_ERR "%s: Cannot disable\n", priv->name);
3456 goto err_stop_firmware;
3459 /* Disable interrupts */
3460 spin_lock_irq(&priv->tx_lock);
3461 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3462 spin_unlock_irq(&priv->tx_lock);
3463 free_irq(priv->pdev->irq, hw);
3465 rc = ieee80211_register_hw(hw);
3467 printk(KERN_ERR "%s: Cannot register device\n", priv->name);
3468 goto err_stop_firmware;
3471 fw = (u8 *)&priv->fw_rev;
3472 printk(KERN_INFO "%s: 88W%u %s\n", priv->name, priv->part_num,
3474 printk(KERN_INFO "%s: Driver Ver:%s Firmware Ver:%u.%u.%u.%u\n",
3475 priv->name, MWL8K_VERSION, fw[3], fw[2], fw[1], fw[0]);
3476 printk(KERN_INFO "%s: MAC Address: %pM\n", priv->name,
3477 hw->wiphy->perm_addr);
3482 mwl8k_hw_reset(priv);
3483 mwl8k_release_firmware(priv);
3486 spin_lock_irq(&priv->tx_lock);
3487 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3488 spin_unlock_irq(&priv->tx_lock);
3489 free_irq(priv->pdev->irq, hw);
3492 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3493 mwl8k_txq_deinit(hw, i);
3494 mwl8k_rxq_deinit(hw, 0);
3497 if (priv->cookie != NULL)
3498 pci_free_consistent(priv->pdev, 4,
3499 priv->cookie, priv->cookie_dma);
3501 if (priv->regs != NULL)
3502 pci_iounmap(pdev, priv->regs);
3504 if (priv->config_wq != NULL)
3505 destroy_workqueue(priv->config_wq);
3507 pci_set_drvdata(pdev, NULL);
3508 ieee80211_free_hw(hw);
3511 pci_release_regions(pdev);
3512 pci_disable_device(pdev);
3517 static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
3519 printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
3522 static void __devexit mwl8k_remove(struct pci_dev *pdev)
3524 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
3525 struct mwl8k_priv *priv;
3532 ieee80211_stop_queues(hw);
3534 ieee80211_unregister_hw(hw);
3536 /* Remove tx reclaim tasklet */
3537 tasklet_kill(&priv->tx_reclaim_task);
3539 /* Stop config thread */
3540 destroy_workqueue(priv->config_wq);
3543 mwl8k_hw_reset(priv);
3545 /* Return all skbs to mac80211 */
3546 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3547 mwl8k_txq_reclaim(hw, i, 1);
3549 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3550 mwl8k_txq_deinit(hw, i);
3552 mwl8k_rxq_deinit(hw, 0);
3554 pci_free_consistent(priv->pdev, 4,
3555 priv->cookie, priv->cookie_dma);
3557 pci_iounmap(pdev, priv->regs);
3558 pci_set_drvdata(pdev, NULL);
3559 ieee80211_free_hw(hw);
3560 pci_release_regions(pdev);
3561 pci_disable_device(pdev);
3564 static struct pci_driver mwl8k_driver = {
3566 .id_table = mwl8k_table,
3567 .probe = mwl8k_probe,
3568 .remove = __devexit_p(mwl8k_remove),
3569 .shutdown = __devexit_p(mwl8k_shutdown),
3572 static int __init mwl8k_init(void)
3574 return pci_register_driver(&mwl8k_driver);
3577 static void __exit mwl8k_exit(void)
3579 pci_unregister_driver(&mwl8k_driver);
3582 module_init(mwl8k_init);
3583 module_exit(mwl8k_exit);