2 * drivers/net/wireless/mwl8k.c driver for Marvell TOPDOG 802.11 Wireless cards
4 * Copyright (C) 2008 Marvell Semiconductor Inc.
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
11 #include <linux/init.h>
12 #include <linux/module.h>
13 #include <linux/kernel.h>
14 #include <linux/spinlock.h>
15 #include <linux/list.h>
16 #include <linux/pci.h>
17 #include <linux/delay.h>
18 #include <linux/completion.h>
19 #include <linux/etherdevice.h>
20 #include <net/mac80211.h>
21 #include <linux/moduleparam.h>
22 #include <linux/firmware.h>
23 #include <linux/workqueue.h>
25 #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
26 #define MWL8K_NAME KBUILD_MODNAME
27 #define MWL8K_VERSION "0.9.1"
29 MODULE_DESCRIPTION(MWL8K_DESC);
30 MODULE_VERSION(MWL8K_VERSION);
31 MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
32 MODULE_LICENSE("GPL");
34 static DEFINE_PCI_DEVICE_TABLE(mwl8k_table) = {
35 { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = 8687, },
36 { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = 8687, },
39 MODULE_DEVICE_TABLE(pci, mwl8k_table);
41 #define IEEE80211_ADDR_LEN ETH_ALEN
43 /* Register definitions */
44 #define MWL8K_HIU_GEN_PTR 0x00000c10
45 #define MWL8K_MODE_STA 0x0000005a
46 #define MWL8K_MODE_AP 0x000000a5
47 #define MWL8K_HIU_INT_CODE 0x00000c14
48 #define MWL8K_FWSTA_READY 0xf0f1f2f4
49 #define MWL8K_FWAP_READY 0xf1f2f4a5
50 #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
51 #define MWL8K_HIU_SCRATCH 0x00000c40
53 /* Host->device communications */
54 #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
55 #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
56 #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
57 #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
58 #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
59 #define MWL8K_H2A_INT_DUMMY (1 << 20)
60 #define MWL8K_H2A_INT_RESET (1 << 15)
61 #define MWL8K_H2A_INT_PS (1 << 2)
62 #define MWL8K_H2A_INT_DOORBELL (1 << 1)
63 #define MWL8K_H2A_INT_PPA_READY (1 << 0)
65 /* Device->host communications */
66 #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
67 #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
68 #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
69 #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
70 #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
71 #define MWL8K_A2H_INT_DUMMY (1 << 20)
72 #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
73 #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
74 #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
75 #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
76 #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
77 #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
78 #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
79 #define MWL8K_A2H_INT_RX_READY (1 << 1)
80 #define MWL8K_A2H_INT_TX_DONE (1 << 0)
82 #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
83 MWL8K_A2H_INT_CHNL_SWITCHED | \
84 MWL8K_A2H_INT_QUEUE_EMPTY | \
85 MWL8K_A2H_INT_RADAR_DETECT | \
86 MWL8K_A2H_INT_RADIO_ON | \
87 MWL8K_A2H_INT_RADIO_OFF | \
88 MWL8K_A2H_INT_MAC_EVENT | \
89 MWL8K_A2H_INT_OPC_DONE | \
90 MWL8K_A2H_INT_RX_READY | \
91 MWL8K_A2H_INT_TX_DONE)
93 /* WME stream classes */
94 #define WME_AC_BE 0 /* best effort */
95 #define WME_AC_BK 1 /* background */
96 #define WME_AC_VI 2 /* video */
97 #define WME_AC_VO 3 /* voice */
99 #define MWL8K_RX_QUEUES 1
100 #define MWL8K_TX_QUEUES 4
102 struct mwl8k_rx_queue {
105 /* hw receives here */
108 /* refill descs here */
111 struct mwl8k_rx_desc *rx_desc_area;
112 dma_addr_t rx_desc_dma;
113 struct sk_buff **rx_skb;
118 * The DMA engine requires a modification to the payload.
119 * If the skbuff is shared/cloned, it needs to be unshared.
120 * This method is used to ensure the stack always gets back
121 * the skbuff it sent for transmission.
123 struct sk_buff *clone;
127 struct mwl8k_tx_queue {
128 /* hw transmits here */
131 /* sw appends here */
134 struct ieee80211_tx_queue_stats tx_stats;
135 struct mwl8k_tx_desc *tx_desc_area;
136 dma_addr_t tx_desc_dma;
137 struct mwl8k_skb *tx_skb;
140 /* Pointers to the firmware data and meta information about it. */
141 struct mwl8k_firmware {
143 struct firmware *ucode;
145 /* Boot helper code */
146 struct firmware *helper;
151 struct ieee80211_hw *hw;
153 struct pci_dev *pdev;
155 /* firmware access lock */
158 /* firmware files and meta data */
159 struct mwl8k_firmware fw;
162 /* lock held over TX and TX reap */
166 struct ieee80211_vif *vif;
167 struct list_head vif_list;
169 struct ieee80211_channel *current_channel;
171 /* power management status cookie from firmware */
173 dma_addr_t cookie_dma;
182 * Running count of TX packets in flight, to avoid
183 * iterating over the transmit rings each time.
187 struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
188 struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
191 struct ieee80211_supported_band band;
192 struct ieee80211_channel channels[14];
193 struct ieee80211_rate rates[12];
195 /* RF preamble: Short, Long or Auto */
199 /* WMM MODE 1 for enabled; 0 for disabled */
202 /* Set if PHY config is in progress */
205 /* XXX need to convert this to handle multiple interfaces */
207 u8 capture_bssid[IEEE80211_ADDR_LEN];
208 struct sk_buff *beacon_skb;
211 * This FJ worker has to be global as it is scheduled from the
212 * RX handler. At this point we don't know which interface it
213 * belongs to until the list of bssids waiting to complete join
216 struct work_struct finalize_join_worker;
218 /* Tasklet to reclaim TX descriptors and buffers after tx */
219 struct tasklet_struct tx_reclaim_task;
221 /* Work thread to serialize configuration requests */
222 struct workqueue_struct *config_wq;
223 struct completion *hostcmd_wait;
224 struct completion *tx_wait;
227 /* Per interface specific private data */
229 struct list_head node;
231 /* backpointer to parent config block */
232 struct mwl8k_priv *priv;
234 /* BSS config of AP or IBSS from mac80211*/
235 struct ieee80211_bss_conf bss_info;
237 /* BSSID of AP or IBSS */
238 u8 bssid[IEEE80211_ADDR_LEN];
239 u8 mac_addr[IEEE80211_ADDR_LEN];
242 * Subset of supported legacy rates.
243 * Intersection of AP and STA supported rates.
245 struct ieee80211_rate legacy_rates[12];
247 /* number of supported legacy rates */
250 /* Number of supported MCS rates. Work in progress */
253 /* Index into station database.Returned by update_sta_db call */
256 /* Non AMPDU sequence number assigned by driver */
259 /* Note:There is no channel info,
260 * refer to the master channel info in priv
264 #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
266 static const struct ieee80211_channel mwl8k_channels[] = {
267 { .center_freq = 2412, .hw_value = 1, },
268 { .center_freq = 2417, .hw_value = 2, },
269 { .center_freq = 2422, .hw_value = 3, },
270 { .center_freq = 2427, .hw_value = 4, },
271 { .center_freq = 2432, .hw_value = 5, },
272 { .center_freq = 2437, .hw_value = 6, },
273 { .center_freq = 2442, .hw_value = 7, },
274 { .center_freq = 2447, .hw_value = 8, },
275 { .center_freq = 2452, .hw_value = 9, },
276 { .center_freq = 2457, .hw_value = 10, },
277 { .center_freq = 2462, .hw_value = 11, },
280 static const struct ieee80211_rate mwl8k_rates[] = {
281 { .bitrate = 10, .hw_value = 2, },
282 { .bitrate = 20, .hw_value = 4, },
283 { .bitrate = 55, .hw_value = 11, },
284 { .bitrate = 60, .hw_value = 12, },
285 { .bitrate = 90, .hw_value = 18, },
286 { .bitrate = 110, .hw_value = 22, },
287 { .bitrate = 120, .hw_value = 24, },
288 { .bitrate = 180, .hw_value = 36, },
289 { .bitrate = 240, .hw_value = 48, },
290 { .bitrate = 360, .hw_value = 72, },
291 { .bitrate = 480, .hw_value = 96, },
292 { .bitrate = 540, .hw_value = 108, },
296 #define MWL8K_RADIO_FORCE 0x2
297 #define MWL8K_RADIO_ENABLE 0x1
298 #define MWL8K_RADIO_DISABLE 0x0
299 #define MWL8K_RADIO_AUTO_PREAMBLE 0x0005
300 #define MWL8K_RADIO_SHORT_PREAMBLE 0x0003
301 #define MWL8K_RADIO_LONG_PREAMBLE 0x0001
304 #define MWL8K_WMM_ENABLE 1
305 #define MWL8K_WMM_DISABLE 0
307 #define MWL8K_RADIO_DEFAULT_PREAMBLE MWL8K_RADIO_LONG_PREAMBLE
311 /* Short Slot: 9us slot time */
312 #define MWL8K_SHORT_SLOTTIME 1
314 /* Long slot: 20us slot time */
315 #define MWL8K_LONG_SLOTTIME 0
317 /* Set or get info from Firmware */
318 #define MWL8K_CMD_SET 0x0001
319 #define MWL8K_CMD_GET 0x0000
321 /* Firmware command codes */
322 #define MWL8K_CMD_CODE_DNLD 0x0001
323 #define MWL8K_CMD_GET_HW_SPEC 0x0003
324 #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
325 #define MWL8K_CMD_GET_STAT 0x0014
326 #define MWL8K_CMD_RADIO_CONTROL 0x001C
327 #define MWL8K_CMD_RF_TX_POWER 0x001E
328 #define MWL8K_CMD_SET_PRE_SCAN 0x0107
329 #define MWL8K_CMD_SET_POST_SCAN 0x0108
330 #define MWL8K_CMD_SET_RF_CHANNEL 0x010A
331 #define MWL8K_CMD_SET_SLOT 0x0114
332 #define MWL8K_CMD_MIMO_CONFIG 0x0125
333 #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
334 #define MWL8K_CMD_SET_WMM_MODE 0x0123
335 #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
336 #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
337 #define MWL8K_CMD_UPDATE_STADB 0x1123
338 #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
339 #define MWL8K_CMD_SET_LINKADAPT_MODE 0x0129
340 #define MWL8K_CMD_SET_AID 0x010d
341 #define MWL8K_CMD_SET_RATE 0x0110
342 #define MWL8K_CMD_USE_FIXED_RATE 0x0126
343 #define MWL8K_CMD_RTS_THRESHOLD 0x0113
344 #define MWL8K_CMD_ENCRYPTION 0x1122
346 static const char *mwl8k_cmd_name(u16 cmd, char *buf, int bufsize)
348 #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
349 snprintf(buf, bufsize, "%s", #x);\
352 switch (cmd & (~0x8000)) {
353 MWL8K_CMDNAME(CODE_DNLD);
354 MWL8K_CMDNAME(GET_HW_SPEC);
355 MWL8K_CMDNAME(MAC_MULTICAST_ADR);
356 MWL8K_CMDNAME(GET_STAT);
357 MWL8K_CMDNAME(RADIO_CONTROL);
358 MWL8K_CMDNAME(RF_TX_POWER);
359 MWL8K_CMDNAME(SET_PRE_SCAN);
360 MWL8K_CMDNAME(SET_POST_SCAN);
361 MWL8K_CMDNAME(SET_RF_CHANNEL);
362 MWL8K_CMDNAME(SET_SLOT);
363 MWL8K_CMDNAME(MIMO_CONFIG);
364 MWL8K_CMDNAME(ENABLE_SNIFFER);
365 MWL8K_CMDNAME(SET_WMM_MODE);
366 MWL8K_CMDNAME(SET_EDCA_PARAMS);
367 MWL8K_CMDNAME(SET_FINALIZE_JOIN);
368 MWL8K_CMDNAME(UPDATE_STADB);
369 MWL8K_CMDNAME(SET_RATEADAPT_MODE);
370 MWL8K_CMDNAME(SET_LINKADAPT_MODE);
371 MWL8K_CMDNAME(SET_AID);
372 MWL8K_CMDNAME(SET_RATE);
373 MWL8K_CMDNAME(USE_FIXED_RATE);
374 MWL8K_CMDNAME(RTS_THRESHOLD);
375 MWL8K_CMDNAME(ENCRYPTION);
377 snprintf(buf, bufsize, "0x%x", cmd);
384 /* Hardware and firmware reset */
385 static void mwl8k_hw_reset(struct mwl8k_priv *priv)
387 iowrite32(MWL8K_H2A_INT_RESET,
388 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
389 iowrite32(MWL8K_H2A_INT_RESET,
390 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
394 /* Release fw image */
395 static void mwl8k_release_fw(struct firmware **fw)
399 release_firmware(*fw);
403 static void mwl8k_release_firmware(struct mwl8k_priv *priv)
405 mwl8k_release_fw(&priv->fw.ucode);
406 mwl8k_release_fw(&priv->fw.helper);
409 /* Request fw image */
410 static int mwl8k_request_fw(struct mwl8k_priv *priv,
411 const char *fname, struct firmware **fw)
413 /* release current image */
415 mwl8k_release_fw(fw);
417 return request_firmware((const struct firmware **)fw,
418 fname, &priv->pdev->dev);
421 static int mwl8k_request_firmware(struct mwl8k_priv *priv, u32 part_num)
426 priv->part_num = part_num;
428 snprintf(filename, sizeof(filename),
429 "mwl8k/helper_%u.fw", priv->part_num);
431 rc = mwl8k_request_fw(priv, filename, &priv->fw.helper);
434 "%s Error requesting helper firmware file %s\n",
435 pci_name(priv->pdev), filename);
439 snprintf(filename, sizeof(filename),
440 "mwl8k/fmimage_%u.fw", priv->part_num);
442 rc = mwl8k_request_fw(priv, filename, &priv->fw.ucode);
444 printk(KERN_ERR "%s Error requesting firmware file %s\n",
445 pci_name(priv->pdev), filename);
446 mwl8k_release_fw(&priv->fw.helper);
453 struct mwl8k_cmd_pkt {
459 } __attribute__((packed));
465 mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
467 void __iomem *regs = priv->regs;
472 dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
473 if (pci_dma_mapping_error(priv->pdev, dma_addr))
476 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
477 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
478 iowrite32(MWL8K_H2A_INT_DOORBELL,
479 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
480 iowrite32(MWL8K_H2A_INT_DUMMY,
481 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
488 int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
489 if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
490 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
498 pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
501 * Clear 'command done' interrupt bit.
507 status = ioread32(priv->regs +
508 MWL8K_HIU_A2H_INTERRUPT_STATUS);
509 if (status & MWL8K_A2H_INT_OPC_DONE) {
510 iowrite32(~MWL8K_A2H_INT_OPC_DONE,
511 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
512 ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
522 static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
523 const u8 *data, size_t length)
525 struct mwl8k_cmd_pkt *cmd;
529 cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
533 cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
539 int block_size = length > 256 ? 256 : length;
541 memcpy(cmd->payload, data + done, block_size);
542 cmd->length = cpu_to_le16(block_size);
544 rc = mwl8k_send_fw_load_cmd(priv, cmd,
545 sizeof(*cmd) + block_size);
550 length -= block_size;
555 rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
563 static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
564 const u8 *data, size_t length)
566 unsigned char *buffer;
567 int may_continue, rc = 0;
568 u32 done, prev_block_size;
570 buffer = kmalloc(1024, GFP_KERNEL);
577 while (may_continue > 0) {
580 block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
581 if (block_size & 1) {
585 done += prev_block_size;
586 length -= prev_block_size;
589 if (block_size > 1024 || block_size > length) {
599 if (block_size == 0) {
606 prev_block_size = block_size;
607 memcpy(buffer, data + done, block_size);
609 rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
614 if (!rc && length != 0)
622 static int mwl8k_load_firmware(struct mwl8k_priv *priv)
626 const u8 *ucode = priv->fw.ucode->data;
627 size_t ucode_len = priv->fw.ucode->size;
628 const u8 *helper = priv->fw.helper->data;
629 size_t helper_len = priv->fw.helper->size;
631 if (!memcmp(ucode, "\x01\x00\x00\x00", 4)) {
632 rc = mwl8k_load_fw_image(priv, helper, helper_len);
634 printk(KERN_ERR "%s: unable to load firmware "
635 "helper image\n", pci_name(priv->pdev));
640 rc = mwl8k_feed_fw_image(priv, ucode, ucode_len);
642 rc = mwl8k_load_fw_image(priv, ucode, ucode_len);
646 printk(KERN_ERR "%s: unable to load firmware data\n",
647 pci_name(priv->pdev));
651 iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
656 if (ioread32(priv->regs + MWL8K_HIU_INT_CODE)
657 == MWL8K_FWSTA_READY)
662 return loops ? 0 : -ETIMEDOUT;
667 * Defines shared between transmission and reception.
669 /* HT control fields for firmware */
674 } __attribute__((packed));
676 /* Firmware Station database operations */
677 #define MWL8K_STA_DB_ADD_ENTRY 0
678 #define MWL8K_STA_DB_MODIFY_ENTRY 1
679 #define MWL8K_STA_DB_DEL_ENTRY 2
680 #define MWL8K_STA_DB_FLUSH 3
682 /* Peer Entry flags - used to define the type of the peer node */
683 #define MWL8K_PEER_TYPE_ACCESSPOINT 2
684 #define MWL8K_PEER_TYPE_ADHOC_STATION 4
686 #define MWL8K_IEEE_LEGACY_DATA_RATES 12
687 #define MWL8K_MCS_BITMAP_SIZE 16
690 struct peer_capability_info {
691 /* Peer type - AP vs. STA. */
694 /* Basic 802.11 capabilities from assoc resp. */
697 /* Set if peer supports 802.11n high throughput (HT). */
700 /* Valid if HT is supported. */
702 __u8 extended_ht_caps;
703 struct ewc_ht_info ewc_info;
705 /* Legacy rate table. Intersection of our rates and peer rates. */
706 __u8 legacy_rates[MWL8K_IEEE_LEGACY_DATA_RATES];
708 /* HT rate table. Intersection of our rates and peer rates. */
709 __u8 ht_rates[MWL8K_MCS_BITMAP_SIZE];
712 /* If set, interoperability mode, no proprietary extensions. */
716 __le16 amsdu_enabled;
717 } __attribute__((packed));
719 /* Inline functions to manipulate QoS field in data descriptor. */
720 static inline u16 mwl8k_qos_setbit_tid(u16 qos, u8 tid)
722 u16 val_mask = 0x000f;
723 u16 qos_mask = ~val_mask;
726 return (qos & qos_mask) | (tid & val_mask);
729 static inline u16 mwl8k_qos_setbit_eosp(u16 qos)
731 u16 val_mask = 1 << 4;
733 /* End of Service Period Bit 4 */
734 return qos | val_mask;
737 static inline u16 mwl8k_qos_setbit_ack(u16 qos, u8 ack_policy)
741 u16 qos_mask = ~(val_mask << shift);
743 /* Ack Policy Bit 5-6 */
744 return (qos & qos_mask) | ((ack_policy & val_mask) << shift);
747 static inline u16 mwl8k_qos_setbit_amsdu(u16 qos)
749 u16 val_mask = 1 << 7;
751 /* AMSDU present Bit 7 */
752 return qos | val_mask;
755 static inline u16 mwl8k_qos_setbit_qlen(u16 qos, u8 len)
759 u16 qos_mask = ~(val_mask << shift);
761 /* Queue Length Bits 8-15 */
762 return (qos & qos_mask) | ((len & val_mask) << shift);
765 /* DMA header used by firmware and hardware. */
766 struct mwl8k_dma_data {
768 struct ieee80211_hdr wh;
769 } __attribute__((packed));
771 /* Routines to add/remove DMA header from skb. */
772 static inline int mwl8k_remove_dma_header(struct sk_buff *skb)
774 struct mwl8k_dma_data *tr = (struct mwl8k_dma_data *)(skb->data);
775 void *dst, *src = &tr->wh;
776 __le16 fc = tr->wh.frame_control;
777 int hdrlen = ieee80211_hdrlen(fc);
778 u16 space = sizeof(struct mwl8k_dma_data) - hdrlen;
780 dst = (void *)tr + space;
782 memmove(dst, src, hdrlen);
783 skb_pull(skb, space);
789 static inline struct sk_buff *mwl8k_add_dma_header(struct sk_buff *skb)
791 struct ieee80211_hdr *wh;
793 struct mwl8k_dma_data *tr;
795 wh = (struct ieee80211_hdr *)skb->data;
796 hdrlen = ieee80211_hdrlen(wh->frame_control);
800 * Copy up/down the 802.11 header; the firmware requires
801 * we present a 2-byte payload length followed by a
802 * 4-address header (w/o QoS), followed (optionally) by
803 * any WEP/ExtIV header (but only filled in for CCMP).
805 if (hdrlen != sizeof(struct mwl8k_dma_data))
806 skb_push(skb, sizeof(struct mwl8k_dma_data) - hdrlen);
808 tr = (struct mwl8k_dma_data *)skb->data;
810 memmove(&tr->wh, wh, hdrlen);
813 memset(tr->wh.addr4, 0, IEEE80211_ADDR_LEN);
816 * Firmware length is the length of the fully formed "802.11
817 * payload". That is, everything except for the 802.11 header.
818 * This includes all crypto material including the MIC.
820 tr->fwlen = cpu_to_le16(pktlen - hdrlen);
829 #define MWL8K_RX_CTRL_KEY_INDEX_MASK 0x30
830 #define MWL8K_RX_CTRL_OWNED_BY_HOST 0x02
831 #define MWL8K_RX_CTRL_AMPDU 0x01
833 struct mwl8k_rx_desc {
837 __le32 pkt_phys_addr;
838 __le32 next_rx_desc_phys_addr;
848 } __attribute__((packed));
850 #define MWL8K_RX_DESCS 256
851 #define MWL8K_RX_MAXSZ 3800
853 static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
855 struct mwl8k_priv *priv = hw->priv;
856 struct mwl8k_rx_queue *rxq = priv->rxq + index;
860 rxq->rx_desc_count = 0;
864 size = MWL8K_RX_DESCS * sizeof(struct mwl8k_rx_desc);
867 pci_alloc_consistent(priv->pdev, size, &rxq->rx_desc_dma);
868 if (rxq->rx_desc_area == NULL) {
869 printk(KERN_ERR "%s: failed to alloc RX descriptors\n",
873 memset(rxq->rx_desc_area, 0, size);
875 rxq->rx_skb = kmalloc(MWL8K_RX_DESCS *
876 sizeof(*rxq->rx_skb), GFP_KERNEL);
877 if (rxq->rx_skb == NULL) {
878 printk(KERN_ERR "%s: failed to alloc RX skbuff list\n",
880 pci_free_consistent(priv->pdev, size,
881 rxq->rx_desc_area, rxq->rx_desc_dma);
884 memset(rxq->rx_skb, 0, MWL8K_RX_DESCS * sizeof(*rxq->rx_skb));
886 for (i = 0; i < MWL8K_RX_DESCS; i++) {
887 struct mwl8k_rx_desc *rx_desc;
890 rx_desc = rxq->rx_desc_area + i;
891 nexti = (i + 1) % MWL8K_RX_DESCS;
893 rx_desc->next_rx_desc_phys_addr =
894 cpu_to_le32(rxq->rx_desc_dma
895 + nexti * sizeof(*rx_desc));
896 rx_desc->rx_ctrl = MWL8K_RX_CTRL_OWNED_BY_HOST;
902 static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
904 struct mwl8k_priv *priv = hw->priv;
905 struct mwl8k_rx_queue *rxq = priv->rxq + index;
909 while (rxq->rx_desc_count < MWL8K_RX_DESCS && limit--) {
913 skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
917 rxq->rx_desc_count++;
920 rxq->rx_tail = (rx + 1) % MWL8K_RX_DESCS;
922 rxq->rx_desc_area[rx].pkt_phys_addr =
923 cpu_to_le32(pci_map_single(priv->pdev, skb->data,
924 MWL8K_RX_MAXSZ, DMA_FROM_DEVICE));
926 rxq->rx_desc_area[rx].pkt_len = cpu_to_le16(MWL8K_RX_MAXSZ);
927 rxq->rx_skb[rx] = skb;
929 rxq->rx_desc_area[rx].rx_ctrl = 0;
937 /* Must be called only when the card's reception is completely halted */
938 static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
940 struct mwl8k_priv *priv = hw->priv;
941 struct mwl8k_rx_queue *rxq = priv->rxq + index;
944 for (i = 0; i < MWL8K_RX_DESCS; i++) {
945 if (rxq->rx_skb[i] != NULL) {
948 addr = le32_to_cpu(rxq->rx_desc_area[i].pkt_phys_addr);
949 pci_unmap_single(priv->pdev, addr, MWL8K_RX_MAXSZ,
951 kfree_skb(rxq->rx_skb[i]);
952 rxq->rx_skb[i] = NULL;
959 pci_free_consistent(priv->pdev,
960 MWL8K_RX_DESCS * sizeof(struct mwl8k_rx_desc),
961 rxq->rx_desc_area, rxq->rx_desc_dma);
962 rxq->rx_desc_area = NULL;
967 * Scan a list of BSSIDs to process for finalize join.
968 * Allows for extension to process multiple BSSIDs.
971 mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
973 return priv->capture_beacon &&
974 ieee80211_is_beacon(wh->frame_control) &&
975 !compare_ether_addr(wh->addr3, priv->capture_bssid);
978 static inline void mwl8k_save_beacon(struct mwl8k_priv *priv,
981 priv->capture_beacon = false;
982 memset(priv->capture_bssid, 0, IEEE80211_ADDR_LEN);
985 * Use GFP_ATOMIC as rxq_process is called from
986 * the primary interrupt handler, memory allocation call
989 priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
990 if (priv->beacon_skb != NULL)
991 queue_work(priv->config_wq,
992 &priv->finalize_join_worker);
995 static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
997 struct mwl8k_priv *priv = hw->priv;
998 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1002 while (rxq->rx_desc_count && limit--) {
1003 struct mwl8k_rx_desc *rx_desc;
1004 struct sk_buff *skb;
1005 struct ieee80211_rx_status status;
1007 struct ieee80211_hdr *wh;
1009 rx_desc = rxq->rx_desc_area + rxq->rx_head;
1010 if (!(rx_desc->rx_ctrl & MWL8K_RX_CTRL_OWNED_BY_HOST))
1014 skb = rxq->rx_skb[rxq->rx_head];
1017 rxq->rx_skb[rxq->rx_head] = NULL;
1019 rxq->rx_head = (rxq->rx_head + 1) % MWL8K_RX_DESCS;
1020 rxq->rx_desc_count--;
1022 addr = le32_to_cpu(rx_desc->pkt_phys_addr);
1023 pci_unmap_single(priv->pdev, addr,
1024 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
1026 skb_put(skb, le16_to_cpu(rx_desc->pkt_len));
1027 if (mwl8k_remove_dma_header(skb)) {
1032 wh = (struct ieee80211_hdr *)skb->data;
1035 * Check for pending join operation. save a copy of
1036 * the beacon and schedule a tasklet to send finalize
1037 * join command to the firmware.
1039 if (mwl8k_capture_bssid(priv, wh))
1040 mwl8k_save_beacon(priv, skb);
1042 memset(&status, 0, sizeof(status));
1044 status.signal = -rx_desc->rssi;
1045 status.noise = -rx_desc->noise_level;
1046 status.qual = rx_desc->link_quality;
1048 status.rate_idx = 1;
1050 status.band = IEEE80211_BAND_2GHZ;
1051 status.freq = ieee80211_channel_to_frequency(rx_desc->channel);
1052 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
1053 ieee80211_rx_irqsafe(hw, skb);
1063 * Packet transmission.
1066 /* Transmit queue assignment. */
1068 MWL8K_WME_AC_BK = 0, /* background access */
1069 MWL8K_WME_AC_BE = 1, /* best effort access */
1070 MWL8K_WME_AC_VI = 2, /* video access */
1071 MWL8K_WME_AC_VO = 3, /* voice access */
1074 /* Transmit packet ACK policy */
1075 #define MWL8K_TXD_ACK_POLICY_NORMAL 0
1076 #define MWL8K_TXD_ACK_POLICY_NONE 1
1077 #define MWL8K_TXD_ACK_POLICY_NO_EXPLICIT 2
1078 #define MWL8K_TXD_ACK_POLICY_BLOCKACK 3
1080 #define GET_TXQ(_ac) (\
1081 ((_ac) == WME_AC_VO) ? MWL8K_WME_AC_VO : \
1082 ((_ac) == WME_AC_VI) ? MWL8K_WME_AC_VI : \
1083 ((_ac) == WME_AC_BK) ? MWL8K_WME_AC_BK : \
1086 #define MWL8K_TXD_STATUS_IDLE 0x00000000
1087 #define MWL8K_TXD_STATUS_USED 0x00000001
1088 #define MWL8K_TXD_STATUS_OK 0x00000001
1089 #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
1090 #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
1091 #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
1092 #define MWL8K_TXD_STATUS_BROADCAST_TX 0x00000010
1093 #define MWL8K_TXD_STATUS_FAILED_LINK_ERROR 0x00000020
1094 #define MWL8K_TXD_STATUS_FAILED_EXCEED_LIMIT 0x00000040
1095 #define MWL8K_TXD_STATUS_FAILED_AGING 0x00000080
1096 #define MWL8K_TXD_STATUS_HOST_CMD 0x40000000
1097 #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
1098 #define MWL8K_TXD_SOFTSTALE 0x80
1099 #define MWL8K_TXD_SOFTSTALE_MGMT_RETRY 0x01
1101 struct mwl8k_tx_desc {
1106 __le32 pkt_phys_addr;
1108 __u8 dest_MAC_addr[IEEE80211_ADDR_LEN];
1109 __le32 next_tx_desc_phys_addr;
1114 } __attribute__((packed));
1116 #define MWL8K_TX_DESCS 128
1118 static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
1120 struct mwl8k_priv *priv = hw->priv;
1121 struct mwl8k_tx_queue *txq = priv->txq + index;
1125 memset(&txq->tx_stats, 0,
1126 sizeof(struct ieee80211_tx_queue_stats));
1127 txq->tx_stats.limit = MWL8K_TX_DESCS;
1131 size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
1134 pci_alloc_consistent(priv->pdev, size, &txq->tx_desc_dma);
1135 if (txq->tx_desc_area == NULL) {
1136 printk(KERN_ERR "%s: failed to alloc TX descriptors\n",
1140 memset(txq->tx_desc_area, 0, size);
1142 txq->tx_skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->tx_skb),
1144 if (txq->tx_skb == NULL) {
1145 printk(KERN_ERR "%s: failed to alloc TX skbuff list\n",
1147 pci_free_consistent(priv->pdev, size,
1148 txq->tx_desc_area, txq->tx_desc_dma);
1151 memset(txq->tx_skb, 0, MWL8K_TX_DESCS * sizeof(*txq->tx_skb));
1153 for (i = 0; i < MWL8K_TX_DESCS; i++) {
1154 struct mwl8k_tx_desc *tx_desc;
1157 tx_desc = txq->tx_desc_area + i;
1158 nexti = (i + 1) % MWL8K_TX_DESCS;
1160 tx_desc->status = 0;
1161 tx_desc->next_tx_desc_phys_addr =
1162 cpu_to_le32(txq->tx_desc_dma +
1163 nexti * sizeof(*tx_desc));
1169 static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
1171 iowrite32(MWL8K_H2A_INT_PPA_READY,
1172 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1173 iowrite32(MWL8K_H2A_INT_DUMMY,
1174 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1175 ioread32(priv->regs + MWL8K_HIU_INT_CODE);
1178 static inline int mwl8k_txq_busy(struct mwl8k_priv *priv)
1180 return priv->pending_tx_pkts;
1183 struct mwl8k_txq_info {
1192 static int mwl8k_scan_tx_ring(struct mwl8k_priv *priv,
1193 struct mwl8k_txq_info txinfo[],
1196 int count, desc, status;
1197 struct mwl8k_tx_queue *txq;
1198 struct mwl8k_tx_desc *tx_desc;
1201 memset(txinfo, 0, num_queues * sizeof(struct mwl8k_txq_info));
1202 spin_lock_bh(&priv->tx_lock);
1203 for (count = 0; count < num_queues; count++) {
1204 txq = priv->txq + count;
1205 txinfo[count].len = txq->tx_stats.len;
1206 txinfo[count].head = txq->tx_head;
1207 txinfo[count].tail = txq->tx_tail;
1208 for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
1209 tx_desc = txq->tx_desc_area + desc;
1210 status = le32_to_cpu(tx_desc->status);
1212 if (status & MWL8K_TXD_STATUS_FW_OWNED)
1213 txinfo[count].fw_owned++;
1215 txinfo[count].drv_owned++;
1217 if (tx_desc->pkt_len == 0)
1218 txinfo[count].unused++;
1221 spin_unlock_bh(&priv->tx_lock);
1226 static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw, u32 delay_ms)
1229 unsigned long timeout = 0;
1230 struct mwl8k_priv *priv = hw->priv;
1231 DECLARE_COMPLETION_ONSTACK(cmd_wait);
1235 if (priv->tx_wait != NULL)
1236 printk(KERN_ERR "WARNING Previous TXWaitEmpty instance\n");
1238 spin_lock_bh(&priv->tx_lock);
1239 count = mwl8k_txq_busy(priv);
1241 priv->tx_wait = &cmd_wait;
1242 if (priv->radio_state)
1243 mwl8k_tx_start(priv);
1245 spin_unlock_bh(&priv->tx_lock);
1248 struct mwl8k_txq_info txinfo[4];
1252 timeout = wait_for_completion_timeout(&cmd_wait,
1253 msecs_to_jiffies(delay_ms));
1257 spin_lock_bh(&priv->tx_lock);
1258 priv->tx_wait = NULL;
1259 newcount = mwl8k_txq_busy(priv);
1260 spin_unlock_bh(&priv->tx_lock);
1262 printk(KERN_ERR "%s(%u) TIMEDOUT:%ums Pend:%u-->%u\n",
1263 __func__, __LINE__, delay_ms, count, newcount);
1265 mwl8k_scan_tx_ring(priv, txinfo, 4);
1266 for (index = 0 ; index < 4; index++)
1268 "TXQ:%u L:%u H:%u T:%u FW:%u DRV:%u U:%u\n",
1273 txinfo[index].fw_owned,
1274 txinfo[index].drv_owned,
1275 txinfo[index].unused);
1282 #define MWL8K_TXD_OK (MWL8K_TXD_STATUS_OK | \
1283 MWL8K_TXD_STATUS_OK_RETRY | \
1284 MWL8K_TXD_STATUS_OK_MORE_RETRY)
1285 #define MWL8K_TXD_SUCCESS(stat) ((stat) & MWL8K_TXD_OK)
1286 #define MWL8K_TXD_FAIL_RETRY(stat) \
1287 ((stat) & (MWL8K_TXD_STATUS_FAILED_EXCEED_LIMIT))
1289 static void mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int force)
1291 struct mwl8k_priv *priv = hw->priv;
1292 struct mwl8k_tx_queue *txq = priv->txq + index;
1295 while (txq->tx_stats.len > 0) {
1298 struct mwl8k_tx_desc *tx_desc;
1301 struct sk_buff *skb;
1302 struct ieee80211_tx_info *info;
1307 tx_desc = txq->tx_desc_area + tx;
1309 status = le32_to_cpu(tx_desc->status);
1311 if (status & MWL8K_TXD_STATUS_FW_OWNED) {
1315 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
1318 txq->tx_head = (tx + 1) % MWL8K_TX_DESCS;
1319 BUG_ON(txq->tx_stats.len == 0);
1320 txq->tx_stats.len--;
1321 priv->pending_tx_pkts--;
1323 addr = le32_to_cpu(tx_desc->pkt_phys_addr);
1324 size = (u32)(le16_to_cpu(tx_desc->pkt_len));
1325 skb = txq->tx_skb[tx].skb;
1326 txq->tx_skb[tx].skb = NULL;
1328 BUG_ON(skb == NULL);
1329 pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
1331 rc = mwl8k_remove_dma_header(skb);
1333 /* Mark descriptor as unused */
1334 tx_desc->pkt_phys_addr = 0;
1335 tx_desc->pkt_len = 0;
1337 if (txq->tx_skb[tx].clone) {
1338 /* Replace with original skb
1339 * before returning to stack
1340 * as buffer has been cloned
1343 skb = txq->tx_skb[tx].clone;
1344 txq->tx_skb[tx].clone = NULL;
1348 /* Something has gone wrong here.
1349 * Failed to remove DMA header.
1350 * Print error message and drop packet.
1352 printk(KERN_ERR "%s: Error removing DMA header from "
1353 "tx skb 0x%p.\n", priv->name, skb);
1359 info = IEEE80211_SKB_CB(skb);
1360 ieee80211_tx_info_clear_status(info);
1362 /* Convert firmware status stuff into tx_status */
1363 if (MWL8K_TXD_SUCCESS(status)) {
1365 info->flags |= IEEE80211_TX_STAT_ACK;
1368 ieee80211_tx_status_irqsafe(hw, skb);
1370 wake = !priv->inconfig && priv->radio_state;
1374 ieee80211_wake_queue(hw, index);
1377 /* must be called only when the card's transmit is completely halted */
1378 static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
1380 struct mwl8k_priv *priv = hw->priv;
1381 struct mwl8k_tx_queue *txq = priv->txq + index;
1383 mwl8k_txq_reclaim(hw, index, 1);
1388 pci_free_consistent(priv->pdev,
1389 MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
1390 txq->tx_desc_area, txq->tx_desc_dma);
1391 txq->tx_desc_area = NULL;
1395 mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
1397 struct mwl8k_priv *priv = hw->priv;
1398 struct ieee80211_tx_info *tx_info;
1399 struct ieee80211_hdr *wh;
1400 struct mwl8k_tx_queue *txq;
1401 struct mwl8k_tx_desc *tx;
1402 struct mwl8k_dma_data *tr;
1403 struct mwl8k_vif *mwl8k_vif;
1404 struct sk_buff *org_skb = skb;
1407 bool qosframe = false, ampduframe = false;
1408 bool mcframe = false, eapolframe = false;
1409 bool amsduframe = false;
1412 txq = priv->txq + index;
1413 tx = txq->tx_desc_area + txq->tx_tail;
1415 BUG_ON(txq->tx_skb[txq->tx_tail].skb != NULL);
1418 * Append HW DMA header to start of packet. Drop packet if
1419 * there is not enough space or a failure to unshare/unclone
1422 skb = mwl8k_add_dma_header(skb);
1425 printk(KERN_DEBUG "%s: failed to prepend HW DMA "
1426 "header, dropping TX frame.\n", priv->name);
1427 dev_kfree_skb(org_skb);
1428 return NETDEV_TX_OK;
1431 tx_info = IEEE80211_SKB_CB(skb);
1432 mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
1433 tr = (struct mwl8k_dma_data *)skb->data;
1435 fc = wh->frame_control;
1436 qosframe = ieee80211_is_data_qos(fc);
1437 mcframe = is_multicast_ether_addr(wh->addr1);
1438 ampduframe = !!(tx_info->flags & IEEE80211_TX_CTL_AMPDU);
1440 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1441 u16 seqno = mwl8k_vif->seqno;
1442 wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1443 wh->seq_ctrl |= cpu_to_le16(seqno << 4);
1444 mwl8k_vif->seqno = seqno++ % 4096;
1448 qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
1450 dma = pci_map_single(priv->pdev, skb->data,
1451 skb->len, PCI_DMA_TODEVICE);
1453 if (pci_dma_mapping_error(priv->pdev, dma)) {
1454 printk(KERN_DEBUG "%s: failed to dma map skb, "
1455 "dropping TX frame.\n", priv->name);
1457 if (org_skb != NULL)
1458 dev_kfree_skb(org_skb);
1461 return NETDEV_TX_OK;
1464 /* Set desc header, cpu bit order. */
1467 tx->tx_priority = index;
1468 tx->qos_control = 0;
1470 tx->peer_id = mwl8k_vif->peer_id;
1472 amsduframe = !!(qos & IEEE80211_QOS_CONTROL_A_MSDU_PRESENT);
1474 /* Setup firmware control bit fields for each frame type. */
1475 if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc)) {
1477 qos = mwl8k_qos_setbit_eosp(qos);
1478 /* Set Queue size to unspecified */
1479 qos = mwl8k_qos_setbit_qlen(qos, 0xff);
1480 } else if (ieee80211_is_data(fc)) {
1483 tx->status |= MWL8K_TXD_STATUS_MULTICAST_TX;
1486 * Tell firmware to not send EAPOL pkts in an
1487 * aggregate. Verify against mac80211 tx path. If
1488 * stack turns off AMPDU for an EAPOL frame this
1489 * check will be removed.
1492 qos = mwl8k_qos_setbit_ack(qos,
1493 MWL8K_TXD_ACK_POLICY_NORMAL);
1495 /* Send pkt in an aggregate if AMPDU frame. */
1497 qos = mwl8k_qos_setbit_ack(qos,
1498 MWL8K_TXD_ACK_POLICY_BLOCKACK);
1500 qos = mwl8k_qos_setbit_ack(qos,
1501 MWL8K_TXD_ACK_POLICY_NORMAL);
1504 qos = mwl8k_qos_setbit_amsdu(qos);
1508 /* Convert to little endian */
1509 tx->qos_control = cpu_to_le16(qos);
1510 tx->status = cpu_to_le32(tx->status);
1511 tx->pkt_phys_addr = cpu_to_le32(dma);
1512 tx->pkt_len = cpu_to_le16(skb->len);
1514 txq->tx_skb[txq->tx_tail].skb = skb;
1515 txq->tx_skb[txq->tx_tail].clone =
1516 skb == org_skb ? NULL : org_skb;
1518 spin_lock_bh(&priv->tx_lock);
1520 tx->status = cpu_to_le32(MWL8K_TXD_STATUS_OK |
1521 MWL8K_TXD_STATUS_FW_OWNED);
1523 txq->tx_stats.len++;
1524 priv->pending_tx_pkts++;
1525 txq->tx_stats.count++;
1528 if (txq->tx_tail == MWL8K_TX_DESCS)
1530 if (txq->tx_head == txq->tx_tail)
1531 ieee80211_stop_queue(hw, index);
1533 if (priv->inconfig) {
1535 * Silently queue packet when we are in the middle of
1536 * a config cycle. Notify firmware only if we are
1537 * waiting for TXQs to empty. If a packet is sent
1538 * before .config() is complete, perhaps it is better
1539 * to drop the packet, as the channel is being changed
1540 * and the packet will end up on the wrong channel.
1542 printk(KERN_ERR "%s(): WARNING TX activity while "
1543 "in config\n", __func__);
1545 if (priv->tx_wait != NULL)
1546 mwl8k_tx_start(priv);
1548 mwl8k_tx_start(priv);
1550 spin_unlock_bh(&priv->tx_lock);
1552 return NETDEV_TX_OK;
1557 * Command processing.
1560 /* Timeout firmware commands after 2000ms */
1561 #define MWL8K_CMD_TIMEOUT_MS 2000
1563 static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
1565 DECLARE_COMPLETION_ONSTACK(cmd_wait);
1566 struct mwl8k_priv *priv = hw->priv;
1567 void __iomem *regs = priv->regs;
1568 dma_addr_t dma_addr;
1569 unsigned int dma_size;
1571 u16 __iomem *result;
1572 unsigned long timeout = 0;
1575 cmd->result = 0xFFFF;
1576 dma_size = le16_to_cpu(cmd->length);
1577 dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
1578 PCI_DMA_BIDIRECTIONAL);
1579 if (pci_dma_mapping_error(priv->pdev, dma_addr))
1582 if (priv->hostcmd_wait != NULL)
1583 printk(KERN_ERR "WARNING host command in progress\n");
1585 spin_lock_irq(&priv->fw_lock);
1586 priv->hostcmd_wait = &cmd_wait;
1587 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
1588 iowrite32(MWL8K_H2A_INT_DOORBELL,
1589 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1590 iowrite32(MWL8K_H2A_INT_DUMMY,
1591 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1592 spin_unlock_irq(&priv->fw_lock);
1594 timeout = wait_for_completion_timeout(&cmd_wait,
1595 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
1597 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1598 PCI_DMA_BIDIRECTIONAL);
1600 result = &cmd->result;
1602 spin_lock_irq(&priv->fw_lock);
1603 priv->hostcmd_wait = NULL;
1604 spin_unlock_irq(&priv->fw_lock);
1605 printk(KERN_ERR "%s: Command %s timeout after %u ms\n",
1607 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1608 MWL8K_CMD_TIMEOUT_MS);
1611 rc = *result ? -EINVAL : 0;
1613 printk(KERN_ERR "%s: Command %s error 0x%x\n",
1615 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1625 struct mwl8k_cmd_get_hw_spec {
1626 struct mwl8k_cmd_pkt header;
1628 __u8 host_interface;
1630 __u8 perm_addr[IEEE80211_ADDR_LEN];
1635 __u8 mcs_bitmap[16];
1636 __le32 rx_queue_ptr;
1637 __le32 num_tx_queues;
1638 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1640 __le32 num_tx_desc_per_queue;
1641 __le32 total_rx_desc;
1642 } __attribute__((packed));
1644 static int mwl8k_cmd_get_hw_spec(struct ieee80211_hw *hw)
1646 struct mwl8k_priv *priv = hw->priv;
1647 struct mwl8k_cmd_get_hw_spec *cmd;
1651 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1655 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1656 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1658 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1659 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1660 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rx_desc_dma);
1661 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
1662 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1663 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].tx_desc_dma);
1664 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
1665 cmd->total_rx_desc = cpu_to_le32(MWL8K_RX_DESCS);
1667 rc = mwl8k_post_cmd(hw, &cmd->header);
1670 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1671 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1672 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
1673 priv->hw_rev = cmd->hw_rev;
1674 priv->region_code = le16_to_cpu(cmd->region_code);
1682 * CMD_MAC_MULTICAST_ADR.
1684 struct mwl8k_cmd_mac_multicast_adr {
1685 struct mwl8k_cmd_pkt header;
1688 __u8 addr[1][IEEE80211_ADDR_LEN];
1691 #define MWL8K_ENABLE_RX_MULTICAST 0x000F
1692 static int mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw,
1694 struct dev_addr_list *mclist)
1696 struct mwl8k_cmd_mac_multicast_adr *cmd;
1699 int size = sizeof(*cmd) + ((mc_count - 1) * IEEE80211_ADDR_LEN);
1700 cmd = kzalloc(size, GFP_KERNEL);
1704 cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
1705 cmd->header.length = cpu_to_le16(size);
1706 cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
1707 cmd->numaddr = cpu_to_le16(mc_count);
1708 while ((index < mc_count) && mclist) {
1709 if (mclist->da_addrlen != IEEE80211_ADDR_LEN) {
1711 goto mwl8k_cmd_mac_multicast_adr_exit;
1713 memcpy(cmd->addr[index], mclist->da_addr, IEEE80211_ADDR_LEN);
1715 mclist = mclist->next;
1718 rc = mwl8k_post_cmd(hw, &cmd->header);
1720 mwl8k_cmd_mac_multicast_adr_exit:
1726 * CMD_802_11_GET_STAT.
1728 struct mwl8k_cmd_802_11_get_stat {
1729 struct mwl8k_cmd_pkt header;
1732 } __attribute__((packed));
1734 #define MWL8K_STAT_ACK_FAILURE 9
1735 #define MWL8K_STAT_RTS_FAILURE 12
1736 #define MWL8K_STAT_FCS_ERROR 24
1737 #define MWL8K_STAT_RTS_SUCCESS 11
1739 static int mwl8k_cmd_802_11_get_stat(struct ieee80211_hw *hw,
1740 struct ieee80211_low_level_stats *stats)
1742 struct mwl8k_cmd_802_11_get_stat *cmd;
1745 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1749 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
1750 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1751 cmd->action = cpu_to_le16(MWL8K_CMD_GET);
1753 rc = mwl8k_post_cmd(hw, &cmd->header);
1755 stats->dot11ACKFailureCount =
1756 le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
1757 stats->dot11RTSFailureCount =
1758 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
1759 stats->dot11FCSErrorCount =
1760 le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
1761 stats->dot11RTSSuccessCount =
1762 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
1770 * CMD_802_11_RADIO_CONTROL.
1772 struct mwl8k_cmd_802_11_radio_control {
1773 struct mwl8k_cmd_pkt header;
1777 } __attribute__((packed));
1779 static int mwl8k_cmd_802_11_radio_control(struct ieee80211_hw *hw, int enable)
1781 struct mwl8k_priv *priv = hw->priv;
1782 struct mwl8k_cmd_802_11_radio_control *cmd;
1785 if (((enable & MWL8K_RADIO_ENABLE) == priv->radio_state) &&
1786 !(enable & MWL8K_RADIO_FORCE))
1789 enable &= MWL8K_RADIO_ENABLE;
1791 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1795 cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
1796 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1797 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1798 cmd->control = cpu_to_le16(priv->radio_preamble);
1799 cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
1801 rc = mwl8k_post_cmd(hw, &cmd->header);
1805 priv->radio_state = enable;
1811 mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
1813 struct mwl8k_priv *priv;
1815 if (hw == NULL || hw->priv == NULL)
1819 priv->radio_preamble = (short_preamble ?
1820 MWL8K_RADIO_SHORT_PREAMBLE :
1821 MWL8K_RADIO_LONG_PREAMBLE);
1823 return mwl8k_cmd_802_11_radio_control(hw,
1824 MWL8K_RADIO_ENABLE | MWL8K_RADIO_FORCE);
1828 * CMD_802_11_RF_TX_POWER.
1830 #define MWL8K_TX_POWER_LEVEL_TOTAL 8
1832 struct mwl8k_cmd_802_11_rf_tx_power {
1833 struct mwl8k_cmd_pkt header;
1835 __le16 support_level;
1836 __le16 current_level;
1838 __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
1839 } __attribute__((packed));
1841 static int mwl8k_cmd_802_11_rf_tx_power(struct ieee80211_hw *hw, int dBm)
1843 struct mwl8k_cmd_802_11_rf_tx_power *cmd;
1846 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1850 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
1851 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1852 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1853 cmd->support_level = cpu_to_le16(dBm);
1855 rc = mwl8k_post_cmd(hw, &cmd->header);
1864 struct mwl8k_cmd_set_pre_scan {
1865 struct mwl8k_cmd_pkt header;
1866 } __attribute__((packed));
1868 static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
1870 struct mwl8k_cmd_set_pre_scan *cmd;
1873 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1877 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
1878 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1880 rc = mwl8k_post_cmd(hw, &cmd->header);
1887 * CMD_SET_POST_SCAN.
1889 struct mwl8k_cmd_set_post_scan {
1890 struct mwl8k_cmd_pkt header;
1892 __u8 bssid[IEEE80211_ADDR_LEN];
1893 } __attribute__((packed));
1896 mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, __u8 mac[IEEE80211_ADDR_LEN])
1898 struct mwl8k_cmd_set_post_scan *cmd;
1901 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1905 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
1906 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1908 memcpy(cmd->bssid, mac, IEEE80211_ADDR_LEN);
1910 rc = mwl8k_post_cmd(hw, &cmd->header);
1917 * CMD_SET_RF_CHANNEL.
1919 struct mwl8k_cmd_set_rf_channel {
1920 struct mwl8k_cmd_pkt header;
1922 __u8 current_channel;
1923 __le32 channel_flags;
1924 } __attribute__((packed));
1926 static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
1927 struct ieee80211_channel *channel)
1929 struct mwl8k_cmd_set_rf_channel *cmd;
1932 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1936 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
1937 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1938 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1939 cmd->current_channel = channel->hw_value;
1940 if (channel->band == IEEE80211_BAND_2GHZ)
1941 cmd->channel_flags = cpu_to_le32(0x00000081);
1943 cmd->channel_flags = cpu_to_le32(0x00000000);
1945 rc = mwl8k_post_cmd(hw, &cmd->header);
1954 struct mwl8k_cmd_set_slot {
1955 struct mwl8k_cmd_pkt header;
1958 } __attribute__((packed));
1960 static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, int slot_time)
1962 struct mwl8k_cmd_set_slot *cmd;
1965 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1969 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
1970 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1971 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1972 cmd->short_slot = slot_time == MWL8K_SHORT_SLOTTIME ? 1 : 0;
1974 rc = mwl8k_post_cmd(hw, &cmd->header);
1983 struct mwl8k_cmd_mimo_config {
1984 struct mwl8k_cmd_pkt header;
1986 __u8 rx_antenna_map;
1987 __u8 tx_antenna_map;
1988 } __attribute__((packed));
1990 static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
1992 struct mwl8k_cmd_mimo_config *cmd;
1995 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1999 cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
2000 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2001 cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
2002 cmd->rx_antenna_map = rx;
2003 cmd->tx_antenna_map = tx;
2005 rc = mwl8k_post_cmd(hw, &cmd->header);
2012 * CMD_ENABLE_SNIFFER.
2014 struct mwl8k_cmd_enable_sniffer {
2015 struct mwl8k_cmd_pkt header;
2017 } __attribute__((packed));
2019 static int mwl8k_enable_sniffer(struct ieee80211_hw *hw, bool enable)
2021 struct mwl8k_cmd_enable_sniffer *cmd;
2024 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2028 cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
2029 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2030 cmd->action = enable ? cpu_to_le32((u32)MWL8K_CMD_SET) : 0;
2032 rc = mwl8k_post_cmd(hw, &cmd->header);
2039 * CMD_SET_RATE_ADAPT_MODE.
2041 struct mwl8k_cmd_set_rate_adapt_mode {
2042 struct mwl8k_cmd_pkt header;
2045 } __attribute__((packed));
2047 static int mwl8k_cmd_setrateadaptmode(struct ieee80211_hw *hw, __u16 mode)
2049 struct mwl8k_cmd_set_rate_adapt_mode *cmd;
2052 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2056 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
2057 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2058 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2059 cmd->mode = cpu_to_le16(mode);
2061 rc = mwl8k_post_cmd(hw, &cmd->header);
2070 struct mwl8k_cmd_set_wmm {
2071 struct mwl8k_cmd_pkt header;
2073 } __attribute__((packed));
2075 static int mwl8k_set_wmm(struct ieee80211_hw *hw, bool enable)
2077 struct mwl8k_priv *priv = hw->priv;
2078 struct mwl8k_cmd_set_wmm *cmd;
2081 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2085 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
2086 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2087 cmd->action = enable ? cpu_to_le16(MWL8K_CMD_SET) : 0;
2089 rc = mwl8k_post_cmd(hw, &cmd->header);
2093 priv->wmm_mode = enable;
2099 * CMD_SET_RTS_THRESHOLD.
2101 struct mwl8k_cmd_rts_threshold {
2102 struct mwl8k_cmd_pkt header;
2105 } __attribute__((packed));
2107 static int mwl8k_rts_threshold(struct ieee80211_hw *hw,
2108 u16 action, u16 *threshold)
2110 struct mwl8k_cmd_rts_threshold *cmd;
2113 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2117 cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
2118 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2119 cmd->action = cpu_to_le16(action);
2120 cmd->threshold = cpu_to_le16(*threshold);
2122 rc = mwl8k_post_cmd(hw, &cmd->header);
2129 * CMD_SET_EDCA_PARAMS.
2131 struct mwl8k_cmd_set_edca_params {
2132 struct mwl8k_cmd_pkt header;
2134 /* See MWL8K_SET_EDCA_XXX below */
2137 /* TX opportunity in units of 32 us */
2140 /* Log exponent of max contention period: 0...15*/
2143 /* Log exponent of min contention period: 0...15 */
2146 /* Adaptive interframe spacing in units of 32us */
2149 /* TX queue to configure */
2151 } __attribute__((packed));
2153 #define MWL8K_GET_EDCA_ALL 0
2154 #define MWL8K_SET_EDCA_CW 0x01
2155 #define MWL8K_SET_EDCA_TXOP 0x02
2156 #define MWL8K_SET_EDCA_AIFS 0x04
2158 #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
2159 MWL8K_SET_EDCA_TXOP | \
2160 MWL8K_SET_EDCA_AIFS)
2163 mwl8k_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
2164 __u16 cw_min, __u16 cw_max,
2165 __u8 aifs, __u16 txop)
2167 struct mwl8k_cmd_set_edca_params *cmd;
2168 u32 log_cw_min, log_cw_max;
2171 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2175 log_cw_min = ilog2(cw_min+1);
2176 log_cw_max = ilog2(cw_max+1);
2177 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
2178 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2180 cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
2181 cmd->txop = cpu_to_le16(txop);
2182 cmd->log_cw_max = (u8)log_cw_max;
2183 cmd->log_cw_min = (u8)log_cw_min;
2187 rc = mwl8k_post_cmd(hw, &cmd->header);
2194 * CMD_FINALIZE_JOIN.
2197 /* FJ beacon buffer size is compiled into the firmware. */
2198 #define MWL8K_FJ_BEACON_MAXLEN 128
2200 struct mwl8k_cmd_finalize_join {
2201 struct mwl8k_cmd_pkt header;
2202 __le32 sleep_interval; /* Number of beacon periods to sleep */
2203 __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
2204 } __attribute__((packed));
2206 static int mwl8k_finalize_join(struct ieee80211_hw *hw, void *frame,
2207 __u16 framelen, __u16 dtim)
2209 struct mwl8k_cmd_finalize_join *cmd;
2210 struct ieee80211_mgmt *payload = frame;
2218 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2222 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
2223 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2226 cmd->sleep_interval = cpu_to_le32(dtim);
2228 cmd->sleep_interval = cpu_to_le32(1);
2230 hdrlen = ieee80211_hdrlen(payload->frame_control);
2232 payload_len = framelen > hdrlen ? framelen - hdrlen : 0;
2234 /* XXX TBD Might just have to abort and return an error */
2235 if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
2236 printk(KERN_ERR "%s(): WARNING: Incomplete beacon "
2237 "sent to firmware. Sz=%u MAX=%u\n", __func__,
2238 payload_len, MWL8K_FJ_BEACON_MAXLEN);
2240 payload_len = payload_len > MWL8K_FJ_BEACON_MAXLEN ?
2241 MWL8K_FJ_BEACON_MAXLEN : payload_len;
2243 if (payload && payload_len)
2244 memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
2246 rc = mwl8k_post_cmd(hw, &cmd->header);
2254 struct mwl8k_cmd_update_sta_db {
2255 struct mwl8k_cmd_pkt header;
2257 /* See STADB_ACTION_TYPE */
2260 /* Peer MAC address */
2261 __u8 peer_addr[IEEE80211_ADDR_LEN];
2265 /* Peer info - valid during add/update. */
2266 struct peer_capability_info peer_info;
2267 } __attribute__((packed));
2269 static int mwl8k_cmd_update_sta_db(struct ieee80211_hw *hw,
2270 struct ieee80211_vif *vif, __u32 action)
2272 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
2273 struct ieee80211_bss_conf *info = &mv_vif->bss_info;
2274 struct mwl8k_cmd_update_sta_db *cmd;
2275 struct peer_capability_info *peer_info;
2276 struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
2280 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2284 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
2285 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2287 cmd->action = cpu_to_le32(action);
2288 peer_info = &cmd->peer_info;
2289 memcpy(cmd->peer_addr, mv_vif->bssid, IEEE80211_ADDR_LEN);
2292 case MWL8K_STA_DB_ADD_ENTRY:
2293 case MWL8K_STA_DB_MODIFY_ENTRY:
2294 /* Build peer_info block */
2295 peer_info->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
2296 peer_info->basic_caps = cpu_to_le16(info->assoc_capability);
2297 peer_info->interop = 1;
2298 peer_info->amsdu_enabled = 0;
2300 rates = peer_info->legacy_rates;
2301 for (count = 0 ; count < mv_vif->legacy_nrates; count++)
2302 rates[count] = bitrates[count].hw_value;
2304 rc = mwl8k_post_cmd(hw, &cmd->header);
2306 mv_vif->peer_id = peer_info->station_id;
2310 case MWL8K_STA_DB_DEL_ENTRY:
2311 case MWL8K_STA_DB_FLUSH:
2313 rc = mwl8k_post_cmd(hw, &cmd->header);
2315 mv_vif->peer_id = 0;
2326 #define IEEE80211_OPMODE_DISABLED 0x00
2327 #define IEEE80211_OPMODE_NON_MEMBER_PROT_MODE 0x01
2328 #define IEEE80211_OPMODE_ONE_20MHZ_STA_PROT_MODE 0x02
2329 #define IEEE80211_OPMODE_HTMIXED_PROT_MODE 0x03
2331 #define MWL8K_RATE_INDEX_MAX_ARRAY 14
2333 #define MWL8K_FRAME_PROT_DISABLED 0x00
2334 #define MWL8K_FRAME_PROT_11G 0x07
2335 #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
2336 #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
2337 #define MWL8K_FRAME_PROT_MASK 0x07
2339 struct mwl8k_cmd_update_set_aid {
2340 struct mwl8k_cmd_pkt header;
2343 /* AP's MAC address (BSSID) */
2344 __u8 bssid[IEEE80211_ADDR_LEN];
2345 __le16 protection_mode;
2346 __u8 supp_rates[MWL8K_RATE_INDEX_MAX_ARRAY];
2347 } __attribute__((packed));
2349 static int mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
2350 struct ieee80211_vif *vif)
2352 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
2353 struct ieee80211_bss_conf *info = &mv_vif->bss_info;
2354 struct mwl8k_cmd_update_set_aid *cmd;
2355 struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
2360 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2364 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
2365 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2366 cmd->aid = cpu_to_le16(info->aid);
2368 memcpy(cmd->bssid, mv_vif->bssid, IEEE80211_ADDR_LEN);
2370 prot_mode = MWL8K_FRAME_PROT_DISABLED;
2372 if (info->use_cts_prot) {
2373 prot_mode = MWL8K_FRAME_PROT_11G;
2375 switch (info->ht_operation_mode &
2376 IEEE80211_HT_OP_MODE_PROTECTION) {
2377 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
2378 prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
2380 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
2381 prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
2384 prot_mode = MWL8K_FRAME_PROT_DISABLED;
2389 cmd->protection_mode = cpu_to_le16(prot_mode);
2391 for (count = 0; count < mv_vif->legacy_nrates; count++)
2392 cmd->supp_rates[count] = bitrates[count].hw_value;
2394 rc = mwl8k_post_cmd(hw, &cmd->header);
2403 struct mwl8k_cmd_update_rateset {
2404 struct mwl8k_cmd_pkt header;
2405 __u8 legacy_rates[MWL8K_RATE_INDEX_MAX_ARRAY];
2407 /* Bitmap for supported MCS codes. */
2408 __u8 mcs_set[MWL8K_IEEE_LEGACY_DATA_RATES];
2409 __u8 reserved[MWL8K_IEEE_LEGACY_DATA_RATES];
2410 } __attribute__((packed));
2412 static int mwl8k_update_rateset(struct ieee80211_hw *hw,
2413 struct ieee80211_vif *vif)
2415 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
2416 struct mwl8k_cmd_update_rateset *cmd;
2417 struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
2421 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2425 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
2426 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2428 for (count = 0; count < mv_vif->legacy_nrates; count++)
2429 cmd->legacy_rates[count] = bitrates[count].hw_value;
2431 rc = mwl8k_post_cmd(hw, &cmd->header);
2438 * CMD_USE_FIXED_RATE.
2440 #define MWL8K_RATE_TABLE_SIZE 8
2441 #define MWL8K_UCAST_RATE 0
2442 #define MWL8K_MCAST_RATE 1
2443 #define MWL8K_BCAST_RATE 2
2445 #define MWL8K_USE_FIXED_RATE 0x0001
2446 #define MWL8K_USE_AUTO_RATE 0x0002
2448 struct mwl8k_rate_entry {
2449 /* Set to 1 if HT rate, 0 if legacy. */
2452 /* Set to 1 to use retry_count field. */
2453 __le32 enable_retry;
2455 /* Specified legacy rate or MCS. */
2458 /* Number of allowed retries. */
2460 } __attribute__((packed));
2462 struct mwl8k_rate_table {
2463 /* 1 to allow specified rate and below */
2464 __le32 allow_rate_drop;
2466 struct mwl8k_rate_entry rate_entry[MWL8K_RATE_TABLE_SIZE];
2467 } __attribute__((packed));
2469 struct mwl8k_cmd_use_fixed_rate {
2470 struct mwl8k_cmd_pkt header;
2472 struct mwl8k_rate_table rate_table;
2474 /* Unicast, Broadcast or Multicast */
2478 } __attribute__((packed));
2480 static int mwl8k_cmd_use_fixed_rate(struct ieee80211_hw *hw,
2481 u32 action, u32 rate_type, struct mwl8k_rate_table *rate_table)
2483 struct mwl8k_cmd_use_fixed_rate *cmd;
2487 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2491 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2492 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2494 cmd->action = cpu_to_le32(action);
2495 cmd->rate_type = cpu_to_le32(rate_type);
2497 if (rate_table != NULL) {
2498 /* Copy over each field manually so
2499 * that bitflipping can be done
2501 cmd->rate_table.allow_rate_drop =
2502 cpu_to_le32(rate_table->allow_rate_drop);
2503 cmd->rate_table.num_rates =
2504 cpu_to_le32(rate_table->num_rates);
2506 for (count = 0; count < rate_table->num_rates; count++) {
2507 struct mwl8k_rate_entry *dst =
2508 &cmd->rate_table.rate_entry[count];
2509 struct mwl8k_rate_entry *src =
2510 &rate_table->rate_entry[count];
2512 dst->is_ht_rate = cpu_to_le32(src->is_ht_rate);
2513 dst->enable_retry = cpu_to_le32(src->enable_retry);
2514 dst->rate = cpu_to_le32(src->rate);
2515 dst->retry_count = cpu_to_le32(src->retry_count);
2519 rc = mwl8k_post_cmd(hw, &cmd->header);
2527 * Interrupt handling.
2529 static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
2531 struct ieee80211_hw *hw = dev_id;
2532 struct mwl8k_priv *priv = hw->priv;
2535 status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
2536 iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
2538 status &= priv->int_mask;
2542 if (status & MWL8K_A2H_INT_TX_DONE)
2543 tasklet_schedule(&priv->tx_reclaim_task);
2545 if (status & MWL8K_A2H_INT_RX_READY) {
2546 while (rxq_process(hw, 0, 1))
2547 rxq_refill(hw, 0, 1);
2550 if (status & MWL8K_A2H_INT_OPC_DONE) {
2551 if (priv->hostcmd_wait != NULL) {
2552 complete(priv->hostcmd_wait);
2553 priv->hostcmd_wait = NULL;
2557 if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
2558 if (!priv->inconfig &&
2559 priv->radio_state &&
2560 mwl8k_txq_busy(priv))
2561 mwl8k_tx_start(priv);
2569 * Core driver operations.
2571 static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2573 struct mwl8k_priv *priv = hw->priv;
2574 int index = skb_get_queue_mapping(skb);
2577 if (priv->current_channel == NULL) {
2578 printk(KERN_DEBUG "%s: dropped TX frame since radio "
2579 "disabled\n", priv->name);
2581 return NETDEV_TX_OK;
2584 rc = mwl8k_txq_xmit(hw, index, skb);
2589 struct mwl8k_work_struct {
2590 /* Initialized by mwl8k_queue_work(). */
2591 struct work_struct wt;
2593 /* Required field passed in to mwl8k_queue_work(). */
2594 struct ieee80211_hw *hw;
2596 /* Required field passed in to mwl8k_queue_work(). */
2597 int (*wfunc)(struct work_struct *w);
2599 /* Initialized by mwl8k_queue_work(). */
2600 struct completion *cmd_wait;
2606 * Optional field. Refer to explanation of MWL8K_WQ_XXX_XXX
2607 * flags for explanation. Defaults to MWL8K_WQ_DEFAULT_OPTIONS.
2611 /* Optional field. Defaults to MWL8K_CONFIG_TIMEOUT_MS. */
2612 unsigned long timeout_ms;
2614 /* Optional field. Defaults to MWL8K_WQ_TXWAIT_ATTEMPTS. */
2615 u32 txwait_attempts;
2617 /* Optional field. Defaults to MWL8K_TXWAIT_MS. */
2622 /* Flags controlling behavior of config queue requests */
2624 /* Caller spins while waiting for completion. */
2625 #define MWL8K_WQ_SPIN 0x00000001
2627 /* Wait for TX queues to empty before proceeding with configuration. */
2628 #define MWL8K_WQ_TX_WAIT_EMPTY 0x00000002
2630 /* Queue request and return immediately. */
2631 #define MWL8K_WQ_POST_REQUEST 0x00000004
2634 * Caller sleeps and waits for task complete notification.
2635 * Do not use in atomic context.
2637 #define MWL8K_WQ_SLEEP 0x00000008
2639 /* Free work struct when task is done. */
2640 #define MWL8K_WQ_FREE_WORKSTRUCT 0x00000010
2643 * Config request is queued and returns to caller imediately. Use
2644 * this in atomic context. Work struct is freed by mwl8k_queue_work()
2645 * when this flag is set.
2647 #define MWL8K_WQ_QUEUE_ONLY (MWL8K_WQ_POST_REQUEST | \
2648 MWL8K_WQ_FREE_WORKSTRUCT)
2650 /* Default work queue behavior is to sleep and wait for tx completion. */
2651 #define MWL8K_WQ_DEFAULT_OPTIONS (MWL8K_WQ_SLEEP | MWL8K_WQ_TX_WAIT_EMPTY)
2654 * Default config request timeout. Add adjustments to make sure the
2655 * config thread waits long enough for both tx wait and cmd wait before
2659 /* Time to wait for all TXQs to drain. TX Doorbell is pressed each time. */
2660 #define MWL8K_TXWAIT_TIMEOUT_MS 1000
2662 /* Default number of TX wait attempts. */
2663 #define MWL8K_WQ_TXWAIT_ATTEMPTS 4
2665 /* Total time to wait for TXQ to drain. */
2666 #define MWL8K_TXWAIT_MS (MWL8K_TXWAIT_TIMEOUT_MS * \
2667 MWL8K_WQ_TXWAIT_ATTEMPTS)
2669 /* Scheduling slop. */
2670 #define MWL8K_OS_SCHEDULE_OVERHEAD_MS 200
2672 #define MWL8K_CONFIG_TIMEOUT_MS (MWL8K_CMD_TIMEOUT_MS + \
2674 MWL8K_OS_SCHEDULE_OVERHEAD_MS)
2676 static void mwl8k_config_thread(struct work_struct *wt)
2678 struct mwl8k_work_struct *worker = (struct mwl8k_work_struct *)wt;
2679 struct ieee80211_hw *hw = worker->hw;
2680 struct mwl8k_priv *priv = hw->priv;
2683 spin_lock_irq(&priv->tx_lock);
2684 priv->inconfig = true;
2685 spin_unlock_irq(&priv->tx_lock);
2687 ieee80211_stop_queues(hw);
2690 * Wait for host queues to drain before doing PHY
2691 * reconfiguration. This avoids interrupting any in-flight
2692 * DMA transfers to the hardware.
2694 if (worker->options & MWL8K_WQ_TX_WAIT_EMPTY) {
2698 u32 tx_wait_attempts = worker->txwait_attempts;
2700 time_remaining = worker->tx_timeout_ms;
2701 if (!tx_wait_attempts)
2702 tx_wait_attempts = 1;
2704 timeout = worker->tx_timeout_ms/tx_wait_attempts;
2708 iter = tx_wait_attempts;
2712 if (time_remaining > timeout) {
2713 time_remaining -= timeout;
2714 wait_time = timeout;
2716 wait_time = time_remaining;
2721 rc = mwl8k_tx_wait_empty(hw, wait_time);
2723 printk(KERN_ERR "%s() txwait timeout=%ums "
2724 "Retry:%u/%u\n", __func__, timeout,
2725 tx_wait_attempts - iter + 1,
2728 } while (rc && --iter);
2730 rc = iter ? 0 : -ETIMEDOUT;
2733 rc = worker->wfunc(wt);
2735 spin_lock_irq(&priv->tx_lock);
2736 priv->inconfig = false;
2737 if (priv->pending_tx_pkts && priv->radio_state)
2738 mwl8k_tx_start(priv);
2739 spin_unlock_irq(&priv->tx_lock);
2740 ieee80211_wake_queues(hw);
2743 if (worker->options & MWL8K_WQ_SLEEP)
2744 complete(worker->cmd_wait);
2746 if (worker->options & MWL8K_WQ_FREE_WORKSTRUCT)
2750 static int mwl8k_queue_work(struct ieee80211_hw *hw,
2751 struct mwl8k_work_struct *worker,
2752 struct workqueue_struct *wqueue,
2753 int (*wfunc)(struct work_struct *w))
2755 unsigned long timeout = 0;
2758 DECLARE_COMPLETION_ONSTACK(cmd_wait);
2760 if (!worker->timeout_ms)
2761 worker->timeout_ms = MWL8K_CONFIG_TIMEOUT_MS;
2763 if (!worker->options)
2764 worker->options = MWL8K_WQ_DEFAULT_OPTIONS;
2766 if (!worker->txwait_attempts)
2767 worker->txwait_attempts = MWL8K_WQ_TXWAIT_ATTEMPTS;
2769 if (!worker->tx_timeout_ms)
2770 worker->tx_timeout_ms = MWL8K_TXWAIT_MS;
2773 worker->cmd_wait = &cmd_wait;
2775 worker->wfunc = wfunc;
2777 INIT_WORK(&worker->wt, mwl8k_config_thread);
2778 queue_work(wqueue, &worker->wt);
2780 if (worker->options & MWL8K_WQ_POST_REQUEST) {
2783 if (worker->options & MWL8K_WQ_SPIN) {
2784 timeout = worker->timeout_ms;
2785 while (timeout && (worker->rc > 0)) {
2789 } else if (worker->options & MWL8K_WQ_SLEEP)
2790 timeout = wait_for_completion_timeout(&cmd_wait,
2791 msecs_to_jiffies(worker->timeout_ms));
2796 cancel_work_sync(&worker->wt);
2804 struct mwl8k_start_worker {
2805 struct mwl8k_work_struct header;
2808 static int mwl8k_start_wt(struct work_struct *wt)
2810 struct mwl8k_start_worker *worker = (struct mwl8k_start_worker *)wt;
2811 struct ieee80211_hw *hw = worker->header.hw;
2812 struct mwl8k_priv *priv = hw->priv;
2815 if (priv->vif != NULL) {
2817 goto mwl8k_start_exit;
2821 if (mwl8k_cmd_802_11_radio_control(hw, MWL8K_RADIO_ENABLE)) {
2823 goto mwl8k_start_exit;
2826 /* Purge TX/RX HW queues */
2827 if (mwl8k_cmd_set_pre_scan(hw)) {
2829 goto mwl8k_start_exit;
2832 if (mwl8k_cmd_set_post_scan(hw, "\x00\x00\x00\x00\x00\x00")) {
2834 goto mwl8k_start_exit;
2837 /* Enable firmware rate adaptation */
2838 if (mwl8k_cmd_setrateadaptmode(hw, 0)) {
2840 goto mwl8k_start_exit;
2843 /* Disable WMM. WMM gets enabled when stack sends WMM parms */
2844 if (mwl8k_set_wmm(hw, MWL8K_WMM_DISABLE)) {
2846 goto mwl8k_start_exit;
2849 /* Disable sniffer mode */
2850 if (mwl8k_enable_sniffer(hw, 0))
2857 static int mwl8k_start(struct ieee80211_hw *hw)
2859 struct mwl8k_start_worker *worker;
2860 struct mwl8k_priv *priv = hw->priv;
2863 /* Enable tx reclaim tasklet */
2864 tasklet_enable(&priv->tx_reclaim_task);
2866 rc = request_irq(priv->pdev->irq, &mwl8k_interrupt,
2867 IRQF_SHARED, MWL8K_NAME, hw);
2869 printk(KERN_ERR "%s: failed to register IRQ handler\n",
2872 goto mwl8k_start_disable_tasklet;
2875 /* Enable interrupts */
2876 iowrite32(priv->int_mask, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2878 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
2879 if (worker == NULL) {
2881 goto mwl8k_start_disable_irq;
2884 rc = mwl8k_queue_work(hw, &worker->header,
2885 priv->config_wq, mwl8k_start_wt);
2890 if (rc == -ETIMEDOUT)
2891 printk(KERN_ERR "%s() timed out\n", __func__);
2895 mwl8k_start_disable_irq:
2896 spin_lock_irq(&priv->tx_lock);
2897 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2898 spin_unlock_irq(&priv->tx_lock);
2899 free_irq(priv->pdev->irq, hw);
2901 mwl8k_start_disable_tasklet:
2902 tasklet_disable(&priv->tx_reclaim_task);
2907 struct mwl8k_stop_worker {
2908 struct mwl8k_work_struct header;
2911 static int mwl8k_stop_wt(struct work_struct *wt)
2913 struct mwl8k_stop_worker *worker = (struct mwl8k_stop_worker *)wt;
2914 struct ieee80211_hw *hw = worker->header.hw;
2917 rc = mwl8k_cmd_802_11_radio_control(hw, MWL8K_RADIO_DISABLE);
2922 static void mwl8k_stop(struct ieee80211_hw *hw)
2925 struct mwl8k_stop_worker *worker;
2926 struct mwl8k_priv *priv = hw->priv;
2929 if (priv->vif != NULL)
2932 ieee80211_stop_queues(hw);
2934 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
2938 rc = mwl8k_queue_work(hw, &worker->header,
2939 priv->config_wq, mwl8k_stop_wt);
2941 if (rc == -ETIMEDOUT)
2942 printk(KERN_ERR "%s() timed out\n", __func__);
2944 /* Disable interrupts */
2945 spin_lock_irq(&priv->tx_lock);
2946 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2947 spin_unlock_irq(&priv->tx_lock);
2948 free_irq(priv->pdev->irq, hw);
2950 /* Stop finalize join worker */
2951 cancel_work_sync(&priv->finalize_join_worker);
2952 if (priv->beacon_skb != NULL)
2953 dev_kfree_skb(priv->beacon_skb);
2955 /* Stop tx reclaim tasklet */
2956 tasklet_disable(&priv->tx_reclaim_task);
2958 /* Stop config thread */
2959 flush_workqueue(priv->config_wq);
2961 /* Return all skbs to mac80211 */
2962 for (i = 0; i < MWL8K_TX_QUEUES; i++)
2963 mwl8k_txq_reclaim(hw, i, 1);
2966 static int mwl8k_add_interface(struct ieee80211_hw *hw,
2967 struct ieee80211_if_init_conf *conf)
2969 struct mwl8k_priv *priv = hw->priv;
2970 struct mwl8k_vif *mwl8k_vif;
2973 * We only support one active interface at a time.
2975 if (priv->vif != NULL)
2979 * We only support managed interfaces for now.
2981 if (conf->type != NL80211_IFTYPE_STATION &&
2982 conf->type != NL80211_IFTYPE_MONITOR)
2985 /* Clean out driver private area */
2986 mwl8k_vif = MWL8K_VIF(conf->vif);
2987 memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
2989 /* Save the mac address */
2990 memcpy(mwl8k_vif->mac_addr, conf->mac_addr, IEEE80211_ADDR_LEN);
2992 /* Back pointer to parent config block */
2993 mwl8k_vif->priv = priv;
2995 /* Setup initial PHY parameters */
2996 memcpy(mwl8k_vif->legacy_rates ,
2997 priv->rates, sizeof(mwl8k_vif->legacy_rates));
2998 mwl8k_vif->legacy_nrates = ARRAY_SIZE(priv->rates);
3000 /* Set Initial sequence number to zero */
3001 mwl8k_vif->seqno = 0;
3003 priv->vif = conf->vif;
3004 priv->current_channel = NULL;
3009 static void mwl8k_remove_interface(struct ieee80211_hw *hw,
3010 struct ieee80211_if_init_conf *conf)
3012 struct mwl8k_priv *priv = hw->priv;
3014 if (priv->vif == NULL)
3020 struct mwl8k_config_worker {
3021 struct mwl8k_work_struct header;
3025 static int mwl8k_config_wt(struct work_struct *wt)
3027 struct mwl8k_config_worker *worker =
3028 (struct mwl8k_config_worker *)wt;
3029 struct ieee80211_hw *hw = worker->header.hw;
3030 struct ieee80211_conf *conf = &hw->conf;
3031 struct mwl8k_priv *priv = hw->priv;
3034 if (!conf->radio_enabled) {
3035 mwl8k_cmd_802_11_radio_control(hw, MWL8K_RADIO_DISABLE);
3036 priv->current_channel = NULL;
3038 goto mwl8k_config_exit;
3041 if (mwl8k_cmd_802_11_radio_control(hw, MWL8K_RADIO_ENABLE)) {
3043 goto mwl8k_config_exit;
3046 priv->current_channel = conf->channel;
3048 if (mwl8k_cmd_set_rf_channel(hw, conf->channel)) {
3050 goto mwl8k_config_exit;
3053 if (conf->power_level > 18)
3054 conf->power_level = 18;
3055 if (mwl8k_cmd_802_11_rf_tx_power(hw, conf->power_level)) {
3057 goto mwl8k_config_exit;
3060 if (mwl8k_cmd_mimo_config(hw, 0x7, 0x7))
3067 static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
3070 struct mwl8k_config_worker *worker;
3071 struct mwl8k_priv *priv = hw->priv;
3073 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
3077 worker->changed = changed;
3078 rc = mwl8k_queue_work(hw, &worker->header,
3079 priv->config_wq, mwl8k_config_wt);
3080 if (rc == -ETIMEDOUT) {
3081 printk(KERN_ERR "%s() timed out.\n", __func__);
3088 * mac80211 will crash on anything other than -EINVAL on
3089 * error. Looks like wireless extensions which calls mac80211
3090 * may be the actual culprit...
3092 return rc ? -EINVAL : 0;
3095 struct mwl8k_bss_info_changed_worker {
3096 struct mwl8k_work_struct header;
3097 struct ieee80211_vif *vif;
3098 struct ieee80211_bss_conf *info;
3102 static int mwl8k_bss_info_changed_wt(struct work_struct *wt)
3104 struct mwl8k_bss_info_changed_worker *worker =
3105 (struct mwl8k_bss_info_changed_worker *)wt;
3106 struct ieee80211_hw *hw = worker->header.hw;
3107 struct ieee80211_vif *vif = worker->vif;
3108 struct ieee80211_bss_conf *info = worker->info;
3112 struct mwl8k_priv *priv = hw->priv;
3113 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
3115 changed = worker->changed;
3116 priv->capture_beacon = false;
3119 memcpy(&mwl8k_vif->bss_info, info,
3120 sizeof(struct ieee80211_bss_conf));
3123 if (mwl8k_update_rateset(hw, vif))
3124 goto mwl8k_bss_info_changed_exit;
3126 /* Turn on rate adaptation */
3127 if (mwl8k_cmd_use_fixed_rate(hw, MWL8K_USE_AUTO_RATE,
3128 MWL8K_UCAST_RATE, NULL))
3129 goto mwl8k_bss_info_changed_exit;
3131 /* Set radio preamble */
3132 if (mwl8k_set_radio_preamble(hw,
3133 info->use_short_preamble))
3134 goto mwl8k_bss_info_changed_exit;
3137 if (mwl8k_cmd_set_slot(hw, info->use_short_slot ?
3138 MWL8K_SHORT_SLOTTIME : MWL8K_LONG_SLOTTIME))
3139 goto mwl8k_bss_info_changed_exit;
3141 /* Update peer rate info */
3142 if (mwl8k_cmd_update_sta_db(hw, vif,
3143 MWL8K_STA_DB_MODIFY_ENTRY))
3144 goto mwl8k_bss_info_changed_exit;
3147 if (mwl8k_cmd_set_aid(hw, vif))
3148 goto mwl8k_bss_info_changed_exit;
3151 * Finalize the join. Tell rx handler to process
3152 * next beacon from our BSSID.
3154 memcpy(priv->capture_bssid,
3155 mwl8k_vif->bssid, IEEE80211_ADDR_LEN);
3156 priv->capture_beacon = true;
3158 mwl8k_cmd_update_sta_db(hw, vif, MWL8K_STA_DB_DEL_ENTRY);
3159 memset(&mwl8k_vif->bss_info, 0,
3160 sizeof(struct ieee80211_bss_conf));
3161 memset(mwl8k_vif->bssid, 0, IEEE80211_ADDR_LEN);
3164 mwl8k_bss_info_changed_exit:
3169 static void mwl8k_bss_info_changed(struct ieee80211_hw *hw,
3170 struct ieee80211_vif *vif,
3171 struct ieee80211_bss_conf *info,
3174 struct mwl8k_bss_info_changed_worker *worker;
3175 struct mwl8k_priv *priv = hw->priv;
3176 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
3179 if (changed & BSS_CHANGED_BSSID)
3180 memcpy(mv_vif->bssid, info->bssid, IEEE80211_ADDR_LEN);
3182 if ((changed & BSS_CHANGED_ASSOC) == 0)
3185 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
3190 worker->info = info;
3191 worker->changed = changed;
3192 rc = mwl8k_queue_work(hw, &worker->header,
3194 mwl8k_bss_info_changed_wt);
3196 if (rc == -ETIMEDOUT)
3197 printk(KERN_ERR "%s() timed out\n", __func__);
3200 struct mwl8k_configure_filter_worker {
3201 struct mwl8k_work_struct header;
3202 unsigned int changed_flags;
3203 unsigned int *total_flags;
3205 struct dev_addr_list *mclist;
3208 #define MWL8K_SUPPORTED_IF_FLAGS FIF_BCN_PRBRESP_PROMISC
3210 static int mwl8k_configure_filter_wt(struct work_struct *wt)
3212 struct mwl8k_configure_filter_worker *worker =
3213 (struct mwl8k_configure_filter_worker *)wt;
3215 struct ieee80211_hw *hw = worker->header.hw;
3216 unsigned int changed_flags = worker->changed_flags;
3217 unsigned int *total_flags = worker->total_flags;
3218 int mc_count = worker->mc_count;
3219 struct dev_addr_list *mclist = worker->mclist;
3221 struct mwl8k_priv *priv = hw->priv;
3224 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
3225 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
3226 rc = mwl8k_cmd_set_pre_scan(hw);
3230 bssid = "\x00\x00\x00\x00\x00\x00";
3231 if (priv->vif != NULL)
3232 bssid = MWL8K_VIF(priv->vif)->bssid;
3234 rc = mwl8k_cmd_set_post_scan(hw, bssid);
3239 goto mwl8k_configure_filter_exit;
3241 mc_count = mc_count < priv->num_mcaddrs ?
3242 mc_count : priv->num_mcaddrs;
3243 rc = mwl8k_cmd_mac_multicast_adr(hw, mc_count, mclist);
3246 "%s()Error setting multicast addresses\n",
3250 mwl8k_configure_filter_exit:
3254 static void mwl8k_configure_filter(struct ieee80211_hw *hw,
3255 unsigned int changed_flags,
3256 unsigned int *total_flags,
3258 struct dev_addr_list *mclist)
3261 struct mwl8k_configure_filter_worker *worker;
3262 struct mwl8k_priv *priv = hw->priv;
3264 /* Clear unsupported feature flags */
3265 *total_flags &= MWL8K_SUPPORTED_IF_FLAGS;
3267 if (!(changed_flags & MWL8K_SUPPORTED_IF_FLAGS) && !mc_count)
3270 worker = kzalloc(sizeof(*worker), GFP_ATOMIC);
3274 worker->header.options = MWL8K_WQ_QUEUE_ONLY | MWL8K_WQ_TX_WAIT_EMPTY;
3275 worker->changed_flags = changed_flags;
3276 worker->total_flags = total_flags;
3277 worker->mc_count = mc_count;
3278 worker->mclist = mclist;
3280 mwl8k_queue_work(hw, &worker->header, priv->config_wq,
3281 mwl8k_configure_filter_wt);
3284 struct mwl8k_set_rts_threshold_worker {
3285 struct mwl8k_work_struct header;
3289 static int mwl8k_set_rts_threshold_wt(struct work_struct *wt)
3291 struct mwl8k_set_rts_threshold_worker *worker =
3292 (struct mwl8k_set_rts_threshold_worker *)wt;
3294 struct ieee80211_hw *hw = worker->header.hw;
3295 u16 threshold = (u16)(worker->value);
3298 rc = mwl8k_rts_threshold(hw, MWL8K_CMD_SET, &threshold);
3303 static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
3306 struct mwl8k_set_rts_threshold_worker *worker;
3307 struct mwl8k_priv *priv = hw->priv;
3309 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
3313 worker->value = value;
3315 rc = mwl8k_queue_work(hw, &worker->header,
3317 mwl8k_set_rts_threshold_wt);
3320 if (rc == -ETIMEDOUT) {
3321 printk(KERN_ERR "%s() timed out\n", __func__);
3328 struct mwl8k_conf_tx_worker {
3329 struct mwl8k_work_struct header;
3331 const struct ieee80211_tx_queue_params *params;
3334 static int mwl8k_conf_tx_wt(struct work_struct *wt)
3336 struct mwl8k_conf_tx_worker *worker =
3337 (struct mwl8k_conf_tx_worker *)wt;
3339 struct ieee80211_hw *hw = worker->header.hw;
3340 u16 queue = worker->queue;
3341 const struct ieee80211_tx_queue_params *params = worker->params;
3343 struct mwl8k_priv *priv = hw->priv;
3346 if (priv->wmm_mode == MWL8K_WMM_DISABLE)
3347 if (mwl8k_set_wmm(hw, MWL8K_WMM_ENABLE)) {
3349 goto mwl8k_conf_tx_exit;
3352 if (mwl8k_set_edca_params(hw, GET_TXQ(queue), params->cw_min,
3353 params->cw_max, params->aifs, params->txop))
3359 static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
3360 const struct ieee80211_tx_queue_params *params)
3363 struct mwl8k_conf_tx_worker *worker;
3364 struct mwl8k_priv *priv = hw->priv;
3366 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
3370 worker->queue = queue;
3371 worker->params = params;
3372 rc = mwl8k_queue_work(hw, &worker->header,
3373 priv->config_wq, mwl8k_conf_tx_wt);
3375 if (rc == -ETIMEDOUT) {
3376 printk(KERN_ERR "%s() timed out\n", __func__);
3382 static int mwl8k_get_tx_stats(struct ieee80211_hw *hw,
3383 struct ieee80211_tx_queue_stats *stats)
3385 struct mwl8k_priv *priv = hw->priv;
3386 struct mwl8k_tx_queue *txq;
3389 spin_lock_bh(&priv->tx_lock);
3390 for (index = 0; index < MWL8K_TX_QUEUES; index++) {
3391 txq = priv->txq + index;
3392 memcpy(&stats[index], &txq->tx_stats,
3393 sizeof(struct ieee80211_tx_queue_stats));
3395 spin_unlock_bh(&priv->tx_lock);
3399 struct mwl8k_get_stats_worker {
3400 struct mwl8k_work_struct header;
3401 struct ieee80211_low_level_stats *stats;
3404 static int mwl8k_get_stats_wt(struct work_struct *wt)
3406 struct mwl8k_get_stats_worker *worker =
3407 (struct mwl8k_get_stats_worker *)wt;
3409 return mwl8k_cmd_802_11_get_stat(worker->header.hw, worker->stats);
3412 static int mwl8k_get_stats(struct ieee80211_hw *hw,
3413 struct ieee80211_low_level_stats *stats)
3416 struct mwl8k_get_stats_worker *worker;
3417 struct mwl8k_priv *priv = hw->priv;
3419 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
3423 worker->stats = stats;
3424 rc = mwl8k_queue_work(hw, &worker->header,
3425 priv->config_wq, mwl8k_get_stats_wt);
3428 if (rc == -ETIMEDOUT) {
3429 printk(KERN_ERR "%s() timed out\n", __func__);
3436 static const struct ieee80211_ops mwl8k_ops = {
3438 .start = mwl8k_start,
3440 .add_interface = mwl8k_add_interface,
3441 .remove_interface = mwl8k_remove_interface,
3442 .config = mwl8k_config,
3443 .bss_info_changed = mwl8k_bss_info_changed,
3444 .configure_filter = mwl8k_configure_filter,
3445 .set_rts_threshold = mwl8k_set_rts_threshold,
3446 .conf_tx = mwl8k_conf_tx,
3447 .get_tx_stats = mwl8k_get_tx_stats,
3448 .get_stats = mwl8k_get_stats,
3451 static void mwl8k_tx_reclaim_handler(unsigned long data)
3454 struct ieee80211_hw *hw = (struct ieee80211_hw *) data;
3455 struct mwl8k_priv *priv = hw->priv;
3457 spin_lock_bh(&priv->tx_lock);
3458 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3459 mwl8k_txq_reclaim(hw, i, 0);
3461 if (priv->tx_wait != NULL) {
3462 int count = mwl8k_txq_busy(priv);
3464 complete(priv->tx_wait);
3465 priv->tx_wait = NULL;
3468 spin_unlock_bh(&priv->tx_lock);
3471 static void mwl8k_finalize_join_worker(struct work_struct *work)
3473 struct mwl8k_priv *priv =
3474 container_of(work, struct mwl8k_priv, finalize_join_worker);
3475 struct sk_buff *skb = priv->beacon_skb;
3476 u8 dtim = (MWL8K_VIF(priv->vif))->bss_info.dtim_period;
3478 mwl8k_finalize_join(priv->hw, skb->data, skb->len, dtim);
3481 priv->beacon_skb = NULL;
3484 static int __devinit mwl8k_probe(struct pci_dev *pdev,
3485 const struct pci_device_id *id)
3487 struct ieee80211_hw *hw;
3488 struct mwl8k_priv *priv;
3493 rc = pci_enable_device(pdev);
3495 printk(KERN_ERR "%s: Cannot enable new PCI device\n",
3500 rc = pci_request_regions(pdev, MWL8K_NAME);
3502 printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
3507 pci_set_master(pdev);
3509 hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
3511 printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
3519 priv->hostcmd_wait = NULL;
3520 priv->tx_wait = NULL;
3521 priv->inconfig = false;
3522 priv->wep_enabled = 0;
3523 priv->wmm_mode = false;
3524 priv->pending_tx_pkts = 0;
3525 strncpy(priv->name, MWL8K_NAME, sizeof(priv->name));
3527 spin_lock_init(&priv->fw_lock);
3529 SET_IEEE80211_DEV(hw, &pdev->dev);
3530 pci_set_drvdata(pdev, hw);
3532 priv->regs = pci_iomap(pdev, 1, 0x10000);
3533 if (priv->regs == NULL) {
3534 printk(KERN_ERR "%s: Cannot map device memory\n", priv->name);
3538 memcpy(priv->channels, mwl8k_channels, sizeof(mwl8k_channels));
3539 priv->band.band = IEEE80211_BAND_2GHZ;
3540 priv->band.channels = priv->channels;
3541 priv->band.n_channels = ARRAY_SIZE(mwl8k_channels);
3542 priv->band.bitrates = priv->rates;
3543 priv->band.n_bitrates = ARRAY_SIZE(mwl8k_rates);
3544 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
3546 BUILD_BUG_ON(sizeof(priv->rates) != sizeof(mwl8k_rates));
3547 memcpy(priv->rates, mwl8k_rates, sizeof(mwl8k_rates));
3550 * Extra headroom is the size of the required DMA header
3551 * minus the size of the smallest 802.11 frame (CTS frame).
3553 hw->extra_tx_headroom =
3554 sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
3556 hw->channel_change_time = 10;
3558 hw->queues = MWL8K_TX_QUEUES;
3560 hw->wiphy->interface_modes =
3561 BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_MONITOR);
3563 /* Set rssi and noise values to dBm */
3564 hw->flags |= (IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_NOISE_DBM);
3565 hw->vif_data_size = sizeof(struct mwl8k_vif);
3568 /* Set default radio state and preamble */
3569 priv->radio_preamble = MWL8K_RADIO_DEFAULT_PREAMBLE;
3570 priv->radio_state = MWL8K_RADIO_DISABLE;
3572 /* Finalize join worker */
3573 INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
3575 /* TX reclaim tasklet */
3576 tasklet_init(&priv->tx_reclaim_task,
3577 mwl8k_tx_reclaim_handler, (unsigned long)hw);
3578 tasklet_disable(&priv->tx_reclaim_task);
3580 /* Config workthread */
3581 priv->config_wq = create_singlethread_workqueue("mwl8k_config");
3582 if (priv->config_wq == NULL)
3585 /* Power management cookie */
3586 priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
3587 if (priv->cookie == NULL)
3590 rc = mwl8k_rxq_init(hw, 0);
3593 rxq_refill(hw, 0, INT_MAX);
3595 spin_lock_init(&priv->tx_lock);
3597 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
3598 rc = mwl8k_txq_init(hw, i);
3600 goto err_free_queues;
3603 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3605 iowrite32(priv->int_mask, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3606 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
3607 iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
3609 rc = request_irq(priv->pdev->irq, &mwl8k_interrupt,
3610 IRQF_SHARED, MWL8K_NAME, hw);
3612 printk(KERN_ERR "%s: failed to register IRQ handler\n",
3614 goto err_free_queues;
3617 /* Reset firmware and hardware */
3618 mwl8k_hw_reset(priv);
3620 /* Ask userland hotplug daemon for the device firmware */
3621 rc = mwl8k_request_firmware(priv, (u32)id->driver_data);
3623 printk(KERN_ERR "%s: Firmware files not found\n", priv->name);
3627 /* Load firmware into hardware */
3628 rc = mwl8k_load_firmware(priv);
3630 printk(KERN_ERR "%s: Cannot start firmware\n", priv->name);
3631 goto err_stop_firmware;
3634 /* Reclaim memory once firmware is successfully loaded */
3635 mwl8k_release_firmware(priv);
3638 * Temporarily enable interrupts. Initial firmware host
3639 * commands use interrupts and avoids polling. Disable
3640 * interrupts when done.
3642 priv->int_mask |= MWL8K_A2H_EVENTS;
3644 iowrite32(priv->int_mask, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3646 /* Get config data, mac addrs etc */
3647 rc = mwl8k_cmd_get_hw_spec(hw);
3649 printk(KERN_ERR "%s: Cannot initialise firmware\n", priv->name);
3650 goto err_stop_firmware;
3653 /* Turn radio off */
3654 rc = mwl8k_cmd_802_11_radio_control(hw, MWL8K_RADIO_DISABLE);
3656 printk(KERN_ERR "%s: Cannot disable\n", priv->name);
3657 goto err_stop_firmware;
3660 /* Disable interrupts */
3661 spin_lock_irq(&priv->tx_lock);
3662 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3663 spin_unlock_irq(&priv->tx_lock);
3664 free_irq(priv->pdev->irq, hw);
3666 rc = ieee80211_register_hw(hw);
3668 printk(KERN_ERR "%s: Cannot register device\n", priv->name);
3669 goto err_stop_firmware;
3672 fw = (u8 *)&priv->fw_rev;
3673 printk(KERN_INFO "%s: 88W%u %s\n", priv->name, priv->part_num,
3675 printk(KERN_INFO "%s: Driver Ver:%s Firmware Ver:%u.%u.%u.%u\n",
3676 priv->name, MWL8K_VERSION, fw[3], fw[2], fw[1], fw[0]);
3677 printk(KERN_INFO "%s: MAC Address: %pM\n", priv->name,
3678 hw->wiphy->perm_addr);
3683 mwl8k_hw_reset(priv);
3684 mwl8k_release_firmware(priv);
3687 spin_lock_irq(&priv->tx_lock);
3688 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3689 spin_unlock_irq(&priv->tx_lock);
3690 free_irq(priv->pdev->irq, hw);
3693 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3694 mwl8k_txq_deinit(hw, i);
3695 mwl8k_rxq_deinit(hw, 0);
3698 if (priv->cookie != NULL)
3699 pci_free_consistent(priv->pdev, 4,
3700 priv->cookie, priv->cookie_dma);
3702 if (priv->regs != NULL)
3703 pci_iounmap(pdev, priv->regs);
3705 if (priv->config_wq != NULL)
3706 destroy_workqueue(priv->config_wq);
3708 pci_set_drvdata(pdev, NULL);
3709 ieee80211_free_hw(hw);
3712 pci_release_regions(pdev);
3713 pci_disable_device(pdev);
3718 static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
3720 printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
3723 static void __devexit mwl8k_remove(struct pci_dev *pdev)
3725 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
3726 struct mwl8k_priv *priv;
3733 ieee80211_stop_queues(hw);
3735 ieee80211_unregister_hw(hw);
3737 /* Remove tx reclaim tasklet */
3738 tasklet_kill(&priv->tx_reclaim_task);
3740 /* Stop config thread */
3741 destroy_workqueue(priv->config_wq);
3744 mwl8k_hw_reset(priv);
3746 /* Return all skbs to mac80211 */
3747 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3748 mwl8k_txq_reclaim(hw, i, 1);
3750 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3751 mwl8k_txq_deinit(hw, i);
3753 mwl8k_rxq_deinit(hw, 0);
3755 pci_free_consistent(priv->pdev, 4,
3756 priv->cookie, priv->cookie_dma);
3758 pci_iounmap(pdev, priv->regs);
3759 pci_set_drvdata(pdev, NULL);
3760 ieee80211_free_hw(hw);
3761 pci_release_regions(pdev);
3762 pci_disable_device(pdev);
3765 static struct pci_driver mwl8k_driver = {
3767 .id_table = mwl8k_table,
3768 .probe = mwl8k_probe,
3769 .remove = __devexit_p(mwl8k_remove),
3770 .shutdown = __devexit_p(mwl8k_shutdown),
3773 static int __init mwl8k_init(void)
3775 return pci_register_driver(&mwl8k_driver);
3778 static void __exit mwl8k_exit(void)
3780 pci_unregister_driver(&mwl8k_driver);
3783 module_init(mwl8k_init);
3784 module_exit(mwl8k_exit);