drivers/net/wireless/iwlwifi/iwl-rx.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
   4  *
   5  * Portions of this file are derived from the ipw3945 project, as well
   6  * as portions of the ieee80211 subsystem header files.
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms of version 2 of the GNU General Public License as
  10  * published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful, but WITHOUT
  13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  15  * more details.
  16  *
  17  * You should have received a copy of the GNU General Public License along with
  18  * this program; if not, write to the Free Software Foundation, Inc.,
  19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20  *
  21  * The full GNU General Public License is included in this distribution in the
  22  * file called LICENSE.
  23  *
  24  * Contact Information:
  25  * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27  *
  28  *****************************************************************************/
  29
  30 #include <linux/etherdevice.h>
  31 #include <net/mac80211.h>
  32 #include <asm/unaligned.h>
  33 #include "iwl-eeprom.h"
  34 #include "iwl-dev.h"
  35 #include "iwl-core.h"
  36 #include "iwl-sta.h"
  37 #include "iwl-io.h"
  38 #include "iwl-calib.h"
  39 #include "iwl-helpers.h"
  40 /************************** RX-FUNCTIONS ****************************/
  41 /*
  42  * Rx theory of operation
  43  *
  44  * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
  45  * each of which point to Receive Buffers to be filled by the NIC.  These get
  46  * used not only for Rx frames, but for any command response or notification
  47  * from the NIC.  The driver and NIC manage the Rx buffers by means
  48  * of indexes into the circular buffer.
  49  *
  50  * Rx Queue Indexes
  51  * The host/firmware share two index registers for managing the Rx buffers.
  52  *
  53  * The READ index maps to the first position that the firmware may be writing
  54  * to -- the driver can read up to (but not including) this position and get
  55  * good data.
  56  * The READ index is managed by the firmware once the card is enabled.
  57  *
  58  * The WRITE index maps to the last position the driver has read from -- the
  59  * position preceding WRITE is the last slot the firmware can place a packet.
  60  *
  61  * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  62  * WRITE = READ.
  63  *
  64  * During initialization, the host sets up the READ queue position to the first
  65  * INDEX position, and WRITE to the last (READ - 1 wrapped)
  66  *
  67  * When the firmware places a packet in a buffer, it will advance the READ index
  68  * and fire the RX interrupt.  The driver can then query the READ index and
  69  * process as many packets as possible, moving the WRITE index forward as it
  70  * resets the Rx queue buffers with new memory.
  71  *
  72  * The management in the driver is as follows:
  73  * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free.  When
  74  *   iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  75  *   to replenish the iwl->rxq->rx_free.
  76  * + In iwl_rx_replenish (scheduled) if 'processed' != 'read' then the
  77  *   iwl->rxq is replenished and the READ INDEX is updated (updating the
  78  *   'processed' and 'read' driver indexes as well)
  79  * + A received packet is processed and handed to the kernel network stack,
  80  *   detached from the iwl->rxq.  The driver 'processed' index is updated.
  81  * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  82  *   list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  83  *   INDEX is not incremented and iwl->status(RX_STALLED) is set.  If there
  84  *   were enough free buffers and RX_STALLED is set it is cleared.
  85  *
  86  *
  87  * Driver sequence:
  88  *
  89  * iwl_rx_queue_alloc()   Allocates rx_free
  90  * iwl_rx_replenish()     Replenishes rx_free list from rx_used, and calls
  91  *                            iwl_rx_queue_restock
  92  * iwl_rx_queue_restock() Moves available buffers from rx_free into Rx
  93  *                            queue, updates firmware pointers, and updates
  94  *                            the WRITE index.  If insufficient rx_free buffers
  95  *                            are available, schedules iwl_rx_replenish
  96  *
  97  * -- enable interrupts --
  98  * ISR - iwl_rx()         Detach iwl_rx_mem_buffers from pool up to the
  99  *                            READ INDEX, detaching the SKB from the pool.
 100  *                            Moves the packet buffer from queue to rx_used.
 101  *                            Calls iwl_rx_queue_restock to refill any empty
 102  *                            slots.
 103  * ...
 104  *
 105  */
 106
 107 /**
 108  * iwl_rx_queue_space - Return number of free slots available in queue.
 109  */
 110 int iwl_rx_queue_space(const struct iwl_rx_queue *q)
 111 {
 112         int s = q->read - q->write;
 113         if (s <= 0)
 114                 s += RX_QUEUE_SIZE;
 115         /* keep some buffer to not confuse full and empty queue */
 116         s -= 2;
 117         if (s < 0)
 118                 s = 0;
 119         return s;
 120 }
 121 EXPORT_SYMBOL(iwl_rx_queue_space);
 122
 123 /**
 124  * iwl_rx_queue_update_write_ptr - Update the write pointer for the RX queue
 125  */
 126 int iwl_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl_rx_queue *q)
 127 {
 128         u32 reg = 0;
 129         int ret = 0;
 130         unsigned long flags;
 131
 132         spin_lock_irqsave(&q->lock, flags);
 133
 134         if (q->need_update == 0)
 135                 goto exit_unlock;
 136
 137         /* If power-saving is in use, make sure device is awake */
 138         if (test_bit(STATUS_POWER_PMI, &priv->status)) {
 139                 reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
 140
 141                 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
 142                         iwl_set_bit(priv, CSR_GP_CNTRL,
 143                                     CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
 144                         goto exit_unlock;
 145                 }
 146
 147                 ret = iwl_grab_nic_access(priv);
 148                 if (ret)
 149                         goto exit_unlock;
 150
 151                 /* Device expects a multiple of 8 */
 152                 iwl_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
 153                                      q->write & ~0x7);
 154                 iwl_release_nic_access(priv);
 155
 156         /* Else device is assumed to be awake */
 157         } else
 158                 /* Device expects a multiple of 8 */
 159                 iwl_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
 160
 161
 162         q->need_update = 0;
 163
 164  exit_unlock:
 165         spin_unlock_irqrestore(&q->lock, flags);
 166         return ret;
 167 }
 168 EXPORT_SYMBOL(iwl_rx_queue_update_write_ptr);
 169 /**
 170  * iwl_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
 171  */
 172 static inline __le32 iwl_dma_addr2rbd_ptr(struct iwl_priv *priv,
 173                                           dma_addr_t dma_addr)
 174 {
 175         return cpu_to_le32((u32)(dma_addr >> 8));
 176 }
 177
 178 /**
 179  * iwl_rx_queue_restock - refill RX queue from pre-allocated pool
 180  *
 181  * If there are slots in the RX queue that need to be restocked,
 182  * and we have free pre-allocated buffers, fill the ranks as much
 183  * as we can, pulling from rx_free.
 184  *
 185  * This moves the 'write' index forward to catch up with 'processed', and
 186  * also updates the memory address in the firmware to reference the new
 187  * target buffer.
 188  */
 189 int iwl_rx_queue_restock(struct iwl_priv *priv)
 190 {
 191         struct iwl_rx_queue *rxq = &priv->rxq;
 192         struct list_head *element;
 193         struct iwl_rx_mem_buffer *rxb;
 194         unsigned long flags;
 195         int write;
 196         int ret = 0;
 197
 198         spin_lock_irqsave(&rxq->lock, flags);
 199         write = rxq->write & ~0x7;
 200         while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
 201                 /* Get next free Rx buffer, remove from free list */
 202                 element = rxq->rx_free.next;
 203                 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
 204                 list_del(element);
 205
 206                 /* Point to Rx buffer via next RBD in circular buffer */
 207                 rxq->bd[rxq->write] = iwl_dma_addr2rbd_ptr(priv, rxb->aligned_dma_addr);
 208                 rxq->queue[rxq->write] = rxb;
 209                 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
 210                 rxq->free_count--;
 211         }
 212         spin_unlock_irqrestore(&rxq->lock, flags);
 213         /* If the pre-allocated buffer pool is dropping low, schedule to
 214          * refill it */
 215         if (rxq->free_count <= RX_LOW_WATERMARK)
 216                 queue_work(priv->workqueue, &priv->rx_replenish);
 217
 218
 219         /* If we've added more space for the firmware to place data, tell it.
 220          * Increment device's write pointer in multiples of 8. */
 221         if (write != (rxq->write & ~0x7)) {
 222                 spin_lock_irqsave(&rxq->lock, flags);
 223                 rxq->need_update = 1;
 224                 spin_unlock_irqrestore(&rxq->lock, flags);
 225                 ret = iwl_rx_queue_update_write_ptr(priv, rxq);
 226         }
 227
 228         return ret;
 229 }
 230 EXPORT_SYMBOL(iwl_rx_queue_restock);
 231
 232
 233 /**
 234  * iwl_rx_replenish - Move all used packet from rx_used to rx_free
 235  *
 236  * When moving to rx_free an SKB is allocated for the slot.
 237  *
 238  * Also restock the Rx queue via iwl_rx_queue_restock.
 239  * This is called as a scheduled work item (except for during initialization)
 240  */
 241 void iwl_rx_allocate(struct iwl_priv *priv)
 242 {
 243         struct iwl_rx_queue *rxq = &priv->rxq;
 244         struct list_head *element;
 245         struct iwl_rx_mem_buffer *rxb;
 246         unsigned long flags;
 247         spin_lock_irqsave(&rxq->lock, flags);
 248         while (!list_empty(&rxq->rx_used)) {
 249                 element = rxq->rx_used.next;
 250                 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
 251
 252                 /* Alloc a new receive buffer */
 253                 rxb->skb = alloc_skb(priv->hw_params.rx_buf_size + 256,
 254                                 __GFP_NOWARN | GFP_ATOMIC);
 255                 if (!rxb->skb) {
 256                         if (net_ratelimit())
 257                                 printk(KERN_CRIT DRV_NAME
 258                                        ": Can not allocate SKB buffers\n");
 259                         /* We don't reschedule replenish work here -- we will
 260                          * call the restock method and if it still needs
 261                          * more buffers it will schedule replenish */
 262                         break;
 263                 }
 264                 priv->alloc_rxb_skb++;
 265                 list_del(element);
 266
 267                 /* Get physical address of RB/SKB */
 268                 rxb->real_dma_addr = pci_map_single(
 269                                         priv->pci_dev,
 270                                         rxb->skb->data,
 271                                         priv->hw_params.rx_buf_size + 256,
 272                                         PCI_DMA_FROMDEVICE);
 273                 /* dma address must be no more than 36 bits */
 274                 BUG_ON(rxb->real_dma_addr & ~DMA_BIT_MASK(36));
 275                 /* and also 256 byte aligned! */
 276                 rxb->aligned_dma_addr = ALIGN(rxb->real_dma_addr, 256);
 277                 skb_reserve(rxb->skb, rxb->aligned_dma_addr - rxb->real_dma_addr);
 278
 279                 list_add_tail(&rxb->list, &rxq->rx_free);
 280                 rxq->free_count++;
 281         }
 282         spin_unlock_irqrestore(&rxq->lock, flags);
 283 }
 284 EXPORT_SYMBOL(iwl_rx_allocate);
 285
 286 void iwl_rx_replenish(struct iwl_priv *priv)
 287 {
 288         unsigned long flags;
 289
 290         iwl_rx_allocate(priv);
 291
 292         spin_lock_irqsave(&priv->lock, flags);
 293         iwl_rx_queue_restock(priv);
 294         spin_unlock_irqrestore(&priv->lock, flags);
 295 }
 296 EXPORT_SYMBOL(iwl_rx_replenish);
 297
 298
 299 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
 300  * If an SKB has been detached, the POOL needs to have its SKB set to NULL
 301  * This free routine walks the list of POOL entries and if SKB is set to
 302  * non NULL it is unmapped and freed
 303  */
 304 void iwl_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
 305 {
 306         int i;
 307         for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
 308                 if (rxq->pool[i].skb != NULL) {
 309                         pci_unmap_single(priv->pci_dev,
 310                                          rxq->pool[i].real_dma_addr,
 311                                          priv->hw_params.rx_buf_size + 256,
 312                                          PCI_DMA_FROMDEVICE);
 313                         dev_kfree_skb(rxq->pool[i].skb);
 314                 }
 315         }
 316
 317         pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
 318                             rxq->dma_addr);
 319         pci_free_consistent(priv->pci_dev, sizeof(struct iwl_rb_status),
 320                             rxq->rb_stts, rxq->rb_stts_dma);
 321         rxq->bd = NULL;
 322         rxq->rb_stts  = NULL;
 323 }
 324 EXPORT_SYMBOL(iwl_rx_queue_free);
 325
 326 int iwl_rx_queue_alloc(struct iwl_priv *priv)
 327 {
 328         struct iwl_rx_queue *rxq = &priv->rxq;
 329         struct pci_dev *dev = priv->pci_dev;
 330         int i;
 331
 332         spin_lock_init(&rxq->lock);
 333         INIT_LIST_HEAD(&rxq->rx_free);
 334         INIT_LIST_HEAD(&rxq->rx_used);
 335
 336         /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
 337         rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
 338         if (!rxq->bd)
 339                 goto err_bd;
 340
 341         rxq->rb_stts = pci_alloc_consistent(dev, sizeof(struct iwl_rb_status),
 342                                         &rxq->rb_stts_dma);
 343         if (!rxq->rb_stts)
 344                 goto err_rb;
 345
 346         /* Fill the rx_used queue with _all_ of the Rx buffers */
 347         for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
 348                 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
 349
 350         /* Set us so that we have processed and used all buffers, but have
 351          * not restocked the Rx queue with fresh buffers */
 352         rxq->read = rxq->write = 0;
 353         rxq->free_count = 0;
 354         rxq->need_update = 0;
 355         return 0;
 356
 357 err_rb:
 358         pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
 359                             rxq->dma_addr);
 360 err_bd:
 361         return -ENOMEM;
 362 }
 363 EXPORT_SYMBOL(iwl_rx_queue_alloc);
 364
 365 void iwl_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
 366 {
 367         unsigned long flags;
 368         int i;
 369         spin_lock_irqsave(&rxq->lock, flags);
 370         INIT_LIST_HEAD(&rxq->rx_free);
 371         INIT_LIST_HEAD(&rxq->rx_used);
 372         /* Fill the rx_used queue with _all_ of the Rx buffers */
 373         for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
 374                 /* In the reset function, these buffers may have been allocated
 375                  * to an SKB, so we need to unmap and free potential storage */
 376                 if (rxq->pool[i].skb != NULL) {
 377                         pci_unmap_single(priv->pci_dev,
 378                                          rxq->pool[i].real_dma_addr,
 379                                          priv->hw_params.rx_buf_size + 256,
 380                                          PCI_DMA_FROMDEVICE);
 381                         priv->alloc_rxb_skb--;
 382                         dev_kfree_skb(rxq->pool[i].skb);
 383                         rxq->pool[i].skb = NULL;
 384                 }
 385                 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
 386         }
 387
 388         /* Set us so that we have processed and used all buffers, but have
 389          * not restocked the Rx queue with fresh buffers */
 390         rxq->read = rxq->write = 0;
 391         rxq->free_count = 0;
 392         spin_unlock_irqrestore(&rxq->lock, flags);
 393 }
 394 EXPORT_SYMBOL(iwl_rx_queue_reset);
 395
 396 int iwl_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
 397 {
 398         int ret;
 399         unsigned long flags;
 400         u32 rb_size;
 401         const u32 rfdnlog = RX_QUEUE_SIZE_LOG; /* 256 RBDs */
 402         const u32 rb_timeout = 0; /* FIXME: RX_RB_TIMEOUT why this stalls RX */
 403
 404         spin_lock_irqsave(&priv->lock, flags);
 405         ret = iwl_grab_nic_access(priv);
 406         if (ret) {
 407                 spin_unlock_irqrestore(&priv->lock, flags);
 408                 return ret;
 409         }
 410
 411         if (priv->cfg->mod_params->amsdu_size_8K)
 412                 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_8K;
 413         else
 414                 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K;
 415
 416         /* Stop Rx DMA */
 417         iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
 418
 419         /* Reset driver's Rx queue write index */
 420         iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0);
 421
 422         /* Tell device where to find RBD circular buffer in DRAM */
 423         iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_BASE_REG,
 424                            (u32)(rxq->dma_addr >> 8));
 425
 426         /* Tell device where in DRAM to update its Rx status */
 427         iwl_write_direct32(priv, FH_RSCSR_CHNL0_STTS_WPTR_REG,
 428                            rxq->rb_stts_dma >> 4);
 429
 430         /* Enable Rx DMA
 431          * FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY is set because of HW bug in
 432          *      the credit mechanism in 5000 HW RX FIFO
 433          * Direct rx interrupts to hosts
 434          * Rx buffer size 4 or 8k
 435          * RB timeout 0x10
 436          * 256 RBDs
 437          */
 438         iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG,
 439                            FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL |
 440                            FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY |
 441                            FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL |
 442                            FH_RCSR_CHNL0_RX_CONFIG_SINGLE_FRAME |
 443                            rb_size|
 444                            (rb_timeout << FH_RCSR_RX_CONFIG_REG_IRQ_RBTH_POS)|
 445                            (rfdnlog << FH_RCSR_RX_CONFIG_RBDCB_SIZE_POS));
 446
 447         iwl_release_nic_access(priv);
 448
 449         iwl_write32(priv, CSR_INT_COALESCING, 0x40);
 450
 451         spin_unlock_irqrestore(&priv->lock, flags);
 452
 453         return 0;
 454 }
 455
 456 int iwl_rxq_stop(struct iwl_priv *priv)
 457 {
 458         int ret;
 459         unsigned long flags;
 460
 461         spin_lock_irqsave(&priv->lock, flags);
 462         ret = iwl_grab_nic_access(priv);
 463         if (unlikely(ret)) {
 464                 spin_unlock_irqrestore(&priv->lock, flags);
 465                 return ret;
 466         }
 467
 468         /* stop Rx DMA */
 469         iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
 470         ret = iwl_poll_direct_bit(priv, FH_MEM_RSSR_RX_STATUS_REG,
 471                                      (1 << 24), 1000);
 472         if (ret < 0)
 473                 IWL_ERROR("Can't stop Rx DMA.\n");
 474
 475         iwl_release_nic_access(priv);
 476         spin_unlock_irqrestore(&priv->lock, flags);
 477
 478         return 0;
 479 }
 480 EXPORT_SYMBOL(iwl_rxq_stop);
 481
 482 void iwl_rx_missed_beacon_notif(struct iwl_priv *priv,
 483                                 struct iwl_rx_mem_buffer *rxb)
 484
 485 {
 486         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
 487         struct iwl4965_missed_beacon_notif *missed_beacon;
 488
 489         missed_beacon = &pkt->u.missed_beacon;
 490         if (le32_to_cpu(missed_beacon->consequtive_missed_beacons) > 5) {
 491                 IWL_DEBUG_CALIB("missed bcn cnsq %d totl %d rcd %d expctd %d\n",
 492                     le32_to_cpu(missed_beacon->consequtive_missed_beacons),
 493                     le32_to_cpu(missed_beacon->total_missed_becons),
 494                     le32_to_cpu(missed_beacon->num_recvd_beacons),
 495                     le32_to_cpu(missed_beacon->num_expected_beacons));
 496                 if (!test_bit(STATUS_SCANNING, &priv->status))
 497                         iwl_init_sensitivity(priv);
 498         }
 499 }
 500 EXPORT_SYMBOL(iwl_rx_missed_beacon_notif);
 501
 502
 503 /* Calculate noise level, based on measurements during network silence just
 504  *   before arriving beacon.  This measurement can be done only if we know
 505  *   exactly when to expect beacons, therefore only when we're associated. */
 506 static void iwl_rx_calc_noise(struct iwl_priv *priv)
 507 {
 508         struct statistics_rx_non_phy *rx_info
 509                                 = &(priv->statistics.rx.general);
 510         int num_active_rx = 0;
 511         int total_silence = 0;
 512         int bcn_silence_a =
 513                 le32_to_cpu(rx_info->beacon_silence_rssi_a) & IN_BAND_FILTER;
 514         int bcn_silence_b =
 515                 le32_to_cpu(rx_info->beacon_silence_rssi_b) & IN_BAND_FILTER;
 516         int bcn_silence_c =
 517                 le32_to_cpu(rx_info->beacon_silence_rssi_c) & IN_BAND_FILTER;
 518
 519         if (bcn_silence_a) {
 520                 total_silence += bcn_silence_a;
 521                 num_active_rx++;
 522         }
 523         if (bcn_silence_b) {
 524                 total_silence += bcn_silence_b;
 525                 num_active_rx++;
 526         }
 527         if (bcn_silence_c) {
 528                 total_silence += bcn_silence_c;
 529                 num_active_rx++;
 530         }
 531
 532         /* Average among active antennas */
 533         if (num_active_rx)
 534                 priv->last_rx_noise = (total_silence / num_active_rx) - 107;
 535         else
 536                 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
 537
 538         IWL_DEBUG_CALIB("inband silence a %u, b %u, c %u, dBm %d\n",
 539                         bcn_silence_a, bcn_silence_b, bcn_silence_c,
 540                         priv->last_rx_noise);
 541 }
 542
 543 #define REG_RECALIB_PERIOD (60)
 544
 545 void iwl_rx_statistics(struct iwl_priv *priv,
 546                               struct iwl_rx_mem_buffer *rxb)
 547 {
 548         int change;
 549         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
 550
 551         IWL_DEBUG_RX("Statistics notification received (%d vs %d).\n",
 552                      (int)sizeof(priv->statistics), pkt->len);
 553
 554         change = ((priv->statistics.general.temperature !=
 555                    pkt->u.stats.general.temperature) ||
 556                   ((priv->statistics.flag &
 557                     STATISTICS_REPLY_FLG_FAT_MODE_MSK) !=
 558                    (pkt->u.stats.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)));
 559
 560         memcpy(&priv->statistics, &pkt->u.stats, sizeof(priv->statistics));
 561
 562         set_bit(STATUS_STATISTICS, &priv->status);
 563
 564         /* Reschedule the statistics timer to occur in
 565          * REG_RECALIB_PERIOD seconds to ensure we get a
 566          * thermal update even if the uCode doesn't give
 567          * us one */
 568         mod_timer(&priv->statistics_periodic, jiffies +
 569                   msecs_to_jiffies(REG_RECALIB_PERIOD * 1000));
 570
 571         if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
 572             (pkt->hdr.cmd == STATISTICS_NOTIFICATION)) {
 573                 iwl_rx_calc_noise(priv);
 574                 queue_work(priv->workqueue, &priv->run_time_calib_work);
 575         }
 576
 577         iwl_leds_background(priv);
 578
 579         if (priv->cfg->ops->lib->temperature && change)
 580                 priv->cfg->ops->lib->temperature(priv);
 581 }
 582 EXPORT_SYMBOL(iwl_rx_statistics);
 583
 584 #define PERFECT_RSSI (-20) /* dBm */
 585 #define WORST_RSSI (-95)   /* dBm */
 586 #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
 587
 588 /* Calculate an indication of rx signal quality (a percentage, not dBm!).
 589  * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
 590  *   about formulas used below. */
 591 static int iwl_calc_sig_qual(int rssi_dbm, int noise_dbm)
 592 {
 593         int sig_qual;
 594         int degradation = PERFECT_RSSI - rssi_dbm;
 595
 596         /* If we get a noise measurement, use signal-to-noise ratio (SNR)
 597          * as indicator; formula is (signal dbm - noise dbm).
 598          * SNR at or above 40 is a great signal (100%).
 599          * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
 600          * Weakest usable signal is usually 10 - 15 dB SNR. */
 601         if (noise_dbm) {
 602                 if (rssi_dbm - noise_dbm >= 40)
 603                         return 100;
 604                 else if (rssi_dbm < noise_dbm)
 605                         return 0;
 606                 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
 607
 608         /* Else use just the signal level.
 609          * This formula is a least squares fit of data points collected and
 610          *   compared with a reference system that had a percentage (%) display
 611          *   for signal quality. */
 612         } else
 613                 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
 614                             (15 * RSSI_RANGE + 62 * degradation)) /
 615                            (RSSI_RANGE * RSSI_RANGE);
 616
 617         if (sig_qual > 100)
 618                 sig_qual = 100;
 619         else if (sig_qual < 1)
 620                 sig_qual = 0;
 621
 622         return sig_qual;
 623 }
 624
 625 #ifdef CONFIG_IWLWIFI_DEBUG
 626
 627 /**
 628  * iwl_dbg_report_frame - dump frame to syslog during debug sessions
 629  *
 630  * You may hack this function to show different aspects of received frames,
 631  * including selective frame dumps.
 632  * group100 parameter selects whether to show 1 out of 100 good frames.
 633  *
 634  * TODO:  This was originally written for 3945, need to audit for
 635  *        proper operation with 4965.
 636  */
 637 static void iwl_dbg_report_frame(struct iwl_priv *priv,
 638                       struct iwl_rx_packet *pkt,
 639                       struct ieee80211_hdr *header, int group100)
 640 {
 641         u32 to_us;
 642         u32 print_summary = 0;
 643         u32 print_dump = 0;     /* set to 1 to dump all frames' contents */
 644         u32 hundred = 0;
 645         u32 dataframe = 0;
 646         __le16 fc;
 647         u16 seq_ctl;
 648         u16 channel;
 649         u16 phy_flags;
 650         int rate_sym;
 651         u16 length;
 652         u16 status;
 653         u16 bcn_tmr;
 654         u32 tsf_low;
 655         u64 tsf;
 656         u8 rssi;
 657         u8 agc;
 658         u16 sig_avg;
 659         u16 noise_diff;
 660         struct iwl4965_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
 661         struct iwl4965_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
 662         struct iwl4965_rx_frame_end *rx_end = IWL_RX_END(pkt);
 663         u8 *data = IWL_RX_DATA(pkt);
 664
 665         if (likely(!(priv->debug_level & IWL_DL_RX)))
 666                 return;
 667
 668         /* MAC header */
 669         fc = header->frame_control;
 670         seq_ctl = le16_to_cpu(header->seq_ctrl);
 671
 672         /* metadata */
 673         channel = le16_to_cpu(rx_hdr->channel);
 674         phy_flags = le16_to_cpu(rx_hdr->phy_flags);
 675         rate_sym = rx_hdr->rate;
 676         length = le16_to_cpu(rx_hdr->len);
 677
 678         /* end-of-frame status and timestamp */
 679         status = le32_to_cpu(rx_end->status);
 680         bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
 681         tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
 682         tsf = le64_to_cpu(rx_end->timestamp);
 683
 684         /* signal statistics */
 685         rssi = rx_stats->rssi;
 686         agc = rx_stats->agc;
 687         sig_avg = le16_to_cpu(rx_stats->sig_avg);
 688         noise_diff = le16_to_cpu(rx_stats->noise_diff);
 689
 690         to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
 691
 692         /* if data frame is to us and all is good,
 693          *   (optionally) print summary for only 1 out of every 100 */
 694         if (to_us && (fc & ~cpu_to_le16(IEEE80211_FCTL_PROTECTED)) ==
 695             cpu_to_le16(IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
 696                 dataframe = 1;
 697                 if (!group100)
 698                         print_summary = 1;      /* print each frame */
 699                 else if (priv->framecnt_to_us < 100) {
 700                         priv->framecnt_to_us++;
 701                         print_summary = 0;
 702                 } else {
 703                         priv->framecnt_to_us = 0;
 704                         print_summary = 1;
 705                         hundred = 1;
 706                 }
 707         } else {
 708                 /* print summary for all other frames */
 709                 print_summary = 1;
 710         }
 711
 712         if (print_summary) {
 713                 char *title;
 714                 int rate_idx;
 715                 u32 bitrate;
 716
 717                 if (hundred)
 718                         title = "100Frames";
 719                 else if (ieee80211_has_retry(fc))
 720                         title = "Retry";
 721                 else if (ieee80211_is_assoc_resp(fc))
 722                         title = "AscRsp";
 723                 else if (ieee80211_is_reassoc_resp(fc))
 724                         title = "RasRsp";
 725                 else if (ieee80211_is_probe_resp(fc)) {
 726                         title = "PrbRsp";
 727                         print_dump = 1; /* dump frame contents */
 728                 } else if (ieee80211_is_beacon(fc)) {
 729                         title = "Beacon";
 730                         print_dump = 1; /* dump frame contents */
 731                 } else if (ieee80211_is_atim(fc))
 732                         title = "ATIM";
 733                 else if (ieee80211_is_auth(fc))
 734                         title = "Auth";
 735                 else if (ieee80211_is_deauth(fc))
 736                         title = "DeAuth";
 737                 else if (ieee80211_is_disassoc(fc))
 738                         title = "DisAssoc";
 739                 else
 740                         title = "Frame";
 741
 742                 rate_idx = iwl_hwrate_to_plcp_idx(rate_sym);
 743                 if (unlikely(rate_idx == -1))
 744                         bitrate = 0;
 745                 else
 746                         bitrate = iwl_rates[rate_idx].ieee / 2;
 747
 748                 /* print frame summary.
 749                  * MAC addresses show just the last byte (for brevity),
 750                  *    but you can hack it to show more, if you'd like to. */
 751                 if (dataframe)
 752                         IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
 753                                      "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
 754                                      title, le16_to_cpu(fc), header->addr1[5],
 755                                      length, rssi, channel, bitrate);
 756                 else {
 757                         /* src/dst addresses assume managed mode */
 758                         IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
 759                                      "src=0x%02x, rssi=%u, tim=%lu usec, "
 760                                      "phy=0x%02x, chnl=%d\n",
 761                                      title, le16_to_cpu(fc), header->addr1[5],
 762                                      header->addr3[5], rssi,
 763                                      tsf_low - priv->scan_start_tsf,
 764                                      phy_flags, channel);
 765                 }
 766         }
 767         if (print_dump)
 768                 iwl_print_hex_dump(priv, IWL_DL_RX, data, length);
 769 }
 770 #else
 771 static inline void iwl_dbg_report_frame(struct iwl_priv *priv,
 772                                             struct iwl_rx_packet *pkt,
 773                                             struct ieee80211_hdr *header,
 774                                             int group100)
 775 {
 776 }
 777 #endif
 778
 779 static void iwl_update_rx_stats(struct iwl_priv *priv, u16 fc, u16 len)
 780 {
 781         /* 0 - mgmt, 1 - cnt, 2 - data */
 782         int idx = (fc & IEEE80211_FCTL_FTYPE) >> 2;
 783         priv->rx_stats[idx].cnt++;
 784         priv->rx_stats[idx].bytes += len;
 785 }
 786
 787 /*
 788  * returns non-zero if packet should be dropped
 789  */
 790 static int iwl_set_decrypted_flag(struct iwl_priv *priv,
 791                                       struct ieee80211_hdr *hdr,
 792                                       u32 decrypt_res,
 793                                       struct ieee80211_rx_status *stats)
 794 {
 795         u16 fc = le16_to_cpu(hdr->frame_control);
 796
 797         if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
 798                 return 0;
 799
 800         if (!(fc & IEEE80211_FCTL_PROTECTED))
 801                 return 0;
 802
 803         IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
 804         switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
 805         case RX_RES_STATUS_SEC_TYPE_TKIP:
 806                 /* The uCode has got a bad phase 1 Key, pushes the packet.
 807                  * Decryption will be done in SW. */
 808                 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
 809                     RX_RES_STATUS_BAD_KEY_TTAK)
 810                         break;
 811
 812         case RX_RES_STATUS_SEC_TYPE_WEP:
 813                 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
 814                     RX_RES_STATUS_BAD_ICV_MIC) {
 815                         /* bad ICV, the packet is destroyed since the
 816                          * decryption is inplace, drop it */
 817                         IWL_DEBUG_RX("Packet destroyed\n");
 818                         return -1;
 819                 }
 820         case RX_RES_STATUS_SEC_TYPE_CCMP:
 821                 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
 822                     RX_RES_STATUS_DECRYPT_OK) {
 823                         IWL_DEBUG_RX("hw decrypt successfully!!!\n");
 824                         stats->flag |= RX_FLAG_DECRYPTED;
 825                 }
 826                 break;
 827
 828         default:
 829                 break;
 830         }
 831         return 0;
 832 }
 833
 834 static u32 iwl_translate_rx_status(struct iwl_priv *priv, u32 decrypt_in)
 835 {
 836         u32 decrypt_out = 0;
 837
 838         if ((decrypt_in & RX_RES_STATUS_STATION_FOUND) ==
 839                                         RX_RES_STATUS_STATION_FOUND)
 840                 decrypt_out |= (RX_RES_STATUS_STATION_FOUND |
 841                                 RX_RES_STATUS_NO_STATION_INFO_MISMATCH);
 842
 843         decrypt_out |= (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK);
 844
 845         /* packet was not encrypted */
 846         if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
 847                                         RX_RES_STATUS_SEC_TYPE_NONE)
 848                 return decrypt_out;
 849
 850         /* packet was encrypted with unknown alg */
 851         if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
 852                                         RX_RES_STATUS_SEC_TYPE_ERR)
 853                 return decrypt_out;
 854
 855         /* decryption was not done in HW */
 856         if ((decrypt_in & RX_MPDU_RES_STATUS_DEC_DONE_MSK) !=
 857                                         RX_MPDU_RES_STATUS_DEC_DONE_MSK)
 858                 return decrypt_out;
 859
 860         switch (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) {
 861
 862         case RX_RES_STATUS_SEC_TYPE_CCMP:
 863                 /* alg is CCM: check MIC only */
 864                 if (!(decrypt_in & RX_MPDU_RES_STATUS_MIC_OK))
 865                         /* Bad MIC */
 866                         decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
 867                 else
 868                         decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
 869
 870                 break;
 871
 872         case RX_RES_STATUS_SEC_TYPE_TKIP:
 873                 if (!(decrypt_in & RX_MPDU_RES_STATUS_TTAK_OK)) {
 874                         /* Bad TTAK */
 875                         decrypt_out |= RX_RES_STATUS_BAD_KEY_TTAK;
 876                         break;
 877                 }
 878                 /* fall through if TTAK OK */
 879         default:
 880                 if (!(decrypt_in & RX_MPDU_RES_STATUS_ICV_OK))
 881                         decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
 882                 else
 883                         decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
 884                 break;
 885         };
 886
 887         IWL_DEBUG_RX("decrypt_in:0x%x  decrypt_out = 0x%x\n",
 888                                         decrypt_in, decrypt_out);
 889
 890         return decrypt_out;
 891 }
 892
 893 static void iwl_pass_packet_to_mac80211(struct iwl_priv *priv,
 894                                        int include_phy,
 895                                        struct iwl_rx_mem_buffer *rxb,
 896                                        struct ieee80211_rx_status *stats)
 897 {
 898         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
 899         struct iwl_rx_phy_res *rx_start = (include_phy) ?
 900             (struct iwl_rx_phy_res *)&(pkt->u.raw[0]) : NULL;
 901         struct ieee80211_hdr *hdr;
 902         u16 len;
 903         __le32 *rx_end;
 904         unsigned int skblen;
 905         u32 ampdu_status;
 906         u32 ampdu_status_legacy;
 907
 908         if (!include_phy && priv->last_phy_res[0])
 909                 rx_start = (struct iwl_rx_phy_res *)&priv->last_phy_res[1];
 910
 911         if (!rx_start) {
 912                 IWL_ERROR("MPDU frame without a PHY data\n");
 913                 return;
 914         }
 915         if (include_phy) {
 916                 hdr = (struct ieee80211_hdr *)((u8 *) &rx_start[1] +
 917                                                rx_start->cfg_phy_cnt);
 918
 919                 len = le16_to_cpu(rx_start->byte_count);
 920
 921                 rx_end = (__le32 *)((u8 *) &pkt->u.raw[0] +
 922                                   sizeof(struct iwl_rx_phy_res) +
 923                                   rx_start->cfg_phy_cnt + len);
 924
 925         } else {
 926                 struct iwl4965_rx_mpdu_res_start *amsdu =
 927                     (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
 928
 929                 hdr = (struct ieee80211_hdr *)(pkt->u.raw +
 930                                sizeof(struct iwl4965_rx_mpdu_res_start));
 931                 len =  le16_to_cpu(amsdu->byte_count);
 932                 rx_start->byte_count = amsdu->byte_count;
 933                 rx_end = (__le32 *) (((u8 *) hdr) + len);
 934         }
 935
 936         ampdu_status = le32_to_cpu(*rx_end);
 937         skblen = ((u8 *) rx_end - (u8 *) &pkt->u.raw[0]) + sizeof(u32);
 938
 939         if (!include_phy) {
 940                 /* New status scheme, need to translate */
 941                 ampdu_status_legacy = ampdu_status;
 942                 ampdu_status = iwl_translate_rx_status(priv, ampdu_status);
 943         }
 944
 945         /* start from MAC */
 946         skb_reserve(rxb->skb, (void *)hdr - (void *)pkt);
 947         skb_put(rxb->skb, len); /* end where data ends */
 948
 949         /* We only process data packets if the interface is open */
 950         if (unlikely(!priv->is_open)) {
 951                 IWL_DEBUG_DROP_LIMIT
 952                     ("Dropping packet while interface is not open.\n");
 953                 return;
 954         }
 955
 956         hdr = (struct ieee80211_hdr *)rxb->skb->data;
 957
 958         /*  in case of HW accelerated crypto and bad decryption, drop */
 959         if (!priv->hw_params.sw_crypto &&
 960             iwl_set_decrypted_flag(priv, hdr, ampdu_status, stats))
 961                 return;
 962
 963         iwl_update_rx_stats(priv, le16_to_cpu(hdr->frame_control), len);
 964         ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
 965         priv->alloc_rxb_skb--;
 966         rxb->skb = NULL;
 967 }
 968
 969 /* Calc max signal level (dBm) among 3 possible receivers */
 970 static inline int iwl_calc_rssi(struct iwl_priv *priv,
 971                                 struct iwl_rx_phy_res *rx_resp)
 972 {
 973         return priv->cfg->ops->utils->calc_rssi(priv, rx_resp);
 974 }
 975
 976
 977 /* This is necessary only for a number of statistics, see the caller. */
 978 static int iwl_is_network_packet(struct iwl_priv *priv,
 979                 struct ieee80211_hdr *header)
 980 {
 981         /* Filter incoming packets to determine if they are targeted toward
 982          * this network, discarding packets coming from ourselves */
 983         switch (priv->iw_mode) {
 984         case NL80211_IFTYPE_ADHOC: /* Header: Dest. | Source    | BSSID */
 985                 /* packets to our IBSS update information */
 986                 return !compare_ether_addr(header->addr3, priv->bssid);
 987         case NL80211_IFTYPE_STATION: /* Header: Dest. | AP{BSSID} | Source */
 988                 /* packets to our IBSS update information */
 989                 return !compare_ether_addr(header->addr2, priv->bssid);
 990         default:
 991                 return 1;
 992         }
 993 }
 994
 995 /* Called for REPLY_RX (legacy ABG frames), or
 996  * REPLY_RX_MPDU_CMD (HT high-throughput N frames). */
 997 void iwl_rx_reply_rx(struct iwl_priv *priv,
 998                                 struct iwl_rx_mem_buffer *rxb)
 999 {
1000         struct ieee80211_hdr *header;
1001         struct ieee80211_rx_status rx_status;
1002         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
1003         /* Use phy data (Rx signal strength, etc.) contained within
1004          *   this rx packet for legacy frames,
1005          *   or phy data cached from REPLY_RX_PHY_CMD for HT frames. */
1006         int include_phy = (pkt->hdr.cmd == REPLY_RX);
1007         struct iwl_rx_phy_res *rx_start = (include_phy) ?
1008                 (struct iwl_rx_phy_res *)&(pkt->u.raw[0]) :
1009                 (struct iwl_rx_phy_res *)&priv->last_phy_res[1];
1010         __le32 *rx_end;
1011         unsigned int len = 0;
1012         u16 fc;
1013         u8 network_packet;
1014
1015         rx_status.mactime = le64_to_cpu(rx_start->timestamp);
1016         rx_status.freq =
1017                 ieee80211_channel_to_frequency(le16_to_cpu(rx_start->channel));
1018         rx_status.band = (rx_start->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
1019                                 IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
1020         rx_status.rate_idx =
1021                 iwl_hwrate_to_plcp_idx(le32_to_cpu(rx_start->rate_n_flags));
1022         if (rx_status.band == IEEE80211_BAND_5GHZ)
1023                 rx_status.rate_idx -= IWL_FIRST_OFDM_RATE;
1024
1025         rx_status.flag = 0;
1026
1027         /* TSF isn't reliable. In order to allow smooth user experience,
1028          * this W/A doesn't propagate it to the mac80211 */
1029         /*rx_status.flag |= RX_FLAG_TSFT;*/
1030
1031         if ((unlikely(rx_start->cfg_phy_cnt > 20))) {
1032                 IWL_DEBUG_DROP("dsp size out of range [0,20]: %d/n",
1033                                 rx_start->cfg_phy_cnt);
1034                 return;
1035         }
1036
1037         if (!include_phy) {
1038                 if (priv->last_phy_res[0])
1039                         rx_start = (struct iwl_rx_phy_res *)
1040                                 &priv->last_phy_res[1];
1041                 else
1042                         rx_start = NULL;
1043         }
1044
1045         if (!rx_start) {
1046                 IWL_ERROR("MPDU frame without a PHY data\n");
1047                 return;
1048         }
1049
1050         if (include_phy) {
1051                 header = (struct ieee80211_hdr *)((u8 *) &rx_start[1]
1052                                                   + rx_start->cfg_phy_cnt);
1053
1054                 len = le16_to_cpu(rx_start->byte_count);
1055                 rx_end = (__le32 *)(pkt->u.raw + rx_start->cfg_phy_cnt +
1056                                   sizeof(struct iwl_rx_phy_res) + len);
1057         } else {
1058                 struct iwl4965_rx_mpdu_res_start *amsdu =
1059                         (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
1060
1061                 header = (void *)(pkt->u.raw +
1062                         sizeof(struct iwl4965_rx_mpdu_res_start));
1063                 len = le16_to_cpu(amsdu->byte_count);
1064                 rx_end = (__le32 *) (pkt->u.raw +
1065                         sizeof(struct iwl4965_rx_mpdu_res_start) + len);
1066         }
1067
1068         if (!(*rx_end & RX_RES_STATUS_NO_CRC32_ERROR) ||
1069             !(*rx_end & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
1070                 IWL_DEBUG_RX("Bad CRC or FIFO: 0x%08X.\n",
1071                                 le32_to_cpu(*rx_end));
1072                 return;
1073         }
1074
1075         priv->ucode_beacon_time = le32_to_cpu(rx_start->beacon_time_stamp);
1076
1077         /* Find max signal strength (dBm) among 3 antenna/receiver chains */
1078         rx_status.signal = iwl_calc_rssi(priv, rx_start);
1079
1080         /* Meaningful noise values are available only from beacon statistics,
1081          *   which are gathered only when associated, and indicate noise
1082          *   only for the associated network channel ...
1083          * Ignore these noise values while scanning (other channels) */
1084         if (iwl_is_associated(priv) &&
1085             !test_bit(STATUS_SCANNING, &priv->status)) {
1086                 rx_status.noise = priv->last_rx_noise;
1087                 rx_status.qual = iwl_calc_sig_qual(rx_status.signal,
1088                                                          rx_status.noise);
1089         } else {
1090                 rx_status.noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
1091                 rx_status.qual = iwl_calc_sig_qual(rx_status.signal, 0);
1092         }
1093
1094         /* Reset beacon noise level if not associated. */
1095         if (!iwl_is_associated(priv))
1096                 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
1097
1098         /* Set "1" to report good data frames in groups of 100 */
1099         /* FIXME: need to optimize the call: */
1100         iwl_dbg_report_frame(priv, pkt, header, 1);
1101
1102         IWL_DEBUG_STATS_LIMIT("Rssi %d, noise %d, qual %d, TSF %llu\n",
1103                 rx_status.signal, rx_status.noise, rx_status.signal,
1104                 (unsigned long long)rx_status.mactime);
1105
1106         /*
1107          * "antenna number"
1108          *
1109          * It seems that the antenna field in the phy flags value
1110          * is actually a bit field. This is undefined by radiotap,
1111          * it wants an actual antenna number but I always get "7"
1112          * for most legacy frames I receive indicating that the
1113          * same frame was received on all three RX chains.
1114          *
1115          * I think this field should be removed in favor of a
1116          * new 802.11n radiotap field "RX chains" that is defined
1117          * as a bitmask.
1118          */
1119         rx_status.antenna = le16_to_cpu(rx_start->phy_flags &
1120                                         RX_RES_PHY_FLAGS_ANTENNA_MSK) >> 4;
1121
1122         /* set the preamble flag if appropriate */
1123         if (rx_start->phy_flags & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
1124                 rx_status.flag |= RX_FLAG_SHORTPRE;
1125
1126         /* Take shortcut when only in monitor mode */
1127         if (priv->iw_mode == NL80211_IFTYPE_MONITOR) {
1128                 iwl_pass_packet_to_mac80211(priv, include_phy,
1129                                                  rxb, &rx_status);
1130                 return;
1131         }
1132
1133         network_packet = iwl_is_network_packet(priv, header);
1134         if (network_packet) {
1135                 priv->last_rx_rssi = rx_status.signal;
1136                 priv->last_beacon_time =  priv->ucode_beacon_time;
1137                 priv->last_tsf = le64_to_cpu(rx_start->timestamp);
1138         }
1139
1140         fc = le16_to_cpu(header->frame_control);
1141         switch (fc & IEEE80211_FCTL_FTYPE) {
1142         case IEEE80211_FTYPE_MGMT:
1143         case IEEE80211_FTYPE_DATA:
1144                 if (priv->iw_mode == NL80211_IFTYPE_AP)
1145                         iwl_update_ps_mode(priv, fc  & IEEE80211_FCTL_PM,
1146                                                 header->addr2);
1147                 /* fall through */
1148         default:
1149                         iwl_pass_packet_to_mac80211(priv, include_phy, rxb,
1150                                    &rx_status);
1151                 break;
1152
1153         }
1154 }
1155 EXPORT_SYMBOL(iwl_rx_reply_rx);
1156
1157 /* Cache phy data (Rx signal strength, etc) for HT frame (REPLY_RX_PHY_CMD).
1158  * This will be used later in iwl_rx_reply_rx() for REPLY_RX_MPDU_CMD. */
1159 void iwl_rx_reply_rx_phy(struct iwl_priv *priv,
1160                                     struct iwl_rx_mem_buffer *rxb)
1161 {
1162         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
1163         priv->last_phy_res[0] = 1;
1164         memcpy(&priv->last_phy_res[1], &(pkt->u.raw[0]),
1165                sizeof(struct iwl_rx_phy_res));
1166 }
1167 EXPORT_SYMBOL(iwl_rx_reply_rx_phy);