drivers/net/wireless/iwlwifi/iwl-eeprom.c

   1 /******************************************************************************
   2  *
   3  * This file is provided under a dual BSD/GPLv2 license.  When using or
   4  * redistributing this file, you may do so under either license.
   5  *
   6  * GPL LICENSE SUMMARY
   7  *
   8  * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of version 2 of the GNU General Public License as
  12  * published by the Free Software Foundation.
  13  *
  14  * This program is distributed in the hope that it will be useful, but
  15  * WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  17  * General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  22  * USA
  23  *
  24  * The full GNU General Public License is included in this distribution
  25  * in the file called LICENSE.GPL.
  26  *
  27  * Contact Information:
  28  *  Intel Linux Wireless <ilw@linux.intel.com>
  29  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  30  *
  31  * BSD LICENSE
  32  *
  33  * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved.
  34  * All rights reserved.
  35  *
  36  * Redistribution and use in source and binary forms, with or without
  37  * modification, are permitted provided that the following conditions
  38  * are met:
  39  *
  40  *  * Redistributions of source code must retain the above copyright
  41  *    notice, this list of conditions and the following disclaimer.
  42  *  * Redistributions in binary form must reproduce the above copyright
  43  *    notice, this list of conditions and the following disclaimer in
  44  *    the documentation and/or other materials provided with the
  45  *    distribution.
  46  *  * Neither the name Intel Corporation nor the names of its
  47  *    contributors may be used to endorse or promote products derived
  48  *    from this software without specific prior written permission.
  49  *
  50  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  51  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  52  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  53  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  54  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  55  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  56  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  57  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  58  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  59  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  60  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  61  *****************************************************************************/
  62
  63
  64 #include <linux/kernel.h>
  65 #include <linux/module.h>
  66 #include <linux/slab.h>
  67 #include <linux/init.h>
  68
  69 #include <net/mac80211.h>
  70
  71 #include "iwl-commands.h"
  72 #include "iwl-dev.h"
  73 #include "iwl-core.h"
  74 #include "iwl-debug.h"
  75 #include "iwl-agn.h"
  76 #include "iwl-eeprom.h"
  77 #include "iwl-io.h"
  78
  79 /************************** EEPROM BANDS ****************************
  80  *
  81  * The iwl_eeprom_band definitions below provide the mapping from the
  82  * EEPROM contents to the specific channel number supported for each
  83  * band.
  84  *
  85  * For example, iwl_priv->eeprom.band_3_channels[4] from the band_3
  86  * definition below maps to physical channel 42 in the 5.2GHz spectrum.
  87  * The specific geography and calibration information for that channel
  88  * is contained in the eeprom map itself.
  89  *
  90  * During init, we copy the eeprom information and channel map
  91  * information into priv->channel_info_24/52 and priv->channel_map_24/52
  92  *
  93  * channel_map_24/52 provides the index in the channel_info array for a
  94  * given channel.  We have to have two separate maps as there is channel
  95  * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
  96  * band_2
  97  *
  98  * A value of 0xff stored in the channel_map indicates that the channel
  99  * is not supported by the hardware at all.
 100  *
 101  * A value of 0xfe in the channel_map indicates that the channel is not
 102  * valid for Tx with the current hardware.  This means that
 103  * while the system can tune and receive on a given channel, it may not
 104  * be able to associate or transmit any frames on that
 105  * channel.  There is no corresponding channel information for that
 106  * entry.
 107  *
 108  *********************************************************************/
 109
 110 /* 2.4 GHz */
 111 const u8 iwl_eeprom_band_1[14] = {
 112         1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
 113 };
 114
 115 /* 5.2 GHz bands */
 116 static const u8 iwl_eeprom_band_2[] = { /* 4915-5080MHz */
 117         183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
 118 };
 119
 120 static const u8 iwl_eeprom_band_3[] = { /* 5170-5320MHz */
 121         34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
 122 };
 123
 124 static const u8 iwl_eeprom_band_4[] = { /* 5500-5700MHz */
 125         100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
 126 };
 127
 128 static const u8 iwl_eeprom_band_5[] = { /* 5725-5825MHz */
 129         145, 149, 153, 157, 161, 165
 130 };
 131
 132 static const u8 iwl_eeprom_band_6[] = {       /* 2.4 ht40 channel */
 133         1, 2, 3, 4, 5, 6, 7
 134 };
 135
 136 static const u8 iwl_eeprom_band_7[] = {       /* 5.2 ht40 channel */
 137         36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
 138 };
 139
 140 /******************************************************************************
 141  *
 142  * generic NVM functions
 143  *
 144 ******************************************************************************/
 145
 146 /*
 147  * The device's EEPROM semaphore prevents conflicts between driver and uCode
 148  * when accessing the EEPROM; each access is a series of pulses to/from the
 149  * EEPROM chip, not a single event, so even reads could conflict if they
 150  * weren't arbitrated by the semaphore.
 151  */
 152 static int iwl_eeprom_acquire_semaphore(struct iwl_priv *priv)
 153 {
 154         u16 count;
 155         int ret;
 156
 157         for (count = 0; count < EEPROM_SEM_RETRY_LIMIT; count++) {
 158                 /* Request semaphore */
 159                 iwl_set_bit(bus(priv), CSR_HW_IF_CONFIG_REG,
 160                             CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
 161
 162                 /* See if we got it */
 163                 ret = iwl_poll_bit(bus(priv), CSR_HW_IF_CONFIG_REG,
 164                                 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
 165                                 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
 166                                 EEPROM_SEM_TIMEOUT);
 167                 if (ret >= 0) {
 168                         IWL_DEBUG_EEPROM(priv,
 169                                 "Acquired semaphore after %d tries.\n",
 170                                 count+1);
 171                         return ret;
 172                 }
 173         }
 174
 175         return ret;
 176 }
 177
 178 static void iwl_eeprom_release_semaphore(struct iwl_priv *priv)
 179 {
 180         iwl_clear_bit(bus(priv), CSR_HW_IF_CONFIG_REG,
 181                 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
 182
 183 }
 184
 185 static int iwl_eeprom_verify_signature(struct iwl_priv *priv)
 186 {
 187         u32 gp = iwl_read32(bus(priv), CSR_EEPROM_GP) & CSR_EEPROM_GP_VALID_MSK;
 188         int ret = 0;
 189
 190         IWL_DEBUG_EEPROM(priv, "EEPROM signature=0x%08x\n", gp);
 191         switch (gp) {
 192         case CSR_EEPROM_GP_BAD_SIG_EEP_GOOD_SIG_OTP:
 193                 if (priv->nvm_device_type != NVM_DEVICE_TYPE_OTP) {
 194                         IWL_ERR(priv, "EEPROM with bad signature: 0x%08x\n",
 195                                 gp);
 196                         ret = -ENOENT;
 197                 }
 198                 break;
 199         case CSR_EEPROM_GP_GOOD_SIG_EEP_LESS_THAN_4K:
 200         case CSR_EEPROM_GP_GOOD_SIG_EEP_MORE_THAN_4K:
 201                 if (priv->nvm_device_type != NVM_DEVICE_TYPE_EEPROM) {
 202                         IWL_ERR(priv, "OTP with bad signature: 0x%08x\n", gp);
 203                         ret = -ENOENT;
 204                 }
 205                 break;
 206         case CSR_EEPROM_GP_BAD_SIGNATURE_BOTH_EEP_AND_OTP:
 207         default:
 208                 IWL_ERR(priv, "bad EEPROM/OTP signature, type=%s, "
 209                         "EEPROM_GP=0x%08x\n",
 210                         (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP)
 211                         ? "OTP" : "EEPROM", gp);
 212                 ret = -ENOENT;
 213                 break;
 214         }
 215         return ret;
 216 }
 217
 218 u16 iwl_eeprom_query16(const struct iwl_priv *priv, size_t offset)
 219 {
 220         if (!priv->eeprom)
 221                 return 0;
 222         return (u16)priv->eeprom[offset] | ((u16)priv->eeprom[offset + 1] << 8);
 223 }
 224
 225 int iwl_eeprom_check_version(struct iwl_priv *priv)
 226 {
 227         u16 eeprom_ver;
 228         u16 calib_ver;
 229
 230         eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
 231         calib_ver = iwlagn_eeprom_calib_version(priv);
 232
 233         if (eeprom_ver < priv->cfg->eeprom_ver ||
 234             calib_ver < priv->cfg->eeprom_calib_ver)
 235                 goto err;
 236
 237         IWL_INFO(priv, "device EEPROM VER=0x%x, CALIB=0x%x\n",
 238                  eeprom_ver, calib_ver);
 239
 240         return 0;
 241 err:
 242         IWL_ERR(priv, "Unsupported (too old) EEPROM VER=0x%x < 0x%x "
 243                   "CALIB=0x%x < 0x%x\n",
 244                   eeprom_ver, priv->cfg->eeprom_ver,
 245                   calib_ver,  priv->cfg->eeprom_calib_ver);
 246         return -EINVAL;
 247
 248 }
 249
 250 int iwl_eeprom_check_sku(struct iwl_priv *priv)
 251 {
 252         u16 radio_cfg;
 253
 254         if (!priv->cfg->sku) {
 255                 /* not using sku overwrite */
 256                 priv->cfg->sku = iwl_eeprom_query16(priv, EEPROM_SKU_CAP);
 257                 if (priv->cfg->sku & EEPROM_SKU_CAP_11N_ENABLE &&
 258                     !priv->cfg->ht_params) {
 259                         IWL_ERR(priv, "Invalid 11n configuration\n");
 260                         return -EINVAL;
 261                 }
 262         }
 263         if (!priv->cfg->sku) {
 264                 IWL_ERR(priv, "Invalid device sku\n");
 265                 return -EINVAL;
 266         }
 267
 268         IWL_INFO(priv, "Device SKU: 0X%x\n", priv->cfg->sku);
 269
 270         if (!priv->cfg->valid_tx_ant && !priv->cfg->valid_rx_ant) {
 271                 /* not using .cfg overwrite */
 272                 radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
 273                 priv->cfg->valid_tx_ant = EEPROM_RF_CFG_TX_ANT_MSK(radio_cfg);
 274                 priv->cfg->valid_rx_ant = EEPROM_RF_CFG_RX_ANT_MSK(radio_cfg);
 275                 if (!priv->cfg->valid_tx_ant || !priv->cfg->valid_rx_ant) {
 276                         IWL_ERR(priv, "Invalid chain (0X%x, 0X%x)\n",
 277                                 priv->cfg->valid_tx_ant,
 278                                 priv->cfg->valid_rx_ant);
 279                         return -EINVAL;
 280                 }
 281                 IWL_INFO(priv, "Valid Tx ant: 0X%x, Valid Rx ant: 0X%x\n",
 282                          priv->cfg->valid_tx_ant, priv->cfg->valid_rx_ant);
 283         }
 284         /*
 285          * for some special cases,
 286          * EEPROM did not reflect the correct antenna setting
 287          * so overwrite the valid tx/rx antenna from .cfg
 288          */
 289         return 0;
 290 }
 291
 292 void iwl_eeprom_get_mac(const struct iwl_priv *priv, u8 *mac)
 293 {
 294         const u8 *addr = iwl_eeprom_query_addr(priv,
 295                                         EEPROM_MAC_ADDRESS);
 296         memcpy(mac, addr, ETH_ALEN);
 297 }
 298
 299 /******************************************************************************
 300  *
 301  * OTP related functions
 302  *
 303 ******************************************************************************/
 304
 305 static void iwl_set_otp_access(struct iwl_priv *priv, enum iwl_access_mode mode)
 306 {
 307         iwl_read32(bus(priv), CSR_OTP_GP_REG);
 308
 309         if (mode == IWL_OTP_ACCESS_ABSOLUTE)
 310                 iwl_clear_bit(bus(priv), CSR_OTP_GP_REG,
 311                               CSR_OTP_GP_REG_OTP_ACCESS_MODE);
 312         else
 313                 iwl_set_bit(bus(priv), CSR_OTP_GP_REG,
 314                             CSR_OTP_GP_REG_OTP_ACCESS_MODE);
 315 }
 316
 317 static int iwl_get_nvm_type(struct iwl_priv *priv, u32 hw_rev)
 318 {
 319         u32 otpgp;
 320         int nvm_type;
 321
 322         /* OTP only valid for CP/PP and after */
 323         switch (hw_rev & CSR_HW_REV_TYPE_MSK) {
 324         case CSR_HW_REV_TYPE_NONE:
 325                 IWL_ERR(priv, "Unknown hardware type\n");
 326                 return -ENOENT;
 327         case CSR_HW_REV_TYPE_5300:
 328         case CSR_HW_REV_TYPE_5350:
 329         case CSR_HW_REV_TYPE_5100:
 330         case CSR_HW_REV_TYPE_5150:
 331                 nvm_type = NVM_DEVICE_TYPE_EEPROM;
 332                 break;
 333         default:
 334                 otpgp = iwl_read32(bus(priv), CSR_OTP_GP_REG);
 335                 if (otpgp & CSR_OTP_GP_REG_DEVICE_SELECT)
 336                         nvm_type = NVM_DEVICE_TYPE_OTP;
 337                 else
 338                         nvm_type = NVM_DEVICE_TYPE_EEPROM;
 339                 break;
 340         }
 341         return  nvm_type;
 342 }
 343
 344 static int iwl_init_otp_access(struct iwl_priv *priv)
 345 {
 346         int ret;
 347
 348         /* Enable 40MHz radio clock */
 349         iwl_write32(bus(priv), CSR_GP_CNTRL,
 350                     iwl_read32(bus(priv), CSR_GP_CNTRL) |
 351                     CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
 352
 353         /* wait for clock to be ready */
 354         ret = iwl_poll_bit(bus(priv), CSR_GP_CNTRL,
 355                                  CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
 356                                  CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
 357                                  25000);
 358         if (ret < 0)
 359                 IWL_ERR(priv, "Time out access OTP\n");
 360         else {
 361                 iwl_set_bits_prph(bus(priv), APMG_PS_CTRL_REG,
 362                                   APMG_PS_CTRL_VAL_RESET_REQ);
 363                 udelay(5);
 364                 iwl_clear_bits_prph(bus(priv), APMG_PS_CTRL_REG,
 365                                     APMG_PS_CTRL_VAL_RESET_REQ);
 366
 367                 /*
 368                  * CSR auto clock gate disable bit -
 369                  * this is only applicable for HW with OTP shadow RAM
 370                  */
 371                 if (priv->cfg->base_params->shadow_ram_support)
 372                         iwl_set_bit(bus(priv), CSR_DBG_LINK_PWR_MGMT_REG,
 373                                 CSR_RESET_LINK_PWR_MGMT_DISABLED);
 374         }
 375         return ret;
 376 }
 377
 378 static int iwl_read_otp_word(struct iwl_priv *priv, u16 addr, __le16 *eeprom_data)
 379 {
 380         int ret = 0;
 381         u32 r;
 382         u32 otpgp;
 383
 384         iwl_write32(bus(priv), CSR_EEPROM_REG,
 385                     CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
 386         ret = iwl_poll_bit(bus(priv), CSR_EEPROM_REG,
 387                                  CSR_EEPROM_REG_READ_VALID_MSK,
 388                                  CSR_EEPROM_REG_READ_VALID_MSK,
 389                                  IWL_EEPROM_ACCESS_TIMEOUT);
 390         if (ret < 0) {
 391                 IWL_ERR(priv, "Time out reading OTP[%d]\n", addr);
 392                 return ret;
 393         }
 394         r = iwl_read32(bus(priv), CSR_EEPROM_REG);
 395         /* check for ECC errors: */
 396         otpgp = iwl_read32(bus(priv), CSR_OTP_GP_REG);
 397         if (otpgp & CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK) {
 398                 /* stop in this case */
 399                 /* set the uncorrectable OTP ECC bit for acknowledgement */
 400                 iwl_set_bit(bus(priv), CSR_OTP_GP_REG,
 401                         CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK);
 402                 IWL_ERR(priv, "Uncorrectable OTP ECC error, abort OTP read\n");
 403                 return -EINVAL;
 404         }
 405         if (otpgp & CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK) {
 406                 /* continue in this case */
 407                 /* set the correctable OTP ECC bit for acknowledgement */
 408                 iwl_set_bit(bus(priv), CSR_OTP_GP_REG,
 409                                 CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK);
 410                 IWL_ERR(priv, "Correctable OTP ECC error, continue read\n");
 411         }
 412         *eeprom_data = cpu_to_le16(r >> 16);
 413         return 0;
 414 }
 415
 416 /*
 417  * iwl_is_otp_empty: check for empty OTP
 418  */
 419 static bool iwl_is_otp_empty(struct iwl_priv *priv)
 420 {
 421         u16 next_link_addr = 0;
 422         __le16 link_value;
 423         bool is_empty = false;
 424
 425         /* locate the beginning of OTP link list */
 426         if (!iwl_read_otp_word(priv, next_link_addr, &link_value)) {
 427                 if (!link_value) {
 428                         IWL_ERR(priv, "OTP is empty\n");
 429                         is_empty = true;
 430                 }
 431         } else {
 432                 IWL_ERR(priv, "Unable to read first block of OTP list.\n");
 433                 is_empty = true;
 434         }
 435
 436         return is_empty;
 437 }
 438
 439
 440 /*
 441  * iwl_find_otp_image: find EEPROM image in OTP
 442  *   finding the OTP block that contains the EEPROM image.
 443  *   the last valid block on the link list (the block _before_ the last block)
 444  *   is the block we should read and used to configure the device.
 445  *   If all the available OTP blocks are full, the last block will be the block
 446  *   we should read and used to configure the device.
 447  *   only perform this operation if shadow RAM is disabled
 448  */
 449 static int iwl_find_otp_image(struct iwl_priv *priv,
 450                                         u16 *validblockaddr)
 451 {
 452         u16 next_link_addr = 0, valid_addr;
 453         __le16 link_value = 0;
 454         int usedblocks = 0;
 455
 456         /* set addressing mode to absolute to traverse the link list */
 457         iwl_set_otp_access(priv, IWL_OTP_ACCESS_ABSOLUTE);
 458
 459         /* checking for empty OTP or error */
 460         if (iwl_is_otp_empty(priv))
 461                 return -EINVAL;
 462
 463         /*
 464          * start traverse link list
 465          * until reach the max number of OTP blocks
 466          * different devices have different number of OTP blocks
 467          */
 468         do {
 469                 /* save current valid block address
 470                  * check for more block on the link list
 471                  */
 472                 valid_addr = next_link_addr;
 473                 next_link_addr = le16_to_cpu(link_value) * sizeof(u16);
 474                 IWL_DEBUG_EEPROM(priv, "OTP blocks %d addr 0x%x\n",
 475                                usedblocks, next_link_addr);
 476                 if (iwl_read_otp_word(priv, next_link_addr, &link_value))
 477                         return -EINVAL;
 478                 if (!link_value) {
 479                         /*
 480                          * reach the end of link list, return success and
 481                          * set address point to the starting address
 482                          * of the image
 483                          */
 484                         *validblockaddr = valid_addr;
 485                         /* skip first 2 bytes (link list pointer) */
 486                         *validblockaddr += 2;
 487                         return 0;
 488                 }
 489                 /* more in the link list, continue */
 490                 usedblocks++;
 491         } while (usedblocks <= priv->cfg->base_params->max_ll_items);
 492
 493         /* OTP has no valid blocks */
 494         IWL_DEBUG_EEPROM(priv, "OTP has no valid blocks\n");
 495         return -EINVAL;
 496 }
 497
 498 /******************************************************************************
 499  *
 500  * Tx Power related functions
 501  *
 502 ******************************************************************************/
 503 /**
 504  * iwl_get_max_txpower_avg - get the highest tx power from all chains.
 505  *     find the highest tx power from all chains for the channel
 506  */
 507 static s8 iwl_get_max_txpower_avg(struct iwl_priv *priv,
 508                 struct iwl_eeprom_enhanced_txpwr *enhanced_txpower,
 509                 int element, s8 *max_txpower_in_half_dbm)
 510 {
 511         s8 max_txpower_avg = 0; /* (dBm) */
 512
 513         /* Take the highest tx power from any valid chains */
 514         if ((priv->cfg->valid_tx_ant & ANT_A) &&
 515             (enhanced_txpower[element].chain_a_max > max_txpower_avg))
 516                 max_txpower_avg = enhanced_txpower[element].chain_a_max;
 517         if ((priv->cfg->valid_tx_ant & ANT_B) &&
 518             (enhanced_txpower[element].chain_b_max > max_txpower_avg))
 519                 max_txpower_avg = enhanced_txpower[element].chain_b_max;
 520         if ((priv->cfg->valid_tx_ant & ANT_C) &&
 521             (enhanced_txpower[element].chain_c_max > max_txpower_avg))
 522                 max_txpower_avg = enhanced_txpower[element].chain_c_max;
 523         if (((priv->cfg->valid_tx_ant == ANT_AB) |
 524             (priv->cfg->valid_tx_ant == ANT_BC) |
 525             (priv->cfg->valid_tx_ant == ANT_AC)) &&
 526             (enhanced_txpower[element].mimo2_max > max_txpower_avg))
 527                 max_txpower_avg =  enhanced_txpower[element].mimo2_max;
 528         if ((priv->cfg->valid_tx_ant == ANT_ABC) &&
 529             (enhanced_txpower[element].mimo3_max > max_txpower_avg))
 530                 max_txpower_avg = enhanced_txpower[element].mimo3_max;
 531
 532         /*
 533          * max. tx power in EEPROM is in 1/2 dBm format
 534          * convert from 1/2 dBm to dBm (round-up convert)
 535          * but we also do not want to loss 1/2 dBm resolution which
 536          * will impact performance
 537          */
 538         *max_txpower_in_half_dbm = max_txpower_avg;
 539         return (max_txpower_avg & 0x01) + (max_txpower_avg >> 1);
 540 }
 541
 542 static void
 543 iwl_eeprom_enh_txp_read_element(struct iwl_priv *priv,
 544                                     struct iwl_eeprom_enhanced_txpwr *txp,
 545                                     s8 max_txpower_avg)
 546 {
 547         int ch_idx;
 548         bool is_ht40 = txp->flags & IWL_EEPROM_ENH_TXP_FL_40MHZ;
 549         enum ieee80211_band band;
 550
 551         band = txp->flags & IWL_EEPROM_ENH_TXP_FL_BAND_52G ?
 552                 IEEE80211_BAND_5GHZ : IEEE80211_BAND_2GHZ;
 553
 554         for (ch_idx = 0; ch_idx < priv->channel_count; ch_idx++) {
 555                 struct iwl_channel_info *ch_info = &priv->channel_info[ch_idx];
 556
 557                 /* update matching channel or from common data only */
 558                 if (txp->channel != 0 && ch_info->channel != txp->channel)
 559                         continue;
 560
 561                 /* update matching band only */
 562                 if (band != ch_info->band)
 563                         continue;
 564
 565                 if (ch_info->max_power_avg < max_txpower_avg && !is_ht40) {
 566                         ch_info->max_power_avg = max_txpower_avg;
 567                         ch_info->curr_txpow = max_txpower_avg;
 568                         ch_info->scan_power = max_txpower_avg;
 569                 }
 570
 571                 if (is_ht40 && ch_info->ht40_max_power_avg < max_txpower_avg)
 572                         ch_info->ht40_max_power_avg = max_txpower_avg;
 573         }
 574 }
 575
 576 #define EEPROM_TXP_OFFS (0x00 | INDIRECT_ADDRESS | INDIRECT_TXP_LIMIT)
 577 #define EEPROM_TXP_ENTRY_LEN sizeof(struct iwl_eeprom_enhanced_txpwr)
 578 #define EEPROM_TXP_SZ_OFFS (0x00 | INDIRECT_ADDRESS | INDIRECT_TXP_LIMIT_SIZE)
 579
 580 #define TXP_CHECK_AND_PRINT(x) ((txp->flags & IWL_EEPROM_ENH_TXP_FL_##x) \
 581                             ? # x " " : "")
 582
 583 void iwl_eeprom_enhanced_txpower(struct iwl_priv *priv)
 584 {
 585         struct iwl_eeprom_enhanced_txpwr *txp_array, *txp;
 586         int idx, entries;
 587         __le16 *txp_len;
 588         s8 max_txp_avg, max_txp_avg_halfdbm;
 589
 590         BUILD_BUG_ON(sizeof(struct iwl_eeprom_enhanced_txpwr) != 8);
 591
 592         /* the length is in 16-bit words, but we want entries */
 593         txp_len = (__le16 *) iwl_eeprom_query_addr(priv, EEPROM_TXP_SZ_OFFS);
 594         entries = le16_to_cpup(txp_len) * 2 / EEPROM_TXP_ENTRY_LEN;
 595
 596         txp_array = (void *) iwl_eeprom_query_addr(priv, EEPROM_TXP_OFFS);
 597
 598         for (idx = 0; idx < entries; idx++) {
 599                 txp = &txp_array[idx];
 600                 /* skip invalid entries */
 601                 if (!(txp->flags & IWL_EEPROM_ENH_TXP_FL_VALID))
 602                         continue;
 603
 604                 IWL_DEBUG_EEPROM(priv, "%s %d:\t %s%s%s%s%s%s%s%s (0x%02x)\n",
 605                                  (txp->channel && (txp->flags &
 606                                         IWL_EEPROM_ENH_TXP_FL_COMMON_TYPE)) ?
 607                                         "Common " : (txp->channel) ?
 608                                         "Channel" : "Common",
 609                                  (txp->channel),
 610                                  TXP_CHECK_AND_PRINT(VALID),
 611                                  TXP_CHECK_AND_PRINT(BAND_52G),
 612                                  TXP_CHECK_AND_PRINT(OFDM),
 613                                  TXP_CHECK_AND_PRINT(40MHZ),
 614                                  TXP_CHECK_AND_PRINT(HT_AP),
 615                                  TXP_CHECK_AND_PRINT(RES1),
 616                                  TXP_CHECK_AND_PRINT(RES2),
 617                                  TXP_CHECK_AND_PRINT(COMMON_TYPE),
 618                                  txp->flags);
 619                 IWL_DEBUG_EEPROM(priv, "\t\t chain_A: 0x%02x "
 620                                  "chain_B: 0X%02x chain_C: 0X%02x\n",
 621                                  txp->chain_a_max, txp->chain_b_max,
 622                                  txp->chain_c_max);
 623                 IWL_DEBUG_EEPROM(priv, "\t\t MIMO2: 0x%02x "
 624                                  "MIMO3: 0x%02x High 20_on_40: 0x%02x "
 625                                  "Low 20_on_40: 0x%02x\n",
 626                                  txp->mimo2_max, txp->mimo3_max,
 627                                  ((txp->delta_20_in_40 & 0xf0) >> 4),
 628                                  (txp->delta_20_in_40 & 0x0f));
 629
 630                 max_txp_avg = iwl_get_max_txpower_avg(priv, txp_array, idx,
 631                                                       &max_txp_avg_halfdbm);
 632
 633                 /*
 634                  * Update the user limit values values to the highest
 635                  * power supported by any channel
 636                  */
 637                 if (max_txp_avg > priv->tx_power_user_lmt)
 638                         priv->tx_power_user_lmt = max_txp_avg;
 639                 if (max_txp_avg_halfdbm > priv->tx_power_lmt_in_half_dbm)
 640                         priv->tx_power_lmt_in_half_dbm = max_txp_avg_halfdbm;
 641
 642                 iwl_eeprom_enh_txp_read_element(priv, txp, max_txp_avg);
 643         }
 644 }
 645
 646 /**
 647  * iwl_eeprom_init - read EEPROM contents
 648  *
 649  * Load the EEPROM contents from adapter into priv->eeprom
 650  *
 651  * NOTE:  This routine uses the non-debug IO access functions.
 652  */
 653 int iwl_eeprom_init(struct iwl_priv *priv, u32 hw_rev)
 654 {
 655         __le16 *e;
 656         u32 gp = iwl_read32(bus(priv), CSR_EEPROM_GP);
 657         int sz;
 658         int ret;
 659         u16 addr;
 660         u16 validblockaddr = 0;
 661         u16 cache_addr = 0;
 662
 663         priv->nvm_device_type = iwl_get_nvm_type(priv, hw_rev);
 664         if (priv->nvm_device_type == -ENOENT)
 665                 return -ENOENT;
 666         /* allocate eeprom */
 667         sz = priv->cfg->base_params->eeprom_size;
 668         IWL_DEBUG_EEPROM(priv, "NVM size = %d\n", sz);
 669         priv->eeprom = kzalloc(sz, GFP_KERNEL);
 670         if (!priv->eeprom) {
 671                 ret = -ENOMEM;
 672                 goto alloc_err;
 673         }
 674         e = (__le16 *)priv->eeprom;
 675
 676         iwl_apm_init(priv);
 677
 678         ret = iwl_eeprom_verify_signature(priv);
 679         if (ret < 0) {
 680                 IWL_ERR(priv, "EEPROM not found, EEPROM_GP=0x%08x\n", gp);
 681                 ret = -ENOENT;
 682                 goto err;
 683         }
 684
 685         /* Make sure driver (instead of uCode) is allowed to read EEPROM */
 686         ret = iwl_eeprom_acquire_semaphore(priv);
 687         if (ret < 0) {
 688                 IWL_ERR(priv, "Failed to acquire EEPROM semaphore.\n");
 689                 ret = -ENOENT;
 690                 goto err;
 691         }
 692
 693         if (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP) {
 694
 695                 ret = iwl_init_otp_access(priv);
 696                 if (ret) {
 697                         IWL_ERR(priv, "Failed to initialize OTP access.\n");
 698                         ret = -ENOENT;
 699                         goto done;
 700                 }
 701                 iwl_write32(bus(priv), CSR_EEPROM_GP,
 702                             iwl_read32(bus(priv), CSR_EEPROM_GP) &
 703                             ~CSR_EEPROM_GP_IF_OWNER_MSK);
 704
 705                 iwl_set_bit(bus(priv), CSR_OTP_GP_REG,
 706                              CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK |
 707                              CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK);
 708                 /* traversing the linked list if no shadow ram supported */
 709                 if (!priv->cfg->base_params->shadow_ram_support) {
 710                         if (iwl_find_otp_image(priv, &validblockaddr)) {
 711                                 ret = -ENOENT;
 712                                 goto done;
 713                         }
 714                 }
 715                 for (addr = validblockaddr; addr < validblockaddr + sz;
 716                      addr += sizeof(u16)) {
 717                         __le16 eeprom_data;
 718
 719                         ret = iwl_read_otp_word(priv, addr, &eeprom_data);
 720                         if (ret)
 721                                 goto done;
 722                         e[cache_addr / 2] = eeprom_data;
 723                         cache_addr += sizeof(u16);
 724                 }
 725         } else {
 726                 /* eeprom is an array of 16bit values */
 727                 for (addr = 0; addr < sz; addr += sizeof(u16)) {
 728                         u32 r;
 729
 730                         iwl_write32(bus(priv), CSR_EEPROM_REG,
 731                                     CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
 732
 733                         ret = iwl_poll_bit(bus(priv), CSR_EEPROM_REG,
 734                                                   CSR_EEPROM_REG_READ_VALID_MSK,
 735                                                   CSR_EEPROM_REG_READ_VALID_MSK,
 736                                                   IWL_EEPROM_ACCESS_TIMEOUT);
 737                         if (ret < 0) {
 738                                 IWL_ERR(priv, "Time out reading EEPROM[%d]\n", addr);
 739                                 goto done;
 740                         }
 741                         r = iwl_read32(bus(priv), CSR_EEPROM_REG);
 742                         e[addr / 2] = cpu_to_le16(r >> 16);
 743                 }
 744         }
 745
 746         IWL_DEBUG_EEPROM(priv, "NVM Type: %s, version: 0x%x\n",
 747                        (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP)
 748                        ? "OTP" : "EEPROM",
 749                        iwl_eeprom_query16(priv, EEPROM_VERSION));
 750
 751         ret = 0;
 752 done:
 753         iwl_eeprom_release_semaphore(priv);
 754
 755 err:
 756         if (ret)
 757                 iwl_eeprom_free(priv);
 758         /* Reset chip to save power until we load uCode during "up". */
 759         iwl_apm_stop(priv);
 760 alloc_err:
 761         return ret;
 762 }
 763
 764 void iwl_eeprom_free(struct iwl_priv *priv)
 765 {
 766         kfree(priv->eeprom);
 767         priv->eeprom = NULL;
 768 }
 769
 770 static void iwl_init_band_reference(const struct iwl_priv *priv,
 771                         int eep_band, int *eeprom_ch_count,
 772                         const struct iwl_eeprom_channel **eeprom_ch_info,
 773                         const u8 **eeprom_ch_index)
 774 {
 775         u32 offset = priv->cfg->lib->
 776                         eeprom_ops.regulatory_bands[eep_band - 1];
 777         switch (eep_band) {
 778         case 1:         /* 2.4GHz band */
 779                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_1);
 780                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 781                                 iwl_eeprom_query_addr(priv, offset);
 782                 *eeprom_ch_index = iwl_eeprom_band_1;
 783                 break;
 784         case 2:         /* 4.9GHz band */
 785                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_2);
 786                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 787                                 iwl_eeprom_query_addr(priv, offset);
 788                 *eeprom_ch_index = iwl_eeprom_band_2;
 789                 break;
 790         case 3:         /* 5.2GHz band */
 791                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_3);
 792                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 793                                 iwl_eeprom_query_addr(priv, offset);
 794                 *eeprom_ch_index = iwl_eeprom_band_3;
 795                 break;
 796         case 4:         /* 5.5GHz band */
 797                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_4);
 798                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 799                                 iwl_eeprom_query_addr(priv, offset);
 800                 *eeprom_ch_index = iwl_eeprom_band_4;
 801                 break;
 802         case 5:         /* 5.7GHz band */
 803                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_5);
 804                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 805                                 iwl_eeprom_query_addr(priv, offset);
 806                 *eeprom_ch_index = iwl_eeprom_band_5;
 807                 break;
 808         case 6:         /* 2.4GHz ht40 channels */
 809                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_6);
 810                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 811                                 iwl_eeprom_query_addr(priv, offset);
 812                 *eeprom_ch_index = iwl_eeprom_band_6;
 813                 break;
 814         case 7:         /* 5 GHz ht40 channels */
 815                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_7);
 816                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 817                                 iwl_eeprom_query_addr(priv, offset);
 818                 *eeprom_ch_index = iwl_eeprom_band_7;
 819                 break;
 820         default:
 821                 BUG();
 822                 return;
 823         }
 824 }
 825
 826 #define CHECK_AND_PRINT(x) ((eeprom_ch->flags & EEPROM_CHANNEL_##x) \
 827                             ? # x " " : "")
 828 /**
 829  * iwl_mod_ht40_chan_info - Copy ht40 channel info into driver's priv.
 830  *
 831  * Does not set up a command, or touch hardware.
 832  */
 833 static int iwl_mod_ht40_chan_info(struct iwl_priv *priv,
 834                               enum ieee80211_band band, u16 channel,
 835                               const struct iwl_eeprom_channel *eeprom_ch,
 836                               u8 clear_ht40_extension_channel)
 837 {
 838         struct iwl_channel_info *ch_info;
 839
 840         ch_info = (struct iwl_channel_info *)
 841                         iwl_get_channel_info(priv, band, channel);
 842
 843         if (!is_channel_valid(ch_info))
 844                 return -1;
 845
 846         IWL_DEBUG_EEPROM(priv, "HT40 Ch. %d [%sGHz] %s%s%s%s%s(0x%02x %ddBm):"
 847                         " Ad-Hoc %ssupported\n",
 848                         ch_info->channel,
 849                         is_channel_a_band(ch_info) ?
 850                         "5.2" : "2.4",
 851                         CHECK_AND_PRINT(IBSS),
 852                         CHECK_AND_PRINT(ACTIVE),
 853                         CHECK_AND_PRINT(RADAR),
 854                         CHECK_AND_PRINT(WIDE),
 855                         CHECK_AND_PRINT(DFS),
 856                         eeprom_ch->flags,
 857                         eeprom_ch->max_power_avg,
 858                         ((eeprom_ch->flags & EEPROM_CHANNEL_IBSS)
 859                          && !(eeprom_ch->flags & EEPROM_CHANNEL_RADAR)) ?
 860                         "" : "not ");
 861
 862         ch_info->ht40_eeprom = *eeprom_ch;
 863         ch_info->ht40_max_power_avg = eeprom_ch->max_power_avg;
 864         ch_info->ht40_flags = eeprom_ch->flags;
 865         if (eeprom_ch->flags & EEPROM_CHANNEL_VALID)
 866                 ch_info->ht40_extension_channel &= ~clear_ht40_extension_channel;
 867
 868         return 0;
 869 }
 870
 871 #define CHECK_AND_PRINT_I(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
 872                             ? # x " " : "")
 873
 874 /**
 875  * iwl_init_channel_map - Set up driver's info for all possible channels
 876  */
 877 int iwl_init_channel_map(struct iwl_priv *priv)
 878 {
 879         int eeprom_ch_count = 0;
 880         const u8 *eeprom_ch_index = NULL;
 881         const struct iwl_eeprom_channel *eeprom_ch_info = NULL;
 882         int band, ch;
 883         struct iwl_channel_info *ch_info;
 884
 885         if (priv->channel_count) {
 886                 IWL_DEBUG_EEPROM(priv, "Channel map already initialized.\n");
 887                 return 0;
 888         }
 889
 890         IWL_DEBUG_EEPROM(priv, "Initializing regulatory info from EEPROM\n");
 891
 892         priv->channel_count =
 893             ARRAY_SIZE(iwl_eeprom_band_1) +
 894             ARRAY_SIZE(iwl_eeprom_band_2) +
 895             ARRAY_SIZE(iwl_eeprom_band_3) +
 896             ARRAY_SIZE(iwl_eeprom_band_4) +
 897             ARRAY_SIZE(iwl_eeprom_band_5);
 898
 899         IWL_DEBUG_EEPROM(priv, "Parsing data for %d channels.\n",
 900                         priv->channel_count);
 901
 902         priv->channel_info = kcalloc(priv->channel_count,
 903                                      sizeof(struct iwl_channel_info),
 904                                      GFP_KERNEL);
 905         if (!priv->channel_info) {
 906                 IWL_ERR(priv, "Could not allocate channel_info\n");
 907                 priv->channel_count = 0;
 908                 return -ENOMEM;
 909         }
 910
 911         ch_info = priv->channel_info;
 912
 913         /* Loop through the 5 EEPROM bands adding them in order to the
 914          * channel map we maintain (that contains additional information than
 915          * what just in the EEPROM) */
 916         for (band = 1; band <= 5; band++) {
 917
 918                 iwl_init_band_reference(priv, band, &eeprom_ch_count,
 919                                         &eeprom_ch_info, &eeprom_ch_index);
 920
 921                 /* Loop through each band adding each of the channels */
 922                 for (ch = 0; ch < eeprom_ch_count; ch++) {
 923                         ch_info->channel = eeprom_ch_index[ch];
 924                         ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
 925                             IEEE80211_BAND_5GHZ;
 926
 927                         /* permanently store EEPROM's channel regulatory flags
 928                          *   and max power in channel info database. */
 929                         ch_info->eeprom = eeprom_ch_info[ch];
 930
 931                         /* Copy the run-time flags so they are there even on
 932                          * invalid channels */
 933                         ch_info->flags = eeprom_ch_info[ch].flags;
 934                         /* First write that ht40 is not enabled, and then enable
 935                          * one by one */
 936                         ch_info->ht40_extension_channel =
 937                                         IEEE80211_CHAN_NO_HT40;
 938
 939                         if (!(is_channel_valid(ch_info))) {
 940                                 IWL_DEBUG_EEPROM(priv,
 941                                                "Ch. %d Flags %x [%sGHz] - "
 942                                                "No traffic\n",
 943                                                ch_info->channel,
 944                                                ch_info->flags,
 945                                                is_channel_a_band(ch_info) ?
 946                                                "5.2" : "2.4");
 947                                 ch_info++;
 948                                 continue;
 949                         }
 950
 951                         /* Initialize regulatory-based run-time data */
 952                         ch_info->max_power_avg = ch_info->curr_txpow =
 953                             eeprom_ch_info[ch].max_power_avg;
 954                         ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
 955                         ch_info->min_power = 0;
 956
 957                         IWL_DEBUG_EEPROM(priv, "Ch. %d [%sGHz] "
 958                                        "%s%s%s%s%s%s(0x%02x %ddBm):"
 959                                        " Ad-Hoc %ssupported\n",
 960                                        ch_info->channel,
 961                                        is_channel_a_band(ch_info) ?
 962                                        "5.2" : "2.4",
 963                                        CHECK_AND_PRINT_I(VALID),
 964                                        CHECK_AND_PRINT_I(IBSS),
 965                                        CHECK_AND_PRINT_I(ACTIVE),
 966                                        CHECK_AND_PRINT_I(RADAR),
 967                                        CHECK_AND_PRINT_I(WIDE),
 968                                        CHECK_AND_PRINT_I(DFS),
 969                                        eeprom_ch_info[ch].flags,
 970                                        eeprom_ch_info[ch].max_power_avg,
 971                                        ((eeprom_ch_info[ch].
 972                                          flags & EEPROM_CHANNEL_IBSS)
 973                                         && !(eeprom_ch_info[ch].
 974                                              flags & EEPROM_CHANNEL_RADAR))
 975                                        ? "" : "not ");
 976
 977                         ch_info++;
 978                 }
 979         }
 980
 981         /* Check if we do have HT40 channels */
 982         if (priv->cfg->lib->eeprom_ops.regulatory_bands[5] ==
 983             EEPROM_REGULATORY_BAND_NO_HT40 &&
 984             priv->cfg->lib->eeprom_ops.regulatory_bands[6] ==
 985             EEPROM_REGULATORY_BAND_NO_HT40)
 986                 return 0;
 987
 988         /* Two additional EEPROM bands for 2.4 and 5 GHz HT40 channels */
 989         for (band = 6; band <= 7; band++) {
 990                 enum ieee80211_band ieeeband;
 991
 992                 iwl_init_band_reference(priv, band, &eeprom_ch_count,
 993                                         &eeprom_ch_info, &eeprom_ch_index);
 994
 995                 /* EEPROM band 6 is 2.4, band 7 is 5 GHz */
 996                 ieeeband =
 997                         (band == 6) ? IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
 998
 999                 /* Loop through each band adding each of the channels */
1000                 for (ch = 0; ch < eeprom_ch_count; ch++) {
1001                         /* Set up driver's info for lower half */
1002                         iwl_mod_ht40_chan_info(priv, ieeeband,
1003                                                 eeprom_ch_index[ch],
1004                                                 &eeprom_ch_info[ch],
1005                                                 IEEE80211_CHAN_NO_HT40PLUS);
1006
1007                         /* Set up driver's info for upper half */
1008                         iwl_mod_ht40_chan_info(priv, ieeeband,
1009                                                 eeprom_ch_index[ch] + 4,
1010                                                 &eeprom_ch_info[ch],
1011                                                 IEEE80211_CHAN_NO_HT40MINUS);
1012                 }
1013         }
1014
1015         /* for newer device (6000 series and up)
1016          * EEPROM contain enhanced tx power information
1017          * driver need to process addition information
1018          * to determine the max channel tx power limits
1019          */
1020         if (priv->cfg->lib->eeprom_ops.update_enhanced_txpower)
1021                 priv->cfg->lib->eeprom_ops.update_enhanced_txpower(priv);
1022
1023         return 0;
1024 }
1025
1026 /*
1027  * iwl_free_channel_map - undo allocations in iwl_init_channel_map
1028  */
1029 void iwl_free_channel_map(struct iwl_priv *priv)
1030 {
1031         kfree(priv->channel_info);
1032         priv->channel_count = 0;
1033 }
1034
1035 /**
1036  * iwl_get_channel_info - Find driver's private channel info
1037  *
1038  * Based on band and channel number.
1039  */
1040 const struct iwl_channel_info *iwl_get_channel_info(const struct iwl_priv *priv,
1041                                         enum ieee80211_band band, u16 channel)
1042 {
1043         int i;
1044
1045         switch (band) {
1046         case IEEE80211_BAND_5GHZ:
1047                 for (i = 14; i < priv->channel_count; i++) {
1048                         if (priv->channel_info[i].channel == channel)
1049                                 return &priv->channel_info[i];
1050                 }
1051                 break;
1052         case IEEE80211_BAND_2GHZ:
1053                 if (channel >= 1 && channel <= 14)
1054                         return &priv->channel_info[channel - 1];
1055                 break;
1056         default:
1057                 BUG();
1058         }
1059
1060         return NULL;
1061 }
1062
1063 void iwl_rf_config(struct iwl_priv *priv)
1064 {
1065         u16 radio_cfg;
1066
1067         radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
1068
1069         /* write radio config values to register */
1070         if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) <= EEPROM_RF_CONFIG_TYPE_MAX) {
1071                 iwl_set_bit(bus(priv), CSR_HW_IF_CONFIG_REG,
1072                             EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
1073                             EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
1074                             EEPROM_RF_CFG_DASH_MSK(radio_cfg));
1075                 IWL_INFO(priv, "Radio type=0x%x-0x%x-0x%x\n",
1076                          EEPROM_RF_CFG_TYPE_MSK(radio_cfg),
1077                          EEPROM_RF_CFG_STEP_MSK(radio_cfg),
1078                          EEPROM_RF_CFG_DASH_MSK(radio_cfg));
1079         } else
1080                 WARN_ON(1);
1081
1082         /* set CSR_HW_CONFIG_REG for uCode use */
1083         iwl_set_bit(bus(priv), CSR_HW_IF_CONFIG_REG,
1084                     CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
1085                     CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
1086 }