drivers/net/wireless/iwlwifi/iwl-eeprom.c

   1 /******************************************************************************
   2  *
   3  * This file is provided under a dual BSD/GPLv2 license.  When using or
   4  * redistributing this file, you may do so under either license.
   5  *
   6  * GPL LICENSE SUMMARY
   7  *
   8  * Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved.
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of version 2 of the GNU General Public License as
  12  * published by the Free Software Foundation.
  13  *
  14  * This program is distributed in the hope that it will be useful, but
  15  * WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  17  * General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  22  * USA
  23  *
  24  * The full GNU General Public License is included in this distribution
  25  * in the file called LICENSE.GPL.
  26  *
  27  * Contact Information:
  28  *  Intel Linux Wireless <ilw@linux.intel.com>
  29  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  30  *
  31  * BSD LICENSE
  32  *
  33  * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved.
  34  * All rights reserved.
  35  *
  36  * Redistribution and use in source and binary forms, with or without
  37  * modification, are permitted provided that the following conditions
  38  * are met:
  39  *
  40  *  * Redistributions of source code must retain the above copyright
  41  *    notice, this list of conditions and the following disclaimer.
  42  *  * Redistributions in binary form must reproduce the above copyright
  43  *    notice, this list of conditions and the following disclaimer in
  44  *    the documentation and/or other materials provided with the
  45  *    distribution.
  46  *  * Neither the name Intel Corporation nor the names of its
  47  *    contributors may be used to endorse or promote products derived
  48  *    from this software without specific prior written permission.
  49  *
  50  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  51  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  52  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  53  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  54  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  55  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  56  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  57  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  58  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  59  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  60  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  61  *****************************************************************************/
  62
  63
  64 #include <linux/kernel.h>
  65 #include <linux/module.h>
  66 #include <linux/init.h>
  67
  68 #include <net/mac80211.h>
  69
  70 #include "iwl-commands.h"
  71 #include "iwl-dev.h"
  72 #include "iwl-core.h"
  73 #include "iwl-debug.h"
  74 #include "iwl-eeprom.h"
  75 #include "iwl-io.h"
  76
  77 /************************** EEPROM BANDS ****************************
  78  *
  79  * The iwl_eeprom_band definitions below provide the mapping from the
  80  * EEPROM contents to the specific channel number supported for each
  81  * band.
  82  *
  83  * For example, iwl_priv->eeprom.band_3_channels[4] from the band_3
  84  * definition below maps to physical channel 42 in the 5.2GHz spectrum.
  85  * The specific geography and calibration information for that channel
  86  * is contained in the eeprom map itself.
  87  *
  88  * During init, we copy the eeprom information and channel map
  89  * information into priv->channel_info_24/52 and priv->channel_map_24/52
  90  *
  91  * channel_map_24/52 provides the index in the channel_info array for a
  92  * given channel.  We have to have two separate maps as there is channel
  93  * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
  94  * band_2
  95  *
  96  * A value of 0xff stored in the channel_map indicates that the channel
  97  * is not supported by the hardware at all.
  98  *
  99  * A value of 0xfe in the channel_map indicates that the channel is not
 100  * valid for Tx with the current hardware.  This means that
 101  * while the system can tune and receive on a given channel, it may not
 102  * be able to associate or transmit any frames on that
 103  * channel.  There is no corresponding channel information for that
 104  * entry.
 105  *
 106  *********************************************************************/
 107
 108 /* 2.4 GHz */
 109 const u8 iwl_eeprom_band_1[14] = {
 110         1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
 111 };
 112
 113 /* 5.2 GHz bands */
 114 static const u8 iwl_eeprom_band_2[] = { /* 4915-5080MHz */
 115         183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
 116 };
 117
 118 static const u8 iwl_eeprom_band_3[] = { /* 5170-5320MHz */
 119         34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
 120 };
 121
 122 static const u8 iwl_eeprom_band_4[] = { /* 5500-5700MHz */
 123         100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
 124 };
 125
 126 static const u8 iwl_eeprom_band_5[] = { /* 5725-5825MHz */
 127         145, 149, 153, 157, 161, 165
 128 };
 129
 130 static const u8 iwl_eeprom_band_6[] = {       /* 2.4 FAT channel */
 131         1, 2, 3, 4, 5, 6, 7
 132 };
 133
 134 static const u8 iwl_eeprom_band_7[] = {       /* 5.2 FAT channel */
 135         36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
 136 };
 137
 138 /******************************************************************************
 139  *
 140  * EEPROM related functions
 141  *
 142 ******************************************************************************/
 143
 144 int iwlcore_eeprom_verify_signature(struct iwl_priv *priv)
 145 {
 146         u32 gp = iwl_read32(priv, CSR_EEPROM_GP);
 147         if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
 148                 IWL_ERR(priv, "EEPROM not found, EEPROM_GP=0x%08x\n", gp);
 149                 return -ENOENT;
 150         }
 151         return 0;
 152 }
 153 EXPORT_SYMBOL(iwlcore_eeprom_verify_signature);
 154
 155 static int iwlcore_get_nvm_type(struct iwl_priv *priv)
 156 {
 157         u32 otpgp;
 158         int nvm_type;
 159
 160         /* OTP only valid for CP/PP and after */
 161         switch (priv->hw_rev & CSR_HW_REV_TYPE_MSK) {
 162         case CSR_HW_REV_TYPE_3945:
 163         case CSR_HW_REV_TYPE_4965:
 164         case CSR_HW_REV_TYPE_5300:
 165         case CSR_HW_REV_TYPE_5350:
 166         case CSR_HW_REV_TYPE_5100:
 167         case CSR_HW_REV_TYPE_5150:
 168                 nvm_type = NVM_DEVICE_TYPE_EEPROM;
 169                 break;
 170         default:
 171                 otpgp = iwl_read32(priv, CSR_OTP_GP_REG);
 172                 if (otpgp & CSR_OTP_GP_REG_DEVICE_SELECT)
 173                         nvm_type = NVM_DEVICE_TYPE_OTP;
 174                 else
 175                         nvm_type = NVM_DEVICE_TYPE_EEPROM;
 176                 break;
 177         }
 178         return  nvm_type;
 179 }
 180
 181 /*
 182  * The device's EEPROM semaphore prevents conflicts between driver and uCode
 183  * when accessing the EEPROM; each access is a series of pulses to/from the
 184  * EEPROM chip, not a single event, so even reads could conflict if they
 185  * weren't arbitrated by the semaphore.
 186  */
 187 int iwlcore_eeprom_acquire_semaphore(struct iwl_priv *priv)
 188 {
 189         u16 count;
 190         int ret;
 191
 192         for (count = 0; count < EEPROM_SEM_RETRY_LIMIT; count++) {
 193                 /* Request semaphore */
 194                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 195                             CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
 196
 197                 /* See if we got it */
 198                 ret = iwl_poll_direct_bit(priv, CSR_HW_IF_CONFIG_REG,
 199                                 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
 200                                 EEPROM_SEM_TIMEOUT);
 201                 if (ret >= 0) {
 202                         IWL_DEBUG_IO(priv, "Acquired semaphore after %d tries.\n",
 203                                 count+1);
 204                         return ret;
 205                 }
 206         }
 207
 208         return ret;
 209 }
 210 EXPORT_SYMBOL(iwlcore_eeprom_acquire_semaphore);
 211
 212 void iwlcore_eeprom_release_semaphore(struct iwl_priv *priv)
 213 {
 214         iwl_clear_bit(priv, CSR_HW_IF_CONFIG_REG,
 215                 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
 216
 217 }
 218 EXPORT_SYMBOL(iwlcore_eeprom_release_semaphore);
 219
 220 const u8 *iwlcore_eeprom_query_addr(const struct iwl_priv *priv, size_t offset)
 221 {
 222         BUG_ON(offset >= priv->cfg->eeprom_size);
 223         return &priv->eeprom[offset];
 224 }
 225 EXPORT_SYMBOL(iwlcore_eeprom_query_addr);
 226
 227 static int iwl_init_otp_access(struct iwl_priv *priv)
 228 {
 229         int ret;
 230
 231         /* Enable 40MHz radio clock */
 232         _iwl_write32(priv, CSR_GP_CNTRL,
 233                      _iwl_read32(priv, CSR_GP_CNTRL) |
 234                      CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
 235
 236         /* wait for clock to be ready */
 237         ret = iwl_poll_direct_bit(priv, CSR_GP_CNTRL,
 238                                   CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
 239                                   25000);
 240         if (ret < 0)
 241                 IWL_ERR(priv, "Time out access OTP\n");
 242         else {
 243                 iwl_set_bits_prph(priv, APMG_PS_CTRL_REG,
 244                                   APMG_PS_CTRL_VAL_RESET_REQ);
 245                 udelay(5);
 246                 iwl_clear_bits_prph(priv, APMG_PS_CTRL_REG,
 247                                     APMG_PS_CTRL_VAL_RESET_REQ);
 248         }
 249         return ret;
 250 }
 251
 252 /**
 253  * iwl_eeprom_init - read EEPROM contents
 254  *
 255  * Load the EEPROM contents from adapter into priv->eeprom
 256  *
 257  * NOTE:  This routine uses the non-debug IO access functions.
 258  */
 259 int iwl_eeprom_init(struct iwl_priv *priv)
 260 {
 261         u16 *e;
 262         u32 gp = iwl_read32(priv, CSR_EEPROM_GP);
 263         int sz;
 264         int ret;
 265         u16 addr;
 266         u32 otpgp;
 267
 268         priv->nvm_device_type = iwlcore_get_nvm_type(priv);
 269
 270         /* allocate eeprom */
 271         if (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP)
 272                 priv->cfg->eeprom_size =
 273                         OTP_BLOCK_SIZE * OTP_LOWER_BLOCKS_TOTAL;
 274         sz = priv->cfg->eeprom_size;
 275         priv->eeprom = kzalloc(sz, GFP_KERNEL);
 276         if (!priv->eeprom) {
 277                 ret = -ENOMEM;
 278                 goto alloc_err;
 279         }
 280         e = (u16 *)priv->eeprom;
 281
 282         ret = priv->cfg->ops->lib->eeprom_ops.verify_signature(priv);
 283         if (ret < 0) {
 284                 IWL_ERR(priv, "EEPROM not found, EEPROM_GP=0x%08x\n", gp);
 285                 ret = -ENOENT;
 286                 goto err;
 287         }
 288
 289         /* Make sure driver (instead of uCode) is allowed to read EEPROM */
 290         ret = priv->cfg->ops->lib->eeprom_ops.acquire_semaphore(priv);
 291         if (ret < 0) {
 292                 IWL_ERR(priv, "Failed to acquire EEPROM semaphore.\n");
 293                 ret = -ENOENT;
 294                 goto err;
 295         }
 296         if (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP) {
 297                 ret = iwl_init_otp_access(priv);
 298                 if (ret) {
 299                         IWL_ERR(priv, "Failed to initialize OTP access.\n");
 300                         ret = -ENOENT;
 301                         goto err;
 302                 }
 303                 _iwl_write32(priv, CSR_EEPROM_GP,
 304                              iwl_read32(priv, CSR_EEPROM_GP) &
 305                              ~CSR_EEPROM_GP_IF_OWNER_MSK);
 306                 /* clear */
 307                 _iwl_write32(priv, CSR_OTP_GP_REG,
 308                              iwl_read32(priv, CSR_OTP_GP_REG) |
 309                              CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK |
 310                              CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK);
 311
 312                 for (addr = 0; addr < sz; addr += sizeof(u16)) {
 313                         u32 r;
 314
 315                         _iwl_write32(priv, CSR_EEPROM_REG,
 316                                      CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
 317
 318                         ret = iwl_poll_direct_bit(priv, CSR_EEPROM_REG,
 319                                                   CSR_EEPROM_REG_READ_VALID_MSK,
 320                                                   IWL_EEPROM_ACCESS_TIMEOUT);
 321                         if (ret < 0) {
 322                                 IWL_ERR(priv, "Time out reading OTP[%d]\n", addr);
 323                                 goto done;
 324                         }
 325                         r = _iwl_read_direct32(priv, CSR_EEPROM_REG);
 326                         /* check for ECC errors: */
 327                         otpgp = iwl_read32(priv, CSR_OTP_GP_REG);
 328                         if (otpgp & CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK) {
 329                                 /* stop in this case */
 330                                 IWL_ERR(priv, "Uncorrectable OTP ECC error, Abort OTP read\n");
 331                                 goto done;
 332                         }
 333                         if (otpgp & CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK) {
 334                                 /* continue in this case */
 335                                 _iwl_write32(priv, CSR_OTP_GP_REG,
 336                                              iwl_read32(priv, CSR_OTP_GP_REG) |
 337                                              CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK);
 338                                 IWL_ERR(priv, "Correctable OTP ECC error, continue read\n");
 339                         }
 340                         e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
 341                 }
 342         } else {
 343                 /* eeprom is an array of 16bit values */
 344                 for (addr = 0; addr < sz; addr += sizeof(u16)) {
 345                         u32 r;
 346
 347                         _iwl_write32(priv, CSR_EEPROM_REG,
 348                                      CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
 349
 350                         ret = iwl_poll_direct_bit(priv, CSR_EEPROM_REG,
 351                                                   CSR_EEPROM_REG_READ_VALID_MSK,
 352                                                   IWL_EEPROM_ACCESS_TIMEOUT);
 353                         if (ret < 0) {
 354                                 IWL_ERR(priv, "Time out reading EEPROM[%d]\n", addr);
 355                                 goto done;
 356                         }
 357                         r = _iwl_read_direct32(priv, CSR_EEPROM_REG);
 358                         e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
 359                 }
 360         }
 361         ret = 0;
 362 done:
 363         priv->cfg->ops->lib->eeprom_ops.release_semaphore(priv);
 364 err:
 365         if (ret)
 366                 iwl_eeprom_free(priv);
 367 alloc_err:
 368         return ret;
 369 }
 370 EXPORT_SYMBOL(iwl_eeprom_init);
 371
 372 void iwl_eeprom_free(struct iwl_priv *priv)
 373 {
 374         kfree(priv->eeprom);
 375         priv->eeprom = NULL;
 376 }
 377 EXPORT_SYMBOL(iwl_eeprom_free);
 378
 379 int iwl_eeprom_check_version(struct iwl_priv *priv)
 380 {
 381         u16 eeprom_ver;
 382         u16 calib_ver;
 383
 384         eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
 385         calib_ver = priv->cfg->ops->lib->eeprom_ops.calib_version(priv);
 386
 387         if (eeprom_ver < priv->cfg->eeprom_ver ||
 388             calib_ver < priv->cfg->eeprom_calib_ver)
 389                 goto err;
 390
 391         return 0;
 392 err:
 393         IWL_ERR(priv, "Unsupported (too old) EEPROM VER=0x%x < 0x%x CALIB=0x%x < 0x%x\n",
 394                   eeprom_ver, priv->cfg->eeprom_ver,
 395                   calib_ver,  priv->cfg->eeprom_calib_ver);
 396         return -EINVAL;
 397
 398 }
 399 EXPORT_SYMBOL(iwl_eeprom_check_version);
 400
 401 const u8 *iwl_eeprom_query_addr(const struct iwl_priv *priv, size_t offset)
 402 {
 403         return priv->cfg->ops->lib->eeprom_ops.query_addr(priv, offset);
 404 }
 405 EXPORT_SYMBOL(iwl_eeprom_query_addr);
 406
 407 u16 iwl_eeprom_query16(const struct iwl_priv *priv, size_t offset)
 408 {
 409         if (!priv->eeprom)
 410                 return 0;
 411         return (u16)priv->eeprom[offset] | ((u16)priv->eeprom[offset + 1] << 8);
 412 }
 413 EXPORT_SYMBOL(iwl_eeprom_query16);
 414
 415 void iwl_eeprom_get_mac(const struct iwl_priv *priv, u8 *mac)
 416 {
 417         const u8 *addr = priv->cfg->ops->lib->eeprom_ops.query_addr(priv,
 418                                         EEPROM_MAC_ADDRESS);
 419         memcpy(mac, addr, ETH_ALEN);
 420 }
 421 EXPORT_SYMBOL(iwl_eeprom_get_mac);
 422
 423 static void iwl_init_band_reference(const struct iwl_priv *priv,
 424                         int eep_band, int *eeprom_ch_count,
 425                         const struct iwl_eeprom_channel **eeprom_ch_info,
 426                         const u8 **eeprom_ch_index)
 427 {
 428         u32 offset = priv->cfg->ops->lib->
 429                         eeprom_ops.regulatory_bands[eep_band - 1];
 430         switch (eep_band) {
 431         case 1:         /* 2.4GHz band */
 432                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_1);
 433                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 434                                 iwl_eeprom_query_addr(priv, offset);
 435                 *eeprom_ch_index = iwl_eeprom_band_1;
 436                 break;
 437         case 2:         /* 4.9GHz band */
 438                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_2);
 439                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 440                                 iwl_eeprom_query_addr(priv, offset);
 441                 *eeprom_ch_index = iwl_eeprom_band_2;
 442                 break;
 443         case 3:         /* 5.2GHz band */
 444                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_3);
 445                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 446                                 iwl_eeprom_query_addr(priv, offset);
 447                 *eeprom_ch_index = iwl_eeprom_band_3;
 448                 break;
 449         case 4:         /* 5.5GHz band */
 450                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_4);
 451                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 452                                 iwl_eeprom_query_addr(priv, offset);
 453                 *eeprom_ch_index = iwl_eeprom_band_4;
 454                 break;
 455         case 5:         /* 5.7GHz band */
 456                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_5);
 457                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 458                                 iwl_eeprom_query_addr(priv, offset);
 459                 *eeprom_ch_index = iwl_eeprom_band_5;
 460                 break;
 461         case 6:         /* 2.4GHz FAT channels */
 462                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_6);
 463                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 464                                 iwl_eeprom_query_addr(priv, offset);
 465                 *eeprom_ch_index = iwl_eeprom_band_6;
 466                 break;
 467         case 7:         /* 5 GHz FAT channels */
 468                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_7);
 469                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 470                                 iwl_eeprom_query_addr(priv, offset);
 471                 *eeprom_ch_index = iwl_eeprom_band_7;
 472                 break;
 473         default:
 474                 BUG();
 475                 return;
 476         }
 477 }
 478
 479 #define CHECK_AND_PRINT(x) ((eeprom_ch->flags & EEPROM_CHANNEL_##x) \
 480                             ? # x " " : "")
 481
 482 /**
 483  * iwl_set_fat_chan_info - Copy fat channel info into driver's priv.
 484  *
 485  * Does not set up a command, or touch hardware.
 486  */
 487 static int iwl_set_fat_chan_info(struct iwl_priv *priv,
 488                               enum ieee80211_band band, u16 channel,
 489                               const struct iwl_eeprom_channel *eeprom_ch,
 490                               u8 fat_extension_channel)
 491 {
 492         struct iwl_channel_info *ch_info;
 493
 494         ch_info = (struct iwl_channel_info *)
 495                         iwl_get_channel_info(priv, band, channel);
 496
 497         if (!is_channel_valid(ch_info))
 498                 return -1;
 499
 500         IWL_DEBUG_INFO(priv, "FAT Ch. %d [%sGHz] %s%s%s%s%s(0x%02x %ddBm):"
 501                         " Ad-Hoc %ssupported\n",
 502                         ch_info->channel,
 503                         is_channel_a_band(ch_info) ?
 504                         "5.2" : "2.4",
 505                         CHECK_AND_PRINT(IBSS),
 506                         CHECK_AND_PRINT(ACTIVE),
 507                         CHECK_AND_PRINT(RADAR),
 508                         CHECK_AND_PRINT(WIDE),
 509                         CHECK_AND_PRINT(DFS),
 510                         eeprom_ch->flags,
 511                         eeprom_ch->max_power_avg,
 512                         ((eeprom_ch->flags & EEPROM_CHANNEL_IBSS)
 513                          && !(eeprom_ch->flags & EEPROM_CHANNEL_RADAR)) ?
 514                         "" : "not ");
 515
 516         ch_info->fat_eeprom = *eeprom_ch;
 517         ch_info->fat_max_power_avg = eeprom_ch->max_power_avg;
 518         ch_info->fat_curr_txpow = eeprom_ch->max_power_avg;
 519         ch_info->fat_min_power = 0;
 520         ch_info->fat_scan_power = eeprom_ch->max_power_avg;
 521         ch_info->fat_flags = eeprom_ch->flags;
 522         ch_info->fat_extension_channel = fat_extension_channel;
 523
 524         return 0;
 525 }
 526
 527 #define CHECK_AND_PRINT_I(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
 528                             ? # x " " : "")
 529
 530 /**
 531  * iwl_init_channel_map - Set up driver's info for all possible channels
 532  */
 533 int iwl_init_channel_map(struct iwl_priv *priv)
 534 {
 535         int eeprom_ch_count = 0;
 536         const u8 *eeprom_ch_index = NULL;
 537         const struct iwl_eeprom_channel *eeprom_ch_info = NULL;
 538         int band, ch;
 539         struct iwl_channel_info *ch_info;
 540
 541         if (priv->channel_count) {
 542                 IWL_DEBUG_INFO(priv, "Channel map already initialized.\n");
 543                 return 0;
 544         }
 545
 546         IWL_DEBUG_INFO(priv, "Initializing regulatory info from EEPROM\n");
 547
 548         priv->channel_count =
 549             ARRAY_SIZE(iwl_eeprom_band_1) +
 550             ARRAY_SIZE(iwl_eeprom_band_2) +
 551             ARRAY_SIZE(iwl_eeprom_band_3) +
 552             ARRAY_SIZE(iwl_eeprom_band_4) +
 553             ARRAY_SIZE(iwl_eeprom_band_5);
 554
 555         IWL_DEBUG_INFO(priv, "Parsing data for %d channels.\n", priv->channel_count);
 556
 557         priv->channel_info = kzalloc(sizeof(struct iwl_channel_info) *
 558                                      priv->channel_count, GFP_KERNEL);
 559         if (!priv->channel_info) {
 560                 IWL_ERR(priv, "Could not allocate channel_info\n");
 561                 priv->channel_count = 0;
 562                 return -ENOMEM;
 563         }
 564
 565         ch_info = priv->channel_info;
 566
 567         /* Loop through the 5 EEPROM bands adding them in order to the
 568          * channel map we maintain (that contains additional information than
 569          * what just in the EEPROM) */
 570         for (band = 1; band <= 5; band++) {
 571
 572                 iwl_init_band_reference(priv, band, &eeprom_ch_count,
 573                                         &eeprom_ch_info, &eeprom_ch_index);
 574
 575                 /* Loop through each band adding each of the channels */
 576                 for (ch = 0; ch < eeprom_ch_count; ch++) {
 577                         ch_info->channel = eeprom_ch_index[ch];
 578                         ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
 579                             IEEE80211_BAND_5GHZ;
 580
 581                         /* permanently store EEPROM's channel regulatory flags
 582                          *   and max power in channel info database. */
 583                         ch_info->eeprom = eeprom_ch_info[ch];
 584
 585                         /* Copy the run-time flags so they are there even on
 586                          * invalid channels */
 587                         ch_info->flags = eeprom_ch_info[ch].flags;
 588                         /* First write that fat is not enabled, and then enable
 589                          * one by one */
 590                         ch_info->fat_extension_channel =
 591                                 (IEEE80211_CHAN_NO_HT40PLUS |
 592                                  IEEE80211_CHAN_NO_HT40MINUS);
 593
 594                         if (!(is_channel_valid(ch_info))) {
 595                                 IWL_DEBUG_INFO(priv, "Ch. %d Flags %x [%sGHz] - "
 596                                                "No traffic\n",
 597                                                ch_info->channel,
 598                                                ch_info->flags,
 599                                                is_channel_a_band(ch_info) ?
 600                                                "5.2" : "2.4");
 601                                 ch_info++;
 602                                 continue;
 603                         }
 604
 605                         /* Initialize regulatory-based run-time data */
 606                         ch_info->max_power_avg = ch_info->curr_txpow =
 607                             eeprom_ch_info[ch].max_power_avg;
 608                         ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
 609                         ch_info->min_power = 0;
 610
 611                         IWL_DEBUG_INFO(priv, "Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x %ddBm):"
 612                                        " Ad-Hoc %ssupported\n",
 613                                        ch_info->channel,
 614                                        is_channel_a_band(ch_info) ?
 615                                        "5.2" : "2.4",
 616                                        CHECK_AND_PRINT_I(VALID),
 617                                        CHECK_AND_PRINT_I(IBSS),
 618                                        CHECK_AND_PRINT_I(ACTIVE),
 619                                        CHECK_AND_PRINT_I(RADAR),
 620                                        CHECK_AND_PRINT_I(WIDE),
 621                                        CHECK_AND_PRINT_I(DFS),
 622                                        eeprom_ch_info[ch].flags,
 623                                        eeprom_ch_info[ch].max_power_avg,
 624                                        ((eeprom_ch_info[ch].
 625                                          flags & EEPROM_CHANNEL_IBSS)
 626                                         && !(eeprom_ch_info[ch].
 627                                              flags & EEPROM_CHANNEL_RADAR))
 628                                        ? "" : "not ");
 629
 630                         /* Set the tx_power_user_lmt to the highest power
 631                          * supported by any channel */
 632                         if (eeprom_ch_info[ch].max_power_avg >
 633                                                 priv->tx_power_user_lmt)
 634                                 priv->tx_power_user_lmt =
 635                                     eeprom_ch_info[ch].max_power_avg;
 636
 637                         ch_info++;
 638                 }
 639         }
 640
 641         /* Check if we do have FAT channels */
 642         if (priv->cfg->ops->lib->eeprom_ops.regulatory_bands[5] ==
 643             EEPROM_REGULATORY_BAND_NO_FAT &&
 644             priv->cfg->ops->lib->eeprom_ops.regulatory_bands[6] ==
 645             EEPROM_REGULATORY_BAND_NO_FAT)
 646                 return 0;
 647
 648         /* Two additional EEPROM bands for 2.4 and 5 GHz FAT channels */
 649         for (band = 6; band <= 7; band++) {
 650                 enum ieee80211_band ieeeband;
 651                 u8 fat_extension_chan;
 652
 653                 iwl_init_band_reference(priv, band, &eeprom_ch_count,
 654                                         &eeprom_ch_info, &eeprom_ch_index);
 655
 656                 /* EEPROM band 6 is 2.4, band 7 is 5 GHz */
 657                 ieeeband =
 658                         (band == 6) ? IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
 659
 660                 /* Loop through each band adding each of the channels */
 661                 for (ch = 0; ch < eeprom_ch_count; ch++) {
 662
 663                         if ((band == 6) &&
 664                                 ((eeprom_ch_index[ch] == 5) ||
 665                                  (eeprom_ch_index[ch] == 6) ||
 666                                  (eeprom_ch_index[ch] == 7)))
 667                                 /* both are allowed: above and below */
 668                                 fat_extension_chan = 0;
 669                         else
 670                                 fat_extension_chan =
 671                                         IEEE80211_CHAN_NO_HT40MINUS;
 672
 673                         /* Set up driver's info for lower half */
 674                         iwl_set_fat_chan_info(priv, ieeeband,
 675                                                 eeprom_ch_index[ch],
 676                                                 &(eeprom_ch_info[ch]),
 677                                                 fat_extension_chan);
 678
 679                         /* Set up driver's info for upper half */
 680                         iwl_set_fat_chan_info(priv, ieeeband,
 681                                                 (eeprom_ch_index[ch] + 4),
 682                                                 &(eeprom_ch_info[ch]),
 683                                                 IEEE80211_CHAN_NO_HT40PLUS);
 684                 }
 685         }
 686
 687         return 0;
 688 }
 689 EXPORT_SYMBOL(iwl_init_channel_map);
 690
 691 /*
 692  * iwl_free_channel_map - undo allocations in iwl_init_channel_map
 693  */
 694 void iwl_free_channel_map(struct iwl_priv *priv)
 695 {
 696         kfree(priv->channel_info);
 697         priv->channel_count = 0;
 698 }
 699 EXPORT_SYMBOL(iwl_free_channel_map);
 700
 701 /**
 702  * iwl_get_channel_info - Find driver's private channel info
 703  *
 704  * Based on band and channel number.
 705  */
 706 const struct iwl_channel_info *iwl_get_channel_info(const struct iwl_priv *priv,
 707                                         enum ieee80211_band band, u16 channel)
 708 {
 709         int i;
 710
 711         switch (band) {
 712         case IEEE80211_BAND_5GHZ:
 713                 for (i = 14; i < priv->channel_count; i++) {
 714                         if (priv->channel_info[i].channel == channel)
 715                                 return &priv->channel_info[i];
 716                 }
 717                 break;
 718         case IEEE80211_BAND_2GHZ:
 719                 if (channel >= 1 && channel <= 14)
 720                         return &priv->channel_info[channel - 1];
 721                 break;
 722         default:
 723                 BUG();
 724         }
 725
 726         return NULL;
 727 }
 728 EXPORT_SYMBOL(iwl_get_channel_info);
 729